xref: /openbmc/linux/drivers/mmc/host/sdhci_f_sdh30.c (revision 06641e8d)
187a50745SVincent Yang /*
287a50745SVincent Yang  * linux/drivers/mmc/host/sdhci_f_sdh30.c
387a50745SVincent Yang  *
487a50745SVincent Yang  * Copyright (C) 2013 - 2015 Fujitsu Semiconductor, Ltd
587a50745SVincent Yang  *              Vincent Yang <vincent.yang@tw.fujitsu.com>
687a50745SVincent Yang  * Copyright (C) 2015 Linaro Ltd  Andy Green <andy.green@linaro.org>
787a50745SVincent Yang  *
887a50745SVincent Yang  * This program is free software: you can redistribute it and/or modify
987a50745SVincent Yang  * it under the terms of the GNU General Public License as published by
1087a50745SVincent Yang  * the Free Software Foundation, version 2 of the License.
1187a50745SVincent Yang  */
1287a50745SVincent Yang 
1387a50745SVincent Yang #include <linux/err.h>
1487a50745SVincent Yang #include <linux/delay.h>
1587a50745SVincent Yang #include <linux/module.h>
1606641e8dSArd Biesheuvel #include <linux/property.h>
1787a50745SVincent Yang #include <linux/clk.h>
1887a50745SVincent Yang 
1987a50745SVincent Yang #include "sdhci-pltfm.h"
2087a50745SVincent Yang 
2187a50745SVincent Yang /* F_SDH30 extended Controller registers */
2287a50745SVincent Yang #define F_SDH30_AHB_CONFIG		0x100
2387a50745SVincent Yang #define  F_SDH30_AHB_BIGED		0x00000040
2487a50745SVincent Yang #define  F_SDH30_BUSLOCK_DMA		0x00000020
2587a50745SVincent Yang #define  F_SDH30_BUSLOCK_EN		0x00000010
2687a50745SVincent Yang #define  F_SDH30_SIN			0x00000008
2787a50745SVincent Yang #define  F_SDH30_AHB_INCR_16		0x00000004
2887a50745SVincent Yang #define  F_SDH30_AHB_INCR_8		0x00000002
2987a50745SVincent Yang #define  F_SDH30_AHB_INCR_4		0x00000001
3087a50745SVincent Yang 
3187a50745SVincent Yang #define F_SDH30_TUNING_SETTING		0x108
3287a50745SVincent Yang #define  F_SDH30_CMD_CHK_DIS		0x00010000
3387a50745SVincent Yang 
3487a50745SVincent Yang #define F_SDH30_IO_CONTROL2		0x114
3587a50745SVincent Yang #define  F_SDH30_CRES_O_DN		0x00080000
3687a50745SVincent Yang #define  F_SDH30_MSEL_O_1_8		0x00040000
3787a50745SVincent Yang 
3887a50745SVincent Yang #define F_SDH30_ESD_CONTROL		0x124
3987a50745SVincent Yang #define  F_SDH30_EMMC_RST		0x00000002
4087a50745SVincent Yang #define  F_SDH30_EMMC_HS200		0x01000000
4187a50745SVincent Yang 
4287a50745SVincent Yang #define F_SDH30_CMD_DAT_DELAY		0x200
4387a50745SVincent Yang 
4487a50745SVincent Yang #define F_SDH30_MIN_CLOCK		400000
4587a50745SVincent Yang 
4687a50745SVincent Yang struct f_sdhost_priv {
4787a50745SVincent Yang 	struct clk *clk_iface;
4887a50745SVincent Yang 	struct clk *clk;
4987a50745SVincent Yang 	u32 vendor_hs200;
5087a50745SVincent Yang 	struct device *dev;
5106641e8dSArd Biesheuvel 	bool enable_cmd_dat_delay;
5287a50745SVincent Yang };
5387a50745SVincent Yang 
54cee4e7a5SAxel Lin static void sdhci_f_sdh30_soft_voltage_switch(struct sdhci_host *host)
5587a50745SVincent Yang {
5687a50745SVincent Yang 	struct f_sdhost_priv *priv = sdhci_priv(host);
5787a50745SVincent Yang 	u32 ctrl = 0;
5887a50745SVincent Yang 
5987a50745SVincent Yang 	usleep_range(2500, 3000);
6087a50745SVincent Yang 	ctrl = sdhci_readl(host, F_SDH30_IO_CONTROL2);
6187a50745SVincent Yang 	ctrl |= F_SDH30_CRES_O_DN;
6287a50745SVincent Yang 	sdhci_writel(host, ctrl, F_SDH30_IO_CONTROL2);
6387a50745SVincent Yang 	ctrl |= F_SDH30_MSEL_O_1_8;
6487a50745SVincent Yang 	sdhci_writel(host, ctrl, F_SDH30_IO_CONTROL2);
6587a50745SVincent Yang 
6687a50745SVincent Yang 	ctrl &= ~F_SDH30_CRES_O_DN;
6787a50745SVincent Yang 	sdhci_writel(host, ctrl, F_SDH30_IO_CONTROL2);
6887a50745SVincent Yang 	usleep_range(2500, 3000);
6987a50745SVincent Yang 
7087a50745SVincent Yang 	if (priv->vendor_hs200) {
7187a50745SVincent Yang 		dev_info(priv->dev, "%s: setting hs200\n", __func__);
7287a50745SVincent Yang 		ctrl = sdhci_readl(host, F_SDH30_ESD_CONTROL);
7387a50745SVincent Yang 		ctrl |= priv->vendor_hs200;
7487a50745SVincent Yang 		sdhci_writel(host, ctrl, F_SDH30_ESD_CONTROL);
7587a50745SVincent Yang 	}
7687a50745SVincent Yang 
7787a50745SVincent Yang 	ctrl = sdhci_readl(host, F_SDH30_TUNING_SETTING);
7887a50745SVincent Yang 	ctrl |= F_SDH30_CMD_CHK_DIS;
7987a50745SVincent Yang 	sdhci_writel(host, ctrl, F_SDH30_TUNING_SETTING);
8087a50745SVincent Yang }
8187a50745SVincent Yang 
82cee4e7a5SAxel Lin static unsigned int sdhci_f_sdh30_get_min_clock(struct sdhci_host *host)
8387a50745SVincent Yang {
8487a50745SVincent Yang 	return F_SDH30_MIN_CLOCK;
8587a50745SVincent Yang }
8687a50745SVincent Yang 
87cee4e7a5SAxel Lin static void sdhci_f_sdh30_reset(struct sdhci_host *host, u8 mask)
8887a50745SVincent Yang {
8906641e8dSArd Biesheuvel 	struct f_sdhost_priv *priv = sdhci_priv(host);
9006641e8dSArd Biesheuvel 	u32 ctl;
9106641e8dSArd Biesheuvel 
9287a50745SVincent Yang 	if (sdhci_readw(host, SDHCI_CLOCK_CONTROL) == 0)
9387a50745SVincent Yang 		sdhci_writew(host, 0xBC01, SDHCI_CLOCK_CONTROL);
9487a50745SVincent Yang 
9587a50745SVincent Yang 	sdhci_reset(host, mask);
9606641e8dSArd Biesheuvel 
9706641e8dSArd Biesheuvel 	if (priv->enable_cmd_dat_delay) {
9806641e8dSArd Biesheuvel 		ctl = sdhci_readl(host, F_SDH30_ESD_CONTROL);
9906641e8dSArd Biesheuvel 		ctl |= F_SDH30_CMD_DAT_DELAY;
10006641e8dSArd Biesheuvel 		sdhci_writel(host, ctl, F_SDH30_ESD_CONTROL);
10106641e8dSArd Biesheuvel 	}
10287a50745SVincent Yang }
10387a50745SVincent Yang 
10487a50745SVincent Yang static const struct sdhci_ops sdhci_f_sdh30_ops = {
10587a50745SVincent Yang 	.voltage_switch = sdhci_f_sdh30_soft_voltage_switch,
10687a50745SVincent Yang 	.get_min_clock = sdhci_f_sdh30_get_min_clock,
10787a50745SVincent Yang 	.reset = sdhci_f_sdh30_reset,
10887a50745SVincent Yang 	.set_clock = sdhci_set_clock,
10987a50745SVincent Yang 	.set_bus_width = sdhci_set_bus_width,
11087a50745SVincent Yang 	.set_uhs_signaling = sdhci_set_uhs_signaling,
11187a50745SVincent Yang };
11287a50745SVincent Yang 
11387a50745SVincent Yang static int sdhci_f_sdh30_probe(struct platform_device *pdev)
11487a50745SVincent Yang {
11587a50745SVincent Yang 	struct sdhci_host *host;
11687a50745SVincent Yang 	struct device *dev = &pdev->dev;
11787a50745SVincent Yang 	struct resource *res;
11887a50745SVincent Yang 	int irq, ctrl = 0, ret = 0;
11987a50745SVincent Yang 	struct f_sdhost_priv *priv;
12087a50745SVincent Yang 	u32 reg = 0;
12187a50745SVincent Yang 
12287a50745SVincent Yang 	irq = platform_get_irq(pdev, 0);
12387a50745SVincent Yang 	if (irq < 0) {
12487a50745SVincent Yang 		dev_err(dev, "%s: no irq specified\n", __func__);
12587a50745SVincent Yang 		return irq;
12687a50745SVincent Yang 	}
12787a50745SVincent Yang 
1282dbf1dc3SAxel Lin 	host = sdhci_alloc_host(dev, sizeof(struct f_sdhost_priv));
12987a50745SVincent Yang 	if (IS_ERR(host))
13087a50745SVincent Yang 		return PTR_ERR(host);
13187a50745SVincent Yang 
13287a50745SVincent Yang 	priv = sdhci_priv(host);
13387a50745SVincent Yang 	priv->dev = dev;
13487a50745SVincent Yang 
13587a50745SVincent Yang 	host->quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC |
13687a50745SVincent Yang 		       SDHCI_QUIRK_INVERTED_WRITE_PROTECT;
13787a50745SVincent Yang 	host->quirks2 = SDHCI_QUIRK2_SUPPORT_SINGLE |
13887a50745SVincent Yang 			SDHCI_QUIRK2_TUNING_WORK_AROUND;
13987a50745SVincent Yang 
14006641e8dSArd Biesheuvel 	priv->enable_cmd_dat_delay = device_property_read_bool(dev,
14106641e8dSArd Biesheuvel 						"fujitsu,cmd-dat-delay-select");
14206641e8dSArd Biesheuvel 
14387a50745SVincent Yang 	ret = mmc_of_parse(host->mmc);
14487a50745SVincent Yang 	if (ret)
14587a50745SVincent Yang 		goto err;
14687a50745SVincent Yang 
14787a50745SVincent Yang 	platform_set_drvdata(pdev, host);
14887a50745SVincent Yang 
14987a50745SVincent Yang 	sdhci_get_of_property(pdev);
15087a50745SVincent Yang 	host->hw_name = "f_sdh30";
15187a50745SVincent Yang 	host->ops = &sdhci_f_sdh30_ops;
15287a50745SVincent Yang 	host->irq = irq;
15387a50745SVincent Yang 
15487a50745SVincent Yang 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
15587a50745SVincent Yang 	host->ioaddr = devm_ioremap_resource(&pdev->dev, res);
15687a50745SVincent Yang 	if (IS_ERR(host->ioaddr)) {
1573e7cf902SWu Fengguang 		ret = PTR_ERR(host->ioaddr);
15887a50745SVincent Yang 		goto err;
15987a50745SVincent Yang 	}
16087a50745SVincent Yang 
16187a50745SVincent Yang 	priv->clk_iface = devm_clk_get(&pdev->dev, "iface");
16287a50745SVincent Yang 	if (IS_ERR(priv->clk_iface)) {
16387a50745SVincent Yang 		ret = PTR_ERR(priv->clk_iface);
16487a50745SVincent Yang 		goto err;
16587a50745SVincent Yang 	}
16687a50745SVincent Yang 
16787a50745SVincent Yang 	ret = clk_prepare_enable(priv->clk_iface);
16887a50745SVincent Yang 	if (ret)
16987a50745SVincent Yang 		goto err;
17087a50745SVincent Yang 
17187a50745SVincent Yang 	priv->clk = devm_clk_get(&pdev->dev, "core");
17287a50745SVincent Yang 	if (IS_ERR(priv->clk)) {
17387a50745SVincent Yang 		ret = PTR_ERR(priv->clk);
17487a50745SVincent Yang 		goto err_clk;
17587a50745SVincent Yang 	}
17687a50745SVincent Yang 
17787a50745SVincent Yang 	ret = clk_prepare_enable(priv->clk);
17887a50745SVincent Yang 	if (ret)
17987a50745SVincent Yang 		goto err_clk;
18087a50745SVincent Yang 
18187a50745SVincent Yang 	/* init vendor specific regs */
18287a50745SVincent Yang 	ctrl = sdhci_readw(host, F_SDH30_AHB_CONFIG);
18387a50745SVincent Yang 	ctrl |= F_SDH30_SIN | F_SDH30_AHB_INCR_16 | F_SDH30_AHB_INCR_8 |
18487a50745SVincent Yang 		F_SDH30_AHB_INCR_4;
18587a50745SVincent Yang 	ctrl &= ~(F_SDH30_AHB_BIGED | F_SDH30_BUSLOCK_EN);
18687a50745SVincent Yang 	sdhci_writew(host, ctrl, F_SDH30_AHB_CONFIG);
18787a50745SVincent Yang 
18887a50745SVincent Yang 	reg = sdhci_readl(host, F_SDH30_ESD_CONTROL);
18987a50745SVincent Yang 	sdhci_writel(host, reg & ~F_SDH30_EMMC_RST, F_SDH30_ESD_CONTROL);
19087a50745SVincent Yang 	msleep(20);
19187a50745SVincent Yang 	sdhci_writel(host, reg | F_SDH30_EMMC_RST, F_SDH30_ESD_CONTROL);
19287a50745SVincent Yang 
19387a50745SVincent Yang 	reg = sdhci_readl(host, SDHCI_CAPABILITIES);
19487a50745SVincent Yang 	if (reg & SDHCI_CAN_DO_8BIT)
19587a50745SVincent Yang 		priv->vendor_hs200 = F_SDH30_EMMC_HS200;
19687a50745SVincent Yang 
19787a50745SVincent Yang 	ret = sdhci_add_host(host);
19887a50745SVincent Yang 	if (ret)
19987a50745SVincent Yang 		goto err_add_host;
20087a50745SVincent Yang 
20187a50745SVincent Yang 	return 0;
20287a50745SVincent Yang 
20387a50745SVincent Yang err_add_host:
20487a50745SVincent Yang 	clk_disable_unprepare(priv->clk);
20587a50745SVincent Yang err_clk:
20687a50745SVincent Yang 	clk_disable_unprepare(priv->clk_iface);
20787a50745SVincent Yang err:
20887a50745SVincent Yang 	sdhci_free_host(host);
20987a50745SVincent Yang 	return ret;
21087a50745SVincent Yang }
21187a50745SVincent Yang 
21287a50745SVincent Yang static int sdhci_f_sdh30_remove(struct platform_device *pdev)
21387a50745SVincent Yang {
21487a50745SVincent Yang 	struct sdhci_host *host = platform_get_drvdata(pdev);
21587a50745SVincent Yang 	struct f_sdhost_priv *priv = sdhci_priv(host);
21687a50745SVincent Yang 
21787a50745SVincent Yang 	sdhci_remove_host(host, readl(host->ioaddr + SDHCI_INT_STATUS) ==
21887a50745SVincent Yang 			  0xffffffff);
21987a50745SVincent Yang 
22087a50745SVincent Yang 	clk_disable_unprepare(priv->clk_iface);
22187a50745SVincent Yang 	clk_disable_unprepare(priv->clk);
22287a50745SVincent Yang 
22387a50745SVincent Yang 	sdhci_free_host(host);
22487a50745SVincent Yang 	platform_set_drvdata(pdev, NULL);
22587a50745SVincent Yang 
22687a50745SVincent Yang 	return 0;
22787a50745SVincent Yang }
22887a50745SVincent Yang 
22987a50745SVincent Yang static const struct of_device_id f_sdh30_dt_ids[] = {
23087a50745SVincent Yang 	{ .compatible = "fujitsu,mb86s70-sdhci-3.0" },
23187a50745SVincent Yang 	{ /* sentinel */ }
23287a50745SVincent Yang };
23387a50745SVincent Yang MODULE_DEVICE_TABLE(of, f_sdh30_dt_ids);
23487a50745SVincent Yang 
23587a50745SVincent Yang static struct platform_driver sdhci_f_sdh30_driver = {
23687a50745SVincent Yang 	.driver = {
23787a50745SVincent Yang 		.name = "f_sdh30",
23887a50745SVincent Yang 		.of_match_table = f_sdh30_dt_ids,
239fa243f64SUlf Hansson 		.pm	= &sdhci_pltfm_pmops,
24087a50745SVincent Yang 	},
24187a50745SVincent Yang 	.probe	= sdhci_f_sdh30_probe,
24287a50745SVincent Yang 	.remove	= sdhci_f_sdh30_remove,
24387a50745SVincent Yang };
24487a50745SVincent Yang 
24587a50745SVincent Yang module_platform_driver(sdhci_f_sdh30_driver);
24687a50745SVincent Yang 
24787a50745SVincent Yang MODULE_DESCRIPTION("F_SDH30 SD Card Controller driver");
24887a50745SVincent Yang MODULE_LICENSE("GPL v2");
24987a50745SVincent Yang MODULE_AUTHOR("FUJITSU SEMICONDUCTOR LTD.");
25087a50745SVincent Yang MODULE_ALIAS("platform:f_sdh30");
251