11c6a0718SPierre Ossman /* 270f10482SPierre Ossman * linux/drivers/mmc/host/sdhci.c - Secure Digital Host Controller Interface driver 31c6a0718SPierre Ossman * 4b69c9058SPierre Ossman * Copyright (C) 2005-2008 Pierre Ossman, All Rights Reserved. 51c6a0718SPierre Ossman * 61c6a0718SPierre Ossman * This program is free software; you can redistribute it and/or modify 71c6a0718SPierre Ossman * it under the terms of the GNU General Public License as published by 81c6a0718SPierre Ossman * the Free Software Foundation; either version 2 of the License, or (at 91c6a0718SPierre Ossman * your option) any later version. 1084c46a53SPierre Ossman * 1184c46a53SPierre Ossman * Thanks to the following companies for their support: 1284c46a53SPierre Ossman * 1384c46a53SPierre Ossman * - JMicron (hardware and technical support) 141c6a0718SPierre Ossman */ 151c6a0718SPierre Ossman 161c6a0718SPierre Ossman #include <linux/delay.h> 171c6a0718SPierre Ossman #include <linux/highmem.h> 18b8c86fc5SPierre Ossman #include <linux/io.h> 191c6a0718SPierre Ossman #include <linux/dma-mapping.h> 205a0e3ad6STejun Heo #include <linux/slab.h> 2111763609SRalf Baechle #include <linux/scatterlist.h> 221c6a0718SPierre Ossman 232f730fecSPierre Ossman #include <linux/leds.h> 242f730fecSPierre Ossman 251c6a0718SPierre Ossman #include <linux/mmc/host.h> 261c6a0718SPierre Ossman 271c6a0718SPierre Ossman #include "sdhci.h" 281c6a0718SPierre Ossman 291c6a0718SPierre Ossman #define DRIVER_NAME "sdhci" 301c6a0718SPierre Ossman 311c6a0718SPierre Ossman #define DBG(f, x...) \ 321c6a0718SPierre Ossman pr_debug(DRIVER_NAME " [%s()]: " f, __func__,## x) 331c6a0718SPierre Ossman 34f9134319SPierre Ossman #if defined(CONFIG_LEDS_CLASS) || (defined(CONFIG_LEDS_CLASS_MODULE) && \ 35f9134319SPierre Ossman defined(CONFIG_MMC_SDHCI_MODULE)) 36f9134319SPierre Ossman #define SDHCI_USE_LEDS_CLASS 37f9134319SPierre Ossman #endif 38f9134319SPierre Ossman 391c6a0718SPierre Ossman static unsigned int debug_quirks = 0; 401c6a0718SPierre Ossman 411c6a0718SPierre Ossman static void sdhci_prepare_data(struct sdhci_host *, struct mmc_data *); 421c6a0718SPierre Ossman static void sdhci_finish_data(struct sdhci_host *); 431c6a0718SPierre Ossman 441c6a0718SPierre Ossman static void sdhci_send_command(struct sdhci_host *, struct mmc_command *); 451c6a0718SPierre Ossman static void sdhci_finish_command(struct sdhci_host *); 461c6a0718SPierre Ossman 471c6a0718SPierre Ossman static void sdhci_dumpregs(struct sdhci_host *host) 481c6a0718SPierre Ossman { 491c6a0718SPierre Ossman printk(KERN_DEBUG DRIVER_NAME ": ============== REGISTER DUMP ==============\n"); 501c6a0718SPierre Ossman 511c6a0718SPierre Ossman printk(KERN_DEBUG DRIVER_NAME ": Sys addr: 0x%08x | Version: 0x%08x\n", 524e4141a5SAnton Vorontsov sdhci_readl(host, SDHCI_DMA_ADDRESS), 534e4141a5SAnton Vorontsov sdhci_readw(host, SDHCI_HOST_VERSION)); 541c6a0718SPierre Ossman printk(KERN_DEBUG DRIVER_NAME ": Blk size: 0x%08x | Blk cnt: 0x%08x\n", 554e4141a5SAnton Vorontsov sdhci_readw(host, SDHCI_BLOCK_SIZE), 564e4141a5SAnton Vorontsov sdhci_readw(host, SDHCI_BLOCK_COUNT)); 571c6a0718SPierre Ossman printk(KERN_DEBUG DRIVER_NAME ": Argument: 0x%08x | Trn mode: 0x%08x\n", 584e4141a5SAnton Vorontsov sdhci_readl(host, SDHCI_ARGUMENT), 594e4141a5SAnton Vorontsov sdhci_readw(host, SDHCI_TRANSFER_MODE)); 601c6a0718SPierre Ossman printk(KERN_DEBUG DRIVER_NAME ": Present: 0x%08x | Host ctl: 0x%08x\n", 614e4141a5SAnton Vorontsov sdhci_readl(host, SDHCI_PRESENT_STATE), 624e4141a5SAnton Vorontsov sdhci_readb(host, SDHCI_HOST_CONTROL)); 631c6a0718SPierre Ossman printk(KERN_DEBUG DRIVER_NAME ": Power: 0x%08x | Blk gap: 0x%08x\n", 644e4141a5SAnton Vorontsov sdhci_readb(host, SDHCI_POWER_CONTROL), 654e4141a5SAnton Vorontsov sdhci_readb(host, SDHCI_BLOCK_GAP_CONTROL)); 661c6a0718SPierre Ossman printk(KERN_DEBUG DRIVER_NAME ": Wake-up: 0x%08x | Clock: 0x%08x\n", 674e4141a5SAnton Vorontsov sdhci_readb(host, SDHCI_WAKE_UP_CONTROL), 684e4141a5SAnton Vorontsov sdhci_readw(host, SDHCI_CLOCK_CONTROL)); 691c6a0718SPierre Ossman printk(KERN_DEBUG DRIVER_NAME ": Timeout: 0x%08x | Int stat: 0x%08x\n", 704e4141a5SAnton Vorontsov sdhci_readb(host, SDHCI_TIMEOUT_CONTROL), 714e4141a5SAnton Vorontsov sdhci_readl(host, SDHCI_INT_STATUS)); 721c6a0718SPierre Ossman printk(KERN_DEBUG DRIVER_NAME ": Int enab: 0x%08x | Sig enab: 0x%08x\n", 734e4141a5SAnton Vorontsov sdhci_readl(host, SDHCI_INT_ENABLE), 744e4141a5SAnton Vorontsov sdhci_readl(host, SDHCI_SIGNAL_ENABLE)); 751c6a0718SPierre Ossman printk(KERN_DEBUG DRIVER_NAME ": AC12 err: 0x%08x | Slot int: 0x%08x\n", 764e4141a5SAnton Vorontsov sdhci_readw(host, SDHCI_ACMD12_ERR), 774e4141a5SAnton Vorontsov sdhci_readw(host, SDHCI_SLOT_INT_STATUS)); 781c6a0718SPierre Ossman printk(KERN_DEBUG DRIVER_NAME ": Caps: 0x%08x | Max curr: 0x%08x\n", 794e4141a5SAnton Vorontsov sdhci_readl(host, SDHCI_CAPABILITIES), 804e4141a5SAnton Vorontsov sdhci_readl(host, SDHCI_MAX_CURRENT)); 811c6a0718SPierre Ossman 82be3f4ae0SBen Dooks if (host->flags & SDHCI_USE_ADMA) 83be3f4ae0SBen Dooks printk(KERN_DEBUG DRIVER_NAME ": ADMA Err: 0x%08x | ADMA Ptr: 0x%08x\n", 84be3f4ae0SBen Dooks readl(host->ioaddr + SDHCI_ADMA_ERROR), 85be3f4ae0SBen Dooks readl(host->ioaddr + SDHCI_ADMA_ADDRESS)); 86be3f4ae0SBen Dooks 871c6a0718SPierre Ossman printk(KERN_DEBUG DRIVER_NAME ": ===========================================\n"); 881c6a0718SPierre Ossman } 891c6a0718SPierre Ossman 901c6a0718SPierre Ossman /*****************************************************************************\ 911c6a0718SPierre Ossman * * 921c6a0718SPierre Ossman * Low level functions * 931c6a0718SPierre Ossman * * 941c6a0718SPierre Ossman \*****************************************************************************/ 951c6a0718SPierre Ossman 967260cf5eSAnton Vorontsov static void sdhci_clear_set_irqs(struct sdhci_host *host, u32 clear, u32 set) 977260cf5eSAnton Vorontsov { 987260cf5eSAnton Vorontsov u32 ier; 997260cf5eSAnton Vorontsov 1007260cf5eSAnton Vorontsov ier = sdhci_readl(host, SDHCI_INT_ENABLE); 1017260cf5eSAnton Vorontsov ier &= ~clear; 1027260cf5eSAnton Vorontsov ier |= set; 1037260cf5eSAnton Vorontsov sdhci_writel(host, ier, SDHCI_INT_ENABLE); 1047260cf5eSAnton Vorontsov sdhci_writel(host, ier, SDHCI_SIGNAL_ENABLE); 1057260cf5eSAnton Vorontsov } 1067260cf5eSAnton Vorontsov 1077260cf5eSAnton Vorontsov static void sdhci_unmask_irqs(struct sdhci_host *host, u32 irqs) 1087260cf5eSAnton Vorontsov { 1097260cf5eSAnton Vorontsov sdhci_clear_set_irqs(host, 0, irqs); 1107260cf5eSAnton Vorontsov } 1117260cf5eSAnton Vorontsov 1127260cf5eSAnton Vorontsov static void sdhci_mask_irqs(struct sdhci_host *host, u32 irqs) 1137260cf5eSAnton Vorontsov { 1147260cf5eSAnton Vorontsov sdhci_clear_set_irqs(host, irqs, 0); 1157260cf5eSAnton Vorontsov } 1167260cf5eSAnton Vorontsov 1177260cf5eSAnton Vorontsov static void sdhci_set_card_detection(struct sdhci_host *host, bool enable) 1187260cf5eSAnton Vorontsov { 1197260cf5eSAnton Vorontsov u32 irqs = SDHCI_INT_CARD_REMOVE | SDHCI_INT_CARD_INSERT; 1207260cf5eSAnton Vorontsov 12168d1fb7eSAnton Vorontsov if (host->quirks & SDHCI_QUIRK_BROKEN_CARD_DETECTION) 12268d1fb7eSAnton Vorontsov return; 12368d1fb7eSAnton Vorontsov 1247260cf5eSAnton Vorontsov if (enable) 1257260cf5eSAnton Vorontsov sdhci_unmask_irqs(host, irqs); 1267260cf5eSAnton Vorontsov else 1277260cf5eSAnton Vorontsov sdhci_mask_irqs(host, irqs); 1287260cf5eSAnton Vorontsov } 1297260cf5eSAnton Vorontsov 1307260cf5eSAnton Vorontsov static void sdhci_enable_card_detection(struct sdhci_host *host) 1317260cf5eSAnton Vorontsov { 1327260cf5eSAnton Vorontsov sdhci_set_card_detection(host, true); 1337260cf5eSAnton Vorontsov } 1347260cf5eSAnton Vorontsov 1357260cf5eSAnton Vorontsov static void sdhci_disable_card_detection(struct sdhci_host *host) 1367260cf5eSAnton Vorontsov { 1377260cf5eSAnton Vorontsov sdhci_set_card_detection(host, false); 1387260cf5eSAnton Vorontsov } 1397260cf5eSAnton Vorontsov 1401c6a0718SPierre Ossman static void sdhci_reset(struct sdhci_host *host, u8 mask) 1411c6a0718SPierre Ossman { 1421c6a0718SPierre Ossman unsigned long timeout; 143063a9dbbSAnton Vorontsov u32 uninitialized_var(ier); 1441c6a0718SPierre Ossman 145b8c86fc5SPierre Ossman if (host->quirks & SDHCI_QUIRK_NO_CARD_NO_RESET) { 1464e4141a5SAnton Vorontsov if (!(sdhci_readl(host, SDHCI_PRESENT_STATE) & 1471c6a0718SPierre Ossman SDHCI_CARD_PRESENT)) 1481c6a0718SPierre Ossman return; 1491c6a0718SPierre Ossman } 1501c6a0718SPierre Ossman 151063a9dbbSAnton Vorontsov if (host->quirks & SDHCI_QUIRK_RESTORE_IRQS_AFTER_RESET) 152063a9dbbSAnton Vorontsov ier = sdhci_readl(host, SDHCI_INT_ENABLE); 153063a9dbbSAnton Vorontsov 1544e4141a5SAnton Vorontsov sdhci_writeb(host, mask, SDHCI_SOFTWARE_RESET); 1551c6a0718SPierre Ossman 1561c6a0718SPierre Ossman if (mask & SDHCI_RESET_ALL) 1571c6a0718SPierre Ossman host->clock = 0; 1581c6a0718SPierre Ossman 1591c6a0718SPierre Ossman /* Wait max 100 ms */ 1601c6a0718SPierre Ossman timeout = 100; 1611c6a0718SPierre Ossman 1621c6a0718SPierre Ossman /* hw clears the bit when it's done */ 1634e4141a5SAnton Vorontsov while (sdhci_readb(host, SDHCI_SOFTWARE_RESET) & mask) { 1641c6a0718SPierre Ossman if (timeout == 0) { 1651c6a0718SPierre Ossman printk(KERN_ERR "%s: Reset 0x%x never completed.\n", 1661c6a0718SPierre Ossman mmc_hostname(host->mmc), (int)mask); 1671c6a0718SPierre Ossman sdhci_dumpregs(host); 1681c6a0718SPierre Ossman return; 1691c6a0718SPierre Ossman } 1701c6a0718SPierre Ossman timeout--; 1711c6a0718SPierre Ossman mdelay(1); 1721c6a0718SPierre Ossman } 173063a9dbbSAnton Vorontsov 174063a9dbbSAnton Vorontsov if (host->quirks & SDHCI_QUIRK_RESTORE_IRQS_AFTER_RESET) 175063a9dbbSAnton Vorontsov sdhci_clear_set_irqs(host, SDHCI_INT_ALL_MASK, ier); 1761c6a0718SPierre Ossman } 1771c6a0718SPierre Ossman 1782f4cbb3dSNicolas Pitre static void sdhci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios); 1792f4cbb3dSNicolas Pitre 1802f4cbb3dSNicolas Pitre static void sdhci_init(struct sdhci_host *host, int soft) 1811c6a0718SPierre Ossman { 1822f4cbb3dSNicolas Pitre if (soft) 1832f4cbb3dSNicolas Pitre sdhci_reset(host, SDHCI_RESET_CMD|SDHCI_RESET_DATA); 1842f4cbb3dSNicolas Pitre else 1851c6a0718SPierre Ossman sdhci_reset(host, SDHCI_RESET_ALL); 1861c6a0718SPierre Ossman 1877260cf5eSAnton Vorontsov sdhci_clear_set_irqs(host, SDHCI_INT_ALL_MASK, 1887260cf5eSAnton Vorontsov SDHCI_INT_BUS_POWER | SDHCI_INT_DATA_END_BIT | 1891c6a0718SPierre Ossman SDHCI_INT_DATA_CRC | SDHCI_INT_DATA_TIMEOUT | SDHCI_INT_INDEX | 1901c6a0718SPierre Ossman SDHCI_INT_END_BIT | SDHCI_INT_CRC | SDHCI_INT_TIMEOUT | 1916aa943abSAnton Vorontsov SDHCI_INT_DATA_END | SDHCI_INT_RESPONSE); 1922f4cbb3dSNicolas Pitre 1932f4cbb3dSNicolas Pitre if (soft) { 1942f4cbb3dSNicolas Pitre /* force clock reconfiguration */ 1952f4cbb3dSNicolas Pitre host->clock = 0; 1962f4cbb3dSNicolas Pitre sdhci_set_ios(host->mmc, &host->mmc->ios); 1972f4cbb3dSNicolas Pitre } 1987260cf5eSAnton Vorontsov } 1991c6a0718SPierre Ossman 2007260cf5eSAnton Vorontsov static void sdhci_reinit(struct sdhci_host *host) 2017260cf5eSAnton Vorontsov { 2022f4cbb3dSNicolas Pitre sdhci_init(host, 0); 2037260cf5eSAnton Vorontsov sdhci_enable_card_detection(host); 2041c6a0718SPierre Ossman } 2051c6a0718SPierre Ossman 2061c6a0718SPierre Ossman static void sdhci_activate_led(struct sdhci_host *host) 2071c6a0718SPierre Ossman { 2081c6a0718SPierre Ossman u8 ctrl; 2091c6a0718SPierre Ossman 2104e4141a5SAnton Vorontsov ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL); 2111c6a0718SPierre Ossman ctrl |= SDHCI_CTRL_LED; 2124e4141a5SAnton Vorontsov sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL); 2131c6a0718SPierre Ossman } 2141c6a0718SPierre Ossman 2151c6a0718SPierre Ossman static void sdhci_deactivate_led(struct sdhci_host *host) 2161c6a0718SPierre Ossman { 2171c6a0718SPierre Ossman u8 ctrl; 2181c6a0718SPierre Ossman 2194e4141a5SAnton Vorontsov ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL); 2201c6a0718SPierre Ossman ctrl &= ~SDHCI_CTRL_LED; 2214e4141a5SAnton Vorontsov sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL); 2221c6a0718SPierre Ossman } 2231c6a0718SPierre Ossman 224f9134319SPierre Ossman #ifdef SDHCI_USE_LEDS_CLASS 2252f730fecSPierre Ossman static void sdhci_led_control(struct led_classdev *led, 2262f730fecSPierre Ossman enum led_brightness brightness) 2272f730fecSPierre Ossman { 2282f730fecSPierre Ossman struct sdhci_host *host = container_of(led, struct sdhci_host, led); 2292f730fecSPierre Ossman unsigned long flags; 2302f730fecSPierre Ossman 2312f730fecSPierre Ossman spin_lock_irqsave(&host->lock, flags); 2322f730fecSPierre Ossman 2332f730fecSPierre Ossman if (brightness == LED_OFF) 2342f730fecSPierre Ossman sdhci_deactivate_led(host); 2352f730fecSPierre Ossman else 2362f730fecSPierre Ossman sdhci_activate_led(host); 2372f730fecSPierre Ossman 2382f730fecSPierre Ossman spin_unlock_irqrestore(&host->lock, flags); 2392f730fecSPierre Ossman } 2402f730fecSPierre Ossman #endif 2412f730fecSPierre Ossman 2421c6a0718SPierre Ossman /*****************************************************************************\ 2431c6a0718SPierre Ossman * * 2441c6a0718SPierre Ossman * Core functions * 2451c6a0718SPierre Ossman * * 2461c6a0718SPierre Ossman \*****************************************************************************/ 2471c6a0718SPierre Ossman 2481c6a0718SPierre Ossman static void sdhci_read_block_pio(struct sdhci_host *host) 2491c6a0718SPierre Ossman { 2507659150cSPierre Ossman unsigned long flags; 2517659150cSPierre Ossman size_t blksize, len, chunk; 2527244b85bSSteven Noonan u32 uninitialized_var(scratch); 2537659150cSPierre Ossman u8 *buf; 2541c6a0718SPierre Ossman 2551c6a0718SPierre Ossman DBG("PIO reading\n"); 2561c6a0718SPierre Ossman 2571c6a0718SPierre Ossman blksize = host->data->blksz; 2587659150cSPierre Ossman chunk = 0; 2591c6a0718SPierre Ossman 2607659150cSPierre Ossman local_irq_save(flags); 2611c6a0718SPierre Ossman 2621c6a0718SPierre Ossman while (blksize) { 2637659150cSPierre Ossman if (!sg_miter_next(&host->sg_miter)) 2647659150cSPierre Ossman BUG(); 2657659150cSPierre Ossman 2667659150cSPierre Ossman len = min(host->sg_miter.length, blksize); 2677659150cSPierre Ossman 2687659150cSPierre Ossman blksize -= len; 2697659150cSPierre Ossman host->sg_miter.consumed = len; 2707659150cSPierre Ossman 2717659150cSPierre Ossman buf = host->sg_miter.addr; 2727659150cSPierre Ossman 2737659150cSPierre Ossman while (len) { 2747659150cSPierre Ossman if (chunk == 0) { 2754e4141a5SAnton Vorontsov scratch = sdhci_readl(host, SDHCI_BUFFER); 2767659150cSPierre Ossman chunk = 4; 2771c6a0718SPierre Ossman } 2781c6a0718SPierre Ossman 2797659150cSPierre Ossman *buf = scratch & 0xFF; 2801c6a0718SPierre Ossman 2817659150cSPierre Ossman buf++; 2827659150cSPierre Ossman scratch >>= 8; 2837659150cSPierre Ossman chunk--; 2847659150cSPierre Ossman len--; 2857659150cSPierre Ossman } 2861c6a0718SPierre Ossman } 2871c6a0718SPierre Ossman 2887659150cSPierre Ossman sg_miter_stop(&host->sg_miter); 2897659150cSPierre Ossman 2907659150cSPierre Ossman local_irq_restore(flags); 2911c6a0718SPierre Ossman } 2921c6a0718SPierre Ossman 2931c6a0718SPierre Ossman static void sdhci_write_block_pio(struct sdhci_host *host) 2941c6a0718SPierre Ossman { 2957659150cSPierre Ossman unsigned long flags; 2967659150cSPierre Ossman size_t blksize, len, chunk; 2977659150cSPierre Ossman u32 scratch; 2987659150cSPierre Ossman u8 *buf; 2991c6a0718SPierre Ossman 3001c6a0718SPierre Ossman DBG("PIO writing\n"); 3011c6a0718SPierre Ossman 3021c6a0718SPierre Ossman blksize = host->data->blksz; 3037659150cSPierre Ossman chunk = 0; 3047659150cSPierre Ossman scratch = 0; 3051c6a0718SPierre Ossman 3067659150cSPierre Ossman local_irq_save(flags); 3071c6a0718SPierre Ossman 3081c6a0718SPierre Ossman while (blksize) { 3097659150cSPierre Ossman if (!sg_miter_next(&host->sg_miter)) 3107659150cSPierre Ossman BUG(); 3111c6a0718SPierre Ossman 3127659150cSPierre Ossman len = min(host->sg_miter.length, blksize); 3131c6a0718SPierre Ossman 3147659150cSPierre Ossman blksize -= len; 3157659150cSPierre Ossman host->sg_miter.consumed = len; 3167659150cSPierre Ossman 3177659150cSPierre Ossman buf = host->sg_miter.addr; 3187659150cSPierre Ossman 3197659150cSPierre Ossman while (len) { 3207659150cSPierre Ossman scratch |= (u32)*buf << (chunk * 8); 3217659150cSPierre Ossman 3227659150cSPierre Ossman buf++; 3237659150cSPierre Ossman chunk++; 3247659150cSPierre Ossman len--; 3257659150cSPierre Ossman 3267659150cSPierre Ossman if ((chunk == 4) || ((len == 0) && (blksize == 0))) { 3274e4141a5SAnton Vorontsov sdhci_writel(host, scratch, SDHCI_BUFFER); 3287659150cSPierre Ossman chunk = 0; 3297659150cSPierre Ossman scratch = 0; 3307659150cSPierre Ossman } 3317659150cSPierre Ossman } 3321c6a0718SPierre Ossman } 3331c6a0718SPierre Ossman 3347659150cSPierre Ossman sg_miter_stop(&host->sg_miter); 3351c6a0718SPierre Ossman 3367659150cSPierre Ossman local_irq_restore(flags); 3371c6a0718SPierre Ossman } 3381c6a0718SPierre Ossman 3391c6a0718SPierre Ossman static void sdhci_transfer_pio(struct sdhci_host *host) 3401c6a0718SPierre Ossman { 3411c6a0718SPierre Ossman u32 mask; 3421c6a0718SPierre Ossman 3431c6a0718SPierre Ossman BUG_ON(!host->data); 3441c6a0718SPierre Ossman 3457659150cSPierre Ossman if (host->blocks == 0) 3461c6a0718SPierre Ossman return; 3471c6a0718SPierre Ossman 3481c6a0718SPierre Ossman if (host->data->flags & MMC_DATA_READ) 3491c6a0718SPierre Ossman mask = SDHCI_DATA_AVAILABLE; 3501c6a0718SPierre Ossman else 3511c6a0718SPierre Ossman mask = SDHCI_SPACE_AVAILABLE; 3521c6a0718SPierre Ossman 3534a3cba32SPierre Ossman /* 3544a3cba32SPierre Ossman * Some controllers (JMicron JMB38x) mess up the buffer bits 3554a3cba32SPierre Ossman * for transfers < 4 bytes. As long as it is just one block, 3564a3cba32SPierre Ossman * we can ignore the bits. 3574a3cba32SPierre Ossman */ 3584a3cba32SPierre Ossman if ((host->quirks & SDHCI_QUIRK_BROKEN_SMALL_PIO) && 3594a3cba32SPierre Ossman (host->data->blocks == 1)) 3604a3cba32SPierre Ossman mask = ~0; 3614a3cba32SPierre Ossman 3624e4141a5SAnton Vorontsov while (sdhci_readl(host, SDHCI_PRESENT_STATE) & mask) { 3633e3bf207SAnton Vorontsov if (host->quirks & SDHCI_QUIRK_PIO_NEEDS_DELAY) 3643e3bf207SAnton Vorontsov udelay(100); 3653e3bf207SAnton Vorontsov 3661c6a0718SPierre Ossman if (host->data->flags & MMC_DATA_READ) 3671c6a0718SPierre Ossman sdhci_read_block_pio(host); 3681c6a0718SPierre Ossman else 3691c6a0718SPierre Ossman sdhci_write_block_pio(host); 3701c6a0718SPierre Ossman 3717659150cSPierre Ossman host->blocks--; 3727659150cSPierre Ossman if (host->blocks == 0) 3731c6a0718SPierre Ossman break; 3741c6a0718SPierre Ossman } 3751c6a0718SPierre Ossman 3761c6a0718SPierre Ossman DBG("PIO transfer complete.\n"); 3771c6a0718SPierre Ossman } 3781c6a0718SPierre Ossman 3792134a922SPierre Ossman static char *sdhci_kmap_atomic(struct scatterlist *sg, unsigned long *flags) 3802134a922SPierre Ossman { 3812134a922SPierre Ossman local_irq_save(*flags); 3822134a922SPierre Ossman return kmap_atomic(sg_page(sg), KM_BIO_SRC_IRQ) + sg->offset; 3832134a922SPierre Ossman } 3842134a922SPierre Ossman 3852134a922SPierre Ossman static void sdhci_kunmap_atomic(void *buffer, unsigned long *flags) 3862134a922SPierre Ossman { 3872134a922SPierre Ossman kunmap_atomic(buffer, KM_BIO_SRC_IRQ); 3882134a922SPierre Ossman local_irq_restore(*flags); 3892134a922SPierre Ossman } 3902134a922SPierre Ossman 391118cd17dSBen Dooks static void sdhci_set_adma_desc(u8 *desc, u32 addr, int len, unsigned cmd) 392118cd17dSBen Dooks { 3939e506f35SBen Dooks __le32 *dataddr = (__le32 __force *)(desc + 4); 3949e506f35SBen Dooks __le16 *cmdlen = (__le16 __force *)desc; 395118cd17dSBen Dooks 3969e506f35SBen Dooks /* SDHCI specification says ADMA descriptors should be 4 byte 3979e506f35SBen Dooks * aligned, so using 16 or 32bit operations should be safe. */ 398118cd17dSBen Dooks 3999e506f35SBen Dooks cmdlen[0] = cpu_to_le16(cmd); 4009e506f35SBen Dooks cmdlen[1] = cpu_to_le16(len); 4019e506f35SBen Dooks 4029e506f35SBen Dooks dataddr[0] = cpu_to_le32(addr); 403118cd17dSBen Dooks } 404118cd17dSBen Dooks 4058f1934ceSPierre Ossman static int sdhci_adma_table_pre(struct sdhci_host *host, 4062134a922SPierre Ossman struct mmc_data *data) 4072134a922SPierre Ossman { 4082134a922SPierre Ossman int direction; 4092134a922SPierre Ossman 4102134a922SPierre Ossman u8 *desc; 4112134a922SPierre Ossman u8 *align; 4122134a922SPierre Ossman dma_addr_t addr; 4132134a922SPierre Ossman dma_addr_t align_addr; 4142134a922SPierre Ossman int len, offset; 4152134a922SPierre Ossman 4162134a922SPierre Ossman struct scatterlist *sg; 4172134a922SPierre Ossman int i; 4182134a922SPierre Ossman char *buffer; 4192134a922SPierre Ossman unsigned long flags; 4202134a922SPierre Ossman 4212134a922SPierre Ossman /* 4222134a922SPierre Ossman * The spec does not specify endianness of descriptor table. 4232134a922SPierre Ossman * We currently guess that it is LE. 4242134a922SPierre Ossman */ 4252134a922SPierre Ossman 4262134a922SPierre Ossman if (data->flags & MMC_DATA_READ) 4272134a922SPierre Ossman direction = DMA_FROM_DEVICE; 4282134a922SPierre Ossman else 4292134a922SPierre Ossman direction = DMA_TO_DEVICE; 4302134a922SPierre Ossman 4312134a922SPierre Ossman /* 4322134a922SPierre Ossman * The ADMA descriptor table is mapped further down as we 4332134a922SPierre Ossman * need to fill it with data first. 4342134a922SPierre Ossman */ 4352134a922SPierre Ossman 4362134a922SPierre Ossman host->align_addr = dma_map_single(mmc_dev(host->mmc), 4372134a922SPierre Ossman host->align_buffer, 128 * 4, direction); 4388d8bb39bSFUJITA Tomonori if (dma_mapping_error(mmc_dev(host->mmc), host->align_addr)) 4398f1934ceSPierre Ossman goto fail; 4402134a922SPierre Ossman BUG_ON(host->align_addr & 0x3); 4412134a922SPierre Ossman 4422134a922SPierre Ossman host->sg_count = dma_map_sg(mmc_dev(host->mmc), 4432134a922SPierre Ossman data->sg, data->sg_len, direction); 4448f1934ceSPierre Ossman if (host->sg_count == 0) 4458f1934ceSPierre Ossman goto unmap_align; 4462134a922SPierre Ossman 4472134a922SPierre Ossman desc = host->adma_desc; 4482134a922SPierre Ossman align = host->align_buffer; 4492134a922SPierre Ossman 4502134a922SPierre Ossman align_addr = host->align_addr; 4512134a922SPierre Ossman 4522134a922SPierre Ossman for_each_sg(data->sg, sg, host->sg_count, i) { 4532134a922SPierre Ossman addr = sg_dma_address(sg); 4542134a922SPierre Ossman len = sg_dma_len(sg); 4552134a922SPierre Ossman 4562134a922SPierre Ossman /* 4572134a922SPierre Ossman * The SDHCI specification states that ADMA 4582134a922SPierre Ossman * addresses must be 32-bit aligned. If they 4592134a922SPierre Ossman * aren't, then we use a bounce buffer for 4602134a922SPierre Ossman * the (up to three) bytes that screw up the 4612134a922SPierre Ossman * alignment. 4622134a922SPierre Ossman */ 4632134a922SPierre Ossman offset = (4 - (addr & 0x3)) & 0x3; 4642134a922SPierre Ossman if (offset) { 4652134a922SPierre Ossman if (data->flags & MMC_DATA_WRITE) { 4662134a922SPierre Ossman buffer = sdhci_kmap_atomic(sg, &flags); 4676cefd05fSPierre Ossman WARN_ON(((long)buffer & PAGE_MASK) > (PAGE_SIZE - 3)); 4682134a922SPierre Ossman memcpy(align, buffer, offset); 4692134a922SPierre Ossman sdhci_kunmap_atomic(buffer, &flags); 4702134a922SPierre Ossman } 4712134a922SPierre Ossman 472118cd17dSBen Dooks /* tran, valid */ 473118cd17dSBen Dooks sdhci_set_adma_desc(desc, align_addr, offset, 0x21); 4742134a922SPierre Ossman 4752134a922SPierre Ossman BUG_ON(offset > 65536); 4762134a922SPierre Ossman 4772134a922SPierre Ossman align += 4; 4782134a922SPierre Ossman align_addr += 4; 4792134a922SPierre Ossman 4802134a922SPierre Ossman desc += 8; 4812134a922SPierre Ossman 4822134a922SPierre Ossman addr += offset; 4832134a922SPierre Ossman len -= offset; 4842134a922SPierre Ossman } 4852134a922SPierre Ossman 4862134a922SPierre Ossman BUG_ON(len > 65536); 4872134a922SPierre Ossman 488118cd17dSBen Dooks /* tran, valid */ 489118cd17dSBen Dooks sdhci_set_adma_desc(desc, addr, len, 0x21); 4902134a922SPierre Ossman desc += 8; 4912134a922SPierre Ossman 4922134a922SPierre Ossman /* 4932134a922SPierre Ossman * If this triggers then we have a calculation bug 4942134a922SPierre Ossman * somewhere. :/ 4952134a922SPierre Ossman */ 4962134a922SPierre Ossman WARN_ON((desc - host->adma_desc) > (128 * 2 + 1) * 4); 4972134a922SPierre Ossman } 4982134a922SPierre Ossman 4992134a922SPierre Ossman /* 5002134a922SPierre Ossman * Add a terminating entry. 5012134a922SPierre Ossman */ 5022134a922SPierre Ossman 503118cd17dSBen Dooks /* nop, end, valid */ 504118cd17dSBen Dooks sdhci_set_adma_desc(desc, 0, 0, 0x3); 5052134a922SPierre Ossman 5062134a922SPierre Ossman /* 5072134a922SPierre Ossman * Resync align buffer as we might have changed it. 5082134a922SPierre Ossman */ 5092134a922SPierre Ossman if (data->flags & MMC_DATA_WRITE) { 5102134a922SPierre Ossman dma_sync_single_for_device(mmc_dev(host->mmc), 5112134a922SPierre Ossman host->align_addr, 128 * 4, direction); 5122134a922SPierre Ossman } 5132134a922SPierre Ossman 5142134a922SPierre Ossman host->adma_addr = dma_map_single(mmc_dev(host->mmc), 5152134a922SPierre Ossman host->adma_desc, (128 * 2 + 1) * 4, DMA_TO_DEVICE); 516980167b7SPierre Ossman if (dma_mapping_error(mmc_dev(host->mmc), host->adma_addr)) 5178f1934ceSPierre Ossman goto unmap_entries; 5182134a922SPierre Ossman BUG_ON(host->adma_addr & 0x3); 5198f1934ceSPierre Ossman 5208f1934ceSPierre Ossman return 0; 5218f1934ceSPierre Ossman 5228f1934ceSPierre Ossman unmap_entries: 5238f1934ceSPierre Ossman dma_unmap_sg(mmc_dev(host->mmc), data->sg, 5248f1934ceSPierre Ossman data->sg_len, direction); 5258f1934ceSPierre Ossman unmap_align: 5268f1934ceSPierre Ossman dma_unmap_single(mmc_dev(host->mmc), host->align_addr, 5278f1934ceSPierre Ossman 128 * 4, direction); 5288f1934ceSPierre Ossman fail: 5298f1934ceSPierre Ossman return -EINVAL; 5302134a922SPierre Ossman } 5312134a922SPierre Ossman 5322134a922SPierre Ossman static void sdhci_adma_table_post(struct sdhci_host *host, 5332134a922SPierre Ossman struct mmc_data *data) 5342134a922SPierre Ossman { 5352134a922SPierre Ossman int direction; 5362134a922SPierre Ossman 5372134a922SPierre Ossman struct scatterlist *sg; 5382134a922SPierre Ossman int i, size; 5392134a922SPierre Ossman u8 *align; 5402134a922SPierre Ossman char *buffer; 5412134a922SPierre Ossman unsigned long flags; 5422134a922SPierre Ossman 5432134a922SPierre Ossman if (data->flags & MMC_DATA_READ) 5442134a922SPierre Ossman direction = DMA_FROM_DEVICE; 5452134a922SPierre Ossman else 5462134a922SPierre Ossman direction = DMA_TO_DEVICE; 5472134a922SPierre Ossman 5482134a922SPierre Ossman dma_unmap_single(mmc_dev(host->mmc), host->adma_addr, 5492134a922SPierre Ossman (128 * 2 + 1) * 4, DMA_TO_DEVICE); 5502134a922SPierre Ossman 5512134a922SPierre Ossman dma_unmap_single(mmc_dev(host->mmc), host->align_addr, 5522134a922SPierre Ossman 128 * 4, direction); 5532134a922SPierre Ossman 5542134a922SPierre Ossman if (data->flags & MMC_DATA_READ) { 5552134a922SPierre Ossman dma_sync_sg_for_cpu(mmc_dev(host->mmc), data->sg, 5562134a922SPierre Ossman data->sg_len, direction); 5572134a922SPierre Ossman 5582134a922SPierre Ossman align = host->align_buffer; 5592134a922SPierre Ossman 5602134a922SPierre Ossman for_each_sg(data->sg, sg, host->sg_count, i) { 5612134a922SPierre Ossman if (sg_dma_address(sg) & 0x3) { 5622134a922SPierre Ossman size = 4 - (sg_dma_address(sg) & 0x3); 5632134a922SPierre Ossman 5642134a922SPierre Ossman buffer = sdhci_kmap_atomic(sg, &flags); 5656cefd05fSPierre Ossman WARN_ON(((long)buffer & PAGE_MASK) > (PAGE_SIZE - 3)); 5662134a922SPierre Ossman memcpy(buffer, align, size); 5672134a922SPierre Ossman sdhci_kunmap_atomic(buffer, &flags); 5682134a922SPierre Ossman 5692134a922SPierre Ossman align += 4; 5702134a922SPierre Ossman } 5712134a922SPierre Ossman } 5722134a922SPierre Ossman } 5732134a922SPierre Ossman 5742134a922SPierre Ossman dma_unmap_sg(mmc_dev(host->mmc), data->sg, 5752134a922SPierre Ossman data->sg_len, direction); 5762134a922SPierre Ossman } 5772134a922SPierre Ossman 578ee53ab5dSPierre Ossman static u8 sdhci_calc_timeout(struct sdhci_host *host, struct mmc_data *data) 5791c6a0718SPierre Ossman { 5801c6a0718SPierre Ossman u8 count; 5811c6a0718SPierre Ossman unsigned target_timeout, current_timeout; 5821c6a0718SPierre Ossman 583ee53ab5dSPierre Ossman /* 584ee53ab5dSPierre Ossman * If the host controller provides us with an incorrect timeout 585ee53ab5dSPierre Ossman * value, just skip the check and use 0xE. The hardware may take 586ee53ab5dSPierre Ossman * longer to time out, but that's much better than having a too-short 587ee53ab5dSPierre Ossman * timeout value. 588ee53ab5dSPierre Ossman */ 58911a2f1b7SPierre Ossman if (host->quirks & SDHCI_QUIRK_BROKEN_TIMEOUT_VAL) 590ee53ab5dSPierre Ossman return 0xE; 591e538fbe8SPierre Ossman 5921c6a0718SPierre Ossman /* timeout in us */ 5931c6a0718SPierre Ossman target_timeout = data->timeout_ns / 1000 + 5941c6a0718SPierre Ossman data->timeout_clks / host->clock; 5951c6a0718SPierre Ossman 59681b39802SAnton Vorontsov if (host->quirks & SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK) 59781b39802SAnton Vorontsov host->timeout_clk = host->clock / 1000; 59881b39802SAnton Vorontsov 5991c6a0718SPierre Ossman /* 6001c6a0718SPierre Ossman * Figure out needed cycles. 6011c6a0718SPierre Ossman * We do this in steps in order to fit inside a 32 bit int. 6021c6a0718SPierre Ossman * The first step is the minimum timeout, which will have a 6031c6a0718SPierre Ossman * minimum resolution of 6 bits: 6041c6a0718SPierre Ossman * (1) 2^13*1000 > 2^22, 6051c6a0718SPierre Ossman * (2) host->timeout_clk < 2^16 6061c6a0718SPierre Ossman * => 6071c6a0718SPierre Ossman * (1) / (2) > 2^6 6081c6a0718SPierre Ossman */ 6091c6a0718SPierre Ossman count = 0; 6101c6a0718SPierre Ossman current_timeout = (1 << 13) * 1000 / host->timeout_clk; 6111c6a0718SPierre Ossman while (current_timeout < target_timeout) { 6121c6a0718SPierre Ossman count++; 6131c6a0718SPierre Ossman current_timeout <<= 1; 6141c6a0718SPierre Ossman if (count >= 0xF) 6151c6a0718SPierre Ossman break; 6161c6a0718SPierre Ossman } 6171c6a0718SPierre Ossman 6181c6a0718SPierre Ossman if (count >= 0xF) { 6191c6a0718SPierre Ossman printk(KERN_WARNING "%s: Too large timeout requested!\n", 6201c6a0718SPierre Ossman mmc_hostname(host->mmc)); 6211c6a0718SPierre Ossman count = 0xE; 6221c6a0718SPierre Ossman } 6231c6a0718SPierre Ossman 624ee53ab5dSPierre Ossman return count; 625ee53ab5dSPierre Ossman } 626ee53ab5dSPierre Ossman 6276aa943abSAnton Vorontsov static void sdhci_set_transfer_irqs(struct sdhci_host *host) 6286aa943abSAnton Vorontsov { 6296aa943abSAnton Vorontsov u32 pio_irqs = SDHCI_INT_DATA_AVAIL | SDHCI_INT_SPACE_AVAIL; 6306aa943abSAnton Vorontsov u32 dma_irqs = SDHCI_INT_DMA_END | SDHCI_INT_ADMA_ERROR; 6316aa943abSAnton Vorontsov 6326aa943abSAnton Vorontsov if (host->flags & SDHCI_REQ_USE_DMA) 6336aa943abSAnton Vorontsov sdhci_clear_set_irqs(host, pio_irqs, dma_irqs); 6346aa943abSAnton Vorontsov else 6356aa943abSAnton Vorontsov sdhci_clear_set_irqs(host, dma_irqs, pio_irqs); 6366aa943abSAnton Vorontsov } 6376aa943abSAnton Vorontsov 638ee53ab5dSPierre Ossman static void sdhci_prepare_data(struct sdhci_host *host, struct mmc_data *data) 639ee53ab5dSPierre Ossman { 640ee53ab5dSPierre Ossman u8 count; 6412134a922SPierre Ossman u8 ctrl; 6428f1934ceSPierre Ossman int ret; 643ee53ab5dSPierre Ossman 644ee53ab5dSPierre Ossman WARN_ON(host->data); 645ee53ab5dSPierre Ossman 646ee53ab5dSPierre Ossman if (data == NULL) 647ee53ab5dSPierre Ossman return; 648ee53ab5dSPierre Ossman 649ee53ab5dSPierre Ossman /* Sanity checks */ 650ee53ab5dSPierre Ossman BUG_ON(data->blksz * data->blocks > 524288); 651ee53ab5dSPierre Ossman BUG_ON(data->blksz > host->mmc->max_blk_size); 652ee53ab5dSPierre Ossman BUG_ON(data->blocks > 65535); 653ee53ab5dSPierre Ossman 654ee53ab5dSPierre Ossman host->data = data; 655ee53ab5dSPierre Ossman host->data_early = 0; 656ee53ab5dSPierre Ossman 657ee53ab5dSPierre Ossman count = sdhci_calc_timeout(host, data); 6584e4141a5SAnton Vorontsov sdhci_writeb(host, count, SDHCI_TIMEOUT_CONTROL); 6591c6a0718SPierre Ossman 660a13abc7bSRichard Röjfors if (host->flags & (SDHCI_USE_SDMA | SDHCI_USE_ADMA)) 661c9fddbc4SPierre Ossman host->flags |= SDHCI_REQ_USE_DMA; 662c9fddbc4SPierre Ossman 6632134a922SPierre Ossman /* 6642134a922SPierre Ossman * FIXME: This doesn't account for merging when mapping the 6652134a922SPierre Ossman * scatterlist. 6662134a922SPierre Ossman */ 6672134a922SPierre Ossman if (host->flags & SDHCI_REQ_USE_DMA) { 6682134a922SPierre Ossman int broken, i; 6692134a922SPierre Ossman struct scatterlist *sg; 6702134a922SPierre Ossman 6712134a922SPierre Ossman broken = 0; 6722134a922SPierre Ossman if (host->flags & SDHCI_USE_ADMA) { 6732134a922SPierre Ossman if (host->quirks & SDHCI_QUIRK_32BIT_ADMA_SIZE) 6742134a922SPierre Ossman broken = 1; 6752134a922SPierre Ossman } else { 6762134a922SPierre Ossman if (host->quirks & SDHCI_QUIRK_32BIT_DMA_SIZE) 6772134a922SPierre Ossman broken = 1; 6782134a922SPierre Ossman } 6792134a922SPierre Ossman 6802134a922SPierre Ossman if (unlikely(broken)) { 6812134a922SPierre Ossman for_each_sg(data->sg, sg, data->sg_len, i) { 6822134a922SPierre Ossman if (sg->length & 0x3) { 6832134a922SPierre Ossman DBG("Reverting to PIO because of " 6842134a922SPierre Ossman "transfer size (%d)\n", 6852134a922SPierre Ossman sg->length); 686c9fddbc4SPierre Ossman host->flags &= ~SDHCI_REQ_USE_DMA; 6872134a922SPierre Ossman break; 6882134a922SPierre Ossman } 6892134a922SPierre Ossman } 6902134a922SPierre Ossman } 691c9fddbc4SPierre Ossman } 692c9fddbc4SPierre Ossman 693c9fddbc4SPierre Ossman /* 694c9fddbc4SPierre Ossman * The assumption here being that alignment is the same after 695c9fddbc4SPierre Ossman * translation to device address space. 696c9fddbc4SPierre Ossman */ 6972134a922SPierre Ossman if (host->flags & SDHCI_REQ_USE_DMA) { 6982134a922SPierre Ossman int broken, i; 6992134a922SPierre Ossman struct scatterlist *sg; 7002134a922SPierre Ossman 7012134a922SPierre Ossman broken = 0; 7022134a922SPierre Ossman if (host->flags & SDHCI_USE_ADMA) { 7032134a922SPierre Ossman /* 7042134a922SPierre Ossman * As we use 3 byte chunks to work around 7052134a922SPierre Ossman * alignment problems, we need to check this 7062134a922SPierre Ossman * quirk. 7072134a922SPierre Ossman */ 7082134a922SPierre Ossman if (host->quirks & SDHCI_QUIRK_32BIT_ADMA_SIZE) 7092134a922SPierre Ossman broken = 1; 7102134a922SPierre Ossman } else { 7112134a922SPierre Ossman if (host->quirks & SDHCI_QUIRK_32BIT_DMA_ADDR) 7122134a922SPierre Ossman broken = 1; 7132134a922SPierre Ossman } 7142134a922SPierre Ossman 7152134a922SPierre Ossman if (unlikely(broken)) { 7162134a922SPierre Ossman for_each_sg(data->sg, sg, data->sg_len, i) { 7172134a922SPierre Ossman if (sg->offset & 0x3) { 7182134a922SPierre Ossman DBG("Reverting to PIO because of " 7192134a922SPierre Ossman "bad alignment\n"); 720c9fddbc4SPierre Ossman host->flags &= ~SDHCI_REQ_USE_DMA; 7212134a922SPierre Ossman break; 7222134a922SPierre Ossman } 7232134a922SPierre Ossman } 7242134a922SPierre Ossman } 7252134a922SPierre Ossman } 7262134a922SPierre Ossman 7278f1934ceSPierre Ossman if (host->flags & SDHCI_REQ_USE_DMA) { 7288f1934ceSPierre Ossman if (host->flags & SDHCI_USE_ADMA) { 7298f1934ceSPierre Ossman ret = sdhci_adma_table_pre(host, data); 7308f1934ceSPierre Ossman if (ret) { 7318f1934ceSPierre Ossman /* 7328f1934ceSPierre Ossman * This only happens when someone fed 7338f1934ceSPierre Ossman * us an invalid request. 7348f1934ceSPierre Ossman */ 7358f1934ceSPierre Ossman WARN_ON(1); 736ebd6d357SPierre Ossman host->flags &= ~SDHCI_REQ_USE_DMA; 7378f1934ceSPierre Ossman } else { 7384e4141a5SAnton Vorontsov sdhci_writel(host, host->adma_addr, 7394e4141a5SAnton Vorontsov SDHCI_ADMA_ADDRESS); 7408f1934ceSPierre Ossman } 7418f1934ceSPierre Ossman } else { 742c8b3e02eSTomas Winkler int sg_cnt; 7438f1934ceSPierre Ossman 744c8b3e02eSTomas Winkler sg_cnt = dma_map_sg(mmc_dev(host->mmc), 7458f1934ceSPierre Ossman data->sg, data->sg_len, 7468f1934ceSPierre Ossman (data->flags & MMC_DATA_READ) ? 7478f1934ceSPierre Ossman DMA_FROM_DEVICE : 7488f1934ceSPierre Ossman DMA_TO_DEVICE); 749c8b3e02eSTomas Winkler if (sg_cnt == 0) { 7508f1934ceSPierre Ossman /* 7518f1934ceSPierre Ossman * This only happens when someone fed 7528f1934ceSPierre Ossman * us an invalid request. 7538f1934ceSPierre Ossman */ 7548f1934ceSPierre Ossman WARN_ON(1); 755ebd6d357SPierre Ossman host->flags &= ~SDHCI_REQ_USE_DMA; 7568f1934ceSPierre Ossman } else { 757719a61b4SPierre Ossman WARN_ON(sg_cnt != 1); 7584e4141a5SAnton Vorontsov sdhci_writel(host, sg_dma_address(data->sg), 7594e4141a5SAnton Vorontsov SDHCI_DMA_ADDRESS); 7608f1934ceSPierre Ossman } 7618f1934ceSPierre Ossman } 7628f1934ceSPierre Ossman } 7638f1934ceSPierre Ossman 7642134a922SPierre Ossman /* 7652134a922SPierre Ossman * Always adjust the DMA selection as some controllers 7662134a922SPierre Ossman * (e.g. JMicron) can't do PIO properly when the selection 7672134a922SPierre Ossman * is ADMA. 7682134a922SPierre Ossman */ 7692134a922SPierre Ossman if (host->version >= SDHCI_SPEC_200) { 7704e4141a5SAnton Vorontsov ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL); 7712134a922SPierre Ossman ctrl &= ~SDHCI_CTRL_DMA_MASK; 7722134a922SPierre Ossman if ((host->flags & SDHCI_REQ_USE_DMA) && 7732134a922SPierre Ossman (host->flags & SDHCI_USE_ADMA)) 7742134a922SPierre Ossman ctrl |= SDHCI_CTRL_ADMA32; 7752134a922SPierre Ossman else 7762134a922SPierre Ossman ctrl |= SDHCI_CTRL_SDMA; 7774e4141a5SAnton Vorontsov sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL); 778c9fddbc4SPierre Ossman } 779c9fddbc4SPierre Ossman 7808f1934ceSPierre Ossman if (!(host->flags & SDHCI_REQ_USE_DMA)) { 781da60a91dSSebastian Andrzej Siewior int flags; 782da60a91dSSebastian Andrzej Siewior 783da60a91dSSebastian Andrzej Siewior flags = SG_MITER_ATOMIC; 784da60a91dSSebastian Andrzej Siewior if (host->data->flags & MMC_DATA_READ) 785da60a91dSSebastian Andrzej Siewior flags |= SG_MITER_TO_SG; 786da60a91dSSebastian Andrzej Siewior else 787da60a91dSSebastian Andrzej Siewior flags |= SG_MITER_FROM_SG; 788da60a91dSSebastian Andrzej Siewior sg_miter_start(&host->sg_miter, data->sg, data->sg_len, flags); 7897659150cSPierre Ossman host->blocks = data->blocks; 7901c6a0718SPierre Ossman } 7911c6a0718SPierre Ossman 7926aa943abSAnton Vorontsov sdhci_set_transfer_irqs(host); 7936aa943abSAnton Vorontsov 7941c6a0718SPierre Ossman /* We do not handle DMA boundaries, so set it to max (512 KiB) */ 7954e4141a5SAnton Vorontsov sdhci_writew(host, SDHCI_MAKE_BLKSZ(7, data->blksz), SDHCI_BLOCK_SIZE); 7964e4141a5SAnton Vorontsov sdhci_writew(host, data->blocks, SDHCI_BLOCK_COUNT); 7971c6a0718SPierre Ossman } 7981c6a0718SPierre Ossman 7991c6a0718SPierre Ossman static void sdhci_set_transfer_mode(struct sdhci_host *host, 8001c6a0718SPierre Ossman struct mmc_data *data) 8011c6a0718SPierre Ossman { 8021c6a0718SPierre Ossman u16 mode; 8031c6a0718SPierre Ossman 8041c6a0718SPierre Ossman if (data == NULL) 8051c6a0718SPierre Ossman return; 8061c6a0718SPierre Ossman 807e538fbe8SPierre Ossman WARN_ON(!host->data); 808e538fbe8SPierre Ossman 8091c6a0718SPierre Ossman mode = SDHCI_TRNS_BLK_CNT_EN; 8101c6a0718SPierre Ossman if (data->blocks > 1) 8111c6a0718SPierre Ossman mode |= SDHCI_TRNS_MULTI; 8121c6a0718SPierre Ossman if (data->flags & MMC_DATA_READ) 8131c6a0718SPierre Ossman mode |= SDHCI_TRNS_READ; 814c9fddbc4SPierre Ossman if (host->flags & SDHCI_REQ_USE_DMA) 8151c6a0718SPierre Ossman mode |= SDHCI_TRNS_DMA; 8161c6a0718SPierre Ossman 8174e4141a5SAnton Vorontsov sdhci_writew(host, mode, SDHCI_TRANSFER_MODE); 8181c6a0718SPierre Ossman } 8191c6a0718SPierre Ossman 8201c6a0718SPierre Ossman static void sdhci_finish_data(struct sdhci_host *host) 8211c6a0718SPierre Ossman { 8221c6a0718SPierre Ossman struct mmc_data *data; 8231c6a0718SPierre Ossman 8241c6a0718SPierre Ossman BUG_ON(!host->data); 8251c6a0718SPierre Ossman 8261c6a0718SPierre Ossman data = host->data; 8271c6a0718SPierre Ossman host->data = NULL; 8281c6a0718SPierre Ossman 829c9fddbc4SPierre Ossman if (host->flags & SDHCI_REQ_USE_DMA) { 8302134a922SPierre Ossman if (host->flags & SDHCI_USE_ADMA) 8312134a922SPierre Ossman sdhci_adma_table_post(host, data); 8322134a922SPierre Ossman else { 8332134a922SPierre Ossman dma_unmap_sg(mmc_dev(host->mmc), data->sg, 8342134a922SPierre Ossman data->sg_len, (data->flags & MMC_DATA_READ) ? 835b8c86fc5SPierre Ossman DMA_FROM_DEVICE : DMA_TO_DEVICE); 8361c6a0718SPierre Ossman } 8372134a922SPierre Ossman } 8381c6a0718SPierre Ossman 8391c6a0718SPierre Ossman /* 840c9b74c5bSPierre Ossman * The specification states that the block count register must 841c9b74c5bSPierre Ossman * be updated, but it does not specify at what point in the 842c9b74c5bSPierre Ossman * data flow. That makes the register entirely useless to read 843c9b74c5bSPierre Ossman * back so we have to assume that nothing made it to the card 844c9b74c5bSPierre Ossman * in the event of an error. 8451c6a0718SPierre Ossman */ 846c9b74c5bSPierre Ossman if (data->error) 847c9b74c5bSPierre Ossman data->bytes_xfered = 0; 8481c6a0718SPierre Ossman else 849c9b74c5bSPierre Ossman data->bytes_xfered = data->blksz * data->blocks; 8501c6a0718SPierre Ossman 8511c6a0718SPierre Ossman if (data->stop) { 8521c6a0718SPierre Ossman /* 8531c6a0718SPierre Ossman * The controller needs a reset of internal state machines 8541c6a0718SPierre Ossman * upon error conditions. 8551c6a0718SPierre Ossman */ 85617b0429dSPierre Ossman if (data->error) { 8571c6a0718SPierre Ossman sdhci_reset(host, SDHCI_RESET_CMD); 8581c6a0718SPierre Ossman sdhci_reset(host, SDHCI_RESET_DATA); 8591c6a0718SPierre Ossman } 8601c6a0718SPierre Ossman 8611c6a0718SPierre Ossman sdhci_send_command(host, data->stop); 8621c6a0718SPierre Ossman } else 8631c6a0718SPierre Ossman tasklet_schedule(&host->finish_tasklet); 8641c6a0718SPierre Ossman } 8651c6a0718SPierre Ossman 8661c6a0718SPierre Ossman static void sdhci_send_command(struct sdhci_host *host, struct mmc_command *cmd) 8671c6a0718SPierre Ossman { 8681c6a0718SPierre Ossman int flags; 8691c6a0718SPierre Ossman u32 mask; 8701c6a0718SPierre Ossman unsigned long timeout; 8711c6a0718SPierre Ossman 8721c6a0718SPierre Ossman WARN_ON(host->cmd); 8731c6a0718SPierre Ossman 8741c6a0718SPierre Ossman /* Wait max 10 ms */ 8751c6a0718SPierre Ossman timeout = 10; 8761c6a0718SPierre Ossman 8771c6a0718SPierre Ossman mask = SDHCI_CMD_INHIBIT; 8781c6a0718SPierre Ossman if ((cmd->data != NULL) || (cmd->flags & MMC_RSP_BUSY)) 8791c6a0718SPierre Ossman mask |= SDHCI_DATA_INHIBIT; 8801c6a0718SPierre Ossman 8811c6a0718SPierre Ossman /* We shouldn't wait for data inihibit for stop commands, even 8821c6a0718SPierre Ossman though they might use busy signaling */ 8831c6a0718SPierre Ossman if (host->mrq->data && (cmd == host->mrq->data->stop)) 8841c6a0718SPierre Ossman mask &= ~SDHCI_DATA_INHIBIT; 8851c6a0718SPierre Ossman 8864e4141a5SAnton Vorontsov while (sdhci_readl(host, SDHCI_PRESENT_STATE) & mask) { 8871c6a0718SPierre Ossman if (timeout == 0) { 8881c6a0718SPierre Ossman printk(KERN_ERR "%s: Controller never released " 8891c6a0718SPierre Ossman "inhibit bit(s).\n", mmc_hostname(host->mmc)); 8901c6a0718SPierre Ossman sdhci_dumpregs(host); 89117b0429dSPierre Ossman cmd->error = -EIO; 8921c6a0718SPierre Ossman tasklet_schedule(&host->finish_tasklet); 8931c6a0718SPierre Ossman return; 8941c6a0718SPierre Ossman } 8951c6a0718SPierre Ossman timeout--; 8961c6a0718SPierre Ossman mdelay(1); 8971c6a0718SPierre Ossman } 8981c6a0718SPierre Ossman 8991c6a0718SPierre Ossman mod_timer(&host->timer, jiffies + 10 * HZ); 9001c6a0718SPierre Ossman 9011c6a0718SPierre Ossman host->cmd = cmd; 9021c6a0718SPierre Ossman 9031c6a0718SPierre Ossman sdhci_prepare_data(host, cmd->data); 9041c6a0718SPierre Ossman 9054e4141a5SAnton Vorontsov sdhci_writel(host, cmd->arg, SDHCI_ARGUMENT); 9061c6a0718SPierre Ossman 9071c6a0718SPierre Ossman sdhci_set_transfer_mode(host, cmd->data); 9081c6a0718SPierre Ossman 9091c6a0718SPierre Ossman if ((cmd->flags & MMC_RSP_136) && (cmd->flags & MMC_RSP_BUSY)) { 9101c6a0718SPierre Ossman printk(KERN_ERR "%s: Unsupported response type!\n", 9111c6a0718SPierre Ossman mmc_hostname(host->mmc)); 91217b0429dSPierre Ossman cmd->error = -EINVAL; 9131c6a0718SPierre Ossman tasklet_schedule(&host->finish_tasklet); 9141c6a0718SPierre Ossman return; 9151c6a0718SPierre Ossman } 9161c6a0718SPierre Ossman 9171c6a0718SPierre Ossman if (!(cmd->flags & MMC_RSP_PRESENT)) 9181c6a0718SPierre Ossman flags = SDHCI_CMD_RESP_NONE; 9191c6a0718SPierre Ossman else if (cmd->flags & MMC_RSP_136) 9201c6a0718SPierre Ossman flags = SDHCI_CMD_RESP_LONG; 9211c6a0718SPierre Ossman else if (cmd->flags & MMC_RSP_BUSY) 9221c6a0718SPierre Ossman flags = SDHCI_CMD_RESP_SHORT_BUSY; 9231c6a0718SPierre Ossman else 9241c6a0718SPierre Ossman flags = SDHCI_CMD_RESP_SHORT; 9251c6a0718SPierre Ossman 9261c6a0718SPierre Ossman if (cmd->flags & MMC_RSP_CRC) 9271c6a0718SPierre Ossman flags |= SDHCI_CMD_CRC; 9281c6a0718SPierre Ossman if (cmd->flags & MMC_RSP_OPCODE) 9291c6a0718SPierre Ossman flags |= SDHCI_CMD_INDEX; 9301c6a0718SPierre Ossman if (cmd->data) 9311c6a0718SPierre Ossman flags |= SDHCI_CMD_DATA; 9321c6a0718SPierre Ossman 9334e4141a5SAnton Vorontsov sdhci_writew(host, SDHCI_MAKE_CMD(cmd->opcode, flags), SDHCI_COMMAND); 9341c6a0718SPierre Ossman } 9351c6a0718SPierre Ossman 9361c6a0718SPierre Ossman static void sdhci_finish_command(struct sdhci_host *host) 9371c6a0718SPierre Ossman { 9381c6a0718SPierre Ossman int i; 9391c6a0718SPierre Ossman 9401c6a0718SPierre Ossman BUG_ON(host->cmd == NULL); 9411c6a0718SPierre Ossman 9421c6a0718SPierre Ossman if (host->cmd->flags & MMC_RSP_PRESENT) { 9431c6a0718SPierre Ossman if (host->cmd->flags & MMC_RSP_136) { 9441c6a0718SPierre Ossman /* CRC is stripped so we need to do some shifting. */ 9451c6a0718SPierre Ossman for (i = 0;i < 4;i++) { 9464e4141a5SAnton Vorontsov host->cmd->resp[i] = sdhci_readl(host, 9471c6a0718SPierre Ossman SDHCI_RESPONSE + (3-i)*4) << 8; 9481c6a0718SPierre Ossman if (i != 3) 9491c6a0718SPierre Ossman host->cmd->resp[i] |= 9504e4141a5SAnton Vorontsov sdhci_readb(host, 9511c6a0718SPierre Ossman SDHCI_RESPONSE + (3-i)*4-1); 9521c6a0718SPierre Ossman } 9531c6a0718SPierre Ossman } else { 9544e4141a5SAnton Vorontsov host->cmd->resp[0] = sdhci_readl(host, SDHCI_RESPONSE); 9551c6a0718SPierre Ossman } 9561c6a0718SPierre Ossman } 9571c6a0718SPierre Ossman 95817b0429dSPierre Ossman host->cmd->error = 0; 9591c6a0718SPierre Ossman 960e538fbe8SPierre Ossman if (host->data && host->data_early) 961e538fbe8SPierre Ossman sdhci_finish_data(host); 962e538fbe8SPierre Ossman 963e538fbe8SPierre Ossman if (!host->cmd->data) 9641c6a0718SPierre Ossman tasklet_schedule(&host->finish_tasklet); 9651c6a0718SPierre Ossman 9661c6a0718SPierre Ossman host->cmd = NULL; 9671c6a0718SPierre Ossman } 9681c6a0718SPierre Ossman 9691c6a0718SPierre Ossman static void sdhci_set_clock(struct sdhci_host *host, unsigned int clock) 9701c6a0718SPierre Ossman { 9711c6a0718SPierre Ossman int div; 9721c6a0718SPierre Ossman u16 clk; 9731c6a0718SPierre Ossman unsigned long timeout; 9741c6a0718SPierre Ossman 9751c6a0718SPierre Ossman if (clock == host->clock) 9761c6a0718SPierre Ossman return; 9771c6a0718SPierre Ossman 9788114634cSAnton Vorontsov if (host->ops->set_clock) { 9798114634cSAnton Vorontsov host->ops->set_clock(host, clock); 9808114634cSAnton Vorontsov if (host->quirks & SDHCI_QUIRK_NONSTANDARD_CLOCK) 9818114634cSAnton Vorontsov return; 9828114634cSAnton Vorontsov } 9838114634cSAnton Vorontsov 9844e4141a5SAnton Vorontsov sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL); 9851c6a0718SPierre Ossman 9861c6a0718SPierre Ossman if (clock == 0) 9871c6a0718SPierre Ossman goto out; 9881c6a0718SPierre Ossman 9891c6a0718SPierre Ossman for (div = 1;div < 256;div *= 2) { 9901c6a0718SPierre Ossman if ((host->max_clk / div) <= clock) 9911c6a0718SPierre Ossman break; 9921c6a0718SPierre Ossman } 9931c6a0718SPierre Ossman div >>= 1; 9941c6a0718SPierre Ossman 9951c6a0718SPierre Ossman clk = div << SDHCI_DIVIDER_SHIFT; 9961c6a0718SPierre Ossman clk |= SDHCI_CLOCK_INT_EN; 9974e4141a5SAnton Vorontsov sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); 9981c6a0718SPierre Ossman 99927f6cb16SChris Ball /* Wait max 20 ms */ 100027f6cb16SChris Ball timeout = 20; 10014e4141a5SAnton Vorontsov while (!((clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL)) 10021c6a0718SPierre Ossman & SDHCI_CLOCK_INT_STABLE)) { 10031c6a0718SPierre Ossman if (timeout == 0) { 10041c6a0718SPierre Ossman printk(KERN_ERR "%s: Internal clock never " 10051c6a0718SPierre Ossman "stabilised.\n", mmc_hostname(host->mmc)); 10061c6a0718SPierre Ossman sdhci_dumpregs(host); 10071c6a0718SPierre Ossman return; 10081c6a0718SPierre Ossman } 10091c6a0718SPierre Ossman timeout--; 10101c6a0718SPierre Ossman mdelay(1); 10111c6a0718SPierre Ossman } 10121c6a0718SPierre Ossman 10131c6a0718SPierre Ossman clk |= SDHCI_CLOCK_CARD_EN; 10144e4141a5SAnton Vorontsov sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); 10151c6a0718SPierre Ossman 10161c6a0718SPierre Ossman out: 10171c6a0718SPierre Ossman host->clock = clock; 10181c6a0718SPierre Ossman } 10191c6a0718SPierre Ossman 10201c6a0718SPierre Ossman static void sdhci_set_power(struct sdhci_host *host, unsigned short power) 10211c6a0718SPierre Ossman { 10221c6a0718SPierre Ossman u8 pwr; 10231c6a0718SPierre Ossman 1024ae628903SPierre Ossman if (power == (unsigned short)-1) 1025ae628903SPierre Ossman pwr = 0; 1026ae628903SPierre Ossman else { 1027ae628903SPierre Ossman switch (1 << power) { 1028ae628903SPierre Ossman case MMC_VDD_165_195: 1029ae628903SPierre Ossman pwr = SDHCI_POWER_180; 1030ae628903SPierre Ossman break; 1031ae628903SPierre Ossman case MMC_VDD_29_30: 1032ae628903SPierre Ossman case MMC_VDD_30_31: 1033ae628903SPierre Ossman pwr = SDHCI_POWER_300; 1034ae628903SPierre Ossman break; 1035ae628903SPierre Ossman case MMC_VDD_32_33: 1036ae628903SPierre Ossman case MMC_VDD_33_34: 1037ae628903SPierre Ossman pwr = SDHCI_POWER_330; 1038ae628903SPierre Ossman break; 1039ae628903SPierre Ossman default: 1040ae628903SPierre Ossman BUG(); 1041ae628903SPierre Ossman } 1042ae628903SPierre Ossman } 1043ae628903SPierre Ossman 1044ae628903SPierre Ossman if (host->pwr == pwr) 10451c6a0718SPierre Ossman return; 10461c6a0718SPierre Ossman 1047ae628903SPierre Ossman host->pwr = pwr; 1048ae628903SPierre Ossman 1049ae628903SPierre Ossman if (pwr == 0) { 10504e4141a5SAnton Vorontsov sdhci_writeb(host, 0, SDHCI_POWER_CONTROL); 1051ae628903SPierre Ossman return; 10521c6a0718SPierre Ossman } 10531c6a0718SPierre Ossman 10541c6a0718SPierre Ossman /* 10551c6a0718SPierre Ossman * Spec says that we should clear the power reg before setting 10561c6a0718SPierre Ossman * a new value. Some controllers don't seem to like this though. 10571c6a0718SPierre Ossman */ 1058b8c86fc5SPierre Ossman if (!(host->quirks & SDHCI_QUIRK_SINGLE_POWER_WRITE)) 10594e4141a5SAnton Vorontsov sdhci_writeb(host, 0, SDHCI_POWER_CONTROL); 10601c6a0718SPierre Ossman 1061e08c1694SAndres Salomon /* 1062c71f6512SAndres Salomon * At least the Marvell CaFe chip gets confused if we set the voltage 1063e08c1694SAndres Salomon * and set turn on power at the same time, so set the voltage first. 1064e08c1694SAndres Salomon */ 106511a2f1b7SPierre Ossman if (host->quirks & SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER) 10664e4141a5SAnton Vorontsov sdhci_writeb(host, pwr, SDHCI_POWER_CONTROL); 10671c6a0718SPierre Ossman 1068ae628903SPierre Ossman pwr |= SDHCI_POWER_ON; 1069ae628903SPierre Ossman 1070ae628903SPierre Ossman sdhci_writeb(host, pwr, SDHCI_POWER_CONTROL); 1071557b0697SHarald Welte 1072557b0697SHarald Welte /* 1073557b0697SHarald Welte * Some controllers need an extra 10ms delay of 10ms before they 1074557b0697SHarald Welte * can apply clock after applying power 1075557b0697SHarald Welte */ 107611a2f1b7SPierre Ossman if (host->quirks & SDHCI_QUIRK_DELAY_AFTER_POWER) 1077557b0697SHarald Welte mdelay(10); 10781c6a0718SPierre Ossman } 10791c6a0718SPierre Ossman 10801c6a0718SPierre Ossman /*****************************************************************************\ 10811c6a0718SPierre Ossman * * 10821c6a0718SPierre Ossman * MMC callbacks * 10831c6a0718SPierre Ossman * * 10841c6a0718SPierre Ossman \*****************************************************************************/ 10851c6a0718SPierre Ossman 10861c6a0718SPierre Ossman static void sdhci_request(struct mmc_host *mmc, struct mmc_request *mrq) 10871c6a0718SPierre Ossman { 10881c6a0718SPierre Ossman struct sdhci_host *host; 108968d1fb7eSAnton Vorontsov bool present; 10901c6a0718SPierre Ossman unsigned long flags; 10911c6a0718SPierre Ossman 10921c6a0718SPierre Ossman host = mmc_priv(mmc); 10931c6a0718SPierre Ossman 10941c6a0718SPierre Ossman spin_lock_irqsave(&host->lock, flags); 10951c6a0718SPierre Ossman 10961c6a0718SPierre Ossman WARN_ON(host->mrq != NULL); 10971c6a0718SPierre Ossman 1098f9134319SPierre Ossman #ifndef SDHCI_USE_LEDS_CLASS 10991c6a0718SPierre Ossman sdhci_activate_led(host); 11002f730fecSPierre Ossman #endif 11011c6a0718SPierre Ossman 11021c6a0718SPierre Ossman host->mrq = mrq; 11031c6a0718SPierre Ossman 110468d1fb7eSAnton Vorontsov /* If polling, assume that the card is always present. */ 110568d1fb7eSAnton Vorontsov if (host->quirks & SDHCI_QUIRK_BROKEN_CARD_DETECTION) 110668d1fb7eSAnton Vorontsov present = true; 110768d1fb7eSAnton Vorontsov else 110868d1fb7eSAnton Vorontsov present = sdhci_readl(host, SDHCI_PRESENT_STATE) & 110968d1fb7eSAnton Vorontsov SDHCI_CARD_PRESENT; 111068d1fb7eSAnton Vorontsov 111168d1fb7eSAnton Vorontsov if (!present || host->flags & SDHCI_DEVICE_DEAD) { 111217b0429dSPierre Ossman host->mrq->cmd->error = -ENOMEDIUM; 11131c6a0718SPierre Ossman tasklet_schedule(&host->finish_tasklet); 11141c6a0718SPierre Ossman } else 11151c6a0718SPierre Ossman sdhci_send_command(host, mrq->cmd); 11161c6a0718SPierre Ossman 11171c6a0718SPierre Ossman mmiowb(); 11181c6a0718SPierre Ossman spin_unlock_irqrestore(&host->lock, flags); 11191c6a0718SPierre Ossman } 11201c6a0718SPierre Ossman 11211c6a0718SPierre Ossman static void sdhci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) 11221c6a0718SPierre Ossman { 11231c6a0718SPierre Ossman struct sdhci_host *host; 11241c6a0718SPierre Ossman unsigned long flags; 11251c6a0718SPierre Ossman u8 ctrl; 11261c6a0718SPierre Ossman 11271c6a0718SPierre Ossman host = mmc_priv(mmc); 11281c6a0718SPierre Ossman 11291c6a0718SPierre Ossman spin_lock_irqsave(&host->lock, flags); 11301c6a0718SPierre Ossman 11311e72859eSPierre Ossman if (host->flags & SDHCI_DEVICE_DEAD) 11321e72859eSPierre Ossman goto out; 11331e72859eSPierre Ossman 11341c6a0718SPierre Ossman /* 11351c6a0718SPierre Ossman * Reset the chip on each power off. 11361c6a0718SPierre Ossman * Should clear out any weird states. 11371c6a0718SPierre Ossman */ 11381c6a0718SPierre Ossman if (ios->power_mode == MMC_POWER_OFF) { 11394e4141a5SAnton Vorontsov sdhci_writel(host, 0, SDHCI_SIGNAL_ENABLE); 11407260cf5eSAnton Vorontsov sdhci_reinit(host); 11411c6a0718SPierre Ossman } 11421c6a0718SPierre Ossman 11431c6a0718SPierre Ossman sdhci_set_clock(host, ios->clock); 11441c6a0718SPierre Ossman 11451c6a0718SPierre Ossman if (ios->power_mode == MMC_POWER_OFF) 11461c6a0718SPierre Ossman sdhci_set_power(host, -1); 11471c6a0718SPierre Ossman else 11481c6a0718SPierre Ossman sdhci_set_power(host, ios->vdd); 11491c6a0718SPierre Ossman 11504e4141a5SAnton Vorontsov ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL); 11511c6a0718SPierre Ossman 11521c6a0718SPierre Ossman if (ios->bus_width == MMC_BUS_WIDTH_4) 11531c6a0718SPierre Ossman ctrl |= SDHCI_CTRL_4BITBUS; 11541c6a0718SPierre Ossman else 11551c6a0718SPierre Ossman ctrl &= ~SDHCI_CTRL_4BITBUS; 11561c6a0718SPierre Ossman 11571c6a0718SPierre Ossman if (ios->timing == MMC_TIMING_SD_HS) 11581c6a0718SPierre Ossman ctrl |= SDHCI_CTRL_HISPD; 11591c6a0718SPierre Ossman else 11601c6a0718SPierre Ossman ctrl &= ~SDHCI_CTRL_HISPD; 11611c6a0718SPierre Ossman 11624e4141a5SAnton Vorontsov sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL); 11631c6a0718SPierre Ossman 1164b8352260SLeandro Dorileo /* 1165b8352260SLeandro Dorileo * Some (ENE) controllers go apeshit on some ios operation, 1166b8352260SLeandro Dorileo * signalling timeout and CRC errors even on CMD0. Resetting 1167b8352260SLeandro Dorileo * it on each ios seems to solve the problem. 1168b8352260SLeandro Dorileo */ 1169b8c86fc5SPierre Ossman if(host->quirks & SDHCI_QUIRK_RESET_CMD_DATA_ON_IOS) 1170b8352260SLeandro Dorileo sdhci_reset(host, SDHCI_RESET_CMD | SDHCI_RESET_DATA); 1171b8352260SLeandro Dorileo 11721e72859eSPierre Ossman out: 11731c6a0718SPierre Ossman mmiowb(); 11741c6a0718SPierre Ossman spin_unlock_irqrestore(&host->lock, flags); 11751c6a0718SPierre Ossman } 11761c6a0718SPierre Ossman 11771c6a0718SPierre Ossman static int sdhci_get_ro(struct mmc_host *mmc) 11781c6a0718SPierre Ossman { 11791c6a0718SPierre Ossman struct sdhci_host *host; 11801c6a0718SPierre Ossman unsigned long flags; 11811c6a0718SPierre Ossman int present; 11821c6a0718SPierre Ossman 11831c6a0718SPierre Ossman host = mmc_priv(mmc); 11841c6a0718SPierre Ossman 11851c6a0718SPierre Ossman spin_lock_irqsave(&host->lock, flags); 11861c6a0718SPierre Ossman 11871e72859eSPierre Ossman if (host->flags & SDHCI_DEVICE_DEAD) 11881e72859eSPierre Ossman present = 0; 11891e72859eSPierre Ossman else 11904e4141a5SAnton Vorontsov present = sdhci_readl(host, SDHCI_PRESENT_STATE); 11911c6a0718SPierre Ossman 11921c6a0718SPierre Ossman spin_unlock_irqrestore(&host->lock, flags); 11931c6a0718SPierre Ossman 1194c5075a10SAnton Vorontsov if (host->quirks & SDHCI_QUIRK_INVERTED_WRITE_PROTECT) 1195c5075a10SAnton Vorontsov return !!(present & SDHCI_WRITE_PROTECT); 11961c6a0718SPierre Ossman return !(present & SDHCI_WRITE_PROTECT); 11971c6a0718SPierre Ossman } 11981c6a0718SPierre Ossman 1199f75979b7SPierre Ossman static void sdhci_enable_sdio_irq(struct mmc_host *mmc, int enable) 1200f75979b7SPierre Ossman { 1201f75979b7SPierre Ossman struct sdhci_host *host; 1202f75979b7SPierre Ossman unsigned long flags; 1203f75979b7SPierre Ossman 1204f75979b7SPierre Ossman host = mmc_priv(mmc); 1205f75979b7SPierre Ossman 1206f75979b7SPierre Ossman spin_lock_irqsave(&host->lock, flags); 1207f75979b7SPierre Ossman 12081e72859eSPierre Ossman if (host->flags & SDHCI_DEVICE_DEAD) 12091e72859eSPierre Ossman goto out; 12101e72859eSPierre Ossman 1211f75979b7SPierre Ossman if (enable) 12127260cf5eSAnton Vorontsov sdhci_unmask_irqs(host, SDHCI_INT_CARD_INT); 12137260cf5eSAnton Vorontsov else 12147260cf5eSAnton Vorontsov sdhci_mask_irqs(host, SDHCI_INT_CARD_INT); 12151e72859eSPierre Ossman out: 1216f75979b7SPierre Ossman mmiowb(); 1217f75979b7SPierre Ossman 1218f75979b7SPierre Ossman spin_unlock_irqrestore(&host->lock, flags); 1219f75979b7SPierre Ossman } 1220f75979b7SPierre Ossman 12211c6a0718SPierre Ossman static const struct mmc_host_ops sdhci_ops = { 12221c6a0718SPierre Ossman .request = sdhci_request, 12231c6a0718SPierre Ossman .set_ios = sdhci_set_ios, 12241c6a0718SPierre Ossman .get_ro = sdhci_get_ro, 1225f75979b7SPierre Ossman .enable_sdio_irq = sdhci_enable_sdio_irq, 12261c6a0718SPierre Ossman }; 12271c6a0718SPierre Ossman 12281c6a0718SPierre Ossman /*****************************************************************************\ 12291c6a0718SPierre Ossman * * 12301c6a0718SPierre Ossman * Tasklets * 12311c6a0718SPierre Ossman * * 12321c6a0718SPierre Ossman \*****************************************************************************/ 12331c6a0718SPierre Ossman 12341c6a0718SPierre Ossman static void sdhci_tasklet_card(unsigned long param) 12351c6a0718SPierre Ossman { 12361c6a0718SPierre Ossman struct sdhci_host *host; 12371c6a0718SPierre Ossman unsigned long flags; 12381c6a0718SPierre Ossman 12391c6a0718SPierre Ossman host = (struct sdhci_host*)param; 12401c6a0718SPierre Ossman 12411c6a0718SPierre Ossman spin_lock_irqsave(&host->lock, flags); 12421c6a0718SPierre Ossman 12434e4141a5SAnton Vorontsov if (!(sdhci_readl(host, SDHCI_PRESENT_STATE) & SDHCI_CARD_PRESENT)) { 12441c6a0718SPierre Ossman if (host->mrq) { 12451c6a0718SPierre Ossman printk(KERN_ERR "%s: Card removed during transfer!\n", 12461c6a0718SPierre Ossman mmc_hostname(host->mmc)); 12471c6a0718SPierre Ossman printk(KERN_ERR "%s: Resetting controller.\n", 12481c6a0718SPierre Ossman mmc_hostname(host->mmc)); 12491c6a0718SPierre Ossman 12501c6a0718SPierre Ossman sdhci_reset(host, SDHCI_RESET_CMD); 12511c6a0718SPierre Ossman sdhci_reset(host, SDHCI_RESET_DATA); 12521c6a0718SPierre Ossman 125317b0429dSPierre Ossman host->mrq->cmd->error = -ENOMEDIUM; 12541c6a0718SPierre Ossman tasklet_schedule(&host->finish_tasklet); 12551c6a0718SPierre Ossman } 12561c6a0718SPierre Ossman } 12571c6a0718SPierre Ossman 12581c6a0718SPierre Ossman spin_unlock_irqrestore(&host->lock, flags); 12591c6a0718SPierre Ossman 126004cf585dSPierre Ossman mmc_detect_change(host->mmc, msecs_to_jiffies(200)); 12611c6a0718SPierre Ossman } 12621c6a0718SPierre Ossman 12631c6a0718SPierre Ossman static void sdhci_tasklet_finish(unsigned long param) 12641c6a0718SPierre Ossman { 12651c6a0718SPierre Ossman struct sdhci_host *host; 12661c6a0718SPierre Ossman unsigned long flags; 12671c6a0718SPierre Ossman struct mmc_request *mrq; 12681c6a0718SPierre Ossman 12691c6a0718SPierre Ossman host = (struct sdhci_host*)param; 12701c6a0718SPierre Ossman 12711c6a0718SPierre Ossman spin_lock_irqsave(&host->lock, flags); 12721c6a0718SPierre Ossman 12731c6a0718SPierre Ossman del_timer(&host->timer); 12741c6a0718SPierre Ossman 12751c6a0718SPierre Ossman mrq = host->mrq; 12761c6a0718SPierre Ossman 12771c6a0718SPierre Ossman /* 12781c6a0718SPierre Ossman * The controller needs a reset of internal state machines 12791c6a0718SPierre Ossman * upon error conditions. 12801c6a0718SPierre Ossman */ 12811e72859eSPierre Ossman if (!(host->flags & SDHCI_DEVICE_DEAD) && 12821e72859eSPierre Ossman (mrq->cmd->error || 128317b0429dSPierre Ossman (mrq->data && (mrq->data->error || 128484c46a53SPierre Ossman (mrq->data->stop && mrq->data->stop->error))) || 12851e72859eSPierre Ossman (host->quirks & SDHCI_QUIRK_RESET_AFTER_REQUEST))) { 12861c6a0718SPierre Ossman 12871c6a0718SPierre Ossman /* Some controllers need this kick or reset won't work here */ 1288b8c86fc5SPierre Ossman if (host->quirks & SDHCI_QUIRK_CLOCK_BEFORE_RESET) { 12891c6a0718SPierre Ossman unsigned int clock; 12901c6a0718SPierre Ossman 12911c6a0718SPierre Ossman /* This is to force an update */ 12921c6a0718SPierre Ossman clock = host->clock; 12931c6a0718SPierre Ossman host->clock = 0; 12941c6a0718SPierre Ossman sdhci_set_clock(host, clock); 12951c6a0718SPierre Ossman } 12961c6a0718SPierre Ossman 12971c6a0718SPierre Ossman /* Spec says we should do both at the same time, but Ricoh 12981c6a0718SPierre Ossman controllers do not like that. */ 12991c6a0718SPierre Ossman sdhci_reset(host, SDHCI_RESET_CMD); 13001c6a0718SPierre Ossman sdhci_reset(host, SDHCI_RESET_DATA); 13011c6a0718SPierre Ossman } 13021c6a0718SPierre Ossman 13031c6a0718SPierre Ossman host->mrq = NULL; 13041c6a0718SPierre Ossman host->cmd = NULL; 13051c6a0718SPierre Ossman host->data = NULL; 13061c6a0718SPierre Ossman 1307f9134319SPierre Ossman #ifndef SDHCI_USE_LEDS_CLASS 13081c6a0718SPierre Ossman sdhci_deactivate_led(host); 13092f730fecSPierre Ossman #endif 13101c6a0718SPierre Ossman 13111c6a0718SPierre Ossman mmiowb(); 13121c6a0718SPierre Ossman spin_unlock_irqrestore(&host->lock, flags); 13131c6a0718SPierre Ossman 13141c6a0718SPierre Ossman mmc_request_done(host->mmc, mrq); 13151c6a0718SPierre Ossman } 13161c6a0718SPierre Ossman 13171c6a0718SPierre Ossman static void sdhci_timeout_timer(unsigned long data) 13181c6a0718SPierre Ossman { 13191c6a0718SPierre Ossman struct sdhci_host *host; 13201c6a0718SPierre Ossman unsigned long flags; 13211c6a0718SPierre Ossman 13221c6a0718SPierre Ossman host = (struct sdhci_host*)data; 13231c6a0718SPierre Ossman 13241c6a0718SPierre Ossman spin_lock_irqsave(&host->lock, flags); 13251c6a0718SPierre Ossman 13261c6a0718SPierre Ossman if (host->mrq) { 13271c6a0718SPierre Ossman printk(KERN_ERR "%s: Timeout waiting for hardware " 13281c6a0718SPierre Ossman "interrupt.\n", mmc_hostname(host->mmc)); 13291c6a0718SPierre Ossman sdhci_dumpregs(host); 13301c6a0718SPierre Ossman 13311c6a0718SPierre Ossman if (host->data) { 133217b0429dSPierre Ossman host->data->error = -ETIMEDOUT; 13331c6a0718SPierre Ossman sdhci_finish_data(host); 13341c6a0718SPierre Ossman } else { 13351c6a0718SPierre Ossman if (host->cmd) 133617b0429dSPierre Ossman host->cmd->error = -ETIMEDOUT; 13371c6a0718SPierre Ossman else 133817b0429dSPierre Ossman host->mrq->cmd->error = -ETIMEDOUT; 13391c6a0718SPierre Ossman 13401c6a0718SPierre Ossman tasklet_schedule(&host->finish_tasklet); 13411c6a0718SPierre Ossman } 13421c6a0718SPierre Ossman } 13431c6a0718SPierre Ossman 13441c6a0718SPierre Ossman mmiowb(); 13451c6a0718SPierre Ossman spin_unlock_irqrestore(&host->lock, flags); 13461c6a0718SPierre Ossman } 13471c6a0718SPierre Ossman 13481c6a0718SPierre Ossman /*****************************************************************************\ 13491c6a0718SPierre Ossman * * 13501c6a0718SPierre Ossman * Interrupt handling * 13511c6a0718SPierre Ossman * * 13521c6a0718SPierre Ossman \*****************************************************************************/ 13531c6a0718SPierre Ossman 13541c6a0718SPierre Ossman static void sdhci_cmd_irq(struct sdhci_host *host, u32 intmask) 13551c6a0718SPierre Ossman { 13561c6a0718SPierre Ossman BUG_ON(intmask == 0); 13571c6a0718SPierre Ossman 13581c6a0718SPierre Ossman if (!host->cmd) { 1359b67ac3f3SPierre Ossman printk(KERN_ERR "%s: Got command interrupt 0x%08x even " 1360b67ac3f3SPierre Ossman "though no command operation was in progress.\n", 1361b67ac3f3SPierre Ossman mmc_hostname(host->mmc), (unsigned)intmask); 13621c6a0718SPierre Ossman sdhci_dumpregs(host); 13631c6a0718SPierre Ossman return; 13641c6a0718SPierre Ossman } 13651c6a0718SPierre Ossman 13661c6a0718SPierre Ossman if (intmask & SDHCI_INT_TIMEOUT) 136717b0429dSPierre Ossman host->cmd->error = -ETIMEDOUT; 136817b0429dSPierre Ossman else if (intmask & (SDHCI_INT_CRC | SDHCI_INT_END_BIT | 136917b0429dSPierre Ossman SDHCI_INT_INDEX)) 137017b0429dSPierre Ossman host->cmd->error = -EILSEQ; 13711c6a0718SPierre Ossman 1372e809517fSPierre Ossman if (host->cmd->error) { 13731c6a0718SPierre Ossman tasklet_schedule(&host->finish_tasklet); 1374e809517fSPierre Ossman return; 1375e809517fSPierre Ossman } 1376e809517fSPierre Ossman 1377e809517fSPierre Ossman /* 1378e809517fSPierre Ossman * The host can send and interrupt when the busy state has 1379e809517fSPierre Ossman * ended, allowing us to wait without wasting CPU cycles. 1380e809517fSPierre Ossman * Unfortunately this is overloaded on the "data complete" 1381e809517fSPierre Ossman * interrupt, so we need to take some care when handling 1382e809517fSPierre Ossman * it. 1383e809517fSPierre Ossman * 1384e809517fSPierre Ossman * Note: The 1.0 specification is a bit ambiguous about this 1385e809517fSPierre Ossman * feature so there might be some problems with older 1386e809517fSPierre Ossman * controllers. 1387e809517fSPierre Ossman */ 1388e809517fSPierre Ossman if (host->cmd->flags & MMC_RSP_BUSY) { 1389e809517fSPierre Ossman if (host->cmd->data) 1390e809517fSPierre Ossman DBG("Cannot wait for busy signal when also " 1391e809517fSPierre Ossman "doing a data transfer"); 1392f945405cSBen Dooks else if (!(host->quirks & SDHCI_QUIRK_NO_BUSY_IRQ)) 1393e809517fSPierre Ossman return; 1394f945405cSBen Dooks 1395f945405cSBen Dooks /* The controller does not support the end-of-busy IRQ, 1396f945405cSBen Dooks * fall through and take the SDHCI_INT_RESPONSE */ 1397e809517fSPierre Ossman } 1398e809517fSPierre Ossman 1399e809517fSPierre Ossman if (intmask & SDHCI_INT_RESPONSE) 140043b58b36SPierre Ossman sdhci_finish_command(host); 14011c6a0718SPierre Ossman } 14021c6a0718SPierre Ossman 14036882a8c0SBen Dooks #ifdef DEBUG 14046882a8c0SBen Dooks static void sdhci_show_adma_error(struct sdhci_host *host) 14056882a8c0SBen Dooks { 14066882a8c0SBen Dooks const char *name = mmc_hostname(host->mmc); 14076882a8c0SBen Dooks u8 *desc = host->adma_desc; 14086882a8c0SBen Dooks __le32 *dma; 14096882a8c0SBen Dooks __le16 *len; 14106882a8c0SBen Dooks u8 attr; 14116882a8c0SBen Dooks 14126882a8c0SBen Dooks sdhci_dumpregs(host); 14136882a8c0SBen Dooks 14146882a8c0SBen Dooks while (true) { 14156882a8c0SBen Dooks dma = (__le32 *)(desc + 4); 14166882a8c0SBen Dooks len = (__le16 *)(desc + 2); 14176882a8c0SBen Dooks attr = *desc; 14186882a8c0SBen Dooks 14196882a8c0SBen Dooks DBG("%s: %p: DMA 0x%08x, LEN 0x%04x, Attr=0x%02x\n", 14206882a8c0SBen Dooks name, desc, le32_to_cpu(*dma), le16_to_cpu(*len), attr); 14216882a8c0SBen Dooks 14226882a8c0SBen Dooks desc += 8; 14236882a8c0SBen Dooks 14246882a8c0SBen Dooks if (attr & 2) 14256882a8c0SBen Dooks break; 14266882a8c0SBen Dooks } 14276882a8c0SBen Dooks } 14286882a8c0SBen Dooks #else 14296882a8c0SBen Dooks static void sdhci_show_adma_error(struct sdhci_host *host) { } 14306882a8c0SBen Dooks #endif 14316882a8c0SBen Dooks 14321c6a0718SPierre Ossman static void sdhci_data_irq(struct sdhci_host *host, u32 intmask) 14331c6a0718SPierre Ossman { 14341c6a0718SPierre Ossman BUG_ON(intmask == 0); 14351c6a0718SPierre Ossman 14361c6a0718SPierre Ossman if (!host->data) { 14371c6a0718SPierre Ossman /* 1438e809517fSPierre Ossman * The "data complete" interrupt is also used to 1439e809517fSPierre Ossman * indicate that a busy state has ended. See comment 1440e809517fSPierre Ossman * above in sdhci_cmd_irq(). 14411c6a0718SPierre Ossman */ 1442e809517fSPierre Ossman if (host->cmd && (host->cmd->flags & MMC_RSP_BUSY)) { 1443e809517fSPierre Ossman if (intmask & SDHCI_INT_DATA_END) { 1444e809517fSPierre Ossman sdhci_finish_command(host); 14451c6a0718SPierre Ossman return; 1446e809517fSPierre Ossman } 1447e809517fSPierre Ossman } 14481c6a0718SPierre Ossman 1449b67ac3f3SPierre Ossman printk(KERN_ERR "%s: Got data interrupt 0x%08x even " 1450b67ac3f3SPierre Ossman "though no data operation was in progress.\n", 1451b67ac3f3SPierre Ossman mmc_hostname(host->mmc), (unsigned)intmask); 14521c6a0718SPierre Ossman sdhci_dumpregs(host); 14531c6a0718SPierre Ossman 14541c6a0718SPierre Ossman return; 14551c6a0718SPierre Ossman } 14561c6a0718SPierre Ossman 14571c6a0718SPierre Ossman if (intmask & SDHCI_INT_DATA_TIMEOUT) 145817b0429dSPierre Ossman host->data->error = -ETIMEDOUT; 145917b0429dSPierre Ossman else if (intmask & (SDHCI_INT_DATA_CRC | SDHCI_INT_DATA_END_BIT)) 146017b0429dSPierre Ossman host->data->error = -EILSEQ; 14616882a8c0SBen Dooks else if (intmask & SDHCI_INT_ADMA_ERROR) { 14626882a8c0SBen Dooks printk(KERN_ERR "%s: ADMA error\n", mmc_hostname(host->mmc)); 14636882a8c0SBen Dooks sdhci_show_adma_error(host); 14642134a922SPierre Ossman host->data->error = -EIO; 14656882a8c0SBen Dooks } 14661c6a0718SPierre Ossman 146717b0429dSPierre Ossman if (host->data->error) 14681c6a0718SPierre Ossman sdhci_finish_data(host); 14691c6a0718SPierre Ossman else { 14701c6a0718SPierre Ossman if (intmask & (SDHCI_INT_DATA_AVAIL | SDHCI_INT_SPACE_AVAIL)) 14711c6a0718SPierre Ossman sdhci_transfer_pio(host); 14721c6a0718SPierre Ossman 14736ba736a1SPierre Ossman /* 14746ba736a1SPierre Ossman * We currently don't do anything fancy with DMA 14756ba736a1SPierre Ossman * boundaries, but as we can't disable the feature 14766ba736a1SPierre Ossman * we need to at least restart the transfer. 14776ba736a1SPierre Ossman */ 14786ba736a1SPierre Ossman if (intmask & SDHCI_INT_DMA_END) 14794e4141a5SAnton Vorontsov sdhci_writel(host, sdhci_readl(host, SDHCI_DMA_ADDRESS), 14804e4141a5SAnton Vorontsov SDHCI_DMA_ADDRESS); 14816ba736a1SPierre Ossman 1482e538fbe8SPierre Ossman if (intmask & SDHCI_INT_DATA_END) { 1483e538fbe8SPierre Ossman if (host->cmd) { 1484e538fbe8SPierre Ossman /* 1485e538fbe8SPierre Ossman * Data managed to finish before the 1486e538fbe8SPierre Ossman * command completed. Make sure we do 1487e538fbe8SPierre Ossman * things in the proper order. 1488e538fbe8SPierre Ossman */ 1489e538fbe8SPierre Ossman host->data_early = 1; 1490e538fbe8SPierre Ossman } else { 14911c6a0718SPierre Ossman sdhci_finish_data(host); 14921c6a0718SPierre Ossman } 14931c6a0718SPierre Ossman } 1494e538fbe8SPierre Ossman } 1495e538fbe8SPierre Ossman } 14961c6a0718SPierre Ossman 14971c6a0718SPierre Ossman static irqreturn_t sdhci_irq(int irq, void *dev_id) 14981c6a0718SPierre Ossman { 14991c6a0718SPierre Ossman irqreturn_t result; 15001c6a0718SPierre Ossman struct sdhci_host* host = dev_id; 15011c6a0718SPierre Ossman u32 intmask; 1502f75979b7SPierre Ossman int cardint = 0; 15031c6a0718SPierre Ossman 15041c6a0718SPierre Ossman spin_lock(&host->lock); 15051c6a0718SPierre Ossman 15064e4141a5SAnton Vorontsov intmask = sdhci_readl(host, SDHCI_INT_STATUS); 15071c6a0718SPierre Ossman 15081c6a0718SPierre Ossman if (!intmask || intmask == 0xffffffff) { 15091c6a0718SPierre Ossman result = IRQ_NONE; 15101c6a0718SPierre Ossman goto out; 15111c6a0718SPierre Ossman } 15121c6a0718SPierre Ossman 1513b69c9058SPierre Ossman DBG("*** %s got interrupt: 0x%08x\n", 1514b69c9058SPierre Ossman mmc_hostname(host->mmc), intmask); 15151c6a0718SPierre Ossman 15161c6a0718SPierre Ossman if (intmask & (SDHCI_INT_CARD_INSERT | SDHCI_INT_CARD_REMOVE)) { 15174e4141a5SAnton Vorontsov sdhci_writel(host, intmask & (SDHCI_INT_CARD_INSERT | 15184e4141a5SAnton Vorontsov SDHCI_INT_CARD_REMOVE), SDHCI_INT_STATUS); 15191c6a0718SPierre Ossman tasklet_schedule(&host->card_tasklet); 15201c6a0718SPierre Ossman } 15211c6a0718SPierre Ossman 15221c6a0718SPierre Ossman intmask &= ~(SDHCI_INT_CARD_INSERT | SDHCI_INT_CARD_REMOVE); 15231c6a0718SPierre Ossman 15241c6a0718SPierre Ossman if (intmask & SDHCI_INT_CMD_MASK) { 15254e4141a5SAnton Vorontsov sdhci_writel(host, intmask & SDHCI_INT_CMD_MASK, 15264e4141a5SAnton Vorontsov SDHCI_INT_STATUS); 15271c6a0718SPierre Ossman sdhci_cmd_irq(host, intmask & SDHCI_INT_CMD_MASK); 15281c6a0718SPierre Ossman } 15291c6a0718SPierre Ossman 15301c6a0718SPierre Ossman if (intmask & SDHCI_INT_DATA_MASK) { 15314e4141a5SAnton Vorontsov sdhci_writel(host, intmask & SDHCI_INT_DATA_MASK, 15324e4141a5SAnton Vorontsov SDHCI_INT_STATUS); 15331c6a0718SPierre Ossman sdhci_data_irq(host, intmask & SDHCI_INT_DATA_MASK); 15341c6a0718SPierre Ossman } 15351c6a0718SPierre Ossman 15361c6a0718SPierre Ossman intmask &= ~(SDHCI_INT_CMD_MASK | SDHCI_INT_DATA_MASK); 15371c6a0718SPierre Ossman 1538964f9ce2SPierre Ossman intmask &= ~SDHCI_INT_ERROR; 1539964f9ce2SPierre Ossman 15401c6a0718SPierre Ossman if (intmask & SDHCI_INT_BUS_POWER) { 15411c6a0718SPierre Ossman printk(KERN_ERR "%s: Card is consuming too much power!\n", 15421c6a0718SPierre Ossman mmc_hostname(host->mmc)); 15434e4141a5SAnton Vorontsov sdhci_writel(host, SDHCI_INT_BUS_POWER, SDHCI_INT_STATUS); 15441c6a0718SPierre Ossman } 15451c6a0718SPierre Ossman 15469d26a5d3SRolf Eike Beer intmask &= ~SDHCI_INT_BUS_POWER; 15471c6a0718SPierre Ossman 1548f75979b7SPierre Ossman if (intmask & SDHCI_INT_CARD_INT) 1549f75979b7SPierre Ossman cardint = 1; 1550f75979b7SPierre Ossman 1551f75979b7SPierre Ossman intmask &= ~SDHCI_INT_CARD_INT; 1552f75979b7SPierre Ossman 15531c6a0718SPierre Ossman if (intmask) { 15541c6a0718SPierre Ossman printk(KERN_ERR "%s: Unexpected interrupt 0x%08x.\n", 15551c6a0718SPierre Ossman mmc_hostname(host->mmc), intmask); 15561c6a0718SPierre Ossman sdhci_dumpregs(host); 15571c6a0718SPierre Ossman 15584e4141a5SAnton Vorontsov sdhci_writel(host, intmask, SDHCI_INT_STATUS); 15591c6a0718SPierre Ossman } 15601c6a0718SPierre Ossman 15611c6a0718SPierre Ossman result = IRQ_HANDLED; 15621c6a0718SPierre Ossman 15631c6a0718SPierre Ossman mmiowb(); 15641c6a0718SPierre Ossman out: 15651c6a0718SPierre Ossman spin_unlock(&host->lock); 15661c6a0718SPierre Ossman 1567f75979b7SPierre Ossman /* 1568f75979b7SPierre Ossman * We have to delay this as it calls back into the driver. 1569f75979b7SPierre Ossman */ 1570f75979b7SPierre Ossman if (cardint) 1571f75979b7SPierre Ossman mmc_signal_sdio_irq(host->mmc); 1572f75979b7SPierre Ossman 15731c6a0718SPierre Ossman return result; 15741c6a0718SPierre Ossman } 15751c6a0718SPierre Ossman 15761c6a0718SPierre Ossman /*****************************************************************************\ 15771c6a0718SPierre Ossman * * 15781c6a0718SPierre Ossman * Suspend/resume * 15791c6a0718SPierre Ossman * * 15801c6a0718SPierre Ossman \*****************************************************************************/ 15811c6a0718SPierre Ossman 15821c6a0718SPierre Ossman #ifdef CONFIG_PM 15831c6a0718SPierre Ossman 1584b8c86fc5SPierre Ossman int sdhci_suspend_host(struct sdhci_host *host, pm_message_t state) 15851c6a0718SPierre Ossman { 1586b8c86fc5SPierre Ossman int ret; 15871c6a0718SPierre Ossman 15887260cf5eSAnton Vorontsov sdhci_disable_card_detection(host); 15897260cf5eSAnton Vorontsov 1590b8c86fc5SPierre Ossman ret = mmc_suspend_host(host->mmc, state); 15911c6a0718SPierre Ossman if (ret) 15921c6a0718SPierre Ossman return ret; 15931c6a0718SPierre Ossman 1594b8c86fc5SPierre Ossman free_irq(host->irq, host); 1595b8c86fc5SPierre Ossman 1596b8c86fc5SPierre Ossman return 0; 1597b8c86fc5SPierre Ossman } 1598b8c86fc5SPierre Ossman 1599b8c86fc5SPierre Ossman EXPORT_SYMBOL_GPL(sdhci_suspend_host); 1600b8c86fc5SPierre Ossman 1601b8c86fc5SPierre Ossman int sdhci_resume_host(struct sdhci_host *host) 1602b8c86fc5SPierre Ossman { 1603b8c86fc5SPierre Ossman int ret; 1604b8c86fc5SPierre Ossman 1605a13abc7bSRichard Röjfors if (host->flags & (SDHCI_USE_SDMA | SDHCI_USE_ADMA)) { 1606b8c86fc5SPierre Ossman if (host->ops->enable_dma) 1607b8c86fc5SPierre Ossman host->ops->enable_dma(host); 1608b8c86fc5SPierre Ossman } 1609b8c86fc5SPierre Ossman 1610b8c86fc5SPierre Ossman ret = request_irq(host->irq, sdhci_irq, IRQF_SHARED, 1611b8c86fc5SPierre Ossman mmc_hostname(host->mmc), host); 16121c6a0718SPierre Ossman if (ret) 16131c6a0718SPierre Ossman return ret; 1614b8c86fc5SPierre Ossman 16152f4cbb3dSNicolas Pitre sdhci_init(host, (host->mmc->pm_flags & MMC_PM_KEEP_POWER)); 16161c6a0718SPierre Ossman mmiowb(); 1617b8c86fc5SPierre Ossman 1618b8c86fc5SPierre Ossman ret = mmc_resume_host(host->mmc); 16197260cf5eSAnton Vorontsov sdhci_enable_card_detection(host); 16207260cf5eSAnton Vorontsov 16212f4cbb3dSNicolas Pitre return ret; 16221c6a0718SPierre Ossman } 16231c6a0718SPierre Ossman 1624b8c86fc5SPierre Ossman EXPORT_SYMBOL_GPL(sdhci_resume_host); 16251c6a0718SPierre Ossman 16261c6a0718SPierre Ossman #endif /* CONFIG_PM */ 16271c6a0718SPierre Ossman 16281c6a0718SPierre Ossman /*****************************************************************************\ 16291c6a0718SPierre Ossman * * 1630b8c86fc5SPierre Ossman * Device allocation/registration * 16311c6a0718SPierre Ossman * * 16321c6a0718SPierre Ossman \*****************************************************************************/ 16331c6a0718SPierre Ossman 1634b8c86fc5SPierre Ossman struct sdhci_host *sdhci_alloc_host(struct device *dev, 1635b8c86fc5SPierre Ossman size_t priv_size) 16361c6a0718SPierre Ossman { 16371c6a0718SPierre Ossman struct mmc_host *mmc; 16381c6a0718SPierre Ossman struct sdhci_host *host; 16391c6a0718SPierre Ossman 1640b8c86fc5SPierre Ossman WARN_ON(dev == NULL); 16411c6a0718SPierre Ossman 1642b8c86fc5SPierre Ossman mmc = mmc_alloc_host(sizeof(struct sdhci_host) + priv_size, dev); 16431c6a0718SPierre Ossman if (!mmc) 1644b8c86fc5SPierre Ossman return ERR_PTR(-ENOMEM); 16451c6a0718SPierre Ossman 16461c6a0718SPierre Ossman host = mmc_priv(mmc); 16471c6a0718SPierre Ossman host->mmc = mmc; 16481c6a0718SPierre Ossman 1649b8c86fc5SPierre Ossman return host; 16501c6a0718SPierre Ossman } 16511c6a0718SPierre Ossman 1652b8c86fc5SPierre Ossman EXPORT_SYMBOL_GPL(sdhci_alloc_host); 1653b8c86fc5SPierre Ossman 1654b8c86fc5SPierre Ossman int sdhci_add_host(struct sdhci_host *host) 1655b8c86fc5SPierre Ossman { 1656b8c86fc5SPierre Ossman struct mmc_host *mmc; 1657b8c86fc5SPierre Ossman unsigned int caps; 1658b8c86fc5SPierre Ossman int ret; 1659b8c86fc5SPierre Ossman 1660b8c86fc5SPierre Ossman WARN_ON(host == NULL); 1661b8c86fc5SPierre Ossman if (host == NULL) 1662b8c86fc5SPierre Ossman return -EINVAL; 1663b8c86fc5SPierre Ossman 1664b8c86fc5SPierre Ossman mmc = host->mmc; 1665b8c86fc5SPierre Ossman 1666b8c86fc5SPierre Ossman if (debug_quirks) 1667b8c86fc5SPierre Ossman host->quirks = debug_quirks; 1668b8c86fc5SPierre Ossman 16691c6a0718SPierre Ossman sdhci_reset(host, SDHCI_RESET_ALL); 16701c6a0718SPierre Ossman 16714e4141a5SAnton Vorontsov host->version = sdhci_readw(host, SDHCI_HOST_VERSION); 16722134a922SPierre Ossman host->version = (host->version & SDHCI_SPEC_VER_MASK) 16732134a922SPierre Ossman >> SDHCI_SPEC_VER_SHIFT; 16742134a922SPierre Ossman if (host->version > SDHCI_SPEC_200) { 16751c6a0718SPierre Ossman printk(KERN_ERR "%s: Unknown controller version (%d). " 1676b69c9058SPierre Ossman "You may experience problems.\n", mmc_hostname(mmc), 16772134a922SPierre Ossman host->version); 16781c6a0718SPierre Ossman } 16791c6a0718SPierre Ossman 16804e4141a5SAnton Vorontsov caps = sdhci_readl(host, SDHCI_CAPABILITIES); 16811c6a0718SPierre Ossman 1682b8c86fc5SPierre Ossman if (host->quirks & SDHCI_QUIRK_FORCE_DMA) 1683a13abc7bSRichard Röjfors host->flags |= SDHCI_USE_SDMA; 1684a13abc7bSRichard Röjfors else if (!(caps & SDHCI_CAN_DO_SDMA)) 1685a13abc7bSRichard Röjfors DBG("Controller doesn't have SDMA capability\n"); 16861c6a0718SPierre Ossman else 1687a13abc7bSRichard Röjfors host->flags |= SDHCI_USE_SDMA; 16881c6a0718SPierre Ossman 1689b8c86fc5SPierre Ossman if ((host->quirks & SDHCI_QUIRK_BROKEN_DMA) && 1690a13abc7bSRichard Röjfors (host->flags & SDHCI_USE_SDMA)) { 1691cee687ceSRolf Eike Beer DBG("Disabling DMA as it is marked broken\n"); 1692a13abc7bSRichard Röjfors host->flags &= ~SDHCI_USE_SDMA; 16937c168e3dSFeng Tang } 16947c168e3dSFeng Tang 1695a13abc7bSRichard Röjfors if ((host->version >= SDHCI_SPEC_200) && (caps & SDHCI_CAN_DO_ADMA2)) 16962134a922SPierre Ossman host->flags |= SDHCI_USE_ADMA; 16972134a922SPierre Ossman 16982134a922SPierre Ossman if ((host->quirks & SDHCI_QUIRK_BROKEN_ADMA) && 16992134a922SPierre Ossman (host->flags & SDHCI_USE_ADMA)) { 17002134a922SPierre Ossman DBG("Disabling ADMA as it is marked broken\n"); 17012134a922SPierre Ossman host->flags &= ~SDHCI_USE_ADMA; 17022134a922SPierre Ossman } 17032134a922SPierre Ossman 1704a13abc7bSRichard Röjfors if (host->flags & (SDHCI_USE_SDMA | SDHCI_USE_ADMA)) { 1705b8c86fc5SPierre Ossman if (host->ops->enable_dma) { 1706b8c86fc5SPierre Ossman if (host->ops->enable_dma(host)) { 1707b8c86fc5SPierre Ossman printk(KERN_WARNING "%s: No suitable DMA " 1708b8c86fc5SPierre Ossman "available. Falling back to PIO.\n", 1709b8c86fc5SPierre Ossman mmc_hostname(mmc)); 1710a13abc7bSRichard Röjfors host->flags &= 1711a13abc7bSRichard Röjfors ~(SDHCI_USE_SDMA | SDHCI_USE_ADMA); 17121c6a0718SPierre Ossman } 17131c6a0718SPierre Ossman } 1714b8c86fc5SPierre Ossman } 17151c6a0718SPierre Ossman 17162134a922SPierre Ossman if (host->flags & SDHCI_USE_ADMA) { 17172134a922SPierre Ossman /* 17182134a922SPierre Ossman * We need to allocate descriptors for all sg entries 17192134a922SPierre Ossman * (128) and potentially one alignment transfer for 17202134a922SPierre Ossman * each of those entries. 17212134a922SPierre Ossman */ 17222134a922SPierre Ossman host->adma_desc = kmalloc((128 * 2 + 1) * 4, GFP_KERNEL); 17232134a922SPierre Ossman host->align_buffer = kmalloc(128 * 4, GFP_KERNEL); 17242134a922SPierre Ossman if (!host->adma_desc || !host->align_buffer) { 17252134a922SPierre Ossman kfree(host->adma_desc); 17262134a922SPierre Ossman kfree(host->align_buffer); 17272134a922SPierre Ossman printk(KERN_WARNING "%s: Unable to allocate ADMA " 17282134a922SPierre Ossman "buffers. Falling back to standard DMA.\n", 17292134a922SPierre Ossman mmc_hostname(mmc)); 17302134a922SPierre Ossman host->flags &= ~SDHCI_USE_ADMA; 17312134a922SPierre Ossman } 17322134a922SPierre Ossman } 17332134a922SPierre Ossman 17347659150cSPierre Ossman /* 17357659150cSPierre Ossman * If we use DMA, then it's up to the caller to set the DMA 17367659150cSPierre Ossman * mask, but PIO does not need the hw shim so we set a new 17377659150cSPierre Ossman * mask here in that case. 17387659150cSPierre Ossman */ 1739a13abc7bSRichard Röjfors if (!(host->flags & (SDHCI_USE_SDMA | SDHCI_USE_ADMA))) { 17407659150cSPierre Ossman host->dma_mask = DMA_BIT_MASK(64); 17417659150cSPierre Ossman mmc_dev(host->mmc)->dma_mask = &host->dma_mask; 17427659150cSPierre Ossman } 17431c6a0718SPierre Ossman 17441c6a0718SPierre Ossman host->max_clk = 17451c6a0718SPierre Ossman (caps & SDHCI_CLOCK_BASE_MASK) >> SDHCI_CLOCK_BASE_SHIFT; 17464240ff0aSBen Dooks host->max_clk *= 1000000; 1747f27f47efSAnton Vorontsov if (host->max_clk == 0 || host->quirks & 1748f27f47efSAnton Vorontsov SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN) { 17494240ff0aSBen Dooks if (!host->ops->get_max_clock) { 17504240ff0aSBen Dooks printk(KERN_ERR 17514240ff0aSBen Dooks "%s: Hardware doesn't specify base clock " 1752b69c9058SPierre Ossman "frequency.\n", mmc_hostname(mmc)); 1753b8c86fc5SPierre Ossman return -ENODEV; 17541c6a0718SPierre Ossman } 17554240ff0aSBen Dooks host->max_clk = host->ops->get_max_clock(host); 17564240ff0aSBen Dooks } 17571c6a0718SPierre Ossman 17581c6a0718SPierre Ossman host->timeout_clk = 17591c6a0718SPierre Ossman (caps & SDHCI_TIMEOUT_CLK_MASK) >> SDHCI_TIMEOUT_CLK_SHIFT; 17601c6a0718SPierre Ossman if (host->timeout_clk == 0) { 176181b39802SAnton Vorontsov if (host->ops->get_timeout_clock) { 176281b39802SAnton Vorontsov host->timeout_clk = host->ops->get_timeout_clock(host); 176381b39802SAnton Vorontsov } else if (!(host->quirks & 176481b39802SAnton Vorontsov SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK)) { 17654240ff0aSBen Dooks printk(KERN_ERR 17664240ff0aSBen Dooks "%s: Hardware doesn't specify timeout clock " 1767b69c9058SPierre Ossman "frequency.\n", mmc_hostname(mmc)); 1768b8c86fc5SPierre Ossman return -ENODEV; 17691c6a0718SPierre Ossman } 17704240ff0aSBen Dooks } 17711c6a0718SPierre Ossman if (caps & SDHCI_TIMEOUT_CLK_UNIT) 17721c6a0718SPierre Ossman host->timeout_clk *= 1000; 17731c6a0718SPierre Ossman 17741c6a0718SPierre Ossman /* 17751c6a0718SPierre Ossman * Set host parameters. 17761c6a0718SPierre Ossman */ 17771c6a0718SPierre Ossman mmc->ops = &sdhci_ops; 1778e9510176SAnton Vorontsov if (host->quirks & SDHCI_QUIRK_NONSTANDARD_CLOCK && 1779e9510176SAnton Vorontsov host->ops->set_clock && host->ops->get_min_clock) 1780a9e58f25SAnton Vorontsov mmc->f_min = host->ops->get_min_clock(host); 1781a9e58f25SAnton Vorontsov else 17821c6a0718SPierre Ossman mmc->f_min = host->max_clk / 256; 17831c6a0718SPierre Ossman mmc->f_max = host->max_clk; 17845fe23c7fSAnton Vorontsov mmc->caps = MMC_CAP_SDIO_IRQ; 17855fe23c7fSAnton Vorontsov 17865fe23c7fSAnton Vorontsov if (!(host->quirks & SDHCI_QUIRK_FORCE_1_BIT_DATA)) 17875fe23c7fSAnton Vorontsov mmc->caps |= MMC_CAP_4_BIT_DATA; 17881c6a0718SPierre Ossman 178986a6a874SPierre Ossman if (caps & SDHCI_CAN_DO_HISPD) 17901c6a0718SPierre Ossman mmc->caps |= MMC_CAP_SD_HIGHSPEED; 17911c6a0718SPierre Ossman 179268d1fb7eSAnton Vorontsov if (host->quirks & SDHCI_QUIRK_BROKEN_CARD_DETECTION) 179368d1fb7eSAnton Vorontsov mmc->caps |= MMC_CAP_NEEDS_POLL; 179468d1fb7eSAnton Vorontsov 17951c6a0718SPierre Ossman mmc->ocr_avail = 0; 17961c6a0718SPierre Ossman if (caps & SDHCI_CAN_VDD_330) 17971c6a0718SPierre Ossman mmc->ocr_avail |= MMC_VDD_32_33|MMC_VDD_33_34; 17981c6a0718SPierre Ossman if (caps & SDHCI_CAN_VDD_300) 17991c6a0718SPierre Ossman mmc->ocr_avail |= MMC_VDD_29_30|MMC_VDD_30_31; 18001c6a0718SPierre Ossman if (caps & SDHCI_CAN_VDD_180) 180155556da0SPhilip Langdale mmc->ocr_avail |= MMC_VDD_165_195; 18021c6a0718SPierre Ossman 18031c6a0718SPierre Ossman if (mmc->ocr_avail == 0) { 18041c6a0718SPierre Ossman printk(KERN_ERR "%s: Hardware doesn't report any " 1805b69c9058SPierre Ossman "support voltages.\n", mmc_hostname(mmc)); 1806b8c86fc5SPierre Ossman return -ENODEV; 18071c6a0718SPierre Ossman } 18081c6a0718SPierre Ossman 18091c6a0718SPierre Ossman spin_lock_init(&host->lock); 18101c6a0718SPierre Ossman 18111c6a0718SPierre Ossman /* 18122134a922SPierre Ossman * Maximum number of segments. Depends on if the hardware 18132134a922SPierre Ossman * can do scatter/gather or not. 18141c6a0718SPierre Ossman */ 18152134a922SPierre Ossman if (host->flags & SDHCI_USE_ADMA) 18162134a922SPierre Ossman mmc->max_hw_segs = 128; 1817a13abc7bSRichard Röjfors else if (host->flags & SDHCI_USE_SDMA) 18181c6a0718SPierre Ossman mmc->max_hw_segs = 1; 18192134a922SPierre Ossman else /* PIO */ 18202134a922SPierre Ossman mmc->max_hw_segs = 128; 18212134a922SPierre Ossman mmc->max_phys_segs = 128; 18221c6a0718SPierre Ossman 18231c6a0718SPierre Ossman /* 18241c6a0718SPierre Ossman * Maximum number of sectors in one transfer. Limited by DMA boundary 18251c6a0718SPierre Ossman * size (512KiB). 18261c6a0718SPierre Ossman */ 18271c6a0718SPierre Ossman mmc->max_req_size = 524288; 18281c6a0718SPierre Ossman 18291c6a0718SPierre Ossman /* 18301c6a0718SPierre Ossman * Maximum segment size. Could be one segment with the maximum number 18312134a922SPierre Ossman * of bytes. When doing hardware scatter/gather, each entry cannot 18322134a922SPierre Ossman * be larger than 64 KiB though. 18331c6a0718SPierre Ossman */ 18342134a922SPierre Ossman if (host->flags & SDHCI_USE_ADMA) 18352134a922SPierre Ossman mmc->max_seg_size = 65536; 18362134a922SPierre Ossman else 18371c6a0718SPierre Ossman mmc->max_seg_size = mmc->max_req_size; 18381c6a0718SPierre Ossman 18391c6a0718SPierre Ossman /* 18401c6a0718SPierre Ossman * Maximum block size. This varies from controller to controller and 18411c6a0718SPierre Ossman * is specified in the capabilities register. 18421c6a0718SPierre Ossman */ 18430633f654SAnton Vorontsov if (host->quirks & SDHCI_QUIRK_FORCE_BLK_SZ_2048) { 18440633f654SAnton Vorontsov mmc->max_blk_size = 2; 18450633f654SAnton Vorontsov } else { 18460633f654SAnton Vorontsov mmc->max_blk_size = (caps & SDHCI_MAX_BLOCK_MASK) >> 18470633f654SAnton Vorontsov SDHCI_MAX_BLOCK_SHIFT; 18481c6a0718SPierre Ossman if (mmc->max_blk_size >= 3) { 1849b69c9058SPierre Ossman printk(KERN_WARNING "%s: Invalid maximum block size, " 1850b69c9058SPierre Ossman "assuming 512 bytes\n", mmc_hostname(mmc)); 18510633f654SAnton Vorontsov mmc->max_blk_size = 0; 18520633f654SAnton Vorontsov } 18530633f654SAnton Vorontsov } 18540633f654SAnton Vorontsov 18551c6a0718SPierre Ossman mmc->max_blk_size = 512 << mmc->max_blk_size; 18561c6a0718SPierre Ossman 18571c6a0718SPierre Ossman /* 18581c6a0718SPierre Ossman * Maximum block count. 18591c6a0718SPierre Ossman */ 18601388eefdSBen Dooks mmc->max_blk_count = (host->quirks & SDHCI_QUIRK_NO_MULTIBLOCK) ? 1 : 65535; 18611c6a0718SPierre Ossman 18621c6a0718SPierre Ossman /* 18631c6a0718SPierre Ossman * Init tasklets. 18641c6a0718SPierre Ossman */ 18651c6a0718SPierre Ossman tasklet_init(&host->card_tasklet, 18661c6a0718SPierre Ossman sdhci_tasklet_card, (unsigned long)host); 18671c6a0718SPierre Ossman tasklet_init(&host->finish_tasklet, 18681c6a0718SPierre Ossman sdhci_tasklet_finish, (unsigned long)host); 18691c6a0718SPierre Ossman 18701c6a0718SPierre Ossman setup_timer(&host->timer, sdhci_timeout_timer, (unsigned long)host); 18711c6a0718SPierre Ossman 18721c6a0718SPierre Ossman ret = request_irq(host->irq, sdhci_irq, IRQF_SHARED, 1873b69c9058SPierre Ossman mmc_hostname(mmc), host); 18741c6a0718SPierre Ossman if (ret) 18751c6a0718SPierre Ossman goto untasklet; 18761c6a0718SPierre Ossman 18772f4cbb3dSNicolas Pitre sdhci_init(host, 0); 18781c6a0718SPierre Ossman 18791c6a0718SPierre Ossman #ifdef CONFIG_MMC_DEBUG 18801c6a0718SPierre Ossman sdhci_dumpregs(host); 18811c6a0718SPierre Ossman #endif 18821c6a0718SPierre Ossman 1883f9134319SPierre Ossman #ifdef SDHCI_USE_LEDS_CLASS 18845dbace0cSHelmut Schaa snprintf(host->led_name, sizeof(host->led_name), 18855dbace0cSHelmut Schaa "%s::", mmc_hostname(mmc)); 18865dbace0cSHelmut Schaa host->led.name = host->led_name; 18872f730fecSPierre Ossman host->led.brightness = LED_OFF; 18882f730fecSPierre Ossman host->led.default_trigger = mmc_hostname(mmc); 18892f730fecSPierre Ossman host->led.brightness_set = sdhci_led_control; 18902f730fecSPierre Ossman 1891b8c86fc5SPierre Ossman ret = led_classdev_register(mmc_dev(mmc), &host->led); 18922f730fecSPierre Ossman if (ret) 18932f730fecSPierre Ossman goto reset; 18942f730fecSPierre Ossman #endif 18952f730fecSPierre Ossman 18961c6a0718SPierre Ossman mmiowb(); 18971c6a0718SPierre Ossman 18981c6a0718SPierre Ossman mmc_add_host(mmc); 18991c6a0718SPierre Ossman 1900a13abc7bSRichard Röjfors printk(KERN_INFO "%s: SDHCI controller on %s [%s] using %s\n", 1901d1b26863SKay Sievers mmc_hostname(mmc), host->hw_name, dev_name(mmc_dev(mmc)), 1902a13abc7bSRichard Röjfors (host->flags & SDHCI_USE_ADMA) ? "ADMA" : 1903a13abc7bSRichard Röjfors (host->flags & SDHCI_USE_SDMA) ? "DMA" : "PIO"); 19041c6a0718SPierre Ossman 19057260cf5eSAnton Vorontsov sdhci_enable_card_detection(host); 19067260cf5eSAnton Vorontsov 19071c6a0718SPierre Ossman return 0; 19081c6a0718SPierre Ossman 1909f9134319SPierre Ossman #ifdef SDHCI_USE_LEDS_CLASS 19102f730fecSPierre Ossman reset: 19112f730fecSPierre Ossman sdhci_reset(host, SDHCI_RESET_ALL); 19122f730fecSPierre Ossman free_irq(host->irq, host); 19132f730fecSPierre Ossman #endif 19141c6a0718SPierre Ossman untasklet: 19151c6a0718SPierre Ossman tasklet_kill(&host->card_tasklet); 19161c6a0718SPierre Ossman tasklet_kill(&host->finish_tasklet); 19171c6a0718SPierre Ossman 19181c6a0718SPierre Ossman return ret; 19191c6a0718SPierre Ossman } 19201c6a0718SPierre Ossman 1921b8c86fc5SPierre Ossman EXPORT_SYMBOL_GPL(sdhci_add_host); 1922b8c86fc5SPierre Ossman 19231e72859eSPierre Ossman void sdhci_remove_host(struct sdhci_host *host, int dead) 19241c6a0718SPierre Ossman { 19251e72859eSPierre Ossman unsigned long flags; 19261e72859eSPierre Ossman 19271e72859eSPierre Ossman if (dead) { 19281e72859eSPierre Ossman spin_lock_irqsave(&host->lock, flags); 19291e72859eSPierre Ossman 19301e72859eSPierre Ossman host->flags |= SDHCI_DEVICE_DEAD; 19311e72859eSPierre Ossman 19321e72859eSPierre Ossman if (host->mrq) { 19331e72859eSPierre Ossman printk(KERN_ERR "%s: Controller removed during " 19341e72859eSPierre Ossman " transfer!\n", mmc_hostname(host->mmc)); 19351e72859eSPierre Ossman 19361e72859eSPierre Ossman host->mrq->cmd->error = -ENOMEDIUM; 19371e72859eSPierre Ossman tasklet_schedule(&host->finish_tasklet); 19381e72859eSPierre Ossman } 19391e72859eSPierre Ossman 19401e72859eSPierre Ossman spin_unlock_irqrestore(&host->lock, flags); 19411e72859eSPierre Ossman } 19421e72859eSPierre Ossman 19437260cf5eSAnton Vorontsov sdhci_disable_card_detection(host); 19447260cf5eSAnton Vorontsov 1945b8c86fc5SPierre Ossman mmc_remove_host(host->mmc); 19461c6a0718SPierre Ossman 1947f9134319SPierre Ossman #ifdef SDHCI_USE_LEDS_CLASS 19482f730fecSPierre Ossman led_classdev_unregister(&host->led); 19492f730fecSPierre Ossman #endif 19502f730fecSPierre Ossman 19511e72859eSPierre Ossman if (!dead) 19521c6a0718SPierre Ossman sdhci_reset(host, SDHCI_RESET_ALL); 19531c6a0718SPierre Ossman 19541c6a0718SPierre Ossman free_irq(host->irq, host); 19551c6a0718SPierre Ossman 19561c6a0718SPierre Ossman del_timer_sync(&host->timer); 19571c6a0718SPierre Ossman 19581c6a0718SPierre Ossman tasklet_kill(&host->card_tasklet); 19591c6a0718SPierre Ossman tasklet_kill(&host->finish_tasklet); 19602134a922SPierre Ossman 19612134a922SPierre Ossman kfree(host->adma_desc); 19622134a922SPierre Ossman kfree(host->align_buffer); 19632134a922SPierre Ossman 19642134a922SPierre Ossman host->adma_desc = NULL; 19652134a922SPierre Ossman host->align_buffer = NULL; 19661c6a0718SPierre Ossman } 19671c6a0718SPierre Ossman 1968b8c86fc5SPierre Ossman EXPORT_SYMBOL_GPL(sdhci_remove_host); 1969b8c86fc5SPierre Ossman 1970b8c86fc5SPierre Ossman void sdhci_free_host(struct sdhci_host *host) 19711c6a0718SPierre Ossman { 1972b8c86fc5SPierre Ossman mmc_free_host(host->mmc); 19731c6a0718SPierre Ossman } 19741c6a0718SPierre Ossman 1975b8c86fc5SPierre Ossman EXPORT_SYMBOL_GPL(sdhci_free_host); 19761c6a0718SPierre Ossman 19771c6a0718SPierre Ossman /*****************************************************************************\ 19781c6a0718SPierre Ossman * * 19791c6a0718SPierre Ossman * Driver init/exit * 19801c6a0718SPierre Ossman * * 19811c6a0718SPierre Ossman \*****************************************************************************/ 19821c6a0718SPierre Ossman 19831c6a0718SPierre Ossman static int __init sdhci_drv_init(void) 19841c6a0718SPierre Ossman { 19851c6a0718SPierre Ossman printk(KERN_INFO DRIVER_NAME 19861c6a0718SPierre Ossman ": Secure Digital Host Controller Interface driver\n"); 19871c6a0718SPierre Ossman printk(KERN_INFO DRIVER_NAME ": Copyright(c) Pierre Ossman\n"); 19881c6a0718SPierre Ossman 1989b8c86fc5SPierre Ossman return 0; 19901c6a0718SPierre Ossman } 19911c6a0718SPierre Ossman 19921c6a0718SPierre Ossman static void __exit sdhci_drv_exit(void) 19931c6a0718SPierre Ossman { 19941c6a0718SPierre Ossman } 19951c6a0718SPierre Ossman 19961c6a0718SPierre Ossman module_init(sdhci_drv_init); 19971c6a0718SPierre Ossman module_exit(sdhci_drv_exit); 19981c6a0718SPierre Ossman 19991c6a0718SPierre Ossman module_param(debug_quirks, uint, 0444); 20001c6a0718SPierre Ossman 200132710e8fSPierre Ossman MODULE_AUTHOR("Pierre Ossman <pierre@ossman.eu>"); 2002b8c86fc5SPierre Ossman MODULE_DESCRIPTION("Secure Digital Host Controller Interface core driver"); 20031c6a0718SPierre Ossman MODULE_LICENSE("GPL"); 20041c6a0718SPierre Ossman 20051c6a0718SPierre Ossman MODULE_PARM_DESC(debug_quirks, "Force certain quirks."); 2006