11c6a0718SPierre Ossman /* 270f10482SPierre Ossman * linux/drivers/mmc/host/sdhci.c - Secure Digital Host Controller Interface driver 31c6a0718SPierre Ossman * 4b69c9058SPierre Ossman * Copyright (C) 2005-2008 Pierre Ossman, All Rights Reserved. 51c6a0718SPierre Ossman * 61c6a0718SPierre Ossman * This program is free software; you can redistribute it and/or modify 71c6a0718SPierre Ossman * it under the terms of the GNU General Public License as published by 81c6a0718SPierre Ossman * the Free Software Foundation; either version 2 of the License, or (at 91c6a0718SPierre Ossman * your option) any later version. 1084c46a53SPierre Ossman * 1184c46a53SPierre Ossman * Thanks to the following companies for their support: 1284c46a53SPierre Ossman * 1384c46a53SPierre Ossman * - JMicron (hardware and technical support) 141c6a0718SPierre Ossman */ 151c6a0718SPierre Ossman 161c6a0718SPierre Ossman #include <linux/delay.h> 171c6a0718SPierre Ossman #include <linux/highmem.h> 18b8c86fc5SPierre Ossman #include <linux/io.h> 191c6a0718SPierre Ossman #include <linux/dma-mapping.h> 205a0e3ad6STejun Heo #include <linux/slab.h> 2111763609SRalf Baechle #include <linux/scatterlist.h> 221c6a0718SPierre Ossman 232f730fecSPierre Ossman #include <linux/leds.h> 242f730fecSPierre Ossman 251c6a0718SPierre Ossman #include <linux/mmc/host.h> 261c6a0718SPierre Ossman 271c6a0718SPierre Ossman #include "sdhci.h" 281c6a0718SPierre Ossman 291c6a0718SPierre Ossman #define DRIVER_NAME "sdhci" 301c6a0718SPierre Ossman 311c6a0718SPierre Ossman #define DBG(f, x...) \ 321c6a0718SPierre Ossman pr_debug(DRIVER_NAME " [%s()]: " f, __func__,## x) 331c6a0718SPierre Ossman 34f9134319SPierre Ossman #if defined(CONFIG_LEDS_CLASS) || (defined(CONFIG_LEDS_CLASS_MODULE) && \ 35f9134319SPierre Ossman defined(CONFIG_MMC_SDHCI_MODULE)) 36f9134319SPierre Ossman #define SDHCI_USE_LEDS_CLASS 37f9134319SPierre Ossman #endif 38f9134319SPierre Ossman 391c6a0718SPierre Ossman static unsigned int debug_quirks = 0; 401c6a0718SPierre Ossman 411c6a0718SPierre Ossman static void sdhci_prepare_data(struct sdhci_host *, struct mmc_data *); 421c6a0718SPierre Ossman static void sdhci_finish_data(struct sdhci_host *); 431c6a0718SPierre Ossman 441c6a0718SPierre Ossman static void sdhci_send_command(struct sdhci_host *, struct mmc_command *); 451c6a0718SPierre Ossman static void sdhci_finish_command(struct sdhci_host *); 461c6a0718SPierre Ossman 471c6a0718SPierre Ossman static void sdhci_dumpregs(struct sdhci_host *host) 481c6a0718SPierre Ossman { 491c6a0718SPierre Ossman printk(KERN_DEBUG DRIVER_NAME ": ============== REGISTER DUMP ==============\n"); 501c6a0718SPierre Ossman 511c6a0718SPierre Ossman printk(KERN_DEBUG DRIVER_NAME ": Sys addr: 0x%08x | Version: 0x%08x\n", 524e4141a5SAnton Vorontsov sdhci_readl(host, SDHCI_DMA_ADDRESS), 534e4141a5SAnton Vorontsov sdhci_readw(host, SDHCI_HOST_VERSION)); 541c6a0718SPierre Ossman printk(KERN_DEBUG DRIVER_NAME ": Blk size: 0x%08x | Blk cnt: 0x%08x\n", 554e4141a5SAnton Vorontsov sdhci_readw(host, SDHCI_BLOCK_SIZE), 564e4141a5SAnton Vorontsov sdhci_readw(host, SDHCI_BLOCK_COUNT)); 571c6a0718SPierre Ossman printk(KERN_DEBUG DRIVER_NAME ": Argument: 0x%08x | Trn mode: 0x%08x\n", 584e4141a5SAnton Vorontsov sdhci_readl(host, SDHCI_ARGUMENT), 594e4141a5SAnton Vorontsov sdhci_readw(host, SDHCI_TRANSFER_MODE)); 601c6a0718SPierre Ossman printk(KERN_DEBUG DRIVER_NAME ": Present: 0x%08x | Host ctl: 0x%08x\n", 614e4141a5SAnton Vorontsov sdhci_readl(host, SDHCI_PRESENT_STATE), 624e4141a5SAnton Vorontsov sdhci_readb(host, SDHCI_HOST_CONTROL)); 631c6a0718SPierre Ossman printk(KERN_DEBUG DRIVER_NAME ": Power: 0x%08x | Blk gap: 0x%08x\n", 644e4141a5SAnton Vorontsov sdhci_readb(host, SDHCI_POWER_CONTROL), 654e4141a5SAnton Vorontsov sdhci_readb(host, SDHCI_BLOCK_GAP_CONTROL)); 661c6a0718SPierre Ossman printk(KERN_DEBUG DRIVER_NAME ": Wake-up: 0x%08x | Clock: 0x%08x\n", 674e4141a5SAnton Vorontsov sdhci_readb(host, SDHCI_WAKE_UP_CONTROL), 684e4141a5SAnton Vorontsov sdhci_readw(host, SDHCI_CLOCK_CONTROL)); 691c6a0718SPierre Ossman printk(KERN_DEBUG DRIVER_NAME ": Timeout: 0x%08x | Int stat: 0x%08x\n", 704e4141a5SAnton Vorontsov sdhci_readb(host, SDHCI_TIMEOUT_CONTROL), 714e4141a5SAnton Vorontsov sdhci_readl(host, SDHCI_INT_STATUS)); 721c6a0718SPierre Ossman printk(KERN_DEBUG DRIVER_NAME ": Int enab: 0x%08x | Sig enab: 0x%08x\n", 734e4141a5SAnton Vorontsov sdhci_readl(host, SDHCI_INT_ENABLE), 744e4141a5SAnton Vorontsov sdhci_readl(host, SDHCI_SIGNAL_ENABLE)); 751c6a0718SPierre Ossman printk(KERN_DEBUG DRIVER_NAME ": AC12 err: 0x%08x | Slot int: 0x%08x\n", 764e4141a5SAnton Vorontsov sdhci_readw(host, SDHCI_ACMD12_ERR), 774e4141a5SAnton Vorontsov sdhci_readw(host, SDHCI_SLOT_INT_STATUS)); 781c6a0718SPierre Ossman printk(KERN_DEBUG DRIVER_NAME ": Caps: 0x%08x | Max curr: 0x%08x\n", 794e4141a5SAnton Vorontsov sdhci_readl(host, SDHCI_CAPABILITIES), 804e4141a5SAnton Vorontsov sdhci_readl(host, SDHCI_MAX_CURRENT)); 811c6a0718SPierre Ossman 82be3f4ae0SBen Dooks if (host->flags & SDHCI_USE_ADMA) 83be3f4ae0SBen Dooks printk(KERN_DEBUG DRIVER_NAME ": ADMA Err: 0x%08x | ADMA Ptr: 0x%08x\n", 84be3f4ae0SBen Dooks readl(host->ioaddr + SDHCI_ADMA_ERROR), 85be3f4ae0SBen Dooks readl(host->ioaddr + SDHCI_ADMA_ADDRESS)); 86be3f4ae0SBen Dooks 871c6a0718SPierre Ossman printk(KERN_DEBUG DRIVER_NAME ": ===========================================\n"); 881c6a0718SPierre Ossman } 891c6a0718SPierre Ossman 901c6a0718SPierre Ossman /*****************************************************************************\ 911c6a0718SPierre Ossman * * 921c6a0718SPierre Ossman * Low level functions * 931c6a0718SPierre Ossman * * 941c6a0718SPierre Ossman \*****************************************************************************/ 951c6a0718SPierre Ossman 967260cf5eSAnton Vorontsov static void sdhci_clear_set_irqs(struct sdhci_host *host, u32 clear, u32 set) 977260cf5eSAnton Vorontsov { 987260cf5eSAnton Vorontsov u32 ier; 997260cf5eSAnton Vorontsov 1007260cf5eSAnton Vorontsov ier = sdhci_readl(host, SDHCI_INT_ENABLE); 1017260cf5eSAnton Vorontsov ier &= ~clear; 1027260cf5eSAnton Vorontsov ier |= set; 1037260cf5eSAnton Vorontsov sdhci_writel(host, ier, SDHCI_INT_ENABLE); 1047260cf5eSAnton Vorontsov sdhci_writel(host, ier, SDHCI_SIGNAL_ENABLE); 1057260cf5eSAnton Vorontsov } 1067260cf5eSAnton Vorontsov 1077260cf5eSAnton Vorontsov static void sdhci_unmask_irqs(struct sdhci_host *host, u32 irqs) 1087260cf5eSAnton Vorontsov { 1097260cf5eSAnton Vorontsov sdhci_clear_set_irqs(host, 0, irqs); 1107260cf5eSAnton Vorontsov } 1117260cf5eSAnton Vorontsov 1127260cf5eSAnton Vorontsov static void sdhci_mask_irqs(struct sdhci_host *host, u32 irqs) 1137260cf5eSAnton Vorontsov { 1147260cf5eSAnton Vorontsov sdhci_clear_set_irqs(host, irqs, 0); 1157260cf5eSAnton Vorontsov } 1167260cf5eSAnton Vorontsov 1177260cf5eSAnton Vorontsov static void sdhci_set_card_detection(struct sdhci_host *host, bool enable) 1187260cf5eSAnton Vorontsov { 1197260cf5eSAnton Vorontsov u32 irqs = SDHCI_INT_CARD_REMOVE | SDHCI_INT_CARD_INSERT; 1207260cf5eSAnton Vorontsov 12168d1fb7eSAnton Vorontsov if (host->quirks & SDHCI_QUIRK_BROKEN_CARD_DETECTION) 12268d1fb7eSAnton Vorontsov return; 12368d1fb7eSAnton Vorontsov 1247260cf5eSAnton Vorontsov if (enable) 1257260cf5eSAnton Vorontsov sdhci_unmask_irqs(host, irqs); 1267260cf5eSAnton Vorontsov else 1277260cf5eSAnton Vorontsov sdhci_mask_irqs(host, irqs); 1287260cf5eSAnton Vorontsov } 1297260cf5eSAnton Vorontsov 1307260cf5eSAnton Vorontsov static void sdhci_enable_card_detection(struct sdhci_host *host) 1317260cf5eSAnton Vorontsov { 1327260cf5eSAnton Vorontsov sdhci_set_card_detection(host, true); 1337260cf5eSAnton Vorontsov } 1347260cf5eSAnton Vorontsov 1357260cf5eSAnton Vorontsov static void sdhci_disable_card_detection(struct sdhci_host *host) 1367260cf5eSAnton Vorontsov { 1377260cf5eSAnton Vorontsov sdhci_set_card_detection(host, false); 1387260cf5eSAnton Vorontsov } 1397260cf5eSAnton Vorontsov 1401c6a0718SPierre Ossman static void sdhci_reset(struct sdhci_host *host, u8 mask) 1411c6a0718SPierre Ossman { 1421c6a0718SPierre Ossman unsigned long timeout; 143063a9dbbSAnton Vorontsov u32 uninitialized_var(ier); 1441c6a0718SPierre Ossman 145b8c86fc5SPierre Ossman if (host->quirks & SDHCI_QUIRK_NO_CARD_NO_RESET) { 1464e4141a5SAnton Vorontsov if (!(sdhci_readl(host, SDHCI_PRESENT_STATE) & 1471c6a0718SPierre Ossman SDHCI_CARD_PRESENT)) 1481c6a0718SPierre Ossman return; 1491c6a0718SPierre Ossman } 1501c6a0718SPierre Ossman 151063a9dbbSAnton Vorontsov if (host->quirks & SDHCI_QUIRK_RESTORE_IRQS_AFTER_RESET) 152063a9dbbSAnton Vorontsov ier = sdhci_readl(host, SDHCI_INT_ENABLE); 153063a9dbbSAnton Vorontsov 1544e4141a5SAnton Vorontsov sdhci_writeb(host, mask, SDHCI_SOFTWARE_RESET); 1551c6a0718SPierre Ossman 1561c6a0718SPierre Ossman if (mask & SDHCI_RESET_ALL) 1571c6a0718SPierre Ossman host->clock = 0; 1581c6a0718SPierre Ossman 1591c6a0718SPierre Ossman /* Wait max 100 ms */ 1601c6a0718SPierre Ossman timeout = 100; 1611c6a0718SPierre Ossman 1621c6a0718SPierre Ossman /* hw clears the bit when it's done */ 1634e4141a5SAnton Vorontsov while (sdhci_readb(host, SDHCI_SOFTWARE_RESET) & mask) { 1641c6a0718SPierre Ossman if (timeout == 0) { 1651c6a0718SPierre Ossman printk(KERN_ERR "%s: Reset 0x%x never completed.\n", 1661c6a0718SPierre Ossman mmc_hostname(host->mmc), (int)mask); 1671c6a0718SPierre Ossman sdhci_dumpregs(host); 1681c6a0718SPierre Ossman return; 1691c6a0718SPierre Ossman } 1701c6a0718SPierre Ossman timeout--; 1711c6a0718SPierre Ossman mdelay(1); 1721c6a0718SPierre Ossman } 173063a9dbbSAnton Vorontsov 174063a9dbbSAnton Vorontsov if (host->quirks & SDHCI_QUIRK_RESTORE_IRQS_AFTER_RESET) 175063a9dbbSAnton Vorontsov sdhci_clear_set_irqs(host, SDHCI_INT_ALL_MASK, ier); 1761c6a0718SPierre Ossman } 1771c6a0718SPierre Ossman 1782f4cbb3dSNicolas Pitre static void sdhci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios); 1792f4cbb3dSNicolas Pitre 1802f4cbb3dSNicolas Pitre static void sdhci_init(struct sdhci_host *host, int soft) 1811c6a0718SPierre Ossman { 1822f4cbb3dSNicolas Pitre if (soft) 1832f4cbb3dSNicolas Pitre sdhci_reset(host, SDHCI_RESET_CMD|SDHCI_RESET_DATA); 1842f4cbb3dSNicolas Pitre else 1851c6a0718SPierre Ossman sdhci_reset(host, SDHCI_RESET_ALL); 1861c6a0718SPierre Ossman 1877260cf5eSAnton Vorontsov sdhci_clear_set_irqs(host, SDHCI_INT_ALL_MASK, 1887260cf5eSAnton Vorontsov SDHCI_INT_BUS_POWER | SDHCI_INT_DATA_END_BIT | 1891c6a0718SPierre Ossman SDHCI_INT_DATA_CRC | SDHCI_INT_DATA_TIMEOUT | SDHCI_INT_INDEX | 1901c6a0718SPierre Ossman SDHCI_INT_END_BIT | SDHCI_INT_CRC | SDHCI_INT_TIMEOUT | 1916aa943abSAnton Vorontsov SDHCI_INT_DATA_END | SDHCI_INT_RESPONSE); 1922f4cbb3dSNicolas Pitre 1932f4cbb3dSNicolas Pitre if (soft) { 1942f4cbb3dSNicolas Pitre /* force clock reconfiguration */ 1952f4cbb3dSNicolas Pitre host->clock = 0; 1962f4cbb3dSNicolas Pitre sdhci_set_ios(host->mmc, &host->mmc->ios); 1972f4cbb3dSNicolas Pitre } 1987260cf5eSAnton Vorontsov } 1991c6a0718SPierre Ossman 2007260cf5eSAnton Vorontsov static void sdhci_reinit(struct sdhci_host *host) 2017260cf5eSAnton Vorontsov { 2022f4cbb3dSNicolas Pitre sdhci_init(host, 0); 2037260cf5eSAnton Vorontsov sdhci_enable_card_detection(host); 2041c6a0718SPierre Ossman } 2051c6a0718SPierre Ossman 2061c6a0718SPierre Ossman static void sdhci_activate_led(struct sdhci_host *host) 2071c6a0718SPierre Ossman { 2081c6a0718SPierre Ossman u8 ctrl; 2091c6a0718SPierre Ossman 2104e4141a5SAnton Vorontsov ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL); 2111c6a0718SPierre Ossman ctrl |= SDHCI_CTRL_LED; 2124e4141a5SAnton Vorontsov sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL); 2131c6a0718SPierre Ossman } 2141c6a0718SPierre Ossman 2151c6a0718SPierre Ossman static void sdhci_deactivate_led(struct sdhci_host *host) 2161c6a0718SPierre Ossman { 2171c6a0718SPierre Ossman u8 ctrl; 2181c6a0718SPierre Ossman 2194e4141a5SAnton Vorontsov ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL); 2201c6a0718SPierre Ossman ctrl &= ~SDHCI_CTRL_LED; 2214e4141a5SAnton Vorontsov sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL); 2221c6a0718SPierre Ossman } 2231c6a0718SPierre Ossman 224f9134319SPierre Ossman #ifdef SDHCI_USE_LEDS_CLASS 2252f730fecSPierre Ossman static void sdhci_led_control(struct led_classdev *led, 2262f730fecSPierre Ossman enum led_brightness brightness) 2272f730fecSPierre Ossman { 2282f730fecSPierre Ossman struct sdhci_host *host = container_of(led, struct sdhci_host, led); 2292f730fecSPierre Ossman unsigned long flags; 2302f730fecSPierre Ossman 2312f730fecSPierre Ossman spin_lock_irqsave(&host->lock, flags); 2322f730fecSPierre Ossman 2332f730fecSPierre Ossman if (brightness == LED_OFF) 2342f730fecSPierre Ossman sdhci_deactivate_led(host); 2352f730fecSPierre Ossman else 2362f730fecSPierre Ossman sdhci_activate_led(host); 2372f730fecSPierre Ossman 2382f730fecSPierre Ossman spin_unlock_irqrestore(&host->lock, flags); 2392f730fecSPierre Ossman } 2402f730fecSPierre Ossman #endif 2412f730fecSPierre Ossman 2421c6a0718SPierre Ossman /*****************************************************************************\ 2431c6a0718SPierre Ossman * * 2441c6a0718SPierre Ossman * Core functions * 2451c6a0718SPierre Ossman * * 2461c6a0718SPierre Ossman \*****************************************************************************/ 2471c6a0718SPierre Ossman 2481c6a0718SPierre Ossman static void sdhci_read_block_pio(struct sdhci_host *host) 2491c6a0718SPierre Ossman { 2507659150cSPierre Ossman unsigned long flags; 2517659150cSPierre Ossman size_t blksize, len, chunk; 2527244b85bSSteven Noonan u32 uninitialized_var(scratch); 2537659150cSPierre Ossman u8 *buf; 2541c6a0718SPierre Ossman 2551c6a0718SPierre Ossman DBG("PIO reading\n"); 2561c6a0718SPierre Ossman 2571c6a0718SPierre Ossman blksize = host->data->blksz; 2587659150cSPierre Ossman chunk = 0; 2591c6a0718SPierre Ossman 2607659150cSPierre Ossman local_irq_save(flags); 2611c6a0718SPierre Ossman 2621c6a0718SPierre Ossman while (blksize) { 2637659150cSPierre Ossman if (!sg_miter_next(&host->sg_miter)) 2647659150cSPierre Ossman BUG(); 2657659150cSPierre Ossman 2667659150cSPierre Ossman len = min(host->sg_miter.length, blksize); 2677659150cSPierre Ossman 2687659150cSPierre Ossman blksize -= len; 2697659150cSPierre Ossman host->sg_miter.consumed = len; 2707659150cSPierre Ossman 2717659150cSPierre Ossman buf = host->sg_miter.addr; 2727659150cSPierre Ossman 2737659150cSPierre Ossman while (len) { 2747659150cSPierre Ossman if (chunk == 0) { 2754e4141a5SAnton Vorontsov scratch = sdhci_readl(host, SDHCI_BUFFER); 2767659150cSPierre Ossman chunk = 4; 2771c6a0718SPierre Ossman } 2781c6a0718SPierre Ossman 2797659150cSPierre Ossman *buf = scratch & 0xFF; 2801c6a0718SPierre Ossman 2817659150cSPierre Ossman buf++; 2827659150cSPierre Ossman scratch >>= 8; 2837659150cSPierre Ossman chunk--; 2847659150cSPierre Ossman len--; 2857659150cSPierre Ossman } 2861c6a0718SPierre Ossman } 2871c6a0718SPierre Ossman 2887659150cSPierre Ossman sg_miter_stop(&host->sg_miter); 2897659150cSPierre Ossman 2907659150cSPierre Ossman local_irq_restore(flags); 2911c6a0718SPierre Ossman } 2921c6a0718SPierre Ossman 2931c6a0718SPierre Ossman static void sdhci_write_block_pio(struct sdhci_host *host) 2941c6a0718SPierre Ossman { 2957659150cSPierre Ossman unsigned long flags; 2967659150cSPierre Ossman size_t blksize, len, chunk; 2977659150cSPierre Ossman u32 scratch; 2987659150cSPierre Ossman u8 *buf; 2991c6a0718SPierre Ossman 3001c6a0718SPierre Ossman DBG("PIO writing\n"); 3011c6a0718SPierre Ossman 3021c6a0718SPierre Ossman blksize = host->data->blksz; 3037659150cSPierre Ossman chunk = 0; 3047659150cSPierre Ossman scratch = 0; 3051c6a0718SPierre Ossman 3067659150cSPierre Ossman local_irq_save(flags); 3071c6a0718SPierre Ossman 3081c6a0718SPierre Ossman while (blksize) { 3097659150cSPierre Ossman if (!sg_miter_next(&host->sg_miter)) 3107659150cSPierre Ossman BUG(); 3111c6a0718SPierre Ossman 3127659150cSPierre Ossman len = min(host->sg_miter.length, blksize); 3131c6a0718SPierre Ossman 3147659150cSPierre Ossman blksize -= len; 3157659150cSPierre Ossman host->sg_miter.consumed = len; 3167659150cSPierre Ossman 3177659150cSPierre Ossman buf = host->sg_miter.addr; 3187659150cSPierre Ossman 3197659150cSPierre Ossman while (len) { 3207659150cSPierre Ossman scratch |= (u32)*buf << (chunk * 8); 3217659150cSPierre Ossman 3227659150cSPierre Ossman buf++; 3237659150cSPierre Ossman chunk++; 3247659150cSPierre Ossman len--; 3257659150cSPierre Ossman 3267659150cSPierre Ossman if ((chunk == 4) || ((len == 0) && (blksize == 0))) { 3274e4141a5SAnton Vorontsov sdhci_writel(host, scratch, SDHCI_BUFFER); 3287659150cSPierre Ossman chunk = 0; 3297659150cSPierre Ossman scratch = 0; 3307659150cSPierre Ossman } 3317659150cSPierre Ossman } 3321c6a0718SPierre Ossman } 3331c6a0718SPierre Ossman 3347659150cSPierre Ossman sg_miter_stop(&host->sg_miter); 3351c6a0718SPierre Ossman 3367659150cSPierre Ossman local_irq_restore(flags); 3371c6a0718SPierre Ossman } 3381c6a0718SPierre Ossman 3391c6a0718SPierre Ossman static void sdhci_transfer_pio(struct sdhci_host *host) 3401c6a0718SPierre Ossman { 3411c6a0718SPierre Ossman u32 mask; 3421c6a0718SPierre Ossman 3431c6a0718SPierre Ossman BUG_ON(!host->data); 3441c6a0718SPierre Ossman 3457659150cSPierre Ossman if (host->blocks == 0) 3461c6a0718SPierre Ossman return; 3471c6a0718SPierre Ossman 3481c6a0718SPierre Ossman if (host->data->flags & MMC_DATA_READ) 3491c6a0718SPierre Ossman mask = SDHCI_DATA_AVAILABLE; 3501c6a0718SPierre Ossman else 3511c6a0718SPierre Ossman mask = SDHCI_SPACE_AVAILABLE; 3521c6a0718SPierre Ossman 3534a3cba32SPierre Ossman /* 3544a3cba32SPierre Ossman * Some controllers (JMicron JMB38x) mess up the buffer bits 3554a3cba32SPierre Ossman * for transfers < 4 bytes. As long as it is just one block, 3564a3cba32SPierre Ossman * we can ignore the bits. 3574a3cba32SPierre Ossman */ 3584a3cba32SPierre Ossman if ((host->quirks & SDHCI_QUIRK_BROKEN_SMALL_PIO) && 3594a3cba32SPierre Ossman (host->data->blocks == 1)) 3604a3cba32SPierre Ossman mask = ~0; 3614a3cba32SPierre Ossman 3624e4141a5SAnton Vorontsov while (sdhci_readl(host, SDHCI_PRESENT_STATE) & mask) { 3633e3bf207SAnton Vorontsov if (host->quirks & SDHCI_QUIRK_PIO_NEEDS_DELAY) 3643e3bf207SAnton Vorontsov udelay(100); 3653e3bf207SAnton Vorontsov 3661c6a0718SPierre Ossman if (host->data->flags & MMC_DATA_READ) 3671c6a0718SPierre Ossman sdhci_read_block_pio(host); 3681c6a0718SPierre Ossman else 3691c6a0718SPierre Ossman sdhci_write_block_pio(host); 3701c6a0718SPierre Ossman 3717659150cSPierre Ossman host->blocks--; 3727659150cSPierre Ossman if (host->blocks == 0) 3731c6a0718SPierre Ossman break; 3741c6a0718SPierre Ossman } 3751c6a0718SPierre Ossman 3761c6a0718SPierre Ossman DBG("PIO transfer complete.\n"); 3771c6a0718SPierre Ossman } 3781c6a0718SPierre Ossman 3792134a922SPierre Ossman static char *sdhci_kmap_atomic(struct scatterlist *sg, unsigned long *flags) 3802134a922SPierre Ossman { 3812134a922SPierre Ossman local_irq_save(*flags); 3822134a922SPierre Ossman return kmap_atomic(sg_page(sg), KM_BIO_SRC_IRQ) + sg->offset; 3832134a922SPierre Ossman } 3842134a922SPierre Ossman 3852134a922SPierre Ossman static void sdhci_kunmap_atomic(void *buffer, unsigned long *flags) 3862134a922SPierre Ossman { 3872134a922SPierre Ossman kunmap_atomic(buffer, KM_BIO_SRC_IRQ); 3882134a922SPierre Ossman local_irq_restore(*flags); 3892134a922SPierre Ossman } 3902134a922SPierre Ossman 391118cd17dSBen Dooks static void sdhci_set_adma_desc(u8 *desc, u32 addr, int len, unsigned cmd) 392118cd17dSBen Dooks { 3939e506f35SBen Dooks __le32 *dataddr = (__le32 __force *)(desc + 4); 3949e506f35SBen Dooks __le16 *cmdlen = (__le16 __force *)desc; 395118cd17dSBen Dooks 3969e506f35SBen Dooks /* SDHCI specification says ADMA descriptors should be 4 byte 3979e506f35SBen Dooks * aligned, so using 16 or 32bit operations should be safe. */ 398118cd17dSBen Dooks 3999e506f35SBen Dooks cmdlen[0] = cpu_to_le16(cmd); 4009e506f35SBen Dooks cmdlen[1] = cpu_to_le16(len); 4019e506f35SBen Dooks 4029e506f35SBen Dooks dataddr[0] = cpu_to_le32(addr); 403118cd17dSBen Dooks } 404118cd17dSBen Dooks 4058f1934ceSPierre Ossman static int sdhci_adma_table_pre(struct sdhci_host *host, 4062134a922SPierre Ossman struct mmc_data *data) 4072134a922SPierre Ossman { 4082134a922SPierre Ossman int direction; 4092134a922SPierre Ossman 4102134a922SPierre Ossman u8 *desc; 4112134a922SPierre Ossman u8 *align; 4122134a922SPierre Ossman dma_addr_t addr; 4132134a922SPierre Ossman dma_addr_t align_addr; 4142134a922SPierre Ossman int len, offset; 4152134a922SPierre Ossman 4162134a922SPierre Ossman struct scatterlist *sg; 4172134a922SPierre Ossman int i; 4182134a922SPierre Ossman char *buffer; 4192134a922SPierre Ossman unsigned long flags; 4202134a922SPierre Ossman 4212134a922SPierre Ossman /* 4222134a922SPierre Ossman * The spec does not specify endianness of descriptor table. 4232134a922SPierre Ossman * We currently guess that it is LE. 4242134a922SPierre Ossman */ 4252134a922SPierre Ossman 4262134a922SPierre Ossman if (data->flags & MMC_DATA_READ) 4272134a922SPierre Ossman direction = DMA_FROM_DEVICE; 4282134a922SPierre Ossman else 4292134a922SPierre Ossman direction = DMA_TO_DEVICE; 4302134a922SPierre Ossman 4312134a922SPierre Ossman /* 4322134a922SPierre Ossman * The ADMA descriptor table is mapped further down as we 4332134a922SPierre Ossman * need to fill it with data first. 4342134a922SPierre Ossman */ 4352134a922SPierre Ossman 4362134a922SPierre Ossman host->align_addr = dma_map_single(mmc_dev(host->mmc), 4372134a922SPierre Ossman host->align_buffer, 128 * 4, direction); 4388d8bb39bSFUJITA Tomonori if (dma_mapping_error(mmc_dev(host->mmc), host->align_addr)) 4398f1934ceSPierre Ossman goto fail; 4402134a922SPierre Ossman BUG_ON(host->align_addr & 0x3); 4412134a922SPierre Ossman 4422134a922SPierre Ossman host->sg_count = dma_map_sg(mmc_dev(host->mmc), 4432134a922SPierre Ossman data->sg, data->sg_len, direction); 4448f1934ceSPierre Ossman if (host->sg_count == 0) 4458f1934ceSPierre Ossman goto unmap_align; 4462134a922SPierre Ossman 4472134a922SPierre Ossman desc = host->adma_desc; 4482134a922SPierre Ossman align = host->align_buffer; 4492134a922SPierre Ossman 4502134a922SPierre Ossman align_addr = host->align_addr; 4512134a922SPierre Ossman 4522134a922SPierre Ossman for_each_sg(data->sg, sg, host->sg_count, i) { 4532134a922SPierre Ossman addr = sg_dma_address(sg); 4542134a922SPierre Ossman len = sg_dma_len(sg); 4552134a922SPierre Ossman 4562134a922SPierre Ossman /* 4572134a922SPierre Ossman * The SDHCI specification states that ADMA 4582134a922SPierre Ossman * addresses must be 32-bit aligned. If they 4592134a922SPierre Ossman * aren't, then we use a bounce buffer for 4602134a922SPierre Ossman * the (up to three) bytes that screw up the 4612134a922SPierre Ossman * alignment. 4622134a922SPierre Ossman */ 4632134a922SPierre Ossman offset = (4 - (addr & 0x3)) & 0x3; 4642134a922SPierre Ossman if (offset) { 4652134a922SPierre Ossman if (data->flags & MMC_DATA_WRITE) { 4662134a922SPierre Ossman buffer = sdhci_kmap_atomic(sg, &flags); 4676cefd05fSPierre Ossman WARN_ON(((long)buffer & PAGE_MASK) > (PAGE_SIZE - 3)); 4682134a922SPierre Ossman memcpy(align, buffer, offset); 4692134a922SPierre Ossman sdhci_kunmap_atomic(buffer, &flags); 4702134a922SPierre Ossman } 4712134a922SPierre Ossman 472118cd17dSBen Dooks /* tran, valid */ 473118cd17dSBen Dooks sdhci_set_adma_desc(desc, align_addr, offset, 0x21); 4742134a922SPierre Ossman 4752134a922SPierre Ossman BUG_ON(offset > 65536); 4762134a922SPierre Ossman 4772134a922SPierre Ossman align += 4; 4782134a922SPierre Ossman align_addr += 4; 4792134a922SPierre Ossman 4802134a922SPierre Ossman desc += 8; 4812134a922SPierre Ossman 4822134a922SPierre Ossman addr += offset; 4832134a922SPierre Ossman len -= offset; 4842134a922SPierre Ossman } 4852134a922SPierre Ossman 4862134a922SPierre Ossman BUG_ON(len > 65536); 4872134a922SPierre Ossman 488118cd17dSBen Dooks /* tran, valid */ 489118cd17dSBen Dooks sdhci_set_adma_desc(desc, addr, len, 0x21); 4902134a922SPierre Ossman desc += 8; 4912134a922SPierre Ossman 4922134a922SPierre Ossman /* 4932134a922SPierre Ossman * If this triggers then we have a calculation bug 4942134a922SPierre Ossman * somewhere. :/ 4952134a922SPierre Ossman */ 4962134a922SPierre Ossman WARN_ON((desc - host->adma_desc) > (128 * 2 + 1) * 4); 4972134a922SPierre Ossman } 4982134a922SPierre Ossman 49970764a90SThomas Abraham if (host->quirks & SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC) { 50070764a90SThomas Abraham /* 50170764a90SThomas Abraham * Mark the last descriptor as the terminating descriptor 50270764a90SThomas Abraham */ 50370764a90SThomas Abraham if (desc != host->adma_desc) { 50470764a90SThomas Abraham desc -= 8; 50570764a90SThomas Abraham desc[0] |= 0x2; /* end */ 50670764a90SThomas Abraham } 50770764a90SThomas Abraham } else { 5082134a922SPierre Ossman /* 5092134a922SPierre Ossman * Add a terminating entry. 5102134a922SPierre Ossman */ 5112134a922SPierre Ossman 512118cd17dSBen Dooks /* nop, end, valid */ 513118cd17dSBen Dooks sdhci_set_adma_desc(desc, 0, 0, 0x3); 51470764a90SThomas Abraham } 5152134a922SPierre Ossman 5162134a922SPierre Ossman /* 5172134a922SPierre Ossman * Resync align buffer as we might have changed it. 5182134a922SPierre Ossman */ 5192134a922SPierre Ossman if (data->flags & MMC_DATA_WRITE) { 5202134a922SPierre Ossman dma_sync_single_for_device(mmc_dev(host->mmc), 5212134a922SPierre Ossman host->align_addr, 128 * 4, direction); 5222134a922SPierre Ossman } 5232134a922SPierre Ossman 5242134a922SPierre Ossman host->adma_addr = dma_map_single(mmc_dev(host->mmc), 5252134a922SPierre Ossman host->adma_desc, (128 * 2 + 1) * 4, DMA_TO_DEVICE); 526980167b7SPierre Ossman if (dma_mapping_error(mmc_dev(host->mmc), host->adma_addr)) 5278f1934ceSPierre Ossman goto unmap_entries; 5282134a922SPierre Ossman BUG_ON(host->adma_addr & 0x3); 5298f1934ceSPierre Ossman 5308f1934ceSPierre Ossman return 0; 5318f1934ceSPierre Ossman 5328f1934ceSPierre Ossman unmap_entries: 5338f1934ceSPierre Ossman dma_unmap_sg(mmc_dev(host->mmc), data->sg, 5348f1934ceSPierre Ossman data->sg_len, direction); 5358f1934ceSPierre Ossman unmap_align: 5368f1934ceSPierre Ossman dma_unmap_single(mmc_dev(host->mmc), host->align_addr, 5378f1934ceSPierre Ossman 128 * 4, direction); 5388f1934ceSPierre Ossman fail: 5398f1934ceSPierre Ossman return -EINVAL; 5402134a922SPierre Ossman } 5412134a922SPierre Ossman 5422134a922SPierre Ossman static void sdhci_adma_table_post(struct sdhci_host *host, 5432134a922SPierre Ossman struct mmc_data *data) 5442134a922SPierre Ossman { 5452134a922SPierre Ossman int direction; 5462134a922SPierre Ossman 5472134a922SPierre Ossman struct scatterlist *sg; 5482134a922SPierre Ossman int i, size; 5492134a922SPierre Ossman u8 *align; 5502134a922SPierre Ossman char *buffer; 5512134a922SPierre Ossman unsigned long flags; 5522134a922SPierre Ossman 5532134a922SPierre Ossman if (data->flags & MMC_DATA_READ) 5542134a922SPierre Ossman direction = DMA_FROM_DEVICE; 5552134a922SPierre Ossman else 5562134a922SPierre Ossman direction = DMA_TO_DEVICE; 5572134a922SPierre Ossman 5582134a922SPierre Ossman dma_unmap_single(mmc_dev(host->mmc), host->adma_addr, 5592134a922SPierre Ossman (128 * 2 + 1) * 4, DMA_TO_DEVICE); 5602134a922SPierre Ossman 5612134a922SPierre Ossman dma_unmap_single(mmc_dev(host->mmc), host->align_addr, 5622134a922SPierre Ossman 128 * 4, direction); 5632134a922SPierre Ossman 5642134a922SPierre Ossman if (data->flags & MMC_DATA_READ) { 5652134a922SPierre Ossman dma_sync_sg_for_cpu(mmc_dev(host->mmc), data->sg, 5662134a922SPierre Ossman data->sg_len, direction); 5672134a922SPierre Ossman 5682134a922SPierre Ossman align = host->align_buffer; 5692134a922SPierre Ossman 5702134a922SPierre Ossman for_each_sg(data->sg, sg, host->sg_count, i) { 5712134a922SPierre Ossman if (sg_dma_address(sg) & 0x3) { 5722134a922SPierre Ossman size = 4 - (sg_dma_address(sg) & 0x3); 5732134a922SPierre Ossman 5742134a922SPierre Ossman buffer = sdhci_kmap_atomic(sg, &flags); 5756cefd05fSPierre Ossman WARN_ON(((long)buffer & PAGE_MASK) > (PAGE_SIZE - 3)); 5762134a922SPierre Ossman memcpy(buffer, align, size); 5772134a922SPierre Ossman sdhci_kunmap_atomic(buffer, &flags); 5782134a922SPierre Ossman 5792134a922SPierre Ossman align += 4; 5802134a922SPierre Ossman } 5812134a922SPierre Ossman } 5822134a922SPierre Ossman } 5832134a922SPierre Ossman 5842134a922SPierre Ossman dma_unmap_sg(mmc_dev(host->mmc), data->sg, 5852134a922SPierre Ossman data->sg_len, direction); 5862134a922SPierre Ossman } 5872134a922SPierre Ossman 588ee53ab5dSPierre Ossman static u8 sdhci_calc_timeout(struct sdhci_host *host, struct mmc_data *data) 5891c6a0718SPierre Ossman { 5901c6a0718SPierre Ossman u8 count; 5911c6a0718SPierre Ossman unsigned target_timeout, current_timeout; 5921c6a0718SPierre Ossman 593ee53ab5dSPierre Ossman /* 594ee53ab5dSPierre Ossman * If the host controller provides us with an incorrect timeout 595ee53ab5dSPierre Ossman * value, just skip the check and use 0xE. The hardware may take 596ee53ab5dSPierre Ossman * longer to time out, but that's much better than having a too-short 597ee53ab5dSPierre Ossman * timeout value. 598ee53ab5dSPierre Ossman */ 59911a2f1b7SPierre Ossman if (host->quirks & SDHCI_QUIRK_BROKEN_TIMEOUT_VAL) 600ee53ab5dSPierre Ossman return 0xE; 601e538fbe8SPierre Ossman 6021c6a0718SPierre Ossman /* timeout in us */ 6031c6a0718SPierre Ossman target_timeout = data->timeout_ns / 1000 + 6041c6a0718SPierre Ossman data->timeout_clks / host->clock; 6051c6a0718SPierre Ossman 60681b39802SAnton Vorontsov if (host->quirks & SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK) 60781b39802SAnton Vorontsov host->timeout_clk = host->clock / 1000; 60881b39802SAnton Vorontsov 6091c6a0718SPierre Ossman /* 6101c6a0718SPierre Ossman * Figure out needed cycles. 6111c6a0718SPierre Ossman * We do this in steps in order to fit inside a 32 bit int. 6121c6a0718SPierre Ossman * The first step is the minimum timeout, which will have a 6131c6a0718SPierre Ossman * minimum resolution of 6 bits: 6141c6a0718SPierre Ossman * (1) 2^13*1000 > 2^22, 6151c6a0718SPierre Ossman * (2) host->timeout_clk < 2^16 6161c6a0718SPierre Ossman * => 6171c6a0718SPierre Ossman * (1) / (2) > 2^6 6181c6a0718SPierre Ossman */ 6191c6a0718SPierre Ossman count = 0; 6201c6a0718SPierre Ossman current_timeout = (1 << 13) * 1000 / host->timeout_clk; 6211c6a0718SPierre Ossman while (current_timeout < target_timeout) { 6221c6a0718SPierre Ossman count++; 6231c6a0718SPierre Ossman current_timeout <<= 1; 6241c6a0718SPierre Ossman if (count >= 0xF) 6251c6a0718SPierre Ossman break; 6261c6a0718SPierre Ossman } 6271c6a0718SPierre Ossman 6281c6a0718SPierre Ossman if (count >= 0xF) { 6291c6a0718SPierre Ossman printk(KERN_WARNING "%s: Too large timeout requested!\n", 6301c6a0718SPierre Ossman mmc_hostname(host->mmc)); 6311c6a0718SPierre Ossman count = 0xE; 6321c6a0718SPierre Ossman } 6331c6a0718SPierre Ossman 634ee53ab5dSPierre Ossman return count; 635ee53ab5dSPierre Ossman } 636ee53ab5dSPierre Ossman 6376aa943abSAnton Vorontsov static void sdhci_set_transfer_irqs(struct sdhci_host *host) 6386aa943abSAnton Vorontsov { 6396aa943abSAnton Vorontsov u32 pio_irqs = SDHCI_INT_DATA_AVAIL | SDHCI_INT_SPACE_AVAIL; 6406aa943abSAnton Vorontsov u32 dma_irqs = SDHCI_INT_DMA_END | SDHCI_INT_ADMA_ERROR; 6416aa943abSAnton Vorontsov 6426aa943abSAnton Vorontsov if (host->flags & SDHCI_REQ_USE_DMA) 6436aa943abSAnton Vorontsov sdhci_clear_set_irqs(host, pio_irqs, dma_irqs); 6446aa943abSAnton Vorontsov else 6456aa943abSAnton Vorontsov sdhci_clear_set_irqs(host, dma_irqs, pio_irqs); 6466aa943abSAnton Vorontsov } 6476aa943abSAnton Vorontsov 648ee53ab5dSPierre Ossman static void sdhci_prepare_data(struct sdhci_host *host, struct mmc_data *data) 649ee53ab5dSPierre Ossman { 650ee53ab5dSPierre Ossman u8 count; 6512134a922SPierre Ossman u8 ctrl; 6528f1934ceSPierre Ossman int ret; 653ee53ab5dSPierre Ossman 654ee53ab5dSPierre Ossman WARN_ON(host->data); 655ee53ab5dSPierre Ossman 656ee53ab5dSPierre Ossman if (data == NULL) 657ee53ab5dSPierre Ossman return; 658ee53ab5dSPierre Ossman 659ee53ab5dSPierre Ossman /* Sanity checks */ 660ee53ab5dSPierre Ossman BUG_ON(data->blksz * data->blocks > 524288); 661ee53ab5dSPierre Ossman BUG_ON(data->blksz > host->mmc->max_blk_size); 662ee53ab5dSPierre Ossman BUG_ON(data->blocks > 65535); 663ee53ab5dSPierre Ossman 664ee53ab5dSPierre Ossman host->data = data; 665ee53ab5dSPierre Ossman host->data_early = 0; 666ee53ab5dSPierre Ossman 667ee53ab5dSPierre Ossman count = sdhci_calc_timeout(host, data); 6684e4141a5SAnton Vorontsov sdhci_writeb(host, count, SDHCI_TIMEOUT_CONTROL); 6691c6a0718SPierre Ossman 670a13abc7bSRichard Röjfors if (host->flags & (SDHCI_USE_SDMA | SDHCI_USE_ADMA)) 671c9fddbc4SPierre Ossman host->flags |= SDHCI_REQ_USE_DMA; 672c9fddbc4SPierre Ossman 6732134a922SPierre Ossman /* 6742134a922SPierre Ossman * FIXME: This doesn't account for merging when mapping the 6752134a922SPierre Ossman * scatterlist. 6762134a922SPierre Ossman */ 6772134a922SPierre Ossman if (host->flags & SDHCI_REQ_USE_DMA) { 6782134a922SPierre Ossman int broken, i; 6792134a922SPierre Ossman struct scatterlist *sg; 6802134a922SPierre Ossman 6812134a922SPierre Ossman broken = 0; 6822134a922SPierre Ossman if (host->flags & SDHCI_USE_ADMA) { 6832134a922SPierre Ossman if (host->quirks & SDHCI_QUIRK_32BIT_ADMA_SIZE) 6842134a922SPierre Ossman broken = 1; 6852134a922SPierre Ossman } else { 6862134a922SPierre Ossman if (host->quirks & SDHCI_QUIRK_32BIT_DMA_SIZE) 6872134a922SPierre Ossman broken = 1; 6882134a922SPierre Ossman } 6892134a922SPierre Ossman 6902134a922SPierre Ossman if (unlikely(broken)) { 6912134a922SPierre Ossman for_each_sg(data->sg, sg, data->sg_len, i) { 6922134a922SPierre Ossman if (sg->length & 0x3) { 6932134a922SPierre Ossman DBG("Reverting to PIO because of " 6942134a922SPierre Ossman "transfer size (%d)\n", 6952134a922SPierre Ossman sg->length); 696c9fddbc4SPierre Ossman host->flags &= ~SDHCI_REQ_USE_DMA; 6972134a922SPierre Ossman break; 6982134a922SPierre Ossman } 6992134a922SPierre Ossman } 7002134a922SPierre Ossman } 701c9fddbc4SPierre Ossman } 702c9fddbc4SPierre Ossman 703c9fddbc4SPierre Ossman /* 704c9fddbc4SPierre Ossman * The assumption here being that alignment is the same after 705c9fddbc4SPierre Ossman * translation to device address space. 706c9fddbc4SPierre Ossman */ 7072134a922SPierre Ossman if (host->flags & SDHCI_REQ_USE_DMA) { 7082134a922SPierre Ossman int broken, i; 7092134a922SPierre Ossman struct scatterlist *sg; 7102134a922SPierre Ossman 7112134a922SPierre Ossman broken = 0; 7122134a922SPierre Ossman if (host->flags & SDHCI_USE_ADMA) { 7132134a922SPierre Ossman /* 7142134a922SPierre Ossman * As we use 3 byte chunks to work around 7152134a922SPierre Ossman * alignment problems, we need to check this 7162134a922SPierre Ossman * quirk. 7172134a922SPierre Ossman */ 7182134a922SPierre Ossman if (host->quirks & SDHCI_QUIRK_32BIT_ADMA_SIZE) 7192134a922SPierre Ossman broken = 1; 7202134a922SPierre Ossman } else { 7212134a922SPierre Ossman if (host->quirks & SDHCI_QUIRK_32BIT_DMA_ADDR) 7222134a922SPierre Ossman broken = 1; 7232134a922SPierre Ossman } 7242134a922SPierre Ossman 7252134a922SPierre Ossman if (unlikely(broken)) { 7262134a922SPierre Ossman for_each_sg(data->sg, sg, data->sg_len, i) { 7272134a922SPierre Ossman if (sg->offset & 0x3) { 7282134a922SPierre Ossman DBG("Reverting to PIO because of " 7292134a922SPierre Ossman "bad alignment\n"); 730c9fddbc4SPierre Ossman host->flags &= ~SDHCI_REQ_USE_DMA; 7312134a922SPierre Ossman break; 7322134a922SPierre Ossman } 7332134a922SPierre Ossman } 7342134a922SPierre Ossman } 7352134a922SPierre Ossman } 7362134a922SPierre Ossman 7378f1934ceSPierre Ossman if (host->flags & SDHCI_REQ_USE_DMA) { 7388f1934ceSPierre Ossman if (host->flags & SDHCI_USE_ADMA) { 7398f1934ceSPierre Ossman ret = sdhci_adma_table_pre(host, data); 7408f1934ceSPierre Ossman if (ret) { 7418f1934ceSPierre Ossman /* 7428f1934ceSPierre Ossman * This only happens when someone fed 7438f1934ceSPierre Ossman * us an invalid request. 7448f1934ceSPierre Ossman */ 7458f1934ceSPierre Ossman WARN_ON(1); 746ebd6d357SPierre Ossman host->flags &= ~SDHCI_REQ_USE_DMA; 7478f1934ceSPierre Ossman } else { 7484e4141a5SAnton Vorontsov sdhci_writel(host, host->adma_addr, 7494e4141a5SAnton Vorontsov SDHCI_ADMA_ADDRESS); 7508f1934ceSPierre Ossman } 7518f1934ceSPierre Ossman } else { 752c8b3e02eSTomas Winkler int sg_cnt; 7538f1934ceSPierre Ossman 754c8b3e02eSTomas Winkler sg_cnt = dma_map_sg(mmc_dev(host->mmc), 7558f1934ceSPierre Ossman data->sg, data->sg_len, 7568f1934ceSPierre Ossman (data->flags & MMC_DATA_READ) ? 7578f1934ceSPierre Ossman DMA_FROM_DEVICE : 7588f1934ceSPierre Ossman DMA_TO_DEVICE); 759c8b3e02eSTomas Winkler if (sg_cnt == 0) { 7608f1934ceSPierre Ossman /* 7618f1934ceSPierre Ossman * This only happens when someone fed 7628f1934ceSPierre Ossman * us an invalid request. 7638f1934ceSPierre Ossman */ 7648f1934ceSPierre Ossman WARN_ON(1); 765ebd6d357SPierre Ossman host->flags &= ~SDHCI_REQ_USE_DMA; 7668f1934ceSPierre Ossman } else { 767719a61b4SPierre Ossman WARN_ON(sg_cnt != 1); 7684e4141a5SAnton Vorontsov sdhci_writel(host, sg_dma_address(data->sg), 7694e4141a5SAnton Vorontsov SDHCI_DMA_ADDRESS); 7708f1934ceSPierre Ossman } 7718f1934ceSPierre Ossman } 7728f1934ceSPierre Ossman } 7738f1934ceSPierre Ossman 7742134a922SPierre Ossman /* 7752134a922SPierre Ossman * Always adjust the DMA selection as some controllers 7762134a922SPierre Ossman * (e.g. JMicron) can't do PIO properly when the selection 7772134a922SPierre Ossman * is ADMA. 7782134a922SPierre Ossman */ 7792134a922SPierre Ossman if (host->version >= SDHCI_SPEC_200) { 7804e4141a5SAnton Vorontsov ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL); 7812134a922SPierre Ossman ctrl &= ~SDHCI_CTRL_DMA_MASK; 7822134a922SPierre Ossman if ((host->flags & SDHCI_REQ_USE_DMA) && 7832134a922SPierre Ossman (host->flags & SDHCI_USE_ADMA)) 7842134a922SPierre Ossman ctrl |= SDHCI_CTRL_ADMA32; 7852134a922SPierre Ossman else 7862134a922SPierre Ossman ctrl |= SDHCI_CTRL_SDMA; 7874e4141a5SAnton Vorontsov sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL); 788c9fddbc4SPierre Ossman } 789c9fddbc4SPierre Ossman 7908f1934ceSPierre Ossman if (!(host->flags & SDHCI_REQ_USE_DMA)) { 791da60a91dSSebastian Andrzej Siewior int flags; 792da60a91dSSebastian Andrzej Siewior 793da60a91dSSebastian Andrzej Siewior flags = SG_MITER_ATOMIC; 794da60a91dSSebastian Andrzej Siewior if (host->data->flags & MMC_DATA_READ) 795da60a91dSSebastian Andrzej Siewior flags |= SG_MITER_TO_SG; 796da60a91dSSebastian Andrzej Siewior else 797da60a91dSSebastian Andrzej Siewior flags |= SG_MITER_FROM_SG; 798da60a91dSSebastian Andrzej Siewior sg_miter_start(&host->sg_miter, data->sg, data->sg_len, flags); 7997659150cSPierre Ossman host->blocks = data->blocks; 8001c6a0718SPierre Ossman } 8011c6a0718SPierre Ossman 8026aa943abSAnton Vorontsov sdhci_set_transfer_irqs(host); 8036aa943abSAnton Vorontsov 8041c6a0718SPierre Ossman /* We do not handle DMA boundaries, so set it to max (512 KiB) */ 8054e4141a5SAnton Vorontsov sdhci_writew(host, SDHCI_MAKE_BLKSZ(7, data->blksz), SDHCI_BLOCK_SIZE); 8064e4141a5SAnton Vorontsov sdhci_writew(host, data->blocks, SDHCI_BLOCK_COUNT); 8071c6a0718SPierre Ossman } 8081c6a0718SPierre Ossman 8091c6a0718SPierre Ossman static void sdhci_set_transfer_mode(struct sdhci_host *host, 8101c6a0718SPierre Ossman struct mmc_data *data) 8111c6a0718SPierre Ossman { 8121c6a0718SPierre Ossman u16 mode; 8131c6a0718SPierre Ossman 8141c6a0718SPierre Ossman if (data == NULL) 8151c6a0718SPierre Ossman return; 8161c6a0718SPierre Ossman 817e538fbe8SPierre Ossman WARN_ON(!host->data); 818e538fbe8SPierre Ossman 8191c6a0718SPierre Ossman mode = SDHCI_TRNS_BLK_CNT_EN; 8201c6a0718SPierre Ossman if (data->blocks > 1) 8211c6a0718SPierre Ossman mode |= SDHCI_TRNS_MULTI; 8221c6a0718SPierre Ossman if (data->flags & MMC_DATA_READ) 8231c6a0718SPierre Ossman mode |= SDHCI_TRNS_READ; 824c9fddbc4SPierre Ossman if (host->flags & SDHCI_REQ_USE_DMA) 8251c6a0718SPierre Ossman mode |= SDHCI_TRNS_DMA; 8261c6a0718SPierre Ossman 8274e4141a5SAnton Vorontsov sdhci_writew(host, mode, SDHCI_TRANSFER_MODE); 8281c6a0718SPierre Ossman } 8291c6a0718SPierre Ossman 8301c6a0718SPierre Ossman static void sdhci_finish_data(struct sdhci_host *host) 8311c6a0718SPierre Ossman { 8321c6a0718SPierre Ossman struct mmc_data *data; 8331c6a0718SPierre Ossman 8341c6a0718SPierre Ossman BUG_ON(!host->data); 8351c6a0718SPierre Ossman 8361c6a0718SPierre Ossman data = host->data; 8371c6a0718SPierre Ossman host->data = NULL; 8381c6a0718SPierre Ossman 839c9fddbc4SPierre Ossman if (host->flags & SDHCI_REQ_USE_DMA) { 8402134a922SPierre Ossman if (host->flags & SDHCI_USE_ADMA) 8412134a922SPierre Ossman sdhci_adma_table_post(host, data); 8422134a922SPierre Ossman else { 8432134a922SPierre Ossman dma_unmap_sg(mmc_dev(host->mmc), data->sg, 8442134a922SPierre Ossman data->sg_len, (data->flags & MMC_DATA_READ) ? 845b8c86fc5SPierre Ossman DMA_FROM_DEVICE : DMA_TO_DEVICE); 8461c6a0718SPierre Ossman } 8472134a922SPierre Ossman } 8481c6a0718SPierre Ossman 8491c6a0718SPierre Ossman /* 850c9b74c5bSPierre Ossman * The specification states that the block count register must 851c9b74c5bSPierre Ossman * be updated, but it does not specify at what point in the 852c9b74c5bSPierre Ossman * data flow. That makes the register entirely useless to read 853c9b74c5bSPierre Ossman * back so we have to assume that nothing made it to the card 854c9b74c5bSPierre Ossman * in the event of an error. 8551c6a0718SPierre Ossman */ 856c9b74c5bSPierre Ossman if (data->error) 857c9b74c5bSPierre Ossman data->bytes_xfered = 0; 8581c6a0718SPierre Ossman else 859c9b74c5bSPierre Ossman data->bytes_xfered = data->blksz * data->blocks; 8601c6a0718SPierre Ossman 8611c6a0718SPierre Ossman if (data->stop) { 8621c6a0718SPierre Ossman /* 8631c6a0718SPierre Ossman * The controller needs a reset of internal state machines 8641c6a0718SPierre Ossman * upon error conditions. 8651c6a0718SPierre Ossman */ 86617b0429dSPierre Ossman if (data->error) { 8671c6a0718SPierre Ossman sdhci_reset(host, SDHCI_RESET_CMD); 8681c6a0718SPierre Ossman sdhci_reset(host, SDHCI_RESET_DATA); 8691c6a0718SPierre Ossman } 8701c6a0718SPierre Ossman 8711c6a0718SPierre Ossman sdhci_send_command(host, data->stop); 8721c6a0718SPierre Ossman } else 8731c6a0718SPierre Ossman tasklet_schedule(&host->finish_tasklet); 8741c6a0718SPierre Ossman } 8751c6a0718SPierre Ossman 8761c6a0718SPierre Ossman static void sdhci_send_command(struct sdhci_host *host, struct mmc_command *cmd) 8771c6a0718SPierre Ossman { 8781c6a0718SPierre Ossman int flags; 8791c6a0718SPierre Ossman u32 mask; 8801c6a0718SPierre Ossman unsigned long timeout; 8811c6a0718SPierre Ossman 8821c6a0718SPierre Ossman WARN_ON(host->cmd); 8831c6a0718SPierre Ossman 8841c6a0718SPierre Ossman /* Wait max 10 ms */ 8851c6a0718SPierre Ossman timeout = 10; 8861c6a0718SPierre Ossman 8871c6a0718SPierre Ossman mask = SDHCI_CMD_INHIBIT; 8881c6a0718SPierre Ossman if ((cmd->data != NULL) || (cmd->flags & MMC_RSP_BUSY)) 8891c6a0718SPierre Ossman mask |= SDHCI_DATA_INHIBIT; 8901c6a0718SPierre Ossman 8911c6a0718SPierre Ossman /* We shouldn't wait for data inihibit for stop commands, even 8921c6a0718SPierre Ossman though they might use busy signaling */ 8931c6a0718SPierre Ossman if (host->mrq->data && (cmd == host->mrq->data->stop)) 8941c6a0718SPierre Ossman mask &= ~SDHCI_DATA_INHIBIT; 8951c6a0718SPierre Ossman 8964e4141a5SAnton Vorontsov while (sdhci_readl(host, SDHCI_PRESENT_STATE) & mask) { 8971c6a0718SPierre Ossman if (timeout == 0) { 8981c6a0718SPierre Ossman printk(KERN_ERR "%s: Controller never released " 8991c6a0718SPierre Ossman "inhibit bit(s).\n", mmc_hostname(host->mmc)); 9001c6a0718SPierre Ossman sdhci_dumpregs(host); 90117b0429dSPierre Ossman cmd->error = -EIO; 9021c6a0718SPierre Ossman tasklet_schedule(&host->finish_tasklet); 9031c6a0718SPierre Ossman return; 9041c6a0718SPierre Ossman } 9051c6a0718SPierre Ossman timeout--; 9061c6a0718SPierre Ossman mdelay(1); 9071c6a0718SPierre Ossman } 9081c6a0718SPierre Ossman 9091c6a0718SPierre Ossman mod_timer(&host->timer, jiffies + 10 * HZ); 9101c6a0718SPierre Ossman 9111c6a0718SPierre Ossman host->cmd = cmd; 9121c6a0718SPierre Ossman 9131c6a0718SPierre Ossman sdhci_prepare_data(host, cmd->data); 9141c6a0718SPierre Ossman 9154e4141a5SAnton Vorontsov sdhci_writel(host, cmd->arg, SDHCI_ARGUMENT); 9161c6a0718SPierre Ossman 9171c6a0718SPierre Ossman sdhci_set_transfer_mode(host, cmd->data); 9181c6a0718SPierre Ossman 9191c6a0718SPierre Ossman if ((cmd->flags & MMC_RSP_136) && (cmd->flags & MMC_RSP_BUSY)) { 9201c6a0718SPierre Ossman printk(KERN_ERR "%s: Unsupported response type!\n", 9211c6a0718SPierre Ossman mmc_hostname(host->mmc)); 92217b0429dSPierre Ossman cmd->error = -EINVAL; 9231c6a0718SPierre Ossman tasklet_schedule(&host->finish_tasklet); 9241c6a0718SPierre Ossman return; 9251c6a0718SPierre Ossman } 9261c6a0718SPierre Ossman 9271c6a0718SPierre Ossman if (!(cmd->flags & MMC_RSP_PRESENT)) 9281c6a0718SPierre Ossman flags = SDHCI_CMD_RESP_NONE; 9291c6a0718SPierre Ossman else if (cmd->flags & MMC_RSP_136) 9301c6a0718SPierre Ossman flags = SDHCI_CMD_RESP_LONG; 9311c6a0718SPierre Ossman else if (cmd->flags & MMC_RSP_BUSY) 9321c6a0718SPierre Ossman flags = SDHCI_CMD_RESP_SHORT_BUSY; 9331c6a0718SPierre Ossman else 9341c6a0718SPierre Ossman flags = SDHCI_CMD_RESP_SHORT; 9351c6a0718SPierre Ossman 9361c6a0718SPierre Ossman if (cmd->flags & MMC_RSP_CRC) 9371c6a0718SPierre Ossman flags |= SDHCI_CMD_CRC; 9381c6a0718SPierre Ossman if (cmd->flags & MMC_RSP_OPCODE) 9391c6a0718SPierre Ossman flags |= SDHCI_CMD_INDEX; 9401c6a0718SPierre Ossman if (cmd->data) 9411c6a0718SPierre Ossman flags |= SDHCI_CMD_DATA; 9421c6a0718SPierre Ossman 9434e4141a5SAnton Vorontsov sdhci_writew(host, SDHCI_MAKE_CMD(cmd->opcode, flags), SDHCI_COMMAND); 9441c6a0718SPierre Ossman } 9451c6a0718SPierre Ossman 9461c6a0718SPierre Ossman static void sdhci_finish_command(struct sdhci_host *host) 9471c6a0718SPierre Ossman { 9481c6a0718SPierre Ossman int i; 9491c6a0718SPierre Ossman 9501c6a0718SPierre Ossman BUG_ON(host->cmd == NULL); 9511c6a0718SPierre Ossman 9521c6a0718SPierre Ossman if (host->cmd->flags & MMC_RSP_PRESENT) { 9531c6a0718SPierre Ossman if (host->cmd->flags & MMC_RSP_136) { 9541c6a0718SPierre Ossman /* CRC is stripped so we need to do some shifting. */ 9551c6a0718SPierre Ossman for (i = 0;i < 4;i++) { 9564e4141a5SAnton Vorontsov host->cmd->resp[i] = sdhci_readl(host, 9571c6a0718SPierre Ossman SDHCI_RESPONSE + (3-i)*4) << 8; 9581c6a0718SPierre Ossman if (i != 3) 9591c6a0718SPierre Ossman host->cmd->resp[i] |= 9604e4141a5SAnton Vorontsov sdhci_readb(host, 9611c6a0718SPierre Ossman SDHCI_RESPONSE + (3-i)*4-1); 9621c6a0718SPierre Ossman } 9631c6a0718SPierre Ossman } else { 9644e4141a5SAnton Vorontsov host->cmd->resp[0] = sdhci_readl(host, SDHCI_RESPONSE); 9651c6a0718SPierre Ossman } 9661c6a0718SPierre Ossman } 9671c6a0718SPierre Ossman 96817b0429dSPierre Ossman host->cmd->error = 0; 9691c6a0718SPierre Ossman 970e538fbe8SPierre Ossman if (host->data && host->data_early) 971e538fbe8SPierre Ossman sdhci_finish_data(host); 972e538fbe8SPierre Ossman 973e538fbe8SPierre Ossman if (!host->cmd->data) 9741c6a0718SPierre Ossman tasklet_schedule(&host->finish_tasklet); 9751c6a0718SPierre Ossman 9761c6a0718SPierre Ossman host->cmd = NULL; 9771c6a0718SPierre Ossman } 9781c6a0718SPierre Ossman 9791c6a0718SPierre Ossman static void sdhci_set_clock(struct sdhci_host *host, unsigned int clock) 9801c6a0718SPierre Ossman { 9811c6a0718SPierre Ossman int div; 9821c6a0718SPierre Ossman u16 clk; 9831c6a0718SPierre Ossman unsigned long timeout; 9841c6a0718SPierre Ossman 9851c6a0718SPierre Ossman if (clock == host->clock) 9861c6a0718SPierre Ossman return; 9871c6a0718SPierre Ossman 9888114634cSAnton Vorontsov if (host->ops->set_clock) { 9898114634cSAnton Vorontsov host->ops->set_clock(host, clock); 9908114634cSAnton Vorontsov if (host->quirks & SDHCI_QUIRK_NONSTANDARD_CLOCK) 9918114634cSAnton Vorontsov return; 9928114634cSAnton Vorontsov } 9938114634cSAnton Vorontsov 9944e4141a5SAnton Vorontsov sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL); 9951c6a0718SPierre Ossman 9961c6a0718SPierre Ossman if (clock == 0) 9971c6a0718SPierre Ossman goto out; 9981c6a0718SPierre Ossman 9991c6a0718SPierre Ossman for (div = 1;div < 256;div *= 2) { 10001c6a0718SPierre Ossman if ((host->max_clk / div) <= clock) 10011c6a0718SPierre Ossman break; 10021c6a0718SPierre Ossman } 10031c6a0718SPierre Ossman div >>= 1; 10041c6a0718SPierre Ossman 10051c6a0718SPierre Ossman clk = div << SDHCI_DIVIDER_SHIFT; 10061c6a0718SPierre Ossman clk |= SDHCI_CLOCK_INT_EN; 10074e4141a5SAnton Vorontsov sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); 10081c6a0718SPierre Ossman 100927f6cb16SChris Ball /* Wait max 20 ms */ 101027f6cb16SChris Ball timeout = 20; 10114e4141a5SAnton Vorontsov while (!((clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL)) 10121c6a0718SPierre Ossman & SDHCI_CLOCK_INT_STABLE)) { 10131c6a0718SPierre Ossman if (timeout == 0) { 10141c6a0718SPierre Ossman printk(KERN_ERR "%s: Internal clock never " 10151c6a0718SPierre Ossman "stabilised.\n", mmc_hostname(host->mmc)); 10161c6a0718SPierre Ossman sdhci_dumpregs(host); 10171c6a0718SPierre Ossman return; 10181c6a0718SPierre Ossman } 10191c6a0718SPierre Ossman timeout--; 10201c6a0718SPierre Ossman mdelay(1); 10211c6a0718SPierre Ossman } 10221c6a0718SPierre Ossman 10231c6a0718SPierre Ossman clk |= SDHCI_CLOCK_CARD_EN; 10244e4141a5SAnton Vorontsov sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); 10251c6a0718SPierre Ossman 10261c6a0718SPierre Ossman out: 10271c6a0718SPierre Ossman host->clock = clock; 10281c6a0718SPierre Ossman } 10291c6a0718SPierre Ossman 10301c6a0718SPierre Ossman static void sdhci_set_power(struct sdhci_host *host, unsigned short power) 10311c6a0718SPierre Ossman { 10321c6a0718SPierre Ossman u8 pwr; 10331c6a0718SPierre Ossman 1034ae628903SPierre Ossman if (power == (unsigned short)-1) 1035ae628903SPierre Ossman pwr = 0; 1036ae628903SPierre Ossman else { 1037ae628903SPierre Ossman switch (1 << power) { 1038ae628903SPierre Ossman case MMC_VDD_165_195: 1039ae628903SPierre Ossman pwr = SDHCI_POWER_180; 1040ae628903SPierre Ossman break; 1041ae628903SPierre Ossman case MMC_VDD_29_30: 1042ae628903SPierre Ossman case MMC_VDD_30_31: 1043ae628903SPierre Ossman pwr = SDHCI_POWER_300; 1044ae628903SPierre Ossman break; 1045ae628903SPierre Ossman case MMC_VDD_32_33: 1046ae628903SPierre Ossman case MMC_VDD_33_34: 1047ae628903SPierre Ossman pwr = SDHCI_POWER_330; 1048ae628903SPierre Ossman break; 1049ae628903SPierre Ossman default: 1050ae628903SPierre Ossman BUG(); 1051ae628903SPierre Ossman } 1052ae628903SPierre Ossman } 1053ae628903SPierre Ossman 1054ae628903SPierre Ossman if (host->pwr == pwr) 10551c6a0718SPierre Ossman return; 10561c6a0718SPierre Ossman 1057ae628903SPierre Ossman host->pwr = pwr; 1058ae628903SPierre Ossman 1059ae628903SPierre Ossman if (pwr == 0) { 10604e4141a5SAnton Vorontsov sdhci_writeb(host, 0, SDHCI_POWER_CONTROL); 1061ae628903SPierre Ossman return; 10621c6a0718SPierre Ossman } 10631c6a0718SPierre Ossman 10641c6a0718SPierre Ossman /* 10651c6a0718SPierre Ossman * Spec says that we should clear the power reg before setting 10661c6a0718SPierre Ossman * a new value. Some controllers don't seem to like this though. 10671c6a0718SPierre Ossman */ 1068b8c86fc5SPierre Ossman if (!(host->quirks & SDHCI_QUIRK_SINGLE_POWER_WRITE)) 10694e4141a5SAnton Vorontsov sdhci_writeb(host, 0, SDHCI_POWER_CONTROL); 10701c6a0718SPierre Ossman 1071e08c1694SAndres Salomon /* 1072c71f6512SAndres Salomon * At least the Marvell CaFe chip gets confused if we set the voltage 1073e08c1694SAndres Salomon * and set turn on power at the same time, so set the voltage first. 1074e08c1694SAndres Salomon */ 107511a2f1b7SPierre Ossman if (host->quirks & SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER) 10764e4141a5SAnton Vorontsov sdhci_writeb(host, pwr, SDHCI_POWER_CONTROL); 10771c6a0718SPierre Ossman 1078ae628903SPierre Ossman pwr |= SDHCI_POWER_ON; 1079ae628903SPierre Ossman 1080ae628903SPierre Ossman sdhci_writeb(host, pwr, SDHCI_POWER_CONTROL); 1081557b0697SHarald Welte 1082557b0697SHarald Welte /* 1083557b0697SHarald Welte * Some controllers need an extra 10ms delay of 10ms before they 1084557b0697SHarald Welte * can apply clock after applying power 1085557b0697SHarald Welte */ 108611a2f1b7SPierre Ossman if (host->quirks & SDHCI_QUIRK_DELAY_AFTER_POWER) 1087557b0697SHarald Welte mdelay(10); 10881c6a0718SPierre Ossman } 10891c6a0718SPierre Ossman 10901c6a0718SPierre Ossman /*****************************************************************************\ 10911c6a0718SPierre Ossman * * 10921c6a0718SPierre Ossman * MMC callbacks * 10931c6a0718SPierre Ossman * * 10941c6a0718SPierre Ossman \*****************************************************************************/ 10951c6a0718SPierre Ossman 10961c6a0718SPierre Ossman static void sdhci_request(struct mmc_host *mmc, struct mmc_request *mrq) 10971c6a0718SPierre Ossman { 10981c6a0718SPierre Ossman struct sdhci_host *host; 109968d1fb7eSAnton Vorontsov bool present; 11001c6a0718SPierre Ossman unsigned long flags; 11011c6a0718SPierre Ossman 11021c6a0718SPierre Ossman host = mmc_priv(mmc); 11031c6a0718SPierre Ossman 11041c6a0718SPierre Ossman spin_lock_irqsave(&host->lock, flags); 11051c6a0718SPierre Ossman 11061c6a0718SPierre Ossman WARN_ON(host->mrq != NULL); 11071c6a0718SPierre Ossman 1108f9134319SPierre Ossman #ifndef SDHCI_USE_LEDS_CLASS 11091c6a0718SPierre Ossman sdhci_activate_led(host); 11102f730fecSPierre Ossman #endif 11111c6a0718SPierre Ossman 11121c6a0718SPierre Ossman host->mrq = mrq; 11131c6a0718SPierre Ossman 111468d1fb7eSAnton Vorontsov /* If polling, assume that the card is always present. */ 111568d1fb7eSAnton Vorontsov if (host->quirks & SDHCI_QUIRK_BROKEN_CARD_DETECTION) 111668d1fb7eSAnton Vorontsov present = true; 111768d1fb7eSAnton Vorontsov else 111868d1fb7eSAnton Vorontsov present = sdhci_readl(host, SDHCI_PRESENT_STATE) & 111968d1fb7eSAnton Vorontsov SDHCI_CARD_PRESENT; 112068d1fb7eSAnton Vorontsov 112168d1fb7eSAnton Vorontsov if (!present || host->flags & SDHCI_DEVICE_DEAD) { 112217b0429dSPierre Ossman host->mrq->cmd->error = -ENOMEDIUM; 11231c6a0718SPierre Ossman tasklet_schedule(&host->finish_tasklet); 11241c6a0718SPierre Ossman } else 11251c6a0718SPierre Ossman sdhci_send_command(host, mrq->cmd); 11261c6a0718SPierre Ossman 11271c6a0718SPierre Ossman mmiowb(); 11281c6a0718SPierre Ossman spin_unlock_irqrestore(&host->lock, flags); 11291c6a0718SPierre Ossman } 11301c6a0718SPierre Ossman 11311c6a0718SPierre Ossman static void sdhci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) 11321c6a0718SPierre Ossman { 11331c6a0718SPierre Ossman struct sdhci_host *host; 11341c6a0718SPierre Ossman unsigned long flags; 11351c6a0718SPierre Ossman u8 ctrl; 11361c6a0718SPierre Ossman 11371c6a0718SPierre Ossman host = mmc_priv(mmc); 11381c6a0718SPierre Ossman 11391c6a0718SPierre Ossman spin_lock_irqsave(&host->lock, flags); 11401c6a0718SPierre Ossman 11411e72859eSPierre Ossman if (host->flags & SDHCI_DEVICE_DEAD) 11421e72859eSPierre Ossman goto out; 11431e72859eSPierre Ossman 11441c6a0718SPierre Ossman /* 11451c6a0718SPierre Ossman * Reset the chip on each power off. 11461c6a0718SPierre Ossman * Should clear out any weird states. 11471c6a0718SPierre Ossman */ 11481c6a0718SPierre Ossman if (ios->power_mode == MMC_POWER_OFF) { 11494e4141a5SAnton Vorontsov sdhci_writel(host, 0, SDHCI_SIGNAL_ENABLE); 11507260cf5eSAnton Vorontsov sdhci_reinit(host); 11511c6a0718SPierre Ossman } 11521c6a0718SPierre Ossman 11531c6a0718SPierre Ossman sdhci_set_clock(host, ios->clock); 11541c6a0718SPierre Ossman 11551c6a0718SPierre Ossman if (ios->power_mode == MMC_POWER_OFF) 11561c6a0718SPierre Ossman sdhci_set_power(host, -1); 11571c6a0718SPierre Ossman else 11581c6a0718SPierre Ossman sdhci_set_power(host, ios->vdd); 11591c6a0718SPierre Ossman 11604e4141a5SAnton Vorontsov ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL); 11611c6a0718SPierre Ossman 1162ae6d6c92SKyungmin Park if (ios->bus_width == MMC_BUS_WIDTH_8) 1163ae6d6c92SKyungmin Park ctrl |= SDHCI_CTRL_8BITBUS; 1164ae6d6c92SKyungmin Park else 1165ae6d6c92SKyungmin Park ctrl &= ~SDHCI_CTRL_8BITBUS; 1166ae6d6c92SKyungmin Park 11671c6a0718SPierre Ossman if (ios->bus_width == MMC_BUS_WIDTH_4) 11681c6a0718SPierre Ossman ctrl |= SDHCI_CTRL_4BITBUS; 11691c6a0718SPierre Ossman else 11701c6a0718SPierre Ossman ctrl &= ~SDHCI_CTRL_4BITBUS; 11711c6a0718SPierre Ossman 11721c6a0718SPierre Ossman if (ios->timing == MMC_TIMING_SD_HS) 11731c6a0718SPierre Ossman ctrl |= SDHCI_CTRL_HISPD; 11741c6a0718SPierre Ossman else 11751c6a0718SPierre Ossman ctrl &= ~SDHCI_CTRL_HISPD; 11761c6a0718SPierre Ossman 11774e4141a5SAnton Vorontsov sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL); 11781c6a0718SPierre Ossman 1179b8352260SLeandro Dorileo /* 1180b8352260SLeandro Dorileo * Some (ENE) controllers go apeshit on some ios operation, 1181b8352260SLeandro Dorileo * signalling timeout and CRC errors even on CMD0. Resetting 1182b8352260SLeandro Dorileo * it on each ios seems to solve the problem. 1183b8352260SLeandro Dorileo */ 1184b8c86fc5SPierre Ossman if(host->quirks & SDHCI_QUIRK_RESET_CMD_DATA_ON_IOS) 1185b8352260SLeandro Dorileo sdhci_reset(host, SDHCI_RESET_CMD | SDHCI_RESET_DATA); 1186b8352260SLeandro Dorileo 11871e72859eSPierre Ossman out: 11881c6a0718SPierre Ossman mmiowb(); 11891c6a0718SPierre Ossman spin_unlock_irqrestore(&host->lock, flags); 11901c6a0718SPierre Ossman } 11911c6a0718SPierre Ossman 11921c6a0718SPierre Ossman static int sdhci_get_ro(struct mmc_host *mmc) 11931c6a0718SPierre Ossman { 11941c6a0718SPierre Ossman struct sdhci_host *host; 11951c6a0718SPierre Ossman unsigned long flags; 11961c6a0718SPierre Ossman int present; 11971c6a0718SPierre Ossman 11981c6a0718SPierre Ossman host = mmc_priv(mmc); 11991c6a0718SPierre Ossman 12001c6a0718SPierre Ossman spin_lock_irqsave(&host->lock, flags); 12011c6a0718SPierre Ossman 12021e72859eSPierre Ossman if (host->flags & SDHCI_DEVICE_DEAD) 12031e72859eSPierre Ossman present = 0; 12041e72859eSPierre Ossman else 12054e4141a5SAnton Vorontsov present = sdhci_readl(host, SDHCI_PRESENT_STATE); 12061c6a0718SPierre Ossman 12071c6a0718SPierre Ossman spin_unlock_irqrestore(&host->lock, flags); 12081c6a0718SPierre Ossman 1209c5075a10SAnton Vorontsov if (host->quirks & SDHCI_QUIRK_INVERTED_WRITE_PROTECT) 1210c5075a10SAnton Vorontsov return !!(present & SDHCI_WRITE_PROTECT); 12111c6a0718SPierre Ossman return !(present & SDHCI_WRITE_PROTECT); 12121c6a0718SPierre Ossman } 12131c6a0718SPierre Ossman 1214f75979b7SPierre Ossman static void sdhci_enable_sdio_irq(struct mmc_host *mmc, int enable) 1215f75979b7SPierre Ossman { 1216f75979b7SPierre Ossman struct sdhci_host *host; 1217f75979b7SPierre Ossman unsigned long flags; 1218f75979b7SPierre Ossman 1219f75979b7SPierre Ossman host = mmc_priv(mmc); 1220f75979b7SPierre Ossman 1221f75979b7SPierre Ossman spin_lock_irqsave(&host->lock, flags); 1222f75979b7SPierre Ossman 12231e72859eSPierre Ossman if (host->flags & SDHCI_DEVICE_DEAD) 12241e72859eSPierre Ossman goto out; 12251e72859eSPierre Ossman 1226f75979b7SPierre Ossman if (enable) 12277260cf5eSAnton Vorontsov sdhci_unmask_irqs(host, SDHCI_INT_CARD_INT); 12287260cf5eSAnton Vorontsov else 12297260cf5eSAnton Vorontsov sdhci_mask_irqs(host, SDHCI_INT_CARD_INT); 12301e72859eSPierre Ossman out: 1231f75979b7SPierre Ossman mmiowb(); 1232f75979b7SPierre Ossman 1233f75979b7SPierre Ossman spin_unlock_irqrestore(&host->lock, flags); 1234f75979b7SPierre Ossman } 1235f75979b7SPierre Ossman 12361c6a0718SPierre Ossman static const struct mmc_host_ops sdhci_ops = { 12371c6a0718SPierre Ossman .request = sdhci_request, 12381c6a0718SPierre Ossman .set_ios = sdhci_set_ios, 12391c6a0718SPierre Ossman .get_ro = sdhci_get_ro, 1240f75979b7SPierre Ossman .enable_sdio_irq = sdhci_enable_sdio_irq, 12411c6a0718SPierre Ossman }; 12421c6a0718SPierre Ossman 12431c6a0718SPierre Ossman /*****************************************************************************\ 12441c6a0718SPierre Ossman * * 12451c6a0718SPierre Ossman * Tasklets * 12461c6a0718SPierre Ossman * * 12471c6a0718SPierre Ossman \*****************************************************************************/ 12481c6a0718SPierre Ossman 12491c6a0718SPierre Ossman static void sdhci_tasklet_card(unsigned long param) 12501c6a0718SPierre Ossman { 12511c6a0718SPierre Ossman struct sdhci_host *host; 12521c6a0718SPierre Ossman unsigned long flags; 12531c6a0718SPierre Ossman 12541c6a0718SPierre Ossman host = (struct sdhci_host*)param; 12551c6a0718SPierre Ossman 12561c6a0718SPierre Ossman spin_lock_irqsave(&host->lock, flags); 12571c6a0718SPierre Ossman 12584e4141a5SAnton Vorontsov if (!(sdhci_readl(host, SDHCI_PRESENT_STATE) & SDHCI_CARD_PRESENT)) { 12591c6a0718SPierre Ossman if (host->mrq) { 12601c6a0718SPierre Ossman printk(KERN_ERR "%s: Card removed during transfer!\n", 12611c6a0718SPierre Ossman mmc_hostname(host->mmc)); 12621c6a0718SPierre Ossman printk(KERN_ERR "%s: Resetting controller.\n", 12631c6a0718SPierre Ossman mmc_hostname(host->mmc)); 12641c6a0718SPierre Ossman 12651c6a0718SPierre Ossman sdhci_reset(host, SDHCI_RESET_CMD); 12661c6a0718SPierre Ossman sdhci_reset(host, SDHCI_RESET_DATA); 12671c6a0718SPierre Ossman 126817b0429dSPierre Ossman host->mrq->cmd->error = -ENOMEDIUM; 12691c6a0718SPierre Ossman tasklet_schedule(&host->finish_tasklet); 12701c6a0718SPierre Ossman } 12711c6a0718SPierre Ossman } 12721c6a0718SPierre Ossman 12731c6a0718SPierre Ossman spin_unlock_irqrestore(&host->lock, flags); 12741c6a0718SPierre Ossman 127504cf585dSPierre Ossman mmc_detect_change(host->mmc, msecs_to_jiffies(200)); 12761c6a0718SPierre Ossman } 12771c6a0718SPierre Ossman 12781c6a0718SPierre Ossman static void sdhci_tasklet_finish(unsigned long param) 12791c6a0718SPierre Ossman { 12801c6a0718SPierre Ossman struct sdhci_host *host; 12811c6a0718SPierre Ossman unsigned long flags; 12821c6a0718SPierre Ossman struct mmc_request *mrq; 12831c6a0718SPierre Ossman 12841c6a0718SPierre Ossman host = (struct sdhci_host*)param; 12851c6a0718SPierre Ossman 12861c6a0718SPierre Ossman spin_lock_irqsave(&host->lock, flags); 12871c6a0718SPierre Ossman 12881c6a0718SPierre Ossman del_timer(&host->timer); 12891c6a0718SPierre Ossman 12901c6a0718SPierre Ossman mrq = host->mrq; 12911c6a0718SPierre Ossman 12921c6a0718SPierre Ossman /* 12931c6a0718SPierre Ossman * The controller needs a reset of internal state machines 12941c6a0718SPierre Ossman * upon error conditions. 12951c6a0718SPierre Ossman */ 12961e72859eSPierre Ossman if (!(host->flags & SDHCI_DEVICE_DEAD) && 12971e72859eSPierre Ossman (mrq->cmd->error || 129817b0429dSPierre Ossman (mrq->data && (mrq->data->error || 129984c46a53SPierre Ossman (mrq->data->stop && mrq->data->stop->error))) || 13001e72859eSPierre Ossman (host->quirks & SDHCI_QUIRK_RESET_AFTER_REQUEST))) { 13011c6a0718SPierre Ossman 13021c6a0718SPierre Ossman /* Some controllers need this kick or reset won't work here */ 1303b8c86fc5SPierre Ossman if (host->quirks & SDHCI_QUIRK_CLOCK_BEFORE_RESET) { 13041c6a0718SPierre Ossman unsigned int clock; 13051c6a0718SPierre Ossman 13061c6a0718SPierre Ossman /* This is to force an update */ 13071c6a0718SPierre Ossman clock = host->clock; 13081c6a0718SPierre Ossman host->clock = 0; 13091c6a0718SPierre Ossman sdhci_set_clock(host, clock); 13101c6a0718SPierre Ossman } 13111c6a0718SPierre Ossman 13121c6a0718SPierre Ossman /* Spec says we should do both at the same time, but Ricoh 13131c6a0718SPierre Ossman controllers do not like that. */ 13141c6a0718SPierre Ossman sdhci_reset(host, SDHCI_RESET_CMD); 13151c6a0718SPierre Ossman sdhci_reset(host, SDHCI_RESET_DATA); 13161c6a0718SPierre Ossman } 13171c6a0718SPierre Ossman 13181c6a0718SPierre Ossman host->mrq = NULL; 13191c6a0718SPierre Ossman host->cmd = NULL; 13201c6a0718SPierre Ossman host->data = NULL; 13211c6a0718SPierre Ossman 1322f9134319SPierre Ossman #ifndef SDHCI_USE_LEDS_CLASS 13231c6a0718SPierre Ossman sdhci_deactivate_led(host); 13242f730fecSPierre Ossman #endif 13251c6a0718SPierre Ossman 13261c6a0718SPierre Ossman mmiowb(); 13271c6a0718SPierre Ossman spin_unlock_irqrestore(&host->lock, flags); 13281c6a0718SPierre Ossman 13291c6a0718SPierre Ossman mmc_request_done(host->mmc, mrq); 13301c6a0718SPierre Ossman } 13311c6a0718SPierre Ossman 13321c6a0718SPierre Ossman static void sdhci_timeout_timer(unsigned long data) 13331c6a0718SPierre Ossman { 13341c6a0718SPierre Ossman struct sdhci_host *host; 13351c6a0718SPierre Ossman unsigned long flags; 13361c6a0718SPierre Ossman 13371c6a0718SPierre Ossman host = (struct sdhci_host*)data; 13381c6a0718SPierre Ossman 13391c6a0718SPierre Ossman spin_lock_irqsave(&host->lock, flags); 13401c6a0718SPierre Ossman 13411c6a0718SPierre Ossman if (host->mrq) { 13421c6a0718SPierre Ossman printk(KERN_ERR "%s: Timeout waiting for hardware " 13431c6a0718SPierre Ossman "interrupt.\n", mmc_hostname(host->mmc)); 13441c6a0718SPierre Ossman sdhci_dumpregs(host); 13451c6a0718SPierre Ossman 13461c6a0718SPierre Ossman if (host->data) { 134717b0429dSPierre Ossman host->data->error = -ETIMEDOUT; 13481c6a0718SPierre Ossman sdhci_finish_data(host); 13491c6a0718SPierre Ossman } else { 13501c6a0718SPierre Ossman if (host->cmd) 135117b0429dSPierre Ossman host->cmd->error = -ETIMEDOUT; 13521c6a0718SPierre Ossman else 135317b0429dSPierre Ossman host->mrq->cmd->error = -ETIMEDOUT; 13541c6a0718SPierre Ossman 13551c6a0718SPierre Ossman tasklet_schedule(&host->finish_tasklet); 13561c6a0718SPierre Ossman } 13571c6a0718SPierre Ossman } 13581c6a0718SPierre Ossman 13591c6a0718SPierre Ossman mmiowb(); 13601c6a0718SPierre Ossman spin_unlock_irqrestore(&host->lock, flags); 13611c6a0718SPierre Ossman } 13621c6a0718SPierre Ossman 13631c6a0718SPierre Ossman /*****************************************************************************\ 13641c6a0718SPierre Ossman * * 13651c6a0718SPierre Ossman * Interrupt handling * 13661c6a0718SPierre Ossman * * 13671c6a0718SPierre Ossman \*****************************************************************************/ 13681c6a0718SPierre Ossman 13691c6a0718SPierre Ossman static void sdhci_cmd_irq(struct sdhci_host *host, u32 intmask) 13701c6a0718SPierre Ossman { 13711c6a0718SPierre Ossman BUG_ON(intmask == 0); 13721c6a0718SPierre Ossman 13731c6a0718SPierre Ossman if (!host->cmd) { 1374b67ac3f3SPierre Ossman printk(KERN_ERR "%s: Got command interrupt 0x%08x even " 1375b67ac3f3SPierre Ossman "though no command operation was in progress.\n", 1376b67ac3f3SPierre Ossman mmc_hostname(host->mmc), (unsigned)intmask); 13771c6a0718SPierre Ossman sdhci_dumpregs(host); 13781c6a0718SPierre Ossman return; 13791c6a0718SPierre Ossman } 13801c6a0718SPierre Ossman 13811c6a0718SPierre Ossman if (intmask & SDHCI_INT_TIMEOUT) 138217b0429dSPierre Ossman host->cmd->error = -ETIMEDOUT; 138317b0429dSPierre Ossman else if (intmask & (SDHCI_INT_CRC | SDHCI_INT_END_BIT | 138417b0429dSPierre Ossman SDHCI_INT_INDEX)) 138517b0429dSPierre Ossman host->cmd->error = -EILSEQ; 13861c6a0718SPierre Ossman 1387e809517fSPierre Ossman if (host->cmd->error) { 13881c6a0718SPierre Ossman tasklet_schedule(&host->finish_tasklet); 1389e809517fSPierre Ossman return; 1390e809517fSPierre Ossman } 1391e809517fSPierre Ossman 1392e809517fSPierre Ossman /* 1393e809517fSPierre Ossman * The host can send and interrupt when the busy state has 1394e809517fSPierre Ossman * ended, allowing us to wait without wasting CPU cycles. 1395e809517fSPierre Ossman * Unfortunately this is overloaded on the "data complete" 1396e809517fSPierre Ossman * interrupt, so we need to take some care when handling 1397e809517fSPierre Ossman * it. 1398e809517fSPierre Ossman * 1399e809517fSPierre Ossman * Note: The 1.0 specification is a bit ambiguous about this 1400e809517fSPierre Ossman * feature so there might be some problems with older 1401e809517fSPierre Ossman * controllers. 1402e809517fSPierre Ossman */ 1403e809517fSPierre Ossman if (host->cmd->flags & MMC_RSP_BUSY) { 1404e809517fSPierre Ossman if (host->cmd->data) 1405e809517fSPierre Ossman DBG("Cannot wait for busy signal when also " 1406e809517fSPierre Ossman "doing a data transfer"); 1407f945405cSBen Dooks else if (!(host->quirks & SDHCI_QUIRK_NO_BUSY_IRQ)) 1408e809517fSPierre Ossman return; 1409f945405cSBen Dooks 1410f945405cSBen Dooks /* The controller does not support the end-of-busy IRQ, 1411f945405cSBen Dooks * fall through and take the SDHCI_INT_RESPONSE */ 1412e809517fSPierre Ossman } 1413e809517fSPierre Ossman 1414e809517fSPierre Ossman if (intmask & SDHCI_INT_RESPONSE) 141543b58b36SPierre Ossman sdhci_finish_command(host); 14161c6a0718SPierre Ossman } 14171c6a0718SPierre Ossman 14186882a8c0SBen Dooks #ifdef DEBUG 14196882a8c0SBen Dooks static void sdhci_show_adma_error(struct sdhci_host *host) 14206882a8c0SBen Dooks { 14216882a8c0SBen Dooks const char *name = mmc_hostname(host->mmc); 14226882a8c0SBen Dooks u8 *desc = host->adma_desc; 14236882a8c0SBen Dooks __le32 *dma; 14246882a8c0SBen Dooks __le16 *len; 14256882a8c0SBen Dooks u8 attr; 14266882a8c0SBen Dooks 14276882a8c0SBen Dooks sdhci_dumpregs(host); 14286882a8c0SBen Dooks 14296882a8c0SBen Dooks while (true) { 14306882a8c0SBen Dooks dma = (__le32 *)(desc + 4); 14316882a8c0SBen Dooks len = (__le16 *)(desc + 2); 14326882a8c0SBen Dooks attr = *desc; 14336882a8c0SBen Dooks 14346882a8c0SBen Dooks DBG("%s: %p: DMA 0x%08x, LEN 0x%04x, Attr=0x%02x\n", 14356882a8c0SBen Dooks name, desc, le32_to_cpu(*dma), le16_to_cpu(*len), attr); 14366882a8c0SBen Dooks 14376882a8c0SBen Dooks desc += 8; 14386882a8c0SBen Dooks 14396882a8c0SBen Dooks if (attr & 2) 14406882a8c0SBen Dooks break; 14416882a8c0SBen Dooks } 14426882a8c0SBen Dooks } 14436882a8c0SBen Dooks #else 14446882a8c0SBen Dooks static void sdhci_show_adma_error(struct sdhci_host *host) { } 14456882a8c0SBen Dooks #endif 14466882a8c0SBen Dooks 14471c6a0718SPierre Ossman static void sdhci_data_irq(struct sdhci_host *host, u32 intmask) 14481c6a0718SPierre Ossman { 14491c6a0718SPierre Ossman BUG_ON(intmask == 0); 14501c6a0718SPierre Ossman 14511c6a0718SPierre Ossman if (!host->data) { 14521c6a0718SPierre Ossman /* 1453e809517fSPierre Ossman * The "data complete" interrupt is also used to 1454e809517fSPierre Ossman * indicate that a busy state has ended. See comment 1455e809517fSPierre Ossman * above in sdhci_cmd_irq(). 14561c6a0718SPierre Ossman */ 1457e809517fSPierre Ossman if (host->cmd && (host->cmd->flags & MMC_RSP_BUSY)) { 1458e809517fSPierre Ossman if (intmask & SDHCI_INT_DATA_END) { 1459e809517fSPierre Ossman sdhci_finish_command(host); 14601c6a0718SPierre Ossman return; 1461e809517fSPierre Ossman } 1462e809517fSPierre Ossman } 14631c6a0718SPierre Ossman 1464b67ac3f3SPierre Ossman printk(KERN_ERR "%s: Got data interrupt 0x%08x even " 1465b67ac3f3SPierre Ossman "though no data operation was in progress.\n", 1466b67ac3f3SPierre Ossman mmc_hostname(host->mmc), (unsigned)intmask); 14671c6a0718SPierre Ossman sdhci_dumpregs(host); 14681c6a0718SPierre Ossman 14691c6a0718SPierre Ossman return; 14701c6a0718SPierre Ossman } 14711c6a0718SPierre Ossman 14721c6a0718SPierre Ossman if (intmask & SDHCI_INT_DATA_TIMEOUT) 147317b0429dSPierre Ossman host->data->error = -ETIMEDOUT; 147417b0429dSPierre Ossman else if (intmask & (SDHCI_INT_DATA_CRC | SDHCI_INT_DATA_END_BIT)) 147517b0429dSPierre Ossman host->data->error = -EILSEQ; 14766882a8c0SBen Dooks else if (intmask & SDHCI_INT_ADMA_ERROR) { 14776882a8c0SBen Dooks printk(KERN_ERR "%s: ADMA error\n", mmc_hostname(host->mmc)); 14786882a8c0SBen Dooks sdhci_show_adma_error(host); 14792134a922SPierre Ossman host->data->error = -EIO; 14806882a8c0SBen Dooks } 14811c6a0718SPierre Ossman 148217b0429dSPierre Ossman if (host->data->error) 14831c6a0718SPierre Ossman sdhci_finish_data(host); 14841c6a0718SPierre Ossman else { 14851c6a0718SPierre Ossman if (intmask & (SDHCI_INT_DATA_AVAIL | SDHCI_INT_SPACE_AVAIL)) 14861c6a0718SPierre Ossman sdhci_transfer_pio(host); 14871c6a0718SPierre Ossman 14886ba736a1SPierre Ossman /* 14896ba736a1SPierre Ossman * We currently don't do anything fancy with DMA 14906ba736a1SPierre Ossman * boundaries, but as we can't disable the feature 14916ba736a1SPierre Ossman * we need to at least restart the transfer. 14926ba736a1SPierre Ossman */ 14936ba736a1SPierre Ossman if (intmask & SDHCI_INT_DMA_END) 14944e4141a5SAnton Vorontsov sdhci_writel(host, sdhci_readl(host, SDHCI_DMA_ADDRESS), 14954e4141a5SAnton Vorontsov SDHCI_DMA_ADDRESS); 14966ba736a1SPierre Ossman 1497e538fbe8SPierre Ossman if (intmask & SDHCI_INT_DATA_END) { 1498e538fbe8SPierre Ossman if (host->cmd) { 1499e538fbe8SPierre Ossman /* 1500e538fbe8SPierre Ossman * Data managed to finish before the 1501e538fbe8SPierre Ossman * command completed. Make sure we do 1502e538fbe8SPierre Ossman * things in the proper order. 1503e538fbe8SPierre Ossman */ 1504e538fbe8SPierre Ossman host->data_early = 1; 1505e538fbe8SPierre Ossman } else { 15061c6a0718SPierre Ossman sdhci_finish_data(host); 15071c6a0718SPierre Ossman } 15081c6a0718SPierre Ossman } 1509e538fbe8SPierre Ossman } 1510e538fbe8SPierre Ossman } 15111c6a0718SPierre Ossman 15121c6a0718SPierre Ossman static irqreturn_t sdhci_irq(int irq, void *dev_id) 15131c6a0718SPierre Ossman { 15141c6a0718SPierre Ossman irqreturn_t result; 15151c6a0718SPierre Ossman struct sdhci_host* host = dev_id; 15161c6a0718SPierre Ossman u32 intmask; 1517f75979b7SPierre Ossman int cardint = 0; 15181c6a0718SPierre Ossman 15191c6a0718SPierre Ossman spin_lock(&host->lock); 15201c6a0718SPierre Ossman 15214e4141a5SAnton Vorontsov intmask = sdhci_readl(host, SDHCI_INT_STATUS); 15221c6a0718SPierre Ossman 15231c6a0718SPierre Ossman if (!intmask || intmask == 0xffffffff) { 15241c6a0718SPierre Ossman result = IRQ_NONE; 15251c6a0718SPierre Ossman goto out; 15261c6a0718SPierre Ossman } 15271c6a0718SPierre Ossman 1528b69c9058SPierre Ossman DBG("*** %s got interrupt: 0x%08x\n", 1529b69c9058SPierre Ossman mmc_hostname(host->mmc), intmask); 15301c6a0718SPierre Ossman 15311c6a0718SPierre Ossman if (intmask & (SDHCI_INT_CARD_INSERT | SDHCI_INT_CARD_REMOVE)) { 15324e4141a5SAnton Vorontsov sdhci_writel(host, intmask & (SDHCI_INT_CARD_INSERT | 15334e4141a5SAnton Vorontsov SDHCI_INT_CARD_REMOVE), SDHCI_INT_STATUS); 15341c6a0718SPierre Ossman tasklet_schedule(&host->card_tasklet); 15351c6a0718SPierre Ossman } 15361c6a0718SPierre Ossman 15371c6a0718SPierre Ossman intmask &= ~(SDHCI_INT_CARD_INSERT | SDHCI_INT_CARD_REMOVE); 15381c6a0718SPierre Ossman 15391c6a0718SPierre Ossman if (intmask & SDHCI_INT_CMD_MASK) { 15404e4141a5SAnton Vorontsov sdhci_writel(host, intmask & SDHCI_INT_CMD_MASK, 15414e4141a5SAnton Vorontsov SDHCI_INT_STATUS); 15421c6a0718SPierre Ossman sdhci_cmd_irq(host, intmask & SDHCI_INT_CMD_MASK); 15431c6a0718SPierre Ossman } 15441c6a0718SPierre Ossman 15451c6a0718SPierre Ossman if (intmask & SDHCI_INT_DATA_MASK) { 15464e4141a5SAnton Vorontsov sdhci_writel(host, intmask & SDHCI_INT_DATA_MASK, 15474e4141a5SAnton Vorontsov SDHCI_INT_STATUS); 15481c6a0718SPierre Ossman sdhci_data_irq(host, intmask & SDHCI_INT_DATA_MASK); 15491c6a0718SPierre Ossman } 15501c6a0718SPierre Ossman 15511c6a0718SPierre Ossman intmask &= ~(SDHCI_INT_CMD_MASK | SDHCI_INT_DATA_MASK); 15521c6a0718SPierre Ossman 1553964f9ce2SPierre Ossman intmask &= ~SDHCI_INT_ERROR; 1554964f9ce2SPierre Ossman 15551c6a0718SPierre Ossman if (intmask & SDHCI_INT_BUS_POWER) { 15561c6a0718SPierre Ossman printk(KERN_ERR "%s: Card is consuming too much power!\n", 15571c6a0718SPierre Ossman mmc_hostname(host->mmc)); 15584e4141a5SAnton Vorontsov sdhci_writel(host, SDHCI_INT_BUS_POWER, SDHCI_INT_STATUS); 15591c6a0718SPierre Ossman } 15601c6a0718SPierre Ossman 15619d26a5d3SRolf Eike Beer intmask &= ~SDHCI_INT_BUS_POWER; 15621c6a0718SPierre Ossman 1563f75979b7SPierre Ossman if (intmask & SDHCI_INT_CARD_INT) 1564f75979b7SPierre Ossman cardint = 1; 1565f75979b7SPierre Ossman 1566f75979b7SPierre Ossman intmask &= ~SDHCI_INT_CARD_INT; 1567f75979b7SPierre Ossman 15681c6a0718SPierre Ossman if (intmask) { 15691c6a0718SPierre Ossman printk(KERN_ERR "%s: Unexpected interrupt 0x%08x.\n", 15701c6a0718SPierre Ossman mmc_hostname(host->mmc), intmask); 15711c6a0718SPierre Ossman sdhci_dumpregs(host); 15721c6a0718SPierre Ossman 15734e4141a5SAnton Vorontsov sdhci_writel(host, intmask, SDHCI_INT_STATUS); 15741c6a0718SPierre Ossman } 15751c6a0718SPierre Ossman 15761c6a0718SPierre Ossman result = IRQ_HANDLED; 15771c6a0718SPierre Ossman 15781c6a0718SPierre Ossman mmiowb(); 15791c6a0718SPierre Ossman out: 15801c6a0718SPierre Ossman spin_unlock(&host->lock); 15811c6a0718SPierre Ossman 1582f75979b7SPierre Ossman /* 1583f75979b7SPierre Ossman * We have to delay this as it calls back into the driver. 1584f75979b7SPierre Ossman */ 1585f75979b7SPierre Ossman if (cardint) 1586f75979b7SPierre Ossman mmc_signal_sdio_irq(host->mmc); 1587f75979b7SPierre Ossman 15881c6a0718SPierre Ossman return result; 15891c6a0718SPierre Ossman } 15901c6a0718SPierre Ossman 15911c6a0718SPierre Ossman /*****************************************************************************\ 15921c6a0718SPierre Ossman * * 15931c6a0718SPierre Ossman * Suspend/resume * 15941c6a0718SPierre Ossman * * 15951c6a0718SPierre Ossman \*****************************************************************************/ 15961c6a0718SPierre Ossman 15971c6a0718SPierre Ossman #ifdef CONFIG_PM 15981c6a0718SPierre Ossman 1599b8c86fc5SPierre Ossman int sdhci_suspend_host(struct sdhci_host *host, pm_message_t state) 16001c6a0718SPierre Ossman { 1601b8c86fc5SPierre Ossman int ret; 16021c6a0718SPierre Ossman 16037260cf5eSAnton Vorontsov sdhci_disable_card_detection(host); 16047260cf5eSAnton Vorontsov 16051a13f8faSMatt Fleming ret = mmc_suspend_host(host->mmc); 16061c6a0718SPierre Ossman if (ret) 16071c6a0718SPierre Ossman return ret; 16081c6a0718SPierre Ossman 1609b8c86fc5SPierre Ossman free_irq(host->irq, host); 1610b8c86fc5SPierre Ossman 1611b8c86fc5SPierre Ossman return 0; 1612b8c86fc5SPierre Ossman } 1613b8c86fc5SPierre Ossman 1614b8c86fc5SPierre Ossman EXPORT_SYMBOL_GPL(sdhci_suspend_host); 1615b8c86fc5SPierre Ossman 1616b8c86fc5SPierre Ossman int sdhci_resume_host(struct sdhci_host *host) 1617b8c86fc5SPierre Ossman { 1618b8c86fc5SPierre Ossman int ret; 1619b8c86fc5SPierre Ossman 1620a13abc7bSRichard Röjfors if (host->flags & (SDHCI_USE_SDMA | SDHCI_USE_ADMA)) { 1621b8c86fc5SPierre Ossman if (host->ops->enable_dma) 1622b8c86fc5SPierre Ossman host->ops->enable_dma(host); 1623b8c86fc5SPierre Ossman } 1624b8c86fc5SPierre Ossman 1625b8c86fc5SPierre Ossman ret = request_irq(host->irq, sdhci_irq, IRQF_SHARED, 1626b8c86fc5SPierre Ossman mmc_hostname(host->mmc), host); 16271c6a0718SPierre Ossman if (ret) 16281c6a0718SPierre Ossman return ret; 1629b8c86fc5SPierre Ossman 16302f4cbb3dSNicolas Pitre sdhci_init(host, (host->mmc->pm_flags & MMC_PM_KEEP_POWER)); 16311c6a0718SPierre Ossman mmiowb(); 1632b8c86fc5SPierre Ossman 1633b8c86fc5SPierre Ossman ret = mmc_resume_host(host->mmc); 16347260cf5eSAnton Vorontsov sdhci_enable_card_detection(host); 16357260cf5eSAnton Vorontsov 16362f4cbb3dSNicolas Pitre return ret; 16371c6a0718SPierre Ossman } 16381c6a0718SPierre Ossman 1639b8c86fc5SPierre Ossman EXPORT_SYMBOL_GPL(sdhci_resume_host); 16401c6a0718SPierre Ossman 16411c6a0718SPierre Ossman #endif /* CONFIG_PM */ 16421c6a0718SPierre Ossman 16431c6a0718SPierre Ossman /*****************************************************************************\ 16441c6a0718SPierre Ossman * * 1645b8c86fc5SPierre Ossman * Device allocation/registration * 16461c6a0718SPierre Ossman * * 16471c6a0718SPierre Ossman \*****************************************************************************/ 16481c6a0718SPierre Ossman 1649b8c86fc5SPierre Ossman struct sdhci_host *sdhci_alloc_host(struct device *dev, 1650b8c86fc5SPierre Ossman size_t priv_size) 16511c6a0718SPierre Ossman { 16521c6a0718SPierre Ossman struct mmc_host *mmc; 16531c6a0718SPierre Ossman struct sdhci_host *host; 16541c6a0718SPierre Ossman 1655b8c86fc5SPierre Ossman WARN_ON(dev == NULL); 16561c6a0718SPierre Ossman 1657b8c86fc5SPierre Ossman mmc = mmc_alloc_host(sizeof(struct sdhci_host) + priv_size, dev); 16581c6a0718SPierre Ossman if (!mmc) 1659b8c86fc5SPierre Ossman return ERR_PTR(-ENOMEM); 16601c6a0718SPierre Ossman 16611c6a0718SPierre Ossman host = mmc_priv(mmc); 16621c6a0718SPierre Ossman host->mmc = mmc; 16631c6a0718SPierre Ossman 1664b8c86fc5SPierre Ossman return host; 16651c6a0718SPierre Ossman } 16661c6a0718SPierre Ossman 1667b8c86fc5SPierre Ossman EXPORT_SYMBOL_GPL(sdhci_alloc_host); 1668b8c86fc5SPierre Ossman 1669b8c86fc5SPierre Ossman int sdhci_add_host(struct sdhci_host *host) 1670b8c86fc5SPierre Ossman { 1671b8c86fc5SPierre Ossman struct mmc_host *mmc; 1672b8c86fc5SPierre Ossman unsigned int caps; 1673b8c86fc5SPierre Ossman int ret; 1674b8c86fc5SPierre Ossman 1675b8c86fc5SPierre Ossman WARN_ON(host == NULL); 1676b8c86fc5SPierre Ossman if (host == NULL) 1677b8c86fc5SPierre Ossman return -EINVAL; 1678b8c86fc5SPierre Ossman 1679b8c86fc5SPierre Ossman mmc = host->mmc; 1680b8c86fc5SPierre Ossman 1681b8c86fc5SPierre Ossman if (debug_quirks) 1682b8c86fc5SPierre Ossman host->quirks = debug_quirks; 1683b8c86fc5SPierre Ossman 16841c6a0718SPierre Ossman sdhci_reset(host, SDHCI_RESET_ALL); 16851c6a0718SPierre Ossman 16864e4141a5SAnton Vorontsov host->version = sdhci_readw(host, SDHCI_HOST_VERSION); 16872134a922SPierre Ossman host->version = (host->version & SDHCI_SPEC_VER_MASK) 16882134a922SPierre Ossman >> SDHCI_SPEC_VER_SHIFT; 16892134a922SPierre Ossman if (host->version > SDHCI_SPEC_200) { 16901c6a0718SPierre Ossman printk(KERN_ERR "%s: Unknown controller version (%d). " 1691b69c9058SPierre Ossman "You may experience problems.\n", mmc_hostname(mmc), 16922134a922SPierre Ossman host->version); 16931c6a0718SPierre Ossman } 16941c6a0718SPierre Ossman 1695ccc92c23SMaxim Levitsky caps = (host->quirks & SDHCI_QUIRK_MISSING_CAPS) ? host->caps : 1696ccc92c23SMaxim Levitsky sdhci_readl(host, SDHCI_CAPABILITIES); 16971c6a0718SPierre Ossman 1698b8c86fc5SPierre Ossman if (host->quirks & SDHCI_QUIRK_FORCE_DMA) 1699a13abc7bSRichard Röjfors host->flags |= SDHCI_USE_SDMA; 1700a13abc7bSRichard Röjfors else if (!(caps & SDHCI_CAN_DO_SDMA)) 1701a13abc7bSRichard Röjfors DBG("Controller doesn't have SDMA capability\n"); 17021c6a0718SPierre Ossman else 1703a13abc7bSRichard Röjfors host->flags |= SDHCI_USE_SDMA; 17041c6a0718SPierre Ossman 1705b8c86fc5SPierre Ossman if ((host->quirks & SDHCI_QUIRK_BROKEN_DMA) && 1706a13abc7bSRichard Röjfors (host->flags & SDHCI_USE_SDMA)) { 1707cee687ceSRolf Eike Beer DBG("Disabling DMA as it is marked broken\n"); 1708a13abc7bSRichard Röjfors host->flags &= ~SDHCI_USE_SDMA; 17097c168e3dSFeng Tang } 17107c168e3dSFeng Tang 1711a13abc7bSRichard Röjfors if ((host->version >= SDHCI_SPEC_200) && (caps & SDHCI_CAN_DO_ADMA2)) 17122134a922SPierre Ossman host->flags |= SDHCI_USE_ADMA; 17132134a922SPierre Ossman 17142134a922SPierre Ossman if ((host->quirks & SDHCI_QUIRK_BROKEN_ADMA) && 17152134a922SPierre Ossman (host->flags & SDHCI_USE_ADMA)) { 17162134a922SPierre Ossman DBG("Disabling ADMA as it is marked broken\n"); 17172134a922SPierre Ossman host->flags &= ~SDHCI_USE_ADMA; 17182134a922SPierre Ossman } 17192134a922SPierre Ossman 1720a13abc7bSRichard Röjfors if (host->flags & (SDHCI_USE_SDMA | SDHCI_USE_ADMA)) { 1721b8c86fc5SPierre Ossman if (host->ops->enable_dma) { 1722b8c86fc5SPierre Ossman if (host->ops->enable_dma(host)) { 1723b8c86fc5SPierre Ossman printk(KERN_WARNING "%s: No suitable DMA " 1724b8c86fc5SPierre Ossman "available. Falling back to PIO.\n", 1725b8c86fc5SPierre Ossman mmc_hostname(mmc)); 1726a13abc7bSRichard Röjfors host->flags &= 1727a13abc7bSRichard Röjfors ~(SDHCI_USE_SDMA | SDHCI_USE_ADMA); 17281c6a0718SPierre Ossman } 17291c6a0718SPierre Ossman } 1730b8c86fc5SPierre Ossman } 17311c6a0718SPierre Ossman 17322134a922SPierre Ossman if (host->flags & SDHCI_USE_ADMA) { 17332134a922SPierre Ossman /* 17342134a922SPierre Ossman * We need to allocate descriptors for all sg entries 17352134a922SPierre Ossman * (128) and potentially one alignment transfer for 17362134a922SPierre Ossman * each of those entries. 17372134a922SPierre Ossman */ 17382134a922SPierre Ossman host->adma_desc = kmalloc((128 * 2 + 1) * 4, GFP_KERNEL); 17392134a922SPierre Ossman host->align_buffer = kmalloc(128 * 4, GFP_KERNEL); 17402134a922SPierre Ossman if (!host->adma_desc || !host->align_buffer) { 17412134a922SPierre Ossman kfree(host->adma_desc); 17422134a922SPierre Ossman kfree(host->align_buffer); 17432134a922SPierre Ossman printk(KERN_WARNING "%s: Unable to allocate ADMA " 17442134a922SPierre Ossman "buffers. Falling back to standard DMA.\n", 17452134a922SPierre Ossman mmc_hostname(mmc)); 17462134a922SPierre Ossman host->flags &= ~SDHCI_USE_ADMA; 17472134a922SPierre Ossman } 17482134a922SPierre Ossman } 17492134a922SPierre Ossman 17507659150cSPierre Ossman /* 17517659150cSPierre Ossman * If we use DMA, then it's up to the caller to set the DMA 17527659150cSPierre Ossman * mask, but PIO does not need the hw shim so we set a new 17537659150cSPierre Ossman * mask here in that case. 17547659150cSPierre Ossman */ 1755a13abc7bSRichard Röjfors if (!(host->flags & (SDHCI_USE_SDMA | SDHCI_USE_ADMA))) { 17567659150cSPierre Ossman host->dma_mask = DMA_BIT_MASK(64); 17577659150cSPierre Ossman mmc_dev(host->mmc)->dma_mask = &host->dma_mask; 17587659150cSPierre Ossman } 17591c6a0718SPierre Ossman 17601c6a0718SPierre Ossman host->max_clk = 17611c6a0718SPierre Ossman (caps & SDHCI_CLOCK_BASE_MASK) >> SDHCI_CLOCK_BASE_SHIFT; 17624240ff0aSBen Dooks host->max_clk *= 1000000; 1763f27f47efSAnton Vorontsov if (host->max_clk == 0 || host->quirks & 1764f27f47efSAnton Vorontsov SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN) { 17654240ff0aSBen Dooks if (!host->ops->get_max_clock) { 17664240ff0aSBen Dooks printk(KERN_ERR 17674240ff0aSBen Dooks "%s: Hardware doesn't specify base clock " 1768b69c9058SPierre Ossman "frequency.\n", mmc_hostname(mmc)); 1769b8c86fc5SPierre Ossman return -ENODEV; 17701c6a0718SPierre Ossman } 17714240ff0aSBen Dooks host->max_clk = host->ops->get_max_clock(host); 17724240ff0aSBen Dooks } 17731c6a0718SPierre Ossman 17741c6a0718SPierre Ossman host->timeout_clk = 17751c6a0718SPierre Ossman (caps & SDHCI_TIMEOUT_CLK_MASK) >> SDHCI_TIMEOUT_CLK_SHIFT; 17761c6a0718SPierre Ossman if (host->timeout_clk == 0) { 177781b39802SAnton Vorontsov if (host->ops->get_timeout_clock) { 177881b39802SAnton Vorontsov host->timeout_clk = host->ops->get_timeout_clock(host); 177981b39802SAnton Vorontsov } else if (!(host->quirks & 178081b39802SAnton Vorontsov SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK)) { 17814240ff0aSBen Dooks printk(KERN_ERR 17824240ff0aSBen Dooks "%s: Hardware doesn't specify timeout clock " 1783b69c9058SPierre Ossman "frequency.\n", mmc_hostname(mmc)); 1784b8c86fc5SPierre Ossman return -ENODEV; 17851c6a0718SPierre Ossman } 17864240ff0aSBen Dooks } 17871c6a0718SPierre Ossman if (caps & SDHCI_TIMEOUT_CLK_UNIT) 17881c6a0718SPierre Ossman host->timeout_clk *= 1000; 17891c6a0718SPierre Ossman 17901c6a0718SPierre Ossman /* 17911c6a0718SPierre Ossman * Set host parameters. 17921c6a0718SPierre Ossman */ 17931c6a0718SPierre Ossman mmc->ops = &sdhci_ops; 1794ce5f036bSMarek Szyprowski if (host->ops->get_min_clock) 1795a9e58f25SAnton Vorontsov mmc->f_min = host->ops->get_min_clock(host); 1796a9e58f25SAnton Vorontsov else 17971c6a0718SPierre Ossman mmc->f_min = host->max_clk / 256; 17981c6a0718SPierre Ossman mmc->f_max = host->max_clk; 1799c1f5977cSKyungmin Park mmc->caps |= MMC_CAP_SDIO_IRQ; 18005fe23c7fSAnton Vorontsov 18015fe23c7fSAnton Vorontsov if (!(host->quirks & SDHCI_QUIRK_FORCE_1_BIT_DATA)) 18025fe23c7fSAnton Vorontsov mmc->caps |= MMC_CAP_4_BIT_DATA; 18031c6a0718SPierre Ossman 180486a6a874SPierre Ossman if (caps & SDHCI_CAN_DO_HISPD) 18051c6a0718SPierre Ossman mmc->caps |= MMC_CAP_SD_HIGHSPEED; 18061c6a0718SPierre Ossman 180768d1fb7eSAnton Vorontsov if (host->quirks & SDHCI_QUIRK_BROKEN_CARD_DETECTION) 180868d1fb7eSAnton Vorontsov mmc->caps |= MMC_CAP_NEEDS_POLL; 180968d1fb7eSAnton Vorontsov 18101c6a0718SPierre Ossman mmc->ocr_avail = 0; 18111c6a0718SPierre Ossman if (caps & SDHCI_CAN_VDD_330) 18121c6a0718SPierre Ossman mmc->ocr_avail |= MMC_VDD_32_33|MMC_VDD_33_34; 18131c6a0718SPierre Ossman if (caps & SDHCI_CAN_VDD_300) 18141c6a0718SPierre Ossman mmc->ocr_avail |= MMC_VDD_29_30|MMC_VDD_30_31; 18151c6a0718SPierre Ossman if (caps & SDHCI_CAN_VDD_180) 181655556da0SPhilip Langdale mmc->ocr_avail |= MMC_VDD_165_195; 18171c6a0718SPierre Ossman 18181c6a0718SPierre Ossman if (mmc->ocr_avail == 0) { 18191c6a0718SPierre Ossman printk(KERN_ERR "%s: Hardware doesn't report any " 1820b69c9058SPierre Ossman "support voltages.\n", mmc_hostname(mmc)); 1821b8c86fc5SPierre Ossman return -ENODEV; 18221c6a0718SPierre Ossman } 18231c6a0718SPierre Ossman 18241c6a0718SPierre Ossman spin_lock_init(&host->lock); 18251c6a0718SPierre Ossman 18261c6a0718SPierre Ossman /* 18272134a922SPierre Ossman * Maximum number of segments. Depends on if the hardware 18282134a922SPierre Ossman * can do scatter/gather or not. 18291c6a0718SPierre Ossman */ 18302134a922SPierre Ossman if (host->flags & SDHCI_USE_ADMA) 18312134a922SPierre Ossman mmc->max_hw_segs = 128; 1832a13abc7bSRichard Röjfors else if (host->flags & SDHCI_USE_SDMA) 18331c6a0718SPierre Ossman mmc->max_hw_segs = 1; 18342134a922SPierre Ossman else /* PIO */ 18352134a922SPierre Ossman mmc->max_hw_segs = 128; 18362134a922SPierre Ossman mmc->max_phys_segs = 128; 18371c6a0718SPierre Ossman 18381c6a0718SPierre Ossman /* 18391c6a0718SPierre Ossman * Maximum number of sectors in one transfer. Limited by DMA boundary 18401c6a0718SPierre Ossman * size (512KiB). 18411c6a0718SPierre Ossman */ 18421c6a0718SPierre Ossman mmc->max_req_size = 524288; 18431c6a0718SPierre Ossman 18441c6a0718SPierre Ossman /* 18451c6a0718SPierre Ossman * Maximum segment size. Could be one segment with the maximum number 18462134a922SPierre Ossman * of bytes. When doing hardware scatter/gather, each entry cannot 18472134a922SPierre Ossman * be larger than 64 KiB though. 18481c6a0718SPierre Ossman */ 18492134a922SPierre Ossman if (host->flags & SDHCI_USE_ADMA) 18502134a922SPierre Ossman mmc->max_seg_size = 65536; 18512134a922SPierre Ossman else 18521c6a0718SPierre Ossman mmc->max_seg_size = mmc->max_req_size; 18531c6a0718SPierre Ossman 18541c6a0718SPierre Ossman /* 18551c6a0718SPierre Ossman * Maximum block size. This varies from controller to controller and 18561c6a0718SPierre Ossman * is specified in the capabilities register. 18571c6a0718SPierre Ossman */ 18580633f654SAnton Vorontsov if (host->quirks & SDHCI_QUIRK_FORCE_BLK_SZ_2048) { 18590633f654SAnton Vorontsov mmc->max_blk_size = 2; 18600633f654SAnton Vorontsov } else { 18610633f654SAnton Vorontsov mmc->max_blk_size = (caps & SDHCI_MAX_BLOCK_MASK) >> 18620633f654SAnton Vorontsov SDHCI_MAX_BLOCK_SHIFT; 18631c6a0718SPierre Ossman if (mmc->max_blk_size >= 3) { 1864b69c9058SPierre Ossman printk(KERN_WARNING "%s: Invalid maximum block size, " 1865b69c9058SPierre Ossman "assuming 512 bytes\n", mmc_hostname(mmc)); 18660633f654SAnton Vorontsov mmc->max_blk_size = 0; 18670633f654SAnton Vorontsov } 18680633f654SAnton Vorontsov } 18690633f654SAnton Vorontsov 18701c6a0718SPierre Ossman mmc->max_blk_size = 512 << mmc->max_blk_size; 18711c6a0718SPierre Ossman 18721c6a0718SPierre Ossman /* 18731c6a0718SPierre Ossman * Maximum block count. 18741c6a0718SPierre Ossman */ 18751388eefdSBen Dooks mmc->max_blk_count = (host->quirks & SDHCI_QUIRK_NO_MULTIBLOCK) ? 1 : 65535; 18761c6a0718SPierre Ossman 18771c6a0718SPierre Ossman /* 18781c6a0718SPierre Ossman * Init tasklets. 18791c6a0718SPierre Ossman */ 18801c6a0718SPierre Ossman tasklet_init(&host->card_tasklet, 18811c6a0718SPierre Ossman sdhci_tasklet_card, (unsigned long)host); 18821c6a0718SPierre Ossman tasklet_init(&host->finish_tasklet, 18831c6a0718SPierre Ossman sdhci_tasklet_finish, (unsigned long)host); 18841c6a0718SPierre Ossman 18851c6a0718SPierre Ossman setup_timer(&host->timer, sdhci_timeout_timer, (unsigned long)host); 18861c6a0718SPierre Ossman 18871c6a0718SPierre Ossman ret = request_irq(host->irq, sdhci_irq, IRQF_SHARED, 1888b69c9058SPierre Ossman mmc_hostname(mmc), host); 18891c6a0718SPierre Ossman if (ret) 18901c6a0718SPierre Ossman goto untasklet; 18911c6a0718SPierre Ossman 18922f4cbb3dSNicolas Pitre sdhci_init(host, 0); 18931c6a0718SPierre Ossman 18941c6a0718SPierre Ossman #ifdef CONFIG_MMC_DEBUG 18951c6a0718SPierre Ossman sdhci_dumpregs(host); 18961c6a0718SPierre Ossman #endif 18971c6a0718SPierre Ossman 1898f9134319SPierre Ossman #ifdef SDHCI_USE_LEDS_CLASS 18995dbace0cSHelmut Schaa snprintf(host->led_name, sizeof(host->led_name), 19005dbace0cSHelmut Schaa "%s::", mmc_hostname(mmc)); 19015dbace0cSHelmut Schaa host->led.name = host->led_name; 19022f730fecSPierre Ossman host->led.brightness = LED_OFF; 19032f730fecSPierre Ossman host->led.default_trigger = mmc_hostname(mmc); 19042f730fecSPierre Ossman host->led.brightness_set = sdhci_led_control; 19052f730fecSPierre Ossman 1906b8c86fc5SPierre Ossman ret = led_classdev_register(mmc_dev(mmc), &host->led); 19072f730fecSPierre Ossman if (ret) 19082f730fecSPierre Ossman goto reset; 19092f730fecSPierre Ossman #endif 19102f730fecSPierre Ossman 19111c6a0718SPierre Ossman mmiowb(); 19121c6a0718SPierre Ossman 19131c6a0718SPierre Ossman mmc_add_host(mmc); 19141c6a0718SPierre Ossman 1915a13abc7bSRichard Röjfors printk(KERN_INFO "%s: SDHCI controller on %s [%s] using %s\n", 1916d1b26863SKay Sievers mmc_hostname(mmc), host->hw_name, dev_name(mmc_dev(mmc)), 1917a13abc7bSRichard Röjfors (host->flags & SDHCI_USE_ADMA) ? "ADMA" : 1918a13abc7bSRichard Röjfors (host->flags & SDHCI_USE_SDMA) ? "DMA" : "PIO"); 19191c6a0718SPierre Ossman 19207260cf5eSAnton Vorontsov sdhci_enable_card_detection(host); 19217260cf5eSAnton Vorontsov 19221c6a0718SPierre Ossman return 0; 19231c6a0718SPierre Ossman 1924f9134319SPierre Ossman #ifdef SDHCI_USE_LEDS_CLASS 19252f730fecSPierre Ossman reset: 19262f730fecSPierre Ossman sdhci_reset(host, SDHCI_RESET_ALL); 19272f730fecSPierre Ossman free_irq(host->irq, host); 19282f730fecSPierre Ossman #endif 19291c6a0718SPierre Ossman untasklet: 19301c6a0718SPierre Ossman tasklet_kill(&host->card_tasklet); 19311c6a0718SPierre Ossman tasklet_kill(&host->finish_tasklet); 19321c6a0718SPierre Ossman 19331c6a0718SPierre Ossman return ret; 19341c6a0718SPierre Ossman } 19351c6a0718SPierre Ossman 1936b8c86fc5SPierre Ossman EXPORT_SYMBOL_GPL(sdhci_add_host); 1937b8c86fc5SPierre Ossman 19381e72859eSPierre Ossman void sdhci_remove_host(struct sdhci_host *host, int dead) 19391c6a0718SPierre Ossman { 19401e72859eSPierre Ossman unsigned long flags; 19411e72859eSPierre Ossman 19421e72859eSPierre Ossman if (dead) { 19431e72859eSPierre Ossman spin_lock_irqsave(&host->lock, flags); 19441e72859eSPierre Ossman 19451e72859eSPierre Ossman host->flags |= SDHCI_DEVICE_DEAD; 19461e72859eSPierre Ossman 19471e72859eSPierre Ossman if (host->mrq) { 19481e72859eSPierre Ossman printk(KERN_ERR "%s: Controller removed during " 19491e72859eSPierre Ossman " transfer!\n", mmc_hostname(host->mmc)); 19501e72859eSPierre Ossman 19511e72859eSPierre Ossman host->mrq->cmd->error = -ENOMEDIUM; 19521e72859eSPierre Ossman tasklet_schedule(&host->finish_tasklet); 19531e72859eSPierre Ossman } 19541e72859eSPierre Ossman 19551e72859eSPierre Ossman spin_unlock_irqrestore(&host->lock, flags); 19561e72859eSPierre Ossman } 19571e72859eSPierre Ossman 19587260cf5eSAnton Vorontsov sdhci_disable_card_detection(host); 19597260cf5eSAnton Vorontsov 1960b8c86fc5SPierre Ossman mmc_remove_host(host->mmc); 19611c6a0718SPierre Ossman 1962f9134319SPierre Ossman #ifdef SDHCI_USE_LEDS_CLASS 19632f730fecSPierre Ossman led_classdev_unregister(&host->led); 19642f730fecSPierre Ossman #endif 19652f730fecSPierre Ossman 19661e72859eSPierre Ossman if (!dead) 19671c6a0718SPierre Ossman sdhci_reset(host, SDHCI_RESET_ALL); 19681c6a0718SPierre Ossman 19691c6a0718SPierre Ossman free_irq(host->irq, host); 19701c6a0718SPierre Ossman 19711c6a0718SPierre Ossman del_timer_sync(&host->timer); 19721c6a0718SPierre Ossman 19731c6a0718SPierre Ossman tasklet_kill(&host->card_tasklet); 19741c6a0718SPierre Ossman tasklet_kill(&host->finish_tasklet); 19752134a922SPierre Ossman 19762134a922SPierre Ossman kfree(host->adma_desc); 19772134a922SPierre Ossman kfree(host->align_buffer); 19782134a922SPierre Ossman 19792134a922SPierre Ossman host->adma_desc = NULL; 19802134a922SPierre Ossman host->align_buffer = NULL; 19811c6a0718SPierre Ossman } 19821c6a0718SPierre Ossman 1983b8c86fc5SPierre Ossman EXPORT_SYMBOL_GPL(sdhci_remove_host); 1984b8c86fc5SPierre Ossman 1985b8c86fc5SPierre Ossman void sdhci_free_host(struct sdhci_host *host) 19861c6a0718SPierre Ossman { 1987b8c86fc5SPierre Ossman mmc_free_host(host->mmc); 19881c6a0718SPierre Ossman } 19891c6a0718SPierre Ossman 1990b8c86fc5SPierre Ossman EXPORT_SYMBOL_GPL(sdhci_free_host); 19911c6a0718SPierre Ossman 19921c6a0718SPierre Ossman /*****************************************************************************\ 19931c6a0718SPierre Ossman * * 19941c6a0718SPierre Ossman * Driver init/exit * 19951c6a0718SPierre Ossman * * 19961c6a0718SPierre Ossman \*****************************************************************************/ 19971c6a0718SPierre Ossman 19981c6a0718SPierre Ossman static int __init sdhci_drv_init(void) 19991c6a0718SPierre Ossman { 20001c6a0718SPierre Ossman printk(KERN_INFO DRIVER_NAME 20011c6a0718SPierre Ossman ": Secure Digital Host Controller Interface driver\n"); 20021c6a0718SPierre Ossman printk(KERN_INFO DRIVER_NAME ": Copyright(c) Pierre Ossman\n"); 20031c6a0718SPierre Ossman 2004b8c86fc5SPierre Ossman return 0; 20051c6a0718SPierre Ossman } 20061c6a0718SPierre Ossman 20071c6a0718SPierre Ossman static void __exit sdhci_drv_exit(void) 20081c6a0718SPierre Ossman { 20091c6a0718SPierre Ossman } 20101c6a0718SPierre Ossman 20111c6a0718SPierre Ossman module_init(sdhci_drv_init); 20121c6a0718SPierre Ossman module_exit(sdhci_drv_exit); 20131c6a0718SPierre Ossman 20141c6a0718SPierre Ossman module_param(debug_quirks, uint, 0444); 20151c6a0718SPierre Ossman 201632710e8fSPierre Ossman MODULE_AUTHOR("Pierre Ossman <pierre@ossman.eu>"); 2017b8c86fc5SPierre Ossman MODULE_DESCRIPTION("Secure Digital Host Controller Interface core driver"); 20181c6a0718SPierre Ossman MODULE_LICENSE("GPL"); 20191c6a0718SPierre Ossman 20201c6a0718SPierre Ossman MODULE_PARM_DESC(debug_quirks, "Force certain quirks."); 2021