11c6a0718SPierre Ossman /* 270f10482SPierre Ossman * linux/drivers/mmc/host/sdhci.c - Secure Digital Host Controller Interface driver 31c6a0718SPierre Ossman * 4b69c9058SPierre Ossman * Copyright (C) 2005-2008 Pierre Ossman, All Rights Reserved. 51c6a0718SPierre Ossman * 61c6a0718SPierre Ossman * This program is free software; you can redistribute it and/or modify 71c6a0718SPierre Ossman * it under the terms of the GNU General Public License as published by 81c6a0718SPierre Ossman * the Free Software Foundation; either version 2 of the License, or (at 91c6a0718SPierre Ossman * your option) any later version. 1084c46a53SPierre Ossman * 1184c46a53SPierre Ossman * Thanks to the following companies for their support: 1284c46a53SPierre Ossman * 1384c46a53SPierre Ossman * - JMicron (hardware and technical support) 141c6a0718SPierre Ossman */ 151c6a0718SPierre Ossman 161c6a0718SPierre Ossman #include <linux/delay.h> 171c6a0718SPierre Ossman #include <linux/highmem.h> 18b8c86fc5SPierre Ossman #include <linux/io.h> 191c6a0718SPierre Ossman #include <linux/dma-mapping.h> 2011763609SRalf Baechle #include <linux/scatterlist.h> 211c6a0718SPierre Ossman 222f730fecSPierre Ossman #include <linux/leds.h> 232f730fecSPierre Ossman 241c6a0718SPierre Ossman #include <linux/mmc/host.h> 251c6a0718SPierre Ossman 261c6a0718SPierre Ossman #include "sdhci.h" 271c6a0718SPierre Ossman 281c6a0718SPierre Ossman #define DRIVER_NAME "sdhci" 291c6a0718SPierre Ossman 301c6a0718SPierre Ossman #define DBG(f, x...) \ 311c6a0718SPierre Ossman pr_debug(DRIVER_NAME " [%s()]: " f, __func__,## x) 321c6a0718SPierre Ossman 331c6a0718SPierre Ossman static unsigned int debug_quirks = 0; 341c6a0718SPierre Ossman 351c6a0718SPierre Ossman static void sdhci_prepare_data(struct sdhci_host *, struct mmc_data *); 361c6a0718SPierre Ossman static void sdhci_finish_data(struct sdhci_host *); 371c6a0718SPierre Ossman 381c6a0718SPierre Ossman static void sdhci_send_command(struct sdhci_host *, struct mmc_command *); 391c6a0718SPierre Ossman static void sdhci_finish_command(struct sdhci_host *); 401c6a0718SPierre Ossman 411c6a0718SPierre Ossman static void sdhci_dumpregs(struct sdhci_host *host) 421c6a0718SPierre Ossman { 431c6a0718SPierre Ossman printk(KERN_DEBUG DRIVER_NAME ": ============== REGISTER DUMP ==============\n"); 441c6a0718SPierre Ossman 451c6a0718SPierre Ossman printk(KERN_DEBUG DRIVER_NAME ": Sys addr: 0x%08x | Version: 0x%08x\n", 461c6a0718SPierre Ossman readl(host->ioaddr + SDHCI_DMA_ADDRESS), 471c6a0718SPierre Ossman readw(host->ioaddr + SDHCI_HOST_VERSION)); 481c6a0718SPierre Ossman printk(KERN_DEBUG DRIVER_NAME ": Blk size: 0x%08x | Blk cnt: 0x%08x\n", 491c6a0718SPierre Ossman readw(host->ioaddr + SDHCI_BLOCK_SIZE), 501c6a0718SPierre Ossman readw(host->ioaddr + SDHCI_BLOCK_COUNT)); 511c6a0718SPierre Ossman printk(KERN_DEBUG DRIVER_NAME ": Argument: 0x%08x | Trn mode: 0x%08x\n", 521c6a0718SPierre Ossman readl(host->ioaddr + SDHCI_ARGUMENT), 531c6a0718SPierre Ossman readw(host->ioaddr + SDHCI_TRANSFER_MODE)); 541c6a0718SPierre Ossman printk(KERN_DEBUG DRIVER_NAME ": Present: 0x%08x | Host ctl: 0x%08x\n", 551c6a0718SPierre Ossman readl(host->ioaddr + SDHCI_PRESENT_STATE), 561c6a0718SPierre Ossman readb(host->ioaddr + SDHCI_HOST_CONTROL)); 571c6a0718SPierre Ossman printk(KERN_DEBUG DRIVER_NAME ": Power: 0x%08x | Blk gap: 0x%08x\n", 581c6a0718SPierre Ossman readb(host->ioaddr + SDHCI_POWER_CONTROL), 591c6a0718SPierre Ossman readb(host->ioaddr + SDHCI_BLOCK_GAP_CONTROL)); 601c6a0718SPierre Ossman printk(KERN_DEBUG DRIVER_NAME ": Wake-up: 0x%08x | Clock: 0x%08x\n", 612df3b71bSNicolas Pitre readb(host->ioaddr + SDHCI_WAKE_UP_CONTROL), 621c6a0718SPierre Ossman readw(host->ioaddr + SDHCI_CLOCK_CONTROL)); 631c6a0718SPierre Ossman printk(KERN_DEBUG DRIVER_NAME ": Timeout: 0x%08x | Int stat: 0x%08x\n", 641c6a0718SPierre Ossman readb(host->ioaddr + SDHCI_TIMEOUT_CONTROL), 651c6a0718SPierre Ossman readl(host->ioaddr + SDHCI_INT_STATUS)); 661c6a0718SPierre Ossman printk(KERN_DEBUG DRIVER_NAME ": Int enab: 0x%08x | Sig enab: 0x%08x\n", 671c6a0718SPierre Ossman readl(host->ioaddr + SDHCI_INT_ENABLE), 681c6a0718SPierre Ossman readl(host->ioaddr + SDHCI_SIGNAL_ENABLE)); 691c6a0718SPierre Ossman printk(KERN_DEBUG DRIVER_NAME ": AC12 err: 0x%08x | Slot int: 0x%08x\n", 701c6a0718SPierre Ossman readw(host->ioaddr + SDHCI_ACMD12_ERR), 711c6a0718SPierre Ossman readw(host->ioaddr + SDHCI_SLOT_INT_STATUS)); 721c6a0718SPierre Ossman printk(KERN_DEBUG DRIVER_NAME ": Caps: 0x%08x | Max curr: 0x%08x\n", 731c6a0718SPierre Ossman readl(host->ioaddr + SDHCI_CAPABILITIES), 741c6a0718SPierre Ossman readl(host->ioaddr + SDHCI_MAX_CURRENT)); 751c6a0718SPierre Ossman 761c6a0718SPierre Ossman printk(KERN_DEBUG DRIVER_NAME ": ===========================================\n"); 771c6a0718SPierre Ossman } 781c6a0718SPierre Ossman 791c6a0718SPierre Ossman /*****************************************************************************\ 801c6a0718SPierre Ossman * * 811c6a0718SPierre Ossman * Low level functions * 821c6a0718SPierre Ossman * * 831c6a0718SPierre Ossman \*****************************************************************************/ 841c6a0718SPierre Ossman 851c6a0718SPierre Ossman static void sdhci_reset(struct sdhci_host *host, u8 mask) 861c6a0718SPierre Ossman { 871c6a0718SPierre Ossman unsigned long timeout; 881c6a0718SPierre Ossman 89b8c86fc5SPierre Ossman if (host->quirks & SDHCI_QUIRK_NO_CARD_NO_RESET) { 901c6a0718SPierre Ossman if (!(readl(host->ioaddr + SDHCI_PRESENT_STATE) & 911c6a0718SPierre Ossman SDHCI_CARD_PRESENT)) 921c6a0718SPierre Ossman return; 931c6a0718SPierre Ossman } 941c6a0718SPierre Ossman 951c6a0718SPierre Ossman writeb(mask, host->ioaddr + SDHCI_SOFTWARE_RESET); 961c6a0718SPierre Ossman 971c6a0718SPierre Ossman if (mask & SDHCI_RESET_ALL) 981c6a0718SPierre Ossman host->clock = 0; 991c6a0718SPierre Ossman 1001c6a0718SPierre Ossman /* Wait max 100 ms */ 1011c6a0718SPierre Ossman timeout = 100; 1021c6a0718SPierre Ossman 1031c6a0718SPierre Ossman /* hw clears the bit when it's done */ 1041c6a0718SPierre Ossman while (readb(host->ioaddr + SDHCI_SOFTWARE_RESET) & mask) { 1051c6a0718SPierre Ossman if (timeout == 0) { 1061c6a0718SPierre Ossman printk(KERN_ERR "%s: Reset 0x%x never completed.\n", 1071c6a0718SPierre Ossman mmc_hostname(host->mmc), (int)mask); 1081c6a0718SPierre Ossman sdhci_dumpregs(host); 1091c6a0718SPierre Ossman return; 1101c6a0718SPierre Ossman } 1111c6a0718SPierre Ossman timeout--; 1121c6a0718SPierre Ossman mdelay(1); 1131c6a0718SPierre Ossman } 1141c6a0718SPierre Ossman } 1151c6a0718SPierre Ossman 1161c6a0718SPierre Ossman static void sdhci_init(struct sdhci_host *host) 1171c6a0718SPierre Ossman { 1181c6a0718SPierre Ossman u32 intmask; 1191c6a0718SPierre Ossman 1201c6a0718SPierre Ossman sdhci_reset(host, SDHCI_RESET_ALL); 1211c6a0718SPierre Ossman 1221c6a0718SPierre Ossman intmask = SDHCI_INT_BUS_POWER | SDHCI_INT_DATA_END_BIT | 1231c6a0718SPierre Ossman SDHCI_INT_DATA_CRC | SDHCI_INT_DATA_TIMEOUT | SDHCI_INT_INDEX | 1241c6a0718SPierre Ossman SDHCI_INT_END_BIT | SDHCI_INT_CRC | SDHCI_INT_TIMEOUT | 1251c6a0718SPierre Ossman SDHCI_INT_CARD_REMOVE | SDHCI_INT_CARD_INSERT | 1261c6a0718SPierre Ossman SDHCI_INT_DATA_AVAIL | SDHCI_INT_SPACE_AVAIL | 1272134a922SPierre Ossman SDHCI_INT_DMA_END | SDHCI_INT_DATA_END | SDHCI_INT_RESPONSE | 1282134a922SPierre Ossman SDHCI_INT_ADMA_ERROR; 1291c6a0718SPierre Ossman 1301c6a0718SPierre Ossman writel(intmask, host->ioaddr + SDHCI_INT_ENABLE); 1311c6a0718SPierre Ossman writel(intmask, host->ioaddr + SDHCI_SIGNAL_ENABLE); 1321c6a0718SPierre Ossman } 1331c6a0718SPierre Ossman 1341c6a0718SPierre Ossman static void sdhci_activate_led(struct sdhci_host *host) 1351c6a0718SPierre Ossman { 1361c6a0718SPierre Ossman u8 ctrl; 1371c6a0718SPierre Ossman 1381c6a0718SPierre Ossman ctrl = readb(host->ioaddr + SDHCI_HOST_CONTROL); 1391c6a0718SPierre Ossman ctrl |= SDHCI_CTRL_LED; 1401c6a0718SPierre Ossman writeb(ctrl, host->ioaddr + SDHCI_HOST_CONTROL); 1411c6a0718SPierre Ossman } 1421c6a0718SPierre Ossman 1431c6a0718SPierre Ossman static void sdhci_deactivate_led(struct sdhci_host *host) 1441c6a0718SPierre Ossman { 1451c6a0718SPierre Ossman u8 ctrl; 1461c6a0718SPierre Ossman 1471c6a0718SPierre Ossman ctrl = readb(host->ioaddr + SDHCI_HOST_CONTROL); 1481c6a0718SPierre Ossman ctrl &= ~SDHCI_CTRL_LED; 1491c6a0718SPierre Ossman writeb(ctrl, host->ioaddr + SDHCI_HOST_CONTROL); 1501c6a0718SPierre Ossman } 1511c6a0718SPierre Ossman 1522f730fecSPierre Ossman #ifdef CONFIG_LEDS_CLASS 1532f730fecSPierre Ossman static void sdhci_led_control(struct led_classdev *led, 1542f730fecSPierre Ossman enum led_brightness brightness) 1552f730fecSPierre Ossman { 1562f730fecSPierre Ossman struct sdhci_host *host = container_of(led, struct sdhci_host, led); 1572f730fecSPierre Ossman unsigned long flags; 1582f730fecSPierre Ossman 1592f730fecSPierre Ossman spin_lock_irqsave(&host->lock, flags); 1602f730fecSPierre Ossman 1612f730fecSPierre Ossman if (brightness == LED_OFF) 1622f730fecSPierre Ossman sdhci_deactivate_led(host); 1632f730fecSPierre Ossman else 1642f730fecSPierre Ossman sdhci_activate_led(host); 1652f730fecSPierre Ossman 1662f730fecSPierre Ossman spin_unlock_irqrestore(&host->lock, flags); 1672f730fecSPierre Ossman } 1682f730fecSPierre Ossman #endif 1692f730fecSPierre Ossman 1701c6a0718SPierre Ossman /*****************************************************************************\ 1711c6a0718SPierre Ossman * * 1721c6a0718SPierre Ossman * Core functions * 1731c6a0718SPierre Ossman * * 1741c6a0718SPierre Ossman \*****************************************************************************/ 1751c6a0718SPierre Ossman 1761c6a0718SPierre Ossman static void sdhci_read_block_pio(struct sdhci_host *host) 1771c6a0718SPierre Ossman { 1787659150cSPierre Ossman unsigned long flags; 1797659150cSPierre Ossman size_t blksize, len, chunk; 1807659150cSPierre Ossman u32 scratch; 1817659150cSPierre Ossman u8 *buf; 1821c6a0718SPierre Ossman 1831c6a0718SPierre Ossman DBG("PIO reading\n"); 1841c6a0718SPierre Ossman 1851c6a0718SPierre Ossman blksize = host->data->blksz; 1867659150cSPierre Ossman chunk = 0; 1871c6a0718SPierre Ossman 1887659150cSPierre Ossman local_irq_save(flags); 1891c6a0718SPierre Ossman 1901c6a0718SPierre Ossman while (blksize) { 1917659150cSPierre Ossman if (!sg_miter_next(&host->sg_miter)) 1927659150cSPierre Ossman BUG(); 1937659150cSPierre Ossman 1947659150cSPierre Ossman len = min(host->sg_miter.length, blksize); 1957659150cSPierre Ossman 1967659150cSPierre Ossman blksize -= len; 1977659150cSPierre Ossman host->sg_miter.consumed = len; 1987659150cSPierre Ossman 1997659150cSPierre Ossman buf = host->sg_miter.addr; 2007659150cSPierre Ossman 2017659150cSPierre Ossman while (len) { 2027659150cSPierre Ossman if (chunk == 0) { 2037659150cSPierre Ossman scratch = readl(host->ioaddr + SDHCI_BUFFER); 2047659150cSPierre Ossman chunk = 4; 2051c6a0718SPierre Ossman } 2061c6a0718SPierre Ossman 2077659150cSPierre Ossman *buf = scratch & 0xFF; 2081c6a0718SPierre Ossman 2097659150cSPierre Ossman buf++; 2107659150cSPierre Ossman scratch >>= 8; 2117659150cSPierre Ossman chunk--; 2127659150cSPierre Ossman len--; 2137659150cSPierre Ossman } 2141c6a0718SPierre Ossman } 2151c6a0718SPierre Ossman 2167659150cSPierre Ossman sg_miter_stop(&host->sg_miter); 2177659150cSPierre Ossman 2187659150cSPierre Ossman local_irq_restore(flags); 2191c6a0718SPierre Ossman } 2201c6a0718SPierre Ossman 2211c6a0718SPierre Ossman static void sdhci_write_block_pio(struct sdhci_host *host) 2221c6a0718SPierre Ossman { 2237659150cSPierre Ossman unsigned long flags; 2247659150cSPierre Ossman size_t blksize, len, chunk; 2257659150cSPierre Ossman u32 scratch; 2267659150cSPierre Ossman u8 *buf; 2271c6a0718SPierre Ossman 2281c6a0718SPierre Ossman DBG("PIO writing\n"); 2291c6a0718SPierre Ossman 2301c6a0718SPierre Ossman blksize = host->data->blksz; 2317659150cSPierre Ossman chunk = 0; 2327659150cSPierre Ossman scratch = 0; 2331c6a0718SPierre Ossman 2347659150cSPierre Ossman local_irq_save(flags); 2351c6a0718SPierre Ossman 2361c6a0718SPierre Ossman while (blksize) { 2377659150cSPierre Ossman if (!sg_miter_next(&host->sg_miter)) 2387659150cSPierre Ossman BUG(); 2391c6a0718SPierre Ossman 2407659150cSPierre Ossman len = min(host->sg_miter.length, blksize); 2411c6a0718SPierre Ossman 2427659150cSPierre Ossman blksize -= len; 2437659150cSPierre Ossman host->sg_miter.consumed = len; 2447659150cSPierre Ossman 2457659150cSPierre Ossman buf = host->sg_miter.addr; 2467659150cSPierre Ossman 2477659150cSPierre Ossman while (len) { 2487659150cSPierre Ossman scratch |= (u32)*buf << (chunk * 8); 2497659150cSPierre Ossman 2507659150cSPierre Ossman buf++; 2517659150cSPierre Ossman chunk++; 2527659150cSPierre Ossman len--; 2537659150cSPierre Ossman 2547659150cSPierre Ossman if ((chunk == 4) || ((len == 0) && (blksize == 0))) { 2557659150cSPierre Ossman writel(scratch, host->ioaddr + SDHCI_BUFFER); 2567659150cSPierre Ossman chunk = 0; 2577659150cSPierre Ossman scratch = 0; 2587659150cSPierre Ossman } 2597659150cSPierre Ossman } 2601c6a0718SPierre Ossman } 2611c6a0718SPierre Ossman 2627659150cSPierre Ossman sg_miter_stop(&host->sg_miter); 2631c6a0718SPierre Ossman 2647659150cSPierre Ossman local_irq_restore(flags); 2651c6a0718SPierre Ossman } 2661c6a0718SPierre Ossman 2671c6a0718SPierre Ossman static void sdhci_transfer_pio(struct sdhci_host *host) 2681c6a0718SPierre Ossman { 2691c6a0718SPierre Ossman u32 mask; 2701c6a0718SPierre Ossman 2711c6a0718SPierre Ossman BUG_ON(!host->data); 2721c6a0718SPierre Ossman 2737659150cSPierre Ossman if (host->blocks == 0) 2741c6a0718SPierre Ossman return; 2751c6a0718SPierre Ossman 2761c6a0718SPierre Ossman if (host->data->flags & MMC_DATA_READ) 2771c6a0718SPierre Ossman mask = SDHCI_DATA_AVAILABLE; 2781c6a0718SPierre Ossman else 2791c6a0718SPierre Ossman mask = SDHCI_SPACE_AVAILABLE; 2801c6a0718SPierre Ossman 2811c6a0718SPierre Ossman while (readl(host->ioaddr + SDHCI_PRESENT_STATE) & mask) { 2821c6a0718SPierre Ossman if (host->data->flags & MMC_DATA_READ) 2831c6a0718SPierre Ossman sdhci_read_block_pio(host); 2841c6a0718SPierre Ossman else 2851c6a0718SPierre Ossman sdhci_write_block_pio(host); 2861c6a0718SPierre Ossman 2877659150cSPierre Ossman host->blocks--; 2887659150cSPierre Ossman if (host->blocks == 0) 2891c6a0718SPierre Ossman break; 2901c6a0718SPierre Ossman } 2911c6a0718SPierre Ossman 2921c6a0718SPierre Ossman DBG("PIO transfer complete.\n"); 2931c6a0718SPierre Ossman } 2941c6a0718SPierre Ossman 2952134a922SPierre Ossman static char *sdhci_kmap_atomic(struct scatterlist *sg, unsigned long *flags) 2962134a922SPierre Ossman { 2972134a922SPierre Ossman local_irq_save(*flags); 2982134a922SPierre Ossman return kmap_atomic(sg_page(sg), KM_BIO_SRC_IRQ) + sg->offset; 2992134a922SPierre Ossman } 3002134a922SPierre Ossman 3012134a922SPierre Ossman static void sdhci_kunmap_atomic(void *buffer, unsigned long *flags) 3022134a922SPierre Ossman { 3032134a922SPierre Ossman kunmap_atomic(buffer, KM_BIO_SRC_IRQ); 3042134a922SPierre Ossman local_irq_restore(*flags); 3052134a922SPierre Ossman } 3062134a922SPierre Ossman 3078f1934ceSPierre Ossman static int sdhci_adma_table_pre(struct sdhci_host *host, 3082134a922SPierre Ossman struct mmc_data *data) 3092134a922SPierre Ossman { 3102134a922SPierre Ossman int direction; 3112134a922SPierre Ossman 3122134a922SPierre Ossman u8 *desc; 3132134a922SPierre Ossman u8 *align; 3142134a922SPierre Ossman dma_addr_t addr; 3152134a922SPierre Ossman dma_addr_t align_addr; 3162134a922SPierre Ossman int len, offset; 3172134a922SPierre Ossman 3182134a922SPierre Ossman struct scatterlist *sg; 3192134a922SPierre Ossman int i; 3202134a922SPierre Ossman char *buffer; 3212134a922SPierre Ossman unsigned long flags; 3222134a922SPierre Ossman 3232134a922SPierre Ossman /* 3242134a922SPierre Ossman * The spec does not specify endianness of descriptor table. 3252134a922SPierre Ossman * We currently guess that it is LE. 3262134a922SPierre Ossman */ 3272134a922SPierre Ossman 3282134a922SPierre Ossman if (data->flags & MMC_DATA_READ) 3292134a922SPierre Ossman direction = DMA_FROM_DEVICE; 3302134a922SPierre Ossman else 3312134a922SPierre Ossman direction = DMA_TO_DEVICE; 3322134a922SPierre Ossman 3332134a922SPierre Ossman /* 3342134a922SPierre Ossman * The ADMA descriptor table is mapped further down as we 3352134a922SPierre Ossman * need to fill it with data first. 3362134a922SPierre Ossman */ 3372134a922SPierre Ossman 3382134a922SPierre Ossman host->align_addr = dma_map_single(mmc_dev(host->mmc), 3392134a922SPierre Ossman host->align_buffer, 128 * 4, direction); 3408d8bb39bSFUJITA Tomonori if (dma_mapping_error(mmc_dev(host->mmc), host->align_addr)) 3418f1934ceSPierre Ossman goto fail; 3422134a922SPierre Ossman BUG_ON(host->align_addr & 0x3); 3432134a922SPierre Ossman 3442134a922SPierre Ossman host->sg_count = dma_map_sg(mmc_dev(host->mmc), 3452134a922SPierre Ossman data->sg, data->sg_len, direction); 3468f1934ceSPierre Ossman if (host->sg_count == 0) 3478f1934ceSPierre Ossman goto unmap_align; 3482134a922SPierre Ossman 3492134a922SPierre Ossman desc = host->adma_desc; 3502134a922SPierre Ossman align = host->align_buffer; 3512134a922SPierre Ossman 3522134a922SPierre Ossman align_addr = host->align_addr; 3532134a922SPierre Ossman 3542134a922SPierre Ossman for_each_sg(data->sg, sg, host->sg_count, i) { 3552134a922SPierre Ossman addr = sg_dma_address(sg); 3562134a922SPierre Ossman len = sg_dma_len(sg); 3572134a922SPierre Ossman 3582134a922SPierre Ossman /* 3592134a922SPierre Ossman * The SDHCI specification states that ADMA 3602134a922SPierre Ossman * addresses must be 32-bit aligned. If they 3612134a922SPierre Ossman * aren't, then we use a bounce buffer for 3622134a922SPierre Ossman * the (up to three) bytes that screw up the 3632134a922SPierre Ossman * alignment. 3642134a922SPierre Ossman */ 3652134a922SPierre Ossman offset = (4 - (addr & 0x3)) & 0x3; 3662134a922SPierre Ossman if (offset) { 3672134a922SPierre Ossman if (data->flags & MMC_DATA_WRITE) { 3682134a922SPierre Ossman buffer = sdhci_kmap_atomic(sg, &flags); 3696cefd05fSPierre Ossman WARN_ON(((long)buffer & PAGE_MASK) > (PAGE_SIZE - 3)); 3702134a922SPierre Ossman memcpy(align, buffer, offset); 3712134a922SPierre Ossman sdhci_kunmap_atomic(buffer, &flags); 3722134a922SPierre Ossman } 3732134a922SPierre Ossman 3742134a922SPierre Ossman desc[7] = (align_addr >> 24) & 0xff; 3752134a922SPierre Ossman desc[6] = (align_addr >> 16) & 0xff; 3762134a922SPierre Ossman desc[5] = (align_addr >> 8) & 0xff; 3772134a922SPierre Ossman desc[4] = (align_addr >> 0) & 0xff; 3782134a922SPierre Ossman 3792134a922SPierre Ossman BUG_ON(offset > 65536); 3802134a922SPierre Ossman 3812134a922SPierre Ossman desc[3] = (offset >> 8) & 0xff; 3822134a922SPierre Ossman desc[2] = (offset >> 0) & 0xff; 3832134a922SPierre Ossman 3842134a922SPierre Ossman desc[1] = 0x00; 3852134a922SPierre Ossman desc[0] = 0x21; /* tran, valid */ 3862134a922SPierre Ossman 3872134a922SPierre Ossman align += 4; 3882134a922SPierre Ossman align_addr += 4; 3892134a922SPierre Ossman 3902134a922SPierre Ossman desc += 8; 3912134a922SPierre Ossman 3922134a922SPierre Ossman addr += offset; 3932134a922SPierre Ossman len -= offset; 3942134a922SPierre Ossman } 3952134a922SPierre Ossman 3962134a922SPierre Ossman desc[7] = (addr >> 24) & 0xff; 3972134a922SPierre Ossman desc[6] = (addr >> 16) & 0xff; 3982134a922SPierre Ossman desc[5] = (addr >> 8) & 0xff; 3992134a922SPierre Ossman desc[4] = (addr >> 0) & 0xff; 4002134a922SPierre Ossman 4012134a922SPierre Ossman BUG_ON(len > 65536); 4022134a922SPierre Ossman 4032134a922SPierre Ossman desc[3] = (len >> 8) & 0xff; 4042134a922SPierre Ossman desc[2] = (len >> 0) & 0xff; 4052134a922SPierre Ossman 4062134a922SPierre Ossman desc[1] = 0x00; 4072134a922SPierre Ossman desc[0] = 0x21; /* tran, valid */ 4082134a922SPierre Ossman 4092134a922SPierre Ossman desc += 8; 4102134a922SPierre Ossman 4112134a922SPierre Ossman /* 4122134a922SPierre Ossman * If this triggers then we have a calculation bug 4132134a922SPierre Ossman * somewhere. :/ 4142134a922SPierre Ossman */ 4152134a922SPierre Ossman WARN_ON((desc - host->adma_desc) > (128 * 2 + 1) * 4); 4162134a922SPierre Ossman } 4172134a922SPierre Ossman 4182134a922SPierre Ossman /* 4192134a922SPierre Ossman * Add a terminating entry. 4202134a922SPierre Ossman */ 4212134a922SPierre Ossman desc[7] = 0; 4222134a922SPierre Ossman desc[6] = 0; 4232134a922SPierre Ossman desc[5] = 0; 4242134a922SPierre Ossman desc[4] = 0; 4252134a922SPierre Ossman 4262134a922SPierre Ossman desc[3] = 0; 4272134a922SPierre Ossman desc[2] = 0; 4282134a922SPierre Ossman 4292134a922SPierre Ossman desc[1] = 0x00; 4302134a922SPierre Ossman desc[0] = 0x03; /* nop, end, valid */ 4312134a922SPierre Ossman 4322134a922SPierre Ossman /* 4332134a922SPierre Ossman * Resync align buffer as we might have changed it. 4342134a922SPierre Ossman */ 4352134a922SPierre Ossman if (data->flags & MMC_DATA_WRITE) { 4362134a922SPierre Ossman dma_sync_single_for_device(mmc_dev(host->mmc), 4372134a922SPierre Ossman host->align_addr, 128 * 4, direction); 4382134a922SPierre Ossman } 4392134a922SPierre Ossman 4402134a922SPierre Ossman host->adma_addr = dma_map_single(mmc_dev(host->mmc), 4412134a922SPierre Ossman host->adma_desc, (128 * 2 + 1) * 4, DMA_TO_DEVICE); 4428d8bb39bSFUJITA Tomonori if (dma_mapping_error(mmc_dev(host->mmc), host->align_addr)) 4438f1934ceSPierre Ossman goto unmap_entries; 4442134a922SPierre Ossman BUG_ON(host->adma_addr & 0x3); 4458f1934ceSPierre Ossman 4468f1934ceSPierre Ossman return 0; 4478f1934ceSPierre Ossman 4488f1934ceSPierre Ossman unmap_entries: 4498f1934ceSPierre Ossman dma_unmap_sg(mmc_dev(host->mmc), data->sg, 4508f1934ceSPierre Ossman data->sg_len, direction); 4518f1934ceSPierre Ossman unmap_align: 4528f1934ceSPierre Ossman dma_unmap_single(mmc_dev(host->mmc), host->align_addr, 4538f1934ceSPierre Ossman 128 * 4, direction); 4548f1934ceSPierre Ossman fail: 4558f1934ceSPierre Ossman return -EINVAL; 4562134a922SPierre Ossman } 4572134a922SPierre Ossman 4582134a922SPierre Ossman static void sdhci_adma_table_post(struct sdhci_host *host, 4592134a922SPierre Ossman struct mmc_data *data) 4602134a922SPierre Ossman { 4612134a922SPierre Ossman int direction; 4622134a922SPierre Ossman 4632134a922SPierre Ossman struct scatterlist *sg; 4642134a922SPierre Ossman int i, size; 4652134a922SPierre Ossman u8 *align; 4662134a922SPierre Ossman char *buffer; 4672134a922SPierre Ossman unsigned long flags; 4682134a922SPierre Ossman 4692134a922SPierre Ossman if (data->flags & MMC_DATA_READ) 4702134a922SPierre Ossman direction = DMA_FROM_DEVICE; 4712134a922SPierre Ossman else 4722134a922SPierre Ossman direction = DMA_TO_DEVICE; 4732134a922SPierre Ossman 4742134a922SPierre Ossman dma_unmap_single(mmc_dev(host->mmc), host->adma_addr, 4752134a922SPierre Ossman (128 * 2 + 1) * 4, DMA_TO_DEVICE); 4762134a922SPierre Ossman 4772134a922SPierre Ossman dma_unmap_single(mmc_dev(host->mmc), host->align_addr, 4782134a922SPierre Ossman 128 * 4, direction); 4792134a922SPierre Ossman 4802134a922SPierre Ossman if (data->flags & MMC_DATA_READ) { 4812134a922SPierre Ossman dma_sync_sg_for_cpu(mmc_dev(host->mmc), data->sg, 4822134a922SPierre Ossman data->sg_len, direction); 4832134a922SPierre Ossman 4842134a922SPierre Ossman align = host->align_buffer; 4852134a922SPierre Ossman 4862134a922SPierre Ossman for_each_sg(data->sg, sg, host->sg_count, i) { 4872134a922SPierre Ossman if (sg_dma_address(sg) & 0x3) { 4882134a922SPierre Ossman size = 4 - (sg_dma_address(sg) & 0x3); 4892134a922SPierre Ossman 4902134a922SPierre Ossman buffer = sdhci_kmap_atomic(sg, &flags); 4916cefd05fSPierre Ossman WARN_ON(((long)buffer & PAGE_MASK) > (PAGE_SIZE - 3)); 4922134a922SPierre Ossman memcpy(buffer, align, size); 4932134a922SPierre Ossman sdhci_kunmap_atomic(buffer, &flags); 4942134a922SPierre Ossman 4952134a922SPierre Ossman align += 4; 4962134a922SPierre Ossman } 4972134a922SPierre Ossman } 4982134a922SPierre Ossman } 4992134a922SPierre Ossman 5002134a922SPierre Ossman dma_unmap_sg(mmc_dev(host->mmc), data->sg, 5012134a922SPierre Ossman data->sg_len, direction); 5022134a922SPierre Ossman } 5032134a922SPierre Ossman 504ee53ab5dSPierre Ossman static u8 sdhci_calc_timeout(struct sdhci_host *host, struct mmc_data *data) 5051c6a0718SPierre Ossman { 5061c6a0718SPierre Ossman u8 count; 5071c6a0718SPierre Ossman unsigned target_timeout, current_timeout; 5081c6a0718SPierre Ossman 509ee53ab5dSPierre Ossman /* 510ee53ab5dSPierre Ossman * If the host controller provides us with an incorrect timeout 511ee53ab5dSPierre Ossman * value, just skip the check and use 0xE. The hardware may take 512ee53ab5dSPierre Ossman * longer to time out, but that's much better than having a too-short 513ee53ab5dSPierre Ossman * timeout value. 514ee53ab5dSPierre Ossman */ 515ee53ab5dSPierre Ossman if ((host->quirks & SDHCI_QUIRK_BROKEN_TIMEOUT_VAL)) 516ee53ab5dSPierre Ossman return 0xE; 517e538fbe8SPierre Ossman 5181c6a0718SPierre Ossman /* timeout in us */ 5191c6a0718SPierre Ossman target_timeout = data->timeout_ns / 1000 + 5201c6a0718SPierre Ossman data->timeout_clks / host->clock; 5211c6a0718SPierre Ossman 5221c6a0718SPierre Ossman /* 5231c6a0718SPierre Ossman * Figure out needed cycles. 5241c6a0718SPierre Ossman * We do this in steps in order to fit inside a 32 bit int. 5251c6a0718SPierre Ossman * The first step is the minimum timeout, which will have a 5261c6a0718SPierre Ossman * minimum resolution of 6 bits: 5271c6a0718SPierre Ossman * (1) 2^13*1000 > 2^22, 5281c6a0718SPierre Ossman * (2) host->timeout_clk < 2^16 5291c6a0718SPierre Ossman * => 5301c6a0718SPierre Ossman * (1) / (2) > 2^6 5311c6a0718SPierre Ossman */ 5321c6a0718SPierre Ossman count = 0; 5331c6a0718SPierre Ossman current_timeout = (1 << 13) * 1000 / host->timeout_clk; 5341c6a0718SPierre Ossman while (current_timeout < target_timeout) { 5351c6a0718SPierre Ossman count++; 5361c6a0718SPierre Ossman current_timeout <<= 1; 5371c6a0718SPierre Ossman if (count >= 0xF) 5381c6a0718SPierre Ossman break; 5391c6a0718SPierre Ossman } 5401c6a0718SPierre Ossman 5411c6a0718SPierre Ossman if (count >= 0xF) { 5421c6a0718SPierre Ossman printk(KERN_WARNING "%s: Too large timeout requested!\n", 5431c6a0718SPierre Ossman mmc_hostname(host->mmc)); 5441c6a0718SPierre Ossman count = 0xE; 5451c6a0718SPierre Ossman } 5461c6a0718SPierre Ossman 547ee53ab5dSPierre Ossman return count; 548ee53ab5dSPierre Ossman } 549ee53ab5dSPierre Ossman 550ee53ab5dSPierre Ossman static void sdhci_prepare_data(struct sdhci_host *host, struct mmc_data *data) 551ee53ab5dSPierre Ossman { 552ee53ab5dSPierre Ossman u8 count; 5532134a922SPierre Ossman u8 ctrl; 5548f1934ceSPierre Ossman int ret; 555ee53ab5dSPierre Ossman 556ee53ab5dSPierre Ossman WARN_ON(host->data); 557ee53ab5dSPierre Ossman 558ee53ab5dSPierre Ossman if (data == NULL) 559ee53ab5dSPierre Ossman return; 560ee53ab5dSPierre Ossman 561ee53ab5dSPierre Ossman /* Sanity checks */ 562ee53ab5dSPierre Ossman BUG_ON(data->blksz * data->blocks > 524288); 563ee53ab5dSPierre Ossman BUG_ON(data->blksz > host->mmc->max_blk_size); 564ee53ab5dSPierre Ossman BUG_ON(data->blocks > 65535); 565ee53ab5dSPierre Ossman 566ee53ab5dSPierre Ossman host->data = data; 567ee53ab5dSPierre Ossman host->data_early = 0; 568ee53ab5dSPierre Ossman 569ee53ab5dSPierre Ossman count = sdhci_calc_timeout(host, data); 5701c6a0718SPierre Ossman writeb(count, host->ioaddr + SDHCI_TIMEOUT_CONTROL); 5711c6a0718SPierre Ossman 572c9fddbc4SPierre Ossman if (host->flags & SDHCI_USE_DMA) 573c9fddbc4SPierre Ossman host->flags |= SDHCI_REQ_USE_DMA; 574c9fddbc4SPierre Ossman 5752134a922SPierre Ossman /* 5762134a922SPierre Ossman * FIXME: This doesn't account for merging when mapping the 5772134a922SPierre Ossman * scatterlist. 5782134a922SPierre Ossman */ 5792134a922SPierre Ossman if (host->flags & SDHCI_REQ_USE_DMA) { 5802134a922SPierre Ossman int broken, i; 5812134a922SPierre Ossman struct scatterlist *sg; 5822134a922SPierre Ossman 5832134a922SPierre Ossman broken = 0; 5842134a922SPierre Ossman if (host->flags & SDHCI_USE_ADMA) { 5852134a922SPierre Ossman if (host->quirks & SDHCI_QUIRK_32BIT_ADMA_SIZE) 5862134a922SPierre Ossman broken = 1; 5872134a922SPierre Ossman } else { 5882134a922SPierre Ossman if (host->quirks & SDHCI_QUIRK_32BIT_DMA_SIZE) 5892134a922SPierre Ossman broken = 1; 5902134a922SPierre Ossman } 5912134a922SPierre Ossman 5922134a922SPierre Ossman if (unlikely(broken)) { 5932134a922SPierre Ossman for_each_sg(data->sg, sg, data->sg_len, i) { 5942134a922SPierre Ossman if (sg->length & 0x3) { 5952134a922SPierre Ossman DBG("Reverting to PIO because of " 5962134a922SPierre Ossman "transfer size (%d)\n", 5972134a922SPierre Ossman sg->length); 598c9fddbc4SPierre Ossman host->flags &= ~SDHCI_REQ_USE_DMA; 5992134a922SPierre Ossman break; 6002134a922SPierre Ossman } 6012134a922SPierre Ossman } 6022134a922SPierre Ossman } 603c9fddbc4SPierre Ossman } 604c9fddbc4SPierre Ossman 605c9fddbc4SPierre Ossman /* 606c9fddbc4SPierre Ossman * The assumption here being that alignment is the same after 607c9fddbc4SPierre Ossman * translation to device address space. 608c9fddbc4SPierre Ossman */ 6092134a922SPierre Ossman if (host->flags & SDHCI_REQ_USE_DMA) { 6102134a922SPierre Ossman int broken, i; 6112134a922SPierre Ossman struct scatterlist *sg; 6122134a922SPierre Ossman 6132134a922SPierre Ossman broken = 0; 6142134a922SPierre Ossman if (host->flags & SDHCI_USE_ADMA) { 6152134a922SPierre Ossman /* 6162134a922SPierre Ossman * As we use 3 byte chunks to work around 6172134a922SPierre Ossman * alignment problems, we need to check this 6182134a922SPierre Ossman * quirk. 6192134a922SPierre Ossman */ 6202134a922SPierre Ossman if (host->quirks & SDHCI_QUIRK_32BIT_ADMA_SIZE) 6212134a922SPierre Ossman broken = 1; 6222134a922SPierre Ossman } else { 6232134a922SPierre Ossman if (host->quirks & SDHCI_QUIRK_32BIT_DMA_ADDR) 6242134a922SPierre Ossman broken = 1; 6252134a922SPierre Ossman } 6262134a922SPierre Ossman 6272134a922SPierre Ossman if (unlikely(broken)) { 6282134a922SPierre Ossman for_each_sg(data->sg, sg, data->sg_len, i) { 6292134a922SPierre Ossman if (sg->offset & 0x3) { 6302134a922SPierre Ossman DBG("Reverting to PIO because of " 6312134a922SPierre Ossman "bad alignment\n"); 632c9fddbc4SPierre Ossman host->flags &= ~SDHCI_REQ_USE_DMA; 6332134a922SPierre Ossman break; 6342134a922SPierre Ossman } 6352134a922SPierre Ossman } 6362134a922SPierre Ossman } 6372134a922SPierre Ossman } 6382134a922SPierre Ossman 6398f1934ceSPierre Ossman if (host->flags & SDHCI_REQ_USE_DMA) { 6408f1934ceSPierre Ossman if (host->flags & SDHCI_USE_ADMA) { 6418f1934ceSPierre Ossman ret = sdhci_adma_table_pre(host, data); 6428f1934ceSPierre Ossman if (ret) { 6438f1934ceSPierre Ossman /* 6448f1934ceSPierre Ossman * This only happens when someone fed 6458f1934ceSPierre Ossman * us an invalid request. 6468f1934ceSPierre Ossman */ 6478f1934ceSPierre Ossman WARN_ON(1); 6488f1934ceSPierre Ossman host->flags &= ~SDHCI_USE_DMA; 6498f1934ceSPierre Ossman } else { 6508f1934ceSPierre Ossman writel(host->adma_addr, 6518f1934ceSPierre Ossman host->ioaddr + SDHCI_ADMA_ADDRESS); 6528f1934ceSPierre Ossman } 6538f1934ceSPierre Ossman } else { 654c8b3e02eSTomas Winkler int sg_cnt; 6558f1934ceSPierre Ossman 656c8b3e02eSTomas Winkler sg_cnt = dma_map_sg(mmc_dev(host->mmc), 6578f1934ceSPierre Ossman data->sg, data->sg_len, 6588f1934ceSPierre Ossman (data->flags & MMC_DATA_READ) ? 6598f1934ceSPierre Ossman DMA_FROM_DEVICE : 6608f1934ceSPierre Ossman DMA_TO_DEVICE); 661c8b3e02eSTomas Winkler if (sg_cnt == 0) { 6628f1934ceSPierre Ossman /* 6638f1934ceSPierre Ossman * This only happens when someone fed 6648f1934ceSPierre Ossman * us an invalid request. 6658f1934ceSPierre Ossman */ 6668f1934ceSPierre Ossman WARN_ON(1); 6678f1934ceSPierre Ossman host->flags &= ~SDHCI_USE_DMA; 6688f1934ceSPierre Ossman } else { 669719a61b4SPierre Ossman WARN_ON(sg_cnt != 1); 6708f1934ceSPierre Ossman writel(sg_dma_address(data->sg), 6718f1934ceSPierre Ossman host->ioaddr + SDHCI_DMA_ADDRESS); 6728f1934ceSPierre Ossman } 6738f1934ceSPierre Ossman } 6748f1934ceSPierre Ossman } 6758f1934ceSPierre Ossman 6762134a922SPierre Ossman /* 6772134a922SPierre Ossman * Always adjust the DMA selection as some controllers 6782134a922SPierre Ossman * (e.g. JMicron) can't do PIO properly when the selection 6792134a922SPierre Ossman * is ADMA. 6802134a922SPierre Ossman */ 6812134a922SPierre Ossman if (host->version >= SDHCI_SPEC_200) { 6822134a922SPierre Ossman ctrl = readb(host->ioaddr + SDHCI_HOST_CONTROL); 6832134a922SPierre Ossman ctrl &= ~SDHCI_CTRL_DMA_MASK; 6842134a922SPierre Ossman if ((host->flags & SDHCI_REQ_USE_DMA) && 6852134a922SPierre Ossman (host->flags & SDHCI_USE_ADMA)) 6862134a922SPierre Ossman ctrl |= SDHCI_CTRL_ADMA32; 6872134a922SPierre Ossman else 6882134a922SPierre Ossman ctrl |= SDHCI_CTRL_SDMA; 6892134a922SPierre Ossman writeb(ctrl, host->ioaddr + SDHCI_HOST_CONTROL); 690c9fddbc4SPierre Ossman } 691c9fddbc4SPierre Ossman 6928f1934ceSPierre Ossman if (!(host->flags & SDHCI_REQ_USE_DMA)) { 6937659150cSPierre Ossman sg_miter_start(&host->sg_miter, 6947659150cSPierre Ossman data->sg, data->sg_len, SG_MITER_ATOMIC); 6957659150cSPierre Ossman host->blocks = data->blocks; 6961c6a0718SPierre Ossman } 6971c6a0718SPierre Ossman 6981c6a0718SPierre Ossman /* We do not handle DMA boundaries, so set it to max (512 KiB) */ 6991c6a0718SPierre Ossman writew(SDHCI_MAKE_BLKSZ(7, data->blksz), 7001c6a0718SPierre Ossman host->ioaddr + SDHCI_BLOCK_SIZE); 7011c6a0718SPierre Ossman writew(data->blocks, host->ioaddr + SDHCI_BLOCK_COUNT); 7021c6a0718SPierre Ossman } 7031c6a0718SPierre Ossman 7041c6a0718SPierre Ossman static void sdhci_set_transfer_mode(struct sdhci_host *host, 7051c6a0718SPierre Ossman struct mmc_data *data) 7061c6a0718SPierre Ossman { 7071c6a0718SPierre Ossman u16 mode; 7081c6a0718SPierre Ossman 7091c6a0718SPierre Ossman if (data == NULL) 7101c6a0718SPierre Ossman return; 7111c6a0718SPierre Ossman 712e538fbe8SPierre Ossman WARN_ON(!host->data); 713e538fbe8SPierre Ossman 7141c6a0718SPierre Ossman mode = SDHCI_TRNS_BLK_CNT_EN; 7151c6a0718SPierre Ossman if (data->blocks > 1) 7161c6a0718SPierre Ossman mode |= SDHCI_TRNS_MULTI; 7171c6a0718SPierre Ossman if (data->flags & MMC_DATA_READ) 7181c6a0718SPierre Ossman mode |= SDHCI_TRNS_READ; 719c9fddbc4SPierre Ossman if (host->flags & SDHCI_REQ_USE_DMA) 7201c6a0718SPierre Ossman mode |= SDHCI_TRNS_DMA; 7211c6a0718SPierre Ossman 7221c6a0718SPierre Ossman writew(mode, host->ioaddr + SDHCI_TRANSFER_MODE); 7231c6a0718SPierre Ossman } 7241c6a0718SPierre Ossman 7251c6a0718SPierre Ossman static void sdhci_finish_data(struct sdhci_host *host) 7261c6a0718SPierre Ossman { 7271c6a0718SPierre Ossman struct mmc_data *data; 7281c6a0718SPierre Ossman 7291c6a0718SPierre Ossman BUG_ON(!host->data); 7301c6a0718SPierre Ossman 7311c6a0718SPierre Ossman data = host->data; 7321c6a0718SPierre Ossman host->data = NULL; 7331c6a0718SPierre Ossman 734c9fddbc4SPierre Ossman if (host->flags & SDHCI_REQ_USE_DMA) { 7352134a922SPierre Ossman if (host->flags & SDHCI_USE_ADMA) 7362134a922SPierre Ossman sdhci_adma_table_post(host, data); 7372134a922SPierre Ossman else { 7382134a922SPierre Ossman dma_unmap_sg(mmc_dev(host->mmc), data->sg, 7392134a922SPierre Ossman data->sg_len, (data->flags & MMC_DATA_READ) ? 740b8c86fc5SPierre Ossman DMA_FROM_DEVICE : DMA_TO_DEVICE); 7411c6a0718SPierre Ossman } 7422134a922SPierre Ossman } 7431c6a0718SPierre Ossman 7441c6a0718SPierre Ossman /* 745c9b74c5bSPierre Ossman * The specification states that the block count register must 746c9b74c5bSPierre Ossman * be updated, but it does not specify at what point in the 747c9b74c5bSPierre Ossman * data flow. That makes the register entirely useless to read 748c9b74c5bSPierre Ossman * back so we have to assume that nothing made it to the card 749c9b74c5bSPierre Ossman * in the event of an error. 7501c6a0718SPierre Ossman */ 751c9b74c5bSPierre Ossman if (data->error) 752c9b74c5bSPierre Ossman data->bytes_xfered = 0; 7531c6a0718SPierre Ossman else 754c9b74c5bSPierre Ossman data->bytes_xfered = data->blksz * data->blocks; 7551c6a0718SPierre Ossman 7561c6a0718SPierre Ossman if (data->stop) { 7571c6a0718SPierre Ossman /* 7581c6a0718SPierre Ossman * The controller needs a reset of internal state machines 7591c6a0718SPierre Ossman * upon error conditions. 7601c6a0718SPierre Ossman */ 76117b0429dSPierre Ossman if (data->error) { 7621c6a0718SPierre Ossman sdhci_reset(host, SDHCI_RESET_CMD); 7631c6a0718SPierre Ossman sdhci_reset(host, SDHCI_RESET_DATA); 7641c6a0718SPierre Ossman } 7651c6a0718SPierre Ossman 7661c6a0718SPierre Ossman sdhci_send_command(host, data->stop); 7671c6a0718SPierre Ossman } else 7681c6a0718SPierre Ossman tasklet_schedule(&host->finish_tasklet); 7691c6a0718SPierre Ossman } 7701c6a0718SPierre Ossman 7711c6a0718SPierre Ossman static void sdhci_send_command(struct sdhci_host *host, struct mmc_command *cmd) 7721c6a0718SPierre Ossman { 7731c6a0718SPierre Ossman int flags; 7741c6a0718SPierre Ossman u32 mask; 7751c6a0718SPierre Ossman unsigned long timeout; 7761c6a0718SPierre Ossman 7771c6a0718SPierre Ossman WARN_ON(host->cmd); 7781c6a0718SPierre Ossman 7791c6a0718SPierre Ossman /* Wait max 10 ms */ 7801c6a0718SPierre Ossman timeout = 10; 7811c6a0718SPierre Ossman 7821c6a0718SPierre Ossman mask = SDHCI_CMD_INHIBIT; 7831c6a0718SPierre Ossman if ((cmd->data != NULL) || (cmd->flags & MMC_RSP_BUSY)) 7841c6a0718SPierre Ossman mask |= SDHCI_DATA_INHIBIT; 7851c6a0718SPierre Ossman 7861c6a0718SPierre Ossman /* We shouldn't wait for data inihibit for stop commands, even 7871c6a0718SPierre Ossman though they might use busy signaling */ 7881c6a0718SPierre Ossman if (host->mrq->data && (cmd == host->mrq->data->stop)) 7891c6a0718SPierre Ossman mask &= ~SDHCI_DATA_INHIBIT; 7901c6a0718SPierre Ossman 7911c6a0718SPierre Ossman while (readl(host->ioaddr + SDHCI_PRESENT_STATE) & mask) { 7921c6a0718SPierre Ossman if (timeout == 0) { 7931c6a0718SPierre Ossman printk(KERN_ERR "%s: Controller never released " 7941c6a0718SPierre Ossman "inhibit bit(s).\n", mmc_hostname(host->mmc)); 7951c6a0718SPierre Ossman sdhci_dumpregs(host); 79617b0429dSPierre Ossman cmd->error = -EIO; 7971c6a0718SPierre Ossman tasklet_schedule(&host->finish_tasklet); 7981c6a0718SPierre Ossman return; 7991c6a0718SPierre Ossman } 8001c6a0718SPierre Ossman timeout--; 8011c6a0718SPierre Ossman mdelay(1); 8021c6a0718SPierre Ossman } 8031c6a0718SPierre Ossman 8041c6a0718SPierre Ossman mod_timer(&host->timer, jiffies + 10 * HZ); 8051c6a0718SPierre Ossman 8061c6a0718SPierre Ossman host->cmd = cmd; 8071c6a0718SPierre Ossman 8081c6a0718SPierre Ossman sdhci_prepare_data(host, cmd->data); 8091c6a0718SPierre Ossman 8101c6a0718SPierre Ossman writel(cmd->arg, host->ioaddr + SDHCI_ARGUMENT); 8111c6a0718SPierre Ossman 8121c6a0718SPierre Ossman sdhci_set_transfer_mode(host, cmd->data); 8131c6a0718SPierre Ossman 8141c6a0718SPierre Ossman if ((cmd->flags & MMC_RSP_136) && (cmd->flags & MMC_RSP_BUSY)) { 8151c6a0718SPierre Ossman printk(KERN_ERR "%s: Unsupported response type!\n", 8161c6a0718SPierre Ossman mmc_hostname(host->mmc)); 81717b0429dSPierre Ossman cmd->error = -EINVAL; 8181c6a0718SPierre Ossman tasklet_schedule(&host->finish_tasklet); 8191c6a0718SPierre Ossman return; 8201c6a0718SPierre Ossman } 8211c6a0718SPierre Ossman 8221c6a0718SPierre Ossman if (!(cmd->flags & MMC_RSP_PRESENT)) 8231c6a0718SPierre Ossman flags = SDHCI_CMD_RESP_NONE; 8241c6a0718SPierre Ossman else if (cmd->flags & MMC_RSP_136) 8251c6a0718SPierre Ossman flags = SDHCI_CMD_RESP_LONG; 8261c6a0718SPierre Ossman else if (cmd->flags & MMC_RSP_BUSY) 8271c6a0718SPierre Ossman flags = SDHCI_CMD_RESP_SHORT_BUSY; 8281c6a0718SPierre Ossman else 8291c6a0718SPierre Ossman flags = SDHCI_CMD_RESP_SHORT; 8301c6a0718SPierre Ossman 8311c6a0718SPierre Ossman if (cmd->flags & MMC_RSP_CRC) 8321c6a0718SPierre Ossman flags |= SDHCI_CMD_CRC; 8331c6a0718SPierre Ossman if (cmd->flags & MMC_RSP_OPCODE) 8341c6a0718SPierre Ossman flags |= SDHCI_CMD_INDEX; 8351c6a0718SPierre Ossman if (cmd->data) 8361c6a0718SPierre Ossman flags |= SDHCI_CMD_DATA; 8371c6a0718SPierre Ossman 8381c6a0718SPierre Ossman writew(SDHCI_MAKE_CMD(cmd->opcode, flags), 8391c6a0718SPierre Ossman host->ioaddr + SDHCI_COMMAND); 8401c6a0718SPierre Ossman } 8411c6a0718SPierre Ossman 8421c6a0718SPierre Ossman static void sdhci_finish_command(struct sdhci_host *host) 8431c6a0718SPierre Ossman { 8441c6a0718SPierre Ossman int i; 8451c6a0718SPierre Ossman 8461c6a0718SPierre Ossman BUG_ON(host->cmd == NULL); 8471c6a0718SPierre Ossman 8481c6a0718SPierre Ossman if (host->cmd->flags & MMC_RSP_PRESENT) { 8491c6a0718SPierre Ossman if (host->cmd->flags & MMC_RSP_136) { 8501c6a0718SPierre Ossman /* CRC is stripped so we need to do some shifting. */ 8511c6a0718SPierre Ossman for (i = 0;i < 4;i++) { 8521c6a0718SPierre Ossman host->cmd->resp[i] = readl(host->ioaddr + 8531c6a0718SPierre Ossman SDHCI_RESPONSE + (3-i)*4) << 8; 8541c6a0718SPierre Ossman if (i != 3) 8551c6a0718SPierre Ossman host->cmd->resp[i] |= 8561c6a0718SPierre Ossman readb(host->ioaddr + 8571c6a0718SPierre Ossman SDHCI_RESPONSE + (3-i)*4-1); 8581c6a0718SPierre Ossman } 8591c6a0718SPierre Ossman } else { 8601c6a0718SPierre Ossman host->cmd->resp[0] = readl(host->ioaddr + SDHCI_RESPONSE); 8611c6a0718SPierre Ossman } 8621c6a0718SPierre Ossman } 8631c6a0718SPierre Ossman 86417b0429dSPierre Ossman host->cmd->error = 0; 8651c6a0718SPierre Ossman 866e538fbe8SPierre Ossman if (host->data && host->data_early) 867e538fbe8SPierre Ossman sdhci_finish_data(host); 868e538fbe8SPierre Ossman 869e538fbe8SPierre Ossman if (!host->cmd->data) 8701c6a0718SPierre Ossman tasklet_schedule(&host->finish_tasklet); 8711c6a0718SPierre Ossman 8721c6a0718SPierre Ossman host->cmd = NULL; 8731c6a0718SPierre Ossman } 8741c6a0718SPierre Ossman 8751c6a0718SPierre Ossman static void sdhci_set_clock(struct sdhci_host *host, unsigned int clock) 8761c6a0718SPierre Ossman { 8771c6a0718SPierre Ossman int div; 8781c6a0718SPierre Ossman u16 clk; 8791c6a0718SPierre Ossman unsigned long timeout; 8801c6a0718SPierre Ossman 8811c6a0718SPierre Ossman if (clock == host->clock) 8821c6a0718SPierre Ossman return; 8831c6a0718SPierre Ossman 8841c6a0718SPierre Ossman writew(0, host->ioaddr + SDHCI_CLOCK_CONTROL); 8851c6a0718SPierre Ossman 8861c6a0718SPierre Ossman if (clock == 0) 8871c6a0718SPierre Ossman goto out; 8881c6a0718SPierre Ossman 8891c6a0718SPierre Ossman for (div = 1;div < 256;div *= 2) { 8901c6a0718SPierre Ossman if ((host->max_clk / div) <= clock) 8911c6a0718SPierre Ossman break; 8921c6a0718SPierre Ossman } 8931c6a0718SPierre Ossman div >>= 1; 8941c6a0718SPierre Ossman 8951c6a0718SPierre Ossman clk = div << SDHCI_DIVIDER_SHIFT; 8961c6a0718SPierre Ossman clk |= SDHCI_CLOCK_INT_EN; 8971c6a0718SPierre Ossman writew(clk, host->ioaddr + SDHCI_CLOCK_CONTROL); 8981c6a0718SPierre Ossman 8991c6a0718SPierre Ossman /* Wait max 10 ms */ 9001c6a0718SPierre Ossman timeout = 10; 9011c6a0718SPierre Ossman while (!((clk = readw(host->ioaddr + SDHCI_CLOCK_CONTROL)) 9021c6a0718SPierre Ossman & SDHCI_CLOCK_INT_STABLE)) { 9031c6a0718SPierre Ossman if (timeout == 0) { 9041c6a0718SPierre Ossman printk(KERN_ERR "%s: Internal clock never " 9051c6a0718SPierre Ossman "stabilised.\n", mmc_hostname(host->mmc)); 9061c6a0718SPierre Ossman sdhci_dumpregs(host); 9071c6a0718SPierre Ossman return; 9081c6a0718SPierre Ossman } 9091c6a0718SPierre Ossman timeout--; 9101c6a0718SPierre Ossman mdelay(1); 9111c6a0718SPierre Ossman } 9121c6a0718SPierre Ossman 9131c6a0718SPierre Ossman clk |= SDHCI_CLOCK_CARD_EN; 9141c6a0718SPierre Ossman writew(clk, host->ioaddr + SDHCI_CLOCK_CONTROL); 9151c6a0718SPierre Ossman 9161c6a0718SPierre Ossman out: 9171c6a0718SPierre Ossman host->clock = clock; 9181c6a0718SPierre Ossman } 9191c6a0718SPierre Ossman 9201c6a0718SPierre Ossman static void sdhci_set_power(struct sdhci_host *host, unsigned short power) 9211c6a0718SPierre Ossman { 9221c6a0718SPierre Ossman u8 pwr; 9231c6a0718SPierre Ossman 9241c6a0718SPierre Ossman if (host->power == power) 9251c6a0718SPierre Ossman return; 9261c6a0718SPierre Ossman 9271c6a0718SPierre Ossman if (power == (unsigned short)-1) { 9281c6a0718SPierre Ossman writeb(0, host->ioaddr + SDHCI_POWER_CONTROL); 9291c6a0718SPierre Ossman goto out; 9301c6a0718SPierre Ossman } 9311c6a0718SPierre Ossman 9321c6a0718SPierre Ossman /* 9331c6a0718SPierre Ossman * Spec says that we should clear the power reg before setting 9341c6a0718SPierre Ossman * a new value. Some controllers don't seem to like this though. 9351c6a0718SPierre Ossman */ 936b8c86fc5SPierre Ossman if (!(host->quirks & SDHCI_QUIRK_SINGLE_POWER_WRITE)) 9371c6a0718SPierre Ossman writeb(0, host->ioaddr + SDHCI_POWER_CONTROL); 9381c6a0718SPierre Ossman 9391c6a0718SPierre Ossman pwr = SDHCI_POWER_ON; 9401c6a0718SPierre Ossman 9414be34c99SPhilip Langdale switch (1 << power) { 94255556da0SPhilip Langdale case MMC_VDD_165_195: 9431c6a0718SPierre Ossman pwr |= SDHCI_POWER_180; 9441c6a0718SPierre Ossman break; 9454be34c99SPhilip Langdale case MMC_VDD_29_30: 9464be34c99SPhilip Langdale case MMC_VDD_30_31: 9471c6a0718SPierre Ossman pwr |= SDHCI_POWER_300; 9481c6a0718SPierre Ossman break; 9494be34c99SPhilip Langdale case MMC_VDD_32_33: 9504be34c99SPhilip Langdale case MMC_VDD_33_34: 9511c6a0718SPierre Ossman pwr |= SDHCI_POWER_330; 9521c6a0718SPierre Ossman break; 9531c6a0718SPierre Ossman default: 9541c6a0718SPierre Ossman BUG(); 9551c6a0718SPierre Ossman } 9561c6a0718SPierre Ossman 957e08c1694SAndres Salomon /* 958c71f6512SAndres Salomon * At least the Marvell CaFe chip gets confused if we set the voltage 959e08c1694SAndres Salomon * and set turn on power at the same time, so set the voltage first. 960e08c1694SAndres Salomon */ 961b8c86fc5SPierre Ossman if ((host->quirks & SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER)) 962e08c1694SAndres Salomon writeb(pwr & ~SDHCI_POWER_ON, 963e08c1694SAndres Salomon host->ioaddr + SDHCI_POWER_CONTROL); 964e08c1694SAndres Salomon 9651c6a0718SPierre Ossman writeb(pwr, host->ioaddr + SDHCI_POWER_CONTROL); 9661c6a0718SPierre Ossman 9671c6a0718SPierre Ossman out: 9681c6a0718SPierre Ossman host->power = power; 9691c6a0718SPierre Ossman } 9701c6a0718SPierre Ossman 9711c6a0718SPierre Ossman /*****************************************************************************\ 9721c6a0718SPierre Ossman * * 9731c6a0718SPierre Ossman * MMC callbacks * 9741c6a0718SPierre Ossman * * 9751c6a0718SPierre Ossman \*****************************************************************************/ 9761c6a0718SPierre Ossman 9771c6a0718SPierre Ossman static void sdhci_request(struct mmc_host *mmc, struct mmc_request *mrq) 9781c6a0718SPierre Ossman { 9791c6a0718SPierre Ossman struct sdhci_host *host; 9801c6a0718SPierre Ossman unsigned long flags; 9811c6a0718SPierre Ossman 9821c6a0718SPierre Ossman host = mmc_priv(mmc); 9831c6a0718SPierre Ossman 9841c6a0718SPierre Ossman spin_lock_irqsave(&host->lock, flags); 9851c6a0718SPierre Ossman 9861c6a0718SPierre Ossman WARN_ON(host->mrq != NULL); 9871c6a0718SPierre Ossman 9882f730fecSPierre Ossman #ifndef CONFIG_LEDS_CLASS 9891c6a0718SPierre Ossman sdhci_activate_led(host); 9902f730fecSPierre Ossman #endif 9911c6a0718SPierre Ossman 9921c6a0718SPierre Ossman host->mrq = mrq; 9931c6a0718SPierre Ossman 9941e72859eSPierre Ossman if (!(readl(host->ioaddr + SDHCI_PRESENT_STATE) & SDHCI_CARD_PRESENT) 9951e72859eSPierre Ossman || (host->flags & SDHCI_DEVICE_DEAD)) { 99617b0429dSPierre Ossman host->mrq->cmd->error = -ENOMEDIUM; 9971c6a0718SPierre Ossman tasklet_schedule(&host->finish_tasklet); 9981c6a0718SPierre Ossman } else 9991c6a0718SPierre Ossman sdhci_send_command(host, mrq->cmd); 10001c6a0718SPierre Ossman 10011c6a0718SPierre Ossman mmiowb(); 10021c6a0718SPierre Ossman spin_unlock_irqrestore(&host->lock, flags); 10031c6a0718SPierre Ossman } 10041c6a0718SPierre Ossman 10051c6a0718SPierre Ossman static void sdhci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) 10061c6a0718SPierre Ossman { 10071c6a0718SPierre Ossman struct sdhci_host *host; 10081c6a0718SPierre Ossman unsigned long flags; 10091c6a0718SPierre Ossman u8 ctrl; 10101c6a0718SPierre Ossman 10111c6a0718SPierre Ossman host = mmc_priv(mmc); 10121c6a0718SPierre Ossman 10131c6a0718SPierre Ossman spin_lock_irqsave(&host->lock, flags); 10141c6a0718SPierre Ossman 10151e72859eSPierre Ossman if (host->flags & SDHCI_DEVICE_DEAD) 10161e72859eSPierre Ossman goto out; 10171e72859eSPierre Ossman 10181c6a0718SPierre Ossman /* 10191c6a0718SPierre Ossman * Reset the chip on each power off. 10201c6a0718SPierre Ossman * Should clear out any weird states. 10211c6a0718SPierre Ossman */ 10221c6a0718SPierre Ossman if (ios->power_mode == MMC_POWER_OFF) { 10231c6a0718SPierre Ossman writel(0, host->ioaddr + SDHCI_SIGNAL_ENABLE); 10241c6a0718SPierre Ossman sdhci_init(host); 10251c6a0718SPierre Ossman } 10261c6a0718SPierre Ossman 10271c6a0718SPierre Ossman sdhci_set_clock(host, ios->clock); 10281c6a0718SPierre Ossman 10291c6a0718SPierre Ossman if (ios->power_mode == MMC_POWER_OFF) 10301c6a0718SPierre Ossman sdhci_set_power(host, -1); 10311c6a0718SPierre Ossman else 10321c6a0718SPierre Ossman sdhci_set_power(host, ios->vdd); 10331c6a0718SPierre Ossman 10341c6a0718SPierre Ossman ctrl = readb(host->ioaddr + SDHCI_HOST_CONTROL); 10351c6a0718SPierre Ossman 10361c6a0718SPierre Ossman if (ios->bus_width == MMC_BUS_WIDTH_4) 10371c6a0718SPierre Ossman ctrl |= SDHCI_CTRL_4BITBUS; 10381c6a0718SPierre Ossman else 10391c6a0718SPierre Ossman ctrl &= ~SDHCI_CTRL_4BITBUS; 10401c6a0718SPierre Ossman 10411c6a0718SPierre Ossman if (ios->timing == MMC_TIMING_SD_HS) 10421c6a0718SPierre Ossman ctrl |= SDHCI_CTRL_HISPD; 10431c6a0718SPierre Ossman else 10441c6a0718SPierre Ossman ctrl &= ~SDHCI_CTRL_HISPD; 10451c6a0718SPierre Ossman 10461c6a0718SPierre Ossman writeb(ctrl, host->ioaddr + SDHCI_HOST_CONTROL); 10471c6a0718SPierre Ossman 1048b8352260SLeandro Dorileo /* 1049b8352260SLeandro Dorileo * Some (ENE) controllers go apeshit on some ios operation, 1050b8352260SLeandro Dorileo * signalling timeout and CRC errors even on CMD0. Resetting 1051b8352260SLeandro Dorileo * it on each ios seems to solve the problem. 1052b8352260SLeandro Dorileo */ 1053b8c86fc5SPierre Ossman if(host->quirks & SDHCI_QUIRK_RESET_CMD_DATA_ON_IOS) 1054b8352260SLeandro Dorileo sdhci_reset(host, SDHCI_RESET_CMD | SDHCI_RESET_DATA); 1055b8352260SLeandro Dorileo 10561e72859eSPierre Ossman out: 10571c6a0718SPierre Ossman mmiowb(); 10581c6a0718SPierre Ossman spin_unlock_irqrestore(&host->lock, flags); 10591c6a0718SPierre Ossman } 10601c6a0718SPierre Ossman 10611c6a0718SPierre Ossman static int sdhci_get_ro(struct mmc_host *mmc) 10621c6a0718SPierre Ossman { 10631c6a0718SPierre Ossman struct sdhci_host *host; 10641c6a0718SPierre Ossman unsigned long flags; 10651c6a0718SPierre Ossman int present; 10661c6a0718SPierre Ossman 10671c6a0718SPierre Ossman host = mmc_priv(mmc); 10681c6a0718SPierre Ossman 10691c6a0718SPierre Ossman spin_lock_irqsave(&host->lock, flags); 10701c6a0718SPierre Ossman 10711e72859eSPierre Ossman if (host->flags & SDHCI_DEVICE_DEAD) 10721e72859eSPierre Ossman present = 0; 10731e72859eSPierre Ossman else 10741c6a0718SPierre Ossman present = readl(host->ioaddr + SDHCI_PRESENT_STATE); 10751c6a0718SPierre Ossman 10761c6a0718SPierre Ossman spin_unlock_irqrestore(&host->lock, flags); 10771c6a0718SPierre Ossman 10781c6a0718SPierre Ossman return !(present & SDHCI_WRITE_PROTECT); 10791c6a0718SPierre Ossman } 10801c6a0718SPierre Ossman 1081f75979b7SPierre Ossman static void sdhci_enable_sdio_irq(struct mmc_host *mmc, int enable) 1082f75979b7SPierre Ossman { 1083f75979b7SPierre Ossman struct sdhci_host *host; 1084f75979b7SPierre Ossman unsigned long flags; 1085f75979b7SPierre Ossman u32 ier; 1086f75979b7SPierre Ossman 1087f75979b7SPierre Ossman host = mmc_priv(mmc); 1088f75979b7SPierre Ossman 1089f75979b7SPierre Ossman spin_lock_irqsave(&host->lock, flags); 1090f75979b7SPierre Ossman 10911e72859eSPierre Ossman if (host->flags & SDHCI_DEVICE_DEAD) 10921e72859eSPierre Ossman goto out; 10931e72859eSPierre Ossman 1094f75979b7SPierre Ossman ier = readl(host->ioaddr + SDHCI_INT_ENABLE); 1095f75979b7SPierre Ossman 1096f75979b7SPierre Ossman ier &= ~SDHCI_INT_CARD_INT; 1097f75979b7SPierre Ossman if (enable) 1098f75979b7SPierre Ossman ier |= SDHCI_INT_CARD_INT; 1099f75979b7SPierre Ossman 1100f75979b7SPierre Ossman writel(ier, host->ioaddr + SDHCI_INT_ENABLE); 1101f75979b7SPierre Ossman writel(ier, host->ioaddr + SDHCI_SIGNAL_ENABLE); 1102f75979b7SPierre Ossman 11031e72859eSPierre Ossman out: 1104f75979b7SPierre Ossman mmiowb(); 1105f75979b7SPierre Ossman 1106f75979b7SPierre Ossman spin_unlock_irqrestore(&host->lock, flags); 1107f75979b7SPierre Ossman } 1108f75979b7SPierre Ossman 11091c6a0718SPierre Ossman static const struct mmc_host_ops sdhci_ops = { 11101c6a0718SPierre Ossman .request = sdhci_request, 11111c6a0718SPierre Ossman .set_ios = sdhci_set_ios, 11121c6a0718SPierre Ossman .get_ro = sdhci_get_ro, 1113f75979b7SPierre Ossman .enable_sdio_irq = sdhci_enable_sdio_irq, 11141c6a0718SPierre Ossman }; 11151c6a0718SPierre Ossman 11161c6a0718SPierre Ossman /*****************************************************************************\ 11171c6a0718SPierre Ossman * * 11181c6a0718SPierre Ossman * Tasklets * 11191c6a0718SPierre Ossman * * 11201c6a0718SPierre Ossman \*****************************************************************************/ 11211c6a0718SPierre Ossman 11221c6a0718SPierre Ossman static void sdhci_tasklet_card(unsigned long param) 11231c6a0718SPierre Ossman { 11241c6a0718SPierre Ossman struct sdhci_host *host; 11251c6a0718SPierre Ossman unsigned long flags; 11261c6a0718SPierre Ossman 11271c6a0718SPierre Ossman host = (struct sdhci_host*)param; 11281c6a0718SPierre Ossman 11291c6a0718SPierre Ossman spin_lock_irqsave(&host->lock, flags); 11301c6a0718SPierre Ossman 11311c6a0718SPierre Ossman if (!(readl(host->ioaddr + SDHCI_PRESENT_STATE) & SDHCI_CARD_PRESENT)) { 11321c6a0718SPierre Ossman if (host->mrq) { 11331c6a0718SPierre Ossman printk(KERN_ERR "%s: Card removed during transfer!\n", 11341c6a0718SPierre Ossman mmc_hostname(host->mmc)); 11351c6a0718SPierre Ossman printk(KERN_ERR "%s: Resetting controller.\n", 11361c6a0718SPierre Ossman mmc_hostname(host->mmc)); 11371c6a0718SPierre Ossman 11381c6a0718SPierre Ossman sdhci_reset(host, SDHCI_RESET_CMD); 11391c6a0718SPierre Ossman sdhci_reset(host, SDHCI_RESET_DATA); 11401c6a0718SPierre Ossman 114117b0429dSPierre Ossman host->mrq->cmd->error = -ENOMEDIUM; 11421c6a0718SPierre Ossman tasklet_schedule(&host->finish_tasklet); 11431c6a0718SPierre Ossman } 11441c6a0718SPierre Ossman } 11451c6a0718SPierre Ossman 11461c6a0718SPierre Ossman spin_unlock_irqrestore(&host->lock, flags); 11471c6a0718SPierre Ossman 11481c6a0718SPierre Ossman mmc_detect_change(host->mmc, msecs_to_jiffies(500)); 11491c6a0718SPierre Ossman } 11501c6a0718SPierre Ossman 11511c6a0718SPierre Ossman static void sdhci_tasklet_finish(unsigned long param) 11521c6a0718SPierre Ossman { 11531c6a0718SPierre Ossman struct sdhci_host *host; 11541c6a0718SPierre Ossman unsigned long flags; 11551c6a0718SPierre Ossman struct mmc_request *mrq; 11561c6a0718SPierre Ossman 11571c6a0718SPierre Ossman host = (struct sdhci_host*)param; 11581c6a0718SPierre Ossman 11591c6a0718SPierre Ossman spin_lock_irqsave(&host->lock, flags); 11601c6a0718SPierre Ossman 11611c6a0718SPierre Ossman del_timer(&host->timer); 11621c6a0718SPierre Ossman 11631c6a0718SPierre Ossman mrq = host->mrq; 11641c6a0718SPierre Ossman 11651c6a0718SPierre Ossman /* 11661c6a0718SPierre Ossman * The controller needs a reset of internal state machines 11671c6a0718SPierre Ossman * upon error conditions. 11681c6a0718SPierre Ossman */ 11691e72859eSPierre Ossman if (!(host->flags & SDHCI_DEVICE_DEAD) && 11701e72859eSPierre Ossman (mrq->cmd->error || 117117b0429dSPierre Ossman (mrq->data && (mrq->data->error || 117284c46a53SPierre Ossman (mrq->data->stop && mrq->data->stop->error))) || 11731e72859eSPierre Ossman (host->quirks & SDHCI_QUIRK_RESET_AFTER_REQUEST))) { 11741c6a0718SPierre Ossman 11751c6a0718SPierre Ossman /* Some controllers need this kick or reset won't work here */ 1176b8c86fc5SPierre Ossman if (host->quirks & SDHCI_QUIRK_CLOCK_BEFORE_RESET) { 11771c6a0718SPierre Ossman unsigned int clock; 11781c6a0718SPierre Ossman 11791c6a0718SPierre Ossman /* This is to force an update */ 11801c6a0718SPierre Ossman clock = host->clock; 11811c6a0718SPierre Ossman host->clock = 0; 11821c6a0718SPierre Ossman sdhci_set_clock(host, clock); 11831c6a0718SPierre Ossman } 11841c6a0718SPierre Ossman 11851c6a0718SPierre Ossman /* Spec says we should do both at the same time, but Ricoh 11861c6a0718SPierre Ossman controllers do not like that. */ 11871c6a0718SPierre Ossman sdhci_reset(host, SDHCI_RESET_CMD); 11881c6a0718SPierre Ossman sdhci_reset(host, SDHCI_RESET_DATA); 11891c6a0718SPierre Ossman } 11901c6a0718SPierre Ossman 11911c6a0718SPierre Ossman host->mrq = NULL; 11921c6a0718SPierre Ossman host->cmd = NULL; 11931c6a0718SPierre Ossman host->data = NULL; 11941c6a0718SPierre Ossman 11952f730fecSPierre Ossman #ifndef CONFIG_LEDS_CLASS 11961c6a0718SPierre Ossman sdhci_deactivate_led(host); 11972f730fecSPierre Ossman #endif 11981c6a0718SPierre Ossman 11991c6a0718SPierre Ossman mmiowb(); 12001c6a0718SPierre Ossman spin_unlock_irqrestore(&host->lock, flags); 12011c6a0718SPierre Ossman 12021c6a0718SPierre Ossman mmc_request_done(host->mmc, mrq); 12031c6a0718SPierre Ossman } 12041c6a0718SPierre Ossman 12051c6a0718SPierre Ossman static void sdhci_timeout_timer(unsigned long data) 12061c6a0718SPierre Ossman { 12071c6a0718SPierre Ossman struct sdhci_host *host; 12081c6a0718SPierre Ossman unsigned long flags; 12091c6a0718SPierre Ossman 12101c6a0718SPierre Ossman host = (struct sdhci_host*)data; 12111c6a0718SPierre Ossman 12121c6a0718SPierre Ossman spin_lock_irqsave(&host->lock, flags); 12131c6a0718SPierre Ossman 12141c6a0718SPierre Ossman if (host->mrq) { 12151c6a0718SPierre Ossman printk(KERN_ERR "%s: Timeout waiting for hardware " 12161c6a0718SPierre Ossman "interrupt.\n", mmc_hostname(host->mmc)); 12171c6a0718SPierre Ossman sdhci_dumpregs(host); 12181c6a0718SPierre Ossman 12191c6a0718SPierre Ossman if (host->data) { 122017b0429dSPierre Ossman host->data->error = -ETIMEDOUT; 12211c6a0718SPierre Ossman sdhci_finish_data(host); 12221c6a0718SPierre Ossman } else { 12231c6a0718SPierre Ossman if (host->cmd) 122417b0429dSPierre Ossman host->cmd->error = -ETIMEDOUT; 12251c6a0718SPierre Ossman else 122617b0429dSPierre Ossman host->mrq->cmd->error = -ETIMEDOUT; 12271c6a0718SPierre Ossman 12281c6a0718SPierre Ossman tasklet_schedule(&host->finish_tasklet); 12291c6a0718SPierre Ossman } 12301c6a0718SPierre Ossman } 12311c6a0718SPierre Ossman 12321c6a0718SPierre Ossman mmiowb(); 12331c6a0718SPierre Ossman spin_unlock_irqrestore(&host->lock, flags); 12341c6a0718SPierre Ossman } 12351c6a0718SPierre Ossman 12361c6a0718SPierre Ossman /*****************************************************************************\ 12371c6a0718SPierre Ossman * * 12381c6a0718SPierre Ossman * Interrupt handling * 12391c6a0718SPierre Ossman * * 12401c6a0718SPierre Ossman \*****************************************************************************/ 12411c6a0718SPierre Ossman 12421c6a0718SPierre Ossman static void sdhci_cmd_irq(struct sdhci_host *host, u32 intmask) 12431c6a0718SPierre Ossman { 12441c6a0718SPierre Ossman BUG_ON(intmask == 0); 12451c6a0718SPierre Ossman 12461c6a0718SPierre Ossman if (!host->cmd) { 1247b67ac3f3SPierre Ossman printk(KERN_ERR "%s: Got command interrupt 0x%08x even " 1248b67ac3f3SPierre Ossman "though no command operation was in progress.\n", 1249b67ac3f3SPierre Ossman mmc_hostname(host->mmc), (unsigned)intmask); 12501c6a0718SPierre Ossman sdhci_dumpregs(host); 12511c6a0718SPierre Ossman return; 12521c6a0718SPierre Ossman } 12531c6a0718SPierre Ossman 12541c6a0718SPierre Ossman if (intmask & SDHCI_INT_TIMEOUT) 125517b0429dSPierre Ossman host->cmd->error = -ETIMEDOUT; 125617b0429dSPierre Ossman else if (intmask & (SDHCI_INT_CRC | SDHCI_INT_END_BIT | 125717b0429dSPierre Ossman SDHCI_INT_INDEX)) 125817b0429dSPierre Ossman host->cmd->error = -EILSEQ; 12591c6a0718SPierre Ossman 126017b0429dSPierre Ossman if (host->cmd->error) 12611c6a0718SPierre Ossman tasklet_schedule(&host->finish_tasklet); 126243b58b36SPierre Ossman else if (intmask & SDHCI_INT_RESPONSE) 126343b58b36SPierre Ossman sdhci_finish_command(host); 12641c6a0718SPierre Ossman } 12651c6a0718SPierre Ossman 12661c6a0718SPierre Ossman static void sdhci_data_irq(struct sdhci_host *host, u32 intmask) 12671c6a0718SPierre Ossman { 12681c6a0718SPierre Ossman BUG_ON(intmask == 0); 12691c6a0718SPierre Ossman 12701c6a0718SPierre Ossman if (!host->data) { 12711c6a0718SPierre Ossman /* 12721c6a0718SPierre Ossman * A data end interrupt is sent together with the response 12731c6a0718SPierre Ossman * for the stop command. 12741c6a0718SPierre Ossman */ 12751c6a0718SPierre Ossman if (intmask & SDHCI_INT_DATA_END) 12761c6a0718SPierre Ossman return; 12771c6a0718SPierre Ossman 1278b67ac3f3SPierre Ossman printk(KERN_ERR "%s: Got data interrupt 0x%08x even " 1279b67ac3f3SPierre Ossman "though no data operation was in progress.\n", 1280b67ac3f3SPierre Ossman mmc_hostname(host->mmc), (unsigned)intmask); 12811c6a0718SPierre Ossman sdhci_dumpregs(host); 12821c6a0718SPierre Ossman 12831c6a0718SPierre Ossman return; 12841c6a0718SPierre Ossman } 12851c6a0718SPierre Ossman 12861c6a0718SPierre Ossman if (intmask & SDHCI_INT_DATA_TIMEOUT) 128717b0429dSPierre Ossman host->data->error = -ETIMEDOUT; 128817b0429dSPierre Ossman else if (intmask & (SDHCI_INT_DATA_CRC | SDHCI_INT_DATA_END_BIT)) 128917b0429dSPierre Ossman host->data->error = -EILSEQ; 12902134a922SPierre Ossman else if (intmask & SDHCI_INT_ADMA_ERROR) 12912134a922SPierre Ossman host->data->error = -EIO; 12921c6a0718SPierre Ossman 129317b0429dSPierre Ossman if (host->data->error) 12941c6a0718SPierre Ossman sdhci_finish_data(host); 12951c6a0718SPierre Ossman else { 12961c6a0718SPierre Ossman if (intmask & (SDHCI_INT_DATA_AVAIL | SDHCI_INT_SPACE_AVAIL)) 12971c6a0718SPierre Ossman sdhci_transfer_pio(host); 12981c6a0718SPierre Ossman 12996ba736a1SPierre Ossman /* 13006ba736a1SPierre Ossman * We currently don't do anything fancy with DMA 13016ba736a1SPierre Ossman * boundaries, but as we can't disable the feature 13026ba736a1SPierre Ossman * we need to at least restart the transfer. 13036ba736a1SPierre Ossman */ 13046ba736a1SPierre Ossman if (intmask & SDHCI_INT_DMA_END) 13056ba736a1SPierre Ossman writel(readl(host->ioaddr + SDHCI_DMA_ADDRESS), 13066ba736a1SPierre Ossman host->ioaddr + SDHCI_DMA_ADDRESS); 13076ba736a1SPierre Ossman 1308e538fbe8SPierre Ossman if (intmask & SDHCI_INT_DATA_END) { 1309e538fbe8SPierre Ossman if (host->cmd) { 1310e538fbe8SPierre Ossman /* 1311e538fbe8SPierre Ossman * Data managed to finish before the 1312e538fbe8SPierre Ossman * command completed. Make sure we do 1313e538fbe8SPierre Ossman * things in the proper order. 1314e538fbe8SPierre Ossman */ 1315e538fbe8SPierre Ossman host->data_early = 1; 1316e538fbe8SPierre Ossman } else { 13171c6a0718SPierre Ossman sdhci_finish_data(host); 13181c6a0718SPierre Ossman } 13191c6a0718SPierre Ossman } 1320e538fbe8SPierre Ossman } 1321e538fbe8SPierre Ossman } 13221c6a0718SPierre Ossman 13231c6a0718SPierre Ossman static irqreturn_t sdhci_irq(int irq, void *dev_id) 13241c6a0718SPierre Ossman { 13251c6a0718SPierre Ossman irqreturn_t result; 13261c6a0718SPierre Ossman struct sdhci_host* host = dev_id; 13271c6a0718SPierre Ossman u32 intmask; 1328f75979b7SPierre Ossman int cardint = 0; 13291c6a0718SPierre Ossman 13301c6a0718SPierre Ossman spin_lock(&host->lock); 13311c6a0718SPierre Ossman 13321c6a0718SPierre Ossman intmask = readl(host->ioaddr + SDHCI_INT_STATUS); 13331c6a0718SPierre Ossman 13341c6a0718SPierre Ossman if (!intmask || intmask == 0xffffffff) { 13351c6a0718SPierre Ossman result = IRQ_NONE; 13361c6a0718SPierre Ossman goto out; 13371c6a0718SPierre Ossman } 13381c6a0718SPierre Ossman 1339b69c9058SPierre Ossman DBG("*** %s got interrupt: 0x%08x\n", 1340b69c9058SPierre Ossman mmc_hostname(host->mmc), intmask); 13411c6a0718SPierre Ossman 13421c6a0718SPierre Ossman if (intmask & (SDHCI_INT_CARD_INSERT | SDHCI_INT_CARD_REMOVE)) { 13431c6a0718SPierre Ossman writel(intmask & (SDHCI_INT_CARD_INSERT | SDHCI_INT_CARD_REMOVE), 13441c6a0718SPierre Ossman host->ioaddr + SDHCI_INT_STATUS); 13451c6a0718SPierre Ossman tasklet_schedule(&host->card_tasklet); 13461c6a0718SPierre Ossman } 13471c6a0718SPierre Ossman 13481c6a0718SPierre Ossman intmask &= ~(SDHCI_INT_CARD_INSERT | SDHCI_INT_CARD_REMOVE); 13491c6a0718SPierre Ossman 13501c6a0718SPierre Ossman if (intmask & SDHCI_INT_CMD_MASK) { 13511c6a0718SPierre Ossman writel(intmask & SDHCI_INT_CMD_MASK, 13521c6a0718SPierre Ossman host->ioaddr + SDHCI_INT_STATUS); 13531c6a0718SPierre Ossman sdhci_cmd_irq(host, intmask & SDHCI_INT_CMD_MASK); 13541c6a0718SPierre Ossman } 13551c6a0718SPierre Ossman 13561c6a0718SPierre Ossman if (intmask & SDHCI_INT_DATA_MASK) { 13571c6a0718SPierre Ossman writel(intmask & SDHCI_INT_DATA_MASK, 13581c6a0718SPierre Ossman host->ioaddr + SDHCI_INT_STATUS); 13591c6a0718SPierre Ossman sdhci_data_irq(host, intmask & SDHCI_INT_DATA_MASK); 13601c6a0718SPierre Ossman } 13611c6a0718SPierre Ossman 13621c6a0718SPierre Ossman intmask &= ~(SDHCI_INT_CMD_MASK | SDHCI_INT_DATA_MASK); 13631c6a0718SPierre Ossman 1364964f9ce2SPierre Ossman intmask &= ~SDHCI_INT_ERROR; 1365964f9ce2SPierre Ossman 13661c6a0718SPierre Ossman if (intmask & SDHCI_INT_BUS_POWER) { 13671c6a0718SPierre Ossman printk(KERN_ERR "%s: Card is consuming too much power!\n", 13681c6a0718SPierre Ossman mmc_hostname(host->mmc)); 13691c6a0718SPierre Ossman writel(SDHCI_INT_BUS_POWER, host->ioaddr + SDHCI_INT_STATUS); 13701c6a0718SPierre Ossman } 13711c6a0718SPierre Ossman 13729d26a5d3SRolf Eike Beer intmask &= ~SDHCI_INT_BUS_POWER; 13731c6a0718SPierre Ossman 1374f75979b7SPierre Ossman if (intmask & SDHCI_INT_CARD_INT) 1375f75979b7SPierre Ossman cardint = 1; 1376f75979b7SPierre Ossman 1377f75979b7SPierre Ossman intmask &= ~SDHCI_INT_CARD_INT; 1378f75979b7SPierre Ossman 13791c6a0718SPierre Ossman if (intmask) { 13801c6a0718SPierre Ossman printk(KERN_ERR "%s: Unexpected interrupt 0x%08x.\n", 13811c6a0718SPierre Ossman mmc_hostname(host->mmc), intmask); 13821c6a0718SPierre Ossman sdhci_dumpregs(host); 13831c6a0718SPierre Ossman 13841c6a0718SPierre Ossman writel(intmask, host->ioaddr + SDHCI_INT_STATUS); 13851c6a0718SPierre Ossman } 13861c6a0718SPierre Ossman 13871c6a0718SPierre Ossman result = IRQ_HANDLED; 13881c6a0718SPierre Ossman 13891c6a0718SPierre Ossman mmiowb(); 13901c6a0718SPierre Ossman out: 13911c6a0718SPierre Ossman spin_unlock(&host->lock); 13921c6a0718SPierre Ossman 1393f75979b7SPierre Ossman /* 1394f75979b7SPierre Ossman * We have to delay this as it calls back into the driver. 1395f75979b7SPierre Ossman */ 1396f75979b7SPierre Ossman if (cardint) 1397f75979b7SPierre Ossman mmc_signal_sdio_irq(host->mmc); 1398f75979b7SPierre Ossman 13991c6a0718SPierre Ossman return result; 14001c6a0718SPierre Ossman } 14011c6a0718SPierre Ossman 14021c6a0718SPierre Ossman /*****************************************************************************\ 14031c6a0718SPierre Ossman * * 14041c6a0718SPierre Ossman * Suspend/resume * 14051c6a0718SPierre Ossman * * 14061c6a0718SPierre Ossman \*****************************************************************************/ 14071c6a0718SPierre Ossman 14081c6a0718SPierre Ossman #ifdef CONFIG_PM 14091c6a0718SPierre Ossman 1410b8c86fc5SPierre Ossman int sdhci_suspend_host(struct sdhci_host *host, pm_message_t state) 14111c6a0718SPierre Ossman { 1412b8c86fc5SPierre Ossman int ret; 14131c6a0718SPierre Ossman 1414b8c86fc5SPierre Ossman ret = mmc_suspend_host(host->mmc, state); 14151c6a0718SPierre Ossman if (ret) 14161c6a0718SPierre Ossman return ret; 14171c6a0718SPierre Ossman 1418b8c86fc5SPierre Ossman free_irq(host->irq, host); 1419b8c86fc5SPierre Ossman 1420b8c86fc5SPierre Ossman return 0; 1421b8c86fc5SPierre Ossman } 1422b8c86fc5SPierre Ossman 1423b8c86fc5SPierre Ossman EXPORT_SYMBOL_GPL(sdhci_suspend_host); 1424b8c86fc5SPierre Ossman 1425b8c86fc5SPierre Ossman int sdhci_resume_host(struct sdhci_host *host) 1426b8c86fc5SPierre Ossman { 1427b8c86fc5SPierre Ossman int ret; 1428b8c86fc5SPierre Ossman 1429b8c86fc5SPierre Ossman if (host->flags & SDHCI_USE_DMA) { 1430b8c86fc5SPierre Ossman if (host->ops->enable_dma) 1431b8c86fc5SPierre Ossman host->ops->enable_dma(host); 1432b8c86fc5SPierre Ossman } 1433b8c86fc5SPierre Ossman 1434b8c86fc5SPierre Ossman ret = request_irq(host->irq, sdhci_irq, IRQF_SHARED, 1435b8c86fc5SPierre Ossman mmc_hostname(host->mmc), host); 14361c6a0718SPierre Ossman if (ret) 14371c6a0718SPierre Ossman return ret; 1438b8c86fc5SPierre Ossman 1439b8c86fc5SPierre Ossman sdhci_init(host); 14401c6a0718SPierre Ossman mmiowb(); 1441b8c86fc5SPierre Ossman 1442b8c86fc5SPierre Ossman ret = mmc_resume_host(host->mmc); 14431c6a0718SPierre Ossman if (ret) 14441c6a0718SPierre Ossman return ret; 14451c6a0718SPierre Ossman 14461c6a0718SPierre Ossman return 0; 14471c6a0718SPierre Ossman } 14481c6a0718SPierre Ossman 1449b8c86fc5SPierre Ossman EXPORT_SYMBOL_GPL(sdhci_resume_host); 14501c6a0718SPierre Ossman 14511c6a0718SPierre Ossman #endif /* CONFIG_PM */ 14521c6a0718SPierre Ossman 14531c6a0718SPierre Ossman /*****************************************************************************\ 14541c6a0718SPierre Ossman * * 1455b8c86fc5SPierre Ossman * Device allocation/registration * 14561c6a0718SPierre Ossman * * 14571c6a0718SPierre Ossman \*****************************************************************************/ 14581c6a0718SPierre Ossman 1459b8c86fc5SPierre Ossman struct sdhci_host *sdhci_alloc_host(struct device *dev, 1460b8c86fc5SPierre Ossman size_t priv_size) 14611c6a0718SPierre Ossman { 14621c6a0718SPierre Ossman struct mmc_host *mmc; 14631c6a0718SPierre Ossman struct sdhci_host *host; 14641c6a0718SPierre Ossman 1465b8c86fc5SPierre Ossman WARN_ON(dev == NULL); 14661c6a0718SPierre Ossman 1467b8c86fc5SPierre Ossman mmc = mmc_alloc_host(sizeof(struct sdhci_host) + priv_size, dev); 14681c6a0718SPierre Ossman if (!mmc) 1469b8c86fc5SPierre Ossman return ERR_PTR(-ENOMEM); 14701c6a0718SPierre Ossman 14711c6a0718SPierre Ossman host = mmc_priv(mmc); 14721c6a0718SPierre Ossman host->mmc = mmc; 14731c6a0718SPierre Ossman 1474b8c86fc5SPierre Ossman return host; 14751c6a0718SPierre Ossman } 14761c6a0718SPierre Ossman 1477b8c86fc5SPierre Ossman EXPORT_SYMBOL_GPL(sdhci_alloc_host); 1478b8c86fc5SPierre Ossman 1479b8c86fc5SPierre Ossman int sdhci_add_host(struct sdhci_host *host) 1480b8c86fc5SPierre Ossman { 1481b8c86fc5SPierre Ossman struct mmc_host *mmc; 1482b8c86fc5SPierre Ossman unsigned int caps; 1483b8c86fc5SPierre Ossman int ret; 1484b8c86fc5SPierre Ossman 1485b8c86fc5SPierre Ossman WARN_ON(host == NULL); 1486b8c86fc5SPierre Ossman if (host == NULL) 1487b8c86fc5SPierre Ossman return -EINVAL; 1488b8c86fc5SPierre Ossman 1489b8c86fc5SPierre Ossman mmc = host->mmc; 1490b8c86fc5SPierre Ossman 1491b8c86fc5SPierre Ossman if (debug_quirks) 1492b8c86fc5SPierre Ossman host->quirks = debug_quirks; 1493b8c86fc5SPierre Ossman 14941c6a0718SPierre Ossman sdhci_reset(host, SDHCI_RESET_ALL); 14951c6a0718SPierre Ossman 14962134a922SPierre Ossman host->version = readw(host->ioaddr + SDHCI_HOST_VERSION); 14972134a922SPierre Ossman host->version = (host->version & SDHCI_SPEC_VER_MASK) 14982134a922SPierre Ossman >> SDHCI_SPEC_VER_SHIFT; 14992134a922SPierre Ossman if (host->version > SDHCI_SPEC_200) { 15001c6a0718SPierre Ossman printk(KERN_ERR "%s: Unknown controller version (%d). " 1501b69c9058SPierre Ossman "You may experience problems.\n", mmc_hostname(mmc), 15022134a922SPierre Ossman host->version); 15031c6a0718SPierre Ossman } 15041c6a0718SPierre Ossman 15051c6a0718SPierre Ossman caps = readl(host->ioaddr + SDHCI_CAPABILITIES); 15061c6a0718SPierre Ossman 1507b8c86fc5SPierre Ossman if (host->quirks & SDHCI_QUIRK_FORCE_DMA) 15081c6a0718SPierre Ossman host->flags |= SDHCI_USE_DMA; 15091c6a0718SPierre Ossman else if (!(caps & SDHCI_CAN_DO_DMA)) 15101c6a0718SPierre Ossman DBG("Controller doesn't have DMA capability\n"); 15111c6a0718SPierre Ossman else 15121c6a0718SPierre Ossman host->flags |= SDHCI_USE_DMA; 15131c6a0718SPierre Ossman 1514b8c86fc5SPierre Ossman if ((host->quirks & SDHCI_QUIRK_BROKEN_DMA) && 15157c168e3dSFeng Tang (host->flags & SDHCI_USE_DMA)) { 1516cee687ceSRolf Eike Beer DBG("Disabling DMA as it is marked broken\n"); 15177c168e3dSFeng Tang host->flags &= ~SDHCI_USE_DMA; 15187c168e3dSFeng Tang } 15197c168e3dSFeng Tang 15201c6a0718SPierre Ossman if (host->flags & SDHCI_USE_DMA) { 15212134a922SPierre Ossman if ((host->version >= SDHCI_SPEC_200) && 15222134a922SPierre Ossman (caps & SDHCI_CAN_DO_ADMA2)) 15232134a922SPierre Ossman host->flags |= SDHCI_USE_ADMA; 15242134a922SPierre Ossman } 15252134a922SPierre Ossman 15262134a922SPierre Ossman if ((host->quirks & SDHCI_QUIRK_BROKEN_ADMA) && 15272134a922SPierre Ossman (host->flags & SDHCI_USE_ADMA)) { 15282134a922SPierre Ossman DBG("Disabling ADMA as it is marked broken\n"); 15292134a922SPierre Ossman host->flags &= ~SDHCI_USE_ADMA; 15302134a922SPierre Ossman } 15312134a922SPierre Ossman 15322134a922SPierre Ossman if (host->flags & SDHCI_USE_DMA) { 1533b8c86fc5SPierre Ossman if (host->ops->enable_dma) { 1534b8c86fc5SPierre Ossman if (host->ops->enable_dma(host)) { 1535b8c86fc5SPierre Ossman printk(KERN_WARNING "%s: No suitable DMA " 1536b8c86fc5SPierre Ossman "available. Falling back to PIO.\n", 1537b8c86fc5SPierre Ossman mmc_hostname(mmc)); 15382134a922SPierre Ossman host->flags &= ~(SDHCI_USE_DMA | SDHCI_USE_ADMA); 15391c6a0718SPierre Ossman } 15401c6a0718SPierre Ossman } 1541b8c86fc5SPierre Ossman } 15421c6a0718SPierre Ossman 15432134a922SPierre Ossman if (host->flags & SDHCI_USE_ADMA) { 15442134a922SPierre Ossman /* 15452134a922SPierre Ossman * We need to allocate descriptors for all sg entries 15462134a922SPierre Ossman * (128) and potentially one alignment transfer for 15472134a922SPierre Ossman * each of those entries. 15482134a922SPierre Ossman */ 15492134a922SPierre Ossman host->adma_desc = kmalloc((128 * 2 + 1) * 4, GFP_KERNEL); 15502134a922SPierre Ossman host->align_buffer = kmalloc(128 * 4, GFP_KERNEL); 15512134a922SPierre Ossman if (!host->adma_desc || !host->align_buffer) { 15522134a922SPierre Ossman kfree(host->adma_desc); 15532134a922SPierre Ossman kfree(host->align_buffer); 15542134a922SPierre Ossman printk(KERN_WARNING "%s: Unable to allocate ADMA " 15552134a922SPierre Ossman "buffers. Falling back to standard DMA.\n", 15562134a922SPierre Ossman mmc_hostname(mmc)); 15572134a922SPierre Ossman host->flags &= ~SDHCI_USE_ADMA; 15582134a922SPierre Ossman } 15592134a922SPierre Ossman } 15602134a922SPierre Ossman 15617659150cSPierre Ossman /* 15627659150cSPierre Ossman * If we use DMA, then it's up to the caller to set the DMA 15637659150cSPierre Ossman * mask, but PIO does not need the hw shim so we set a new 15647659150cSPierre Ossman * mask here in that case. 15657659150cSPierre Ossman */ 15667659150cSPierre Ossman if (!(host->flags & SDHCI_USE_DMA)) { 15677659150cSPierre Ossman host->dma_mask = DMA_BIT_MASK(64); 15687659150cSPierre Ossman mmc_dev(host->mmc)->dma_mask = &host->dma_mask; 15697659150cSPierre Ossman } 15701c6a0718SPierre Ossman 15711c6a0718SPierre Ossman host->max_clk = 15721c6a0718SPierre Ossman (caps & SDHCI_CLOCK_BASE_MASK) >> SDHCI_CLOCK_BASE_SHIFT; 15731c6a0718SPierre Ossman if (host->max_clk == 0) { 15741c6a0718SPierre Ossman printk(KERN_ERR "%s: Hardware doesn't specify base clock " 1575b69c9058SPierre Ossman "frequency.\n", mmc_hostname(mmc)); 1576b8c86fc5SPierre Ossman return -ENODEV; 15771c6a0718SPierre Ossman } 15781c6a0718SPierre Ossman host->max_clk *= 1000000; 15791c6a0718SPierre Ossman 15801c6a0718SPierre Ossman host->timeout_clk = 15811c6a0718SPierre Ossman (caps & SDHCI_TIMEOUT_CLK_MASK) >> SDHCI_TIMEOUT_CLK_SHIFT; 15821c6a0718SPierre Ossman if (host->timeout_clk == 0) { 15831c6a0718SPierre Ossman printk(KERN_ERR "%s: Hardware doesn't specify timeout clock " 1584b69c9058SPierre Ossman "frequency.\n", mmc_hostname(mmc)); 1585b8c86fc5SPierre Ossman return -ENODEV; 15861c6a0718SPierre Ossman } 15871c6a0718SPierre Ossman if (caps & SDHCI_TIMEOUT_CLK_UNIT) 15881c6a0718SPierre Ossman host->timeout_clk *= 1000; 15891c6a0718SPierre Ossman 15901c6a0718SPierre Ossman /* 15911c6a0718SPierre Ossman * Set host parameters. 15921c6a0718SPierre Ossman */ 15931c6a0718SPierre Ossman mmc->ops = &sdhci_ops; 15941c6a0718SPierre Ossman mmc->f_min = host->max_clk / 256; 15951c6a0718SPierre Ossman mmc->f_max = host->max_clk; 1596c9b74c5bSPierre Ossman mmc->caps = MMC_CAP_4_BIT_DATA | MMC_CAP_SDIO_IRQ; 15971c6a0718SPierre Ossman 15981c6a0718SPierre Ossman if (caps & SDHCI_CAN_DO_HISPD) 15991c6a0718SPierre Ossman mmc->caps |= MMC_CAP_SD_HIGHSPEED; 16001c6a0718SPierre Ossman 16011c6a0718SPierre Ossman mmc->ocr_avail = 0; 16021c6a0718SPierre Ossman if (caps & SDHCI_CAN_VDD_330) 16031c6a0718SPierre Ossman mmc->ocr_avail |= MMC_VDD_32_33|MMC_VDD_33_34; 16041c6a0718SPierre Ossman if (caps & SDHCI_CAN_VDD_300) 16051c6a0718SPierre Ossman mmc->ocr_avail |= MMC_VDD_29_30|MMC_VDD_30_31; 16061c6a0718SPierre Ossman if (caps & SDHCI_CAN_VDD_180) 160755556da0SPhilip Langdale mmc->ocr_avail |= MMC_VDD_165_195; 16081c6a0718SPierre Ossman 16091c6a0718SPierre Ossman if (mmc->ocr_avail == 0) { 16101c6a0718SPierre Ossman printk(KERN_ERR "%s: Hardware doesn't report any " 1611b69c9058SPierre Ossman "support voltages.\n", mmc_hostname(mmc)); 1612b8c86fc5SPierre Ossman return -ENODEV; 16131c6a0718SPierre Ossman } 16141c6a0718SPierre Ossman 16151c6a0718SPierre Ossman spin_lock_init(&host->lock); 16161c6a0718SPierre Ossman 16171c6a0718SPierre Ossman /* 16182134a922SPierre Ossman * Maximum number of segments. Depends on if the hardware 16192134a922SPierre Ossman * can do scatter/gather or not. 16201c6a0718SPierre Ossman */ 16212134a922SPierre Ossman if (host->flags & SDHCI_USE_ADMA) 16222134a922SPierre Ossman mmc->max_hw_segs = 128; 16232134a922SPierre Ossman else if (host->flags & SDHCI_USE_DMA) 16241c6a0718SPierre Ossman mmc->max_hw_segs = 1; 16252134a922SPierre Ossman else /* PIO */ 16262134a922SPierre Ossman mmc->max_hw_segs = 128; 16272134a922SPierre Ossman mmc->max_phys_segs = 128; 16281c6a0718SPierre Ossman 16291c6a0718SPierre Ossman /* 16301c6a0718SPierre Ossman * Maximum number of sectors in one transfer. Limited by DMA boundary 16311c6a0718SPierre Ossman * size (512KiB). 16321c6a0718SPierre Ossman */ 16331c6a0718SPierre Ossman mmc->max_req_size = 524288; 16341c6a0718SPierre Ossman 16351c6a0718SPierre Ossman /* 16361c6a0718SPierre Ossman * Maximum segment size. Could be one segment with the maximum number 16372134a922SPierre Ossman * of bytes. When doing hardware scatter/gather, each entry cannot 16382134a922SPierre Ossman * be larger than 64 KiB though. 16391c6a0718SPierre Ossman */ 16402134a922SPierre Ossman if (host->flags & SDHCI_USE_ADMA) 16412134a922SPierre Ossman mmc->max_seg_size = 65536; 16422134a922SPierre Ossman else 16431c6a0718SPierre Ossman mmc->max_seg_size = mmc->max_req_size; 16441c6a0718SPierre Ossman 16451c6a0718SPierre Ossman /* 16461c6a0718SPierre Ossman * Maximum block size. This varies from controller to controller and 16471c6a0718SPierre Ossman * is specified in the capabilities register. 16481c6a0718SPierre Ossman */ 16491c6a0718SPierre Ossman mmc->max_blk_size = (caps & SDHCI_MAX_BLOCK_MASK) >> SDHCI_MAX_BLOCK_SHIFT; 16501c6a0718SPierre Ossman if (mmc->max_blk_size >= 3) { 1651b69c9058SPierre Ossman printk(KERN_WARNING "%s: Invalid maximum block size, " 1652b69c9058SPierre Ossman "assuming 512 bytes\n", mmc_hostname(mmc)); 165303f8590dSDavid Vrabel mmc->max_blk_size = 512; 165403f8590dSDavid Vrabel } else 16551c6a0718SPierre Ossman mmc->max_blk_size = 512 << mmc->max_blk_size; 16561c6a0718SPierre Ossman 16571c6a0718SPierre Ossman /* 16581c6a0718SPierre Ossman * Maximum block count. 16591c6a0718SPierre Ossman */ 16601c6a0718SPierre Ossman mmc->max_blk_count = 65535; 16611c6a0718SPierre Ossman 16621c6a0718SPierre Ossman /* 16631c6a0718SPierre Ossman * Init tasklets. 16641c6a0718SPierre Ossman */ 16651c6a0718SPierre Ossman tasklet_init(&host->card_tasklet, 16661c6a0718SPierre Ossman sdhci_tasklet_card, (unsigned long)host); 16671c6a0718SPierre Ossman tasklet_init(&host->finish_tasklet, 16681c6a0718SPierre Ossman sdhci_tasklet_finish, (unsigned long)host); 16691c6a0718SPierre Ossman 16701c6a0718SPierre Ossman setup_timer(&host->timer, sdhci_timeout_timer, (unsigned long)host); 16711c6a0718SPierre Ossman 16721c6a0718SPierre Ossman ret = request_irq(host->irq, sdhci_irq, IRQF_SHARED, 1673b69c9058SPierre Ossman mmc_hostname(mmc), host); 16741c6a0718SPierre Ossman if (ret) 16751c6a0718SPierre Ossman goto untasklet; 16761c6a0718SPierre Ossman 16771c6a0718SPierre Ossman sdhci_init(host); 16781c6a0718SPierre Ossman 16791c6a0718SPierre Ossman #ifdef CONFIG_MMC_DEBUG 16801c6a0718SPierre Ossman sdhci_dumpregs(host); 16811c6a0718SPierre Ossman #endif 16821c6a0718SPierre Ossman 16832f730fecSPierre Ossman #ifdef CONFIG_LEDS_CLASS 16842f730fecSPierre Ossman host->led.name = mmc_hostname(mmc); 16852f730fecSPierre Ossman host->led.brightness = LED_OFF; 16862f730fecSPierre Ossman host->led.default_trigger = mmc_hostname(mmc); 16872f730fecSPierre Ossman host->led.brightness_set = sdhci_led_control; 16882f730fecSPierre Ossman 1689b8c86fc5SPierre Ossman ret = led_classdev_register(mmc_dev(mmc), &host->led); 16902f730fecSPierre Ossman if (ret) 16912f730fecSPierre Ossman goto reset; 16922f730fecSPierre Ossman #endif 16932f730fecSPierre Ossman 16941c6a0718SPierre Ossman mmiowb(); 16951c6a0718SPierre Ossman 16961c6a0718SPierre Ossman mmc_add_host(mmc); 16971c6a0718SPierre Ossman 16982134a922SPierre Ossman printk(KERN_INFO "%s: SDHCI controller on %s [%s] using %s%s\n", 1699b8c86fc5SPierre Ossman mmc_hostname(mmc), host->hw_name, mmc_dev(mmc)->bus_id, 17002134a922SPierre Ossman (host->flags & SDHCI_USE_ADMA)?"A":"", 17011c6a0718SPierre Ossman (host->flags & SDHCI_USE_DMA)?"DMA":"PIO"); 17021c6a0718SPierre Ossman 17031c6a0718SPierre Ossman return 0; 17041c6a0718SPierre Ossman 17052f730fecSPierre Ossman #ifdef CONFIG_LEDS_CLASS 17062f730fecSPierre Ossman reset: 17072f730fecSPierre Ossman sdhci_reset(host, SDHCI_RESET_ALL); 17082f730fecSPierre Ossman free_irq(host->irq, host); 17092f730fecSPierre Ossman #endif 17101c6a0718SPierre Ossman untasklet: 17111c6a0718SPierre Ossman tasklet_kill(&host->card_tasklet); 17121c6a0718SPierre Ossman tasklet_kill(&host->finish_tasklet); 17131c6a0718SPierre Ossman 17141c6a0718SPierre Ossman return ret; 17151c6a0718SPierre Ossman } 17161c6a0718SPierre Ossman 1717b8c86fc5SPierre Ossman EXPORT_SYMBOL_GPL(sdhci_add_host); 1718b8c86fc5SPierre Ossman 17191e72859eSPierre Ossman void sdhci_remove_host(struct sdhci_host *host, int dead) 17201c6a0718SPierre Ossman { 17211e72859eSPierre Ossman unsigned long flags; 17221e72859eSPierre Ossman 17231e72859eSPierre Ossman if (dead) { 17241e72859eSPierre Ossman spin_lock_irqsave(&host->lock, flags); 17251e72859eSPierre Ossman 17261e72859eSPierre Ossman host->flags |= SDHCI_DEVICE_DEAD; 17271e72859eSPierre Ossman 17281e72859eSPierre Ossman if (host->mrq) { 17291e72859eSPierre Ossman printk(KERN_ERR "%s: Controller removed during " 17301e72859eSPierre Ossman " transfer!\n", mmc_hostname(host->mmc)); 17311e72859eSPierre Ossman 17321e72859eSPierre Ossman host->mrq->cmd->error = -ENOMEDIUM; 17331e72859eSPierre Ossman tasklet_schedule(&host->finish_tasklet); 17341e72859eSPierre Ossman } 17351e72859eSPierre Ossman 17361e72859eSPierre Ossman spin_unlock_irqrestore(&host->lock, flags); 17371e72859eSPierre Ossman } 17381e72859eSPierre Ossman 1739b8c86fc5SPierre Ossman mmc_remove_host(host->mmc); 17401c6a0718SPierre Ossman 17412f730fecSPierre Ossman #ifdef CONFIG_LEDS_CLASS 17422f730fecSPierre Ossman led_classdev_unregister(&host->led); 17432f730fecSPierre Ossman #endif 17442f730fecSPierre Ossman 17451e72859eSPierre Ossman if (!dead) 17461c6a0718SPierre Ossman sdhci_reset(host, SDHCI_RESET_ALL); 17471c6a0718SPierre Ossman 17481c6a0718SPierre Ossman free_irq(host->irq, host); 17491c6a0718SPierre Ossman 17501c6a0718SPierre Ossman del_timer_sync(&host->timer); 17511c6a0718SPierre Ossman 17521c6a0718SPierre Ossman tasklet_kill(&host->card_tasklet); 17531c6a0718SPierre Ossman tasklet_kill(&host->finish_tasklet); 17542134a922SPierre Ossman 17552134a922SPierre Ossman kfree(host->adma_desc); 17562134a922SPierre Ossman kfree(host->align_buffer); 17572134a922SPierre Ossman 17582134a922SPierre Ossman host->adma_desc = NULL; 17592134a922SPierre Ossman host->align_buffer = NULL; 17601c6a0718SPierre Ossman } 17611c6a0718SPierre Ossman 1762b8c86fc5SPierre Ossman EXPORT_SYMBOL_GPL(sdhci_remove_host); 1763b8c86fc5SPierre Ossman 1764b8c86fc5SPierre Ossman void sdhci_free_host(struct sdhci_host *host) 17651c6a0718SPierre Ossman { 1766b8c86fc5SPierre Ossman mmc_free_host(host->mmc); 17671c6a0718SPierre Ossman } 17681c6a0718SPierre Ossman 1769b8c86fc5SPierre Ossman EXPORT_SYMBOL_GPL(sdhci_free_host); 17701c6a0718SPierre Ossman 17711c6a0718SPierre Ossman /*****************************************************************************\ 17721c6a0718SPierre Ossman * * 17731c6a0718SPierre Ossman * Driver init/exit * 17741c6a0718SPierre Ossman * * 17751c6a0718SPierre Ossman \*****************************************************************************/ 17761c6a0718SPierre Ossman 17771c6a0718SPierre Ossman static int __init sdhci_drv_init(void) 17781c6a0718SPierre Ossman { 17791c6a0718SPierre Ossman printk(KERN_INFO DRIVER_NAME 17801c6a0718SPierre Ossman ": Secure Digital Host Controller Interface driver\n"); 17811c6a0718SPierre Ossman printk(KERN_INFO DRIVER_NAME ": Copyright(c) Pierre Ossman\n"); 17821c6a0718SPierre Ossman 1783b8c86fc5SPierre Ossman return 0; 17841c6a0718SPierre Ossman } 17851c6a0718SPierre Ossman 17861c6a0718SPierre Ossman static void __exit sdhci_drv_exit(void) 17871c6a0718SPierre Ossman { 17881c6a0718SPierre Ossman } 17891c6a0718SPierre Ossman 17901c6a0718SPierre Ossman module_init(sdhci_drv_init); 17911c6a0718SPierre Ossman module_exit(sdhci_drv_exit); 17921c6a0718SPierre Ossman 17931c6a0718SPierre Ossman module_param(debug_quirks, uint, 0444); 17941c6a0718SPierre Ossman 17951c6a0718SPierre Ossman MODULE_AUTHOR("Pierre Ossman <drzeus@drzeus.cx>"); 1796b8c86fc5SPierre Ossman MODULE_DESCRIPTION("Secure Digital Host Controller Interface core driver"); 17971c6a0718SPierre Ossman MODULE_LICENSE("GPL"); 17981c6a0718SPierre Ossman 17991c6a0718SPierre Ossman MODULE_PARM_DESC(debug_quirks, "Force certain quirks."); 1800