11c6a0718SPierre Ossman /* 270f10482SPierre Ossman * linux/drivers/mmc/host/sdhci.c - Secure Digital Host Controller Interface driver 31c6a0718SPierre Ossman * 4b69c9058SPierre Ossman * Copyright (C) 2005-2008 Pierre Ossman, All Rights Reserved. 51c6a0718SPierre Ossman * 61c6a0718SPierre Ossman * This program is free software; you can redistribute it and/or modify 71c6a0718SPierre Ossman * it under the terms of the GNU General Public License as published by 81c6a0718SPierre Ossman * the Free Software Foundation; either version 2 of the License, or (at 91c6a0718SPierre Ossman * your option) any later version. 1084c46a53SPierre Ossman * 1184c46a53SPierre Ossman * Thanks to the following companies for their support: 1284c46a53SPierre Ossman * 1384c46a53SPierre Ossman * - JMicron (hardware and technical support) 141c6a0718SPierre Ossman */ 151c6a0718SPierre Ossman 161c6a0718SPierre Ossman #include <linux/delay.h> 171c6a0718SPierre Ossman #include <linux/highmem.h> 18b8c86fc5SPierre Ossman #include <linux/io.h> 1988b47679SPaul Gortmaker #include <linux/module.h> 201c6a0718SPierre Ossman #include <linux/dma-mapping.h> 215a0e3ad6STejun Heo #include <linux/slab.h> 2211763609SRalf Baechle #include <linux/scatterlist.h> 239bea3c85SMarek Szyprowski #include <linux/regulator/consumer.h> 2466fd8ad5SAdrian Hunter #include <linux/pm_runtime.h> 251c6a0718SPierre Ossman 262f730fecSPierre Ossman #include <linux/leds.h> 272f730fecSPierre Ossman 2822113efdSAries Lee #include <linux/mmc/mmc.h> 291c6a0718SPierre Ossman #include <linux/mmc/host.h> 30473b095aSAaron Lu #include <linux/mmc/card.h> 311c6a0718SPierre Ossman 321c6a0718SPierre Ossman #include "sdhci.h" 331c6a0718SPierre Ossman 341c6a0718SPierre Ossman #define DRIVER_NAME "sdhci" 351c6a0718SPierre Ossman 361c6a0718SPierre Ossman #define DBG(f, x...) \ 371c6a0718SPierre Ossman pr_debug(DRIVER_NAME " [%s()]: " f, __func__,## x) 381c6a0718SPierre Ossman 39f9134319SPierre Ossman #if defined(CONFIG_LEDS_CLASS) || (defined(CONFIG_LEDS_CLASS_MODULE) && \ 40f9134319SPierre Ossman defined(CONFIG_MMC_SDHCI_MODULE)) 41f9134319SPierre Ossman #define SDHCI_USE_LEDS_CLASS 42f9134319SPierre Ossman #endif 43f9134319SPierre Ossman 44b513ea25SArindam Nath #define MAX_TUNING_LOOP 40 45b513ea25SArindam Nath 461c6a0718SPierre Ossman static unsigned int debug_quirks = 0; 4766fd8ad5SAdrian Hunter static unsigned int debug_quirks2; 481c6a0718SPierre Ossman 491c6a0718SPierre Ossman static void sdhci_finish_data(struct sdhci_host *); 501c6a0718SPierre Ossman 511c6a0718SPierre Ossman static void sdhci_send_command(struct sdhci_host *, struct mmc_command *); 521c6a0718SPierre Ossman static void sdhci_finish_command(struct sdhci_host *); 53069c9f14SGirish K S static int sdhci_execute_tuning(struct mmc_host *mmc, u32 opcode); 54cf2b5eeaSArindam Nath static void sdhci_tuning_timer(unsigned long data); 551c6a0718SPierre Ossman 5666fd8ad5SAdrian Hunter #ifdef CONFIG_PM_RUNTIME 5766fd8ad5SAdrian Hunter static int sdhci_runtime_pm_get(struct sdhci_host *host); 5866fd8ad5SAdrian Hunter static int sdhci_runtime_pm_put(struct sdhci_host *host); 5966fd8ad5SAdrian Hunter #else 6066fd8ad5SAdrian Hunter static inline int sdhci_runtime_pm_get(struct sdhci_host *host) 6166fd8ad5SAdrian Hunter { 6266fd8ad5SAdrian Hunter return 0; 6366fd8ad5SAdrian Hunter } 6466fd8ad5SAdrian Hunter static inline int sdhci_runtime_pm_put(struct sdhci_host *host) 6566fd8ad5SAdrian Hunter { 6666fd8ad5SAdrian Hunter return 0; 6766fd8ad5SAdrian Hunter } 6866fd8ad5SAdrian Hunter #endif 6966fd8ad5SAdrian Hunter 701c6a0718SPierre Ossman static void sdhci_dumpregs(struct sdhci_host *host) 711c6a0718SPierre Ossman { 72a3c76eb9SGirish K S pr_debug(DRIVER_NAME ": =========== REGISTER DUMP (%s)===========\n", 73412ab659SPhilip Rakity mmc_hostname(host->mmc)); 741c6a0718SPierre Ossman 75a3c76eb9SGirish K S pr_debug(DRIVER_NAME ": Sys addr: 0x%08x | Version: 0x%08x\n", 764e4141a5SAnton Vorontsov sdhci_readl(host, SDHCI_DMA_ADDRESS), 774e4141a5SAnton Vorontsov sdhci_readw(host, SDHCI_HOST_VERSION)); 78a3c76eb9SGirish K S pr_debug(DRIVER_NAME ": Blk size: 0x%08x | Blk cnt: 0x%08x\n", 794e4141a5SAnton Vorontsov sdhci_readw(host, SDHCI_BLOCK_SIZE), 804e4141a5SAnton Vorontsov sdhci_readw(host, SDHCI_BLOCK_COUNT)); 81a3c76eb9SGirish K S pr_debug(DRIVER_NAME ": Argument: 0x%08x | Trn mode: 0x%08x\n", 824e4141a5SAnton Vorontsov sdhci_readl(host, SDHCI_ARGUMENT), 834e4141a5SAnton Vorontsov sdhci_readw(host, SDHCI_TRANSFER_MODE)); 84a3c76eb9SGirish K S pr_debug(DRIVER_NAME ": Present: 0x%08x | Host ctl: 0x%08x\n", 854e4141a5SAnton Vorontsov sdhci_readl(host, SDHCI_PRESENT_STATE), 864e4141a5SAnton Vorontsov sdhci_readb(host, SDHCI_HOST_CONTROL)); 87a3c76eb9SGirish K S pr_debug(DRIVER_NAME ": Power: 0x%08x | Blk gap: 0x%08x\n", 884e4141a5SAnton Vorontsov sdhci_readb(host, SDHCI_POWER_CONTROL), 894e4141a5SAnton Vorontsov sdhci_readb(host, SDHCI_BLOCK_GAP_CONTROL)); 90a3c76eb9SGirish K S pr_debug(DRIVER_NAME ": Wake-up: 0x%08x | Clock: 0x%08x\n", 914e4141a5SAnton Vorontsov sdhci_readb(host, SDHCI_WAKE_UP_CONTROL), 924e4141a5SAnton Vorontsov sdhci_readw(host, SDHCI_CLOCK_CONTROL)); 93a3c76eb9SGirish K S pr_debug(DRIVER_NAME ": Timeout: 0x%08x | Int stat: 0x%08x\n", 944e4141a5SAnton Vorontsov sdhci_readb(host, SDHCI_TIMEOUT_CONTROL), 954e4141a5SAnton Vorontsov sdhci_readl(host, SDHCI_INT_STATUS)); 96a3c76eb9SGirish K S pr_debug(DRIVER_NAME ": Int enab: 0x%08x | Sig enab: 0x%08x\n", 974e4141a5SAnton Vorontsov sdhci_readl(host, SDHCI_INT_ENABLE), 984e4141a5SAnton Vorontsov sdhci_readl(host, SDHCI_SIGNAL_ENABLE)); 99a3c76eb9SGirish K S pr_debug(DRIVER_NAME ": AC12 err: 0x%08x | Slot int: 0x%08x\n", 1004e4141a5SAnton Vorontsov sdhci_readw(host, SDHCI_ACMD12_ERR), 1014e4141a5SAnton Vorontsov sdhci_readw(host, SDHCI_SLOT_INT_STATUS)); 102a3c76eb9SGirish K S pr_debug(DRIVER_NAME ": Caps: 0x%08x | Caps_1: 0x%08x\n", 1034e4141a5SAnton Vorontsov sdhci_readl(host, SDHCI_CAPABILITIES), 104e8120ad1SPhilip Rakity sdhci_readl(host, SDHCI_CAPABILITIES_1)); 105a3c76eb9SGirish K S pr_debug(DRIVER_NAME ": Cmd: 0x%08x | Max curr: 0x%08x\n", 106e8120ad1SPhilip Rakity sdhci_readw(host, SDHCI_COMMAND), 1074e4141a5SAnton Vorontsov sdhci_readl(host, SDHCI_MAX_CURRENT)); 108a3c76eb9SGirish K S pr_debug(DRIVER_NAME ": Host ctl2: 0x%08x\n", 109f2119df6SArindam Nath sdhci_readw(host, SDHCI_HOST_CONTROL2)); 1101c6a0718SPierre Ossman 111be3f4ae0SBen Dooks if (host->flags & SDHCI_USE_ADMA) 112a3c76eb9SGirish K S pr_debug(DRIVER_NAME ": ADMA Err: 0x%08x | ADMA Ptr: 0x%08x\n", 113be3f4ae0SBen Dooks readl(host->ioaddr + SDHCI_ADMA_ERROR), 114be3f4ae0SBen Dooks readl(host->ioaddr + SDHCI_ADMA_ADDRESS)); 115be3f4ae0SBen Dooks 116a3c76eb9SGirish K S pr_debug(DRIVER_NAME ": ===========================================\n"); 1171c6a0718SPierre Ossman } 1181c6a0718SPierre Ossman 1191c6a0718SPierre Ossman /*****************************************************************************\ 1201c6a0718SPierre Ossman * * 1211c6a0718SPierre Ossman * Low level functions * 1221c6a0718SPierre Ossman * * 1231c6a0718SPierre Ossman \*****************************************************************************/ 1241c6a0718SPierre Ossman 1257260cf5eSAnton Vorontsov static void sdhci_clear_set_irqs(struct sdhci_host *host, u32 clear, u32 set) 1267260cf5eSAnton Vorontsov { 1277260cf5eSAnton Vorontsov u32 ier; 1287260cf5eSAnton Vorontsov 1297260cf5eSAnton Vorontsov ier = sdhci_readl(host, SDHCI_INT_ENABLE); 1307260cf5eSAnton Vorontsov ier &= ~clear; 1317260cf5eSAnton Vorontsov ier |= set; 1327260cf5eSAnton Vorontsov sdhci_writel(host, ier, SDHCI_INT_ENABLE); 1337260cf5eSAnton Vorontsov sdhci_writel(host, ier, SDHCI_SIGNAL_ENABLE); 1347260cf5eSAnton Vorontsov } 1357260cf5eSAnton Vorontsov 1367260cf5eSAnton Vorontsov static void sdhci_unmask_irqs(struct sdhci_host *host, u32 irqs) 1377260cf5eSAnton Vorontsov { 1387260cf5eSAnton Vorontsov sdhci_clear_set_irqs(host, 0, irqs); 1397260cf5eSAnton Vorontsov } 1407260cf5eSAnton Vorontsov 1417260cf5eSAnton Vorontsov static void sdhci_mask_irqs(struct sdhci_host *host, u32 irqs) 1427260cf5eSAnton Vorontsov { 1437260cf5eSAnton Vorontsov sdhci_clear_set_irqs(host, irqs, 0); 1447260cf5eSAnton Vorontsov } 1457260cf5eSAnton Vorontsov 1467260cf5eSAnton Vorontsov static void sdhci_set_card_detection(struct sdhci_host *host, bool enable) 1477260cf5eSAnton Vorontsov { 148d25928d1SShawn Guo u32 present, irqs; 1497260cf5eSAnton Vorontsov 150c79396c1SAdrian Hunter if ((host->quirks & SDHCI_QUIRK_BROKEN_CARD_DETECTION) || 15187b87a3fSDaniel Drake (host->mmc->caps & MMC_CAP_NONREMOVABLE)) 15266fd8ad5SAdrian Hunter return; 15366fd8ad5SAdrian Hunter 154d25928d1SShawn Guo present = sdhci_readl(host, SDHCI_PRESENT_STATE) & 155d25928d1SShawn Guo SDHCI_CARD_PRESENT; 156d25928d1SShawn Guo irqs = present ? SDHCI_INT_CARD_REMOVE : SDHCI_INT_CARD_INSERT; 157d25928d1SShawn Guo 1587260cf5eSAnton Vorontsov if (enable) 1597260cf5eSAnton Vorontsov sdhci_unmask_irqs(host, irqs); 1607260cf5eSAnton Vorontsov else 1617260cf5eSAnton Vorontsov sdhci_mask_irqs(host, irqs); 1627260cf5eSAnton Vorontsov } 1637260cf5eSAnton Vorontsov 1647260cf5eSAnton Vorontsov static void sdhci_enable_card_detection(struct sdhci_host *host) 1657260cf5eSAnton Vorontsov { 1667260cf5eSAnton Vorontsov sdhci_set_card_detection(host, true); 1677260cf5eSAnton Vorontsov } 1687260cf5eSAnton Vorontsov 1697260cf5eSAnton Vorontsov static void sdhci_disable_card_detection(struct sdhci_host *host) 1707260cf5eSAnton Vorontsov { 1717260cf5eSAnton Vorontsov sdhci_set_card_detection(host, false); 1727260cf5eSAnton Vorontsov } 1737260cf5eSAnton Vorontsov 1741c6a0718SPierre Ossman static void sdhci_reset(struct sdhci_host *host, u8 mask) 1751c6a0718SPierre Ossman { 1761c6a0718SPierre Ossman unsigned long timeout; 177063a9dbbSAnton Vorontsov u32 uninitialized_var(ier); 1781c6a0718SPierre Ossman 179b8c86fc5SPierre Ossman if (host->quirks & SDHCI_QUIRK_NO_CARD_NO_RESET) { 1804e4141a5SAnton Vorontsov if (!(sdhci_readl(host, SDHCI_PRESENT_STATE) & 1811c6a0718SPierre Ossman SDHCI_CARD_PRESENT)) 1821c6a0718SPierre Ossman return; 1831c6a0718SPierre Ossman } 1841c6a0718SPierre Ossman 185063a9dbbSAnton Vorontsov if (host->quirks & SDHCI_QUIRK_RESTORE_IRQS_AFTER_RESET) 186063a9dbbSAnton Vorontsov ier = sdhci_readl(host, SDHCI_INT_ENABLE); 187063a9dbbSAnton Vorontsov 188393c1a34SPhilip Rakity if (host->ops->platform_reset_enter) 189393c1a34SPhilip Rakity host->ops->platform_reset_enter(host, mask); 190393c1a34SPhilip Rakity 1914e4141a5SAnton Vorontsov sdhci_writeb(host, mask, SDHCI_SOFTWARE_RESET); 1921c6a0718SPierre Ossman 1931c6a0718SPierre Ossman if (mask & SDHCI_RESET_ALL) 1941c6a0718SPierre Ossman host->clock = 0; 1951c6a0718SPierre Ossman 1961c6a0718SPierre Ossman /* Wait max 100 ms */ 1971c6a0718SPierre Ossman timeout = 100; 1981c6a0718SPierre Ossman 1991c6a0718SPierre Ossman /* hw clears the bit when it's done */ 2004e4141a5SAnton Vorontsov while (sdhci_readb(host, SDHCI_SOFTWARE_RESET) & mask) { 2011c6a0718SPierre Ossman if (timeout == 0) { 202a3c76eb9SGirish K S pr_err("%s: Reset 0x%x never completed.\n", 2031c6a0718SPierre Ossman mmc_hostname(host->mmc), (int)mask); 2041c6a0718SPierre Ossman sdhci_dumpregs(host); 2051c6a0718SPierre Ossman return; 2061c6a0718SPierre Ossman } 2071c6a0718SPierre Ossman timeout--; 2081c6a0718SPierre Ossman mdelay(1); 2091c6a0718SPierre Ossman } 210063a9dbbSAnton Vorontsov 211393c1a34SPhilip Rakity if (host->ops->platform_reset_exit) 212393c1a34SPhilip Rakity host->ops->platform_reset_exit(host, mask); 213393c1a34SPhilip Rakity 214063a9dbbSAnton Vorontsov if (host->quirks & SDHCI_QUIRK_RESTORE_IRQS_AFTER_RESET) 215063a9dbbSAnton Vorontsov sdhci_clear_set_irqs(host, SDHCI_INT_ALL_MASK, ier); 2163abc1e80SShaohui Xie 2173abc1e80SShaohui Xie if (host->flags & (SDHCI_USE_SDMA | SDHCI_USE_ADMA)) { 2183abc1e80SShaohui Xie if ((host->ops->enable_dma) && (mask & SDHCI_RESET_ALL)) 2193abc1e80SShaohui Xie host->ops->enable_dma(host); 2203abc1e80SShaohui Xie } 2211c6a0718SPierre Ossman } 2221c6a0718SPierre Ossman 2232f4cbb3dSNicolas Pitre static void sdhci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios); 2242f4cbb3dSNicolas Pitre 2252f4cbb3dSNicolas Pitre static void sdhci_init(struct sdhci_host *host, int soft) 2261c6a0718SPierre Ossman { 2272f4cbb3dSNicolas Pitre if (soft) 2282f4cbb3dSNicolas Pitre sdhci_reset(host, SDHCI_RESET_CMD|SDHCI_RESET_DATA); 2292f4cbb3dSNicolas Pitre else 2301c6a0718SPierre Ossman sdhci_reset(host, SDHCI_RESET_ALL); 2311c6a0718SPierre Ossman 2327260cf5eSAnton Vorontsov sdhci_clear_set_irqs(host, SDHCI_INT_ALL_MASK, 2337260cf5eSAnton Vorontsov SDHCI_INT_BUS_POWER | SDHCI_INT_DATA_END_BIT | 2341c6a0718SPierre Ossman SDHCI_INT_DATA_CRC | SDHCI_INT_DATA_TIMEOUT | SDHCI_INT_INDEX | 2351c6a0718SPierre Ossman SDHCI_INT_END_BIT | SDHCI_INT_CRC | SDHCI_INT_TIMEOUT | 2366aa943abSAnton Vorontsov SDHCI_INT_DATA_END | SDHCI_INT_RESPONSE); 2372f4cbb3dSNicolas Pitre 2382f4cbb3dSNicolas Pitre if (soft) { 2392f4cbb3dSNicolas Pitre /* force clock reconfiguration */ 2402f4cbb3dSNicolas Pitre host->clock = 0; 2412f4cbb3dSNicolas Pitre sdhci_set_ios(host->mmc, &host->mmc->ios); 2422f4cbb3dSNicolas Pitre } 2437260cf5eSAnton Vorontsov } 2441c6a0718SPierre Ossman 2457260cf5eSAnton Vorontsov static void sdhci_reinit(struct sdhci_host *host) 2467260cf5eSAnton Vorontsov { 2472f4cbb3dSNicolas Pitre sdhci_init(host, 0); 248b67c6b41SAaron Lu /* 249b67c6b41SAaron Lu * Retuning stuffs are affected by different cards inserted and only 250b67c6b41SAaron Lu * applicable to UHS-I cards. So reset these fields to their initial 251b67c6b41SAaron Lu * value when card is removed. 252b67c6b41SAaron Lu */ 253973905feSAaron Lu if (host->flags & SDHCI_USING_RETUNING_TIMER) { 254973905feSAaron Lu host->flags &= ~SDHCI_USING_RETUNING_TIMER; 255973905feSAaron Lu 256b67c6b41SAaron Lu del_timer_sync(&host->tuning_timer); 257b67c6b41SAaron Lu host->flags &= ~SDHCI_NEEDS_RETUNING; 258b67c6b41SAaron Lu host->mmc->max_blk_count = 259b67c6b41SAaron Lu (host->quirks & SDHCI_QUIRK_NO_MULTIBLOCK) ? 1 : 65535; 260b67c6b41SAaron Lu } 2617260cf5eSAnton Vorontsov sdhci_enable_card_detection(host); 2621c6a0718SPierre Ossman } 2631c6a0718SPierre Ossman 2641c6a0718SPierre Ossman static void sdhci_activate_led(struct sdhci_host *host) 2651c6a0718SPierre Ossman { 2661c6a0718SPierre Ossman u8 ctrl; 2671c6a0718SPierre Ossman 2684e4141a5SAnton Vorontsov ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL); 2691c6a0718SPierre Ossman ctrl |= SDHCI_CTRL_LED; 2704e4141a5SAnton Vorontsov sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL); 2711c6a0718SPierre Ossman } 2721c6a0718SPierre Ossman 2731c6a0718SPierre Ossman static void sdhci_deactivate_led(struct sdhci_host *host) 2741c6a0718SPierre Ossman { 2751c6a0718SPierre Ossman u8 ctrl; 2761c6a0718SPierre Ossman 2774e4141a5SAnton Vorontsov ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL); 2781c6a0718SPierre Ossman ctrl &= ~SDHCI_CTRL_LED; 2794e4141a5SAnton Vorontsov sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL); 2801c6a0718SPierre Ossman } 2811c6a0718SPierre Ossman 282f9134319SPierre Ossman #ifdef SDHCI_USE_LEDS_CLASS 2832f730fecSPierre Ossman static void sdhci_led_control(struct led_classdev *led, 2842f730fecSPierre Ossman enum led_brightness brightness) 2852f730fecSPierre Ossman { 2862f730fecSPierre Ossman struct sdhci_host *host = container_of(led, struct sdhci_host, led); 2872f730fecSPierre Ossman unsigned long flags; 2882f730fecSPierre Ossman 2892f730fecSPierre Ossman spin_lock_irqsave(&host->lock, flags); 2902f730fecSPierre Ossman 29166fd8ad5SAdrian Hunter if (host->runtime_suspended) 29266fd8ad5SAdrian Hunter goto out; 29366fd8ad5SAdrian Hunter 2942f730fecSPierre Ossman if (brightness == LED_OFF) 2952f730fecSPierre Ossman sdhci_deactivate_led(host); 2962f730fecSPierre Ossman else 2972f730fecSPierre Ossman sdhci_activate_led(host); 29866fd8ad5SAdrian Hunter out: 2992f730fecSPierre Ossman spin_unlock_irqrestore(&host->lock, flags); 3002f730fecSPierre Ossman } 3012f730fecSPierre Ossman #endif 3022f730fecSPierre Ossman 3031c6a0718SPierre Ossman /*****************************************************************************\ 3041c6a0718SPierre Ossman * * 3051c6a0718SPierre Ossman * Core functions * 3061c6a0718SPierre Ossman * * 3071c6a0718SPierre Ossman \*****************************************************************************/ 3081c6a0718SPierre Ossman 3091c6a0718SPierre Ossman static void sdhci_read_block_pio(struct sdhci_host *host) 3101c6a0718SPierre Ossman { 3117659150cSPierre Ossman unsigned long flags; 3127659150cSPierre Ossman size_t blksize, len, chunk; 3137244b85bSSteven Noonan u32 uninitialized_var(scratch); 3147659150cSPierre Ossman u8 *buf; 3151c6a0718SPierre Ossman 3161c6a0718SPierre Ossman DBG("PIO reading\n"); 3171c6a0718SPierre Ossman 3181c6a0718SPierre Ossman blksize = host->data->blksz; 3197659150cSPierre Ossman chunk = 0; 3201c6a0718SPierre Ossman 3217659150cSPierre Ossman local_irq_save(flags); 3221c6a0718SPierre Ossman 3231c6a0718SPierre Ossman while (blksize) { 3247659150cSPierre Ossman if (!sg_miter_next(&host->sg_miter)) 3257659150cSPierre Ossman BUG(); 3267659150cSPierre Ossman 3277659150cSPierre Ossman len = min(host->sg_miter.length, blksize); 3287659150cSPierre Ossman 3297659150cSPierre Ossman blksize -= len; 3307659150cSPierre Ossman host->sg_miter.consumed = len; 3317659150cSPierre Ossman 3327659150cSPierre Ossman buf = host->sg_miter.addr; 3337659150cSPierre Ossman 3347659150cSPierre Ossman while (len) { 3357659150cSPierre Ossman if (chunk == 0) { 3364e4141a5SAnton Vorontsov scratch = sdhci_readl(host, SDHCI_BUFFER); 3377659150cSPierre Ossman chunk = 4; 3381c6a0718SPierre Ossman } 3391c6a0718SPierre Ossman 3407659150cSPierre Ossman *buf = scratch & 0xFF; 3411c6a0718SPierre Ossman 3427659150cSPierre Ossman buf++; 3437659150cSPierre Ossman scratch >>= 8; 3447659150cSPierre Ossman chunk--; 3457659150cSPierre Ossman len--; 3467659150cSPierre Ossman } 3471c6a0718SPierre Ossman } 3481c6a0718SPierre Ossman 3497659150cSPierre Ossman sg_miter_stop(&host->sg_miter); 3507659150cSPierre Ossman 3517659150cSPierre Ossman local_irq_restore(flags); 3521c6a0718SPierre Ossman } 3531c6a0718SPierre Ossman 3541c6a0718SPierre Ossman static void sdhci_write_block_pio(struct sdhci_host *host) 3551c6a0718SPierre Ossman { 3567659150cSPierre Ossman unsigned long flags; 3577659150cSPierre Ossman size_t blksize, len, chunk; 3587659150cSPierre Ossman u32 scratch; 3597659150cSPierre Ossman u8 *buf; 3601c6a0718SPierre Ossman 3611c6a0718SPierre Ossman DBG("PIO writing\n"); 3621c6a0718SPierre Ossman 3631c6a0718SPierre Ossman blksize = host->data->blksz; 3647659150cSPierre Ossman chunk = 0; 3657659150cSPierre Ossman scratch = 0; 3661c6a0718SPierre Ossman 3677659150cSPierre Ossman local_irq_save(flags); 3681c6a0718SPierre Ossman 3691c6a0718SPierre Ossman while (blksize) { 3707659150cSPierre Ossman if (!sg_miter_next(&host->sg_miter)) 3717659150cSPierre Ossman BUG(); 3721c6a0718SPierre Ossman 3737659150cSPierre Ossman len = min(host->sg_miter.length, blksize); 3741c6a0718SPierre Ossman 3757659150cSPierre Ossman blksize -= len; 3767659150cSPierre Ossman host->sg_miter.consumed = len; 3777659150cSPierre Ossman 3787659150cSPierre Ossman buf = host->sg_miter.addr; 3797659150cSPierre Ossman 3807659150cSPierre Ossman while (len) { 3817659150cSPierre Ossman scratch |= (u32)*buf << (chunk * 8); 3827659150cSPierre Ossman 3837659150cSPierre Ossman buf++; 3847659150cSPierre Ossman chunk++; 3857659150cSPierre Ossman len--; 3867659150cSPierre Ossman 3877659150cSPierre Ossman if ((chunk == 4) || ((len == 0) && (blksize == 0))) { 3884e4141a5SAnton Vorontsov sdhci_writel(host, scratch, SDHCI_BUFFER); 3897659150cSPierre Ossman chunk = 0; 3907659150cSPierre Ossman scratch = 0; 3917659150cSPierre Ossman } 3927659150cSPierre Ossman } 3931c6a0718SPierre Ossman } 3941c6a0718SPierre Ossman 3957659150cSPierre Ossman sg_miter_stop(&host->sg_miter); 3961c6a0718SPierre Ossman 3977659150cSPierre Ossman local_irq_restore(flags); 3981c6a0718SPierre Ossman } 3991c6a0718SPierre Ossman 4001c6a0718SPierre Ossman static void sdhci_transfer_pio(struct sdhci_host *host) 4011c6a0718SPierre Ossman { 4021c6a0718SPierre Ossman u32 mask; 4031c6a0718SPierre Ossman 4041c6a0718SPierre Ossman BUG_ON(!host->data); 4051c6a0718SPierre Ossman 4067659150cSPierre Ossman if (host->blocks == 0) 4071c6a0718SPierre Ossman return; 4081c6a0718SPierre Ossman 4091c6a0718SPierre Ossman if (host->data->flags & MMC_DATA_READ) 4101c6a0718SPierre Ossman mask = SDHCI_DATA_AVAILABLE; 4111c6a0718SPierre Ossman else 4121c6a0718SPierre Ossman mask = SDHCI_SPACE_AVAILABLE; 4131c6a0718SPierre Ossman 4144a3cba32SPierre Ossman /* 4154a3cba32SPierre Ossman * Some controllers (JMicron JMB38x) mess up the buffer bits 4164a3cba32SPierre Ossman * for transfers < 4 bytes. As long as it is just one block, 4174a3cba32SPierre Ossman * we can ignore the bits. 4184a3cba32SPierre Ossman */ 4194a3cba32SPierre Ossman if ((host->quirks & SDHCI_QUIRK_BROKEN_SMALL_PIO) && 4204a3cba32SPierre Ossman (host->data->blocks == 1)) 4214a3cba32SPierre Ossman mask = ~0; 4224a3cba32SPierre Ossman 4234e4141a5SAnton Vorontsov while (sdhci_readl(host, SDHCI_PRESENT_STATE) & mask) { 4243e3bf207SAnton Vorontsov if (host->quirks & SDHCI_QUIRK_PIO_NEEDS_DELAY) 4253e3bf207SAnton Vorontsov udelay(100); 4263e3bf207SAnton Vorontsov 4271c6a0718SPierre Ossman if (host->data->flags & MMC_DATA_READ) 4281c6a0718SPierre Ossman sdhci_read_block_pio(host); 4291c6a0718SPierre Ossman else 4301c6a0718SPierre Ossman sdhci_write_block_pio(host); 4311c6a0718SPierre Ossman 4327659150cSPierre Ossman host->blocks--; 4337659150cSPierre Ossman if (host->blocks == 0) 4341c6a0718SPierre Ossman break; 4351c6a0718SPierre Ossman } 4361c6a0718SPierre Ossman 4371c6a0718SPierre Ossman DBG("PIO transfer complete.\n"); 4381c6a0718SPierre Ossman } 4391c6a0718SPierre Ossman 4402134a922SPierre Ossman static char *sdhci_kmap_atomic(struct scatterlist *sg, unsigned long *flags) 4412134a922SPierre Ossman { 4422134a922SPierre Ossman local_irq_save(*flags); 443482fce99SCong Wang return kmap_atomic(sg_page(sg)) + sg->offset; 4442134a922SPierre Ossman } 4452134a922SPierre Ossman 4462134a922SPierre Ossman static void sdhci_kunmap_atomic(void *buffer, unsigned long *flags) 4472134a922SPierre Ossman { 448482fce99SCong Wang kunmap_atomic(buffer); 4492134a922SPierre Ossman local_irq_restore(*flags); 4502134a922SPierre Ossman } 4512134a922SPierre Ossman 452118cd17dSBen Dooks static void sdhci_set_adma_desc(u8 *desc, u32 addr, int len, unsigned cmd) 453118cd17dSBen Dooks { 4549e506f35SBen Dooks __le32 *dataddr = (__le32 __force *)(desc + 4); 4559e506f35SBen Dooks __le16 *cmdlen = (__le16 __force *)desc; 456118cd17dSBen Dooks 4579e506f35SBen Dooks /* SDHCI specification says ADMA descriptors should be 4 byte 4589e506f35SBen Dooks * aligned, so using 16 or 32bit operations should be safe. */ 459118cd17dSBen Dooks 4609e506f35SBen Dooks cmdlen[0] = cpu_to_le16(cmd); 4619e506f35SBen Dooks cmdlen[1] = cpu_to_le16(len); 4629e506f35SBen Dooks 4639e506f35SBen Dooks dataddr[0] = cpu_to_le32(addr); 464118cd17dSBen Dooks } 465118cd17dSBen Dooks 4668f1934ceSPierre Ossman static int sdhci_adma_table_pre(struct sdhci_host *host, 4672134a922SPierre Ossman struct mmc_data *data) 4682134a922SPierre Ossman { 4692134a922SPierre Ossman int direction; 4702134a922SPierre Ossman 4712134a922SPierre Ossman u8 *desc; 4722134a922SPierre Ossman u8 *align; 4732134a922SPierre Ossman dma_addr_t addr; 4742134a922SPierre Ossman dma_addr_t align_addr; 4752134a922SPierre Ossman int len, offset; 4762134a922SPierre Ossman 4772134a922SPierre Ossman struct scatterlist *sg; 4782134a922SPierre Ossman int i; 4792134a922SPierre Ossman char *buffer; 4802134a922SPierre Ossman unsigned long flags; 4812134a922SPierre Ossman 4822134a922SPierre Ossman /* 4832134a922SPierre Ossman * The spec does not specify endianness of descriptor table. 4842134a922SPierre Ossman * We currently guess that it is LE. 4852134a922SPierre Ossman */ 4862134a922SPierre Ossman 4872134a922SPierre Ossman if (data->flags & MMC_DATA_READ) 4882134a922SPierre Ossman direction = DMA_FROM_DEVICE; 4892134a922SPierre Ossman else 4902134a922SPierre Ossman direction = DMA_TO_DEVICE; 4912134a922SPierre Ossman 4922134a922SPierre Ossman /* 4932134a922SPierre Ossman * The ADMA descriptor table is mapped further down as we 4942134a922SPierre Ossman * need to fill it with data first. 4952134a922SPierre Ossman */ 4962134a922SPierre Ossman 4972134a922SPierre Ossman host->align_addr = dma_map_single(mmc_dev(host->mmc), 4982134a922SPierre Ossman host->align_buffer, 128 * 4, direction); 4998d8bb39bSFUJITA Tomonori if (dma_mapping_error(mmc_dev(host->mmc), host->align_addr)) 5008f1934ceSPierre Ossman goto fail; 5012134a922SPierre Ossman BUG_ON(host->align_addr & 0x3); 5022134a922SPierre Ossman 5032134a922SPierre Ossman host->sg_count = dma_map_sg(mmc_dev(host->mmc), 5042134a922SPierre Ossman data->sg, data->sg_len, direction); 5058f1934ceSPierre Ossman if (host->sg_count == 0) 5068f1934ceSPierre Ossman goto unmap_align; 5072134a922SPierre Ossman 5082134a922SPierre Ossman desc = host->adma_desc; 5092134a922SPierre Ossman align = host->align_buffer; 5102134a922SPierre Ossman 5112134a922SPierre Ossman align_addr = host->align_addr; 5122134a922SPierre Ossman 5132134a922SPierre Ossman for_each_sg(data->sg, sg, host->sg_count, i) { 5142134a922SPierre Ossman addr = sg_dma_address(sg); 5152134a922SPierre Ossman len = sg_dma_len(sg); 5162134a922SPierre Ossman 5172134a922SPierre Ossman /* 5182134a922SPierre Ossman * The SDHCI specification states that ADMA 5192134a922SPierre Ossman * addresses must be 32-bit aligned. If they 5202134a922SPierre Ossman * aren't, then we use a bounce buffer for 5212134a922SPierre Ossman * the (up to three) bytes that screw up the 5222134a922SPierre Ossman * alignment. 5232134a922SPierre Ossman */ 5242134a922SPierre Ossman offset = (4 - (addr & 0x3)) & 0x3; 5252134a922SPierre Ossman if (offset) { 5262134a922SPierre Ossman if (data->flags & MMC_DATA_WRITE) { 5272134a922SPierre Ossman buffer = sdhci_kmap_atomic(sg, &flags); 5286cefd05fSPierre Ossman WARN_ON(((long)buffer & PAGE_MASK) > (PAGE_SIZE - 3)); 5292134a922SPierre Ossman memcpy(align, buffer, offset); 5302134a922SPierre Ossman sdhci_kunmap_atomic(buffer, &flags); 5312134a922SPierre Ossman } 5322134a922SPierre Ossman 533118cd17dSBen Dooks /* tran, valid */ 534118cd17dSBen Dooks sdhci_set_adma_desc(desc, align_addr, offset, 0x21); 5352134a922SPierre Ossman 5362134a922SPierre Ossman BUG_ON(offset > 65536); 5372134a922SPierre Ossman 5382134a922SPierre Ossman align += 4; 5392134a922SPierre Ossman align_addr += 4; 5402134a922SPierre Ossman 5412134a922SPierre Ossman desc += 8; 5422134a922SPierre Ossman 5432134a922SPierre Ossman addr += offset; 5442134a922SPierre Ossman len -= offset; 5452134a922SPierre Ossman } 5462134a922SPierre Ossman 5472134a922SPierre Ossman BUG_ON(len > 65536); 5482134a922SPierre Ossman 549118cd17dSBen Dooks /* tran, valid */ 550118cd17dSBen Dooks sdhci_set_adma_desc(desc, addr, len, 0x21); 5512134a922SPierre Ossman desc += 8; 5522134a922SPierre Ossman 5532134a922SPierre Ossman /* 5542134a922SPierre Ossman * If this triggers then we have a calculation bug 5552134a922SPierre Ossman * somewhere. :/ 5562134a922SPierre Ossman */ 5572134a922SPierre Ossman WARN_ON((desc - host->adma_desc) > (128 * 2 + 1) * 4); 5582134a922SPierre Ossman } 5592134a922SPierre Ossman 56070764a90SThomas Abraham if (host->quirks & SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC) { 56170764a90SThomas Abraham /* 56270764a90SThomas Abraham * Mark the last descriptor as the terminating descriptor 56370764a90SThomas Abraham */ 56470764a90SThomas Abraham if (desc != host->adma_desc) { 56570764a90SThomas Abraham desc -= 8; 56670764a90SThomas Abraham desc[0] |= 0x2; /* end */ 56770764a90SThomas Abraham } 56870764a90SThomas Abraham } else { 5692134a922SPierre Ossman /* 5702134a922SPierre Ossman * Add a terminating entry. 5712134a922SPierre Ossman */ 5722134a922SPierre Ossman 573118cd17dSBen Dooks /* nop, end, valid */ 574118cd17dSBen Dooks sdhci_set_adma_desc(desc, 0, 0, 0x3); 57570764a90SThomas Abraham } 5762134a922SPierre Ossman 5772134a922SPierre Ossman /* 5782134a922SPierre Ossman * Resync align buffer as we might have changed it. 5792134a922SPierre Ossman */ 5802134a922SPierre Ossman if (data->flags & MMC_DATA_WRITE) { 5812134a922SPierre Ossman dma_sync_single_for_device(mmc_dev(host->mmc), 5822134a922SPierre Ossman host->align_addr, 128 * 4, direction); 5832134a922SPierre Ossman } 5842134a922SPierre Ossman 5852134a922SPierre Ossman host->adma_addr = dma_map_single(mmc_dev(host->mmc), 5862134a922SPierre Ossman host->adma_desc, (128 * 2 + 1) * 4, DMA_TO_DEVICE); 587980167b7SPierre Ossman if (dma_mapping_error(mmc_dev(host->mmc), host->adma_addr)) 5888f1934ceSPierre Ossman goto unmap_entries; 5892134a922SPierre Ossman BUG_ON(host->adma_addr & 0x3); 5908f1934ceSPierre Ossman 5918f1934ceSPierre Ossman return 0; 5928f1934ceSPierre Ossman 5938f1934ceSPierre Ossman unmap_entries: 5948f1934ceSPierre Ossman dma_unmap_sg(mmc_dev(host->mmc), data->sg, 5958f1934ceSPierre Ossman data->sg_len, direction); 5968f1934ceSPierre Ossman unmap_align: 5978f1934ceSPierre Ossman dma_unmap_single(mmc_dev(host->mmc), host->align_addr, 5988f1934ceSPierre Ossman 128 * 4, direction); 5998f1934ceSPierre Ossman fail: 6008f1934ceSPierre Ossman return -EINVAL; 6012134a922SPierre Ossman } 6022134a922SPierre Ossman 6032134a922SPierre Ossman static void sdhci_adma_table_post(struct sdhci_host *host, 6042134a922SPierre Ossman struct mmc_data *data) 6052134a922SPierre Ossman { 6062134a922SPierre Ossman int direction; 6072134a922SPierre Ossman 6082134a922SPierre Ossman struct scatterlist *sg; 6092134a922SPierre Ossman int i, size; 6102134a922SPierre Ossman u8 *align; 6112134a922SPierre Ossman char *buffer; 6122134a922SPierre Ossman unsigned long flags; 6132134a922SPierre Ossman 6142134a922SPierre Ossman if (data->flags & MMC_DATA_READ) 6152134a922SPierre Ossman direction = DMA_FROM_DEVICE; 6162134a922SPierre Ossman else 6172134a922SPierre Ossman direction = DMA_TO_DEVICE; 6182134a922SPierre Ossman 6192134a922SPierre Ossman dma_unmap_single(mmc_dev(host->mmc), host->adma_addr, 6202134a922SPierre Ossman (128 * 2 + 1) * 4, DMA_TO_DEVICE); 6212134a922SPierre Ossman 6222134a922SPierre Ossman dma_unmap_single(mmc_dev(host->mmc), host->align_addr, 6232134a922SPierre Ossman 128 * 4, direction); 6242134a922SPierre Ossman 6252134a922SPierre Ossman if (data->flags & MMC_DATA_READ) { 6262134a922SPierre Ossman dma_sync_sg_for_cpu(mmc_dev(host->mmc), data->sg, 6272134a922SPierre Ossman data->sg_len, direction); 6282134a922SPierre Ossman 6292134a922SPierre Ossman align = host->align_buffer; 6302134a922SPierre Ossman 6312134a922SPierre Ossman for_each_sg(data->sg, sg, host->sg_count, i) { 6322134a922SPierre Ossman if (sg_dma_address(sg) & 0x3) { 6332134a922SPierre Ossman size = 4 - (sg_dma_address(sg) & 0x3); 6342134a922SPierre Ossman 6352134a922SPierre Ossman buffer = sdhci_kmap_atomic(sg, &flags); 6366cefd05fSPierre Ossman WARN_ON(((long)buffer & PAGE_MASK) > (PAGE_SIZE - 3)); 6372134a922SPierre Ossman memcpy(buffer, align, size); 6382134a922SPierre Ossman sdhci_kunmap_atomic(buffer, &flags); 6392134a922SPierre Ossman 6402134a922SPierre Ossman align += 4; 6412134a922SPierre Ossman } 6422134a922SPierre Ossman } 6432134a922SPierre Ossman } 6442134a922SPierre Ossman 6452134a922SPierre Ossman dma_unmap_sg(mmc_dev(host->mmc), data->sg, 6462134a922SPierre Ossman data->sg_len, direction); 6472134a922SPierre Ossman } 6482134a922SPierre Ossman 649a3c7778fSAndrei Warkentin static u8 sdhci_calc_timeout(struct sdhci_host *host, struct mmc_command *cmd) 6501c6a0718SPierre Ossman { 6511c6a0718SPierre Ossman u8 count; 652a3c7778fSAndrei Warkentin struct mmc_data *data = cmd->data; 6531c6a0718SPierre Ossman unsigned target_timeout, current_timeout; 6541c6a0718SPierre Ossman 655ee53ab5dSPierre Ossman /* 656ee53ab5dSPierre Ossman * If the host controller provides us with an incorrect timeout 657ee53ab5dSPierre Ossman * value, just skip the check and use 0xE. The hardware may take 658ee53ab5dSPierre Ossman * longer to time out, but that's much better than having a too-short 659ee53ab5dSPierre Ossman * timeout value. 660ee53ab5dSPierre Ossman */ 66111a2f1b7SPierre Ossman if (host->quirks & SDHCI_QUIRK_BROKEN_TIMEOUT_VAL) 662ee53ab5dSPierre Ossman return 0xE; 663e538fbe8SPierre Ossman 664a3c7778fSAndrei Warkentin /* Unspecified timeout, assume max */ 665a3c7778fSAndrei Warkentin if (!data && !cmd->cmd_timeout_ms) 666a3c7778fSAndrei Warkentin return 0xE; 667a3c7778fSAndrei Warkentin 6681c6a0718SPierre Ossman /* timeout in us */ 669a3c7778fSAndrei Warkentin if (!data) 670a3c7778fSAndrei Warkentin target_timeout = cmd->cmd_timeout_ms * 1000; 67178a2ca27SAndy Shevchenko else { 67278a2ca27SAndy Shevchenko target_timeout = data->timeout_ns / 1000; 67378a2ca27SAndy Shevchenko if (host->clock) 67478a2ca27SAndy Shevchenko target_timeout += data->timeout_clks / host->clock; 67578a2ca27SAndy Shevchenko } 6761c6a0718SPierre Ossman 6771c6a0718SPierre Ossman /* 6781c6a0718SPierre Ossman * Figure out needed cycles. 6791c6a0718SPierre Ossman * We do this in steps in order to fit inside a 32 bit int. 6801c6a0718SPierre Ossman * The first step is the minimum timeout, which will have a 6811c6a0718SPierre Ossman * minimum resolution of 6 bits: 6821c6a0718SPierre Ossman * (1) 2^13*1000 > 2^22, 6831c6a0718SPierre Ossman * (2) host->timeout_clk < 2^16 6841c6a0718SPierre Ossman * => 6851c6a0718SPierre Ossman * (1) / (2) > 2^6 6861c6a0718SPierre Ossman */ 6871c6a0718SPierre Ossman count = 0; 6881c6a0718SPierre Ossman current_timeout = (1 << 13) * 1000 / host->timeout_clk; 6891c6a0718SPierre Ossman while (current_timeout < target_timeout) { 6901c6a0718SPierre Ossman count++; 6911c6a0718SPierre Ossman current_timeout <<= 1; 6921c6a0718SPierre Ossman if (count >= 0xF) 6931c6a0718SPierre Ossman break; 6941c6a0718SPierre Ossman } 6951c6a0718SPierre Ossman 6961c6a0718SPierre Ossman if (count >= 0xF) { 69709eeff52SChris Ball DBG("%s: Too large timeout 0x%x requested for CMD%d!\n", 69802145977SMark Brown mmc_hostname(host->mmc), count, cmd->opcode); 6991c6a0718SPierre Ossman count = 0xE; 7001c6a0718SPierre Ossman } 7011c6a0718SPierre Ossman 702ee53ab5dSPierre Ossman return count; 703ee53ab5dSPierre Ossman } 704ee53ab5dSPierre Ossman 7056aa943abSAnton Vorontsov static void sdhci_set_transfer_irqs(struct sdhci_host *host) 7066aa943abSAnton Vorontsov { 7076aa943abSAnton Vorontsov u32 pio_irqs = SDHCI_INT_DATA_AVAIL | SDHCI_INT_SPACE_AVAIL; 7086aa943abSAnton Vorontsov u32 dma_irqs = SDHCI_INT_DMA_END | SDHCI_INT_ADMA_ERROR; 7096aa943abSAnton Vorontsov 7106aa943abSAnton Vorontsov if (host->flags & SDHCI_REQ_USE_DMA) 7116aa943abSAnton Vorontsov sdhci_clear_set_irqs(host, pio_irqs, dma_irqs); 7126aa943abSAnton Vorontsov else 7136aa943abSAnton Vorontsov sdhci_clear_set_irqs(host, dma_irqs, pio_irqs); 7146aa943abSAnton Vorontsov } 7156aa943abSAnton Vorontsov 716a3c7778fSAndrei Warkentin static void sdhci_prepare_data(struct sdhci_host *host, struct mmc_command *cmd) 717ee53ab5dSPierre Ossman { 718ee53ab5dSPierre Ossman u8 count; 7192134a922SPierre Ossman u8 ctrl; 720a3c7778fSAndrei Warkentin struct mmc_data *data = cmd->data; 7218f1934ceSPierre Ossman int ret; 722ee53ab5dSPierre Ossman 723ee53ab5dSPierre Ossman WARN_ON(host->data); 724ee53ab5dSPierre Ossman 725a3c7778fSAndrei Warkentin if (data || (cmd->flags & MMC_RSP_BUSY)) { 726a3c7778fSAndrei Warkentin count = sdhci_calc_timeout(host, cmd); 727a3c7778fSAndrei Warkentin sdhci_writeb(host, count, SDHCI_TIMEOUT_CONTROL); 728a3c7778fSAndrei Warkentin } 729a3c7778fSAndrei Warkentin 730a3c7778fSAndrei Warkentin if (!data) 731ee53ab5dSPierre Ossman return; 732ee53ab5dSPierre Ossman 733ee53ab5dSPierre Ossman /* Sanity checks */ 734ee53ab5dSPierre Ossman BUG_ON(data->blksz * data->blocks > 524288); 735ee53ab5dSPierre Ossman BUG_ON(data->blksz > host->mmc->max_blk_size); 736ee53ab5dSPierre Ossman BUG_ON(data->blocks > 65535); 737ee53ab5dSPierre Ossman 738ee53ab5dSPierre Ossman host->data = data; 739ee53ab5dSPierre Ossman host->data_early = 0; 740f6a03cbfSMikko Vinni host->data->bytes_xfered = 0; 741ee53ab5dSPierre Ossman 742a13abc7bSRichard Röjfors if (host->flags & (SDHCI_USE_SDMA | SDHCI_USE_ADMA)) 743c9fddbc4SPierre Ossman host->flags |= SDHCI_REQ_USE_DMA; 744c9fddbc4SPierre Ossman 7452134a922SPierre Ossman /* 7462134a922SPierre Ossman * FIXME: This doesn't account for merging when mapping the 7472134a922SPierre Ossman * scatterlist. 7482134a922SPierre Ossman */ 7492134a922SPierre Ossman if (host->flags & SDHCI_REQ_USE_DMA) { 7502134a922SPierre Ossman int broken, i; 7512134a922SPierre Ossman struct scatterlist *sg; 7522134a922SPierre Ossman 7532134a922SPierre Ossman broken = 0; 7542134a922SPierre Ossman if (host->flags & SDHCI_USE_ADMA) { 7552134a922SPierre Ossman if (host->quirks & SDHCI_QUIRK_32BIT_ADMA_SIZE) 7562134a922SPierre Ossman broken = 1; 7572134a922SPierre Ossman } else { 7582134a922SPierre Ossman if (host->quirks & SDHCI_QUIRK_32BIT_DMA_SIZE) 7592134a922SPierre Ossman broken = 1; 7602134a922SPierre Ossman } 7612134a922SPierre Ossman 7622134a922SPierre Ossman if (unlikely(broken)) { 7632134a922SPierre Ossman for_each_sg(data->sg, sg, data->sg_len, i) { 7642134a922SPierre Ossman if (sg->length & 0x3) { 7652134a922SPierre Ossman DBG("Reverting to PIO because of " 7662134a922SPierre Ossman "transfer size (%d)\n", 7672134a922SPierre Ossman sg->length); 768c9fddbc4SPierre Ossman host->flags &= ~SDHCI_REQ_USE_DMA; 7692134a922SPierre Ossman break; 7702134a922SPierre Ossman } 7712134a922SPierre Ossman } 7722134a922SPierre Ossman } 773c9fddbc4SPierre Ossman } 774c9fddbc4SPierre Ossman 775c9fddbc4SPierre Ossman /* 776c9fddbc4SPierre Ossman * The assumption here being that alignment is the same after 777c9fddbc4SPierre Ossman * translation to device address space. 778c9fddbc4SPierre Ossman */ 7792134a922SPierre Ossman if (host->flags & SDHCI_REQ_USE_DMA) { 7802134a922SPierre Ossman int broken, i; 7812134a922SPierre Ossman struct scatterlist *sg; 7822134a922SPierre Ossman 7832134a922SPierre Ossman broken = 0; 7842134a922SPierre Ossman if (host->flags & SDHCI_USE_ADMA) { 7852134a922SPierre Ossman /* 7862134a922SPierre Ossman * As we use 3 byte chunks to work around 7872134a922SPierre Ossman * alignment problems, we need to check this 7882134a922SPierre Ossman * quirk. 7892134a922SPierre Ossman */ 7902134a922SPierre Ossman if (host->quirks & SDHCI_QUIRK_32BIT_ADMA_SIZE) 7912134a922SPierre Ossman broken = 1; 7922134a922SPierre Ossman } else { 7932134a922SPierre Ossman if (host->quirks & SDHCI_QUIRK_32BIT_DMA_ADDR) 7942134a922SPierre Ossman broken = 1; 7952134a922SPierre Ossman } 7962134a922SPierre Ossman 7972134a922SPierre Ossman if (unlikely(broken)) { 7982134a922SPierre Ossman for_each_sg(data->sg, sg, data->sg_len, i) { 7992134a922SPierre Ossman if (sg->offset & 0x3) { 8002134a922SPierre Ossman DBG("Reverting to PIO because of " 8012134a922SPierre Ossman "bad alignment\n"); 802c9fddbc4SPierre Ossman host->flags &= ~SDHCI_REQ_USE_DMA; 8032134a922SPierre Ossman break; 8042134a922SPierre Ossman } 8052134a922SPierre Ossman } 8062134a922SPierre Ossman } 8072134a922SPierre Ossman } 8082134a922SPierre Ossman 8098f1934ceSPierre Ossman if (host->flags & SDHCI_REQ_USE_DMA) { 8108f1934ceSPierre Ossman if (host->flags & SDHCI_USE_ADMA) { 8118f1934ceSPierre Ossman ret = sdhci_adma_table_pre(host, data); 8128f1934ceSPierre Ossman if (ret) { 8138f1934ceSPierre Ossman /* 8148f1934ceSPierre Ossman * This only happens when someone fed 8158f1934ceSPierre Ossman * us an invalid request. 8168f1934ceSPierre Ossman */ 8178f1934ceSPierre Ossman WARN_ON(1); 818ebd6d357SPierre Ossman host->flags &= ~SDHCI_REQ_USE_DMA; 8198f1934ceSPierre Ossman } else { 8204e4141a5SAnton Vorontsov sdhci_writel(host, host->adma_addr, 8214e4141a5SAnton Vorontsov SDHCI_ADMA_ADDRESS); 8228f1934ceSPierre Ossman } 8238f1934ceSPierre Ossman } else { 824c8b3e02eSTomas Winkler int sg_cnt; 8258f1934ceSPierre Ossman 826c8b3e02eSTomas Winkler sg_cnt = dma_map_sg(mmc_dev(host->mmc), 8278f1934ceSPierre Ossman data->sg, data->sg_len, 8288f1934ceSPierre Ossman (data->flags & MMC_DATA_READ) ? 8298f1934ceSPierre Ossman DMA_FROM_DEVICE : 8308f1934ceSPierre Ossman DMA_TO_DEVICE); 831c8b3e02eSTomas Winkler if (sg_cnt == 0) { 8328f1934ceSPierre Ossman /* 8338f1934ceSPierre Ossman * This only happens when someone fed 8348f1934ceSPierre Ossman * us an invalid request. 8358f1934ceSPierre Ossman */ 8368f1934ceSPierre Ossman WARN_ON(1); 837ebd6d357SPierre Ossman host->flags &= ~SDHCI_REQ_USE_DMA; 8388f1934ceSPierre Ossman } else { 839719a61b4SPierre Ossman WARN_ON(sg_cnt != 1); 8404e4141a5SAnton Vorontsov sdhci_writel(host, sg_dma_address(data->sg), 8414e4141a5SAnton Vorontsov SDHCI_DMA_ADDRESS); 8428f1934ceSPierre Ossman } 8438f1934ceSPierre Ossman } 8448f1934ceSPierre Ossman } 8458f1934ceSPierre Ossman 8462134a922SPierre Ossman /* 8472134a922SPierre Ossman * Always adjust the DMA selection as some controllers 8482134a922SPierre Ossman * (e.g. JMicron) can't do PIO properly when the selection 8492134a922SPierre Ossman * is ADMA. 8502134a922SPierre Ossman */ 8512134a922SPierre Ossman if (host->version >= SDHCI_SPEC_200) { 8524e4141a5SAnton Vorontsov ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL); 8532134a922SPierre Ossman ctrl &= ~SDHCI_CTRL_DMA_MASK; 8542134a922SPierre Ossman if ((host->flags & SDHCI_REQ_USE_DMA) && 8552134a922SPierre Ossman (host->flags & SDHCI_USE_ADMA)) 8562134a922SPierre Ossman ctrl |= SDHCI_CTRL_ADMA32; 8572134a922SPierre Ossman else 8582134a922SPierre Ossman ctrl |= SDHCI_CTRL_SDMA; 8594e4141a5SAnton Vorontsov sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL); 860c9fddbc4SPierre Ossman } 861c9fddbc4SPierre Ossman 8628f1934ceSPierre Ossman if (!(host->flags & SDHCI_REQ_USE_DMA)) { 863da60a91dSSebastian Andrzej Siewior int flags; 864da60a91dSSebastian Andrzej Siewior 865da60a91dSSebastian Andrzej Siewior flags = SG_MITER_ATOMIC; 866da60a91dSSebastian Andrzej Siewior if (host->data->flags & MMC_DATA_READ) 867da60a91dSSebastian Andrzej Siewior flags |= SG_MITER_TO_SG; 868da60a91dSSebastian Andrzej Siewior else 869da60a91dSSebastian Andrzej Siewior flags |= SG_MITER_FROM_SG; 870da60a91dSSebastian Andrzej Siewior sg_miter_start(&host->sg_miter, data->sg, data->sg_len, flags); 8717659150cSPierre Ossman host->blocks = data->blocks; 8721c6a0718SPierre Ossman } 8731c6a0718SPierre Ossman 8746aa943abSAnton Vorontsov sdhci_set_transfer_irqs(host); 8756aa943abSAnton Vorontsov 876f6a03cbfSMikko Vinni /* Set the DMA boundary value and block size */ 877f6a03cbfSMikko Vinni sdhci_writew(host, SDHCI_MAKE_BLKSZ(SDHCI_DEFAULT_BOUNDARY_ARG, 878f6a03cbfSMikko Vinni data->blksz), SDHCI_BLOCK_SIZE); 8794e4141a5SAnton Vorontsov sdhci_writew(host, data->blocks, SDHCI_BLOCK_COUNT); 8801c6a0718SPierre Ossman } 8811c6a0718SPierre Ossman 8821c6a0718SPierre Ossman static void sdhci_set_transfer_mode(struct sdhci_host *host, 883e89d456fSAndrei Warkentin struct mmc_command *cmd) 8841c6a0718SPierre Ossman { 8851c6a0718SPierre Ossman u16 mode; 886e89d456fSAndrei Warkentin struct mmc_data *data = cmd->data; 8871c6a0718SPierre Ossman 8881c6a0718SPierre Ossman if (data == NULL) 8891c6a0718SPierre Ossman return; 8901c6a0718SPierre Ossman 891e538fbe8SPierre Ossman WARN_ON(!host->data); 892e538fbe8SPierre Ossman 8931c6a0718SPierre Ossman mode = SDHCI_TRNS_BLK_CNT_EN; 894e89d456fSAndrei Warkentin if (mmc_op_multi(cmd->opcode) || data->blocks > 1) { 8951c6a0718SPierre Ossman mode |= SDHCI_TRNS_MULTI; 896e89d456fSAndrei Warkentin /* 897e89d456fSAndrei Warkentin * If we are sending CMD23, CMD12 never gets sent 898e89d456fSAndrei Warkentin * on successful completion (so no Auto-CMD12). 899e89d456fSAndrei Warkentin */ 900e89d456fSAndrei Warkentin if (!host->mrq->sbc && (host->flags & SDHCI_AUTO_CMD12)) 901e89d456fSAndrei Warkentin mode |= SDHCI_TRNS_AUTO_CMD12; 9028edf6371SAndrei Warkentin else if (host->mrq->sbc && (host->flags & SDHCI_AUTO_CMD23)) { 9038edf6371SAndrei Warkentin mode |= SDHCI_TRNS_AUTO_CMD23; 9048edf6371SAndrei Warkentin sdhci_writel(host, host->mrq->sbc->arg, SDHCI_ARGUMENT2); 905c4512f79SJerry Huang } 9068edf6371SAndrei Warkentin } 9078edf6371SAndrei Warkentin 9081c6a0718SPierre Ossman if (data->flags & MMC_DATA_READ) 9091c6a0718SPierre Ossman mode |= SDHCI_TRNS_READ; 910c9fddbc4SPierre Ossman if (host->flags & SDHCI_REQ_USE_DMA) 9111c6a0718SPierre Ossman mode |= SDHCI_TRNS_DMA; 9121c6a0718SPierre Ossman 9134e4141a5SAnton Vorontsov sdhci_writew(host, mode, SDHCI_TRANSFER_MODE); 9141c6a0718SPierre Ossman } 9151c6a0718SPierre Ossman 9161c6a0718SPierre Ossman static void sdhci_finish_data(struct sdhci_host *host) 9171c6a0718SPierre Ossman { 9181c6a0718SPierre Ossman struct mmc_data *data; 9191c6a0718SPierre Ossman 9201c6a0718SPierre Ossman BUG_ON(!host->data); 9211c6a0718SPierre Ossman 9221c6a0718SPierre Ossman data = host->data; 9231c6a0718SPierre Ossman host->data = NULL; 9241c6a0718SPierre Ossman 925c9fddbc4SPierre Ossman if (host->flags & SDHCI_REQ_USE_DMA) { 9262134a922SPierre Ossman if (host->flags & SDHCI_USE_ADMA) 9272134a922SPierre Ossman sdhci_adma_table_post(host, data); 9282134a922SPierre Ossman else { 9292134a922SPierre Ossman dma_unmap_sg(mmc_dev(host->mmc), data->sg, 9302134a922SPierre Ossman data->sg_len, (data->flags & MMC_DATA_READ) ? 931b8c86fc5SPierre Ossman DMA_FROM_DEVICE : DMA_TO_DEVICE); 9321c6a0718SPierre Ossman } 9332134a922SPierre Ossman } 9341c6a0718SPierre Ossman 9351c6a0718SPierre Ossman /* 936c9b74c5bSPierre Ossman * The specification states that the block count register must 937c9b74c5bSPierre Ossman * be updated, but it does not specify at what point in the 938c9b74c5bSPierre Ossman * data flow. That makes the register entirely useless to read 939c9b74c5bSPierre Ossman * back so we have to assume that nothing made it to the card 940c9b74c5bSPierre Ossman * in the event of an error. 9411c6a0718SPierre Ossman */ 942c9b74c5bSPierre Ossman if (data->error) 943c9b74c5bSPierre Ossman data->bytes_xfered = 0; 9441c6a0718SPierre Ossman else 945c9b74c5bSPierre Ossman data->bytes_xfered = data->blksz * data->blocks; 9461c6a0718SPierre Ossman 947e89d456fSAndrei Warkentin /* 948e89d456fSAndrei Warkentin * Need to send CMD12 if - 949e89d456fSAndrei Warkentin * a) open-ended multiblock transfer (no CMD23) 950e89d456fSAndrei Warkentin * b) error in multiblock transfer 951e89d456fSAndrei Warkentin */ 952e89d456fSAndrei Warkentin if (data->stop && 953e89d456fSAndrei Warkentin (data->error || 954e89d456fSAndrei Warkentin !host->mrq->sbc)) { 955e89d456fSAndrei Warkentin 9561c6a0718SPierre Ossman /* 9571c6a0718SPierre Ossman * The controller needs a reset of internal state machines 9581c6a0718SPierre Ossman * upon error conditions. 9591c6a0718SPierre Ossman */ 96017b0429dSPierre Ossman if (data->error) { 9611c6a0718SPierre Ossman sdhci_reset(host, SDHCI_RESET_CMD); 9621c6a0718SPierre Ossman sdhci_reset(host, SDHCI_RESET_DATA); 9631c6a0718SPierre Ossman } 9641c6a0718SPierre Ossman 9651c6a0718SPierre Ossman sdhci_send_command(host, data->stop); 9661c6a0718SPierre Ossman } else 9671c6a0718SPierre Ossman tasklet_schedule(&host->finish_tasklet); 9681c6a0718SPierre Ossman } 9691c6a0718SPierre Ossman 9701c6a0718SPierre Ossman static void sdhci_send_command(struct sdhci_host *host, struct mmc_command *cmd) 9711c6a0718SPierre Ossman { 9721c6a0718SPierre Ossman int flags; 9731c6a0718SPierre Ossman u32 mask; 9741c6a0718SPierre Ossman unsigned long timeout; 9751c6a0718SPierre Ossman 9761c6a0718SPierre Ossman WARN_ON(host->cmd); 9771c6a0718SPierre Ossman 9781c6a0718SPierre Ossman /* Wait max 10 ms */ 9791c6a0718SPierre Ossman timeout = 10; 9801c6a0718SPierre Ossman 9811c6a0718SPierre Ossman mask = SDHCI_CMD_INHIBIT; 9821c6a0718SPierre Ossman if ((cmd->data != NULL) || (cmd->flags & MMC_RSP_BUSY)) 9831c6a0718SPierre Ossman mask |= SDHCI_DATA_INHIBIT; 9841c6a0718SPierre Ossman 9851c6a0718SPierre Ossman /* We shouldn't wait for data inihibit for stop commands, even 9861c6a0718SPierre Ossman though they might use busy signaling */ 9871c6a0718SPierre Ossman if (host->mrq->data && (cmd == host->mrq->data->stop)) 9881c6a0718SPierre Ossman mask &= ~SDHCI_DATA_INHIBIT; 9891c6a0718SPierre Ossman 9904e4141a5SAnton Vorontsov while (sdhci_readl(host, SDHCI_PRESENT_STATE) & mask) { 9911c6a0718SPierre Ossman if (timeout == 0) { 992a3c76eb9SGirish K S pr_err("%s: Controller never released " 9931c6a0718SPierre Ossman "inhibit bit(s).\n", mmc_hostname(host->mmc)); 9941c6a0718SPierre Ossman sdhci_dumpregs(host); 99517b0429dSPierre Ossman cmd->error = -EIO; 9961c6a0718SPierre Ossman tasklet_schedule(&host->finish_tasklet); 9971c6a0718SPierre Ossman return; 9981c6a0718SPierre Ossman } 9991c6a0718SPierre Ossman timeout--; 10001c6a0718SPierre Ossman mdelay(1); 10011c6a0718SPierre Ossman } 10021c6a0718SPierre Ossman 10031c6a0718SPierre Ossman mod_timer(&host->timer, jiffies + 10 * HZ); 10041c6a0718SPierre Ossman 10051c6a0718SPierre Ossman host->cmd = cmd; 10061c6a0718SPierre Ossman 1007a3c7778fSAndrei Warkentin sdhci_prepare_data(host, cmd); 10081c6a0718SPierre Ossman 10094e4141a5SAnton Vorontsov sdhci_writel(host, cmd->arg, SDHCI_ARGUMENT); 10101c6a0718SPierre Ossman 1011e89d456fSAndrei Warkentin sdhci_set_transfer_mode(host, cmd); 10121c6a0718SPierre Ossman 10131c6a0718SPierre Ossman if ((cmd->flags & MMC_RSP_136) && (cmd->flags & MMC_RSP_BUSY)) { 1014a3c76eb9SGirish K S pr_err("%s: Unsupported response type!\n", 10151c6a0718SPierre Ossman mmc_hostname(host->mmc)); 101617b0429dSPierre Ossman cmd->error = -EINVAL; 10171c6a0718SPierre Ossman tasklet_schedule(&host->finish_tasklet); 10181c6a0718SPierre Ossman return; 10191c6a0718SPierre Ossman } 10201c6a0718SPierre Ossman 10211c6a0718SPierre Ossman if (!(cmd->flags & MMC_RSP_PRESENT)) 10221c6a0718SPierre Ossman flags = SDHCI_CMD_RESP_NONE; 10231c6a0718SPierre Ossman else if (cmd->flags & MMC_RSP_136) 10241c6a0718SPierre Ossman flags = SDHCI_CMD_RESP_LONG; 10251c6a0718SPierre Ossman else if (cmd->flags & MMC_RSP_BUSY) 10261c6a0718SPierre Ossman flags = SDHCI_CMD_RESP_SHORT_BUSY; 10271c6a0718SPierre Ossman else 10281c6a0718SPierre Ossman flags = SDHCI_CMD_RESP_SHORT; 10291c6a0718SPierre Ossman 10301c6a0718SPierre Ossman if (cmd->flags & MMC_RSP_CRC) 10311c6a0718SPierre Ossman flags |= SDHCI_CMD_CRC; 10321c6a0718SPierre Ossman if (cmd->flags & MMC_RSP_OPCODE) 10331c6a0718SPierre Ossman flags |= SDHCI_CMD_INDEX; 1034b513ea25SArindam Nath 1035b513ea25SArindam Nath /* CMD19 is special in that the Data Present Select should be set */ 1036069c9f14SGirish K S if (cmd->data || cmd->opcode == MMC_SEND_TUNING_BLOCK || 1037069c9f14SGirish K S cmd->opcode == MMC_SEND_TUNING_BLOCK_HS200) 10381c6a0718SPierre Ossman flags |= SDHCI_CMD_DATA; 10391c6a0718SPierre Ossman 10404e4141a5SAnton Vorontsov sdhci_writew(host, SDHCI_MAKE_CMD(cmd->opcode, flags), SDHCI_COMMAND); 10411c6a0718SPierre Ossman } 10421c6a0718SPierre Ossman 10431c6a0718SPierre Ossman static void sdhci_finish_command(struct sdhci_host *host) 10441c6a0718SPierre Ossman { 10451c6a0718SPierre Ossman int i; 10461c6a0718SPierre Ossman 10471c6a0718SPierre Ossman BUG_ON(host->cmd == NULL); 10481c6a0718SPierre Ossman 10491c6a0718SPierre Ossman if (host->cmd->flags & MMC_RSP_PRESENT) { 10501c6a0718SPierre Ossman if (host->cmd->flags & MMC_RSP_136) { 10511c6a0718SPierre Ossman /* CRC is stripped so we need to do some shifting. */ 10521c6a0718SPierre Ossman for (i = 0;i < 4;i++) { 10534e4141a5SAnton Vorontsov host->cmd->resp[i] = sdhci_readl(host, 10541c6a0718SPierre Ossman SDHCI_RESPONSE + (3-i)*4) << 8; 10551c6a0718SPierre Ossman if (i != 3) 10561c6a0718SPierre Ossman host->cmd->resp[i] |= 10574e4141a5SAnton Vorontsov sdhci_readb(host, 10581c6a0718SPierre Ossman SDHCI_RESPONSE + (3-i)*4-1); 10591c6a0718SPierre Ossman } 10601c6a0718SPierre Ossman } else { 10614e4141a5SAnton Vorontsov host->cmd->resp[0] = sdhci_readl(host, SDHCI_RESPONSE); 10621c6a0718SPierre Ossman } 10631c6a0718SPierre Ossman } 10641c6a0718SPierre Ossman 106517b0429dSPierre Ossman host->cmd->error = 0; 10661c6a0718SPierre Ossman 1067e89d456fSAndrei Warkentin /* Finished CMD23, now send actual command. */ 1068e89d456fSAndrei Warkentin if (host->cmd == host->mrq->sbc) { 1069e89d456fSAndrei Warkentin host->cmd = NULL; 1070e89d456fSAndrei Warkentin sdhci_send_command(host, host->mrq->cmd); 1071e89d456fSAndrei Warkentin } else { 1072e89d456fSAndrei Warkentin 1073e89d456fSAndrei Warkentin /* Processed actual command. */ 1074e538fbe8SPierre Ossman if (host->data && host->data_early) 1075e538fbe8SPierre Ossman sdhci_finish_data(host); 1076e538fbe8SPierre Ossman 1077e538fbe8SPierre Ossman if (!host->cmd->data) 10781c6a0718SPierre Ossman tasklet_schedule(&host->finish_tasklet); 10791c6a0718SPierre Ossman 10801c6a0718SPierre Ossman host->cmd = NULL; 10811c6a0718SPierre Ossman } 1082e89d456fSAndrei Warkentin } 10831c6a0718SPierre Ossman 10841c6a0718SPierre Ossman static void sdhci_set_clock(struct sdhci_host *host, unsigned int clock) 10851c6a0718SPierre Ossman { 1086c3ed3877SArindam Nath int div = 0; /* Initialized for compiler warning */ 1087df16219fSGiuseppe CAVALLARO int real_div = div, clk_mul = 1; 1088c3ed3877SArindam Nath u16 clk = 0; 10891c6a0718SPierre Ossman unsigned long timeout; 10901c6a0718SPierre Ossman 109130832ab5STodd Poynor if (clock && clock == host->clock) 10921c6a0718SPierre Ossman return; 10931c6a0718SPierre Ossman 1094df16219fSGiuseppe CAVALLARO host->mmc->actual_clock = 0; 1095df16219fSGiuseppe CAVALLARO 10968114634cSAnton Vorontsov if (host->ops->set_clock) { 10978114634cSAnton Vorontsov host->ops->set_clock(host, clock); 10988114634cSAnton Vorontsov if (host->quirks & SDHCI_QUIRK_NONSTANDARD_CLOCK) 10998114634cSAnton Vorontsov return; 11008114634cSAnton Vorontsov } 11018114634cSAnton Vorontsov 11024e4141a5SAnton Vorontsov sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL); 11031c6a0718SPierre Ossman 11041c6a0718SPierre Ossman if (clock == 0) 11051c6a0718SPierre Ossman goto out; 11061c6a0718SPierre Ossman 110785105c53SZhangfei Gao if (host->version >= SDHCI_SPEC_300) { 1108c3ed3877SArindam Nath /* 1109c3ed3877SArindam Nath * Check if the Host Controller supports Programmable Clock 1110c3ed3877SArindam Nath * Mode. 1111c3ed3877SArindam Nath */ 1112c3ed3877SArindam Nath if (host->clk_mul) { 1113c3ed3877SArindam Nath u16 ctrl; 1114c3ed3877SArindam Nath 1115c3ed3877SArindam Nath /* 1116c3ed3877SArindam Nath * We need to figure out whether the Host Driver needs 1117c3ed3877SArindam Nath * to select Programmable Clock Mode, or the value can 1118c3ed3877SArindam Nath * be set automatically by the Host Controller based on 1119c3ed3877SArindam Nath * the Preset Value registers. 1120c3ed3877SArindam Nath */ 1121c3ed3877SArindam Nath ctrl = sdhci_readw(host, SDHCI_HOST_CONTROL2); 1122c3ed3877SArindam Nath if (!(ctrl & SDHCI_CTRL_PRESET_VAL_ENABLE)) { 1123c3ed3877SArindam Nath for (div = 1; div <= 1024; div++) { 1124c3ed3877SArindam Nath if (((host->max_clk * host->clk_mul) / 1125c3ed3877SArindam Nath div) <= clock) 1126c3ed3877SArindam Nath break; 1127c3ed3877SArindam Nath } 1128c3ed3877SArindam Nath /* 1129c3ed3877SArindam Nath * Set Programmable Clock Mode in the Clock 1130c3ed3877SArindam Nath * Control register. 1131c3ed3877SArindam Nath */ 1132c3ed3877SArindam Nath clk = SDHCI_PROG_CLOCK_MODE; 1133df16219fSGiuseppe CAVALLARO real_div = div; 1134df16219fSGiuseppe CAVALLARO clk_mul = host->clk_mul; 1135c3ed3877SArindam Nath div--; 1136c3ed3877SArindam Nath } 1137c3ed3877SArindam Nath } else { 113885105c53SZhangfei Gao /* Version 3.00 divisors must be a multiple of 2. */ 113985105c53SZhangfei Gao if (host->max_clk <= clock) 114085105c53SZhangfei Gao div = 1; 114185105c53SZhangfei Gao else { 1142c3ed3877SArindam Nath for (div = 2; div < SDHCI_MAX_DIV_SPEC_300; 1143c3ed3877SArindam Nath div += 2) { 114485105c53SZhangfei Gao if ((host->max_clk / div) <= clock) 114585105c53SZhangfei Gao break; 114685105c53SZhangfei Gao } 114785105c53SZhangfei Gao } 1148df16219fSGiuseppe CAVALLARO real_div = div; 1149c3ed3877SArindam Nath div >>= 1; 1150c3ed3877SArindam Nath } 115185105c53SZhangfei Gao } else { 115285105c53SZhangfei Gao /* Version 2.00 divisors must be a power of 2. */ 11530397526dSZhangfei Gao for (div = 1; div < SDHCI_MAX_DIV_SPEC_200; div *= 2) { 11541c6a0718SPierre Ossman if ((host->max_clk / div) <= clock) 11551c6a0718SPierre Ossman break; 11561c6a0718SPierre Ossman } 1157df16219fSGiuseppe CAVALLARO real_div = div; 11581c6a0718SPierre Ossman div >>= 1; 1159c3ed3877SArindam Nath } 11601c6a0718SPierre Ossman 1161df16219fSGiuseppe CAVALLARO if (real_div) 1162df16219fSGiuseppe CAVALLARO host->mmc->actual_clock = (host->max_clk * clk_mul) / real_div; 1163df16219fSGiuseppe CAVALLARO 1164c3ed3877SArindam Nath clk |= (div & SDHCI_DIV_MASK) << SDHCI_DIVIDER_SHIFT; 116585105c53SZhangfei Gao clk |= ((div & SDHCI_DIV_HI_MASK) >> SDHCI_DIV_MASK_LEN) 116685105c53SZhangfei Gao << SDHCI_DIVIDER_HI_SHIFT; 11671c6a0718SPierre Ossman clk |= SDHCI_CLOCK_INT_EN; 11684e4141a5SAnton Vorontsov sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); 11691c6a0718SPierre Ossman 117027f6cb16SChris Ball /* Wait max 20 ms */ 117127f6cb16SChris Ball timeout = 20; 11724e4141a5SAnton Vorontsov while (!((clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL)) 11731c6a0718SPierre Ossman & SDHCI_CLOCK_INT_STABLE)) { 11741c6a0718SPierre Ossman if (timeout == 0) { 1175a3c76eb9SGirish K S pr_err("%s: Internal clock never " 11761c6a0718SPierre Ossman "stabilised.\n", mmc_hostname(host->mmc)); 11771c6a0718SPierre Ossman sdhci_dumpregs(host); 11781c6a0718SPierre Ossman return; 11791c6a0718SPierre Ossman } 11801c6a0718SPierre Ossman timeout--; 11811c6a0718SPierre Ossman mdelay(1); 11821c6a0718SPierre Ossman } 11831c6a0718SPierre Ossman 11841c6a0718SPierre Ossman clk |= SDHCI_CLOCK_CARD_EN; 11854e4141a5SAnton Vorontsov sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); 11861c6a0718SPierre Ossman 11871c6a0718SPierre Ossman out: 11881c6a0718SPierre Ossman host->clock = clock; 11891c6a0718SPierre Ossman } 11901c6a0718SPierre Ossman 1191ceb6143bSAdrian Hunter static int sdhci_set_power(struct sdhci_host *host, unsigned short power) 11921c6a0718SPierre Ossman { 11938364248aSGiuseppe Cavallaro u8 pwr = 0; 11941c6a0718SPierre Ossman 11958364248aSGiuseppe Cavallaro if (power != (unsigned short)-1) { 1196ae628903SPierre Ossman switch (1 << power) { 1197ae628903SPierre Ossman case MMC_VDD_165_195: 1198ae628903SPierre Ossman pwr = SDHCI_POWER_180; 1199ae628903SPierre Ossman break; 1200ae628903SPierre Ossman case MMC_VDD_29_30: 1201ae628903SPierre Ossman case MMC_VDD_30_31: 1202ae628903SPierre Ossman pwr = SDHCI_POWER_300; 1203ae628903SPierre Ossman break; 1204ae628903SPierre Ossman case MMC_VDD_32_33: 1205ae628903SPierre Ossman case MMC_VDD_33_34: 1206ae628903SPierre Ossman pwr = SDHCI_POWER_330; 1207ae628903SPierre Ossman break; 1208ae628903SPierre Ossman default: 1209ae628903SPierre Ossman BUG(); 1210ae628903SPierre Ossman } 1211ae628903SPierre Ossman } 1212ae628903SPierre Ossman 1213ae628903SPierre Ossman if (host->pwr == pwr) 1214ceb6143bSAdrian Hunter return -1; 12151c6a0718SPierre Ossman 1216ae628903SPierre Ossman host->pwr = pwr; 1217ae628903SPierre Ossman 1218ae628903SPierre Ossman if (pwr == 0) { 12194e4141a5SAnton Vorontsov sdhci_writeb(host, 0, SDHCI_POWER_CONTROL); 1220ceb6143bSAdrian Hunter return 0; 12211c6a0718SPierre Ossman } 12221c6a0718SPierre Ossman 12231c6a0718SPierre Ossman /* 12241c6a0718SPierre Ossman * Spec says that we should clear the power reg before setting 12251c6a0718SPierre Ossman * a new value. Some controllers don't seem to like this though. 12261c6a0718SPierre Ossman */ 1227b8c86fc5SPierre Ossman if (!(host->quirks & SDHCI_QUIRK_SINGLE_POWER_WRITE)) 12284e4141a5SAnton Vorontsov sdhci_writeb(host, 0, SDHCI_POWER_CONTROL); 12291c6a0718SPierre Ossman 1230e08c1694SAndres Salomon /* 1231c71f6512SAndres Salomon * At least the Marvell CaFe chip gets confused if we set the voltage 1232e08c1694SAndres Salomon * and set turn on power at the same time, so set the voltage first. 1233e08c1694SAndres Salomon */ 123411a2f1b7SPierre Ossman if (host->quirks & SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER) 12354e4141a5SAnton Vorontsov sdhci_writeb(host, pwr, SDHCI_POWER_CONTROL); 12361c6a0718SPierre Ossman 1237ae628903SPierre Ossman pwr |= SDHCI_POWER_ON; 1238ae628903SPierre Ossman 1239ae628903SPierre Ossman sdhci_writeb(host, pwr, SDHCI_POWER_CONTROL); 1240557b0697SHarald Welte 1241557b0697SHarald Welte /* 1242557b0697SHarald Welte * Some controllers need an extra 10ms delay of 10ms before they 1243557b0697SHarald Welte * can apply clock after applying power 1244557b0697SHarald Welte */ 124511a2f1b7SPierre Ossman if (host->quirks & SDHCI_QUIRK_DELAY_AFTER_POWER) 1246557b0697SHarald Welte mdelay(10); 1247ceb6143bSAdrian Hunter 1248ceb6143bSAdrian Hunter return power; 12491c6a0718SPierre Ossman } 12501c6a0718SPierre Ossman 12511c6a0718SPierre Ossman /*****************************************************************************\ 12521c6a0718SPierre Ossman * * 12531c6a0718SPierre Ossman * MMC callbacks * 12541c6a0718SPierre Ossman * * 12551c6a0718SPierre Ossman \*****************************************************************************/ 12561c6a0718SPierre Ossman 12571c6a0718SPierre Ossman static void sdhci_request(struct mmc_host *mmc, struct mmc_request *mrq) 12581c6a0718SPierre Ossman { 12591c6a0718SPierre Ossman struct sdhci_host *host; 126068d1fb7eSAnton Vorontsov bool present; 12611c6a0718SPierre Ossman unsigned long flags; 1262473b095aSAaron Lu u32 tuning_opcode; 12631c6a0718SPierre Ossman 12641c6a0718SPierre Ossman host = mmc_priv(mmc); 12651c6a0718SPierre Ossman 126666fd8ad5SAdrian Hunter sdhci_runtime_pm_get(host); 126766fd8ad5SAdrian Hunter 12681c6a0718SPierre Ossman spin_lock_irqsave(&host->lock, flags); 12691c6a0718SPierre Ossman 12701c6a0718SPierre Ossman WARN_ON(host->mrq != NULL); 12711c6a0718SPierre Ossman 1272f9134319SPierre Ossman #ifndef SDHCI_USE_LEDS_CLASS 12731c6a0718SPierre Ossman sdhci_activate_led(host); 12742f730fecSPierre Ossman #endif 1275e89d456fSAndrei Warkentin 1276e89d456fSAndrei Warkentin /* 1277e89d456fSAndrei Warkentin * Ensure we don't send the STOP for non-SET_BLOCK_COUNTED 1278e89d456fSAndrei Warkentin * requests if Auto-CMD12 is enabled. 1279e89d456fSAndrei Warkentin */ 1280e89d456fSAndrei Warkentin if (!mrq->sbc && (host->flags & SDHCI_AUTO_CMD12)) { 1281c4512f79SJerry Huang if (mrq->stop) { 1282c4512f79SJerry Huang mrq->data->stop = NULL; 1283c4512f79SJerry Huang mrq->stop = NULL; 1284c4512f79SJerry Huang } 1285c4512f79SJerry Huang } 12861c6a0718SPierre Ossman 12871c6a0718SPierre Ossman host->mrq = mrq; 12881c6a0718SPierre Ossman 128968d1fb7eSAnton Vorontsov /* If polling, assume that the card is always present. */ 129068d1fb7eSAnton Vorontsov if (host->quirks & SDHCI_QUIRK_BROKEN_CARD_DETECTION) 129168d1fb7eSAnton Vorontsov present = true; 129268d1fb7eSAnton Vorontsov else 129368d1fb7eSAnton Vorontsov present = sdhci_readl(host, SDHCI_PRESENT_STATE) & 129468d1fb7eSAnton Vorontsov SDHCI_CARD_PRESENT; 129568d1fb7eSAnton Vorontsov 129668d1fb7eSAnton Vorontsov if (!present || host->flags & SDHCI_DEVICE_DEAD) { 129717b0429dSPierre Ossman host->mrq->cmd->error = -ENOMEDIUM; 12981c6a0718SPierre Ossman tasklet_schedule(&host->finish_tasklet); 1299cf2b5eeaSArindam Nath } else { 1300cf2b5eeaSArindam Nath u32 present_state; 1301cf2b5eeaSArindam Nath 1302cf2b5eeaSArindam Nath present_state = sdhci_readl(host, SDHCI_PRESENT_STATE); 1303cf2b5eeaSArindam Nath /* 1304cf2b5eeaSArindam Nath * Check if the re-tuning timer has already expired and there 1305cf2b5eeaSArindam Nath * is no on-going data transfer. If so, we need to execute 1306cf2b5eeaSArindam Nath * tuning procedure before sending command. 1307cf2b5eeaSArindam Nath */ 1308cf2b5eeaSArindam Nath if ((host->flags & SDHCI_NEEDS_RETUNING) && 1309cf2b5eeaSArindam Nath !(present_state & (SDHCI_DOING_WRITE | SDHCI_DOING_READ))) { 1310473b095aSAaron Lu /* eMMC uses cmd21 while sd and sdio use cmd19 */ 1311473b095aSAaron Lu tuning_opcode = mmc->card->type == MMC_TYPE_MMC ? 1312473b095aSAaron Lu MMC_SEND_TUNING_BLOCK_HS200 : 1313473b095aSAaron Lu MMC_SEND_TUNING_BLOCK; 1314cf2b5eeaSArindam Nath spin_unlock_irqrestore(&host->lock, flags); 1315473b095aSAaron Lu sdhci_execute_tuning(mmc, tuning_opcode); 1316cf2b5eeaSArindam Nath spin_lock_irqsave(&host->lock, flags); 1317cf2b5eeaSArindam Nath 1318cf2b5eeaSArindam Nath /* Restore original mmc_request structure */ 1319cf2b5eeaSArindam Nath host->mrq = mrq; 1320cf2b5eeaSArindam Nath } 1321cf2b5eeaSArindam Nath 13228edf6371SAndrei Warkentin if (mrq->sbc && !(host->flags & SDHCI_AUTO_CMD23)) 1323e89d456fSAndrei Warkentin sdhci_send_command(host, mrq->sbc); 1324e89d456fSAndrei Warkentin else 13251c6a0718SPierre Ossman sdhci_send_command(host, mrq->cmd); 1326cf2b5eeaSArindam Nath } 13271c6a0718SPierre Ossman 13281c6a0718SPierre Ossman mmiowb(); 13291c6a0718SPierre Ossman spin_unlock_irqrestore(&host->lock, flags); 13301c6a0718SPierre Ossman } 13311c6a0718SPierre Ossman 133266fd8ad5SAdrian Hunter static void sdhci_do_set_ios(struct sdhci_host *host, struct mmc_ios *ios) 13331c6a0718SPierre Ossman { 13341c6a0718SPierre Ossman unsigned long flags; 1335ceb6143bSAdrian Hunter int vdd_bit = -1; 13361c6a0718SPierre Ossman u8 ctrl; 13371c6a0718SPierre Ossman 13381c6a0718SPierre Ossman spin_lock_irqsave(&host->lock, flags); 13391c6a0718SPierre Ossman 1340ceb6143bSAdrian Hunter if (host->flags & SDHCI_DEVICE_DEAD) { 1341ceb6143bSAdrian Hunter spin_unlock_irqrestore(&host->lock, flags); 1342ceb6143bSAdrian Hunter if (host->vmmc && ios->power_mode == MMC_POWER_OFF) 1343ceb6143bSAdrian Hunter mmc_regulator_set_ocr(host->mmc, host->vmmc, 0); 1344ceb6143bSAdrian Hunter return; 1345ceb6143bSAdrian Hunter } 13461e72859eSPierre Ossman 13471c6a0718SPierre Ossman /* 13481c6a0718SPierre Ossman * Reset the chip on each power off. 13491c6a0718SPierre Ossman * Should clear out any weird states. 13501c6a0718SPierre Ossman */ 13511c6a0718SPierre Ossman if (ios->power_mode == MMC_POWER_OFF) { 13524e4141a5SAnton Vorontsov sdhci_writel(host, 0, SDHCI_SIGNAL_ENABLE); 13537260cf5eSAnton Vorontsov sdhci_reinit(host); 13541c6a0718SPierre Ossman } 13551c6a0718SPierre Ossman 13561c6a0718SPierre Ossman sdhci_set_clock(host, ios->clock); 13571c6a0718SPierre Ossman 13581c6a0718SPierre Ossman if (ios->power_mode == MMC_POWER_OFF) 1359ceb6143bSAdrian Hunter vdd_bit = sdhci_set_power(host, -1); 13601c6a0718SPierre Ossman else 1361ceb6143bSAdrian Hunter vdd_bit = sdhci_set_power(host, ios->vdd); 1362ceb6143bSAdrian Hunter 1363ceb6143bSAdrian Hunter if (host->vmmc && vdd_bit != -1) { 1364ceb6143bSAdrian Hunter spin_unlock_irqrestore(&host->lock, flags); 1365ceb6143bSAdrian Hunter mmc_regulator_set_ocr(host->mmc, host->vmmc, vdd_bit); 1366ceb6143bSAdrian Hunter spin_lock_irqsave(&host->lock, flags); 1367ceb6143bSAdrian Hunter } 13681c6a0718SPierre Ossman 1369643a81ffSPhilip Rakity if (host->ops->platform_send_init_74_clocks) 1370643a81ffSPhilip Rakity host->ops->platform_send_init_74_clocks(host, ios->power_mode); 1371643a81ffSPhilip Rakity 137215ec4461SPhilip Rakity /* 137315ec4461SPhilip Rakity * If your platform has 8-bit width support but is not a v3 controller, 137415ec4461SPhilip Rakity * or if it requires special setup code, you should implement that in 137515ec4461SPhilip Rakity * platform_8bit_width(). 137615ec4461SPhilip Rakity */ 137715ec4461SPhilip Rakity if (host->ops->platform_8bit_width) 137815ec4461SPhilip Rakity host->ops->platform_8bit_width(host, ios->bus_width); 137915ec4461SPhilip Rakity else { 13804e4141a5SAnton Vorontsov ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL); 138115ec4461SPhilip Rakity if (ios->bus_width == MMC_BUS_WIDTH_8) { 138215ec4461SPhilip Rakity ctrl &= ~SDHCI_CTRL_4BITBUS; 138315ec4461SPhilip Rakity if (host->version >= SDHCI_SPEC_300) 1384ae6d6c92SKyungmin Park ctrl |= SDHCI_CTRL_8BITBUS; 138515ec4461SPhilip Rakity } else { 138615ec4461SPhilip Rakity if (host->version >= SDHCI_SPEC_300) 1387ae6d6c92SKyungmin Park ctrl &= ~SDHCI_CTRL_8BITBUS; 13881c6a0718SPierre Ossman if (ios->bus_width == MMC_BUS_WIDTH_4) 13891c6a0718SPierre Ossman ctrl |= SDHCI_CTRL_4BITBUS; 13901c6a0718SPierre Ossman else 13911c6a0718SPierre Ossman ctrl &= ~SDHCI_CTRL_4BITBUS; 139215ec4461SPhilip Rakity } 139315ec4461SPhilip Rakity sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL); 139415ec4461SPhilip Rakity } 139515ec4461SPhilip Rakity 139615ec4461SPhilip Rakity ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL); 13971c6a0718SPierre Ossman 13983ab9c8daSPhilip Rakity if ((ios->timing == MMC_TIMING_SD_HS || 13993ab9c8daSPhilip Rakity ios->timing == MMC_TIMING_MMC_HS) 14003ab9c8daSPhilip Rakity && !(host->quirks & SDHCI_QUIRK_NO_HISPD_BIT)) 14011c6a0718SPierre Ossman ctrl |= SDHCI_CTRL_HISPD; 14021c6a0718SPierre Ossman else 14031c6a0718SPierre Ossman ctrl &= ~SDHCI_CTRL_HISPD; 14041c6a0718SPierre Ossman 1405d6d50a15SArindam Nath if (host->version >= SDHCI_SPEC_300) { 140649c468fcSArindam Nath u16 clk, ctrl_2; 140749c468fcSArindam Nath unsigned int clock; 140849c468fcSArindam Nath 140949c468fcSArindam Nath /* In case of UHS-I modes, set High Speed Enable */ 1410069c9f14SGirish K S if ((ios->timing == MMC_TIMING_MMC_HS200) || 1411069c9f14SGirish K S (ios->timing == MMC_TIMING_UHS_SDR50) || 141249c468fcSArindam Nath (ios->timing == MMC_TIMING_UHS_SDR104) || 141349c468fcSArindam Nath (ios->timing == MMC_TIMING_UHS_DDR50) || 1414dd8df17fSAlexander Elbs (ios->timing == MMC_TIMING_UHS_SDR25)) 141549c468fcSArindam Nath ctrl |= SDHCI_CTRL_HISPD; 1416d6d50a15SArindam Nath 1417d6d50a15SArindam Nath ctrl_2 = sdhci_readw(host, SDHCI_HOST_CONTROL2); 1418d6d50a15SArindam Nath if (!(ctrl_2 & SDHCI_CTRL_PRESET_VAL_ENABLE)) { 1419758535c4SArindam Nath sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL); 1420d6d50a15SArindam Nath /* 1421d6d50a15SArindam Nath * We only need to set Driver Strength if the 1422d6d50a15SArindam Nath * preset value enable is not set. 1423d6d50a15SArindam Nath */ 1424d6d50a15SArindam Nath ctrl_2 &= ~SDHCI_CTRL_DRV_TYPE_MASK; 1425d6d50a15SArindam Nath if (ios->drv_type == MMC_SET_DRIVER_TYPE_A) 1426d6d50a15SArindam Nath ctrl_2 |= SDHCI_CTRL_DRV_TYPE_A; 1427d6d50a15SArindam Nath else if (ios->drv_type == MMC_SET_DRIVER_TYPE_C) 1428d6d50a15SArindam Nath ctrl_2 |= SDHCI_CTRL_DRV_TYPE_C; 1429d6d50a15SArindam Nath 1430d6d50a15SArindam Nath sdhci_writew(host, ctrl_2, SDHCI_HOST_CONTROL2); 1431758535c4SArindam Nath } else { 1432758535c4SArindam Nath /* 1433758535c4SArindam Nath * According to SDHC Spec v3.00, if the Preset Value 1434758535c4SArindam Nath * Enable in the Host Control 2 register is set, we 1435758535c4SArindam Nath * need to reset SD Clock Enable before changing High 1436758535c4SArindam Nath * Speed Enable to avoid generating clock gliches. 1437758535c4SArindam Nath */ 1438758535c4SArindam Nath 1439758535c4SArindam Nath /* Reset SD Clock Enable */ 1440758535c4SArindam Nath clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL); 1441758535c4SArindam Nath clk &= ~SDHCI_CLOCK_CARD_EN; 1442758535c4SArindam Nath sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); 1443758535c4SArindam Nath 1444758535c4SArindam Nath sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL); 1445758535c4SArindam Nath 1446758535c4SArindam Nath /* Re-enable SD Clock */ 1447758535c4SArindam Nath clock = host->clock; 1448758535c4SArindam Nath host->clock = 0; 1449758535c4SArindam Nath sdhci_set_clock(host, clock); 1450d6d50a15SArindam Nath } 145149c468fcSArindam Nath 145249c468fcSArindam Nath 14536322cdd0SPhilip Rakity /* Reset SD Clock Enable */ 14546322cdd0SPhilip Rakity clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL); 14556322cdd0SPhilip Rakity clk &= ~SDHCI_CLOCK_CARD_EN; 14566322cdd0SPhilip Rakity sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); 14576322cdd0SPhilip Rakity 14586322cdd0SPhilip Rakity if (host->ops->set_uhs_signaling) 14596322cdd0SPhilip Rakity host->ops->set_uhs_signaling(host, ios->timing); 14606322cdd0SPhilip Rakity else { 14616322cdd0SPhilip Rakity ctrl_2 = sdhci_readw(host, SDHCI_HOST_CONTROL2); 146249c468fcSArindam Nath /* Select Bus Speed Mode for host */ 146349c468fcSArindam Nath ctrl_2 &= ~SDHCI_CTRL_UHS_MASK; 1464069c9f14SGirish K S if (ios->timing == MMC_TIMING_MMC_HS200) 1465069c9f14SGirish K S ctrl_2 |= SDHCI_CTRL_HS_SDR200; 1466069c9f14SGirish K S else if (ios->timing == MMC_TIMING_UHS_SDR12) 146749c468fcSArindam Nath ctrl_2 |= SDHCI_CTRL_UHS_SDR12; 146849c468fcSArindam Nath else if (ios->timing == MMC_TIMING_UHS_SDR25) 146949c468fcSArindam Nath ctrl_2 |= SDHCI_CTRL_UHS_SDR25; 147049c468fcSArindam Nath else if (ios->timing == MMC_TIMING_UHS_SDR50) 147149c468fcSArindam Nath ctrl_2 |= SDHCI_CTRL_UHS_SDR50; 147249c468fcSArindam Nath else if (ios->timing == MMC_TIMING_UHS_SDR104) 147349c468fcSArindam Nath ctrl_2 |= SDHCI_CTRL_UHS_SDR104; 147449c468fcSArindam Nath else if (ios->timing == MMC_TIMING_UHS_DDR50) 147549c468fcSArindam Nath ctrl_2 |= SDHCI_CTRL_UHS_DDR50; 147649c468fcSArindam Nath sdhci_writew(host, ctrl_2, SDHCI_HOST_CONTROL2); 14776322cdd0SPhilip Rakity } 147849c468fcSArindam Nath 147949c468fcSArindam Nath /* Re-enable SD Clock */ 148049c468fcSArindam Nath clock = host->clock; 148149c468fcSArindam Nath host->clock = 0; 148249c468fcSArindam Nath sdhci_set_clock(host, clock); 1483758535c4SArindam Nath } else 1484758535c4SArindam Nath sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL); 1485d6d50a15SArindam Nath 1486b8352260SLeandro Dorileo /* 1487b8352260SLeandro Dorileo * Some (ENE) controllers go apeshit on some ios operation, 1488b8352260SLeandro Dorileo * signalling timeout and CRC errors even on CMD0. Resetting 1489b8352260SLeandro Dorileo * it on each ios seems to solve the problem. 1490b8352260SLeandro Dorileo */ 1491b8c86fc5SPierre Ossman if(host->quirks & SDHCI_QUIRK_RESET_CMD_DATA_ON_IOS) 1492b8352260SLeandro Dorileo sdhci_reset(host, SDHCI_RESET_CMD | SDHCI_RESET_DATA); 1493b8352260SLeandro Dorileo 14941c6a0718SPierre Ossman mmiowb(); 14951c6a0718SPierre Ossman spin_unlock_irqrestore(&host->lock, flags); 14961c6a0718SPierre Ossman } 14971c6a0718SPierre Ossman 149866fd8ad5SAdrian Hunter static void sdhci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) 149966fd8ad5SAdrian Hunter { 150066fd8ad5SAdrian Hunter struct sdhci_host *host = mmc_priv(mmc); 150166fd8ad5SAdrian Hunter 150266fd8ad5SAdrian Hunter sdhci_runtime_pm_get(host); 150366fd8ad5SAdrian Hunter sdhci_do_set_ios(host, ios); 150466fd8ad5SAdrian Hunter sdhci_runtime_pm_put(host); 150566fd8ad5SAdrian Hunter } 150666fd8ad5SAdrian Hunter 150766fd8ad5SAdrian Hunter static int sdhci_check_ro(struct sdhci_host *host) 15081c6a0718SPierre Ossman { 15091c6a0718SPierre Ossman unsigned long flags; 15102dfb579cSWolfram Sang int is_readonly; 15111c6a0718SPierre Ossman 15121c6a0718SPierre Ossman spin_lock_irqsave(&host->lock, flags); 15131c6a0718SPierre Ossman 15141e72859eSPierre Ossman if (host->flags & SDHCI_DEVICE_DEAD) 15152dfb579cSWolfram Sang is_readonly = 0; 15162dfb579cSWolfram Sang else if (host->ops->get_ro) 15172dfb579cSWolfram Sang is_readonly = host->ops->get_ro(host); 15181e72859eSPierre Ossman else 15192dfb579cSWolfram Sang is_readonly = !(sdhci_readl(host, SDHCI_PRESENT_STATE) 15202dfb579cSWolfram Sang & SDHCI_WRITE_PROTECT); 15211c6a0718SPierre Ossman 15221c6a0718SPierre Ossman spin_unlock_irqrestore(&host->lock, flags); 15231c6a0718SPierre Ossman 15242dfb579cSWolfram Sang /* This quirk needs to be replaced by a callback-function later */ 15252dfb579cSWolfram Sang return host->quirks & SDHCI_QUIRK_INVERTED_WRITE_PROTECT ? 15262dfb579cSWolfram Sang !is_readonly : is_readonly; 15271c6a0718SPierre Ossman } 15281c6a0718SPierre Ossman 152982b0e23aSTakashi Iwai #define SAMPLE_COUNT 5 153082b0e23aSTakashi Iwai 153166fd8ad5SAdrian Hunter static int sdhci_do_get_ro(struct sdhci_host *host) 153282b0e23aSTakashi Iwai { 153382b0e23aSTakashi Iwai int i, ro_count; 153482b0e23aSTakashi Iwai 153582b0e23aSTakashi Iwai if (!(host->quirks & SDHCI_QUIRK_UNSTABLE_RO_DETECT)) 153666fd8ad5SAdrian Hunter return sdhci_check_ro(host); 153782b0e23aSTakashi Iwai 153882b0e23aSTakashi Iwai ro_count = 0; 153982b0e23aSTakashi Iwai for (i = 0; i < SAMPLE_COUNT; i++) { 154066fd8ad5SAdrian Hunter if (sdhci_check_ro(host)) { 154182b0e23aSTakashi Iwai if (++ro_count > SAMPLE_COUNT / 2) 154282b0e23aSTakashi Iwai return 1; 154382b0e23aSTakashi Iwai } 154482b0e23aSTakashi Iwai msleep(30); 154582b0e23aSTakashi Iwai } 154682b0e23aSTakashi Iwai return 0; 154782b0e23aSTakashi Iwai } 154882b0e23aSTakashi Iwai 154920758b66SAdrian Hunter static void sdhci_hw_reset(struct mmc_host *mmc) 155020758b66SAdrian Hunter { 155120758b66SAdrian Hunter struct sdhci_host *host = mmc_priv(mmc); 155220758b66SAdrian Hunter 155320758b66SAdrian Hunter if (host->ops && host->ops->hw_reset) 155420758b66SAdrian Hunter host->ops->hw_reset(host); 155520758b66SAdrian Hunter } 155620758b66SAdrian Hunter 155766fd8ad5SAdrian Hunter static int sdhci_get_ro(struct mmc_host *mmc) 1558f75979b7SPierre Ossman { 155966fd8ad5SAdrian Hunter struct sdhci_host *host = mmc_priv(mmc); 156066fd8ad5SAdrian Hunter int ret; 1561f75979b7SPierre Ossman 156266fd8ad5SAdrian Hunter sdhci_runtime_pm_get(host); 156366fd8ad5SAdrian Hunter ret = sdhci_do_get_ro(host); 156466fd8ad5SAdrian Hunter sdhci_runtime_pm_put(host); 156566fd8ad5SAdrian Hunter return ret; 156666fd8ad5SAdrian Hunter } 1567f75979b7SPierre Ossman 156866fd8ad5SAdrian Hunter static void sdhci_enable_sdio_irq_nolock(struct sdhci_host *host, int enable) 156966fd8ad5SAdrian Hunter { 15701e72859eSPierre Ossman if (host->flags & SDHCI_DEVICE_DEAD) 15711e72859eSPierre Ossman goto out; 15721e72859eSPierre Ossman 1573f75979b7SPierre Ossman if (enable) 157466fd8ad5SAdrian Hunter host->flags |= SDHCI_SDIO_IRQ_ENABLED; 157566fd8ad5SAdrian Hunter else 157666fd8ad5SAdrian Hunter host->flags &= ~SDHCI_SDIO_IRQ_ENABLED; 157766fd8ad5SAdrian Hunter 157866fd8ad5SAdrian Hunter /* SDIO IRQ will be enabled as appropriate in runtime resume */ 157966fd8ad5SAdrian Hunter if (host->runtime_suspended) 158066fd8ad5SAdrian Hunter goto out; 158166fd8ad5SAdrian Hunter 158266fd8ad5SAdrian Hunter if (enable) 15837260cf5eSAnton Vorontsov sdhci_unmask_irqs(host, SDHCI_INT_CARD_INT); 15847260cf5eSAnton Vorontsov else 15857260cf5eSAnton Vorontsov sdhci_mask_irqs(host, SDHCI_INT_CARD_INT); 15861e72859eSPierre Ossman out: 1587f75979b7SPierre Ossman mmiowb(); 158866fd8ad5SAdrian Hunter } 1589f75979b7SPierre Ossman 159066fd8ad5SAdrian Hunter static void sdhci_enable_sdio_irq(struct mmc_host *mmc, int enable) 159166fd8ad5SAdrian Hunter { 159266fd8ad5SAdrian Hunter struct sdhci_host *host = mmc_priv(mmc); 159366fd8ad5SAdrian Hunter unsigned long flags; 159466fd8ad5SAdrian Hunter 159566fd8ad5SAdrian Hunter spin_lock_irqsave(&host->lock, flags); 159666fd8ad5SAdrian Hunter sdhci_enable_sdio_irq_nolock(host, enable); 1597f75979b7SPierre Ossman spin_unlock_irqrestore(&host->lock, flags); 1598f75979b7SPierre Ossman } 1599f75979b7SPierre Ossman 1600*6231f3deSPhilip Rakity static int sdhci_do_3_3v_signal_voltage_switch(struct sdhci_host *host, 1601*6231f3deSPhilip Rakity u16 ctrl) 1602f2119df6SArindam Nath { 1603*6231f3deSPhilip Rakity int ret; 1604f2119df6SArindam Nath 1605f2119df6SArindam Nath /* Set 1.8V Signal Enable in the Host Control2 register to 0 */ 1606f2119df6SArindam Nath ctrl &= ~SDHCI_CTRL_VDD_180; 1607f2119df6SArindam Nath sdhci_writew(host, ctrl, SDHCI_HOST_CONTROL2); 1608f2119df6SArindam Nath 1609*6231f3deSPhilip Rakity if (host->vqmmc) { 1610*6231f3deSPhilip Rakity ret = regulator_set_voltage(host->vqmmc, 3300000, 3300000); 1611*6231f3deSPhilip Rakity if (ret) { 1612*6231f3deSPhilip Rakity pr_warning("%s: Switching to 3.3V signalling voltage " 1613*6231f3deSPhilip Rakity " failed\n", mmc_hostname(host->mmc)); 1614*6231f3deSPhilip Rakity return -EIO; 1615*6231f3deSPhilip Rakity } 1616*6231f3deSPhilip Rakity } 1617f2119df6SArindam Nath /* Wait for 5ms */ 1618f2119df6SArindam Nath usleep_range(5000, 5500); 1619f2119df6SArindam Nath 1620f2119df6SArindam Nath /* 3.3V regulator output should be stable within 5 ms */ 1621f2119df6SArindam Nath ctrl = sdhci_readw(host, SDHCI_HOST_CONTROL2); 1622f2119df6SArindam Nath if (!(ctrl & SDHCI_CTRL_VDD_180)) 1623f2119df6SArindam Nath return 0; 1624*6231f3deSPhilip Rakity 1625*6231f3deSPhilip Rakity pr_warning("%s: 3.3V regulator output did not became stable\n", 1626*6231f3deSPhilip Rakity mmc_hostname(host->mmc)); 1627*6231f3deSPhilip Rakity 1628f2119df6SArindam Nath return -EIO; 1629f2119df6SArindam Nath } 1630*6231f3deSPhilip Rakity 1631*6231f3deSPhilip Rakity static int sdhci_do_1_8v_signal_voltage_switch(struct sdhci_host *host, 1632*6231f3deSPhilip Rakity u16 ctrl) 1633*6231f3deSPhilip Rakity { 1634*6231f3deSPhilip Rakity u8 pwr; 1635*6231f3deSPhilip Rakity u16 clk; 1636*6231f3deSPhilip Rakity u32 present_state; 1637*6231f3deSPhilip Rakity int ret; 1638*6231f3deSPhilip Rakity 1639f2119df6SArindam Nath /* Stop SDCLK */ 1640f2119df6SArindam Nath clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL); 1641f2119df6SArindam Nath clk &= ~SDHCI_CLOCK_CARD_EN; 1642f2119df6SArindam Nath sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); 1643f2119df6SArindam Nath 1644f2119df6SArindam Nath /* Check whether DAT[3:0] is 0000 */ 1645f2119df6SArindam Nath present_state = sdhci_readl(host, SDHCI_PRESENT_STATE); 1646f2119df6SArindam Nath if (!((present_state & SDHCI_DATA_LVL_MASK) >> 1647f2119df6SArindam Nath SDHCI_DATA_LVL_SHIFT)) { 1648f2119df6SArindam Nath /* 1649f2119df6SArindam Nath * Enable 1.8V Signal Enable in the Host Control2 1650f2119df6SArindam Nath * register 1651f2119df6SArindam Nath */ 1652*6231f3deSPhilip Rakity if (host->vqmmc) 1653*6231f3deSPhilip Rakity ret = regulator_set_voltage(host->vqmmc, 1654*6231f3deSPhilip Rakity 1800000, 1800000); 1655*6231f3deSPhilip Rakity else 1656*6231f3deSPhilip Rakity ret = 0; 1657*6231f3deSPhilip Rakity 1658*6231f3deSPhilip Rakity if (!ret) { 1659f2119df6SArindam Nath ctrl |= SDHCI_CTRL_VDD_180; 1660f2119df6SArindam Nath sdhci_writew(host, ctrl, SDHCI_HOST_CONTROL2); 1661f2119df6SArindam Nath 1662f2119df6SArindam Nath /* Wait for 5ms */ 1663f2119df6SArindam Nath usleep_range(5000, 5500); 1664f2119df6SArindam Nath 1665f2119df6SArindam Nath ctrl = sdhci_readw(host, SDHCI_HOST_CONTROL2); 1666f2119df6SArindam Nath if (ctrl & SDHCI_CTRL_VDD_180) { 1667f2119df6SArindam Nath /* Provide SDCLK again and wait for 1ms */ 1668f2119df6SArindam Nath clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL); 1669f2119df6SArindam Nath clk |= SDHCI_CLOCK_CARD_EN; 1670f2119df6SArindam Nath sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); 1671f2119df6SArindam Nath usleep_range(1000, 1500); 1672f2119df6SArindam Nath 1673f2119df6SArindam Nath /* 1674f2119df6SArindam Nath * If DAT[3:0] level is 1111b, then the card 1675f2119df6SArindam Nath * was successfully switched to 1.8V signaling. 1676f2119df6SArindam Nath */ 1677f2119df6SArindam Nath present_state = sdhci_readl(host, 1678f2119df6SArindam Nath SDHCI_PRESENT_STATE); 1679f2119df6SArindam Nath if ((present_state & SDHCI_DATA_LVL_MASK) == 1680f2119df6SArindam Nath SDHCI_DATA_LVL_MASK) 1681f2119df6SArindam Nath return 0; 1682f2119df6SArindam Nath } 1683f2119df6SArindam Nath } 1684*6231f3deSPhilip Rakity } 1685f2119df6SArindam Nath 1686f2119df6SArindam Nath /* 1687f2119df6SArindam Nath * If we are here, that means the switch to 1.8V signaling 1688f2119df6SArindam Nath * failed. We power cycle the card, and retry initialization 1689f2119df6SArindam Nath * sequence by setting S18R to 0. 1690f2119df6SArindam Nath */ 1691f2119df6SArindam Nath pwr = sdhci_readb(host, SDHCI_POWER_CONTROL); 1692f2119df6SArindam Nath pwr &= ~SDHCI_POWER_ON; 1693f2119df6SArindam Nath sdhci_writeb(host, pwr, SDHCI_POWER_CONTROL); 169438cfc2f7SPhilip Rakity if (host->vmmc) 169538cfc2f7SPhilip Rakity regulator_disable(host->vmmc); 1696f2119df6SArindam Nath 1697f2119df6SArindam Nath /* Wait for 1ms as per the spec */ 1698f2119df6SArindam Nath usleep_range(1000, 1500); 1699f2119df6SArindam Nath pwr |= SDHCI_POWER_ON; 1700f2119df6SArindam Nath sdhci_writeb(host, pwr, SDHCI_POWER_CONTROL); 170138cfc2f7SPhilip Rakity if (host->vmmc) 170238cfc2f7SPhilip Rakity regulator_enable(host->vmmc); 1703f2119df6SArindam Nath 1704*6231f3deSPhilip Rakity pr_warning("%s: Switching to 1.8V signalling voltage failed, " 1705*6231f3deSPhilip Rakity "retrying with S18R set to 0\n", mmc_hostname(host->mmc)); 1706*6231f3deSPhilip Rakity 1707f2119df6SArindam Nath return -EAGAIN; 1708*6231f3deSPhilip Rakity } 1709*6231f3deSPhilip Rakity 1710*6231f3deSPhilip Rakity static int sdhci_do_start_signal_voltage_switch(struct sdhci_host *host, 1711*6231f3deSPhilip Rakity struct mmc_ios *ios) 1712*6231f3deSPhilip Rakity { 1713*6231f3deSPhilip Rakity u16 ctrl; 1714*6231f3deSPhilip Rakity 1715*6231f3deSPhilip Rakity /* 1716*6231f3deSPhilip Rakity * Signal Voltage Switching is only applicable for Host Controllers 1717*6231f3deSPhilip Rakity * v3.00 and above. 1718*6231f3deSPhilip Rakity */ 1719*6231f3deSPhilip Rakity if (host->version < SDHCI_SPEC_300) 1720*6231f3deSPhilip Rakity return 0; 1721*6231f3deSPhilip Rakity 1722*6231f3deSPhilip Rakity /* 1723*6231f3deSPhilip Rakity * We first check whether the request is to set signalling voltage 1724*6231f3deSPhilip Rakity * to 3.3V. If so, we change the voltage to 3.3V and return quickly. 1725*6231f3deSPhilip Rakity */ 1726*6231f3deSPhilip Rakity ctrl = sdhci_readw(host, SDHCI_HOST_CONTROL2); 1727*6231f3deSPhilip Rakity if (ios->signal_voltage == MMC_SIGNAL_VOLTAGE_330) 1728*6231f3deSPhilip Rakity return sdhci_do_3_3v_signal_voltage_switch(host, ctrl); 1729*6231f3deSPhilip Rakity else if (!(ctrl & SDHCI_CTRL_VDD_180) && 1730*6231f3deSPhilip Rakity (ios->signal_voltage == MMC_SIGNAL_VOLTAGE_180)) 1731*6231f3deSPhilip Rakity return sdhci_do_1_8v_signal_voltage_switch(host, ctrl); 1732*6231f3deSPhilip Rakity else 1733f2119df6SArindam Nath /* No signal voltage switch required */ 1734f2119df6SArindam Nath return 0; 1735f2119df6SArindam Nath } 1736f2119df6SArindam Nath 173766fd8ad5SAdrian Hunter static int sdhci_start_signal_voltage_switch(struct mmc_host *mmc, 173866fd8ad5SAdrian Hunter struct mmc_ios *ios) 173966fd8ad5SAdrian Hunter { 174066fd8ad5SAdrian Hunter struct sdhci_host *host = mmc_priv(mmc); 174166fd8ad5SAdrian Hunter int err; 174266fd8ad5SAdrian Hunter 174366fd8ad5SAdrian Hunter if (host->version < SDHCI_SPEC_300) 174466fd8ad5SAdrian Hunter return 0; 174566fd8ad5SAdrian Hunter sdhci_runtime_pm_get(host); 174666fd8ad5SAdrian Hunter err = sdhci_do_start_signal_voltage_switch(host, ios); 174766fd8ad5SAdrian Hunter sdhci_runtime_pm_put(host); 174866fd8ad5SAdrian Hunter return err; 174966fd8ad5SAdrian Hunter } 175066fd8ad5SAdrian Hunter 1751069c9f14SGirish K S static int sdhci_execute_tuning(struct mmc_host *mmc, u32 opcode) 1752b513ea25SArindam Nath { 1753b513ea25SArindam Nath struct sdhci_host *host; 1754b513ea25SArindam Nath u16 ctrl; 1755b513ea25SArindam Nath u32 ier; 1756b513ea25SArindam Nath int tuning_loop_counter = MAX_TUNING_LOOP; 1757b513ea25SArindam Nath unsigned long timeout; 1758b513ea25SArindam Nath int err = 0; 1759069c9f14SGirish K S bool requires_tuning_nonuhs = false; 1760b513ea25SArindam Nath 1761b513ea25SArindam Nath host = mmc_priv(mmc); 1762b513ea25SArindam Nath 176366fd8ad5SAdrian Hunter sdhci_runtime_pm_get(host); 1764b513ea25SArindam Nath disable_irq(host->irq); 1765b513ea25SArindam Nath spin_lock(&host->lock); 1766b513ea25SArindam Nath 1767b513ea25SArindam Nath ctrl = sdhci_readw(host, SDHCI_HOST_CONTROL2); 1768b513ea25SArindam Nath 1769b513ea25SArindam Nath /* 1770069c9f14SGirish K S * The Host Controller needs tuning only in case of SDR104 mode 1771069c9f14SGirish K S * and for SDR50 mode when Use Tuning for SDR50 is set in the 1772b513ea25SArindam Nath * Capabilities register. 1773069c9f14SGirish K S * If the Host Controller supports the HS200 mode then the 1774069c9f14SGirish K S * tuning function has to be executed. 1775b513ea25SArindam Nath */ 1776069c9f14SGirish K S if (((ctrl & SDHCI_CTRL_UHS_MASK) == SDHCI_CTRL_UHS_SDR50) && 1777069c9f14SGirish K S (host->flags & SDHCI_SDR50_NEEDS_TUNING || 1778069c9f14SGirish K S host->flags & SDHCI_HS200_NEEDS_TUNING)) 1779069c9f14SGirish K S requires_tuning_nonuhs = true; 1780069c9f14SGirish K S 1781b513ea25SArindam Nath if (((ctrl & SDHCI_CTRL_UHS_MASK) == SDHCI_CTRL_UHS_SDR104) || 1782069c9f14SGirish K S requires_tuning_nonuhs) 1783b513ea25SArindam Nath ctrl |= SDHCI_CTRL_EXEC_TUNING; 1784b513ea25SArindam Nath else { 1785b513ea25SArindam Nath spin_unlock(&host->lock); 1786b513ea25SArindam Nath enable_irq(host->irq); 178766fd8ad5SAdrian Hunter sdhci_runtime_pm_put(host); 1788b513ea25SArindam Nath return 0; 1789b513ea25SArindam Nath } 1790b513ea25SArindam Nath 1791b513ea25SArindam Nath sdhci_writew(host, ctrl, SDHCI_HOST_CONTROL2); 1792b513ea25SArindam Nath 1793b513ea25SArindam Nath /* 1794b513ea25SArindam Nath * As per the Host Controller spec v3.00, tuning command 1795b513ea25SArindam Nath * generates Buffer Read Ready interrupt, so enable that. 1796b513ea25SArindam Nath * 1797b513ea25SArindam Nath * Note: The spec clearly says that when tuning sequence 1798b513ea25SArindam Nath * is being performed, the controller does not generate 1799b513ea25SArindam Nath * interrupts other than Buffer Read Ready interrupt. But 1800b513ea25SArindam Nath * to make sure we don't hit a controller bug, we _only_ 1801b513ea25SArindam Nath * enable Buffer Read Ready interrupt here. 1802b513ea25SArindam Nath */ 1803b513ea25SArindam Nath ier = sdhci_readl(host, SDHCI_INT_ENABLE); 1804b513ea25SArindam Nath sdhci_clear_set_irqs(host, ier, SDHCI_INT_DATA_AVAIL); 1805b513ea25SArindam Nath 1806b513ea25SArindam Nath /* 1807b513ea25SArindam Nath * Issue CMD19 repeatedly till Execute Tuning is set to 0 or the number 1808b513ea25SArindam Nath * of loops reaches 40 times or a timeout of 150ms occurs. 1809b513ea25SArindam Nath */ 1810b513ea25SArindam Nath timeout = 150; 1811b513ea25SArindam Nath do { 1812b513ea25SArindam Nath struct mmc_command cmd = {0}; 181366fd8ad5SAdrian Hunter struct mmc_request mrq = {NULL}; 1814b513ea25SArindam Nath 1815b513ea25SArindam Nath if (!tuning_loop_counter && !timeout) 1816b513ea25SArindam Nath break; 1817b513ea25SArindam Nath 1818069c9f14SGirish K S cmd.opcode = opcode; 1819b513ea25SArindam Nath cmd.arg = 0; 1820b513ea25SArindam Nath cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC; 1821b513ea25SArindam Nath cmd.retries = 0; 1822b513ea25SArindam Nath cmd.data = NULL; 1823b513ea25SArindam Nath cmd.error = 0; 1824b513ea25SArindam Nath 1825b513ea25SArindam Nath mrq.cmd = &cmd; 1826b513ea25SArindam Nath host->mrq = &mrq; 1827b513ea25SArindam Nath 1828b513ea25SArindam Nath /* 1829b513ea25SArindam Nath * In response to CMD19, the card sends 64 bytes of tuning 1830b513ea25SArindam Nath * block to the Host Controller. So we set the block size 1831b513ea25SArindam Nath * to 64 here. 1832b513ea25SArindam Nath */ 1833069c9f14SGirish K S if (cmd.opcode == MMC_SEND_TUNING_BLOCK_HS200) { 1834069c9f14SGirish K S if (mmc->ios.bus_width == MMC_BUS_WIDTH_8) 1835069c9f14SGirish K S sdhci_writew(host, SDHCI_MAKE_BLKSZ(7, 128), 1836069c9f14SGirish K S SDHCI_BLOCK_SIZE); 1837069c9f14SGirish K S else if (mmc->ios.bus_width == MMC_BUS_WIDTH_4) 1838069c9f14SGirish K S sdhci_writew(host, SDHCI_MAKE_BLKSZ(7, 64), 1839069c9f14SGirish K S SDHCI_BLOCK_SIZE); 1840069c9f14SGirish K S } else { 1841069c9f14SGirish K S sdhci_writew(host, SDHCI_MAKE_BLKSZ(7, 64), 1842069c9f14SGirish K S SDHCI_BLOCK_SIZE); 1843069c9f14SGirish K S } 1844b513ea25SArindam Nath 1845b513ea25SArindam Nath /* 1846b513ea25SArindam Nath * The tuning block is sent by the card to the host controller. 1847b513ea25SArindam Nath * So we set the TRNS_READ bit in the Transfer Mode register. 1848b513ea25SArindam Nath * This also takes care of setting DMA Enable and Multi Block 1849b513ea25SArindam Nath * Select in the same register to 0. 1850b513ea25SArindam Nath */ 1851b513ea25SArindam Nath sdhci_writew(host, SDHCI_TRNS_READ, SDHCI_TRANSFER_MODE); 1852b513ea25SArindam Nath 1853b513ea25SArindam Nath sdhci_send_command(host, &cmd); 1854b513ea25SArindam Nath 1855b513ea25SArindam Nath host->cmd = NULL; 1856b513ea25SArindam Nath host->mrq = NULL; 1857b513ea25SArindam Nath 1858b513ea25SArindam Nath spin_unlock(&host->lock); 1859b513ea25SArindam Nath enable_irq(host->irq); 1860b513ea25SArindam Nath 1861b513ea25SArindam Nath /* Wait for Buffer Read Ready interrupt */ 1862b513ea25SArindam Nath wait_event_interruptible_timeout(host->buf_ready_int, 1863b513ea25SArindam Nath (host->tuning_done == 1), 1864b513ea25SArindam Nath msecs_to_jiffies(50)); 1865b513ea25SArindam Nath disable_irq(host->irq); 1866b513ea25SArindam Nath spin_lock(&host->lock); 1867b513ea25SArindam Nath 1868b513ea25SArindam Nath if (!host->tuning_done) { 1869a3c76eb9SGirish K S pr_info(DRIVER_NAME ": Timeout waiting for " 1870b513ea25SArindam Nath "Buffer Read Ready interrupt during tuning " 1871b513ea25SArindam Nath "procedure, falling back to fixed sampling " 1872b513ea25SArindam Nath "clock\n"); 1873b513ea25SArindam Nath ctrl = sdhci_readw(host, SDHCI_HOST_CONTROL2); 1874b513ea25SArindam Nath ctrl &= ~SDHCI_CTRL_TUNED_CLK; 1875b513ea25SArindam Nath ctrl &= ~SDHCI_CTRL_EXEC_TUNING; 1876b513ea25SArindam Nath sdhci_writew(host, ctrl, SDHCI_HOST_CONTROL2); 1877b513ea25SArindam Nath 1878b513ea25SArindam Nath err = -EIO; 1879b513ea25SArindam Nath goto out; 1880b513ea25SArindam Nath } 1881b513ea25SArindam Nath 1882b513ea25SArindam Nath host->tuning_done = 0; 1883b513ea25SArindam Nath 1884b513ea25SArindam Nath ctrl = sdhci_readw(host, SDHCI_HOST_CONTROL2); 1885b513ea25SArindam Nath tuning_loop_counter--; 1886b513ea25SArindam Nath timeout--; 1887b513ea25SArindam Nath mdelay(1); 1888b513ea25SArindam Nath } while (ctrl & SDHCI_CTRL_EXEC_TUNING); 1889b513ea25SArindam Nath 1890b513ea25SArindam Nath /* 1891b513ea25SArindam Nath * The Host Driver has exhausted the maximum number of loops allowed, 1892b513ea25SArindam Nath * so use fixed sampling frequency. 1893b513ea25SArindam Nath */ 1894b513ea25SArindam Nath if (!tuning_loop_counter || !timeout) { 1895b513ea25SArindam Nath ctrl &= ~SDHCI_CTRL_TUNED_CLK; 1896b513ea25SArindam Nath sdhci_writew(host, ctrl, SDHCI_HOST_CONTROL2); 1897b513ea25SArindam Nath } else { 1898b513ea25SArindam Nath if (!(ctrl & SDHCI_CTRL_TUNED_CLK)) { 1899a3c76eb9SGirish K S pr_info(DRIVER_NAME ": Tuning procedure" 1900b513ea25SArindam Nath " failed, falling back to fixed sampling" 1901b513ea25SArindam Nath " clock\n"); 1902b513ea25SArindam Nath err = -EIO; 1903b513ea25SArindam Nath } 1904b513ea25SArindam Nath } 1905b513ea25SArindam Nath 1906b513ea25SArindam Nath out: 1907cf2b5eeaSArindam Nath /* 1908cf2b5eeaSArindam Nath * If this is the very first time we are here, we start the retuning 1909cf2b5eeaSArindam Nath * timer. Since only during the first time, SDHCI_NEEDS_RETUNING 1910cf2b5eeaSArindam Nath * flag won't be set, we check this condition before actually starting 1911cf2b5eeaSArindam Nath * the timer. 1912cf2b5eeaSArindam Nath */ 1913cf2b5eeaSArindam Nath if (!(host->flags & SDHCI_NEEDS_RETUNING) && host->tuning_count && 1914cf2b5eeaSArindam Nath (host->tuning_mode == SDHCI_TUNING_MODE_1)) { 1915973905feSAaron Lu host->flags |= SDHCI_USING_RETUNING_TIMER; 1916cf2b5eeaSArindam Nath mod_timer(&host->tuning_timer, jiffies + 1917cf2b5eeaSArindam Nath host->tuning_count * HZ); 1918cf2b5eeaSArindam Nath /* Tuning mode 1 limits the maximum data length to 4MB */ 1919cf2b5eeaSArindam Nath mmc->max_blk_count = (4 * 1024 * 1024) / mmc->max_blk_size; 1920cf2b5eeaSArindam Nath } else { 1921cf2b5eeaSArindam Nath host->flags &= ~SDHCI_NEEDS_RETUNING; 1922cf2b5eeaSArindam Nath /* Reload the new initial value for timer */ 1923cf2b5eeaSArindam Nath if (host->tuning_mode == SDHCI_TUNING_MODE_1) 1924cf2b5eeaSArindam Nath mod_timer(&host->tuning_timer, jiffies + 1925cf2b5eeaSArindam Nath host->tuning_count * HZ); 1926cf2b5eeaSArindam Nath } 1927cf2b5eeaSArindam Nath 1928cf2b5eeaSArindam Nath /* 1929cf2b5eeaSArindam Nath * In case tuning fails, host controllers which support re-tuning can 1930cf2b5eeaSArindam Nath * try tuning again at a later time, when the re-tuning timer expires. 1931cf2b5eeaSArindam Nath * So for these controllers, we return 0. Since there might be other 1932cf2b5eeaSArindam Nath * controllers who do not have this capability, we return error for 1933973905feSAaron Lu * them. SDHCI_USING_RETUNING_TIMER means the host is currently using 1934973905feSAaron Lu * a retuning timer to do the retuning for the card. 1935cf2b5eeaSArindam Nath */ 1936973905feSAaron Lu if (err && (host->flags & SDHCI_USING_RETUNING_TIMER)) 1937cf2b5eeaSArindam Nath err = 0; 1938cf2b5eeaSArindam Nath 1939b513ea25SArindam Nath sdhci_clear_set_irqs(host, SDHCI_INT_DATA_AVAIL, ier); 1940b513ea25SArindam Nath spin_unlock(&host->lock); 1941b513ea25SArindam Nath enable_irq(host->irq); 194266fd8ad5SAdrian Hunter sdhci_runtime_pm_put(host); 1943b513ea25SArindam Nath 1944b513ea25SArindam Nath return err; 1945b513ea25SArindam Nath } 1946b513ea25SArindam Nath 194766fd8ad5SAdrian Hunter static void sdhci_do_enable_preset_value(struct sdhci_host *host, bool enable) 19484d55c5a1SArindam Nath { 19494d55c5a1SArindam Nath u16 ctrl; 19504d55c5a1SArindam Nath unsigned long flags; 19514d55c5a1SArindam Nath 19524d55c5a1SArindam Nath /* Host Controller v3.00 defines preset value registers */ 19534d55c5a1SArindam Nath if (host->version < SDHCI_SPEC_300) 19544d55c5a1SArindam Nath return; 19554d55c5a1SArindam Nath 19564d55c5a1SArindam Nath spin_lock_irqsave(&host->lock, flags); 19574d55c5a1SArindam Nath 19584d55c5a1SArindam Nath ctrl = sdhci_readw(host, SDHCI_HOST_CONTROL2); 19594d55c5a1SArindam Nath 19604d55c5a1SArindam Nath /* 19614d55c5a1SArindam Nath * We only enable or disable Preset Value if they are not already 19624d55c5a1SArindam Nath * enabled or disabled respectively. Otherwise, we bail out. 19634d55c5a1SArindam Nath */ 19644d55c5a1SArindam Nath if (enable && !(ctrl & SDHCI_CTRL_PRESET_VAL_ENABLE)) { 19654d55c5a1SArindam Nath ctrl |= SDHCI_CTRL_PRESET_VAL_ENABLE; 19664d55c5a1SArindam Nath sdhci_writew(host, ctrl, SDHCI_HOST_CONTROL2); 196766fd8ad5SAdrian Hunter host->flags |= SDHCI_PV_ENABLED; 19684d55c5a1SArindam Nath } else if (!enable && (ctrl & SDHCI_CTRL_PRESET_VAL_ENABLE)) { 19694d55c5a1SArindam Nath ctrl &= ~SDHCI_CTRL_PRESET_VAL_ENABLE; 19704d55c5a1SArindam Nath sdhci_writew(host, ctrl, SDHCI_HOST_CONTROL2); 197166fd8ad5SAdrian Hunter host->flags &= ~SDHCI_PV_ENABLED; 19724d55c5a1SArindam Nath } 19734d55c5a1SArindam Nath 19744d55c5a1SArindam Nath spin_unlock_irqrestore(&host->lock, flags); 19754d55c5a1SArindam Nath } 19764d55c5a1SArindam Nath 197766fd8ad5SAdrian Hunter static void sdhci_enable_preset_value(struct mmc_host *mmc, bool enable) 197866fd8ad5SAdrian Hunter { 197966fd8ad5SAdrian Hunter struct sdhci_host *host = mmc_priv(mmc); 198066fd8ad5SAdrian Hunter 198166fd8ad5SAdrian Hunter sdhci_runtime_pm_get(host); 198266fd8ad5SAdrian Hunter sdhci_do_enable_preset_value(host, enable); 198366fd8ad5SAdrian Hunter sdhci_runtime_pm_put(host); 198466fd8ad5SAdrian Hunter } 198566fd8ad5SAdrian Hunter 19861c6a0718SPierre Ossman static const struct mmc_host_ops sdhci_ops = { 19871c6a0718SPierre Ossman .request = sdhci_request, 19881c6a0718SPierre Ossman .set_ios = sdhci_set_ios, 19891c6a0718SPierre Ossman .get_ro = sdhci_get_ro, 199020758b66SAdrian Hunter .hw_reset = sdhci_hw_reset, 1991f75979b7SPierre Ossman .enable_sdio_irq = sdhci_enable_sdio_irq, 1992f2119df6SArindam Nath .start_signal_voltage_switch = sdhci_start_signal_voltage_switch, 1993b513ea25SArindam Nath .execute_tuning = sdhci_execute_tuning, 19944d55c5a1SArindam Nath .enable_preset_value = sdhci_enable_preset_value, 19951c6a0718SPierre Ossman }; 19961c6a0718SPierre Ossman 19971c6a0718SPierre Ossman /*****************************************************************************\ 19981c6a0718SPierre Ossman * * 19991c6a0718SPierre Ossman * Tasklets * 20001c6a0718SPierre Ossman * * 20011c6a0718SPierre Ossman \*****************************************************************************/ 20021c6a0718SPierre Ossman 20031c6a0718SPierre Ossman static void sdhci_tasklet_card(unsigned long param) 20041c6a0718SPierre Ossman { 20051c6a0718SPierre Ossman struct sdhci_host *host; 20061c6a0718SPierre Ossman unsigned long flags; 20071c6a0718SPierre Ossman 20081c6a0718SPierre Ossman host = (struct sdhci_host*)param; 20091c6a0718SPierre Ossman 20101c6a0718SPierre Ossman spin_lock_irqsave(&host->lock, flags); 20111c6a0718SPierre Ossman 201266fd8ad5SAdrian Hunter /* Check host->mrq first in case we are runtime suspended */ 201366fd8ad5SAdrian Hunter if (host->mrq && 201466fd8ad5SAdrian Hunter !(sdhci_readl(host, SDHCI_PRESENT_STATE) & SDHCI_CARD_PRESENT)) { 2015a3c76eb9SGirish K S pr_err("%s: Card removed during transfer!\n", 20161c6a0718SPierre Ossman mmc_hostname(host->mmc)); 2017a3c76eb9SGirish K S pr_err("%s: Resetting controller.\n", 20181c6a0718SPierre Ossman mmc_hostname(host->mmc)); 20191c6a0718SPierre Ossman 20201c6a0718SPierre Ossman sdhci_reset(host, SDHCI_RESET_CMD); 20211c6a0718SPierre Ossman sdhci_reset(host, SDHCI_RESET_DATA); 20221c6a0718SPierre Ossman 202317b0429dSPierre Ossman host->mrq->cmd->error = -ENOMEDIUM; 20241c6a0718SPierre Ossman tasklet_schedule(&host->finish_tasklet); 20251c6a0718SPierre Ossman } 20261c6a0718SPierre Ossman 20271c6a0718SPierre Ossman spin_unlock_irqrestore(&host->lock, flags); 20281c6a0718SPierre Ossman 202904cf585dSPierre Ossman mmc_detect_change(host->mmc, msecs_to_jiffies(200)); 20301c6a0718SPierre Ossman } 20311c6a0718SPierre Ossman 20321c6a0718SPierre Ossman static void sdhci_tasklet_finish(unsigned long param) 20331c6a0718SPierre Ossman { 20341c6a0718SPierre Ossman struct sdhci_host *host; 20351c6a0718SPierre Ossman unsigned long flags; 20361c6a0718SPierre Ossman struct mmc_request *mrq; 20371c6a0718SPierre Ossman 20381c6a0718SPierre Ossman host = (struct sdhci_host*)param; 20391c6a0718SPierre Ossman 204066fd8ad5SAdrian Hunter spin_lock_irqsave(&host->lock, flags); 204166fd8ad5SAdrian Hunter 20420c9c99a7SChris Ball /* 20430c9c99a7SChris Ball * If this tasklet gets rescheduled while running, it will 20440c9c99a7SChris Ball * be run again afterwards but without any active request. 20450c9c99a7SChris Ball */ 204666fd8ad5SAdrian Hunter if (!host->mrq) { 204766fd8ad5SAdrian Hunter spin_unlock_irqrestore(&host->lock, flags); 20480c9c99a7SChris Ball return; 204966fd8ad5SAdrian Hunter } 20501c6a0718SPierre Ossman 20511c6a0718SPierre Ossman del_timer(&host->timer); 20521c6a0718SPierre Ossman 20531c6a0718SPierre Ossman mrq = host->mrq; 20541c6a0718SPierre Ossman 20551c6a0718SPierre Ossman /* 20561c6a0718SPierre Ossman * The controller needs a reset of internal state machines 20571c6a0718SPierre Ossman * upon error conditions. 20581c6a0718SPierre Ossman */ 20591e72859eSPierre Ossman if (!(host->flags & SDHCI_DEVICE_DEAD) && 2060b7b4d342SBen Dooks ((mrq->cmd && mrq->cmd->error) || 206117b0429dSPierre Ossman (mrq->data && (mrq->data->error || 206284c46a53SPierre Ossman (mrq->data->stop && mrq->data->stop->error))) || 20631e72859eSPierre Ossman (host->quirks & SDHCI_QUIRK_RESET_AFTER_REQUEST))) { 20641c6a0718SPierre Ossman 20651c6a0718SPierre Ossman /* Some controllers need this kick or reset won't work here */ 2066b8c86fc5SPierre Ossman if (host->quirks & SDHCI_QUIRK_CLOCK_BEFORE_RESET) { 20671c6a0718SPierre Ossman unsigned int clock; 20681c6a0718SPierre Ossman 20691c6a0718SPierre Ossman /* This is to force an update */ 20701c6a0718SPierre Ossman clock = host->clock; 20711c6a0718SPierre Ossman host->clock = 0; 20721c6a0718SPierre Ossman sdhci_set_clock(host, clock); 20731c6a0718SPierre Ossman } 20741c6a0718SPierre Ossman 20751c6a0718SPierre Ossman /* Spec says we should do both at the same time, but Ricoh 20761c6a0718SPierre Ossman controllers do not like that. */ 20771c6a0718SPierre Ossman sdhci_reset(host, SDHCI_RESET_CMD); 20781c6a0718SPierre Ossman sdhci_reset(host, SDHCI_RESET_DATA); 20791c6a0718SPierre Ossman } 20801c6a0718SPierre Ossman 20811c6a0718SPierre Ossman host->mrq = NULL; 20821c6a0718SPierre Ossman host->cmd = NULL; 20831c6a0718SPierre Ossman host->data = NULL; 20841c6a0718SPierre Ossman 2085f9134319SPierre Ossman #ifndef SDHCI_USE_LEDS_CLASS 20861c6a0718SPierre Ossman sdhci_deactivate_led(host); 20872f730fecSPierre Ossman #endif 20881c6a0718SPierre Ossman 20891c6a0718SPierre Ossman mmiowb(); 20901c6a0718SPierre Ossman spin_unlock_irqrestore(&host->lock, flags); 20911c6a0718SPierre Ossman 20921c6a0718SPierre Ossman mmc_request_done(host->mmc, mrq); 209366fd8ad5SAdrian Hunter sdhci_runtime_pm_put(host); 20941c6a0718SPierre Ossman } 20951c6a0718SPierre Ossman 20961c6a0718SPierre Ossman static void sdhci_timeout_timer(unsigned long data) 20971c6a0718SPierre Ossman { 20981c6a0718SPierre Ossman struct sdhci_host *host; 20991c6a0718SPierre Ossman unsigned long flags; 21001c6a0718SPierre Ossman 21011c6a0718SPierre Ossman host = (struct sdhci_host*)data; 21021c6a0718SPierre Ossman 21031c6a0718SPierre Ossman spin_lock_irqsave(&host->lock, flags); 21041c6a0718SPierre Ossman 21051c6a0718SPierre Ossman if (host->mrq) { 2106a3c76eb9SGirish K S pr_err("%s: Timeout waiting for hardware " 21071c6a0718SPierre Ossman "interrupt.\n", mmc_hostname(host->mmc)); 21081c6a0718SPierre Ossman sdhci_dumpregs(host); 21091c6a0718SPierre Ossman 21101c6a0718SPierre Ossman if (host->data) { 211117b0429dSPierre Ossman host->data->error = -ETIMEDOUT; 21121c6a0718SPierre Ossman sdhci_finish_data(host); 21131c6a0718SPierre Ossman } else { 21141c6a0718SPierre Ossman if (host->cmd) 211517b0429dSPierre Ossman host->cmd->error = -ETIMEDOUT; 21161c6a0718SPierre Ossman else 211717b0429dSPierre Ossman host->mrq->cmd->error = -ETIMEDOUT; 21181c6a0718SPierre Ossman 21191c6a0718SPierre Ossman tasklet_schedule(&host->finish_tasklet); 21201c6a0718SPierre Ossman } 21211c6a0718SPierre Ossman } 21221c6a0718SPierre Ossman 21231c6a0718SPierre Ossman mmiowb(); 21241c6a0718SPierre Ossman spin_unlock_irqrestore(&host->lock, flags); 21251c6a0718SPierre Ossman } 21261c6a0718SPierre Ossman 2127cf2b5eeaSArindam Nath static void sdhci_tuning_timer(unsigned long data) 2128cf2b5eeaSArindam Nath { 2129cf2b5eeaSArindam Nath struct sdhci_host *host; 2130cf2b5eeaSArindam Nath unsigned long flags; 2131cf2b5eeaSArindam Nath 2132cf2b5eeaSArindam Nath host = (struct sdhci_host *)data; 2133cf2b5eeaSArindam Nath 2134cf2b5eeaSArindam Nath spin_lock_irqsave(&host->lock, flags); 2135cf2b5eeaSArindam Nath 2136cf2b5eeaSArindam Nath host->flags |= SDHCI_NEEDS_RETUNING; 2137cf2b5eeaSArindam Nath 2138cf2b5eeaSArindam Nath spin_unlock_irqrestore(&host->lock, flags); 2139cf2b5eeaSArindam Nath } 2140cf2b5eeaSArindam Nath 21411c6a0718SPierre Ossman /*****************************************************************************\ 21421c6a0718SPierre Ossman * * 21431c6a0718SPierre Ossman * Interrupt handling * 21441c6a0718SPierre Ossman * * 21451c6a0718SPierre Ossman \*****************************************************************************/ 21461c6a0718SPierre Ossman 21471c6a0718SPierre Ossman static void sdhci_cmd_irq(struct sdhci_host *host, u32 intmask) 21481c6a0718SPierre Ossman { 21491c6a0718SPierre Ossman BUG_ON(intmask == 0); 21501c6a0718SPierre Ossman 21511c6a0718SPierre Ossman if (!host->cmd) { 2152a3c76eb9SGirish K S pr_err("%s: Got command interrupt 0x%08x even " 2153b67ac3f3SPierre Ossman "though no command operation was in progress.\n", 2154b67ac3f3SPierre Ossman mmc_hostname(host->mmc), (unsigned)intmask); 21551c6a0718SPierre Ossman sdhci_dumpregs(host); 21561c6a0718SPierre Ossman return; 21571c6a0718SPierre Ossman } 21581c6a0718SPierre Ossman 21591c6a0718SPierre Ossman if (intmask & SDHCI_INT_TIMEOUT) 216017b0429dSPierre Ossman host->cmd->error = -ETIMEDOUT; 216117b0429dSPierre Ossman else if (intmask & (SDHCI_INT_CRC | SDHCI_INT_END_BIT | 216217b0429dSPierre Ossman SDHCI_INT_INDEX)) 216317b0429dSPierre Ossman host->cmd->error = -EILSEQ; 21641c6a0718SPierre Ossman 2165e809517fSPierre Ossman if (host->cmd->error) { 21661c6a0718SPierre Ossman tasklet_schedule(&host->finish_tasklet); 2167e809517fSPierre Ossman return; 2168e809517fSPierre Ossman } 2169e809517fSPierre Ossman 2170e809517fSPierre Ossman /* 2171e809517fSPierre Ossman * The host can send and interrupt when the busy state has 2172e809517fSPierre Ossman * ended, allowing us to wait without wasting CPU cycles. 2173e809517fSPierre Ossman * Unfortunately this is overloaded on the "data complete" 2174e809517fSPierre Ossman * interrupt, so we need to take some care when handling 2175e809517fSPierre Ossman * it. 2176e809517fSPierre Ossman * 2177e809517fSPierre Ossman * Note: The 1.0 specification is a bit ambiguous about this 2178e809517fSPierre Ossman * feature so there might be some problems with older 2179e809517fSPierre Ossman * controllers. 2180e809517fSPierre Ossman */ 2181e809517fSPierre Ossman if (host->cmd->flags & MMC_RSP_BUSY) { 2182e809517fSPierre Ossman if (host->cmd->data) 2183e809517fSPierre Ossman DBG("Cannot wait for busy signal when also " 2184e809517fSPierre Ossman "doing a data transfer"); 2185f945405cSBen Dooks else if (!(host->quirks & SDHCI_QUIRK_NO_BUSY_IRQ)) 2186e809517fSPierre Ossman return; 2187f945405cSBen Dooks 2188f945405cSBen Dooks /* The controller does not support the end-of-busy IRQ, 2189f945405cSBen Dooks * fall through and take the SDHCI_INT_RESPONSE */ 2190e809517fSPierre Ossman } 2191e809517fSPierre Ossman 2192e809517fSPierre Ossman if (intmask & SDHCI_INT_RESPONSE) 219343b58b36SPierre Ossman sdhci_finish_command(host); 21941c6a0718SPierre Ossman } 21951c6a0718SPierre Ossman 21960957c333SGeorge G. Davis #ifdef CONFIG_MMC_DEBUG 21976882a8c0SBen Dooks static void sdhci_show_adma_error(struct sdhci_host *host) 21986882a8c0SBen Dooks { 21996882a8c0SBen Dooks const char *name = mmc_hostname(host->mmc); 22006882a8c0SBen Dooks u8 *desc = host->adma_desc; 22016882a8c0SBen Dooks __le32 *dma; 22026882a8c0SBen Dooks __le16 *len; 22036882a8c0SBen Dooks u8 attr; 22046882a8c0SBen Dooks 22056882a8c0SBen Dooks sdhci_dumpregs(host); 22066882a8c0SBen Dooks 22076882a8c0SBen Dooks while (true) { 22086882a8c0SBen Dooks dma = (__le32 *)(desc + 4); 22096882a8c0SBen Dooks len = (__le16 *)(desc + 2); 22106882a8c0SBen Dooks attr = *desc; 22116882a8c0SBen Dooks 22126882a8c0SBen Dooks DBG("%s: %p: DMA 0x%08x, LEN 0x%04x, Attr=0x%02x\n", 22136882a8c0SBen Dooks name, desc, le32_to_cpu(*dma), le16_to_cpu(*len), attr); 22146882a8c0SBen Dooks 22156882a8c0SBen Dooks desc += 8; 22166882a8c0SBen Dooks 22176882a8c0SBen Dooks if (attr & 2) 22186882a8c0SBen Dooks break; 22196882a8c0SBen Dooks } 22206882a8c0SBen Dooks } 22216882a8c0SBen Dooks #else 22226882a8c0SBen Dooks static void sdhci_show_adma_error(struct sdhci_host *host) { } 22236882a8c0SBen Dooks #endif 22246882a8c0SBen Dooks 22251c6a0718SPierre Ossman static void sdhci_data_irq(struct sdhci_host *host, u32 intmask) 22261c6a0718SPierre Ossman { 2227069c9f14SGirish K S u32 command; 22281c6a0718SPierre Ossman BUG_ON(intmask == 0); 22291c6a0718SPierre Ossman 2230b513ea25SArindam Nath /* CMD19 generates _only_ Buffer Read Ready interrupt */ 2231b513ea25SArindam Nath if (intmask & SDHCI_INT_DATA_AVAIL) { 2232069c9f14SGirish K S command = SDHCI_GET_CMD(sdhci_readw(host, SDHCI_COMMAND)); 2233069c9f14SGirish K S if (command == MMC_SEND_TUNING_BLOCK || 2234069c9f14SGirish K S command == MMC_SEND_TUNING_BLOCK_HS200) { 2235b513ea25SArindam Nath host->tuning_done = 1; 2236b513ea25SArindam Nath wake_up(&host->buf_ready_int); 2237b513ea25SArindam Nath return; 2238b513ea25SArindam Nath } 2239b513ea25SArindam Nath } 2240b513ea25SArindam Nath 22411c6a0718SPierre Ossman if (!host->data) { 22421c6a0718SPierre Ossman /* 2243e809517fSPierre Ossman * The "data complete" interrupt is also used to 2244e809517fSPierre Ossman * indicate that a busy state has ended. See comment 2245e809517fSPierre Ossman * above in sdhci_cmd_irq(). 22461c6a0718SPierre Ossman */ 2247e809517fSPierre Ossman if (host->cmd && (host->cmd->flags & MMC_RSP_BUSY)) { 2248e809517fSPierre Ossman if (intmask & SDHCI_INT_DATA_END) { 2249e809517fSPierre Ossman sdhci_finish_command(host); 22501c6a0718SPierre Ossman return; 2251e809517fSPierre Ossman } 2252e809517fSPierre Ossman } 22531c6a0718SPierre Ossman 2254a3c76eb9SGirish K S pr_err("%s: Got data interrupt 0x%08x even " 2255b67ac3f3SPierre Ossman "though no data operation was in progress.\n", 2256b67ac3f3SPierre Ossman mmc_hostname(host->mmc), (unsigned)intmask); 22571c6a0718SPierre Ossman sdhci_dumpregs(host); 22581c6a0718SPierre Ossman 22591c6a0718SPierre Ossman return; 22601c6a0718SPierre Ossman } 22611c6a0718SPierre Ossman 22621c6a0718SPierre Ossman if (intmask & SDHCI_INT_DATA_TIMEOUT) 226317b0429dSPierre Ossman host->data->error = -ETIMEDOUT; 226422113efdSAries Lee else if (intmask & SDHCI_INT_DATA_END_BIT) 226522113efdSAries Lee host->data->error = -EILSEQ; 226622113efdSAries Lee else if ((intmask & SDHCI_INT_DATA_CRC) && 226722113efdSAries Lee SDHCI_GET_CMD(sdhci_readw(host, SDHCI_COMMAND)) 226822113efdSAries Lee != MMC_BUS_TEST_R) 226917b0429dSPierre Ossman host->data->error = -EILSEQ; 22706882a8c0SBen Dooks else if (intmask & SDHCI_INT_ADMA_ERROR) { 2271a3c76eb9SGirish K S pr_err("%s: ADMA error\n", mmc_hostname(host->mmc)); 22726882a8c0SBen Dooks sdhci_show_adma_error(host); 22732134a922SPierre Ossman host->data->error = -EIO; 22746882a8c0SBen Dooks } 22751c6a0718SPierre Ossman 227617b0429dSPierre Ossman if (host->data->error) 22771c6a0718SPierre Ossman sdhci_finish_data(host); 22781c6a0718SPierre Ossman else { 22791c6a0718SPierre Ossman if (intmask & (SDHCI_INT_DATA_AVAIL | SDHCI_INT_SPACE_AVAIL)) 22801c6a0718SPierre Ossman sdhci_transfer_pio(host); 22811c6a0718SPierre Ossman 22826ba736a1SPierre Ossman /* 22836ba736a1SPierre Ossman * We currently don't do anything fancy with DMA 22846ba736a1SPierre Ossman * boundaries, but as we can't disable the feature 22856ba736a1SPierre Ossman * we need to at least restart the transfer. 2286f6a03cbfSMikko Vinni * 2287f6a03cbfSMikko Vinni * According to the spec sdhci_readl(host, SDHCI_DMA_ADDRESS) 2288f6a03cbfSMikko Vinni * should return a valid address to continue from, but as 2289f6a03cbfSMikko Vinni * some controllers are faulty, don't trust them. 22906ba736a1SPierre Ossman */ 2291f6a03cbfSMikko Vinni if (intmask & SDHCI_INT_DMA_END) { 2292f6a03cbfSMikko Vinni u32 dmastart, dmanow; 2293f6a03cbfSMikko Vinni dmastart = sg_dma_address(host->data->sg); 2294f6a03cbfSMikko Vinni dmanow = dmastart + host->data->bytes_xfered; 2295f6a03cbfSMikko Vinni /* 2296f6a03cbfSMikko Vinni * Force update to the next DMA block boundary. 2297f6a03cbfSMikko Vinni */ 2298f6a03cbfSMikko Vinni dmanow = (dmanow & 2299f6a03cbfSMikko Vinni ~(SDHCI_DEFAULT_BOUNDARY_SIZE - 1)) + 2300f6a03cbfSMikko Vinni SDHCI_DEFAULT_BOUNDARY_SIZE; 2301f6a03cbfSMikko Vinni host->data->bytes_xfered = dmanow - dmastart; 2302f6a03cbfSMikko Vinni DBG("%s: DMA base 0x%08x, transferred 0x%06x bytes," 2303f6a03cbfSMikko Vinni " next 0x%08x\n", 2304f6a03cbfSMikko Vinni mmc_hostname(host->mmc), dmastart, 2305f6a03cbfSMikko Vinni host->data->bytes_xfered, dmanow); 2306f6a03cbfSMikko Vinni sdhci_writel(host, dmanow, SDHCI_DMA_ADDRESS); 2307f6a03cbfSMikko Vinni } 23086ba736a1SPierre Ossman 2309e538fbe8SPierre Ossman if (intmask & SDHCI_INT_DATA_END) { 2310e538fbe8SPierre Ossman if (host->cmd) { 2311e538fbe8SPierre Ossman /* 2312e538fbe8SPierre Ossman * Data managed to finish before the 2313e538fbe8SPierre Ossman * command completed. Make sure we do 2314e538fbe8SPierre Ossman * things in the proper order. 2315e538fbe8SPierre Ossman */ 2316e538fbe8SPierre Ossman host->data_early = 1; 2317e538fbe8SPierre Ossman } else { 23181c6a0718SPierre Ossman sdhci_finish_data(host); 23191c6a0718SPierre Ossman } 23201c6a0718SPierre Ossman } 2321e538fbe8SPierre Ossman } 2322e538fbe8SPierre Ossman } 23231c6a0718SPierre Ossman 23241c6a0718SPierre Ossman static irqreturn_t sdhci_irq(int irq, void *dev_id) 23251c6a0718SPierre Ossman { 23261c6a0718SPierre Ossman irqreturn_t result; 23271c6a0718SPierre Ossman struct sdhci_host *host = dev_id; 23286379b237SAlexander Stein u32 intmask, unexpected = 0; 23296379b237SAlexander Stein int cardint = 0, max_loops = 16; 23301c6a0718SPierre Ossman 23311c6a0718SPierre Ossman spin_lock(&host->lock); 23321c6a0718SPierre Ossman 233366fd8ad5SAdrian Hunter if (host->runtime_suspended) { 233466fd8ad5SAdrian Hunter spin_unlock(&host->lock); 2335a3c76eb9SGirish K S pr_warning("%s: got irq while runtime suspended\n", 233666fd8ad5SAdrian Hunter mmc_hostname(host->mmc)); 233766fd8ad5SAdrian Hunter return IRQ_HANDLED; 233866fd8ad5SAdrian Hunter } 233966fd8ad5SAdrian Hunter 23404e4141a5SAnton Vorontsov intmask = sdhci_readl(host, SDHCI_INT_STATUS); 23411c6a0718SPierre Ossman 23421c6a0718SPierre Ossman if (!intmask || intmask == 0xffffffff) { 23431c6a0718SPierre Ossman result = IRQ_NONE; 23441c6a0718SPierre Ossman goto out; 23451c6a0718SPierre Ossman } 23461c6a0718SPierre Ossman 23476379b237SAlexander Stein again: 2348b69c9058SPierre Ossman DBG("*** %s got interrupt: 0x%08x\n", 2349b69c9058SPierre Ossman mmc_hostname(host->mmc), intmask); 23501c6a0718SPierre Ossman 23511c6a0718SPierre Ossman if (intmask & (SDHCI_INT_CARD_INSERT | SDHCI_INT_CARD_REMOVE)) { 2352d25928d1SShawn Guo u32 present = sdhci_readl(host, SDHCI_PRESENT_STATE) & 2353d25928d1SShawn Guo SDHCI_CARD_PRESENT; 2354d25928d1SShawn Guo 2355d25928d1SShawn Guo /* 2356d25928d1SShawn Guo * There is a observation on i.mx esdhc. INSERT bit will be 2357d25928d1SShawn Guo * immediately set again when it gets cleared, if a card is 2358d25928d1SShawn Guo * inserted. We have to mask the irq to prevent interrupt 2359d25928d1SShawn Guo * storm which will freeze the system. And the REMOVE gets 2360d25928d1SShawn Guo * the same situation. 2361d25928d1SShawn Guo * 2362d25928d1SShawn Guo * More testing are needed here to ensure it works for other 2363d25928d1SShawn Guo * platforms though. 2364d25928d1SShawn Guo */ 2365d25928d1SShawn Guo sdhci_mask_irqs(host, present ? SDHCI_INT_CARD_INSERT : 2366d25928d1SShawn Guo SDHCI_INT_CARD_REMOVE); 2367d25928d1SShawn Guo sdhci_unmask_irqs(host, present ? SDHCI_INT_CARD_REMOVE : 2368d25928d1SShawn Guo SDHCI_INT_CARD_INSERT); 2369d25928d1SShawn Guo 23704e4141a5SAnton Vorontsov sdhci_writel(host, intmask & (SDHCI_INT_CARD_INSERT | 23714e4141a5SAnton Vorontsov SDHCI_INT_CARD_REMOVE), SDHCI_INT_STATUS); 2372d25928d1SShawn Guo intmask &= ~(SDHCI_INT_CARD_INSERT | SDHCI_INT_CARD_REMOVE); 23731c6a0718SPierre Ossman tasklet_schedule(&host->card_tasklet); 23741c6a0718SPierre Ossman } 23751c6a0718SPierre Ossman 23761c6a0718SPierre Ossman if (intmask & SDHCI_INT_CMD_MASK) { 23774e4141a5SAnton Vorontsov sdhci_writel(host, intmask & SDHCI_INT_CMD_MASK, 23784e4141a5SAnton Vorontsov SDHCI_INT_STATUS); 23791c6a0718SPierre Ossman sdhci_cmd_irq(host, intmask & SDHCI_INT_CMD_MASK); 23801c6a0718SPierre Ossman } 23811c6a0718SPierre Ossman 23821c6a0718SPierre Ossman if (intmask & SDHCI_INT_DATA_MASK) { 23834e4141a5SAnton Vorontsov sdhci_writel(host, intmask & SDHCI_INT_DATA_MASK, 23844e4141a5SAnton Vorontsov SDHCI_INT_STATUS); 23851c6a0718SPierre Ossman sdhci_data_irq(host, intmask & SDHCI_INT_DATA_MASK); 23861c6a0718SPierre Ossman } 23871c6a0718SPierre Ossman 23881c6a0718SPierre Ossman intmask &= ~(SDHCI_INT_CMD_MASK | SDHCI_INT_DATA_MASK); 23891c6a0718SPierre Ossman 2390964f9ce2SPierre Ossman intmask &= ~SDHCI_INT_ERROR; 2391964f9ce2SPierre Ossman 23921c6a0718SPierre Ossman if (intmask & SDHCI_INT_BUS_POWER) { 2393a3c76eb9SGirish K S pr_err("%s: Card is consuming too much power!\n", 23941c6a0718SPierre Ossman mmc_hostname(host->mmc)); 23954e4141a5SAnton Vorontsov sdhci_writel(host, SDHCI_INT_BUS_POWER, SDHCI_INT_STATUS); 23961c6a0718SPierre Ossman } 23971c6a0718SPierre Ossman 23989d26a5d3SRolf Eike Beer intmask &= ~SDHCI_INT_BUS_POWER; 23991c6a0718SPierre Ossman 2400f75979b7SPierre Ossman if (intmask & SDHCI_INT_CARD_INT) 2401f75979b7SPierre Ossman cardint = 1; 2402f75979b7SPierre Ossman 2403f75979b7SPierre Ossman intmask &= ~SDHCI_INT_CARD_INT; 2404f75979b7SPierre Ossman 24051c6a0718SPierre Ossman if (intmask) { 24066379b237SAlexander Stein unexpected |= intmask; 24074e4141a5SAnton Vorontsov sdhci_writel(host, intmask, SDHCI_INT_STATUS); 24081c6a0718SPierre Ossman } 24091c6a0718SPierre Ossman 24101c6a0718SPierre Ossman result = IRQ_HANDLED; 24111c6a0718SPierre Ossman 24126379b237SAlexander Stein intmask = sdhci_readl(host, SDHCI_INT_STATUS); 24136379b237SAlexander Stein if (intmask && --max_loops) 24146379b237SAlexander Stein goto again; 24151c6a0718SPierre Ossman out: 24161c6a0718SPierre Ossman spin_unlock(&host->lock); 24171c6a0718SPierre Ossman 24186379b237SAlexander Stein if (unexpected) { 24196379b237SAlexander Stein pr_err("%s: Unexpected interrupt 0x%08x.\n", 24206379b237SAlexander Stein mmc_hostname(host->mmc), unexpected); 24216379b237SAlexander Stein sdhci_dumpregs(host); 24226379b237SAlexander Stein } 2423f75979b7SPierre Ossman /* 2424f75979b7SPierre Ossman * We have to delay this as it calls back into the driver. 2425f75979b7SPierre Ossman */ 2426f75979b7SPierre Ossman if (cardint) 2427f75979b7SPierre Ossman mmc_signal_sdio_irq(host->mmc); 2428f75979b7SPierre Ossman 24291c6a0718SPierre Ossman return result; 24301c6a0718SPierre Ossman } 24311c6a0718SPierre Ossman 24321c6a0718SPierre Ossman /*****************************************************************************\ 24331c6a0718SPierre Ossman * * 24341c6a0718SPierre Ossman * Suspend/resume * 24351c6a0718SPierre Ossman * * 24361c6a0718SPierre Ossman \*****************************************************************************/ 24371c6a0718SPierre Ossman 24381c6a0718SPierre Ossman #ifdef CONFIG_PM 24391c6a0718SPierre Ossman 244029495aa0SManuel Lauss int sdhci_suspend_host(struct sdhci_host *host) 24411c6a0718SPierre Ossman { 2442b8c86fc5SPierre Ossman int ret; 24431c6a0718SPierre Ossman 2444a1b13b4eSChris Ball if (host->ops->platform_suspend) 2445a1b13b4eSChris Ball host->ops->platform_suspend(host); 2446a1b13b4eSChris Ball 24477260cf5eSAnton Vorontsov sdhci_disable_card_detection(host); 24487260cf5eSAnton Vorontsov 2449cf2b5eeaSArindam Nath /* Disable tuning since we are suspending */ 2450973905feSAaron Lu if (host->flags & SDHCI_USING_RETUNING_TIMER) { 2451c6ced0dbSAaron Lu del_timer_sync(&host->tuning_timer); 2452cf2b5eeaSArindam Nath host->flags &= ~SDHCI_NEEDS_RETUNING; 2453cf2b5eeaSArindam Nath } 2454cf2b5eeaSArindam Nath 24551a13f8faSMatt Fleming ret = mmc_suspend_host(host->mmc); 245638a60ea2SAaron Lu if (ret) { 2457973905feSAaron Lu if (host->flags & SDHCI_USING_RETUNING_TIMER) { 245838a60ea2SAaron Lu host->flags |= SDHCI_NEEDS_RETUNING; 245938a60ea2SAaron Lu mod_timer(&host->tuning_timer, jiffies + 246038a60ea2SAaron Lu host->tuning_count * HZ); 246138a60ea2SAaron Lu } 246238a60ea2SAaron Lu 246338a60ea2SAaron Lu sdhci_enable_card_detection(host); 246438a60ea2SAaron Lu 24651c6a0718SPierre Ossman return ret; 246638a60ea2SAaron Lu } 24671c6a0718SPierre Ossman 2468b8c86fc5SPierre Ossman free_irq(host->irq, host); 2469b8c86fc5SPierre Ossman 24709bea3c85SMarek Szyprowski return ret; 2471b8c86fc5SPierre Ossman } 2472b8c86fc5SPierre Ossman 2473b8c86fc5SPierre Ossman EXPORT_SYMBOL_GPL(sdhci_suspend_host); 2474b8c86fc5SPierre Ossman 2475b8c86fc5SPierre Ossman int sdhci_resume_host(struct sdhci_host *host) 2476b8c86fc5SPierre Ossman { 2477b8c86fc5SPierre Ossman int ret; 2478b8c86fc5SPierre Ossman 2479a13abc7bSRichard Röjfors if (host->flags & (SDHCI_USE_SDMA | SDHCI_USE_ADMA)) { 2480b8c86fc5SPierre Ossman if (host->ops->enable_dma) 2481b8c86fc5SPierre Ossman host->ops->enable_dma(host); 2482b8c86fc5SPierre Ossman } 2483b8c86fc5SPierre Ossman 2484b8c86fc5SPierre Ossman ret = request_irq(host->irq, sdhci_irq, IRQF_SHARED, 2485b8c86fc5SPierre Ossman mmc_hostname(host->mmc), host); 24861c6a0718SPierre Ossman if (ret) 24871c6a0718SPierre Ossman return ret; 2488b8c86fc5SPierre Ossman 24896308d290SAdrian Hunter if ((host->mmc->pm_flags & MMC_PM_KEEP_POWER) && 24906308d290SAdrian Hunter (host->quirks2 & SDHCI_QUIRK2_HOST_OFF_CARD_ON)) { 24916308d290SAdrian Hunter /* Card keeps power but host controller does not */ 24926308d290SAdrian Hunter sdhci_init(host, 0); 24936308d290SAdrian Hunter host->pwr = 0; 24946308d290SAdrian Hunter host->clock = 0; 24956308d290SAdrian Hunter sdhci_do_set_ios(host, &host->mmc->ios); 24966308d290SAdrian Hunter } else { 24972f4cbb3dSNicolas Pitre sdhci_init(host, (host->mmc->pm_flags & MMC_PM_KEEP_POWER)); 24981c6a0718SPierre Ossman mmiowb(); 24996308d290SAdrian Hunter } 2500b8c86fc5SPierre Ossman 2501b8c86fc5SPierre Ossman ret = mmc_resume_host(host->mmc); 25027260cf5eSAnton Vorontsov sdhci_enable_card_detection(host); 25037260cf5eSAnton Vorontsov 2504a1b13b4eSChris Ball if (host->ops->platform_resume) 2505a1b13b4eSChris Ball host->ops->platform_resume(host); 2506a1b13b4eSChris Ball 2507cf2b5eeaSArindam Nath /* Set the re-tuning expiration flag */ 2508973905feSAaron Lu if (host->flags & SDHCI_USING_RETUNING_TIMER) 2509cf2b5eeaSArindam Nath host->flags |= SDHCI_NEEDS_RETUNING; 2510cf2b5eeaSArindam Nath 25112f4cbb3dSNicolas Pitre return ret; 25121c6a0718SPierre Ossman } 25131c6a0718SPierre Ossman 2514b8c86fc5SPierre Ossman EXPORT_SYMBOL_GPL(sdhci_resume_host); 25151c6a0718SPierre Ossman 25165f619704SDaniel Drake void sdhci_enable_irq_wakeups(struct sdhci_host *host) 25175f619704SDaniel Drake { 25185f619704SDaniel Drake u8 val; 25195f619704SDaniel Drake val = sdhci_readb(host, SDHCI_WAKE_UP_CONTROL); 25205f619704SDaniel Drake val |= SDHCI_WAKE_ON_INT; 25215f619704SDaniel Drake sdhci_writeb(host, val, SDHCI_WAKE_UP_CONTROL); 25225f619704SDaniel Drake } 25235f619704SDaniel Drake 25245f619704SDaniel Drake EXPORT_SYMBOL_GPL(sdhci_enable_irq_wakeups); 25255f619704SDaniel Drake 25261c6a0718SPierre Ossman #endif /* CONFIG_PM */ 25271c6a0718SPierre Ossman 252866fd8ad5SAdrian Hunter #ifdef CONFIG_PM_RUNTIME 252966fd8ad5SAdrian Hunter 253066fd8ad5SAdrian Hunter static int sdhci_runtime_pm_get(struct sdhci_host *host) 253166fd8ad5SAdrian Hunter { 253266fd8ad5SAdrian Hunter return pm_runtime_get_sync(host->mmc->parent); 253366fd8ad5SAdrian Hunter } 253466fd8ad5SAdrian Hunter 253566fd8ad5SAdrian Hunter static int sdhci_runtime_pm_put(struct sdhci_host *host) 253666fd8ad5SAdrian Hunter { 253766fd8ad5SAdrian Hunter pm_runtime_mark_last_busy(host->mmc->parent); 253866fd8ad5SAdrian Hunter return pm_runtime_put_autosuspend(host->mmc->parent); 253966fd8ad5SAdrian Hunter } 254066fd8ad5SAdrian Hunter 254166fd8ad5SAdrian Hunter int sdhci_runtime_suspend_host(struct sdhci_host *host) 254266fd8ad5SAdrian Hunter { 254366fd8ad5SAdrian Hunter unsigned long flags; 254466fd8ad5SAdrian Hunter int ret = 0; 254566fd8ad5SAdrian Hunter 254666fd8ad5SAdrian Hunter /* Disable tuning since we are suspending */ 2547973905feSAaron Lu if (host->flags & SDHCI_USING_RETUNING_TIMER) { 254866fd8ad5SAdrian Hunter del_timer_sync(&host->tuning_timer); 254966fd8ad5SAdrian Hunter host->flags &= ~SDHCI_NEEDS_RETUNING; 255066fd8ad5SAdrian Hunter } 255166fd8ad5SAdrian Hunter 255266fd8ad5SAdrian Hunter spin_lock_irqsave(&host->lock, flags); 255366fd8ad5SAdrian Hunter sdhci_mask_irqs(host, SDHCI_INT_ALL_MASK); 255466fd8ad5SAdrian Hunter spin_unlock_irqrestore(&host->lock, flags); 255566fd8ad5SAdrian Hunter 255666fd8ad5SAdrian Hunter synchronize_irq(host->irq); 255766fd8ad5SAdrian Hunter 255866fd8ad5SAdrian Hunter spin_lock_irqsave(&host->lock, flags); 255966fd8ad5SAdrian Hunter host->runtime_suspended = true; 256066fd8ad5SAdrian Hunter spin_unlock_irqrestore(&host->lock, flags); 256166fd8ad5SAdrian Hunter 256266fd8ad5SAdrian Hunter return ret; 256366fd8ad5SAdrian Hunter } 256466fd8ad5SAdrian Hunter EXPORT_SYMBOL_GPL(sdhci_runtime_suspend_host); 256566fd8ad5SAdrian Hunter 256666fd8ad5SAdrian Hunter int sdhci_runtime_resume_host(struct sdhci_host *host) 256766fd8ad5SAdrian Hunter { 256866fd8ad5SAdrian Hunter unsigned long flags; 256966fd8ad5SAdrian Hunter int ret = 0, host_flags = host->flags; 257066fd8ad5SAdrian Hunter 257166fd8ad5SAdrian Hunter if (host_flags & (SDHCI_USE_SDMA | SDHCI_USE_ADMA)) { 257266fd8ad5SAdrian Hunter if (host->ops->enable_dma) 257366fd8ad5SAdrian Hunter host->ops->enable_dma(host); 257466fd8ad5SAdrian Hunter } 257566fd8ad5SAdrian Hunter 257666fd8ad5SAdrian Hunter sdhci_init(host, 0); 257766fd8ad5SAdrian Hunter 257866fd8ad5SAdrian Hunter /* Force clock and power re-program */ 257966fd8ad5SAdrian Hunter host->pwr = 0; 258066fd8ad5SAdrian Hunter host->clock = 0; 258166fd8ad5SAdrian Hunter sdhci_do_set_ios(host, &host->mmc->ios); 258266fd8ad5SAdrian Hunter 258366fd8ad5SAdrian Hunter sdhci_do_start_signal_voltage_switch(host, &host->mmc->ios); 258466fd8ad5SAdrian Hunter if (host_flags & SDHCI_PV_ENABLED) 258566fd8ad5SAdrian Hunter sdhci_do_enable_preset_value(host, true); 258666fd8ad5SAdrian Hunter 258766fd8ad5SAdrian Hunter /* Set the re-tuning expiration flag */ 2588973905feSAaron Lu if (host->flags & SDHCI_USING_RETUNING_TIMER) 258966fd8ad5SAdrian Hunter host->flags |= SDHCI_NEEDS_RETUNING; 259066fd8ad5SAdrian Hunter 259166fd8ad5SAdrian Hunter spin_lock_irqsave(&host->lock, flags); 259266fd8ad5SAdrian Hunter 259366fd8ad5SAdrian Hunter host->runtime_suspended = false; 259466fd8ad5SAdrian Hunter 259566fd8ad5SAdrian Hunter /* Enable SDIO IRQ */ 259666fd8ad5SAdrian Hunter if ((host->flags & SDHCI_SDIO_IRQ_ENABLED)) 259766fd8ad5SAdrian Hunter sdhci_enable_sdio_irq_nolock(host, true); 259866fd8ad5SAdrian Hunter 259966fd8ad5SAdrian Hunter /* Enable Card Detection */ 260066fd8ad5SAdrian Hunter sdhci_enable_card_detection(host); 260166fd8ad5SAdrian Hunter 260266fd8ad5SAdrian Hunter spin_unlock_irqrestore(&host->lock, flags); 260366fd8ad5SAdrian Hunter 260466fd8ad5SAdrian Hunter return ret; 260566fd8ad5SAdrian Hunter } 260666fd8ad5SAdrian Hunter EXPORT_SYMBOL_GPL(sdhci_runtime_resume_host); 260766fd8ad5SAdrian Hunter 260866fd8ad5SAdrian Hunter #endif 260966fd8ad5SAdrian Hunter 26101c6a0718SPierre Ossman /*****************************************************************************\ 26111c6a0718SPierre Ossman * * 2612b8c86fc5SPierre Ossman * Device allocation/registration * 26131c6a0718SPierre Ossman * * 26141c6a0718SPierre Ossman \*****************************************************************************/ 26151c6a0718SPierre Ossman 2616b8c86fc5SPierre Ossman struct sdhci_host *sdhci_alloc_host(struct device *dev, 2617b8c86fc5SPierre Ossman size_t priv_size) 26181c6a0718SPierre Ossman { 26191c6a0718SPierre Ossman struct mmc_host *mmc; 26201c6a0718SPierre Ossman struct sdhci_host *host; 26211c6a0718SPierre Ossman 2622b8c86fc5SPierre Ossman WARN_ON(dev == NULL); 26231c6a0718SPierre Ossman 2624b8c86fc5SPierre Ossman mmc = mmc_alloc_host(sizeof(struct sdhci_host) + priv_size, dev); 26251c6a0718SPierre Ossman if (!mmc) 2626b8c86fc5SPierre Ossman return ERR_PTR(-ENOMEM); 26271c6a0718SPierre Ossman 26281c6a0718SPierre Ossman host = mmc_priv(mmc); 26291c6a0718SPierre Ossman host->mmc = mmc; 26301c6a0718SPierre Ossman 2631b8c86fc5SPierre Ossman return host; 26321c6a0718SPierre Ossman } 26331c6a0718SPierre Ossman 2634b8c86fc5SPierre Ossman EXPORT_SYMBOL_GPL(sdhci_alloc_host); 2635b8c86fc5SPierre Ossman 2636b8c86fc5SPierre Ossman int sdhci_add_host(struct sdhci_host *host) 2637b8c86fc5SPierre Ossman { 2638b8c86fc5SPierre Ossman struct mmc_host *mmc; 2639bd6a8c30SPhilip Rakity u32 caps[2] = {0, 0}; 2640f2119df6SArindam Nath u32 max_current_caps; 2641f2119df6SArindam Nath unsigned int ocr_avail; 2642b8c86fc5SPierre Ossman int ret; 2643b8c86fc5SPierre Ossman 2644b8c86fc5SPierre Ossman WARN_ON(host == NULL); 2645b8c86fc5SPierre Ossman if (host == NULL) 2646b8c86fc5SPierre Ossman return -EINVAL; 2647b8c86fc5SPierre Ossman 2648b8c86fc5SPierre Ossman mmc = host->mmc; 2649b8c86fc5SPierre Ossman 2650b8c86fc5SPierre Ossman if (debug_quirks) 2651b8c86fc5SPierre Ossman host->quirks = debug_quirks; 265266fd8ad5SAdrian Hunter if (debug_quirks2) 265366fd8ad5SAdrian Hunter host->quirks2 = debug_quirks2; 2654b8c86fc5SPierre Ossman 26551c6a0718SPierre Ossman sdhci_reset(host, SDHCI_RESET_ALL); 26561c6a0718SPierre Ossman 26574e4141a5SAnton Vorontsov host->version = sdhci_readw(host, SDHCI_HOST_VERSION); 26582134a922SPierre Ossman host->version = (host->version & SDHCI_SPEC_VER_MASK) 26592134a922SPierre Ossman >> SDHCI_SPEC_VER_SHIFT; 266085105c53SZhangfei Gao if (host->version > SDHCI_SPEC_300) { 2661a3c76eb9SGirish K S pr_err("%s: Unknown controller version (%d). " 2662b69c9058SPierre Ossman "You may experience problems.\n", mmc_hostname(mmc), 26632134a922SPierre Ossman host->version); 26641c6a0718SPierre Ossman } 26651c6a0718SPierre Ossman 2666f2119df6SArindam Nath caps[0] = (host->quirks & SDHCI_QUIRK_MISSING_CAPS) ? host->caps : 2667ccc92c23SMaxim Levitsky sdhci_readl(host, SDHCI_CAPABILITIES); 26681c6a0718SPierre Ossman 2669bd6a8c30SPhilip Rakity if (host->version >= SDHCI_SPEC_300) 2670bd6a8c30SPhilip Rakity caps[1] = (host->quirks & SDHCI_QUIRK_MISSING_CAPS) ? 2671bd6a8c30SPhilip Rakity host->caps1 : 2672bd6a8c30SPhilip Rakity sdhci_readl(host, SDHCI_CAPABILITIES_1); 2673f2119df6SArindam Nath 2674b8c86fc5SPierre Ossman if (host->quirks & SDHCI_QUIRK_FORCE_DMA) 2675a13abc7bSRichard Röjfors host->flags |= SDHCI_USE_SDMA; 2676f2119df6SArindam Nath else if (!(caps[0] & SDHCI_CAN_DO_SDMA)) 2677a13abc7bSRichard Röjfors DBG("Controller doesn't have SDMA capability\n"); 26781c6a0718SPierre Ossman else 2679a13abc7bSRichard Röjfors host->flags |= SDHCI_USE_SDMA; 26801c6a0718SPierre Ossman 2681b8c86fc5SPierre Ossman if ((host->quirks & SDHCI_QUIRK_BROKEN_DMA) && 2682a13abc7bSRichard Röjfors (host->flags & SDHCI_USE_SDMA)) { 2683cee687ceSRolf Eike Beer DBG("Disabling DMA as it is marked broken\n"); 2684a13abc7bSRichard Röjfors host->flags &= ~SDHCI_USE_SDMA; 26857c168e3dSFeng Tang } 26867c168e3dSFeng Tang 2687f2119df6SArindam Nath if ((host->version >= SDHCI_SPEC_200) && 2688f2119df6SArindam Nath (caps[0] & SDHCI_CAN_DO_ADMA2)) 26892134a922SPierre Ossman host->flags |= SDHCI_USE_ADMA; 26902134a922SPierre Ossman 26912134a922SPierre Ossman if ((host->quirks & SDHCI_QUIRK_BROKEN_ADMA) && 26922134a922SPierre Ossman (host->flags & SDHCI_USE_ADMA)) { 26932134a922SPierre Ossman DBG("Disabling ADMA as it is marked broken\n"); 26942134a922SPierre Ossman host->flags &= ~SDHCI_USE_ADMA; 26952134a922SPierre Ossman } 26962134a922SPierre Ossman 2697a13abc7bSRichard Röjfors if (host->flags & (SDHCI_USE_SDMA | SDHCI_USE_ADMA)) { 2698b8c86fc5SPierre Ossman if (host->ops->enable_dma) { 2699b8c86fc5SPierre Ossman if (host->ops->enable_dma(host)) { 2700a3c76eb9SGirish K S pr_warning("%s: No suitable DMA " 2701b8c86fc5SPierre Ossman "available. Falling back to PIO.\n", 2702b8c86fc5SPierre Ossman mmc_hostname(mmc)); 2703a13abc7bSRichard Röjfors host->flags &= 2704a13abc7bSRichard Röjfors ~(SDHCI_USE_SDMA | SDHCI_USE_ADMA); 27051c6a0718SPierre Ossman } 27061c6a0718SPierre Ossman } 2707b8c86fc5SPierre Ossman } 27081c6a0718SPierre Ossman 27092134a922SPierre Ossman if (host->flags & SDHCI_USE_ADMA) { 27102134a922SPierre Ossman /* 27112134a922SPierre Ossman * We need to allocate descriptors for all sg entries 27122134a922SPierre Ossman * (128) and potentially one alignment transfer for 27132134a922SPierre Ossman * each of those entries. 27142134a922SPierre Ossman */ 27152134a922SPierre Ossman host->adma_desc = kmalloc((128 * 2 + 1) * 4, GFP_KERNEL); 27162134a922SPierre Ossman host->align_buffer = kmalloc(128 * 4, GFP_KERNEL); 27172134a922SPierre Ossman if (!host->adma_desc || !host->align_buffer) { 27182134a922SPierre Ossman kfree(host->adma_desc); 27192134a922SPierre Ossman kfree(host->align_buffer); 2720a3c76eb9SGirish K S pr_warning("%s: Unable to allocate ADMA " 27212134a922SPierre Ossman "buffers. Falling back to standard DMA.\n", 27222134a922SPierre Ossman mmc_hostname(mmc)); 27232134a922SPierre Ossman host->flags &= ~SDHCI_USE_ADMA; 27242134a922SPierre Ossman } 27252134a922SPierre Ossman } 27262134a922SPierre Ossman 27277659150cSPierre Ossman /* 27287659150cSPierre Ossman * If we use DMA, then it's up to the caller to set the DMA 27297659150cSPierre Ossman * mask, but PIO does not need the hw shim so we set a new 27307659150cSPierre Ossman * mask here in that case. 27317659150cSPierre Ossman */ 2732a13abc7bSRichard Röjfors if (!(host->flags & (SDHCI_USE_SDMA | SDHCI_USE_ADMA))) { 27337659150cSPierre Ossman host->dma_mask = DMA_BIT_MASK(64); 27347659150cSPierre Ossman mmc_dev(host->mmc)->dma_mask = &host->dma_mask; 27357659150cSPierre Ossman } 27361c6a0718SPierre Ossman 2737c4687d5fSZhangfei Gao if (host->version >= SDHCI_SPEC_300) 2738f2119df6SArindam Nath host->max_clk = (caps[0] & SDHCI_CLOCK_V3_BASE_MASK) 2739c4687d5fSZhangfei Gao >> SDHCI_CLOCK_BASE_SHIFT; 2740c4687d5fSZhangfei Gao else 2741f2119df6SArindam Nath host->max_clk = (caps[0] & SDHCI_CLOCK_BASE_MASK) 2742c4687d5fSZhangfei Gao >> SDHCI_CLOCK_BASE_SHIFT; 2743c4687d5fSZhangfei Gao 27444240ff0aSBen Dooks host->max_clk *= 1000000; 2745f27f47efSAnton Vorontsov if (host->max_clk == 0 || host->quirks & 2746f27f47efSAnton Vorontsov SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN) { 27474240ff0aSBen Dooks if (!host->ops->get_max_clock) { 2748a3c76eb9SGirish K S pr_err("%s: Hardware doesn't specify base clock " 2749b69c9058SPierre Ossman "frequency.\n", mmc_hostname(mmc)); 2750b8c86fc5SPierre Ossman return -ENODEV; 27511c6a0718SPierre Ossman } 27524240ff0aSBen Dooks host->max_clk = host->ops->get_max_clock(host); 27534240ff0aSBen Dooks } 27541c6a0718SPierre Ossman 27551c6a0718SPierre Ossman /* 2756c3ed3877SArindam Nath * In case of Host Controller v3.00, find out whether clock 2757c3ed3877SArindam Nath * multiplier is supported. 2758c3ed3877SArindam Nath */ 2759c3ed3877SArindam Nath host->clk_mul = (caps[1] & SDHCI_CLOCK_MUL_MASK) >> 2760c3ed3877SArindam Nath SDHCI_CLOCK_MUL_SHIFT; 2761c3ed3877SArindam Nath 2762c3ed3877SArindam Nath /* 2763c3ed3877SArindam Nath * In case the value in Clock Multiplier is 0, then programmable 2764c3ed3877SArindam Nath * clock mode is not supported, otherwise the actual clock 2765c3ed3877SArindam Nath * multiplier is one more than the value of Clock Multiplier 2766c3ed3877SArindam Nath * in the Capabilities Register. 2767c3ed3877SArindam Nath */ 2768c3ed3877SArindam Nath if (host->clk_mul) 2769c3ed3877SArindam Nath host->clk_mul += 1; 2770c3ed3877SArindam Nath 2771c3ed3877SArindam Nath /* 27721c6a0718SPierre Ossman * Set host parameters. 27731c6a0718SPierre Ossman */ 27741c6a0718SPierre Ossman mmc->ops = &sdhci_ops; 2775c3ed3877SArindam Nath mmc->f_max = host->max_clk; 2776ce5f036bSMarek Szyprowski if (host->ops->get_min_clock) 2777a9e58f25SAnton Vorontsov mmc->f_min = host->ops->get_min_clock(host); 2778c3ed3877SArindam Nath else if (host->version >= SDHCI_SPEC_300) { 2779c3ed3877SArindam Nath if (host->clk_mul) { 2780c3ed3877SArindam Nath mmc->f_min = (host->max_clk * host->clk_mul) / 1024; 2781c3ed3877SArindam Nath mmc->f_max = host->max_clk * host->clk_mul; 2782c3ed3877SArindam Nath } else 27830397526dSZhangfei Gao mmc->f_min = host->max_clk / SDHCI_MAX_DIV_SPEC_300; 2784c3ed3877SArindam Nath } else 27850397526dSZhangfei Gao mmc->f_min = host->max_clk / SDHCI_MAX_DIV_SPEC_200; 278615ec4461SPhilip Rakity 2787272308caSAndy Shevchenko host->timeout_clk = 2788272308caSAndy Shevchenko (caps[0] & SDHCI_TIMEOUT_CLK_MASK) >> SDHCI_TIMEOUT_CLK_SHIFT; 2789272308caSAndy Shevchenko if (host->timeout_clk == 0) { 2790272308caSAndy Shevchenko if (host->ops->get_timeout_clock) { 2791272308caSAndy Shevchenko host->timeout_clk = host->ops->get_timeout_clock(host); 2792272308caSAndy Shevchenko } else if (!(host->quirks & 2793272308caSAndy Shevchenko SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK)) { 2794a3c76eb9SGirish K S pr_err("%s: Hardware doesn't specify timeout clock " 2795272308caSAndy Shevchenko "frequency.\n", mmc_hostname(mmc)); 2796272308caSAndy Shevchenko return -ENODEV; 2797272308caSAndy Shevchenko } 2798272308caSAndy Shevchenko } 2799272308caSAndy Shevchenko if (caps[0] & SDHCI_TIMEOUT_CLK_UNIT) 2800272308caSAndy Shevchenko host->timeout_clk *= 1000; 2801272308caSAndy Shevchenko 2802272308caSAndy Shevchenko if (host->quirks & SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK) 280365be3fefSAndy Shevchenko host->timeout_clk = mmc->f_max / 1000; 2804272308caSAndy Shevchenko 280558d1246dSAdrian Hunter mmc->max_discard_to = (1 << 27) / host->timeout_clk; 280658d1246dSAdrian Hunter 2807e89d456fSAndrei Warkentin mmc->caps |= MMC_CAP_SDIO_IRQ | MMC_CAP_ERASE | MMC_CAP_CMD23; 2808e89d456fSAndrei Warkentin 2809e89d456fSAndrei Warkentin if (host->quirks & SDHCI_QUIRK_MULTIBLOCK_READ_ACMD12) 2810e89d456fSAndrei Warkentin host->flags |= SDHCI_AUTO_CMD12; 28115fe23c7fSAnton Vorontsov 28128edf6371SAndrei Warkentin /* Auto-CMD23 stuff only works in ADMA or PIO. */ 28134f3d3e9bSAndrei Warkentin if ((host->version >= SDHCI_SPEC_300) && 28148edf6371SAndrei Warkentin ((host->flags & SDHCI_USE_ADMA) || 28154f3d3e9bSAndrei Warkentin !(host->flags & SDHCI_USE_SDMA))) { 28168edf6371SAndrei Warkentin host->flags |= SDHCI_AUTO_CMD23; 28178edf6371SAndrei Warkentin DBG("%s: Auto-CMD23 available\n", mmc_hostname(mmc)); 28188edf6371SAndrei Warkentin } else { 28198edf6371SAndrei Warkentin DBG("%s: Auto-CMD23 unavailable\n", mmc_hostname(mmc)); 28208edf6371SAndrei Warkentin } 28218edf6371SAndrei Warkentin 282215ec4461SPhilip Rakity /* 282315ec4461SPhilip Rakity * A controller may support 8-bit width, but the board itself 282415ec4461SPhilip Rakity * might not have the pins brought out. Boards that support 282515ec4461SPhilip Rakity * 8-bit width must set "mmc->caps |= MMC_CAP_8_BIT_DATA;" in 282615ec4461SPhilip Rakity * their platform code before calling sdhci_add_host(), and we 282715ec4461SPhilip Rakity * won't assume 8-bit width for hosts without that CAP. 282815ec4461SPhilip Rakity */ 28295fe23c7fSAnton Vorontsov if (!(host->quirks & SDHCI_QUIRK_FORCE_1_BIT_DATA)) 283015ec4461SPhilip Rakity mmc->caps |= MMC_CAP_4_BIT_DATA; 28311c6a0718SPierre Ossman 2832f2119df6SArindam Nath if (caps[0] & SDHCI_CAN_DO_HISPD) 2833a29e7e18SZhangfei Gao mmc->caps |= MMC_CAP_SD_HIGHSPEED | MMC_CAP_MMC_HIGHSPEED; 28341c6a0718SPierre Ossman 2835176d1ed4SJaehoon Chung if ((host->quirks & SDHCI_QUIRK_BROKEN_CARD_DETECTION) && 2836eb6d5ae1SDaniel Drake !(host->mmc->caps & MMC_CAP_NONREMOVABLE)) 283768d1fb7eSAnton Vorontsov mmc->caps |= MMC_CAP_NEEDS_POLL; 283868d1fb7eSAnton Vorontsov 2839*6231f3deSPhilip Rakity /* If vqmmc regulator and no 1.8V signalling, then there's no UHS */ 2840*6231f3deSPhilip Rakity host->vqmmc = regulator_get(mmc_dev(mmc), "vqmmc"); 2841*6231f3deSPhilip Rakity if (IS_ERR(host->vqmmc)) { 2842*6231f3deSPhilip Rakity pr_info("%s: no vqmmc regulator found\n", mmc_hostname(mmc)); 2843*6231f3deSPhilip Rakity host->vqmmc = NULL; 2844*6231f3deSPhilip Rakity } 2845*6231f3deSPhilip Rakity else if (regulator_is_supported_voltage(host->vqmmc, 1800000, 1800000)) 2846*6231f3deSPhilip Rakity regulator_enable(host->vqmmc); 2847*6231f3deSPhilip Rakity else 2848*6231f3deSPhilip Rakity caps[1] &= ~(SDHCI_SUPPORT_SDR104 | SDHCI_SUPPORT_SDR50 | 2849*6231f3deSPhilip Rakity SDHCI_SUPPORT_DDR50); 2850*6231f3deSPhilip Rakity 28514188bba0SAl Cooper /* Any UHS-I mode in caps implies SDR12 and SDR25 support. */ 28524188bba0SAl Cooper if (caps[1] & (SDHCI_SUPPORT_SDR104 | SDHCI_SUPPORT_SDR50 | 28534188bba0SAl Cooper SDHCI_SUPPORT_DDR50)) 2854f2119df6SArindam Nath mmc->caps |= MMC_CAP_UHS_SDR12 | MMC_CAP_UHS_SDR25; 2855f2119df6SArindam Nath 2856f2119df6SArindam Nath /* SDR104 supports also implies SDR50 support */ 2857f2119df6SArindam Nath if (caps[1] & SDHCI_SUPPORT_SDR104) 2858f2119df6SArindam Nath mmc->caps |= MMC_CAP_UHS_SDR104 | MMC_CAP_UHS_SDR50; 2859f2119df6SArindam Nath else if (caps[1] & SDHCI_SUPPORT_SDR50) 2860f2119df6SArindam Nath mmc->caps |= MMC_CAP_UHS_SDR50; 2861f2119df6SArindam Nath 2862f2119df6SArindam Nath if (caps[1] & SDHCI_SUPPORT_DDR50) 2863f2119df6SArindam Nath mmc->caps |= MMC_CAP_UHS_DDR50; 2864f2119df6SArindam Nath 2865069c9f14SGirish K S /* Does the host need tuning for SDR50? */ 2866b513ea25SArindam Nath if (caps[1] & SDHCI_USE_SDR50_TUNING) 2867b513ea25SArindam Nath host->flags |= SDHCI_SDR50_NEEDS_TUNING; 2868b513ea25SArindam Nath 2869069c9f14SGirish K S /* Does the host need tuning for HS200? */ 2870069c9f14SGirish K S if (mmc->caps2 & MMC_CAP2_HS200) 2871069c9f14SGirish K S host->flags |= SDHCI_HS200_NEEDS_TUNING; 2872069c9f14SGirish K S 2873d6d50a15SArindam Nath /* Driver Type(s) (A, C, D) supported by the host */ 2874d6d50a15SArindam Nath if (caps[1] & SDHCI_DRIVER_TYPE_A) 2875d6d50a15SArindam Nath mmc->caps |= MMC_CAP_DRIVER_TYPE_A; 2876d6d50a15SArindam Nath if (caps[1] & SDHCI_DRIVER_TYPE_C) 2877d6d50a15SArindam Nath mmc->caps |= MMC_CAP_DRIVER_TYPE_C; 2878d6d50a15SArindam Nath if (caps[1] & SDHCI_DRIVER_TYPE_D) 2879d6d50a15SArindam Nath mmc->caps |= MMC_CAP_DRIVER_TYPE_D; 2880d6d50a15SArindam Nath 2881bec8726aSGirish K S /* 2882bec8726aSGirish K S * If Power Off Notify capability is enabled by the host, 2883bec8726aSGirish K S * set notify to short power off notify timeout value. 2884bec8726aSGirish K S */ 2885bec8726aSGirish K S if (mmc->caps2 & MMC_CAP2_POWEROFF_NOTIFY) 2886bec8726aSGirish K S mmc->power_notify_type = MMC_HOST_PW_NOTIFY_SHORT; 2887bec8726aSGirish K S else 2888bec8726aSGirish K S mmc->power_notify_type = MMC_HOST_PW_NOTIFY_NONE; 2889bec8726aSGirish K S 2890cf2b5eeaSArindam Nath /* Initial value for re-tuning timer count */ 2891cf2b5eeaSArindam Nath host->tuning_count = (caps[1] & SDHCI_RETUNING_TIMER_COUNT_MASK) >> 2892cf2b5eeaSArindam Nath SDHCI_RETUNING_TIMER_COUNT_SHIFT; 2893cf2b5eeaSArindam Nath 2894cf2b5eeaSArindam Nath /* 2895cf2b5eeaSArindam Nath * In case Re-tuning Timer is not disabled, the actual value of 2896cf2b5eeaSArindam Nath * re-tuning timer will be 2 ^ (n - 1). 2897cf2b5eeaSArindam Nath */ 2898cf2b5eeaSArindam Nath if (host->tuning_count) 2899cf2b5eeaSArindam Nath host->tuning_count = 1 << (host->tuning_count - 1); 2900cf2b5eeaSArindam Nath 2901cf2b5eeaSArindam Nath /* Re-tuning mode supported by the Host Controller */ 2902cf2b5eeaSArindam Nath host->tuning_mode = (caps[1] & SDHCI_RETUNING_MODE_MASK) >> 2903cf2b5eeaSArindam Nath SDHCI_RETUNING_MODE_SHIFT; 2904cf2b5eeaSArindam Nath 29058f230f45STakashi Iwai ocr_avail = 0; 2906bad37e1aSPhilip Rakity 2907bad37e1aSPhilip Rakity host->vmmc = regulator_get(mmc_dev(mmc), "vmmc"); 2908bad37e1aSPhilip Rakity if (IS_ERR(host->vmmc)) { 2909bad37e1aSPhilip Rakity pr_info("%s: no vmmc regulator found\n", mmc_hostname(mmc)); 2910bad37e1aSPhilip Rakity host->vmmc = NULL; 2911bad37e1aSPhilip Rakity } 2912bad37e1aSPhilip Rakity 291368737043SPhilip Rakity #ifdef CONFIG_REGULATOR 291468737043SPhilip Rakity if (host->vmmc) { 291568737043SPhilip Rakity ret = regulator_is_supported_voltage(host->vmmc, 3300000, 291668737043SPhilip Rakity 3300000); 291768737043SPhilip Rakity if ((ret <= 0) || (!(caps[0] & SDHCI_CAN_VDD_330))) 291868737043SPhilip Rakity caps[0] &= ~SDHCI_CAN_VDD_330; 291968737043SPhilip Rakity ret = regulator_is_supported_voltage(host->vmmc, 3000000, 292068737043SPhilip Rakity 3000000); 292168737043SPhilip Rakity if ((ret <= 0) || (!(caps[0] & SDHCI_CAN_VDD_300))) 292268737043SPhilip Rakity caps[0] &= ~SDHCI_CAN_VDD_300; 292368737043SPhilip Rakity ret = regulator_is_supported_voltage(host->vmmc, 1800000, 292468737043SPhilip Rakity 1800000); 292568737043SPhilip Rakity if ((ret <= 0) || (!(caps[0] & SDHCI_CAN_VDD_180))) 292668737043SPhilip Rakity caps[0] &= ~SDHCI_CAN_VDD_180; 292768737043SPhilip Rakity } 292868737043SPhilip Rakity #endif /* CONFIG_REGULATOR */ 292968737043SPhilip Rakity 2930f2119df6SArindam Nath /* 2931f2119df6SArindam Nath * According to SD Host Controller spec v3.00, if the Host System 2932f2119df6SArindam Nath * can afford more than 150mA, Host Driver should set XPC to 1. Also 2933f2119df6SArindam Nath * the value is meaningful only if Voltage Support in the Capabilities 2934f2119df6SArindam Nath * register is set. The actual current value is 4 times the register 2935f2119df6SArindam Nath * value. 2936f2119df6SArindam Nath */ 2937f2119df6SArindam Nath max_current_caps = sdhci_readl(host, SDHCI_MAX_CURRENT); 2938bad37e1aSPhilip Rakity if (!max_current_caps && host->vmmc) { 2939bad37e1aSPhilip Rakity u32 curr = regulator_get_current_limit(host->vmmc); 2940bad37e1aSPhilip Rakity if (curr > 0) { 2941bad37e1aSPhilip Rakity 2942bad37e1aSPhilip Rakity /* convert to SDHCI_MAX_CURRENT format */ 2943bad37e1aSPhilip Rakity curr = curr/1000; /* convert to mA */ 2944bad37e1aSPhilip Rakity curr = curr/SDHCI_MAX_CURRENT_MULTIPLIER; 2945bad37e1aSPhilip Rakity 2946bad37e1aSPhilip Rakity curr = min_t(u32, curr, SDHCI_MAX_CURRENT_LIMIT); 2947bad37e1aSPhilip Rakity max_current_caps = 2948bad37e1aSPhilip Rakity (curr << SDHCI_MAX_CURRENT_330_SHIFT) | 2949bad37e1aSPhilip Rakity (curr << SDHCI_MAX_CURRENT_300_SHIFT) | 2950bad37e1aSPhilip Rakity (curr << SDHCI_MAX_CURRENT_180_SHIFT); 2951bad37e1aSPhilip Rakity } 2952bad37e1aSPhilip Rakity } 2953f2119df6SArindam Nath 2954f2119df6SArindam Nath if (caps[0] & SDHCI_CAN_VDD_330) { 29558f230f45STakashi Iwai ocr_avail |= MMC_VDD_32_33 | MMC_VDD_33_34; 2956f2119df6SArindam Nath 295755c4665eSAaron Lu mmc->max_current_330 = ((max_current_caps & 2958f2119df6SArindam Nath SDHCI_MAX_CURRENT_330_MASK) >> 2959f2119df6SArindam Nath SDHCI_MAX_CURRENT_330_SHIFT) * 2960f2119df6SArindam Nath SDHCI_MAX_CURRENT_MULTIPLIER; 2961f2119df6SArindam Nath } 2962f2119df6SArindam Nath if (caps[0] & SDHCI_CAN_VDD_300) { 29638f230f45STakashi Iwai ocr_avail |= MMC_VDD_29_30 | MMC_VDD_30_31; 2964f2119df6SArindam Nath 296555c4665eSAaron Lu mmc->max_current_300 = ((max_current_caps & 2966f2119df6SArindam Nath SDHCI_MAX_CURRENT_300_MASK) >> 2967f2119df6SArindam Nath SDHCI_MAX_CURRENT_300_SHIFT) * 2968f2119df6SArindam Nath SDHCI_MAX_CURRENT_MULTIPLIER; 2969f2119df6SArindam Nath } 2970f2119df6SArindam Nath if (caps[0] & SDHCI_CAN_VDD_180) { 29718f230f45STakashi Iwai ocr_avail |= MMC_VDD_165_195; 29728f230f45STakashi Iwai 297355c4665eSAaron Lu mmc->max_current_180 = ((max_current_caps & 2974f2119df6SArindam Nath SDHCI_MAX_CURRENT_180_MASK) >> 2975f2119df6SArindam Nath SDHCI_MAX_CURRENT_180_SHIFT) * 2976f2119df6SArindam Nath SDHCI_MAX_CURRENT_MULTIPLIER; 2977f2119df6SArindam Nath } 2978f2119df6SArindam Nath 29798f230f45STakashi Iwai mmc->ocr_avail = ocr_avail; 29808f230f45STakashi Iwai mmc->ocr_avail_sdio = ocr_avail; 29818f230f45STakashi Iwai if (host->ocr_avail_sdio) 29828f230f45STakashi Iwai mmc->ocr_avail_sdio &= host->ocr_avail_sdio; 29838f230f45STakashi Iwai mmc->ocr_avail_sd = ocr_avail; 29848f230f45STakashi Iwai if (host->ocr_avail_sd) 29858f230f45STakashi Iwai mmc->ocr_avail_sd &= host->ocr_avail_sd; 29868f230f45STakashi Iwai else /* normal SD controllers don't support 1.8V */ 29878f230f45STakashi Iwai mmc->ocr_avail_sd &= ~MMC_VDD_165_195; 29888f230f45STakashi Iwai mmc->ocr_avail_mmc = ocr_avail; 29898f230f45STakashi Iwai if (host->ocr_avail_mmc) 29908f230f45STakashi Iwai mmc->ocr_avail_mmc &= host->ocr_avail_mmc; 29911c6a0718SPierre Ossman 29921c6a0718SPierre Ossman if (mmc->ocr_avail == 0) { 2993a3c76eb9SGirish K S pr_err("%s: Hardware doesn't report any " 2994b69c9058SPierre Ossman "support voltages.\n", mmc_hostname(mmc)); 2995b8c86fc5SPierre Ossman return -ENODEV; 29961c6a0718SPierre Ossman } 29971c6a0718SPierre Ossman 29981c6a0718SPierre Ossman spin_lock_init(&host->lock); 29991c6a0718SPierre Ossman 30001c6a0718SPierre Ossman /* 30012134a922SPierre Ossman * Maximum number of segments. Depends on if the hardware 30022134a922SPierre Ossman * can do scatter/gather or not. 30031c6a0718SPierre Ossman */ 30042134a922SPierre Ossman if (host->flags & SDHCI_USE_ADMA) 3005a36274e0SMartin K. Petersen mmc->max_segs = 128; 3006a13abc7bSRichard Röjfors else if (host->flags & SDHCI_USE_SDMA) 3007a36274e0SMartin K. Petersen mmc->max_segs = 1; 30082134a922SPierre Ossman else /* PIO */ 3009a36274e0SMartin K. Petersen mmc->max_segs = 128; 30101c6a0718SPierre Ossman 30111c6a0718SPierre Ossman /* 30121c6a0718SPierre Ossman * Maximum number of sectors in one transfer. Limited by DMA boundary 30131c6a0718SPierre Ossman * size (512KiB). 30141c6a0718SPierre Ossman */ 30151c6a0718SPierre Ossman mmc->max_req_size = 524288; 30161c6a0718SPierre Ossman 30171c6a0718SPierre Ossman /* 30181c6a0718SPierre Ossman * Maximum segment size. Could be one segment with the maximum number 30192134a922SPierre Ossman * of bytes. When doing hardware scatter/gather, each entry cannot 30202134a922SPierre Ossman * be larger than 64 KiB though. 30211c6a0718SPierre Ossman */ 302230652aa3SOlof Johansson if (host->flags & SDHCI_USE_ADMA) { 302330652aa3SOlof Johansson if (host->quirks & SDHCI_QUIRK_BROKEN_ADMA_ZEROLEN_DESC) 302430652aa3SOlof Johansson mmc->max_seg_size = 65535; 30252134a922SPierre Ossman else 302630652aa3SOlof Johansson mmc->max_seg_size = 65536; 302730652aa3SOlof Johansson } else { 30281c6a0718SPierre Ossman mmc->max_seg_size = mmc->max_req_size; 302930652aa3SOlof Johansson } 30301c6a0718SPierre Ossman 30311c6a0718SPierre Ossman /* 30321c6a0718SPierre Ossman * Maximum block size. This varies from controller to controller and 30331c6a0718SPierre Ossman * is specified in the capabilities register. 30341c6a0718SPierre Ossman */ 30350633f654SAnton Vorontsov if (host->quirks & SDHCI_QUIRK_FORCE_BLK_SZ_2048) { 30360633f654SAnton Vorontsov mmc->max_blk_size = 2; 30370633f654SAnton Vorontsov } else { 3038f2119df6SArindam Nath mmc->max_blk_size = (caps[0] & SDHCI_MAX_BLOCK_MASK) >> 30390633f654SAnton Vorontsov SDHCI_MAX_BLOCK_SHIFT; 30401c6a0718SPierre Ossman if (mmc->max_blk_size >= 3) { 3041a3c76eb9SGirish K S pr_warning("%s: Invalid maximum block size, " 3042b69c9058SPierre Ossman "assuming 512 bytes\n", mmc_hostname(mmc)); 30430633f654SAnton Vorontsov mmc->max_blk_size = 0; 30440633f654SAnton Vorontsov } 30450633f654SAnton Vorontsov } 30460633f654SAnton Vorontsov 30471c6a0718SPierre Ossman mmc->max_blk_size = 512 << mmc->max_blk_size; 30481c6a0718SPierre Ossman 30491c6a0718SPierre Ossman /* 30501c6a0718SPierre Ossman * Maximum block count. 30511c6a0718SPierre Ossman */ 30521388eefdSBen Dooks mmc->max_blk_count = (host->quirks & SDHCI_QUIRK_NO_MULTIBLOCK) ? 1 : 65535; 30531c6a0718SPierre Ossman 30541c6a0718SPierre Ossman /* 30551c6a0718SPierre Ossman * Init tasklets. 30561c6a0718SPierre Ossman */ 30571c6a0718SPierre Ossman tasklet_init(&host->card_tasklet, 30581c6a0718SPierre Ossman sdhci_tasklet_card, (unsigned long)host); 30591c6a0718SPierre Ossman tasklet_init(&host->finish_tasklet, 30601c6a0718SPierre Ossman sdhci_tasklet_finish, (unsigned long)host); 30611c6a0718SPierre Ossman 30621c6a0718SPierre Ossman setup_timer(&host->timer, sdhci_timeout_timer, (unsigned long)host); 30631c6a0718SPierre Ossman 3064cf2b5eeaSArindam Nath if (host->version >= SDHCI_SPEC_300) { 3065b513ea25SArindam Nath init_waitqueue_head(&host->buf_ready_int); 3066b513ea25SArindam Nath 3067cf2b5eeaSArindam Nath /* Initialize re-tuning timer */ 3068cf2b5eeaSArindam Nath init_timer(&host->tuning_timer); 3069cf2b5eeaSArindam Nath host->tuning_timer.data = (unsigned long)host; 3070cf2b5eeaSArindam Nath host->tuning_timer.function = sdhci_tuning_timer; 3071cf2b5eeaSArindam Nath } 3072cf2b5eeaSArindam Nath 30731c6a0718SPierre Ossman ret = request_irq(host->irq, sdhci_irq, IRQF_SHARED, 3074b69c9058SPierre Ossman mmc_hostname(mmc), host); 30750fc81ee3SMark Brown if (ret) { 30760fc81ee3SMark Brown pr_err("%s: Failed to request IRQ %d: %d\n", 30770fc81ee3SMark Brown mmc_hostname(mmc), host->irq, ret); 30781c6a0718SPierre Ossman goto untasklet; 30790fc81ee3SMark Brown } 30801c6a0718SPierre Ossman 30812f4cbb3dSNicolas Pitre sdhci_init(host, 0); 30821c6a0718SPierre Ossman 30831c6a0718SPierre Ossman #ifdef CONFIG_MMC_DEBUG 30841c6a0718SPierre Ossman sdhci_dumpregs(host); 30851c6a0718SPierre Ossman #endif 30861c6a0718SPierre Ossman 3087f9134319SPierre Ossman #ifdef SDHCI_USE_LEDS_CLASS 30885dbace0cSHelmut Schaa snprintf(host->led_name, sizeof(host->led_name), 30895dbace0cSHelmut Schaa "%s::", mmc_hostname(mmc)); 30905dbace0cSHelmut Schaa host->led.name = host->led_name; 30912f730fecSPierre Ossman host->led.brightness = LED_OFF; 30922f730fecSPierre Ossman host->led.default_trigger = mmc_hostname(mmc); 30932f730fecSPierre Ossman host->led.brightness_set = sdhci_led_control; 30942f730fecSPierre Ossman 3095b8c86fc5SPierre Ossman ret = led_classdev_register(mmc_dev(mmc), &host->led); 30960fc81ee3SMark Brown if (ret) { 30970fc81ee3SMark Brown pr_err("%s: Failed to register LED device: %d\n", 30980fc81ee3SMark Brown mmc_hostname(mmc), ret); 30992f730fecSPierre Ossman goto reset; 31000fc81ee3SMark Brown } 31012f730fecSPierre Ossman #endif 31022f730fecSPierre Ossman 31031c6a0718SPierre Ossman mmiowb(); 31041c6a0718SPierre Ossman 31051c6a0718SPierre Ossman mmc_add_host(mmc); 31061c6a0718SPierre Ossman 3107a3c76eb9SGirish K S pr_info("%s: SDHCI controller on %s [%s] using %s\n", 3108d1b26863SKay Sievers mmc_hostname(mmc), host->hw_name, dev_name(mmc_dev(mmc)), 3109a13abc7bSRichard Röjfors (host->flags & SDHCI_USE_ADMA) ? "ADMA" : 3110a13abc7bSRichard Röjfors (host->flags & SDHCI_USE_SDMA) ? "DMA" : "PIO"); 31111c6a0718SPierre Ossman 31127260cf5eSAnton Vorontsov sdhci_enable_card_detection(host); 31137260cf5eSAnton Vorontsov 31141c6a0718SPierre Ossman return 0; 31151c6a0718SPierre Ossman 3116f9134319SPierre Ossman #ifdef SDHCI_USE_LEDS_CLASS 31172f730fecSPierre Ossman reset: 31182f730fecSPierre Ossman sdhci_reset(host, SDHCI_RESET_ALL); 31192f730fecSPierre Ossman free_irq(host->irq, host); 31202f730fecSPierre Ossman #endif 31211c6a0718SPierre Ossman untasklet: 31221c6a0718SPierre Ossman tasklet_kill(&host->card_tasklet); 31231c6a0718SPierre Ossman tasklet_kill(&host->finish_tasklet); 31241c6a0718SPierre Ossman 31251c6a0718SPierre Ossman return ret; 31261c6a0718SPierre Ossman } 31271c6a0718SPierre Ossman 3128b8c86fc5SPierre Ossman EXPORT_SYMBOL_GPL(sdhci_add_host); 3129b8c86fc5SPierre Ossman 31301e72859eSPierre Ossman void sdhci_remove_host(struct sdhci_host *host, int dead) 31311c6a0718SPierre Ossman { 31321e72859eSPierre Ossman unsigned long flags; 31331e72859eSPierre Ossman 31341e72859eSPierre Ossman if (dead) { 31351e72859eSPierre Ossman spin_lock_irqsave(&host->lock, flags); 31361e72859eSPierre Ossman 31371e72859eSPierre Ossman host->flags |= SDHCI_DEVICE_DEAD; 31381e72859eSPierre Ossman 31391e72859eSPierre Ossman if (host->mrq) { 3140a3c76eb9SGirish K S pr_err("%s: Controller removed during " 31411e72859eSPierre Ossman " transfer!\n", mmc_hostname(host->mmc)); 31421e72859eSPierre Ossman 31431e72859eSPierre Ossman host->mrq->cmd->error = -ENOMEDIUM; 31441e72859eSPierre Ossman tasklet_schedule(&host->finish_tasklet); 31451e72859eSPierre Ossman } 31461e72859eSPierre Ossman 31471e72859eSPierre Ossman spin_unlock_irqrestore(&host->lock, flags); 31481e72859eSPierre Ossman } 31491e72859eSPierre Ossman 31507260cf5eSAnton Vorontsov sdhci_disable_card_detection(host); 31517260cf5eSAnton Vorontsov 3152b8c86fc5SPierre Ossman mmc_remove_host(host->mmc); 31531c6a0718SPierre Ossman 3154f9134319SPierre Ossman #ifdef SDHCI_USE_LEDS_CLASS 31552f730fecSPierre Ossman led_classdev_unregister(&host->led); 31562f730fecSPierre Ossman #endif 31572f730fecSPierre Ossman 31581e72859eSPierre Ossman if (!dead) 31591c6a0718SPierre Ossman sdhci_reset(host, SDHCI_RESET_ALL); 31601c6a0718SPierre Ossman 31611c6a0718SPierre Ossman free_irq(host->irq, host); 31621c6a0718SPierre Ossman 31631c6a0718SPierre Ossman del_timer_sync(&host->timer); 31641c6a0718SPierre Ossman 31651c6a0718SPierre Ossman tasklet_kill(&host->card_tasklet); 31661c6a0718SPierre Ossman tasklet_kill(&host->finish_tasklet); 31672134a922SPierre Ossman 3168ceb6143bSAdrian Hunter if (host->vmmc) 31699bea3c85SMarek Szyprowski regulator_put(host->vmmc); 31709bea3c85SMarek Szyprowski 3171*6231f3deSPhilip Rakity if (host->vqmmc) { 3172*6231f3deSPhilip Rakity regulator_disable(host->vqmmc); 3173*6231f3deSPhilip Rakity regulator_put(host->vqmmc); 3174*6231f3deSPhilip Rakity } 3175*6231f3deSPhilip Rakity 31762134a922SPierre Ossman kfree(host->adma_desc); 31772134a922SPierre Ossman kfree(host->align_buffer); 31782134a922SPierre Ossman 31792134a922SPierre Ossman host->adma_desc = NULL; 31802134a922SPierre Ossman host->align_buffer = NULL; 31811c6a0718SPierre Ossman } 31821c6a0718SPierre Ossman 3183b8c86fc5SPierre Ossman EXPORT_SYMBOL_GPL(sdhci_remove_host); 3184b8c86fc5SPierre Ossman 3185b8c86fc5SPierre Ossman void sdhci_free_host(struct sdhci_host *host) 31861c6a0718SPierre Ossman { 3187b8c86fc5SPierre Ossman mmc_free_host(host->mmc); 31881c6a0718SPierre Ossman } 31891c6a0718SPierre Ossman 3190b8c86fc5SPierre Ossman EXPORT_SYMBOL_GPL(sdhci_free_host); 31911c6a0718SPierre Ossman 31921c6a0718SPierre Ossman /*****************************************************************************\ 31931c6a0718SPierre Ossman * * 31941c6a0718SPierre Ossman * Driver init/exit * 31951c6a0718SPierre Ossman * * 31961c6a0718SPierre Ossman \*****************************************************************************/ 31971c6a0718SPierre Ossman 31981c6a0718SPierre Ossman static int __init sdhci_drv_init(void) 31991c6a0718SPierre Ossman { 3200a3c76eb9SGirish K S pr_info(DRIVER_NAME 32011c6a0718SPierre Ossman ": Secure Digital Host Controller Interface driver\n"); 3202a3c76eb9SGirish K S pr_info(DRIVER_NAME ": Copyright(c) Pierre Ossman\n"); 32031c6a0718SPierre Ossman 3204b8c86fc5SPierre Ossman return 0; 32051c6a0718SPierre Ossman } 32061c6a0718SPierre Ossman 32071c6a0718SPierre Ossman static void __exit sdhci_drv_exit(void) 32081c6a0718SPierre Ossman { 32091c6a0718SPierre Ossman } 32101c6a0718SPierre Ossman 32111c6a0718SPierre Ossman module_init(sdhci_drv_init); 32121c6a0718SPierre Ossman module_exit(sdhci_drv_exit); 32131c6a0718SPierre Ossman 32141c6a0718SPierre Ossman module_param(debug_quirks, uint, 0444); 321566fd8ad5SAdrian Hunter module_param(debug_quirks2, uint, 0444); 32161c6a0718SPierre Ossman 321732710e8fSPierre Ossman MODULE_AUTHOR("Pierre Ossman <pierre@ossman.eu>"); 3218b8c86fc5SPierre Ossman MODULE_DESCRIPTION("Secure Digital Host Controller Interface core driver"); 32191c6a0718SPierre Ossman MODULE_LICENSE("GPL"); 32201c6a0718SPierre Ossman 32211c6a0718SPierre Ossman MODULE_PARM_DESC(debug_quirks, "Force certain quirks."); 322266fd8ad5SAdrian Hunter MODULE_PARM_DESC(debug_quirks2, "Force certain other quirks."); 3223