11c6a0718SPierre Ossman /* 270f10482SPierre Ossman * linux/drivers/mmc/host/sdhci.c - Secure Digital Host Controller Interface driver 31c6a0718SPierre Ossman * 4b69c9058SPierre Ossman * Copyright (C) 2005-2008 Pierre Ossman, All Rights Reserved. 51c6a0718SPierre Ossman * 61c6a0718SPierre Ossman * This program is free software; you can redistribute it and/or modify 71c6a0718SPierre Ossman * it under the terms of the GNU General Public License as published by 81c6a0718SPierre Ossman * the Free Software Foundation; either version 2 of the License, or (at 91c6a0718SPierre Ossman * your option) any later version. 1084c46a53SPierre Ossman * 1184c46a53SPierre Ossman * Thanks to the following companies for their support: 1284c46a53SPierre Ossman * 1384c46a53SPierre Ossman * - JMicron (hardware and technical support) 141c6a0718SPierre Ossman */ 151c6a0718SPierre Ossman 161c6a0718SPierre Ossman #include <linux/delay.h> 171c6a0718SPierre Ossman #include <linux/highmem.h> 18b8c86fc5SPierre Ossman #include <linux/io.h> 1988b47679SPaul Gortmaker #include <linux/module.h> 201c6a0718SPierre Ossman #include <linux/dma-mapping.h> 215a0e3ad6STejun Heo #include <linux/slab.h> 2211763609SRalf Baechle #include <linux/scatterlist.h> 239bea3c85SMarek Szyprowski #include <linux/regulator/consumer.h> 2466fd8ad5SAdrian Hunter #include <linux/pm_runtime.h> 251c6a0718SPierre Ossman 262f730fecSPierre Ossman #include <linux/leds.h> 272f730fecSPierre Ossman 2822113efdSAries Lee #include <linux/mmc/mmc.h> 291c6a0718SPierre Ossman #include <linux/mmc/host.h> 30473b095aSAaron Lu #include <linux/mmc/card.h> 31bec9d4e5SGuennadi Liakhovetski #include <linux/mmc/slot-gpio.h> 321c6a0718SPierre Ossman 331c6a0718SPierre Ossman #include "sdhci.h" 341c6a0718SPierre Ossman 351c6a0718SPierre Ossman #define DRIVER_NAME "sdhci" 361c6a0718SPierre Ossman 371c6a0718SPierre Ossman #define DBG(f, x...) \ 381c6a0718SPierre Ossman pr_debug(DRIVER_NAME " [%s()]: " f, __func__,## x) 391c6a0718SPierre Ossman 40f9134319SPierre Ossman #if defined(CONFIG_LEDS_CLASS) || (defined(CONFIG_LEDS_CLASS_MODULE) && \ 41f9134319SPierre Ossman defined(CONFIG_MMC_SDHCI_MODULE)) 42f9134319SPierre Ossman #define SDHCI_USE_LEDS_CLASS 43f9134319SPierre Ossman #endif 44f9134319SPierre Ossman 45b513ea25SArindam Nath #define MAX_TUNING_LOOP 40 46b513ea25SArindam Nath 471c6a0718SPierre Ossman static unsigned int debug_quirks = 0; 4866fd8ad5SAdrian Hunter static unsigned int debug_quirks2; 491c6a0718SPierre Ossman 501c6a0718SPierre Ossman static void sdhci_finish_data(struct sdhci_host *); 511c6a0718SPierre Ossman 521c6a0718SPierre Ossman static void sdhci_send_command(struct sdhci_host *, struct mmc_command *); 531c6a0718SPierre Ossman static void sdhci_finish_command(struct sdhci_host *); 54069c9f14SGirish K S static int sdhci_execute_tuning(struct mmc_host *mmc, u32 opcode); 55cf2b5eeaSArindam Nath static void sdhci_tuning_timer(unsigned long data); 5652983382SKevin Liu static void sdhci_enable_preset_value(struct sdhci_host *host, bool enable); 571c6a0718SPierre Ossman 5866fd8ad5SAdrian Hunter #ifdef CONFIG_PM_RUNTIME 5966fd8ad5SAdrian Hunter static int sdhci_runtime_pm_get(struct sdhci_host *host); 6066fd8ad5SAdrian Hunter static int sdhci_runtime_pm_put(struct sdhci_host *host); 61f0710a55SAdrian Hunter static void sdhci_runtime_pm_bus_on(struct sdhci_host *host); 62f0710a55SAdrian Hunter static void sdhci_runtime_pm_bus_off(struct sdhci_host *host); 6366fd8ad5SAdrian Hunter #else 6466fd8ad5SAdrian Hunter static inline int sdhci_runtime_pm_get(struct sdhci_host *host) 6566fd8ad5SAdrian Hunter { 6666fd8ad5SAdrian Hunter return 0; 6766fd8ad5SAdrian Hunter } 6866fd8ad5SAdrian Hunter static inline int sdhci_runtime_pm_put(struct sdhci_host *host) 6966fd8ad5SAdrian Hunter { 7066fd8ad5SAdrian Hunter return 0; 7166fd8ad5SAdrian Hunter } 72f0710a55SAdrian Hunter static void sdhci_runtime_pm_bus_on(struct sdhci_host *host) 73f0710a55SAdrian Hunter { 74f0710a55SAdrian Hunter } 75f0710a55SAdrian Hunter static void sdhci_runtime_pm_bus_off(struct sdhci_host *host) 76f0710a55SAdrian Hunter { 77f0710a55SAdrian Hunter } 7866fd8ad5SAdrian Hunter #endif 7966fd8ad5SAdrian Hunter 801c6a0718SPierre Ossman static void sdhci_dumpregs(struct sdhci_host *host) 811c6a0718SPierre Ossman { 82a3c76eb9SGirish K S pr_debug(DRIVER_NAME ": =========== REGISTER DUMP (%s)===========\n", 83412ab659SPhilip Rakity mmc_hostname(host->mmc)); 841c6a0718SPierre Ossman 85a3c76eb9SGirish K S pr_debug(DRIVER_NAME ": Sys addr: 0x%08x | Version: 0x%08x\n", 864e4141a5SAnton Vorontsov sdhci_readl(host, SDHCI_DMA_ADDRESS), 874e4141a5SAnton Vorontsov sdhci_readw(host, SDHCI_HOST_VERSION)); 88a3c76eb9SGirish K S pr_debug(DRIVER_NAME ": Blk size: 0x%08x | Blk cnt: 0x%08x\n", 894e4141a5SAnton Vorontsov sdhci_readw(host, SDHCI_BLOCK_SIZE), 904e4141a5SAnton Vorontsov sdhci_readw(host, SDHCI_BLOCK_COUNT)); 91a3c76eb9SGirish K S pr_debug(DRIVER_NAME ": Argument: 0x%08x | Trn mode: 0x%08x\n", 924e4141a5SAnton Vorontsov sdhci_readl(host, SDHCI_ARGUMENT), 934e4141a5SAnton Vorontsov sdhci_readw(host, SDHCI_TRANSFER_MODE)); 94a3c76eb9SGirish K S pr_debug(DRIVER_NAME ": Present: 0x%08x | Host ctl: 0x%08x\n", 954e4141a5SAnton Vorontsov sdhci_readl(host, SDHCI_PRESENT_STATE), 964e4141a5SAnton Vorontsov sdhci_readb(host, SDHCI_HOST_CONTROL)); 97a3c76eb9SGirish K S pr_debug(DRIVER_NAME ": Power: 0x%08x | Blk gap: 0x%08x\n", 984e4141a5SAnton Vorontsov sdhci_readb(host, SDHCI_POWER_CONTROL), 994e4141a5SAnton Vorontsov sdhci_readb(host, SDHCI_BLOCK_GAP_CONTROL)); 100a3c76eb9SGirish K S pr_debug(DRIVER_NAME ": Wake-up: 0x%08x | Clock: 0x%08x\n", 1014e4141a5SAnton Vorontsov sdhci_readb(host, SDHCI_WAKE_UP_CONTROL), 1024e4141a5SAnton Vorontsov sdhci_readw(host, SDHCI_CLOCK_CONTROL)); 103a3c76eb9SGirish K S pr_debug(DRIVER_NAME ": Timeout: 0x%08x | Int stat: 0x%08x\n", 1044e4141a5SAnton Vorontsov sdhci_readb(host, SDHCI_TIMEOUT_CONTROL), 1054e4141a5SAnton Vorontsov sdhci_readl(host, SDHCI_INT_STATUS)); 106a3c76eb9SGirish K S pr_debug(DRIVER_NAME ": Int enab: 0x%08x | Sig enab: 0x%08x\n", 1074e4141a5SAnton Vorontsov sdhci_readl(host, SDHCI_INT_ENABLE), 1084e4141a5SAnton Vorontsov sdhci_readl(host, SDHCI_SIGNAL_ENABLE)); 109a3c76eb9SGirish K S pr_debug(DRIVER_NAME ": AC12 err: 0x%08x | Slot int: 0x%08x\n", 1104e4141a5SAnton Vorontsov sdhci_readw(host, SDHCI_ACMD12_ERR), 1114e4141a5SAnton Vorontsov sdhci_readw(host, SDHCI_SLOT_INT_STATUS)); 112a3c76eb9SGirish K S pr_debug(DRIVER_NAME ": Caps: 0x%08x | Caps_1: 0x%08x\n", 1134e4141a5SAnton Vorontsov sdhci_readl(host, SDHCI_CAPABILITIES), 114e8120ad1SPhilip Rakity sdhci_readl(host, SDHCI_CAPABILITIES_1)); 115a3c76eb9SGirish K S pr_debug(DRIVER_NAME ": Cmd: 0x%08x | Max curr: 0x%08x\n", 116e8120ad1SPhilip Rakity sdhci_readw(host, SDHCI_COMMAND), 1174e4141a5SAnton Vorontsov sdhci_readl(host, SDHCI_MAX_CURRENT)); 118a3c76eb9SGirish K S pr_debug(DRIVER_NAME ": Host ctl2: 0x%08x\n", 119f2119df6SArindam Nath sdhci_readw(host, SDHCI_HOST_CONTROL2)); 1201c6a0718SPierre Ossman 121be3f4ae0SBen Dooks if (host->flags & SDHCI_USE_ADMA) 122a3c76eb9SGirish K S pr_debug(DRIVER_NAME ": ADMA Err: 0x%08x | ADMA Ptr: 0x%08x\n", 123be3f4ae0SBen Dooks readl(host->ioaddr + SDHCI_ADMA_ERROR), 124be3f4ae0SBen Dooks readl(host->ioaddr + SDHCI_ADMA_ADDRESS)); 125be3f4ae0SBen Dooks 126a3c76eb9SGirish K S pr_debug(DRIVER_NAME ": ===========================================\n"); 1271c6a0718SPierre Ossman } 1281c6a0718SPierre Ossman 1291c6a0718SPierre Ossman /*****************************************************************************\ 1301c6a0718SPierre Ossman * * 1311c6a0718SPierre Ossman * Low level functions * 1321c6a0718SPierre Ossman * * 1331c6a0718SPierre Ossman \*****************************************************************************/ 1341c6a0718SPierre Ossman 1357260cf5eSAnton Vorontsov static void sdhci_clear_set_irqs(struct sdhci_host *host, u32 clear, u32 set) 1367260cf5eSAnton Vorontsov { 1377260cf5eSAnton Vorontsov u32 ier; 1387260cf5eSAnton Vorontsov 1397260cf5eSAnton Vorontsov ier = sdhci_readl(host, SDHCI_INT_ENABLE); 1407260cf5eSAnton Vorontsov ier &= ~clear; 1417260cf5eSAnton Vorontsov ier |= set; 1427260cf5eSAnton Vorontsov sdhci_writel(host, ier, SDHCI_INT_ENABLE); 1437260cf5eSAnton Vorontsov sdhci_writel(host, ier, SDHCI_SIGNAL_ENABLE); 1447260cf5eSAnton Vorontsov } 1457260cf5eSAnton Vorontsov 1467260cf5eSAnton Vorontsov static void sdhci_unmask_irqs(struct sdhci_host *host, u32 irqs) 1477260cf5eSAnton Vorontsov { 1487260cf5eSAnton Vorontsov sdhci_clear_set_irqs(host, 0, irqs); 1497260cf5eSAnton Vorontsov } 1507260cf5eSAnton Vorontsov 1517260cf5eSAnton Vorontsov static void sdhci_mask_irqs(struct sdhci_host *host, u32 irqs) 1527260cf5eSAnton Vorontsov { 1537260cf5eSAnton Vorontsov sdhci_clear_set_irqs(host, irqs, 0); 1547260cf5eSAnton Vorontsov } 1557260cf5eSAnton Vorontsov 1567260cf5eSAnton Vorontsov static void sdhci_set_card_detection(struct sdhci_host *host, bool enable) 1577260cf5eSAnton Vorontsov { 158d25928d1SShawn Guo u32 present, irqs; 1597260cf5eSAnton Vorontsov 160c79396c1SAdrian Hunter if ((host->quirks & SDHCI_QUIRK_BROKEN_CARD_DETECTION) || 16187b87a3fSDaniel Drake (host->mmc->caps & MMC_CAP_NONREMOVABLE)) 16266fd8ad5SAdrian Hunter return; 16366fd8ad5SAdrian Hunter 164d25928d1SShawn Guo present = sdhci_readl(host, SDHCI_PRESENT_STATE) & 165d25928d1SShawn Guo SDHCI_CARD_PRESENT; 166d25928d1SShawn Guo irqs = present ? SDHCI_INT_CARD_REMOVE : SDHCI_INT_CARD_INSERT; 167d25928d1SShawn Guo 1687260cf5eSAnton Vorontsov if (enable) 1697260cf5eSAnton Vorontsov sdhci_unmask_irqs(host, irqs); 1707260cf5eSAnton Vorontsov else 1717260cf5eSAnton Vorontsov sdhci_mask_irqs(host, irqs); 1727260cf5eSAnton Vorontsov } 1737260cf5eSAnton Vorontsov 1747260cf5eSAnton Vorontsov static void sdhci_enable_card_detection(struct sdhci_host *host) 1757260cf5eSAnton Vorontsov { 1767260cf5eSAnton Vorontsov sdhci_set_card_detection(host, true); 1777260cf5eSAnton Vorontsov } 1787260cf5eSAnton Vorontsov 1797260cf5eSAnton Vorontsov static void sdhci_disable_card_detection(struct sdhci_host *host) 1807260cf5eSAnton Vorontsov { 1817260cf5eSAnton Vorontsov sdhci_set_card_detection(host, false); 1827260cf5eSAnton Vorontsov } 1837260cf5eSAnton Vorontsov 1841c6a0718SPierre Ossman static void sdhci_reset(struct sdhci_host *host, u8 mask) 1851c6a0718SPierre Ossman { 1861c6a0718SPierre Ossman unsigned long timeout; 187063a9dbbSAnton Vorontsov u32 uninitialized_var(ier); 1881c6a0718SPierre Ossman 189b8c86fc5SPierre Ossman if (host->quirks & SDHCI_QUIRK_NO_CARD_NO_RESET) { 1904e4141a5SAnton Vorontsov if (!(sdhci_readl(host, SDHCI_PRESENT_STATE) & 1911c6a0718SPierre Ossman SDHCI_CARD_PRESENT)) 1921c6a0718SPierre Ossman return; 1931c6a0718SPierre Ossman } 1941c6a0718SPierre Ossman 195063a9dbbSAnton Vorontsov if (host->quirks & SDHCI_QUIRK_RESTORE_IRQS_AFTER_RESET) 196063a9dbbSAnton Vorontsov ier = sdhci_readl(host, SDHCI_INT_ENABLE); 197063a9dbbSAnton Vorontsov 198393c1a34SPhilip Rakity if (host->ops->platform_reset_enter) 199393c1a34SPhilip Rakity host->ops->platform_reset_enter(host, mask); 200393c1a34SPhilip Rakity 2014e4141a5SAnton Vorontsov sdhci_writeb(host, mask, SDHCI_SOFTWARE_RESET); 2021c6a0718SPierre Ossman 203f0710a55SAdrian Hunter if (mask & SDHCI_RESET_ALL) { 2041c6a0718SPierre Ossman host->clock = 0; 205f0710a55SAdrian Hunter /* Reset-all turns off SD Bus Power */ 206f0710a55SAdrian Hunter if (host->quirks2 & SDHCI_QUIRK2_CARD_ON_NEEDS_BUS_ON) 207f0710a55SAdrian Hunter sdhci_runtime_pm_bus_off(host); 208f0710a55SAdrian Hunter } 2091c6a0718SPierre Ossman 2101c6a0718SPierre Ossman /* Wait max 100 ms */ 2111c6a0718SPierre Ossman timeout = 100; 2121c6a0718SPierre Ossman 2131c6a0718SPierre Ossman /* hw clears the bit when it's done */ 2144e4141a5SAnton Vorontsov while (sdhci_readb(host, SDHCI_SOFTWARE_RESET) & mask) { 2151c6a0718SPierre Ossman if (timeout == 0) { 216a3c76eb9SGirish K S pr_err("%s: Reset 0x%x never completed.\n", 2171c6a0718SPierre Ossman mmc_hostname(host->mmc), (int)mask); 2181c6a0718SPierre Ossman sdhci_dumpregs(host); 2191c6a0718SPierre Ossman return; 2201c6a0718SPierre Ossman } 2211c6a0718SPierre Ossman timeout--; 2221c6a0718SPierre Ossman mdelay(1); 2231c6a0718SPierre Ossman } 224063a9dbbSAnton Vorontsov 225393c1a34SPhilip Rakity if (host->ops->platform_reset_exit) 226393c1a34SPhilip Rakity host->ops->platform_reset_exit(host, mask); 227393c1a34SPhilip Rakity 228063a9dbbSAnton Vorontsov if (host->quirks & SDHCI_QUIRK_RESTORE_IRQS_AFTER_RESET) 229063a9dbbSAnton Vorontsov sdhci_clear_set_irqs(host, SDHCI_INT_ALL_MASK, ier); 2303abc1e80SShaohui Xie 2313abc1e80SShaohui Xie if (host->flags & (SDHCI_USE_SDMA | SDHCI_USE_ADMA)) { 2323abc1e80SShaohui Xie if ((host->ops->enable_dma) && (mask & SDHCI_RESET_ALL)) 2333abc1e80SShaohui Xie host->ops->enable_dma(host); 2343abc1e80SShaohui Xie } 2351c6a0718SPierre Ossman } 2361c6a0718SPierre Ossman 2372f4cbb3dSNicolas Pitre static void sdhci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios); 2382f4cbb3dSNicolas Pitre 2392f4cbb3dSNicolas Pitre static void sdhci_init(struct sdhci_host *host, int soft) 2401c6a0718SPierre Ossman { 2412f4cbb3dSNicolas Pitre if (soft) 2422f4cbb3dSNicolas Pitre sdhci_reset(host, SDHCI_RESET_CMD|SDHCI_RESET_DATA); 2432f4cbb3dSNicolas Pitre else 2441c6a0718SPierre Ossman sdhci_reset(host, SDHCI_RESET_ALL); 2451c6a0718SPierre Ossman 2467260cf5eSAnton Vorontsov sdhci_clear_set_irqs(host, SDHCI_INT_ALL_MASK, 2477260cf5eSAnton Vorontsov SDHCI_INT_BUS_POWER | SDHCI_INT_DATA_END_BIT | 2481c6a0718SPierre Ossman SDHCI_INT_DATA_CRC | SDHCI_INT_DATA_TIMEOUT | SDHCI_INT_INDEX | 2491c6a0718SPierre Ossman SDHCI_INT_END_BIT | SDHCI_INT_CRC | SDHCI_INT_TIMEOUT | 2506aa943abSAnton Vorontsov SDHCI_INT_DATA_END | SDHCI_INT_RESPONSE); 2512f4cbb3dSNicolas Pitre 2522f4cbb3dSNicolas Pitre if (soft) { 2532f4cbb3dSNicolas Pitre /* force clock reconfiguration */ 2542f4cbb3dSNicolas Pitre host->clock = 0; 2552f4cbb3dSNicolas Pitre sdhci_set_ios(host->mmc, &host->mmc->ios); 2562f4cbb3dSNicolas Pitre } 2577260cf5eSAnton Vorontsov } 2581c6a0718SPierre Ossman 2597260cf5eSAnton Vorontsov static void sdhci_reinit(struct sdhci_host *host) 2607260cf5eSAnton Vorontsov { 2612f4cbb3dSNicolas Pitre sdhci_init(host, 0); 262b67c6b41SAaron Lu /* 263b67c6b41SAaron Lu * Retuning stuffs are affected by different cards inserted and only 264b67c6b41SAaron Lu * applicable to UHS-I cards. So reset these fields to their initial 265b67c6b41SAaron Lu * value when card is removed. 266b67c6b41SAaron Lu */ 267973905feSAaron Lu if (host->flags & SDHCI_USING_RETUNING_TIMER) { 268973905feSAaron Lu host->flags &= ~SDHCI_USING_RETUNING_TIMER; 269973905feSAaron Lu 270b67c6b41SAaron Lu del_timer_sync(&host->tuning_timer); 271b67c6b41SAaron Lu host->flags &= ~SDHCI_NEEDS_RETUNING; 272b67c6b41SAaron Lu host->mmc->max_blk_count = 273b67c6b41SAaron Lu (host->quirks & SDHCI_QUIRK_NO_MULTIBLOCK) ? 1 : 65535; 274b67c6b41SAaron Lu } 2757260cf5eSAnton Vorontsov sdhci_enable_card_detection(host); 2761c6a0718SPierre Ossman } 2771c6a0718SPierre Ossman 2781c6a0718SPierre Ossman static void sdhci_activate_led(struct sdhci_host *host) 2791c6a0718SPierre Ossman { 2801c6a0718SPierre Ossman u8 ctrl; 2811c6a0718SPierre Ossman 2824e4141a5SAnton Vorontsov ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL); 2831c6a0718SPierre Ossman ctrl |= SDHCI_CTRL_LED; 2844e4141a5SAnton Vorontsov sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL); 2851c6a0718SPierre Ossman } 2861c6a0718SPierre Ossman 2871c6a0718SPierre Ossman static void sdhci_deactivate_led(struct sdhci_host *host) 2881c6a0718SPierre Ossman { 2891c6a0718SPierre Ossman u8 ctrl; 2901c6a0718SPierre Ossman 2914e4141a5SAnton Vorontsov ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL); 2921c6a0718SPierre Ossman ctrl &= ~SDHCI_CTRL_LED; 2934e4141a5SAnton Vorontsov sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL); 2941c6a0718SPierre Ossman } 2951c6a0718SPierre Ossman 296f9134319SPierre Ossman #ifdef SDHCI_USE_LEDS_CLASS 2972f730fecSPierre Ossman static void sdhci_led_control(struct led_classdev *led, 2982f730fecSPierre Ossman enum led_brightness brightness) 2992f730fecSPierre Ossman { 3002f730fecSPierre Ossman struct sdhci_host *host = container_of(led, struct sdhci_host, led); 3012f730fecSPierre Ossman unsigned long flags; 3022f730fecSPierre Ossman 3032f730fecSPierre Ossman spin_lock_irqsave(&host->lock, flags); 3042f730fecSPierre Ossman 30566fd8ad5SAdrian Hunter if (host->runtime_suspended) 30666fd8ad5SAdrian Hunter goto out; 30766fd8ad5SAdrian Hunter 3082f730fecSPierre Ossman if (brightness == LED_OFF) 3092f730fecSPierre Ossman sdhci_deactivate_led(host); 3102f730fecSPierre Ossman else 3112f730fecSPierre Ossman sdhci_activate_led(host); 31266fd8ad5SAdrian Hunter out: 3132f730fecSPierre Ossman spin_unlock_irqrestore(&host->lock, flags); 3142f730fecSPierre Ossman } 3152f730fecSPierre Ossman #endif 3162f730fecSPierre Ossman 3171c6a0718SPierre Ossman /*****************************************************************************\ 3181c6a0718SPierre Ossman * * 3191c6a0718SPierre Ossman * Core functions * 3201c6a0718SPierre Ossman * * 3211c6a0718SPierre Ossman \*****************************************************************************/ 3221c6a0718SPierre Ossman 3231c6a0718SPierre Ossman static void sdhci_read_block_pio(struct sdhci_host *host) 3241c6a0718SPierre Ossman { 3257659150cSPierre Ossman unsigned long flags; 3267659150cSPierre Ossman size_t blksize, len, chunk; 3277244b85bSSteven Noonan u32 uninitialized_var(scratch); 3287659150cSPierre Ossman u8 *buf; 3291c6a0718SPierre Ossman 3301c6a0718SPierre Ossman DBG("PIO reading\n"); 3311c6a0718SPierre Ossman 3321c6a0718SPierre Ossman blksize = host->data->blksz; 3337659150cSPierre Ossman chunk = 0; 3341c6a0718SPierre Ossman 3357659150cSPierre Ossman local_irq_save(flags); 3361c6a0718SPierre Ossman 3371c6a0718SPierre Ossman while (blksize) { 3387659150cSPierre Ossman if (!sg_miter_next(&host->sg_miter)) 3397659150cSPierre Ossman BUG(); 3407659150cSPierre Ossman 3417659150cSPierre Ossman len = min(host->sg_miter.length, blksize); 3427659150cSPierre Ossman 3437659150cSPierre Ossman blksize -= len; 3447659150cSPierre Ossman host->sg_miter.consumed = len; 3457659150cSPierre Ossman 3467659150cSPierre Ossman buf = host->sg_miter.addr; 3477659150cSPierre Ossman 3487659150cSPierre Ossman while (len) { 3497659150cSPierre Ossman if (chunk == 0) { 3504e4141a5SAnton Vorontsov scratch = sdhci_readl(host, SDHCI_BUFFER); 3517659150cSPierre Ossman chunk = 4; 3521c6a0718SPierre Ossman } 3531c6a0718SPierre Ossman 3547659150cSPierre Ossman *buf = scratch & 0xFF; 3551c6a0718SPierre Ossman 3567659150cSPierre Ossman buf++; 3577659150cSPierre Ossman scratch >>= 8; 3587659150cSPierre Ossman chunk--; 3597659150cSPierre Ossman len--; 3607659150cSPierre Ossman } 3611c6a0718SPierre Ossman } 3621c6a0718SPierre Ossman 3637659150cSPierre Ossman sg_miter_stop(&host->sg_miter); 3647659150cSPierre Ossman 3657659150cSPierre Ossman local_irq_restore(flags); 3661c6a0718SPierre Ossman } 3671c6a0718SPierre Ossman 3681c6a0718SPierre Ossman static void sdhci_write_block_pio(struct sdhci_host *host) 3691c6a0718SPierre Ossman { 3707659150cSPierre Ossman unsigned long flags; 3717659150cSPierre Ossman size_t blksize, len, chunk; 3727659150cSPierre Ossman u32 scratch; 3737659150cSPierre Ossman u8 *buf; 3741c6a0718SPierre Ossman 3751c6a0718SPierre Ossman DBG("PIO writing\n"); 3761c6a0718SPierre Ossman 3771c6a0718SPierre Ossman blksize = host->data->blksz; 3787659150cSPierre Ossman chunk = 0; 3797659150cSPierre Ossman scratch = 0; 3801c6a0718SPierre Ossman 3817659150cSPierre Ossman local_irq_save(flags); 3821c6a0718SPierre Ossman 3831c6a0718SPierre Ossman while (blksize) { 3847659150cSPierre Ossman if (!sg_miter_next(&host->sg_miter)) 3857659150cSPierre Ossman BUG(); 3861c6a0718SPierre Ossman 3877659150cSPierre Ossman len = min(host->sg_miter.length, blksize); 3881c6a0718SPierre Ossman 3897659150cSPierre Ossman blksize -= len; 3907659150cSPierre Ossman host->sg_miter.consumed = len; 3917659150cSPierre Ossman 3927659150cSPierre Ossman buf = host->sg_miter.addr; 3937659150cSPierre Ossman 3947659150cSPierre Ossman while (len) { 3957659150cSPierre Ossman scratch |= (u32)*buf << (chunk * 8); 3967659150cSPierre Ossman 3977659150cSPierre Ossman buf++; 3987659150cSPierre Ossman chunk++; 3997659150cSPierre Ossman len--; 4007659150cSPierre Ossman 4017659150cSPierre Ossman if ((chunk == 4) || ((len == 0) && (blksize == 0))) { 4024e4141a5SAnton Vorontsov sdhci_writel(host, scratch, SDHCI_BUFFER); 4037659150cSPierre Ossman chunk = 0; 4047659150cSPierre Ossman scratch = 0; 4057659150cSPierre Ossman } 4067659150cSPierre Ossman } 4071c6a0718SPierre Ossman } 4081c6a0718SPierre Ossman 4097659150cSPierre Ossman sg_miter_stop(&host->sg_miter); 4101c6a0718SPierre Ossman 4117659150cSPierre Ossman local_irq_restore(flags); 4121c6a0718SPierre Ossman } 4131c6a0718SPierre Ossman 4141c6a0718SPierre Ossman static void sdhci_transfer_pio(struct sdhci_host *host) 4151c6a0718SPierre Ossman { 4161c6a0718SPierre Ossman u32 mask; 4171c6a0718SPierre Ossman 4181c6a0718SPierre Ossman BUG_ON(!host->data); 4191c6a0718SPierre Ossman 4207659150cSPierre Ossman if (host->blocks == 0) 4211c6a0718SPierre Ossman return; 4221c6a0718SPierre Ossman 4231c6a0718SPierre Ossman if (host->data->flags & MMC_DATA_READ) 4241c6a0718SPierre Ossman mask = SDHCI_DATA_AVAILABLE; 4251c6a0718SPierre Ossman else 4261c6a0718SPierre Ossman mask = SDHCI_SPACE_AVAILABLE; 4271c6a0718SPierre Ossman 4284a3cba32SPierre Ossman /* 4294a3cba32SPierre Ossman * Some controllers (JMicron JMB38x) mess up the buffer bits 4304a3cba32SPierre Ossman * for transfers < 4 bytes. As long as it is just one block, 4314a3cba32SPierre Ossman * we can ignore the bits. 4324a3cba32SPierre Ossman */ 4334a3cba32SPierre Ossman if ((host->quirks & SDHCI_QUIRK_BROKEN_SMALL_PIO) && 4344a3cba32SPierre Ossman (host->data->blocks == 1)) 4354a3cba32SPierre Ossman mask = ~0; 4364a3cba32SPierre Ossman 4374e4141a5SAnton Vorontsov while (sdhci_readl(host, SDHCI_PRESENT_STATE) & mask) { 4383e3bf207SAnton Vorontsov if (host->quirks & SDHCI_QUIRK_PIO_NEEDS_DELAY) 4393e3bf207SAnton Vorontsov udelay(100); 4403e3bf207SAnton Vorontsov 4411c6a0718SPierre Ossman if (host->data->flags & MMC_DATA_READ) 4421c6a0718SPierre Ossman sdhci_read_block_pio(host); 4431c6a0718SPierre Ossman else 4441c6a0718SPierre Ossman sdhci_write_block_pio(host); 4451c6a0718SPierre Ossman 4467659150cSPierre Ossman host->blocks--; 4477659150cSPierre Ossman if (host->blocks == 0) 4481c6a0718SPierre Ossman break; 4491c6a0718SPierre Ossman } 4501c6a0718SPierre Ossman 4511c6a0718SPierre Ossman DBG("PIO transfer complete.\n"); 4521c6a0718SPierre Ossman } 4531c6a0718SPierre Ossman 4542134a922SPierre Ossman static char *sdhci_kmap_atomic(struct scatterlist *sg, unsigned long *flags) 4552134a922SPierre Ossman { 4562134a922SPierre Ossman local_irq_save(*flags); 457482fce99SCong Wang return kmap_atomic(sg_page(sg)) + sg->offset; 4582134a922SPierre Ossman } 4592134a922SPierre Ossman 4602134a922SPierre Ossman static void sdhci_kunmap_atomic(void *buffer, unsigned long *flags) 4612134a922SPierre Ossman { 462482fce99SCong Wang kunmap_atomic(buffer); 4632134a922SPierre Ossman local_irq_restore(*flags); 4642134a922SPierre Ossman } 4652134a922SPierre Ossman 466118cd17dSBen Dooks static void sdhci_set_adma_desc(u8 *desc, u32 addr, int len, unsigned cmd) 467118cd17dSBen Dooks { 4689e506f35SBen Dooks __le32 *dataddr = (__le32 __force *)(desc + 4); 4699e506f35SBen Dooks __le16 *cmdlen = (__le16 __force *)desc; 470118cd17dSBen Dooks 4719e506f35SBen Dooks /* SDHCI specification says ADMA descriptors should be 4 byte 4729e506f35SBen Dooks * aligned, so using 16 or 32bit operations should be safe. */ 473118cd17dSBen Dooks 4749e506f35SBen Dooks cmdlen[0] = cpu_to_le16(cmd); 4759e506f35SBen Dooks cmdlen[1] = cpu_to_le16(len); 4769e506f35SBen Dooks 4779e506f35SBen Dooks dataddr[0] = cpu_to_le32(addr); 478118cd17dSBen Dooks } 479118cd17dSBen Dooks 4808f1934ceSPierre Ossman static int sdhci_adma_table_pre(struct sdhci_host *host, 4812134a922SPierre Ossman struct mmc_data *data) 4822134a922SPierre Ossman { 4832134a922SPierre Ossman int direction; 4842134a922SPierre Ossman 4852134a922SPierre Ossman u8 *desc; 4862134a922SPierre Ossman u8 *align; 4872134a922SPierre Ossman dma_addr_t addr; 4882134a922SPierre Ossman dma_addr_t align_addr; 4892134a922SPierre Ossman int len, offset; 4902134a922SPierre Ossman 4912134a922SPierre Ossman struct scatterlist *sg; 4922134a922SPierre Ossman int i; 4932134a922SPierre Ossman char *buffer; 4942134a922SPierre Ossman unsigned long flags; 4952134a922SPierre Ossman 4962134a922SPierre Ossman /* 4972134a922SPierre Ossman * The spec does not specify endianness of descriptor table. 4982134a922SPierre Ossman * We currently guess that it is LE. 4992134a922SPierre Ossman */ 5002134a922SPierre Ossman 5012134a922SPierre Ossman if (data->flags & MMC_DATA_READ) 5022134a922SPierre Ossman direction = DMA_FROM_DEVICE; 5032134a922SPierre Ossman else 5042134a922SPierre Ossman direction = DMA_TO_DEVICE; 5052134a922SPierre Ossman 5062134a922SPierre Ossman /* 5072134a922SPierre Ossman * The ADMA descriptor table is mapped further down as we 5082134a922SPierre Ossman * need to fill it with data first. 5092134a922SPierre Ossman */ 5102134a922SPierre Ossman 5112134a922SPierre Ossman host->align_addr = dma_map_single(mmc_dev(host->mmc), 5122134a922SPierre Ossman host->align_buffer, 128 * 4, direction); 5138d8bb39bSFUJITA Tomonori if (dma_mapping_error(mmc_dev(host->mmc), host->align_addr)) 5148f1934ceSPierre Ossman goto fail; 5152134a922SPierre Ossman BUG_ON(host->align_addr & 0x3); 5162134a922SPierre Ossman 5172134a922SPierre Ossman host->sg_count = dma_map_sg(mmc_dev(host->mmc), 5182134a922SPierre Ossman data->sg, data->sg_len, direction); 5198f1934ceSPierre Ossman if (host->sg_count == 0) 5208f1934ceSPierre Ossman goto unmap_align; 5212134a922SPierre Ossman 5222134a922SPierre Ossman desc = host->adma_desc; 5232134a922SPierre Ossman align = host->align_buffer; 5242134a922SPierre Ossman 5252134a922SPierre Ossman align_addr = host->align_addr; 5262134a922SPierre Ossman 5272134a922SPierre Ossman for_each_sg(data->sg, sg, host->sg_count, i) { 5282134a922SPierre Ossman addr = sg_dma_address(sg); 5292134a922SPierre Ossman len = sg_dma_len(sg); 5302134a922SPierre Ossman 5312134a922SPierre Ossman /* 5322134a922SPierre Ossman * The SDHCI specification states that ADMA 5332134a922SPierre Ossman * addresses must be 32-bit aligned. If they 5342134a922SPierre Ossman * aren't, then we use a bounce buffer for 5352134a922SPierre Ossman * the (up to three) bytes that screw up the 5362134a922SPierre Ossman * alignment. 5372134a922SPierre Ossman */ 5382134a922SPierre Ossman offset = (4 - (addr & 0x3)) & 0x3; 5392134a922SPierre Ossman if (offset) { 5402134a922SPierre Ossman if (data->flags & MMC_DATA_WRITE) { 5412134a922SPierre Ossman buffer = sdhci_kmap_atomic(sg, &flags); 5426cefd05fSPierre Ossman WARN_ON(((long)buffer & PAGE_MASK) > (PAGE_SIZE - 3)); 5432134a922SPierre Ossman memcpy(align, buffer, offset); 5442134a922SPierre Ossman sdhci_kunmap_atomic(buffer, &flags); 5452134a922SPierre Ossman } 5462134a922SPierre Ossman 547118cd17dSBen Dooks /* tran, valid */ 548118cd17dSBen Dooks sdhci_set_adma_desc(desc, align_addr, offset, 0x21); 5492134a922SPierre Ossman 5502134a922SPierre Ossman BUG_ON(offset > 65536); 5512134a922SPierre Ossman 5522134a922SPierre Ossman align += 4; 5532134a922SPierre Ossman align_addr += 4; 5542134a922SPierre Ossman 5552134a922SPierre Ossman desc += 8; 5562134a922SPierre Ossman 5572134a922SPierre Ossman addr += offset; 5582134a922SPierre Ossman len -= offset; 5592134a922SPierre Ossman } 5602134a922SPierre Ossman 5612134a922SPierre Ossman BUG_ON(len > 65536); 5622134a922SPierre Ossman 563118cd17dSBen Dooks /* tran, valid */ 564118cd17dSBen Dooks sdhci_set_adma_desc(desc, addr, len, 0x21); 5652134a922SPierre Ossman desc += 8; 5662134a922SPierre Ossman 5672134a922SPierre Ossman /* 5682134a922SPierre Ossman * If this triggers then we have a calculation bug 5692134a922SPierre Ossman * somewhere. :/ 5702134a922SPierre Ossman */ 5712134a922SPierre Ossman WARN_ON((desc - host->adma_desc) > (128 * 2 + 1) * 4); 5722134a922SPierre Ossman } 5732134a922SPierre Ossman 57470764a90SThomas Abraham if (host->quirks & SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC) { 57570764a90SThomas Abraham /* 57670764a90SThomas Abraham * Mark the last descriptor as the terminating descriptor 57770764a90SThomas Abraham */ 57870764a90SThomas Abraham if (desc != host->adma_desc) { 57970764a90SThomas Abraham desc -= 8; 58070764a90SThomas Abraham desc[0] |= 0x2; /* end */ 58170764a90SThomas Abraham } 58270764a90SThomas Abraham } else { 5832134a922SPierre Ossman /* 5842134a922SPierre Ossman * Add a terminating entry. 5852134a922SPierre Ossman */ 5862134a922SPierre Ossman 587118cd17dSBen Dooks /* nop, end, valid */ 588118cd17dSBen Dooks sdhci_set_adma_desc(desc, 0, 0, 0x3); 58970764a90SThomas Abraham } 5902134a922SPierre Ossman 5912134a922SPierre Ossman /* 5922134a922SPierre Ossman * Resync align buffer as we might have changed it. 5932134a922SPierre Ossman */ 5942134a922SPierre Ossman if (data->flags & MMC_DATA_WRITE) { 5952134a922SPierre Ossman dma_sync_single_for_device(mmc_dev(host->mmc), 5962134a922SPierre Ossman host->align_addr, 128 * 4, direction); 5972134a922SPierre Ossman } 5982134a922SPierre Ossman 5992134a922SPierre Ossman host->adma_addr = dma_map_single(mmc_dev(host->mmc), 6002134a922SPierre Ossman host->adma_desc, (128 * 2 + 1) * 4, DMA_TO_DEVICE); 601980167b7SPierre Ossman if (dma_mapping_error(mmc_dev(host->mmc), host->adma_addr)) 6028f1934ceSPierre Ossman goto unmap_entries; 6032134a922SPierre Ossman BUG_ON(host->adma_addr & 0x3); 6048f1934ceSPierre Ossman 6058f1934ceSPierre Ossman return 0; 6068f1934ceSPierre Ossman 6078f1934ceSPierre Ossman unmap_entries: 6088f1934ceSPierre Ossman dma_unmap_sg(mmc_dev(host->mmc), data->sg, 6098f1934ceSPierre Ossman data->sg_len, direction); 6108f1934ceSPierre Ossman unmap_align: 6118f1934ceSPierre Ossman dma_unmap_single(mmc_dev(host->mmc), host->align_addr, 6128f1934ceSPierre Ossman 128 * 4, direction); 6138f1934ceSPierre Ossman fail: 6148f1934ceSPierre Ossman return -EINVAL; 6152134a922SPierre Ossman } 6162134a922SPierre Ossman 6172134a922SPierre Ossman static void sdhci_adma_table_post(struct sdhci_host *host, 6182134a922SPierre Ossman struct mmc_data *data) 6192134a922SPierre Ossman { 6202134a922SPierre Ossman int direction; 6212134a922SPierre Ossman 6222134a922SPierre Ossman struct scatterlist *sg; 6232134a922SPierre Ossman int i, size; 6242134a922SPierre Ossman u8 *align; 6252134a922SPierre Ossman char *buffer; 6262134a922SPierre Ossman unsigned long flags; 6272134a922SPierre Ossman 6282134a922SPierre Ossman if (data->flags & MMC_DATA_READ) 6292134a922SPierre Ossman direction = DMA_FROM_DEVICE; 6302134a922SPierre Ossman else 6312134a922SPierre Ossman direction = DMA_TO_DEVICE; 6322134a922SPierre Ossman 6332134a922SPierre Ossman dma_unmap_single(mmc_dev(host->mmc), host->adma_addr, 6342134a922SPierre Ossman (128 * 2 + 1) * 4, DMA_TO_DEVICE); 6352134a922SPierre Ossman 6362134a922SPierre Ossman dma_unmap_single(mmc_dev(host->mmc), host->align_addr, 6372134a922SPierre Ossman 128 * 4, direction); 6382134a922SPierre Ossman 6392134a922SPierre Ossman if (data->flags & MMC_DATA_READ) { 6402134a922SPierre Ossman dma_sync_sg_for_cpu(mmc_dev(host->mmc), data->sg, 6412134a922SPierre Ossman data->sg_len, direction); 6422134a922SPierre Ossman 6432134a922SPierre Ossman align = host->align_buffer; 6442134a922SPierre Ossman 6452134a922SPierre Ossman for_each_sg(data->sg, sg, host->sg_count, i) { 6462134a922SPierre Ossman if (sg_dma_address(sg) & 0x3) { 6472134a922SPierre Ossman size = 4 - (sg_dma_address(sg) & 0x3); 6482134a922SPierre Ossman 6492134a922SPierre Ossman buffer = sdhci_kmap_atomic(sg, &flags); 6506cefd05fSPierre Ossman WARN_ON(((long)buffer & PAGE_MASK) > (PAGE_SIZE - 3)); 6512134a922SPierre Ossman memcpy(buffer, align, size); 6522134a922SPierre Ossman sdhci_kunmap_atomic(buffer, &flags); 6532134a922SPierre Ossman 6542134a922SPierre Ossman align += 4; 6552134a922SPierre Ossman } 6562134a922SPierre Ossman } 6572134a922SPierre Ossman } 6582134a922SPierre Ossman 6592134a922SPierre Ossman dma_unmap_sg(mmc_dev(host->mmc), data->sg, 6602134a922SPierre Ossman data->sg_len, direction); 6612134a922SPierre Ossman } 6622134a922SPierre Ossman 663a3c7778fSAndrei Warkentin static u8 sdhci_calc_timeout(struct sdhci_host *host, struct mmc_command *cmd) 6641c6a0718SPierre Ossman { 6651c6a0718SPierre Ossman u8 count; 666a3c7778fSAndrei Warkentin struct mmc_data *data = cmd->data; 6671c6a0718SPierre Ossman unsigned target_timeout, current_timeout; 6681c6a0718SPierre Ossman 669ee53ab5dSPierre Ossman /* 670ee53ab5dSPierre Ossman * If the host controller provides us with an incorrect timeout 671ee53ab5dSPierre Ossman * value, just skip the check and use 0xE. The hardware may take 672ee53ab5dSPierre Ossman * longer to time out, but that's much better than having a too-short 673ee53ab5dSPierre Ossman * timeout value. 674ee53ab5dSPierre Ossman */ 67511a2f1b7SPierre Ossman if (host->quirks & SDHCI_QUIRK_BROKEN_TIMEOUT_VAL) 676ee53ab5dSPierre Ossman return 0xE; 677e538fbe8SPierre Ossman 678a3c7778fSAndrei Warkentin /* Unspecified timeout, assume max */ 679a3c7778fSAndrei Warkentin if (!data && !cmd->cmd_timeout_ms) 680a3c7778fSAndrei Warkentin return 0xE; 681a3c7778fSAndrei Warkentin 6821c6a0718SPierre Ossman /* timeout in us */ 683a3c7778fSAndrei Warkentin if (!data) 684a3c7778fSAndrei Warkentin target_timeout = cmd->cmd_timeout_ms * 1000; 68578a2ca27SAndy Shevchenko else { 68678a2ca27SAndy Shevchenko target_timeout = data->timeout_ns / 1000; 68778a2ca27SAndy Shevchenko if (host->clock) 68878a2ca27SAndy Shevchenko target_timeout += data->timeout_clks / host->clock; 68978a2ca27SAndy Shevchenko } 6901c6a0718SPierre Ossman 6911c6a0718SPierre Ossman /* 6921c6a0718SPierre Ossman * Figure out needed cycles. 6931c6a0718SPierre Ossman * We do this in steps in order to fit inside a 32 bit int. 6941c6a0718SPierre Ossman * The first step is the minimum timeout, which will have a 6951c6a0718SPierre Ossman * minimum resolution of 6 bits: 6961c6a0718SPierre Ossman * (1) 2^13*1000 > 2^22, 6971c6a0718SPierre Ossman * (2) host->timeout_clk < 2^16 6981c6a0718SPierre Ossman * => 6991c6a0718SPierre Ossman * (1) / (2) > 2^6 7001c6a0718SPierre Ossman */ 7011c6a0718SPierre Ossman count = 0; 7021c6a0718SPierre Ossman current_timeout = (1 << 13) * 1000 / host->timeout_clk; 7031c6a0718SPierre Ossman while (current_timeout < target_timeout) { 7041c6a0718SPierre Ossman count++; 7051c6a0718SPierre Ossman current_timeout <<= 1; 7061c6a0718SPierre Ossman if (count >= 0xF) 7071c6a0718SPierre Ossman break; 7081c6a0718SPierre Ossman } 7091c6a0718SPierre Ossman 7101c6a0718SPierre Ossman if (count >= 0xF) { 71109eeff52SChris Ball DBG("%s: Too large timeout 0x%x requested for CMD%d!\n", 71202145977SMark Brown mmc_hostname(host->mmc), count, cmd->opcode); 7131c6a0718SPierre Ossman count = 0xE; 7141c6a0718SPierre Ossman } 7151c6a0718SPierre Ossman 716ee53ab5dSPierre Ossman return count; 717ee53ab5dSPierre Ossman } 718ee53ab5dSPierre Ossman 7196aa943abSAnton Vorontsov static void sdhci_set_transfer_irqs(struct sdhci_host *host) 7206aa943abSAnton Vorontsov { 7216aa943abSAnton Vorontsov u32 pio_irqs = SDHCI_INT_DATA_AVAIL | SDHCI_INT_SPACE_AVAIL; 7226aa943abSAnton Vorontsov u32 dma_irqs = SDHCI_INT_DMA_END | SDHCI_INT_ADMA_ERROR; 7236aa943abSAnton Vorontsov 7246aa943abSAnton Vorontsov if (host->flags & SDHCI_REQ_USE_DMA) 7256aa943abSAnton Vorontsov sdhci_clear_set_irqs(host, pio_irqs, dma_irqs); 7266aa943abSAnton Vorontsov else 7276aa943abSAnton Vorontsov sdhci_clear_set_irqs(host, dma_irqs, pio_irqs); 7286aa943abSAnton Vorontsov } 7296aa943abSAnton Vorontsov 730a3c7778fSAndrei Warkentin static void sdhci_prepare_data(struct sdhci_host *host, struct mmc_command *cmd) 731ee53ab5dSPierre Ossman { 732ee53ab5dSPierre Ossman u8 count; 7332134a922SPierre Ossman u8 ctrl; 734a3c7778fSAndrei Warkentin struct mmc_data *data = cmd->data; 7358f1934ceSPierre Ossman int ret; 736ee53ab5dSPierre Ossman 737ee53ab5dSPierre Ossman WARN_ON(host->data); 738ee53ab5dSPierre Ossman 739a3c7778fSAndrei Warkentin if (data || (cmd->flags & MMC_RSP_BUSY)) { 740a3c7778fSAndrei Warkentin count = sdhci_calc_timeout(host, cmd); 741a3c7778fSAndrei Warkentin sdhci_writeb(host, count, SDHCI_TIMEOUT_CONTROL); 742a3c7778fSAndrei Warkentin } 743a3c7778fSAndrei Warkentin 744a3c7778fSAndrei Warkentin if (!data) 745ee53ab5dSPierre Ossman return; 746ee53ab5dSPierre Ossman 747ee53ab5dSPierre Ossman /* Sanity checks */ 748ee53ab5dSPierre Ossman BUG_ON(data->blksz * data->blocks > 524288); 749ee53ab5dSPierre Ossman BUG_ON(data->blksz > host->mmc->max_blk_size); 750ee53ab5dSPierre Ossman BUG_ON(data->blocks > 65535); 751ee53ab5dSPierre Ossman 752ee53ab5dSPierre Ossman host->data = data; 753ee53ab5dSPierre Ossman host->data_early = 0; 754f6a03cbfSMikko Vinni host->data->bytes_xfered = 0; 755ee53ab5dSPierre Ossman 756a13abc7bSRichard Röjfors if (host->flags & (SDHCI_USE_SDMA | SDHCI_USE_ADMA)) 757c9fddbc4SPierre Ossman host->flags |= SDHCI_REQ_USE_DMA; 758c9fddbc4SPierre Ossman 7592134a922SPierre Ossman /* 7602134a922SPierre Ossman * FIXME: This doesn't account for merging when mapping the 7612134a922SPierre Ossman * scatterlist. 7622134a922SPierre Ossman */ 7632134a922SPierre Ossman if (host->flags & SDHCI_REQ_USE_DMA) { 7642134a922SPierre Ossman int broken, i; 7652134a922SPierre Ossman struct scatterlist *sg; 7662134a922SPierre Ossman 7672134a922SPierre Ossman broken = 0; 7682134a922SPierre Ossman if (host->flags & SDHCI_USE_ADMA) { 7692134a922SPierre Ossman if (host->quirks & SDHCI_QUIRK_32BIT_ADMA_SIZE) 7702134a922SPierre Ossman broken = 1; 7712134a922SPierre Ossman } else { 7722134a922SPierre Ossman if (host->quirks & SDHCI_QUIRK_32BIT_DMA_SIZE) 7732134a922SPierre Ossman broken = 1; 7742134a922SPierre Ossman } 7752134a922SPierre Ossman 7762134a922SPierre Ossman if (unlikely(broken)) { 7772134a922SPierre Ossman for_each_sg(data->sg, sg, data->sg_len, i) { 7782134a922SPierre Ossman if (sg->length & 0x3) { 7792134a922SPierre Ossman DBG("Reverting to PIO because of " 7802134a922SPierre Ossman "transfer size (%d)\n", 7812134a922SPierre Ossman sg->length); 782c9fddbc4SPierre Ossman host->flags &= ~SDHCI_REQ_USE_DMA; 7832134a922SPierre Ossman break; 7842134a922SPierre Ossman } 7852134a922SPierre Ossman } 7862134a922SPierre Ossman } 787c9fddbc4SPierre Ossman } 788c9fddbc4SPierre Ossman 789c9fddbc4SPierre Ossman /* 790c9fddbc4SPierre Ossman * The assumption here being that alignment is the same after 791c9fddbc4SPierre Ossman * translation to device address space. 792c9fddbc4SPierre Ossman */ 7932134a922SPierre Ossman if (host->flags & SDHCI_REQ_USE_DMA) { 7942134a922SPierre Ossman int broken, i; 7952134a922SPierre Ossman struct scatterlist *sg; 7962134a922SPierre Ossman 7972134a922SPierre Ossman broken = 0; 7982134a922SPierre Ossman if (host->flags & SDHCI_USE_ADMA) { 7992134a922SPierre Ossman /* 8002134a922SPierre Ossman * As we use 3 byte chunks to work around 8012134a922SPierre Ossman * alignment problems, we need to check this 8022134a922SPierre Ossman * quirk. 8032134a922SPierre Ossman */ 8042134a922SPierre Ossman if (host->quirks & SDHCI_QUIRK_32BIT_ADMA_SIZE) 8052134a922SPierre Ossman broken = 1; 8062134a922SPierre Ossman } else { 8072134a922SPierre Ossman if (host->quirks & SDHCI_QUIRK_32BIT_DMA_ADDR) 8082134a922SPierre Ossman broken = 1; 8092134a922SPierre Ossman } 8102134a922SPierre Ossman 8112134a922SPierre Ossman if (unlikely(broken)) { 8122134a922SPierre Ossman for_each_sg(data->sg, sg, data->sg_len, i) { 8132134a922SPierre Ossman if (sg->offset & 0x3) { 8142134a922SPierre Ossman DBG("Reverting to PIO because of " 8152134a922SPierre Ossman "bad alignment\n"); 816c9fddbc4SPierre Ossman host->flags &= ~SDHCI_REQ_USE_DMA; 8172134a922SPierre Ossman break; 8182134a922SPierre Ossman } 8192134a922SPierre Ossman } 8202134a922SPierre Ossman } 8212134a922SPierre Ossman } 8222134a922SPierre Ossman 8238f1934ceSPierre Ossman if (host->flags & SDHCI_REQ_USE_DMA) { 8248f1934ceSPierre Ossman if (host->flags & SDHCI_USE_ADMA) { 8258f1934ceSPierre Ossman ret = sdhci_adma_table_pre(host, data); 8268f1934ceSPierre Ossman if (ret) { 8278f1934ceSPierre Ossman /* 8288f1934ceSPierre Ossman * This only happens when someone fed 8298f1934ceSPierre Ossman * us an invalid request. 8308f1934ceSPierre Ossman */ 8318f1934ceSPierre Ossman WARN_ON(1); 832ebd6d357SPierre Ossman host->flags &= ~SDHCI_REQ_USE_DMA; 8338f1934ceSPierre Ossman } else { 8344e4141a5SAnton Vorontsov sdhci_writel(host, host->adma_addr, 8354e4141a5SAnton Vorontsov SDHCI_ADMA_ADDRESS); 8368f1934ceSPierre Ossman } 8378f1934ceSPierre Ossman } else { 838c8b3e02eSTomas Winkler int sg_cnt; 8398f1934ceSPierre Ossman 840c8b3e02eSTomas Winkler sg_cnt = dma_map_sg(mmc_dev(host->mmc), 8418f1934ceSPierre Ossman data->sg, data->sg_len, 8428f1934ceSPierre Ossman (data->flags & MMC_DATA_READ) ? 8438f1934ceSPierre Ossman DMA_FROM_DEVICE : 8448f1934ceSPierre Ossman DMA_TO_DEVICE); 845c8b3e02eSTomas Winkler if (sg_cnt == 0) { 8468f1934ceSPierre Ossman /* 8478f1934ceSPierre Ossman * This only happens when someone fed 8488f1934ceSPierre Ossman * us an invalid request. 8498f1934ceSPierre Ossman */ 8508f1934ceSPierre Ossman WARN_ON(1); 851ebd6d357SPierre Ossman host->flags &= ~SDHCI_REQ_USE_DMA; 8528f1934ceSPierre Ossman } else { 853719a61b4SPierre Ossman WARN_ON(sg_cnt != 1); 8544e4141a5SAnton Vorontsov sdhci_writel(host, sg_dma_address(data->sg), 8554e4141a5SAnton Vorontsov SDHCI_DMA_ADDRESS); 8568f1934ceSPierre Ossman } 8578f1934ceSPierre Ossman } 8588f1934ceSPierre Ossman } 8598f1934ceSPierre Ossman 8602134a922SPierre Ossman /* 8612134a922SPierre Ossman * Always adjust the DMA selection as some controllers 8622134a922SPierre Ossman * (e.g. JMicron) can't do PIO properly when the selection 8632134a922SPierre Ossman * is ADMA. 8642134a922SPierre Ossman */ 8652134a922SPierre Ossman if (host->version >= SDHCI_SPEC_200) { 8664e4141a5SAnton Vorontsov ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL); 8672134a922SPierre Ossman ctrl &= ~SDHCI_CTRL_DMA_MASK; 8682134a922SPierre Ossman if ((host->flags & SDHCI_REQ_USE_DMA) && 8692134a922SPierre Ossman (host->flags & SDHCI_USE_ADMA)) 8702134a922SPierre Ossman ctrl |= SDHCI_CTRL_ADMA32; 8712134a922SPierre Ossman else 8722134a922SPierre Ossman ctrl |= SDHCI_CTRL_SDMA; 8734e4141a5SAnton Vorontsov sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL); 874c9fddbc4SPierre Ossman } 875c9fddbc4SPierre Ossman 8768f1934ceSPierre Ossman if (!(host->flags & SDHCI_REQ_USE_DMA)) { 877da60a91dSSebastian Andrzej Siewior int flags; 878da60a91dSSebastian Andrzej Siewior 879da60a91dSSebastian Andrzej Siewior flags = SG_MITER_ATOMIC; 880da60a91dSSebastian Andrzej Siewior if (host->data->flags & MMC_DATA_READ) 881da60a91dSSebastian Andrzej Siewior flags |= SG_MITER_TO_SG; 882da60a91dSSebastian Andrzej Siewior else 883da60a91dSSebastian Andrzej Siewior flags |= SG_MITER_FROM_SG; 884da60a91dSSebastian Andrzej Siewior sg_miter_start(&host->sg_miter, data->sg, data->sg_len, flags); 8857659150cSPierre Ossman host->blocks = data->blocks; 8861c6a0718SPierre Ossman } 8871c6a0718SPierre Ossman 8886aa943abSAnton Vorontsov sdhci_set_transfer_irqs(host); 8896aa943abSAnton Vorontsov 890f6a03cbfSMikko Vinni /* Set the DMA boundary value and block size */ 891f6a03cbfSMikko Vinni sdhci_writew(host, SDHCI_MAKE_BLKSZ(SDHCI_DEFAULT_BOUNDARY_ARG, 892f6a03cbfSMikko Vinni data->blksz), SDHCI_BLOCK_SIZE); 8934e4141a5SAnton Vorontsov sdhci_writew(host, data->blocks, SDHCI_BLOCK_COUNT); 8941c6a0718SPierre Ossman } 8951c6a0718SPierre Ossman 8961c6a0718SPierre Ossman static void sdhci_set_transfer_mode(struct sdhci_host *host, 897e89d456fSAndrei Warkentin struct mmc_command *cmd) 8981c6a0718SPierre Ossman { 8991c6a0718SPierre Ossman u16 mode; 900e89d456fSAndrei Warkentin struct mmc_data *data = cmd->data; 9011c6a0718SPierre Ossman 9021c6a0718SPierre Ossman if (data == NULL) 9031c6a0718SPierre Ossman return; 9041c6a0718SPierre Ossman 905e538fbe8SPierre Ossman WARN_ON(!host->data); 906e538fbe8SPierre Ossman 9071c6a0718SPierre Ossman mode = SDHCI_TRNS_BLK_CNT_EN; 908e89d456fSAndrei Warkentin if (mmc_op_multi(cmd->opcode) || data->blocks > 1) { 9091c6a0718SPierre Ossman mode |= SDHCI_TRNS_MULTI; 910e89d456fSAndrei Warkentin /* 911e89d456fSAndrei Warkentin * If we are sending CMD23, CMD12 never gets sent 912e89d456fSAndrei Warkentin * on successful completion (so no Auto-CMD12). 913e89d456fSAndrei Warkentin */ 914e89d456fSAndrei Warkentin if (!host->mrq->sbc && (host->flags & SDHCI_AUTO_CMD12)) 915e89d456fSAndrei Warkentin mode |= SDHCI_TRNS_AUTO_CMD12; 9168edf6371SAndrei Warkentin else if (host->mrq->sbc && (host->flags & SDHCI_AUTO_CMD23)) { 9178edf6371SAndrei Warkentin mode |= SDHCI_TRNS_AUTO_CMD23; 9188edf6371SAndrei Warkentin sdhci_writel(host, host->mrq->sbc->arg, SDHCI_ARGUMENT2); 919c4512f79SJerry Huang } 9208edf6371SAndrei Warkentin } 9218edf6371SAndrei Warkentin 9221c6a0718SPierre Ossman if (data->flags & MMC_DATA_READ) 9231c6a0718SPierre Ossman mode |= SDHCI_TRNS_READ; 924c9fddbc4SPierre Ossman if (host->flags & SDHCI_REQ_USE_DMA) 9251c6a0718SPierre Ossman mode |= SDHCI_TRNS_DMA; 9261c6a0718SPierre Ossman 9274e4141a5SAnton Vorontsov sdhci_writew(host, mode, SDHCI_TRANSFER_MODE); 9281c6a0718SPierre Ossman } 9291c6a0718SPierre Ossman 9301c6a0718SPierre Ossman static void sdhci_finish_data(struct sdhci_host *host) 9311c6a0718SPierre Ossman { 9321c6a0718SPierre Ossman struct mmc_data *data; 9331c6a0718SPierre Ossman 9341c6a0718SPierre Ossman BUG_ON(!host->data); 9351c6a0718SPierre Ossman 9361c6a0718SPierre Ossman data = host->data; 9371c6a0718SPierre Ossman host->data = NULL; 9381c6a0718SPierre Ossman 939c9fddbc4SPierre Ossman if (host->flags & SDHCI_REQ_USE_DMA) { 9402134a922SPierre Ossman if (host->flags & SDHCI_USE_ADMA) 9412134a922SPierre Ossman sdhci_adma_table_post(host, data); 9422134a922SPierre Ossman else { 9432134a922SPierre Ossman dma_unmap_sg(mmc_dev(host->mmc), data->sg, 9442134a922SPierre Ossman data->sg_len, (data->flags & MMC_DATA_READ) ? 945b8c86fc5SPierre Ossman DMA_FROM_DEVICE : DMA_TO_DEVICE); 9461c6a0718SPierre Ossman } 9472134a922SPierre Ossman } 9481c6a0718SPierre Ossman 9491c6a0718SPierre Ossman /* 950c9b74c5bSPierre Ossman * The specification states that the block count register must 951c9b74c5bSPierre Ossman * be updated, but it does not specify at what point in the 952c9b74c5bSPierre Ossman * data flow. That makes the register entirely useless to read 953c9b74c5bSPierre Ossman * back so we have to assume that nothing made it to the card 954c9b74c5bSPierre Ossman * in the event of an error. 9551c6a0718SPierre Ossman */ 956c9b74c5bSPierre Ossman if (data->error) 957c9b74c5bSPierre Ossman data->bytes_xfered = 0; 9581c6a0718SPierre Ossman else 959c9b74c5bSPierre Ossman data->bytes_xfered = data->blksz * data->blocks; 9601c6a0718SPierre Ossman 961e89d456fSAndrei Warkentin /* 962e89d456fSAndrei Warkentin * Need to send CMD12 if - 963e89d456fSAndrei Warkentin * a) open-ended multiblock transfer (no CMD23) 964e89d456fSAndrei Warkentin * b) error in multiblock transfer 965e89d456fSAndrei Warkentin */ 966e89d456fSAndrei Warkentin if (data->stop && 967e89d456fSAndrei Warkentin (data->error || 968e89d456fSAndrei Warkentin !host->mrq->sbc)) { 969e89d456fSAndrei Warkentin 9701c6a0718SPierre Ossman /* 9711c6a0718SPierre Ossman * The controller needs a reset of internal state machines 9721c6a0718SPierre Ossman * upon error conditions. 9731c6a0718SPierre Ossman */ 97417b0429dSPierre Ossman if (data->error) { 9751c6a0718SPierre Ossman sdhci_reset(host, SDHCI_RESET_CMD); 9761c6a0718SPierre Ossman sdhci_reset(host, SDHCI_RESET_DATA); 9771c6a0718SPierre Ossman } 9781c6a0718SPierre Ossman 9791c6a0718SPierre Ossman sdhci_send_command(host, data->stop); 9801c6a0718SPierre Ossman } else 9811c6a0718SPierre Ossman tasklet_schedule(&host->finish_tasklet); 9821c6a0718SPierre Ossman } 9831c6a0718SPierre Ossman 9841c6a0718SPierre Ossman static void sdhci_send_command(struct sdhci_host *host, struct mmc_command *cmd) 9851c6a0718SPierre Ossman { 9861c6a0718SPierre Ossman int flags; 9871c6a0718SPierre Ossman u32 mask; 9881c6a0718SPierre Ossman unsigned long timeout; 9891c6a0718SPierre Ossman 9901c6a0718SPierre Ossman WARN_ON(host->cmd); 9911c6a0718SPierre Ossman 9921c6a0718SPierre Ossman /* Wait max 10 ms */ 9931c6a0718SPierre Ossman timeout = 10; 9941c6a0718SPierre Ossman 9951c6a0718SPierre Ossman mask = SDHCI_CMD_INHIBIT; 9961c6a0718SPierre Ossman if ((cmd->data != NULL) || (cmd->flags & MMC_RSP_BUSY)) 9971c6a0718SPierre Ossman mask |= SDHCI_DATA_INHIBIT; 9981c6a0718SPierre Ossman 9991c6a0718SPierre Ossman /* We shouldn't wait for data inihibit for stop commands, even 10001c6a0718SPierre Ossman though they might use busy signaling */ 10011c6a0718SPierre Ossman if (host->mrq->data && (cmd == host->mrq->data->stop)) 10021c6a0718SPierre Ossman mask &= ~SDHCI_DATA_INHIBIT; 10031c6a0718SPierre Ossman 10044e4141a5SAnton Vorontsov while (sdhci_readl(host, SDHCI_PRESENT_STATE) & mask) { 10051c6a0718SPierre Ossman if (timeout == 0) { 1006a3c76eb9SGirish K S pr_err("%s: Controller never released " 10071c6a0718SPierre Ossman "inhibit bit(s).\n", mmc_hostname(host->mmc)); 10081c6a0718SPierre Ossman sdhci_dumpregs(host); 100917b0429dSPierre Ossman cmd->error = -EIO; 10101c6a0718SPierre Ossman tasklet_schedule(&host->finish_tasklet); 10111c6a0718SPierre Ossman return; 10121c6a0718SPierre Ossman } 10131c6a0718SPierre Ossman timeout--; 10141c6a0718SPierre Ossman mdelay(1); 10151c6a0718SPierre Ossman } 10161c6a0718SPierre Ossman 10171c6a0718SPierre Ossman mod_timer(&host->timer, jiffies + 10 * HZ); 10181c6a0718SPierre Ossman 10191c6a0718SPierre Ossman host->cmd = cmd; 10201c6a0718SPierre Ossman 1021a3c7778fSAndrei Warkentin sdhci_prepare_data(host, cmd); 10221c6a0718SPierre Ossman 10234e4141a5SAnton Vorontsov sdhci_writel(host, cmd->arg, SDHCI_ARGUMENT); 10241c6a0718SPierre Ossman 1025e89d456fSAndrei Warkentin sdhci_set_transfer_mode(host, cmd); 10261c6a0718SPierre Ossman 10271c6a0718SPierre Ossman if ((cmd->flags & MMC_RSP_136) && (cmd->flags & MMC_RSP_BUSY)) { 1028a3c76eb9SGirish K S pr_err("%s: Unsupported response type!\n", 10291c6a0718SPierre Ossman mmc_hostname(host->mmc)); 103017b0429dSPierre Ossman cmd->error = -EINVAL; 10311c6a0718SPierre Ossman tasklet_schedule(&host->finish_tasklet); 10321c6a0718SPierre Ossman return; 10331c6a0718SPierre Ossman } 10341c6a0718SPierre Ossman 10351c6a0718SPierre Ossman if (!(cmd->flags & MMC_RSP_PRESENT)) 10361c6a0718SPierre Ossman flags = SDHCI_CMD_RESP_NONE; 10371c6a0718SPierre Ossman else if (cmd->flags & MMC_RSP_136) 10381c6a0718SPierre Ossman flags = SDHCI_CMD_RESP_LONG; 10391c6a0718SPierre Ossman else if (cmd->flags & MMC_RSP_BUSY) 10401c6a0718SPierre Ossman flags = SDHCI_CMD_RESP_SHORT_BUSY; 10411c6a0718SPierre Ossman else 10421c6a0718SPierre Ossman flags = SDHCI_CMD_RESP_SHORT; 10431c6a0718SPierre Ossman 10441c6a0718SPierre Ossman if (cmd->flags & MMC_RSP_CRC) 10451c6a0718SPierre Ossman flags |= SDHCI_CMD_CRC; 10461c6a0718SPierre Ossman if (cmd->flags & MMC_RSP_OPCODE) 10471c6a0718SPierre Ossman flags |= SDHCI_CMD_INDEX; 1048b513ea25SArindam Nath 1049b513ea25SArindam Nath /* CMD19 is special in that the Data Present Select should be set */ 1050069c9f14SGirish K S if (cmd->data || cmd->opcode == MMC_SEND_TUNING_BLOCK || 1051069c9f14SGirish K S cmd->opcode == MMC_SEND_TUNING_BLOCK_HS200) 10521c6a0718SPierre Ossman flags |= SDHCI_CMD_DATA; 10531c6a0718SPierre Ossman 10544e4141a5SAnton Vorontsov sdhci_writew(host, SDHCI_MAKE_CMD(cmd->opcode, flags), SDHCI_COMMAND); 10551c6a0718SPierre Ossman } 10561c6a0718SPierre Ossman 10571c6a0718SPierre Ossman static void sdhci_finish_command(struct sdhci_host *host) 10581c6a0718SPierre Ossman { 10591c6a0718SPierre Ossman int i; 10601c6a0718SPierre Ossman 10611c6a0718SPierre Ossman BUG_ON(host->cmd == NULL); 10621c6a0718SPierre Ossman 10631c6a0718SPierre Ossman if (host->cmd->flags & MMC_RSP_PRESENT) { 10641c6a0718SPierre Ossman if (host->cmd->flags & MMC_RSP_136) { 10651c6a0718SPierre Ossman /* CRC is stripped so we need to do some shifting. */ 10661c6a0718SPierre Ossman for (i = 0;i < 4;i++) { 10674e4141a5SAnton Vorontsov host->cmd->resp[i] = sdhci_readl(host, 10681c6a0718SPierre Ossman SDHCI_RESPONSE + (3-i)*4) << 8; 10691c6a0718SPierre Ossman if (i != 3) 10701c6a0718SPierre Ossman host->cmd->resp[i] |= 10714e4141a5SAnton Vorontsov sdhci_readb(host, 10721c6a0718SPierre Ossman SDHCI_RESPONSE + (3-i)*4-1); 10731c6a0718SPierre Ossman } 10741c6a0718SPierre Ossman } else { 10754e4141a5SAnton Vorontsov host->cmd->resp[0] = sdhci_readl(host, SDHCI_RESPONSE); 10761c6a0718SPierre Ossman } 10771c6a0718SPierre Ossman } 10781c6a0718SPierre Ossman 107917b0429dSPierre Ossman host->cmd->error = 0; 10801c6a0718SPierre Ossman 1081e89d456fSAndrei Warkentin /* Finished CMD23, now send actual command. */ 1082e89d456fSAndrei Warkentin if (host->cmd == host->mrq->sbc) { 1083e89d456fSAndrei Warkentin host->cmd = NULL; 1084e89d456fSAndrei Warkentin sdhci_send_command(host, host->mrq->cmd); 1085e89d456fSAndrei Warkentin } else { 1086e89d456fSAndrei Warkentin 1087e89d456fSAndrei Warkentin /* Processed actual command. */ 1088e538fbe8SPierre Ossman if (host->data && host->data_early) 1089e538fbe8SPierre Ossman sdhci_finish_data(host); 1090e538fbe8SPierre Ossman 1091e538fbe8SPierre Ossman if (!host->cmd->data) 10921c6a0718SPierre Ossman tasklet_schedule(&host->finish_tasklet); 10931c6a0718SPierre Ossman 10941c6a0718SPierre Ossman host->cmd = NULL; 10951c6a0718SPierre Ossman } 1096e89d456fSAndrei Warkentin } 10971c6a0718SPierre Ossman 109852983382SKevin Liu static u16 sdhci_get_preset_value(struct sdhci_host *host) 109952983382SKevin Liu { 110052983382SKevin Liu u16 ctrl, preset = 0; 110152983382SKevin Liu 110252983382SKevin Liu ctrl = sdhci_readw(host, SDHCI_HOST_CONTROL2); 110352983382SKevin Liu 110452983382SKevin Liu switch (ctrl & SDHCI_CTRL_UHS_MASK) { 110552983382SKevin Liu case SDHCI_CTRL_UHS_SDR12: 110652983382SKevin Liu preset = sdhci_readw(host, SDHCI_PRESET_FOR_SDR12); 110752983382SKevin Liu break; 110852983382SKevin Liu case SDHCI_CTRL_UHS_SDR25: 110952983382SKevin Liu preset = sdhci_readw(host, SDHCI_PRESET_FOR_SDR25); 111052983382SKevin Liu break; 111152983382SKevin Liu case SDHCI_CTRL_UHS_SDR50: 111252983382SKevin Liu preset = sdhci_readw(host, SDHCI_PRESET_FOR_SDR50); 111352983382SKevin Liu break; 111452983382SKevin Liu case SDHCI_CTRL_UHS_SDR104: 111552983382SKevin Liu preset = sdhci_readw(host, SDHCI_PRESET_FOR_SDR104); 111652983382SKevin Liu break; 111752983382SKevin Liu case SDHCI_CTRL_UHS_DDR50: 111852983382SKevin Liu preset = sdhci_readw(host, SDHCI_PRESET_FOR_DDR50); 111952983382SKevin Liu break; 112052983382SKevin Liu default: 112152983382SKevin Liu pr_warn("%s: Invalid UHS-I mode selected\n", 112252983382SKevin Liu mmc_hostname(host->mmc)); 112352983382SKevin Liu preset = sdhci_readw(host, SDHCI_PRESET_FOR_SDR12); 112452983382SKevin Liu break; 112552983382SKevin Liu } 112652983382SKevin Liu return preset; 112752983382SKevin Liu } 112852983382SKevin Liu 11291c6a0718SPierre Ossman static void sdhci_set_clock(struct sdhci_host *host, unsigned int clock) 11301c6a0718SPierre Ossman { 1131c3ed3877SArindam Nath int div = 0; /* Initialized for compiler warning */ 1132df16219fSGiuseppe CAVALLARO int real_div = div, clk_mul = 1; 1133c3ed3877SArindam Nath u16 clk = 0; 11341c6a0718SPierre Ossman unsigned long timeout; 11351c6a0718SPierre Ossman 113630832ab5STodd Poynor if (clock && clock == host->clock) 11371c6a0718SPierre Ossman return; 11381c6a0718SPierre Ossman 1139df16219fSGiuseppe CAVALLARO host->mmc->actual_clock = 0; 1140df16219fSGiuseppe CAVALLARO 11418114634cSAnton Vorontsov if (host->ops->set_clock) { 11428114634cSAnton Vorontsov host->ops->set_clock(host, clock); 11438114634cSAnton Vorontsov if (host->quirks & SDHCI_QUIRK_NONSTANDARD_CLOCK) 11448114634cSAnton Vorontsov return; 11458114634cSAnton Vorontsov } 11468114634cSAnton Vorontsov 11474e4141a5SAnton Vorontsov sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL); 11481c6a0718SPierre Ossman 11491c6a0718SPierre Ossman if (clock == 0) 11501c6a0718SPierre Ossman goto out; 11511c6a0718SPierre Ossman 115285105c53SZhangfei Gao if (host->version >= SDHCI_SPEC_300) { 115352983382SKevin Liu if (sdhci_readw(host, SDHCI_HOST_CONTROL2) & 115452983382SKevin Liu SDHCI_CTRL_PRESET_VAL_ENABLE) { 115552983382SKevin Liu u16 pre_val; 115652983382SKevin Liu 115752983382SKevin Liu clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL); 115852983382SKevin Liu pre_val = sdhci_get_preset_value(host); 115952983382SKevin Liu div = (pre_val & SDHCI_PRESET_SDCLK_FREQ_MASK) 116052983382SKevin Liu >> SDHCI_PRESET_SDCLK_FREQ_SHIFT; 116152983382SKevin Liu if (host->clk_mul && 116252983382SKevin Liu (pre_val & SDHCI_PRESET_CLKGEN_SEL_MASK)) { 116352983382SKevin Liu clk = SDHCI_PROG_CLOCK_MODE; 116452983382SKevin Liu real_div = div + 1; 116552983382SKevin Liu clk_mul = host->clk_mul; 116652983382SKevin Liu } else { 116752983382SKevin Liu real_div = max_t(int, 1, div << 1); 116852983382SKevin Liu } 116952983382SKevin Liu goto clock_set; 117052983382SKevin Liu } 117152983382SKevin Liu 1172c3ed3877SArindam Nath /* 1173c3ed3877SArindam Nath * Check if the Host Controller supports Programmable Clock 1174c3ed3877SArindam Nath * Mode. 1175c3ed3877SArindam Nath */ 1176c3ed3877SArindam Nath if (host->clk_mul) { 1177c3ed3877SArindam Nath for (div = 1; div <= 1024; div++) { 117852983382SKevin Liu if ((host->max_clk * host->clk_mul / div) 117952983382SKevin Liu <= clock) 1180c3ed3877SArindam Nath break; 1181c3ed3877SArindam Nath } 1182c3ed3877SArindam Nath /* 1183c3ed3877SArindam Nath * Set Programmable Clock Mode in the Clock 1184c3ed3877SArindam Nath * Control register. 1185c3ed3877SArindam Nath */ 1186c3ed3877SArindam Nath clk = SDHCI_PROG_CLOCK_MODE; 1187df16219fSGiuseppe CAVALLARO real_div = div; 1188df16219fSGiuseppe CAVALLARO clk_mul = host->clk_mul; 1189c3ed3877SArindam Nath div--; 1190c3ed3877SArindam Nath } else { 119185105c53SZhangfei Gao /* Version 3.00 divisors must be a multiple of 2. */ 119285105c53SZhangfei Gao if (host->max_clk <= clock) 119385105c53SZhangfei Gao div = 1; 119485105c53SZhangfei Gao else { 1195c3ed3877SArindam Nath for (div = 2; div < SDHCI_MAX_DIV_SPEC_300; 1196c3ed3877SArindam Nath div += 2) { 119785105c53SZhangfei Gao if ((host->max_clk / div) <= clock) 119885105c53SZhangfei Gao break; 119985105c53SZhangfei Gao } 120085105c53SZhangfei Gao } 1201df16219fSGiuseppe CAVALLARO real_div = div; 1202c3ed3877SArindam Nath div >>= 1; 1203c3ed3877SArindam Nath } 120485105c53SZhangfei Gao } else { 120585105c53SZhangfei Gao /* Version 2.00 divisors must be a power of 2. */ 12060397526dSZhangfei Gao for (div = 1; div < SDHCI_MAX_DIV_SPEC_200; div *= 2) { 12071c6a0718SPierre Ossman if ((host->max_clk / div) <= clock) 12081c6a0718SPierre Ossman break; 12091c6a0718SPierre Ossman } 1210df16219fSGiuseppe CAVALLARO real_div = div; 12111c6a0718SPierre Ossman div >>= 1; 1212c3ed3877SArindam Nath } 12131c6a0718SPierre Ossman 121452983382SKevin Liu clock_set: 1215df16219fSGiuseppe CAVALLARO if (real_div) 1216df16219fSGiuseppe CAVALLARO host->mmc->actual_clock = (host->max_clk * clk_mul) / real_div; 1217df16219fSGiuseppe CAVALLARO 1218c3ed3877SArindam Nath clk |= (div & SDHCI_DIV_MASK) << SDHCI_DIVIDER_SHIFT; 121985105c53SZhangfei Gao clk |= ((div & SDHCI_DIV_HI_MASK) >> SDHCI_DIV_MASK_LEN) 122085105c53SZhangfei Gao << SDHCI_DIVIDER_HI_SHIFT; 12211c6a0718SPierre Ossman clk |= SDHCI_CLOCK_INT_EN; 12224e4141a5SAnton Vorontsov sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); 12231c6a0718SPierre Ossman 122427f6cb16SChris Ball /* Wait max 20 ms */ 122527f6cb16SChris Ball timeout = 20; 12264e4141a5SAnton Vorontsov while (!((clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL)) 12271c6a0718SPierre Ossman & SDHCI_CLOCK_INT_STABLE)) { 12281c6a0718SPierre Ossman if (timeout == 0) { 1229a3c76eb9SGirish K S pr_err("%s: Internal clock never " 12301c6a0718SPierre Ossman "stabilised.\n", mmc_hostname(host->mmc)); 12311c6a0718SPierre Ossman sdhci_dumpregs(host); 12321c6a0718SPierre Ossman return; 12331c6a0718SPierre Ossman } 12341c6a0718SPierre Ossman timeout--; 12351c6a0718SPierre Ossman mdelay(1); 12361c6a0718SPierre Ossman } 12371c6a0718SPierre Ossman 12381c6a0718SPierre Ossman clk |= SDHCI_CLOCK_CARD_EN; 12394e4141a5SAnton Vorontsov sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); 12401c6a0718SPierre Ossman 12411c6a0718SPierre Ossman out: 12421c6a0718SPierre Ossman host->clock = clock; 12431c6a0718SPierre Ossman } 12441c6a0718SPierre Ossman 12458213af3bSAndy Shevchenko static inline void sdhci_update_clock(struct sdhci_host *host) 12468213af3bSAndy Shevchenko { 12478213af3bSAndy Shevchenko unsigned int clock; 12488213af3bSAndy Shevchenko 12498213af3bSAndy Shevchenko clock = host->clock; 12508213af3bSAndy Shevchenko host->clock = 0; 12518213af3bSAndy Shevchenko sdhci_set_clock(host, clock); 12528213af3bSAndy Shevchenko } 12538213af3bSAndy Shevchenko 1254ceb6143bSAdrian Hunter static int sdhci_set_power(struct sdhci_host *host, unsigned short power) 12551c6a0718SPierre Ossman { 12568364248aSGiuseppe Cavallaro u8 pwr = 0; 12571c6a0718SPierre Ossman 12588364248aSGiuseppe Cavallaro if (power != (unsigned short)-1) { 1259ae628903SPierre Ossman switch (1 << power) { 1260ae628903SPierre Ossman case MMC_VDD_165_195: 1261ae628903SPierre Ossman pwr = SDHCI_POWER_180; 1262ae628903SPierre Ossman break; 1263ae628903SPierre Ossman case MMC_VDD_29_30: 1264ae628903SPierre Ossman case MMC_VDD_30_31: 1265ae628903SPierre Ossman pwr = SDHCI_POWER_300; 1266ae628903SPierre Ossman break; 1267ae628903SPierre Ossman case MMC_VDD_32_33: 1268ae628903SPierre Ossman case MMC_VDD_33_34: 1269ae628903SPierre Ossman pwr = SDHCI_POWER_330; 1270ae628903SPierre Ossman break; 1271ae628903SPierre Ossman default: 1272ae628903SPierre Ossman BUG(); 1273ae628903SPierre Ossman } 1274ae628903SPierre Ossman } 1275ae628903SPierre Ossman 1276ae628903SPierre Ossman if (host->pwr == pwr) 1277ceb6143bSAdrian Hunter return -1; 12781c6a0718SPierre Ossman 1279ae628903SPierre Ossman host->pwr = pwr; 1280ae628903SPierre Ossman 1281ae628903SPierre Ossman if (pwr == 0) { 12824e4141a5SAnton Vorontsov sdhci_writeb(host, 0, SDHCI_POWER_CONTROL); 1283f0710a55SAdrian Hunter if (host->quirks2 & SDHCI_QUIRK2_CARD_ON_NEEDS_BUS_ON) 1284f0710a55SAdrian Hunter sdhci_runtime_pm_bus_off(host); 1285ceb6143bSAdrian Hunter return 0; 12861c6a0718SPierre Ossman } 12871c6a0718SPierre Ossman 12881c6a0718SPierre Ossman /* 12891c6a0718SPierre Ossman * Spec says that we should clear the power reg before setting 12901c6a0718SPierre Ossman * a new value. Some controllers don't seem to like this though. 12911c6a0718SPierre Ossman */ 1292b8c86fc5SPierre Ossman if (!(host->quirks & SDHCI_QUIRK_SINGLE_POWER_WRITE)) 12934e4141a5SAnton Vorontsov sdhci_writeb(host, 0, SDHCI_POWER_CONTROL); 12941c6a0718SPierre Ossman 1295e08c1694SAndres Salomon /* 1296c71f6512SAndres Salomon * At least the Marvell CaFe chip gets confused if we set the voltage 1297e08c1694SAndres Salomon * and set turn on power at the same time, so set the voltage first. 1298e08c1694SAndres Salomon */ 129911a2f1b7SPierre Ossman if (host->quirks & SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER) 13004e4141a5SAnton Vorontsov sdhci_writeb(host, pwr, SDHCI_POWER_CONTROL); 13011c6a0718SPierre Ossman 1302ae628903SPierre Ossman pwr |= SDHCI_POWER_ON; 1303ae628903SPierre Ossman 1304ae628903SPierre Ossman sdhci_writeb(host, pwr, SDHCI_POWER_CONTROL); 1305557b0697SHarald Welte 1306f0710a55SAdrian Hunter if (host->quirks2 & SDHCI_QUIRK2_CARD_ON_NEEDS_BUS_ON) 1307f0710a55SAdrian Hunter sdhci_runtime_pm_bus_on(host); 1308f0710a55SAdrian Hunter 1309557b0697SHarald Welte /* 1310557b0697SHarald Welte * Some controllers need an extra 10ms delay of 10ms before they 1311557b0697SHarald Welte * can apply clock after applying power 1312557b0697SHarald Welte */ 131311a2f1b7SPierre Ossman if (host->quirks & SDHCI_QUIRK_DELAY_AFTER_POWER) 1314557b0697SHarald Welte mdelay(10); 1315ceb6143bSAdrian Hunter 1316ceb6143bSAdrian Hunter return power; 13171c6a0718SPierre Ossman } 13181c6a0718SPierre Ossman 13191c6a0718SPierre Ossman /*****************************************************************************\ 13201c6a0718SPierre Ossman * * 13211c6a0718SPierre Ossman * MMC callbacks * 13221c6a0718SPierre Ossman * * 13231c6a0718SPierre Ossman \*****************************************************************************/ 13241c6a0718SPierre Ossman 13251c6a0718SPierre Ossman static void sdhci_request(struct mmc_host *mmc, struct mmc_request *mrq) 13261c6a0718SPierre Ossman { 13271c6a0718SPierre Ossman struct sdhci_host *host; 1328505a8680SShawn Guo int present; 13291c6a0718SPierre Ossman unsigned long flags; 1330473b095aSAaron Lu u32 tuning_opcode; 13311c6a0718SPierre Ossman 13321c6a0718SPierre Ossman host = mmc_priv(mmc); 13331c6a0718SPierre Ossman 133466fd8ad5SAdrian Hunter sdhci_runtime_pm_get(host); 133566fd8ad5SAdrian Hunter 13361c6a0718SPierre Ossman spin_lock_irqsave(&host->lock, flags); 13371c6a0718SPierre Ossman 13381c6a0718SPierre Ossman WARN_ON(host->mrq != NULL); 13391c6a0718SPierre Ossman 1340f9134319SPierre Ossman #ifndef SDHCI_USE_LEDS_CLASS 13411c6a0718SPierre Ossman sdhci_activate_led(host); 13422f730fecSPierre Ossman #endif 1343e89d456fSAndrei Warkentin 1344e89d456fSAndrei Warkentin /* 1345e89d456fSAndrei Warkentin * Ensure we don't send the STOP for non-SET_BLOCK_COUNTED 1346e89d456fSAndrei Warkentin * requests if Auto-CMD12 is enabled. 1347e89d456fSAndrei Warkentin */ 1348e89d456fSAndrei Warkentin if (!mrq->sbc && (host->flags & SDHCI_AUTO_CMD12)) { 1349c4512f79SJerry Huang if (mrq->stop) { 1350c4512f79SJerry Huang mrq->data->stop = NULL; 1351c4512f79SJerry Huang mrq->stop = NULL; 1352c4512f79SJerry Huang } 1353c4512f79SJerry Huang } 13541c6a0718SPierre Ossman 13551c6a0718SPierre Ossman host->mrq = mrq; 13561c6a0718SPierre Ossman 1357505a8680SShawn Guo /* 1358505a8680SShawn Guo * Firstly check card presence from cd-gpio. The return could 1359505a8680SShawn Guo * be one of the following possibilities: 1360505a8680SShawn Guo * negative: cd-gpio is not available 1361505a8680SShawn Guo * zero: cd-gpio is used, and card is removed 1362505a8680SShawn Guo * one: cd-gpio is used, and card is present 1363505a8680SShawn Guo */ 1364505a8680SShawn Guo present = mmc_gpio_get_cd(host->mmc); 1365505a8680SShawn Guo if (present < 0) { 136668d1fb7eSAnton Vorontsov /* If polling, assume that the card is always present. */ 136768d1fb7eSAnton Vorontsov if (host->quirks & SDHCI_QUIRK_BROKEN_CARD_DETECTION) 1368505a8680SShawn Guo present = 1; 136968d1fb7eSAnton Vorontsov else 137068d1fb7eSAnton Vorontsov present = sdhci_readl(host, SDHCI_PRESENT_STATE) & 137168d1fb7eSAnton Vorontsov SDHCI_CARD_PRESENT; 1372bec9d4e5SGuennadi Liakhovetski } 1373bec9d4e5SGuennadi Liakhovetski 137468d1fb7eSAnton Vorontsov if (!present || host->flags & SDHCI_DEVICE_DEAD) { 137517b0429dSPierre Ossman host->mrq->cmd->error = -ENOMEDIUM; 13761c6a0718SPierre Ossman tasklet_schedule(&host->finish_tasklet); 1377cf2b5eeaSArindam Nath } else { 1378cf2b5eeaSArindam Nath u32 present_state; 1379cf2b5eeaSArindam Nath 1380cf2b5eeaSArindam Nath present_state = sdhci_readl(host, SDHCI_PRESENT_STATE); 1381cf2b5eeaSArindam Nath /* 1382cf2b5eeaSArindam Nath * Check if the re-tuning timer has already expired and there 1383cf2b5eeaSArindam Nath * is no on-going data transfer. If so, we need to execute 1384cf2b5eeaSArindam Nath * tuning procedure before sending command. 1385cf2b5eeaSArindam Nath */ 1386cf2b5eeaSArindam Nath if ((host->flags & SDHCI_NEEDS_RETUNING) && 1387cf2b5eeaSArindam Nath !(present_state & (SDHCI_DOING_WRITE | SDHCI_DOING_READ))) { 138814efd957SChris Ball if (mmc->card) { 138914efd957SChris Ball /* eMMC uses cmd21 but sd and sdio use cmd19 */ 139014efd957SChris Ball tuning_opcode = 139114efd957SChris Ball mmc->card->type == MMC_TYPE_MMC ? 1392473b095aSAaron Lu MMC_SEND_TUNING_BLOCK_HS200 : 1393473b095aSAaron Lu MMC_SEND_TUNING_BLOCK; 1394cf2b5eeaSArindam Nath spin_unlock_irqrestore(&host->lock, flags); 1395473b095aSAaron Lu sdhci_execute_tuning(mmc, tuning_opcode); 1396cf2b5eeaSArindam Nath spin_lock_irqsave(&host->lock, flags); 1397cf2b5eeaSArindam Nath 1398cf2b5eeaSArindam Nath /* Restore original mmc_request structure */ 1399cf2b5eeaSArindam Nath host->mrq = mrq; 1400cf2b5eeaSArindam Nath } 140114efd957SChris Ball } 1402cf2b5eeaSArindam Nath 14038edf6371SAndrei Warkentin if (mrq->sbc && !(host->flags & SDHCI_AUTO_CMD23)) 1404e89d456fSAndrei Warkentin sdhci_send_command(host, mrq->sbc); 1405e89d456fSAndrei Warkentin else 14061c6a0718SPierre Ossman sdhci_send_command(host, mrq->cmd); 1407cf2b5eeaSArindam Nath } 14081c6a0718SPierre Ossman 14091c6a0718SPierre Ossman mmiowb(); 14101c6a0718SPierre Ossman spin_unlock_irqrestore(&host->lock, flags); 14111c6a0718SPierre Ossman } 14121c6a0718SPierre Ossman 141366fd8ad5SAdrian Hunter static void sdhci_do_set_ios(struct sdhci_host *host, struct mmc_ios *ios) 14141c6a0718SPierre Ossman { 14151c6a0718SPierre Ossman unsigned long flags; 1416ceb6143bSAdrian Hunter int vdd_bit = -1; 14171c6a0718SPierre Ossman u8 ctrl; 14181c6a0718SPierre Ossman 14191c6a0718SPierre Ossman spin_lock_irqsave(&host->lock, flags); 14201c6a0718SPierre Ossman 1421ceb6143bSAdrian Hunter if (host->flags & SDHCI_DEVICE_DEAD) { 1422ceb6143bSAdrian Hunter spin_unlock_irqrestore(&host->lock, flags); 1423ceb6143bSAdrian Hunter if (host->vmmc && ios->power_mode == MMC_POWER_OFF) 1424ceb6143bSAdrian Hunter mmc_regulator_set_ocr(host->mmc, host->vmmc, 0); 1425ceb6143bSAdrian Hunter return; 1426ceb6143bSAdrian Hunter } 14271e72859eSPierre Ossman 14281c6a0718SPierre Ossman /* 14291c6a0718SPierre Ossman * Reset the chip on each power off. 14301c6a0718SPierre Ossman * Should clear out any weird states. 14311c6a0718SPierre Ossman */ 14321c6a0718SPierre Ossman if (ios->power_mode == MMC_POWER_OFF) { 14334e4141a5SAnton Vorontsov sdhci_writel(host, 0, SDHCI_SIGNAL_ENABLE); 14347260cf5eSAnton Vorontsov sdhci_reinit(host); 14351c6a0718SPierre Ossman } 14361c6a0718SPierre Ossman 143752983382SKevin Liu if (host->version >= SDHCI_SPEC_300 && 143852983382SKevin Liu (ios->power_mode == MMC_POWER_UP)) 143952983382SKevin Liu sdhci_enable_preset_value(host, false); 144052983382SKevin Liu 14411c6a0718SPierre Ossman sdhci_set_clock(host, ios->clock); 14421c6a0718SPierre Ossman 14431c6a0718SPierre Ossman if (ios->power_mode == MMC_POWER_OFF) 1444ceb6143bSAdrian Hunter vdd_bit = sdhci_set_power(host, -1); 14451c6a0718SPierre Ossman else 1446ceb6143bSAdrian Hunter vdd_bit = sdhci_set_power(host, ios->vdd); 1447ceb6143bSAdrian Hunter 1448ceb6143bSAdrian Hunter if (host->vmmc && vdd_bit != -1) { 1449ceb6143bSAdrian Hunter spin_unlock_irqrestore(&host->lock, flags); 1450ceb6143bSAdrian Hunter mmc_regulator_set_ocr(host->mmc, host->vmmc, vdd_bit); 1451ceb6143bSAdrian Hunter spin_lock_irqsave(&host->lock, flags); 1452ceb6143bSAdrian Hunter } 14531c6a0718SPierre Ossman 1454643a81ffSPhilip Rakity if (host->ops->platform_send_init_74_clocks) 1455643a81ffSPhilip Rakity host->ops->platform_send_init_74_clocks(host, ios->power_mode); 1456643a81ffSPhilip Rakity 145715ec4461SPhilip Rakity /* 145815ec4461SPhilip Rakity * If your platform has 8-bit width support but is not a v3 controller, 145915ec4461SPhilip Rakity * or if it requires special setup code, you should implement that in 14607bc088d3SSascha Hauer * platform_bus_width(). 146115ec4461SPhilip Rakity */ 14627bc088d3SSascha Hauer if (host->ops->platform_bus_width) { 14637bc088d3SSascha Hauer host->ops->platform_bus_width(host, ios->bus_width); 14647bc088d3SSascha Hauer } else { 14654e4141a5SAnton Vorontsov ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL); 146615ec4461SPhilip Rakity if (ios->bus_width == MMC_BUS_WIDTH_8) { 146715ec4461SPhilip Rakity ctrl &= ~SDHCI_CTRL_4BITBUS; 146815ec4461SPhilip Rakity if (host->version >= SDHCI_SPEC_300) 1469ae6d6c92SKyungmin Park ctrl |= SDHCI_CTRL_8BITBUS; 147015ec4461SPhilip Rakity } else { 147115ec4461SPhilip Rakity if (host->version >= SDHCI_SPEC_300) 1472ae6d6c92SKyungmin Park ctrl &= ~SDHCI_CTRL_8BITBUS; 14731c6a0718SPierre Ossman if (ios->bus_width == MMC_BUS_WIDTH_4) 14741c6a0718SPierre Ossman ctrl |= SDHCI_CTRL_4BITBUS; 14751c6a0718SPierre Ossman else 14761c6a0718SPierre Ossman ctrl &= ~SDHCI_CTRL_4BITBUS; 147715ec4461SPhilip Rakity } 147815ec4461SPhilip Rakity sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL); 147915ec4461SPhilip Rakity } 148015ec4461SPhilip Rakity 148115ec4461SPhilip Rakity ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL); 14821c6a0718SPierre Ossman 14833ab9c8daSPhilip Rakity if ((ios->timing == MMC_TIMING_SD_HS || 14843ab9c8daSPhilip Rakity ios->timing == MMC_TIMING_MMC_HS) 14853ab9c8daSPhilip Rakity && !(host->quirks & SDHCI_QUIRK_NO_HISPD_BIT)) 14861c6a0718SPierre Ossman ctrl |= SDHCI_CTRL_HISPD; 14871c6a0718SPierre Ossman else 14881c6a0718SPierre Ossman ctrl &= ~SDHCI_CTRL_HISPD; 14891c6a0718SPierre Ossman 1490d6d50a15SArindam Nath if (host->version >= SDHCI_SPEC_300) { 149149c468fcSArindam Nath u16 clk, ctrl_2; 149249c468fcSArindam Nath 149349c468fcSArindam Nath /* In case of UHS-I modes, set High Speed Enable */ 1494069c9f14SGirish K S if ((ios->timing == MMC_TIMING_MMC_HS200) || 1495069c9f14SGirish K S (ios->timing == MMC_TIMING_UHS_SDR50) || 149649c468fcSArindam Nath (ios->timing == MMC_TIMING_UHS_SDR104) || 149749c468fcSArindam Nath (ios->timing == MMC_TIMING_UHS_DDR50) || 1498dd8df17fSAlexander Elbs (ios->timing == MMC_TIMING_UHS_SDR25)) 149949c468fcSArindam Nath ctrl |= SDHCI_CTRL_HISPD; 1500d6d50a15SArindam Nath 1501d6d50a15SArindam Nath ctrl_2 = sdhci_readw(host, SDHCI_HOST_CONTROL2); 1502d6d50a15SArindam Nath if (!(ctrl_2 & SDHCI_CTRL_PRESET_VAL_ENABLE)) { 1503758535c4SArindam Nath sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL); 1504d6d50a15SArindam Nath /* 1505d6d50a15SArindam Nath * We only need to set Driver Strength if the 1506d6d50a15SArindam Nath * preset value enable is not set. 1507d6d50a15SArindam Nath */ 1508d6d50a15SArindam Nath ctrl_2 &= ~SDHCI_CTRL_DRV_TYPE_MASK; 1509d6d50a15SArindam Nath if (ios->drv_type == MMC_SET_DRIVER_TYPE_A) 1510d6d50a15SArindam Nath ctrl_2 |= SDHCI_CTRL_DRV_TYPE_A; 1511d6d50a15SArindam Nath else if (ios->drv_type == MMC_SET_DRIVER_TYPE_C) 1512d6d50a15SArindam Nath ctrl_2 |= SDHCI_CTRL_DRV_TYPE_C; 1513d6d50a15SArindam Nath 1514d6d50a15SArindam Nath sdhci_writew(host, ctrl_2, SDHCI_HOST_CONTROL2); 1515758535c4SArindam Nath } else { 1516758535c4SArindam Nath /* 1517758535c4SArindam Nath * According to SDHC Spec v3.00, if the Preset Value 1518758535c4SArindam Nath * Enable in the Host Control 2 register is set, we 1519758535c4SArindam Nath * need to reset SD Clock Enable before changing High 1520758535c4SArindam Nath * Speed Enable to avoid generating clock gliches. 1521758535c4SArindam Nath */ 1522758535c4SArindam Nath 1523758535c4SArindam Nath /* Reset SD Clock Enable */ 1524758535c4SArindam Nath clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL); 1525758535c4SArindam Nath clk &= ~SDHCI_CLOCK_CARD_EN; 1526758535c4SArindam Nath sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); 1527758535c4SArindam Nath 1528758535c4SArindam Nath sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL); 1529758535c4SArindam Nath 1530758535c4SArindam Nath /* Re-enable SD Clock */ 15318213af3bSAndy Shevchenko sdhci_update_clock(host); 1532d6d50a15SArindam Nath } 153349c468fcSArindam Nath 153449c468fcSArindam Nath 15356322cdd0SPhilip Rakity /* Reset SD Clock Enable */ 15366322cdd0SPhilip Rakity clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL); 15376322cdd0SPhilip Rakity clk &= ~SDHCI_CLOCK_CARD_EN; 15386322cdd0SPhilip Rakity sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); 15396322cdd0SPhilip Rakity 15406322cdd0SPhilip Rakity if (host->ops->set_uhs_signaling) 15416322cdd0SPhilip Rakity host->ops->set_uhs_signaling(host, ios->timing); 15426322cdd0SPhilip Rakity else { 15436322cdd0SPhilip Rakity ctrl_2 = sdhci_readw(host, SDHCI_HOST_CONTROL2); 154449c468fcSArindam Nath /* Select Bus Speed Mode for host */ 154549c468fcSArindam Nath ctrl_2 &= ~SDHCI_CTRL_UHS_MASK; 1546069c9f14SGirish K S if (ios->timing == MMC_TIMING_MMC_HS200) 1547069c9f14SGirish K S ctrl_2 |= SDHCI_CTRL_HS_SDR200; 1548069c9f14SGirish K S else if (ios->timing == MMC_TIMING_UHS_SDR12) 154949c468fcSArindam Nath ctrl_2 |= SDHCI_CTRL_UHS_SDR12; 155049c468fcSArindam Nath else if (ios->timing == MMC_TIMING_UHS_SDR25) 155149c468fcSArindam Nath ctrl_2 |= SDHCI_CTRL_UHS_SDR25; 155249c468fcSArindam Nath else if (ios->timing == MMC_TIMING_UHS_SDR50) 155349c468fcSArindam Nath ctrl_2 |= SDHCI_CTRL_UHS_SDR50; 155449c468fcSArindam Nath else if (ios->timing == MMC_TIMING_UHS_SDR104) 155549c468fcSArindam Nath ctrl_2 |= SDHCI_CTRL_UHS_SDR104; 155649c468fcSArindam Nath else if (ios->timing == MMC_TIMING_UHS_DDR50) 155749c468fcSArindam Nath ctrl_2 |= SDHCI_CTRL_UHS_DDR50; 155849c468fcSArindam Nath sdhci_writew(host, ctrl_2, SDHCI_HOST_CONTROL2); 15596322cdd0SPhilip Rakity } 156049c468fcSArindam Nath 156152983382SKevin Liu if (!(host->quirks2 & SDHCI_QUIRK2_PRESET_VALUE_BROKEN) && 156252983382SKevin Liu ((ios->timing == MMC_TIMING_UHS_SDR12) || 156352983382SKevin Liu (ios->timing == MMC_TIMING_UHS_SDR25) || 156452983382SKevin Liu (ios->timing == MMC_TIMING_UHS_SDR50) || 156552983382SKevin Liu (ios->timing == MMC_TIMING_UHS_SDR104) || 156652983382SKevin Liu (ios->timing == MMC_TIMING_UHS_DDR50))) { 156752983382SKevin Liu u16 preset; 156852983382SKevin Liu 156952983382SKevin Liu sdhci_enable_preset_value(host, true); 157052983382SKevin Liu preset = sdhci_get_preset_value(host); 157152983382SKevin Liu ios->drv_type = (preset & SDHCI_PRESET_DRV_MASK) 157252983382SKevin Liu >> SDHCI_PRESET_DRV_SHIFT; 157352983382SKevin Liu } 157452983382SKevin Liu 157549c468fcSArindam Nath /* Re-enable SD Clock */ 15768213af3bSAndy Shevchenko sdhci_update_clock(host); 1577758535c4SArindam Nath } else 1578758535c4SArindam Nath sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL); 1579d6d50a15SArindam Nath 1580b8352260SLeandro Dorileo /* 1581b8352260SLeandro Dorileo * Some (ENE) controllers go apeshit on some ios operation, 1582b8352260SLeandro Dorileo * signalling timeout and CRC errors even on CMD0. Resetting 1583b8352260SLeandro Dorileo * it on each ios seems to solve the problem. 1584b8352260SLeandro Dorileo */ 1585b8c86fc5SPierre Ossman if(host->quirks & SDHCI_QUIRK_RESET_CMD_DATA_ON_IOS) 1586b8352260SLeandro Dorileo sdhci_reset(host, SDHCI_RESET_CMD | SDHCI_RESET_DATA); 1587b8352260SLeandro Dorileo 15881c6a0718SPierre Ossman mmiowb(); 15891c6a0718SPierre Ossman spin_unlock_irqrestore(&host->lock, flags); 15901c6a0718SPierre Ossman } 15911c6a0718SPierre Ossman 159266fd8ad5SAdrian Hunter static void sdhci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) 159366fd8ad5SAdrian Hunter { 159466fd8ad5SAdrian Hunter struct sdhci_host *host = mmc_priv(mmc); 159566fd8ad5SAdrian Hunter 159666fd8ad5SAdrian Hunter sdhci_runtime_pm_get(host); 159766fd8ad5SAdrian Hunter sdhci_do_set_ios(host, ios); 159866fd8ad5SAdrian Hunter sdhci_runtime_pm_put(host); 159966fd8ad5SAdrian Hunter } 160066fd8ad5SAdrian Hunter 160194144a46SKevin Liu static int sdhci_do_get_cd(struct sdhci_host *host) 160294144a46SKevin Liu { 160394144a46SKevin Liu int gpio_cd = mmc_gpio_get_cd(host->mmc); 160494144a46SKevin Liu 160594144a46SKevin Liu if (host->flags & SDHCI_DEVICE_DEAD) 160694144a46SKevin Liu return 0; 160794144a46SKevin Liu 160894144a46SKevin Liu /* If polling/nonremovable, assume that the card is always present. */ 160994144a46SKevin Liu if ((host->quirks & SDHCI_QUIRK_BROKEN_CARD_DETECTION) || 161094144a46SKevin Liu (host->mmc->caps & MMC_CAP_NONREMOVABLE)) 161194144a46SKevin Liu return 1; 161294144a46SKevin Liu 161394144a46SKevin Liu /* Try slot gpio detect */ 161494144a46SKevin Liu if (!IS_ERR_VALUE(gpio_cd)) 161594144a46SKevin Liu return !!gpio_cd; 161694144a46SKevin Liu 161794144a46SKevin Liu /* Host native card detect */ 161894144a46SKevin Liu return !!(sdhci_readl(host, SDHCI_PRESENT_STATE) & SDHCI_CARD_PRESENT); 161994144a46SKevin Liu } 162094144a46SKevin Liu 162194144a46SKevin Liu static int sdhci_get_cd(struct mmc_host *mmc) 162294144a46SKevin Liu { 162394144a46SKevin Liu struct sdhci_host *host = mmc_priv(mmc); 162494144a46SKevin Liu int ret; 162594144a46SKevin Liu 162694144a46SKevin Liu sdhci_runtime_pm_get(host); 162794144a46SKevin Liu ret = sdhci_do_get_cd(host); 162894144a46SKevin Liu sdhci_runtime_pm_put(host); 162994144a46SKevin Liu return ret; 163094144a46SKevin Liu } 163194144a46SKevin Liu 163266fd8ad5SAdrian Hunter static int sdhci_check_ro(struct sdhci_host *host) 16331c6a0718SPierre Ossman { 16341c6a0718SPierre Ossman unsigned long flags; 16352dfb579cSWolfram Sang int is_readonly; 16361c6a0718SPierre Ossman 16371c6a0718SPierre Ossman spin_lock_irqsave(&host->lock, flags); 16381c6a0718SPierre Ossman 16391e72859eSPierre Ossman if (host->flags & SDHCI_DEVICE_DEAD) 16402dfb579cSWolfram Sang is_readonly = 0; 16412dfb579cSWolfram Sang else if (host->ops->get_ro) 16422dfb579cSWolfram Sang is_readonly = host->ops->get_ro(host); 16431e72859eSPierre Ossman else 16442dfb579cSWolfram Sang is_readonly = !(sdhci_readl(host, SDHCI_PRESENT_STATE) 16452dfb579cSWolfram Sang & SDHCI_WRITE_PROTECT); 16461c6a0718SPierre Ossman 16471c6a0718SPierre Ossman spin_unlock_irqrestore(&host->lock, flags); 16481c6a0718SPierre Ossman 16492dfb579cSWolfram Sang /* This quirk needs to be replaced by a callback-function later */ 16502dfb579cSWolfram Sang return host->quirks & SDHCI_QUIRK_INVERTED_WRITE_PROTECT ? 16512dfb579cSWolfram Sang !is_readonly : is_readonly; 16521c6a0718SPierre Ossman } 16531c6a0718SPierre Ossman 165482b0e23aSTakashi Iwai #define SAMPLE_COUNT 5 165582b0e23aSTakashi Iwai 165666fd8ad5SAdrian Hunter static int sdhci_do_get_ro(struct sdhci_host *host) 165782b0e23aSTakashi Iwai { 165882b0e23aSTakashi Iwai int i, ro_count; 165982b0e23aSTakashi Iwai 166082b0e23aSTakashi Iwai if (!(host->quirks & SDHCI_QUIRK_UNSTABLE_RO_DETECT)) 166166fd8ad5SAdrian Hunter return sdhci_check_ro(host); 166282b0e23aSTakashi Iwai 166382b0e23aSTakashi Iwai ro_count = 0; 166482b0e23aSTakashi Iwai for (i = 0; i < SAMPLE_COUNT; i++) { 166566fd8ad5SAdrian Hunter if (sdhci_check_ro(host)) { 166682b0e23aSTakashi Iwai if (++ro_count > SAMPLE_COUNT / 2) 166782b0e23aSTakashi Iwai return 1; 166882b0e23aSTakashi Iwai } 166982b0e23aSTakashi Iwai msleep(30); 167082b0e23aSTakashi Iwai } 167182b0e23aSTakashi Iwai return 0; 167282b0e23aSTakashi Iwai } 167382b0e23aSTakashi Iwai 167420758b66SAdrian Hunter static void sdhci_hw_reset(struct mmc_host *mmc) 167520758b66SAdrian Hunter { 167620758b66SAdrian Hunter struct sdhci_host *host = mmc_priv(mmc); 167720758b66SAdrian Hunter 167820758b66SAdrian Hunter if (host->ops && host->ops->hw_reset) 167920758b66SAdrian Hunter host->ops->hw_reset(host); 168020758b66SAdrian Hunter } 168120758b66SAdrian Hunter 168266fd8ad5SAdrian Hunter static int sdhci_get_ro(struct mmc_host *mmc) 1683f75979b7SPierre Ossman { 168466fd8ad5SAdrian Hunter struct sdhci_host *host = mmc_priv(mmc); 168566fd8ad5SAdrian Hunter int ret; 1686f75979b7SPierre Ossman 168766fd8ad5SAdrian Hunter sdhci_runtime_pm_get(host); 168866fd8ad5SAdrian Hunter ret = sdhci_do_get_ro(host); 168966fd8ad5SAdrian Hunter sdhci_runtime_pm_put(host); 169066fd8ad5SAdrian Hunter return ret; 169166fd8ad5SAdrian Hunter } 1692f75979b7SPierre Ossman 169366fd8ad5SAdrian Hunter static void sdhci_enable_sdio_irq_nolock(struct sdhci_host *host, int enable) 169466fd8ad5SAdrian Hunter { 16951e72859eSPierre Ossman if (host->flags & SDHCI_DEVICE_DEAD) 16961e72859eSPierre Ossman goto out; 16971e72859eSPierre Ossman 1698f75979b7SPierre Ossman if (enable) 169966fd8ad5SAdrian Hunter host->flags |= SDHCI_SDIO_IRQ_ENABLED; 170066fd8ad5SAdrian Hunter else 170166fd8ad5SAdrian Hunter host->flags &= ~SDHCI_SDIO_IRQ_ENABLED; 170266fd8ad5SAdrian Hunter 170366fd8ad5SAdrian Hunter /* SDIO IRQ will be enabled as appropriate in runtime resume */ 170466fd8ad5SAdrian Hunter if (host->runtime_suspended) 170566fd8ad5SAdrian Hunter goto out; 170666fd8ad5SAdrian Hunter 170766fd8ad5SAdrian Hunter if (enable) 17087260cf5eSAnton Vorontsov sdhci_unmask_irqs(host, SDHCI_INT_CARD_INT); 17097260cf5eSAnton Vorontsov else 17107260cf5eSAnton Vorontsov sdhci_mask_irqs(host, SDHCI_INT_CARD_INT); 17111e72859eSPierre Ossman out: 1712f75979b7SPierre Ossman mmiowb(); 171366fd8ad5SAdrian Hunter } 1714f75979b7SPierre Ossman 171566fd8ad5SAdrian Hunter static void sdhci_enable_sdio_irq(struct mmc_host *mmc, int enable) 171666fd8ad5SAdrian Hunter { 171766fd8ad5SAdrian Hunter struct sdhci_host *host = mmc_priv(mmc); 171866fd8ad5SAdrian Hunter unsigned long flags; 171966fd8ad5SAdrian Hunter 172066fd8ad5SAdrian Hunter spin_lock_irqsave(&host->lock, flags); 172166fd8ad5SAdrian Hunter sdhci_enable_sdio_irq_nolock(host, enable); 1722f75979b7SPierre Ossman spin_unlock_irqrestore(&host->lock, flags); 1723f75979b7SPierre Ossman } 1724f75979b7SPierre Ossman 172520b92a30SKevin Liu static int sdhci_do_start_signal_voltage_switch(struct sdhci_host *host, 172621f5998fSFabio Estevam struct mmc_ios *ios) 1727f2119df6SArindam Nath { 172820b92a30SKevin Liu u16 ctrl; 17296231f3deSPhilip Rakity int ret; 1730f2119df6SArindam Nath 173120b92a30SKevin Liu /* 173220b92a30SKevin Liu * Signal Voltage Switching is only applicable for Host Controllers 173320b92a30SKevin Liu * v3.00 and above. 173420b92a30SKevin Liu */ 173520b92a30SKevin Liu if (host->version < SDHCI_SPEC_300) 173620b92a30SKevin Liu return 0; 173720b92a30SKevin Liu 173820b92a30SKevin Liu ctrl = sdhci_readw(host, SDHCI_HOST_CONTROL2); 173920b92a30SKevin Liu 174021f5998fSFabio Estevam switch (ios->signal_voltage) { 174120b92a30SKevin Liu case MMC_SIGNAL_VOLTAGE_330: 1742f2119df6SArindam Nath /* Set 1.8V Signal Enable in the Host Control2 register to 0 */ 1743f2119df6SArindam Nath ctrl &= ~SDHCI_CTRL_VDD_180; 1744f2119df6SArindam Nath sdhci_writew(host, ctrl, SDHCI_HOST_CONTROL2); 1745f2119df6SArindam Nath 17466231f3deSPhilip Rakity if (host->vqmmc) { 1747cec2e216SKevin Liu ret = regulator_set_voltage(host->vqmmc, 2700000, 3600000); 17486231f3deSPhilip Rakity if (ret) { 17496231f3deSPhilip Rakity pr_warning("%s: Switching to 3.3V signalling voltage " 17506231f3deSPhilip Rakity " failed\n", mmc_hostname(host->mmc)); 17516231f3deSPhilip Rakity return -EIO; 17526231f3deSPhilip Rakity } 17536231f3deSPhilip Rakity } 1754f2119df6SArindam Nath /* Wait for 5ms */ 1755f2119df6SArindam Nath usleep_range(5000, 5500); 1756f2119df6SArindam Nath 1757f2119df6SArindam Nath /* 3.3V regulator output should be stable within 5 ms */ 1758f2119df6SArindam Nath ctrl = sdhci_readw(host, SDHCI_HOST_CONTROL2); 1759f2119df6SArindam Nath if (!(ctrl & SDHCI_CTRL_VDD_180)) 1760f2119df6SArindam Nath return 0; 17616231f3deSPhilip Rakity 17626231f3deSPhilip Rakity pr_warning("%s: 3.3V regulator output did not became stable\n", 17636231f3deSPhilip Rakity mmc_hostname(host->mmc)); 17646231f3deSPhilip Rakity 176520b92a30SKevin Liu return -EAGAIN; 176620b92a30SKevin Liu case MMC_SIGNAL_VOLTAGE_180: 176720b92a30SKevin Liu if (host->vqmmc) { 176820b92a30SKevin Liu ret = regulator_set_voltage(host->vqmmc, 176920b92a30SKevin Liu 1700000, 1950000); 177020b92a30SKevin Liu if (ret) { 177120b92a30SKevin Liu pr_warning("%s: Switching to 1.8V signalling voltage " 177220b92a30SKevin Liu " failed\n", mmc_hostname(host->mmc)); 1773f2119df6SArindam Nath return -EIO; 1774f2119df6SArindam Nath } 177520b92a30SKevin Liu } 17766231f3deSPhilip Rakity 1777f2119df6SArindam Nath /* 1778f2119df6SArindam Nath * Enable 1.8V Signal Enable in the Host Control2 1779f2119df6SArindam Nath * register 1780f2119df6SArindam Nath */ 1781f2119df6SArindam Nath ctrl |= SDHCI_CTRL_VDD_180; 1782f2119df6SArindam Nath sdhci_writew(host, ctrl, SDHCI_HOST_CONTROL2); 1783f2119df6SArindam Nath 1784f2119df6SArindam Nath /* Wait for 5ms */ 1785f2119df6SArindam Nath usleep_range(5000, 5500); 1786f2119df6SArindam Nath 178720b92a30SKevin Liu /* 1.8V regulator output should be stable within 5 ms */ 1788f2119df6SArindam Nath ctrl = sdhci_readw(host, SDHCI_HOST_CONTROL2); 178920b92a30SKevin Liu if (ctrl & SDHCI_CTRL_VDD_180) 1790f2119df6SArindam Nath return 0; 1791f2119df6SArindam Nath 179220b92a30SKevin Liu pr_warning("%s: 1.8V regulator output did not became stable\n", 179320b92a30SKevin Liu mmc_hostname(host->mmc)); 17946231f3deSPhilip Rakity 1795f2119df6SArindam Nath return -EAGAIN; 179620b92a30SKevin Liu case MMC_SIGNAL_VOLTAGE_120: 179720b92a30SKevin Liu if (host->vqmmc) { 179820b92a30SKevin Liu ret = regulator_set_voltage(host->vqmmc, 1100000, 1300000); 179920b92a30SKevin Liu if (ret) { 180020b92a30SKevin Liu pr_warning("%s: Switching to 1.2V signalling voltage " 180120b92a30SKevin Liu " failed\n", mmc_hostname(host->mmc)); 180220b92a30SKevin Liu return -EIO; 18036231f3deSPhilip Rakity } 180420b92a30SKevin Liu } 18056231f3deSPhilip Rakity return 0; 180620b92a30SKevin Liu default: 1807f2119df6SArindam Nath /* No signal voltage switch required */ 1808f2119df6SArindam Nath return 0; 1809f2119df6SArindam Nath } 181020b92a30SKevin Liu } 1811f2119df6SArindam Nath 181266fd8ad5SAdrian Hunter static int sdhci_start_signal_voltage_switch(struct mmc_host *mmc, 181321f5998fSFabio Estevam struct mmc_ios *ios) 181466fd8ad5SAdrian Hunter { 181566fd8ad5SAdrian Hunter struct sdhci_host *host = mmc_priv(mmc); 181666fd8ad5SAdrian Hunter int err; 181766fd8ad5SAdrian Hunter 181866fd8ad5SAdrian Hunter if (host->version < SDHCI_SPEC_300) 181966fd8ad5SAdrian Hunter return 0; 182066fd8ad5SAdrian Hunter sdhci_runtime_pm_get(host); 182121f5998fSFabio Estevam err = sdhci_do_start_signal_voltage_switch(host, ios); 182266fd8ad5SAdrian Hunter sdhci_runtime_pm_put(host); 182366fd8ad5SAdrian Hunter return err; 182466fd8ad5SAdrian Hunter } 182566fd8ad5SAdrian Hunter 182620b92a30SKevin Liu static int sdhci_card_busy(struct mmc_host *mmc) 182720b92a30SKevin Liu { 182820b92a30SKevin Liu struct sdhci_host *host = mmc_priv(mmc); 182920b92a30SKevin Liu u32 present_state; 183020b92a30SKevin Liu 183120b92a30SKevin Liu sdhci_runtime_pm_get(host); 183220b92a30SKevin Liu /* Check whether DAT[3:0] is 0000 */ 183320b92a30SKevin Liu present_state = sdhci_readl(host, SDHCI_PRESENT_STATE); 183420b92a30SKevin Liu sdhci_runtime_pm_put(host); 183520b92a30SKevin Liu 183620b92a30SKevin Liu return !(present_state & SDHCI_DATA_LVL_MASK); 183720b92a30SKevin Liu } 183820b92a30SKevin Liu 1839069c9f14SGirish K S static int sdhci_execute_tuning(struct mmc_host *mmc, u32 opcode) 1840b513ea25SArindam Nath { 1841b513ea25SArindam Nath struct sdhci_host *host; 1842b513ea25SArindam Nath u16 ctrl; 1843b513ea25SArindam Nath u32 ier; 1844b513ea25SArindam Nath int tuning_loop_counter = MAX_TUNING_LOOP; 1845b513ea25SArindam Nath unsigned long timeout; 1846b513ea25SArindam Nath int err = 0; 1847069c9f14SGirish K S bool requires_tuning_nonuhs = false; 1848b513ea25SArindam Nath 1849b513ea25SArindam Nath host = mmc_priv(mmc); 1850b513ea25SArindam Nath 185166fd8ad5SAdrian Hunter sdhci_runtime_pm_get(host); 1852b513ea25SArindam Nath disable_irq(host->irq); 1853b513ea25SArindam Nath spin_lock(&host->lock); 1854b513ea25SArindam Nath 1855b513ea25SArindam Nath ctrl = sdhci_readw(host, SDHCI_HOST_CONTROL2); 1856b513ea25SArindam Nath 1857b513ea25SArindam Nath /* 1858069c9f14SGirish K S * The Host Controller needs tuning only in case of SDR104 mode 1859069c9f14SGirish K S * and for SDR50 mode when Use Tuning for SDR50 is set in the 1860b513ea25SArindam Nath * Capabilities register. 1861069c9f14SGirish K S * If the Host Controller supports the HS200 mode then the 1862069c9f14SGirish K S * tuning function has to be executed. 1863b513ea25SArindam Nath */ 1864069c9f14SGirish K S if (((ctrl & SDHCI_CTRL_UHS_MASK) == SDHCI_CTRL_UHS_SDR50) && 1865069c9f14SGirish K S (host->flags & SDHCI_SDR50_NEEDS_TUNING || 1866156e14b1SGiuseppe CAVALLARO host->flags & SDHCI_SDR104_NEEDS_TUNING)) 1867069c9f14SGirish K S requires_tuning_nonuhs = true; 1868069c9f14SGirish K S 1869b513ea25SArindam Nath if (((ctrl & SDHCI_CTRL_UHS_MASK) == SDHCI_CTRL_UHS_SDR104) || 1870069c9f14SGirish K S requires_tuning_nonuhs) 1871b513ea25SArindam Nath ctrl |= SDHCI_CTRL_EXEC_TUNING; 1872b513ea25SArindam Nath else { 1873b513ea25SArindam Nath spin_unlock(&host->lock); 1874b513ea25SArindam Nath enable_irq(host->irq); 187566fd8ad5SAdrian Hunter sdhci_runtime_pm_put(host); 1876b513ea25SArindam Nath return 0; 1877b513ea25SArindam Nath } 1878b513ea25SArindam Nath 1879b513ea25SArindam Nath sdhci_writew(host, ctrl, SDHCI_HOST_CONTROL2); 1880b513ea25SArindam Nath 1881b513ea25SArindam Nath /* 1882b513ea25SArindam Nath * As per the Host Controller spec v3.00, tuning command 1883b513ea25SArindam Nath * generates Buffer Read Ready interrupt, so enable that. 1884b513ea25SArindam Nath * 1885b513ea25SArindam Nath * Note: The spec clearly says that when tuning sequence 1886b513ea25SArindam Nath * is being performed, the controller does not generate 1887b513ea25SArindam Nath * interrupts other than Buffer Read Ready interrupt. But 1888b513ea25SArindam Nath * to make sure we don't hit a controller bug, we _only_ 1889b513ea25SArindam Nath * enable Buffer Read Ready interrupt here. 1890b513ea25SArindam Nath */ 1891b513ea25SArindam Nath ier = sdhci_readl(host, SDHCI_INT_ENABLE); 1892b513ea25SArindam Nath sdhci_clear_set_irqs(host, ier, SDHCI_INT_DATA_AVAIL); 1893b513ea25SArindam Nath 1894b513ea25SArindam Nath /* 1895b513ea25SArindam Nath * Issue CMD19 repeatedly till Execute Tuning is set to 0 or the number 1896b513ea25SArindam Nath * of loops reaches 40 times or a timeout of 150ms occurs. 1897b513ea25SArindam Nath */ 1898b513ea25SArindam Nath timeout = 150; 1899b513ea25SArindam Nath do { 1900b513ea25SArindam Nath struct mmc_command cmd = {0}; 190166fd8ad5SAdrian Hunter struct mmc_request mrq = {NULL}; 1902b513ea25SArindam Nath 1903b513ea25SArindam Nath if (!tuning_loop_counter && !timeout) 1904b513ea25SArindam Nath break; 1905b513ea25SArindam Nath 1906069c9f14SGirish K S cmd.opcode = opcode; 1907b513ea25SArindam Nath cmd.arg = 0; 1908b513ea25SArindam Nath cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC; 1909b513ea25SArindam Nath cmd.retries = 0; 1910b513ea25SArindam Nath cmd.data = NULL; 1911b513ea25SArindam Nath cmd.error = 0; 1912b513ea25SArindam Nath 1913b513ea25SArindam Nath mrq.cmd = &cmd; 1914b513ea25SArindam Nath host->mrq = &mrq; 1915b513ea25SArindam Nath 1916b513ea25SArindam Nath /* 1917b513ea25SArindam Nath * In response to CMD19, the card sends 64 bytes of tuning 1918b513ea25SArindam Nath * block to the Host Controller. So we set the block size 1919b513ea25SArindam Nath * to 64 here. 1920b513ea25SArindam Nath */ 1921069c9f14SGirish K S if (cmd.opcode == MMC_SEND_TUNING_BLOCK_HS200) { 1922069c9f14SGirish K S if (mmc->ios.bus_width == MMC_BUS_WIDTH_8) 1923069c9f14SGirish K S sdhci_writew(host, SDHCI_MAKE_BLKSZ(7, 128), 1924069c9f14SGirish K S SDHCI_BLOCK_SIZE); 1925069c9f14SGirish K S else if (mmc->ios.bus_width == MMC_BUS_WIDTH_4) 1926069c9f14SGirish K S sdhci_writew(host, SDHCI_MAKE_BLKSZ(7, 64), 1927069c9f14SGirish K S SDHCI_BLOCK_SIZE); 1928069c9f14SGirish K S } else { 1929069c9f14SGirish K S sdhci_writew(host, SDHCI_MAKE_BLKSZ(7, 64), 1930069c9f14SGirish K S SDHCI_BLOCK_SIZE); 1931069c9f14SGirish K S } 1932b513ea25SArindam Nath 1933b513ea25SArindam Nath /* 1934b513ea25SArindam Nath * The tuning block is sent by the card to the host controller. 1935b513ea25SArindam Nath * So we set the TRNS_READ bit in the Transfer Mode register. 1936b513ea25SArindam Nath * This also takes care of setting DMA Enable and Multi Block 1937b513ea25SArindam Nath * Select in the same register to 0. 1938b513ea25SArindam Nath */ 1939b513ea25SArindam Nath sdhci_writew(host, SDHCI_TRNS_READ, SDHCI_TRANSFER_MODE); 1940b513ea25SArindam Nath 1941b513ea25SArindam Nath sdhci_send_command(host, &cmd); 1942b513ea25SArindam Nath 1943b513ea25SArindam Nath host->cmd = NULL; 1944b513ea25SArindam Nath host->mrq = NULL; 1945b513ea25SArindam Nath 1946b513ea25SArindam Nath spin_unlock(&host->lock); 1947b513ea25SArindam Nath enable_irq(host->irq); 1948b513ea25SArindam Nath 1949b513ea25SArindam Nath /* Wait for Buffer Read Ready interrupt */ 1950b513ea25SArindam Nath wait_event_interruptible_timeout(host->buf_ready_int, 1951b513ea25SArindam Nath (host->tuning_done == 1), 1952b513ea25SArindam Nath msecs_to_jiffies(50)); 1953b513ea25SArindam Nath disable_irq(host->irq); 1954b513ea25SArindam Nath spin_lock(&host->lock); 1955b513ea25SArindam Nath 1956b513ea25SArindam Nath if (!host->tuning_done) { 1957a3c76eb9SGirish K S pr_info(DRIVER_NAME ": Timeout waiting for " 1958b513ea25SArindam Nath "Buffer Read Ready interrupt during tuning " 1959b513ea25SArindam Nath "procedure, falling back to fixed sampling " 1960b513ea25SArindam Nath "clock\n"); 1961b513ea25SArindam Nath ctrl = sdhci_readw(host, SDHCI_HOST_CONTROL2); 1962b513ea25SArindam Nath ctrl &= ~SDHCI_CTRL_TUNED_CLK; 1963b513ea25SArindam Nath ctrl &= ~SDHCI_CTRL_EXEC_TUNING; 1964b513ea25SArindam Nath sdhci_writew(host, ctrl, SDHCI_HOST_CONTROL2); 1965b513ea25SArindam Nath 1966b513ea25SArindam Nath err = -EIO; 1967b513ea25SArindam Nath goto out; 1968b513ea25SArindam Nath } 1969b513ea25SArindam Nath 1970b513ea25SArindam Nath host->tuning_done = 0; 1971b513ea25SArindam Nath 1972b513ea25SArindam Nath ctrl = sdhci_readw(host, SDHCI_HOST_CONTROL2); 1973b513ea25SArindam Nath tuning_loop_counter--; 1974b513ea25SArindam Nath timeout--; 1975b513ea25SArindam Nath mdelay(1); 1976b513ea25SArindam Nath } while (ctrl & SDHCI_CTRL_EXEC_TUNING); 1977b513ea25SArindam Nath 1978b513ea25SArindam Nath /* 1979b513ea25SArindam Nath * The Host Driver has exhausted the maximum number of loops allowed, 1980b513ea25SArindam Nath * so use fixed sampling frequency. 1981b513ea25SArindam Nath */ 1982b513ea25SArindam Nath if (!tuning_loop_counter || !timeout) { 1983b513ea25SArindam Nath ctrl &= ~SDHCI_CTRL_TUNED_CLK; 1984b513ea25SArindam Nath sdhci_writew(host, ctrl, SDHCI_HOST_CONTROL2); 1985b513ea25SArindam Nath } else { 1986b513ea25SArindam Nath if (!(ctrl & SDHCI_CTRL_TUNED_CLK)) { 1987a3c76eb9SGirish K S pr_info(DRIVER_NAME ": Tuning procedure" 1988b513ea25SArindam Nath " failed, falling back to fixed sampling" 1989b513ea25SArindam Nath " clock\n"); 1990b513ea25SArindam Nath err = -EIO; 1991b513ea25SArindam Nath } 1992b513ea25SArindam Nath } 1993b513ea25SArindam Nath 1994b513ea25SArindam Nath out: 1995cf2b5eeaSArindam Nath /* 1996cf2b5eeaSArindam Nath * If this is the very first time we are here, we start the retuning 1997cf2b5eeaSArindam Nath * timer. Since only during the first time, SDHCI_NEEDS_RETUNING 1998cf2b5eeaSArindam Nath * flag won't be set, we check this condition before actually starting 1999cf2b5eeaSArindam Nath * the timer. 2000cf2b5eeaSArindam Nath */ 2001cf2b5eeaSArindam Nath if (!(host->flags & SDHCI_NEEDS_RETUNING) && host->tuning_count && 2002cf2b5eeaSArindam Nath (host->tuning_mode == SDHCI_TUNING_MODE_1)) { 2003973905feSAaron Lu host->flags |= SDHCI_USING_RETUNING_TIMER; 2004cf2b5eeaSArindam Nath mod_timer(&host->tuning_timer, jiffies + 2005cf2b5eeaSArindam Nath host->tuning_count * HZ); 2006cf2b5eeaSArindam Nath /* Tuning mode 1 limits the maximum data length to 4MB */ 2007cf2b5eeaSArindam Nath mmc->max_blk_count = (4 * 1024 * 1024) / mmc->max_blk_size; 2008cf2b5eeaSArindam Nath } else { 2009cf2b5eeaSArindam Nath host->flags &= ~SDHCI_NEEDS_RETUNING; 2010cf2b5eeaSArindam Nath /* Reload the new initial value for timer */ 2011cf2b5eeaSArindam Nath if (host->tuning_mode == SDHCI_TUNING_MODE_1) 2012cf2b5eeaSArindam Nath mod_timer(&host->tuning_timer, jiffies + 2013cf2b5eeaSArindam Nath host->tuning_count * HZ); 2014cf2b5eeaSArindam Nath } 2015cf2b5eeaSArindam Nath 2016cf2b5eeaSArindam Nath /* 2017cf2b5eeaSArindam Nath * In case tuning fails, host controllers which support re-tuning can 2018cf2b5eeaSArindam Nath * try tuning again at a later time, when the re-tuning timer expires. 2019cf2b5eeaSArindam Nath * So for these controllers, we return 0. Since there might be other 2020cf2b5eeaSArindam Nath * controllers who do not have this capability, we return error for 2021973905feSAaron Lu * them. SDHCI_USING_RETUNING_TIMER means the host is currently using 2022973905feSAaron Lu * a retuning timer to do the retuning for the card. 2023cf2b5eeaSArindam Nath */ 2024973905feSAaron Lu if (err && (host->flags & SDHCI_USING_RETUNING_TIMER)) 2025cf2b5eeaSArindam Nath err = 0; 2026cf2b5eeaSArindam Nath 2027b513ea25SArindam Nath sdhci_clear_set_irqs(host, SDHCI_INT_DATA_AVAIL, ier); 2028b513ea25SArindam Nath spin_unlock(&host->lock); 2029b513ea25SArindam Nath enable_irq(host->irq); 203066fd8ad5SAdrian Hunter sdhci_runtime_pm_put(host); 2031b513ea25SArindam Nath 2032b513ea25SArindam Nath return err; 2033b513ea25SArindam Nath } 2034b513ea25SArindam Nath 203552983382SKevin Liu 203652983382SKevin Liu static void sdhci_enable_preset_value(struct sdhci_host *host, bool enable) 20374d55c5a1SArindam Nath { 20384d55c5a1SArindam Nath u16 ctrl; 20394d55c5a1SArindam Nath 20404d55c5a1SArindam Nath /* Host Controller v3.00 defines preset value registers */ 20414d55c5a1SArindam Nath if (host->version < SDHCI_SPEC_300) 20424d55c5a1SArindam Nath return; 20434d55c5a1SArindam Nath 20444d55c5a1SArindam Nath ctrl = sdhci_readw(host, SDHCI_HOST_CONTROL2); 20454d55c5a1SArindam Nath 20464d55c5a1SArindam Nath /* 20474d55c5a1SArindam Nath * We only enable or disable Preset Value if they are not already 20484d55c5a1SArindam Nath * enabled or disabled respectively. Otherwise, we bail out. 20494d55c5a1SArindam Nath */ 20504d55c5a1SArindam Nath if (enable && !(ctrl & SDHCI_CTRL_PRESET_VAL_ENABLE)) { 20514d55c5a1SArindam Nath ctrl |= SDHCI_CTRL_PRESET_VAL_ENABLE; 20524d55c5a1SArindam Nath sdhci_writew(host, ctrl, SDHCI_HOST_CONTROL2); 205366fd8ad5SAdrian Hunter host->flags |= SDHCI_PV_ENABLED; 20544d55c5a1SArindam Nath } else if (!enable && (ctrl & SDHCI_CTRL_PRESET_VAL_ENABLE)) { 20554d55c5a1SArindam Nath ctrl &= ~SDHCI_CTRL_PRESET_VAL_ENABLE; 20564d55c5a1SArindam Nath sdhci_writew(host, ctrl, SDHCI_HOST_CONTROL2); 205766fd8ad5SAdrian Hunter host->flags &= ~SDHCI_PV_ENABLED; 20584d55c5a1SArindam Nath } 205966fd8ad5SAdrian Hunter } 206066fd8ad5SAdrian Hunter 206171e69211SGuennadi Liakhovetski static void sdhci_card_event(struct mmc_host *mmc) 20621c6a0718SPierre Ossman { 206371e69211SGuennadi Liakhovetski struct sdhci_host *host = mmc_priv(mmc); 20641c6a0718SPierre Ossman unsigned long flags; 20651c6a0718SPierre Ossman 20661c6a0718SPierre Ossman spin_lock_irqsave(&host->lock, flags); 20671c6a0718SPierre Ossman 206866fd8ad5SAdrian Hunter /* Check host->mrq first in case we are runtime suspended */ 20699668d765SShawn Guo if (host->mrq && !sdhci_do_get_cd(host)) { 2070a3c76eb9SGirish K S pr_err("%s: Card removed during transfer!\n", 20711c6a0718SPierre Ossman mmc_hostname(host->mmc)); 2072a3c76eb9SGirish K S pr_err("%s: Resetting controller.\n", 20731c6a0718SPierre Ossman mmc_hostname(host->mmc)); 20741c6a0718SPierre Ossman 20751c6a0718SPierre Ossman sdhci_reset(host, SDHCI_RESET_CMD); 20761c6a0718SPierre Ossman sdhci_reset(host, SDHCI_RESET_DATA); 20771c6a0718SPierre Ossman 207817b0429dSPierre Ossman host->mrq->cmd->error = -ENOMEDIUM; 20791c6a0718SPierre Ossman tasklet_schedule(&host->finish_tasklet); 20801c6a0718SPierre Ossman } 20811c6a0718SPierre Ossman 20821c6a0718SPierre Ossman spin_unlock_irqrestore(&host->lock, flags); 208371e69211SGuennadi Liakhovetski } 208471e69211SGuennadi Liakhovetski 208571e69211SGuennadi Liakhovetski static const struct mmc_host_ops sdhci_ops = { 208671e69211SGuennadi Liakhovetski .request = sdhci_request, 208771e69211SGuennadi Liakhovetski .set_ios = sdhci_set_ios, 208894144a46SKevin Liu .get_cd = sdhci_get_cd, 208971e69211SGuennadi Liakhovetski .get_ro = sdhci_get_ro, 209071e69211SGuennadi Liakhovetski .hw_reset = sdhci_hw_reset, 209171e69211SGuennadi Liakhovetski .enable_sdio_irq = sdhci_enable_sdio_irq, 209271e69211SGuennadi Liakhovetski .start_signal_voltage_switch = sdhci_start_signal_voltage_switch, 209371e69211SGuennadi Liakhovetski .execute_tuning = sdhci_execute_tuning, 209471e69211SGuennadi Liakhovetski .card_event = sdhci_card_event, 209520b92a30SKevin Liu .card_busy = sdhci_card_busy, 209671e69211SGuennadi Liakhovetski }; 209771e69211SGuennadi Liakhovetski 209871e69211SGuennadi Liakhovetski /*****************************************************************************\ 209971e69211SGuennadi Liakhovetski * * 210071e69211SGuennadi Liakhovetski * Tasklets * 210171e69211SGuennadi Liakhovetski * * 210271e69211SGuennadi Liakhovetski \*****************************************************************************/ 210371e69211SGuennadi Liakhovetski 210471e69211SGuennadi Liakhovetski static void sdhci_tasklet_card(unsigned long param) 210571e69211SGuennadi Liakhovetski { 210671e69211SGuennadi Liakhovetski struct sdhci_host *host = (struct sdhci_host*)param; 210771e69211SGuennadi Liakhovetski 210871e69211SGuennadi Liakhovetski sdhci_card_event(host->mmc); 21091c6a0718SPierre Ossman 211004cf585dSPierre Ossman mmc_detect_change(host->mmc, msecs_to_jiffies(200)); 21111c6a0718SPierre Ossman } 21121c6a0718SPierre Ossman 21131c6a0718SPierre Ossman static void sdhci_tasklet_finish(unsigned long param) 21141c6a0718SPierre Ossman { 21151c6a0718SPierre Ossman struct sdhci_host *host; 21161c6a0718SPierre Ossman unsigned long flags; 21171c6a0718SPierre Ossman struct mmc_request *mrq; 21181c6a0718SPierre Ossman 21191c6a0718SPierre Ossman host = (struct sdhci_host*)param; 21201c6a0718SPierre Ossman 212166fd8ad5SAdrian Hunter spin_lock_irqsave(&host->lock, flags); 212266fd8ad5SAdrian Hunter 21230c9c99a7SChris Ball /* 21240c9c99a7SChris Ball * If this tasklet gets rescheduled while running, it will 21250c9c99a7SChris Ball * be run again afterwards but without any active request. 21260c9c99a7SChris Ball */ 212766fd8ad5SAdrian Hunter if (!host->mrq) { 212866fd8ad5SAdrian Hunter spin_unlock_irqrestore(&host->lock, flags); 21290c9c99a7SChris Ball return; 213066fd8ad5SAdrian Hunter } 21311c6a0718SPierre Ossman 21321c6a0718SPierre Ossman del_timer(&host->timer); 21331c6a0718SPierre Ossman 21341c6a0718SPierre Ossman mrq = host->mrq; 21351c6a0718SPierre Ossman 21361c6a0718SPierre Ossman /* 21371c6a0718SPierre Ossman * The controller needs a reset of internal state machines 21381c6a0718SPierre Ossman * upon error conditions. 21391c6a0718SPierre Ossman */ 21401e72859eSPierre Ossman if (!(host->flags & SDHCI_DEVICE_DEAD) && 2141b7b4d342SBen Dooks ((mrq->cmd && mrq->cmd->error) || 214217b0429dSPierre Ossman (mrq->data && (mrq->data->error || 214384c46a53SPierre Ossman (mrq->data->stop && mrq->data->stop->error))) || 21441e72859eSPierre Ossman (host->quirks & SDHCI_QUIRK_RESET_AFTER_REQUEST))) { 21451c6a0718SPierre Ossman 21461c6a0718SPierre Ossman /* Some controllers need this kick or reset won't work here */ 21478213af3bSAndy Shevchenko if (host->quirks & SDHCI_QUIRK_CLOCK_BEFORE_RESET) 21481c6a0718SPierre Ossman /* This is to force an update */ 21498213af3bSAndy Shevchenko sdhci_update_clock(host); 21501c6a0718SPierre Ossman 21511c6a0718SPierre Ossman /* Spec says we should do both at the same time, but Ricoh 21521c6a0718SPierre Ossman controllers do not like that. */ 21531c6a0718SPierre Ossman sdhci_reset(host, SDHCI_RESET_CMD); 21541c6a0718SPierre Ossman sdhci_reset(host, SDHCI_RESET_DATA); 21551c6a0718SPierre Ossman } 21561c6a0718SPierre Ossman 21571c6a0718SPierre Ossman host->mrq = NULL; 21581c6a0718SPierre Ossman host->cmd = NULL; 21591c6a0718SPierre Ossman host->data = NULL; 21601c6a0718SPierre Ossman 2161f9134319SPierre Ossman #ifndef SDHCI_USE_LEDS_CLASS 21621c6a0718SPierre Ossman sdhci_deactivate_led(host); 21632f730fecSPierre Ossman #endif 21641c6a0718SPierre Ossman 21651c6a0718SPierre Ossman mmiowb(); 21661c6a0718SPierre Ossman spin_unlock_irqrestore(&host->lock, flags); 21671c6a0718SPierre Ossman 21681c6a0718SPierre Ossman mmc_request_done(host->mmc, mrq); 216966fd8ad5SAdrian Hunter sdhci_runtime_pm_put(host); 21701c6a0718SPierre Ossman } 21711c6a0718SPierre Ossman 21721c6a0718SPierre Ossman static void sdhci_timeout_timer(unsigned long data) 21731c6a0718SPierre Ossman { 21741c6a0718SPierre Ossman struct sdhci_host *host; 21751c6a0718SPierre Ossman unsigned long flags; 21761c6a0718SPierre Ossman 21771c6a0718SPierre Ossman host = (struct sdhci_host*)data; 21781c6a0718SPierre Ossman 21791c6a0718SPierre Ossman spin_lock_irqsave(&host->lock, flags); 21801c6a0718SPierre Ossman 21811c6a0718SPierre Ossman if (host->mrq) { 2182a3c76eb9SGirish K S pr_err("%s: Timeout waiting for hardware " 21831c6a0718SPierre Ossman "interrupt.\n", mmc_hostname(host->mmc)); 21841c6a0718SPierre Ossman sdhci_dumpregs(host); 21851c6a0718SPierre Ossman 21861c6a0718SPierre Ossman if (host->data) { 218717b0429dSPierre Ossman host->data->error = -ETIMEDOUT; 21881c6a0718SPierre Ossman sdhci_finish_data(host); 21891c6a0718SPierre Ossman } else { 21901c6a0718SPierre Ossman if (host->cmd) 219117b0429dSPierre Ossman host->cmd->error = -ETIMEDOUT; 21921c6a0718SPierre Ossman else 219317b0429dSPierre Ossman host->mrq->cmd->error = -ETIMEDOUT; 21941c6a0718SPierre Ossman 21951c6a0718SPierre Ossman tasklet_schedule(&host->finish_tasklet); 21961c6a0718SPierre Ossman } 21971c6a0718SPierre Ossman } 21981c6a0718SPierre Ossman 21991c6a0718SPierre Ossman mmiowb(); 22001c6a0718SPierre Ossman spin_unlock_irqrestore(&host->lock, flags); 22011c6a0718SPierre Ossman } 22021c6a0718SPierre Ossman 2203cf2b5eeaSArindam Nath static void sdhci_tuning_timer(unsigned long data) 2204cf2b5eeaSArindam Nath { 2205cf2b5eeaSArindam Nath struct sdhci_host *host; 2206cf2b5eeaSArindam Nath unsigned long flags; 2207cf2b5eeaSArindam Nath 2208cf2b5eeaSArindam Nath host = (struct sdhci_host *)data; 2209cf2b5eeaSArindam Nath 2210cf2b5eeaSArindam Nath spin_lock_irqsave(&host->lock, flags); 2211cf2b5eeaSArindam Nath 2212cf2b5eeaSArindam Nath host->flags |= SDHCI_NEEDS_RETUNING; 2213cf2b5eeaSArindam Nath 2214cf2b5eeaSArindam Nath spin_unlock_irqrestore(&host->lock, flags); 2215cf2b5eeaSArindam Nath } 2216cf2b5eeaSArindam Nath 22171c6a0718SPierre Ossman /*****************************************************************************\ 22181c6a0718SPierre Ossman * * 22191c6a0718SPierre Ossman * Interrupt handling * 22201c6a0718SPierre Ossman * * 22211c6a0718SPierre Ossman \*****************************************************************************/ 22221c6a0718SPierre Ossman 22231c6a0718SPierre Ossman static void sdhci_cmd_irq(struct sdhci_host *host, u32 intmask) 22241c6a0718SPierre Ossman { 22251c6a0718SPierre Ossman BUG_ON(intmask == 0); 22261c6a0718SPierre Ossman 22271c6a0718SPierre Ossman if (!host->cmd) { 2228a3c76eb9SGirish K S pr_err("%s: Got command interrupt 0x%08x even " 2229b67ac3f3SPierre Ossman "though no command operation was in progress.\n", 2230b67ac3f3SPierre Ossman mmc_hostname(host->mmc), (unsigned)intmask); 22311c6a0718SPierre Ossman sdhci_dumpregs(host); 22321c6a0718SPierre Ossman return; 22331c6a0718SPierre Ossman } 22341c6a0718SPierre Ossman 22351c6a0718SPierre Ossman if (intmask & SDHCI_INT_TIMEOUT) 223617b0429dSPierre Ossman host->cmd->error = -ETIMEDOUT; 223717b0429dSPierre Ossman else if (intmask & (SDHCI_INT_CRC | SDHCI_INT_END_BIT | 223817b0429dSPierre Ossman SDHCI_INT_INDEX)) 223917b0429dSPierre Ossman host->cmd->error = -EILSEQ; 22401c6a0718SPierre Ossman 2241e809517fSPierre Ossman if (host->cmd->error) { 22421c6a0718SPierre Ossman tasklet_schedule(&host->finish_tasklet); 2243e809517fSPierre Ossman return; 2244e809517fSPierre Ossman } 2245e809517fSPierre Ossman 2246e809517fSPierre Ossman /* 2247e809517fSPierre Ossman * The host can send and interrupt when the busy state has 2248e809517fSPierre Ossman * ended, allowing us to wait without wasting CPU cycles. 2249e809517fSPierre Ossman * Unfortunately this is overloaded on the "data complete" 2250e809517fSPierre Ossman * interrupt, so we need to take some care when handling 2251e809517fSPierre Ossman * it. 2252e809517fSPierre Ossman * 2253e809517fSPierre Ossman * Note: The 1.0 specification is a bit ambiguous about this 2254e809517fSPierre Ossman * feature so there might be some problems with older 2255e809517fSPierre Ossman * controllers. 2256e809517fSPierre Ossman */ 2257e809517fSPierre Ossman if (host->cmd->flags & MMC_RSP_BUSY) { 2258e809517fSPierre Ossman if (host->cmd->data) 2259e809517fSPierre Ossman DBG("Cannot wait for busy signal when also " 2260e809517fSPierre Ossman "doing a data transfer"); 2261f945405cSBen Dooks else if (!(host->quirks & SDHCI_QUIRK_NO_BUSY_IRQ)) 2262e809517fSPierre Ossman return; 2263f945405cSBen Dooks 2264f945405cSBen Dooks /* The controller does not support the end-of-busy IRQ, 2265f945405cSBen Dooks * fall through and take the SDHCI_INT_RESPONSE */ 2266e809517fSPierre Ossman } 2267e809517fSPierre Ossman 2268e809517fSPierre Ossman if (intmask & SDHCI_INT_RESPONSE) 226943b58b36SPierre Ossman sdhci_finish_command(host); 22701c6a0718SPierre Ossman } 22711c6a0718SPierre Ossman 22720957c333SGeorge G. Davis #ifdef CONFIG_MMC_DEBUG 22736882a8c0SBen Dooks static void sdhci_show_adma_error(struct sdhci_host *host) 22746882a8c0SBen Dooks { 22756882a8c0SBen Dooks const char *name = mmc_hostname(host->mmc); 22766882a8c0SBen Dooks u8 *desc = host->adma_desc; 22776882a8c0SBen Dooks __le32 *dma; 22786882a8c0SBen Dooks __le16 *len; 22796882a8c0SBen Dooks u8 attr; 22806882a8c0SBen Dooks 22816882a8c0SBen Dooks sdhci_dumpregs(host); 22826882a8c0SBen Dooks 22836882a8c0SBen Dooks while (true) { 22846882a8c0SBen Dooks dma = (__le32 *)(desc + 4); 22856882a8c0SBen Dooks len = (__le16 *)(desc + 2); 22866882a8c0SBen Dooks attr = *desc; 22876882a8c0SBen Dooks 22886882a8c0SBen Dooks DBG("%s: %p: DMA 0x%08x, LEN 0x%04x, Attr=0x%02x\n", 22896882a8c0SBen Dooks name, desc, le32_to_cpu(*dma), le16_to_cpu(*len), attr); 22906882a8c0SBen Dooks 22916882a8c0SBen Dooks desc += 8; 22926882a8c0SBen Dooks 22936882a8c0SBen Dooks if (attr & 2) 22946882a8c0SBen Dooks break; 22956882a8c0SBen Dooks } 22966882a8c0SBen Dooks } 22976882a8c0SBen Dooks #else 22986882a8c0SBen Dooks static void sdhci_show_adma_error(struct sdhci_host *host) { } 22996882a8c0SBen Dooks #endif 23006882a8c0SBen Dooks 23011c6a0718SPierre Ossman static void sdhci_data_irq(struct sdhci_host *host, u32 intmask) 23021c6a0718SPierre Ossman { 2303069c9f14SGirish K S u32 command; 23041c6a0718SPierre Ossman BUG_ON(intmask == 0); 23051c6a0718SPierre Ossman 2306b513ea25SArindam Nath /* CMD19 generates _only_ Buffer Read Ready interrupt */ 2307b513ea25SArindam Nath if (intmask & SDHCI_INT_DATA_AVAIL) { 2308069c9f14SGirish K S command = SDHCI_GET_CMD(sdhci_readw(host, SDHCI_COMMAND)); 2309069c9f14SGirish K S if (command == MMC_SEND_TUNING_BLOCK || 2310069c9f14SGirish K S command == MMC_SEND_TUNING_BLOCK_HS200) { 2311b513ea25SArindam Nath host->tuning_done = 1; 2312b513ea25SArindam Nath wake_up(&host->buf_ready_int); 2313b513ea25SArindam Nath return; 2314b513ea25SArindam Nath } 2315b513ea25SArindam Nath } 2316b513ea25SArindam Nath 23171c6a0718SPierre Ossman if (!host->data) { 23181c6a0718SPierre Ossman /* 2319e809517fSPierre Ossman * The "data complete" interrupt is also used to 2320e809517fSPierre Ossman * indicate that a busy state has ended. See comment 2321e809517fSPierre Ossman * above in sdhci_cmd_irq(). 23221c6a0718SPierre Ossman */ 2323e809517fSPierre Ossman if (host->cmd && (host->cmd->flags & MMC_RSP_BUSY)) { 2324e809517fSPierre Ossman if (intmask & SDHCI_INT_DATA_END) { 2325e809517fSPierre Ossman sdhci_finish_command(host); 23261c6a0718SPierre Ossman return; 2327e809517fSPierre Ossman } 2328e809517fSPierre Ossman } 23291c6a0718SPierre Ossman 2330a3c76eb9SGirish K S pr_err("%s: Got data interrupt 0x%08x even " 2331b67ac3f3SPierre Ossman "though no data operation was in progress.\n", 2332b67ac3f3SPierre Ossman mmc_hostname(host->mmc), (unsigned)intmask); 23331c6a0718SPierre Ossman sdhci_dumpregs(host); 23341c6a0718SPierre Ossman 23351c6a0718SPierre Ossman return; 23361c6a0718SPierre Ossman } 23371c6a0718SPierre Ossman 23381c6a0718SPierre Ossman if (intmask & SDHCI_INT_DATA_TIMEOUT) 233917b0429dSPierre Ossman host->data->error = -ETIMEDOUT; 234022113efdSAries Lee else if (intmask & SDHCI_INT_DATA_END_BIT) 234122113efdSAries Lee host->data->error = -EILSEQ; 234222113efdSAries Lee else if ((intmask & SDHCI_INT_DATA_CRC) && 234322113efdSAries Lee SDHCI_GET_CMD(sdhci_readw(host, SDHCI_COMMAND)) 234422113efdSAries Lee != MMC_BUS_TEST_R) 234517b0429dSPierre Ossman host->data->error = -EILSEQ; 23466882a8c0SBen Dooks else if (intmask & SDHCI_INT_ADMA_ERROR) { 2347a3c76eb9SGirish K S pr_err("%s: ADMA error\n", mmc_hostname(host->mmc)); 23486882a8c0SBen Dooks sdhci_show_adma_error(host); 23492134a922SPierre Ossman host->data->error = -EIO; 2350a4071fbbSHaijun Zhang if (host->ops->adma_workaround) 2351a4071fbbSHaijun Zhang host->ops->adma_workaround(host, intmask); 23526882a8c0SBen Dooks } 23531c6a0718SPierre Ossman 235417b0429dSPierre Ossman if (host->data->error) 23551c6a0718SPierre Ossman sdhci_finish_data(host); 23561c6a0718SPierre Ossman else { 23571c6a0718SPierre Ossman if (intmask & (SDHCI_INT_DATA_AVAIL | SDHCI_INT_SPACE_AVAIL)) 23581c6a0718SPierre Ossman sdhci_transfer_pio(host); 23591c6a0718SPierre Ossman 23606ba736a1SPierre Ossman /* 23616ba736a1SPierre Ossman * We currently don't do anything fancy with DMA 23626ba736a1SPierre Ossman * boundaries, but as we can't disable the feature 23636ba736a1SPierre Ossman * we need to at least restart the transfer. 2364f6a03cbfSMikko Vinni * 2365f6a03cbfSMikko Vinni * According to the spec sdhci_readl(host, SDHCI_DMA_ADDRESS) 2366f6a03cbfSMikko Vinni * should return a valid address to continue from, but as 2367f6a03cbfSMikko Vinni * some controllers are faulty, don't trust them. 23686ba736a1SPierre Ossman */ 2369f6a03cbfSMikko Vinni if (intmask & SDHCI_INT_DMA_END) { 2370f6a03cbfSMikko Vinni u32 dmastart, dmanow; 2371f6a03cbfSMikko Vinni dmastart = sg_dma_address(host->data->sg); 2372f6a03cbfSMikko Vinni dmanow = dmastart + host->data->bytes_xfered; 2373f6a03cbfSMikko Vinni /* 2374f6a03cbfSMikko Vinni * Force update to the next DMA block boundary. 2375f6a03cbfSMikko Vinni */ 2376f6a03cbfSMikko Vinni dmanow = (dmanow & 2377f6a03cbfSMikko Vinni ~(SDHCI_DEFAULT_BOUNDARY_SIZE - 1)) + 2378f6a03cbfSMikko Vinni SDHCI_DEFAULT_BOUNDARY_SIZE; 2379f6a03cbfSMikko Vinni host->data->bytes_xfered = dmanow - dmastart; 2380f6a03cbfSMikko Vinni DBG("%s: DMA base 0x%08x, transferred 0x%06x bytes," 2381f6a03cbfSMikko Vinni " next 0x%08x\n", 2382f6a03cbfSMikko Vinni mmc_hostname(host->mmc), dmastart, 2383f6a03cbfSMikko Vinni host->data->bytes_xfered, dmanow); 2384f6a03cbfSMikko Vinni sdhci_writel(host, dmanow, SDHCI_DMA_ADDRESS); 2385f6a03cbfSMikko Vinni } 23866ba736a1SPierre Ossman 2387e538fbe8SPierre Ossman if (intmask & SDHCI_INT_DATA_END) { 2388e538fbe8SPierre Ossman if (host->cmd) { 2389e538fbe8SPierre Ossman /* 2390e538fbe8SPierre Ossman * Data managed to finish before the 2391e538fbe8SPierre Ossman * command completed. Make sure we do 2392e538fbe8SPierre Ossman * things in the proper order. 2393e538fbe8SPierre Ossman */ 2394e538fbe8SPierre Ossman host->data_early = 1; 2395e538fbe8SPierre Ossman } else { 23961c6a0718SPierre Ossman sdhci_finish_data(host); 23971c6a0718SPierre Ossman } 23981c6a0718SPierre Ossman } 2399e538fbe8SPierre Ossman } 2400e538fbe8SPierre Ossman } 24011c6a0718SPierre Ossman 24021c6a0718SPierre Ossman static irqreturn_t sdhci_irq(int irq, void *dev_id) 24031c6a0718SPierre Ossman { 24041c6a0718SPierre Ossman irqreturn_t result; 24051c6a0718SPierre Ossman struct sdhci_host *host = dev_id; 24066379b237SAlexander Stein u32 intmask, unexpected = 0; 24076379b237SAlexander Stein int cardint = 0, max_loops = 16; 24081c6a0718SPierre Ossman 24091c6a0718SPierre Ossman spin_lock(&host->lock); 24101c6a0718SPierre Ossman 241166fd8ad5SAdrian Hunter if (host->runtime_suspended) { 241266fd8ad5SAdrian Hunter spin_unlock(&host->lock); 2413a3c76eb9SGirish K S pr_warning("%s: got irq while runtime suspended\n", 241466fd8ad5SAdrian Hunter mmc_hostname(host->mmc)); 241566fd8ad5SAdrian Hunter return IRQ_HANDLED; 241666fd8ad5SAdrian Hunter } 241766fd8ad5SAdrian Hunter 24184e4141a5SAnton Vorontsov intmask = sdhci_readl(host, SDHCI_INT_STATUS); 24191c6a0718SPierre Ossman 24201c6a0718SPierre Ossman if (!intmask || intmask == 0xffffffff) { 24211c6a0718SPierre Ossman result = IRQ_NONE; 24221c6a0718SPierre Ossman goto out; 24231c6a0718SPierre Ossman } 24241c6a0718SPierre Ossman 24256379b237SAlexander Stein again: 2426b69c9058SPierre Ossman DBG("*** %s got interrupt: 0x%08x\n", 2427b69c9058SPierre Ossman mmc_hostname(host->mmc), intmask); 24281c6a0718SPierre Ossman 24291c6a0718SPierre Ossman if (intmask & (SDHCI_INT_CARD_INSERT | SDHCI_INT_CARD_REMOVE)) { 2430d25928d1SShawn Guo u32 present = sdhci_readl(host, SDHCI_PRESENT_STATE) & 2431d25928d1SShawn Guo SDHCI_CARD_PRESENT; 2432d25928d1SShawn Guo 2433d25928d1SShawn Guo /* 2434d25928d1SShawn Guo * There is a observation on i.mx esdhc. INSERT bit will be 2435d25928d1SShawn Guo * immediately set again when it gets cleared, if a card is 2436d25928d1SShawn Guo * inserted. We have to mask the irq to prevent interrupt 2437d25928d1SShawn Guo * storm which will freeze the system. And the REMOVE gets 2438d25928d1SShawn Guo * the same situation. 2439d25928d1SShawn Guo * 2440d25928d1SShawn Guo * More testing are needed here to ensure it works for other 2441d25928d1SShawn Guo * platforms though. 2442d25928d1SShawn Guo */ 2443d25928d1SShawn Guo sdhci_mask_irqs(host, present ? SDHCI_INT_CARD_INSERT : 2444d25928d1SShawn Guo SDHCI_INT_CARD_REMOVE); 2445d25928d1SShawn Guo sdhci_unmask_irqs(host, present ? SDHCI_INT_CARD_REMOVE : 2446d25928d1SShawn Guo SDHCI_INT_CARD_INSERT); 2447d25928d1SShawn Guo 24484e4141a5SAnton Vorontsov sdhci_writel(host, intmask & (SDHCI_INT_CARD_INSERT | 24494e4141a5SAnton Vorontsov SDHCI_INT_CARD_REMOVE), SDHCI_INT_STATUS); 2450d25928d1SShawn Guo intmask &= ~(SDHCI_INT_CARD_INSERT | SDHCI_INT_CARD_REMOVE); 24511c6a0718SPierre Ossman tasklet_schedule(&host->card_tasklet); 24521c6a0718SPierre Ossman } 24531c6a0718SPierre Ossman 24541c6a0718SPierre Ossman if (intmask & SDHCI_INT_CMD_MASK) { 24554e4141a5SAnton Vorontsov sdhci_writel(host, intmask & SDHCI_INT_CMD_MASK, 24564e4141a5SAnton Vorontsov SDHCI_INT_STATUS); 24571c6a0718SPierre Ossman sdhci_cmd_irq(host, intmask & SDHCI_INT_CMD_MASK); 24581c6a0718SPierre Ossman } 24591c6a0718SPierre Ossman 24601c6a0718SPierre Ossman if (intmask & SDHCI_INT_DATA_MASK) { 24614e4141a5SAnton Vorontsov sdhci_writel(host, intmask & SDHCI_INT_DATA_MASK, 24624e4141a5SAnton Vorontsov SDHCI_INT_STATUS); 24631c6a0718SPierre Ossman sdhci_data_irq(host, intmask & SDHCI_INT_DATA_MASK); 24641c6a0718SPierre Ossman } 24651c6a0718SPierre Ossman 24661c6a0718SPierre Ossman intmask &= ~(SDHCI_INT_CMD_MASK | SDHCI_INT_DATA_MASK); 24671c6a0718SPierre Ossman 2468964f9ce2SPierre Ossman intmask &= ~SDHCI_INT_ERROR; 2469964f9ce2SPierre Ossman 24701c6a0718SPierre Ossman if (intmask & SDHCI_INT_BUS_POWER) { 2471a3c76eb9SGirish K S pr_err("%s: Card is consuming too much power!\n", 24721c6a0718SPierre Ossman mmc_hostname(host->mmc)); 24734e4141a5SAnton Vorontsov sdhci_writel(host, SDHCI_INT_BUS_POWER, SDHCI_INT_STATUS); 24741c6a0718SPierre Ossman } 24751c6a0718SPierre Ossman 24769d26a5d3SRolf Eike Beer intmask &= ~SDHCI_INT_BUS_POWER; 24771c6a0718SPierre Ossman 2478f75979b7SPierre Ossman if (intmask & SDHCI_INT_CARD_INT) 2479f75979b7SPierre Ossman cardint = 1; 2480f75979b7SPierre Ossman 2481f75979b7SPierre Ossman intmask &= ~SDHCI_INT_CARD_INT; 2482f75979b7SPierre Ossman 24831c6a0718SPierre Ossman if (intmask) { 24846379b237SAlexander Stein unexpected |= intmask; 24854e4141a5SAnton Vorontsov sdhci_writel(host, intmask, SDHCI_INT_STATUS); 24861c6a0718SPierre Ossman } 24871c6a0718SPierre Ossman 24881c6a0718SPierre Ossman result = IRQ_HANDLED; 24891c6a0718SPierre Ossman 24906379b237SAlexander Stein intmask = sdhci_readl(host, SDHCI_INT_STATUS); 24916379b237SAlexander Stein if (intmask && --max_loops) 24926379b237SAlexander Stein goto again; 24931c6a0718SPierre Ossman out: 24941c6a0718SPierre Ossman spin_unlock(&host->lock); 24951c6a0718SPierre Ossman 24966379b237SAlexander Stein if (unexpected) { 24976379b237SAlexander Stein pr_err("%s: Unexpected interrupt 0x%08x.\n", 24986379b237SAlexander Stein mmc_hostname(host->mmc), unexpected); 24996379b237SAlexander Stein sdhci_dumpregs(host); 25006379b237SAlexander Stein } 2501f75979b7SPierre Ossman /* 2502f75979b7SPierre Ossman * We have to delay this as it calls back into the driver. 2503f75979b7SPierre Ossman */ 2504f75979b7SPierre Ossman if (cardint) 2505f75979b7SPierre Ossman mmc_signal_sdio_irq(host->mmc); 2506f75979b7SPierre Ossman 25071c6a0718SPierre Ossman return result; 25081c6a0718SPierre Ossman } 25091c6a0718SPierre Ossman 25101c6a0718SPierre Ossman /*****************************************************************************\ 25111c6a0718SPierre Ossman * * 25121c6a0718SPierre Ossman * Suspend/resume * 25131c6a0718SPierre Ossman * * 25141c6a0718SPierre Ossman \*****************************************************************************/ 25151c6a0718SPierre Ossman 25161c6a0718SPierre Ossman #ifdef CONFIG_PM 2517ad080d79SKevin Liu void sdhci_enable_irq_wakeups(struct sdhci_host *host) 2518ad080d79SKevin Liu { 2519ad080d79SKevin Liu u8 val; 2520ad080d79SKevin Liu u8 mask = SDHCI_WAKE_ON_INSERT | SDHCI_WAKE_ON_REMOVE 2521ad080d79SKevin Liu | SDHCI_WAKE_ON_INT; 2522ad080d79SKevin Liu 2523ad080d79SKevin Liu val = sdhci_readb(host, SDHCI_WAKE_UP_CONTROL); 2524ad080d79SKevin Liu val |= mask ; 2525ad080d79SKevin Liu /* Avoid fake wake up */ 2526ad080d79SKevin Liu if (host->quirks & SDHCI_QUIRK_BROKEN_CARD_DETECTION) 2527ad080d79SKevin Liu val &= ~(SDHCI_WAKE_ON_INSERT | SDHCI_WAKE_ON_REMOVE); 2528ad080d79SKevin Liu sdhci_writeb(host, val, SDHCI_WAKE_UP_CONTROL); 2529ad080d79SKevin Liu } 2530ad080d79SKevin Liu EXPORT_SYMBOL_GPL(sdhci_enable_irq_wakeups); 2531ad080d79SKevin Liu 2532ad080d79SKevin Liu void sdhci_disable_irq_wakeups(struct sdhci_host *host) 2533ad080d79SKevin Liu { 2534ad080d79SKevin Liu u8 val; 2535ad080d79SKevin Liu u8 mask = SDHCI_WAKE_ON_INSERT | SDHCI_WAKE_ON_REMOVE 2536ad080d79SKevin Liu | SDHCI_WAKE_ON_INT; 2537ad080d79SKevin Liu 2538ad080d79SKevin Liu val = sdhci_readb(host, SDHCI_WAKE_UP_CONTROL); 2539ad080d79SKevin Liu val &= ~mask; 2540ad080d79SKevin Liu sdhci_writeb(host, val, SDHCI_WAKE_UP_CONTROL); 2541ad080d79SKevin Liu } 2542ad080d79SKevin Liu EXPORT_SYMBOL_GPL(sdhci_disable_irq_wakeups); 25431c6a0718SPierre Ossman 254429495aa0SManuel Lauss int sdhci_suspend_host(struct sdhci_host *host) 25451c6a0718SPierre Ossman { 2546b8c86fc5SPierre Ossman int ret; 25471c6a0718SPierre Ossman 2548a1b13b4eSChris Ball if (host->ops->platform_suspend) 2549a1b13b4eSChris Ball host->ops->platform_suspend(host); 2550a1b13b4eSChris Ball 25517260cf5eSAnton Vorontsov sdhci_disable_card_detection(host); 25527260cf5eSAnton Vorontsov 2553cf2b5eeaSArindam Nath /* Disable tuning since we are suspending */ 2554973905feSAaron Lu if (host->flags & SDHCI_USING_RETUNING_TIMER) { 2555c6ced0dbSAaron Lu del_timer_sync(&host->tuning_timer); 2556cf2b5eeaSArindam Nath host->flags &= ~SDHCI_NEEDS_RETUNING; 2557cf2b5eeaSArindam Nath } 2558cf2b5eeaSArindam Nath 25591a13f8faSMatt Fleming ret = mmc_suspend_host(host->mmc); 256038a60ea2SAaron Lu if (ret) { 2561973905feSAaron Lu if (host->flags & SDHCI_USING_RETUNING_TIMER) { 256238a60ea2SAaron Lu host->flags |= SDHCI_NEEDS_RETUNING; 256338a60ea2SAaron Lu mod_timer(&host->tuning_timer, jiffies + 256438a60ea2SAaron Lu host->tuning_count * HZ); 256538a60ea2SAaron Lu } 256638a60ea2SAaron Lu 256738a60ea2SAaron Lu sdhci_enable_card_detection(host); 256838a60ea2SAaron Lu 25691c6a0718SPierre Ossman return ret; 257038a60ea2SAaron Lu } 25711c6a0718SPierre Ossman 2572ad080d79SKevin Liu if (!device_may_wakeup(mmc_dev(host->mmc))) { 2573b0a8deceSKevin Liu sdhci_mask_irqs(host, SDHCI_INT_ALL_MASK); 2574b8c86fc5SPierre Ossman free_irq(host->irq, host); 2575ad080d79SKevin Liu } else { 2576ad080d79SKevin Liu sdhci_enable_irq_wakeups(host); 2577ad080d79SKevin Liu enable_irq_wake(host->irq); 2578ad080d79SKevin Liu } 25799bea3c85SMarek Szyprowski return ret; 2580b8c86fc5SPierre Ossman } 2581b8c86fc5SPierre Ossman 2582b8c86fc5SPierre Ossman EXPORT_SYMBOL_GPL(sdhci_suspend_host); 2583b8c86fc5SPierre Ossman 2584b8c86fc5SPierre Ossman int sdhci_resume_host(struct sdhci_host *host) 2585b8c86fc5SPierre Ossman { 2586b8c86fc5SPierre Ossman int ret; 2587b8c86fc5SPierre Ossman 2588a13abc7bSRichard Röjfors if (host->flags & (SDHCI_USE_SDMA | SDHCI_USE_ADMA)) { 2589b8c86fc5SPierre Ossman if (host->ops->enable_dma) 2590b8c86fc5SPierre Ossman host->ops->enable_dma(host); 2591b8c86fc5SPierre Ossman } 2592b8c86fc5SPierre Ossman 2593ad080d79SKevin Liu if (!device_may_wakeup(mmc_dev(host->mmc))) { 2594b8c86fc5SPierre Ossman ret = request_irq(host->irq, sdhci_irq, IRQF_SHARED, 2595b8c86fc5SPierre Ossman mmc_hostname(host->mmc), host); 25961c6a0718SPierre Ossman if (ret) 25971c6a0718SPierre Ossman return ret; 2598ad080d79SKevin Liu } else { 2599ad080d79SKevin Liu sdhci_disable_irq_wakeups(host); 2600ad080d79SKevin Liu disable_irq_wake(host->irq); 2601ad080d79SKevin Liu } 2602b8c86fc5SPierre Ossman 26036308d290SAdrian Hunter if ((host->mmc->pm_flags & MMC_PM_KEEP_POWER) && 26046308d290SAdrian Hunter (host->quirks2 & SDHCI_QUIRK2_HOST_OFF_CARD_ON)) { 26056308d290SAdrian Hunter /* Card keeps power but host controller does not */ 26066308d290SAdrian Hunter sdhci_init(host, 0); 26076308d290SAdrian Hunter host->pwr = 0; 26086308d290SAdrian Hunter host->clock = 0; 26096308d290SAdrian Hunter sdhci_do_set_ios(host, &host->mmc->ios); 26106308d290SAdrian Hunter } else { 26112f4cbb3dSNicolas Pitre sdhci_init(host, (host->mmc->pm_flags & MMC_PM_KEEP_POWER)); 26121c6a0718SPierre Ossman mmiowb(); 26136308d290SAdrian Hunter } 2614b8c86fc5SPierre Ossman 2615b8c86fc5SPierre Ossman ret = mmc_resume_host(host->mmc); 26167260cf5eSAnton Vorontsov sdhci_enable_card_detection(host); 26177260cf5eSAnton Vorontsov 2618a1b13b4eSChris Ball if (host->ops->platform_resume) 2619a1b13b4eSChris Ball host->ops->platform_resume(host); 2620a1b13b4eSChris Ball 2621cf2b5eeaSArindam Nath /* Set the re-tuning expiration flag */ 2622973905feSAaron Lu if (host->flags & SDHCI_USING_RETUNING_TIMER) 2623cf2b5eeaSArindam Nath host->flags |= SDHCI_NEEDS_RETUNING; 2624cf2b5eeaSArindam Nath 26252f4cbb3dSNicolas Pitre return ret; 26261c6a0718SPierre Ossman } 26271c6a0718SPierre Ossman 2628b8c86fc5SPierre Ossman EXPORT_SYMBOL_GPL(sdhci_resume_host); 26291c6a0718SPierre Ossman #endif /* CONFIG_PM */ 26301c6a0718SPierre Ossman 263166fd8ad5SAdrian Hunter #ifdef CONFIG_PM_RUNTIME 263266fd8ad5SAdrian Hunter 263366fd8ad5SAdrian Hunter static int sdhci_runtime_pm_get(struct sdhci_host *host) 263466fd8ad5SAdrian Hunter { 263566fd8ad5SAdrian Hunter return pm_runtime_get_sync(host->mmc->parent); 263666fd8ad5SAdrian Hunter } 263766fd8ad5SAdrian Hunter 263866fd8ad5SAdrian Hunter static int sdhci_runtime_pm_put(struct sdhci_host *host) 263966fd8ad5SAdrian Hunter { 264066fd8ad5SAdrian Hunter pm_runtime_mark_last_busy(host->mmc->parent); 264166fd8ad5SAdrian Hunter return pm_runtime_put_autosuspend(host->mmc->parent); 264266fd8ad5SAdrian Hunter } 264366fd8ad5SAdrian Hunter 2644f0710a55SAdrian Hunter static void sdhci_runtime_pm_bus_on(struct sdhci_host *host) 2645f0710a55SAdrian Hunter { 2646f0710a55SAdrian Hunter if (host->runtime_suspended || host->bus_on) 2647f0710a55SAdrian Hunter return; 2648f0710a55SAdrian Hunter host->bus_on = true; 2649f0710a55SAdrian Hunter pm_runtime_get_noresume(host->mmc->parent); 2650f0710a55SAdrian Hunter } 2651f0710a55SAdrian Hunter 2652f0710a55SAdrian Hunter static void sdhci_runtime_pm_bus_off(struct sdhci_host *host) 2653f0710a55SAdrian Hunter { 2654f0710a55SAdrian Hunter if (host->runtime_suspended || !host->bus_on) 2655f0710a55SAdrian Hunter return; 2656f0710a55SAdrian Hunter host->bus_on = false; 2657f0710a55SAdrian Hunter pm_runtime_put_noidle(host->mmc->parent); 2658f0710a55SAdrian Hunter } 2659f0710a55SAdrian Hunter 266066fd8ad5SAdrian Hunter int sdhci_runtime_suspend_host(struct sdhci_host *host) 266166fd8ad5SAdrian Hunter { 266266fd8ad5SAdrian Hunter unsigned long flags; 266366fd8ad5SAdrian Hunter int ret = 0; 266466fd8ad5SAdrian Hunter 266566fd8ad5SAdrian Hunter /* Disable tuning since we are suspending */ 2666973905feSAaron Lu if (host->flags & SDHCI_USING_RETUNING_TIMER) { 266766fd8ad5SAdrian Hunter del_timer_sync(&host->tuning_timer); 266866fd8ad5SAdrian Hunter host->flags &= ~SDHCI_NEEDS_RETUNING; 266966fd8ad5SAdrian Hunter } 267066fd8ad5SAdrian Hunter 267166fd8ad5SAdrian Hunter spin_lock_irqsave(&host->lock, flags); 267266fd8ad5SAdrian Hunter sdhci_mask_irqs(host, SDHCI_INT_ALL_MASK); 267366fd8ad5SAdrian Hunter spin_unlock_irqrestore(&host->lock, flags); 267466fd8ad5SAdrian Hunter 267566fd8ad5SAdrian Hunter synchronize_irq(host->irq); 267666fd8ad5SAdrian Hunter 267766fd8ad5SAdrian Hunter spin_lock_irqsave(&host->lock, flags); 267866fd8ad5SAdrian Hunter host->runtime_suspended = true; 267966fd8ad5SAdrian Hunter spin_unlock_irqrestore(&host->lock, flags); 268066fd8ad5SAdrian Hunter 268166fd8ad5SAdrian Hunter return ret; 268266fd8ad5SAdrian Hunter } 268366fd8ad5SAdrian Hunter EXPORT_SYMBOL_GPL(sdhci_runtime_suspend_host); 268466fd8ad5SAdrian Hunter 268566fd8ad5SAdrian Hunter int sdhci_runtime_resume_host(struct sdhci_host *host) 268666fd8ad5SAdrian Hunter { 268766fd8ad5SAdrian Hunter unsigned long flags; 268866fd8ad5SAdrian Hunter int ret = 0, host_flags = host->flags; 268966fd8ad5SAdrian Hunter 269066fd8ad5SAdrian Hunter if (host_flags & (SDHCI_USE_SDMA | SDHCI_USE_ADMA)) { 269166fd8ad5SAdrian Hunter if (host->ops->enable_dma) 269266fd8ad5SAdrian Hunter host->ops->enable_dma(host); 269366fd8ad5SAdrian Hunter } 269466fd8ad5SAdrian Hunter 269566fd8ad5SAdrian Hunter sdhci_init(host, 0); 269666fd8ad5SAdrian Hunter 269766fd8ad5SAdrian Hunter /* Force clock and power re-program */ 269866fd8ad5SAdrian Hunter host->pwr = 0; 269966fd8ad5SAdrian Hunter host->clock = 0; 270066fd8ad5SAdrian Hunter sdhci_do_set_ios(host, &host->mmc->ios); 270166fd8ad5SAdrian Hunter 270266fd8ad5SAdrian Hunter sdhci_do_start_signal_voltage_switch(host, &host->mmc->ios); 270352983382SKevin Liu if ((host_flags & SDHCI_PV_ENABLED) && 270452983382SKevin Liu !(host->quirks2 & SDHCI_QUIRK2_PRESET_VALUE_BROKEN)) { 270552983382SKevin Liu spin_lock_irqsave(&host->lock, flags); 270652983382SKevin Liu sdhci_enable_preset_value(host, true); 270752983382SKevin Liu spin_unlock_irqrestore(&host->lock, flags); 270852983382SKevin Liu } 270966fd8ad5SAdrian Hunter 271066fd8ad5SAdrian Hunter /* Set the re-tuning expiration flag */ 2711973905feSAaron Lu if (host->flags & SDHCI_USING_RETUNING_TIMER) 271266fd8ad5SAdrian Hunter host->flags |= SDHCI_NEEDS_RETUNING; 271366fd8ad5SAdrian Hunter 271466fd8ad5SAdrian Hunter spin_lock_irqsave(&host->lock, flags); 271566fd8ad5SAdrian Hunter 271666fd8ad5SAdrian Hunter host->runtime_suspended = false; 271766fd8ad5SAdrian Hunter 271866fd8ad5SAdrian Hunter /* Enable SDIO IRQ */ 271966fd8ad5SAdrian Hunter if ((host->flags & SDHCI_SDIO_IRQ_ENABLED)) 272066fd8ad5SAdrian Hunter sdhci_enable_sdio_irq_nolock(host, true); 272166fd8ad5SAdrian Hunter 272266fd8ad5SAdrian Hunter /* Enable Card Detection */ 272366fd8ad5SAdrian Hunter sdhci_enable_card_detection(host); 272466fd8ad5SAdrian Hunter 272566fd8ad5SAdrian Hunter spin_unlock_irqrestore(&host->lock, flags); 272666fd8ad5SAdrian Hunter 272766fd8ad5SAdrian Hunter return ret; 272866fd8ad5SAdrian Hunter } 272966fd8ad5SAdrian Hunter EXPORT_SYMBOL_GPL(sdhci_runtime_resume_host); 273066fd8ad5SAdrian Hunter 273166fd8ad5SAdrian Hunter #endif 273266fd8ad5SAdrian Hunter 27331c6a0718SPierre Ossman /*****************************************************************************\ 27341c6a0718SPierre Ossman * * 2735b8c86fc5SPierre Ossman * Device allocation/registration * 27361c6a0718SPierre Ossman * * 27371c6a0718SPierre Ossman \*****************************************************************************/ 27381c6a0718SPierre Ossman 2739b8c86fc5SPierre Ossman struct sdhci_host *sdhci_alloc_host(struct device *dev, 2740b8c86fc5SPierre Ossman size_t priv_size) 27411c6a0718SPierre Ossman { 27421c6a0718SPierre Ossman struct mmc_host *mmc; 27431c6a0718SPierre Ossman struct sdhci_host *host; 27441c6a0718SPierre Ossman 2745b8c86fc5SPierre Ossman WARN_ON(dev == NULL); 27461c6a0718SPierre Ossman 2747b8c86fc5SPierre Ossman mmc = mmc_alloc_host(sizeof(struct sdhci_host) + priv_size, dev); 27481c6a0718SPierre Ossman if (!mmc) 2749b8c86fc5SPierre Ossman return ERR_PTR(-ENOMEM); 27501c6a0718SPierre Ossman 27511c6a0718SPierre Ossman host = mmc_priv(mmc); 27521c6a0718SPierre Ossman host->mmc = mmc; 27531c6a0718SPierre Ossman 2754b8c86fc5SPierre Ossman return host; 27551c6a0718SPierre Ossman } 27561c6a0718SPierre Ossman 2757b8c86fc5SPierre Ossman EXPORT_SYMBOL_GPL(sdhci_alloc_host); 2758b8c86fc5SPierre Ossman 2759b8c86fc5SPierre Ossman int sdhci_add_host(struct sdhci_host *host) 2760b8c86fc5SPierre Ossman { 2761b8c86fc5SPierre Ossman struct mmc_host *mmc; 2762bd6a8c30SPhilip Rakity u32 caps[2] = {0, 0}; 2763f2119df6SArindam Nath u32 max_current_caps; 2764f2119df6SArindam Nath unsigned int ocr_avail; 2765b8c86fc5SPierre Ossman int ret; 2766b8c86fc5SPierre Ossman 2767b8c86fc5SPierre Ossman WARN_ON(host == NULL); 2768b8c86fc5SPierre Ossman if (host == NULL) 2769b8c86fc5SPierre Ossman return -EINVAL; 2770b8c86fc5SPierre Ossman 2771b8c86fc5SPierre Ossman mmc = host->mmc; 2772b8c86fc5SPierre Ossman 2773b8c86fc5SPierre Ossman if (debug_quirks) 2774b8c86fc5SPierre Ossman host->quirks = debug_quirks; 277566fd8ad5SAdrian Hunter if (debug_quirks2) 277666fd8ad5SAdrian Hunter host->quirks2 = debug_quirks2; 2777b8c86fc5SPierre Ossman 27781c6a0718SPierre Ossman sdhci_reset(host, SDHCI_RESET_ALL); 27791c6a0718SPierre Ossman 27804e4141a5SAnton Vorontsov host->version = sdhci_readw(host, SDHCI_HOST_VERSION); 27812134a922SPierre Ossman host->version = (host->version & SDHCI_SPEC_VER_MASK) 27822134a922SPierre Ossman >> SDHCI_SPEC_VER_SHIFT; 278385105c53SZhangfei Gao if (host->version > SDHCI_SPEC_300) { 2784a3c76eb9SGirish K S pr_err("%s: Unknown controller version (%d). " 2785b69c9058SPierre Ossman "You may experience problems.\n", mmc_hostname(mmc), 27862134a922SPierre Ossman host->version); 27871c6a0718SPierre Ossman } 27881c6a0718SPierre Ossman 2789f2119df6SArindam Nath caps[0] = (host->quirks & SDHCI_QUIRK_MISSING_CAPS) ? host->caps : 2790ccc92c23SMaxim Levitsky sdhci_readl(host, SDHCI_CAPABILITIES); 27911c6a0718SPierre Ossman 2792bd6a8c30SPhilip Rakity if (host->version >= SDHCI_SPEC_300) 2793bd6a8c30SPhilip Rakity caps[1] = (host->quirks & SDHCI_QUIRK_MISSING_CAPS) ? 2794bd6a8c30SPhilip Rakity host->caps1 : 2795bd6a8c30SPhilip Rakity sdhci_readl(host, SDHCI_CAPABILITIES_1); 2796f2119df6SArindam Nath 2797b8c86fc5SPierre Ossman if (host->quirks & SDHCI_QUIRK_FORCE_DMA) 2798a13abc7bSRichard Röjfors host->flags |= SDHCI_USE_SDMA; 2799f2119df6SArindam Nath else if (!(caps[0] & SDHCI_CAN_DO_SDMA)) 2800a13abc7bSRichard Röjfors DBG("Controller doesn't have SDMA capability\n"); 28011c6a0718SPierre Ossman else 2802a13abc7bSRichard Röjfors host->flags |= SDHCI_USE_SDMA; 28031c6a0718SPierre Ossman 2804b8c86fc5SPierre Ossman if ((host->quirks & SDHCI_QUIRK_BROKEN_DMA) && 2805a13abc7bSRichard Röjfors (host->flags & SDHCI_USE_SDMA)) { 2806cee687ceSRolf Eike Beer DBG("Disabling DMA as it is marked broken\n"); 2807a13abc7bSRichard Röjfors host->flags &= ~SDHCI_USE_SDMA; 28087c168e3dSFeng Tang } 28097c168e3dSFeng Tang 2810f2119df6SArindam Nath if ((host->version >= SDHCI_SPEC_200) && 2811f2119df6SArindam Nath (caps[0] & SDHCI_CAN_DO_ADMA2)) 28122134a922SPierre Ossman host->flags |= SDHCI_USE_ADMA; 28132134a922SPierre Ossman 28142134a922SPierre Ossman if ((host->quirks & SDHCI_QUIRK_BROKEN_ADMA) && 28152134a922SPierre Ossman (host->flags & SDHCI_USE_ADMA)) { 28162134a922SPierre Ossman DBG("Disabling ADMA as it is marked broken\n"); 28172134a922SPierre Ossman host->flags &= ~SDHCI_USE_ADMA; 28182134a922SPierre Ossman } 28192134a922SPierre Ossman 2820a13abc7bSRichard Röjfors if (host->flags & (SDHCI_USE_SDMA | SDHCI_USE_ADMA)) { 2821b8c86fc5SPierre Ossman if (host->ops->enable_dma) { 2822b8c86fc5SPierre Ossman if (host->ops->enable_dma(host)) { 2823a3c76eb9SGirish K S pr_warning("%s: No suitable DMA " 2824b8c86fc5SPierre Ossman "available. Falling back to PIO.\n", 2825b8c86fc5SPierre Ossman mmc_hostname(mmc)); 2826a13abc7bSRichard Röjfors host->flags &= 2827a13abc7bSRichard Röjfors ~(SDHCI_USE_SDMA | SDHCI_USE_ADMA); 28281c6a0718SPierre Ossman } 28291c6a0718SPierre Ossman } 2830b8c86fc5SPierre Ossman } 28311c6a0718SPierre Ossman 28322134a922SPierre Ossman if (host->flags & SDHCI_USE_ADMA) { 28332134a922SPierre Ossman /* 28342134a922SPierre Ossman * We need to allocate descriptors for all sg entries 28352134a922SPierre Ossman * (128) and potentially one alignment transfer for 28362134a922SPierre Ossman * each of those entries. 28372134a922SPierre Ossman */ 28382134a922SPierre Ossman host->adma_desc = kmalloc((128 * 2 + 1) * 4, GFP_KERNEL); 28392134a922SPierre Ossman host->align_buffer = kmalloc(128 * 4, GFP_KERNEL); 28402134a922SPierre Ossman if (!host->adma_desc || !host->align_buffer) { 28412134a922SPierre Ossman kfree(host->adma_desc); 28422134a922SPierre Ossman kfree(host->align_buffer); 2843a3c76eb9SGirish K S pr_warning("%s: Unable to allocate ADMA " 28442134a922SPierre Ossman "buffers. Falling back to standard DMA.\n", 28452134a922SPierre Ossman mmc_hostname(mmc)); 28462134a922SPierre Ossman host->flags &= ~SDHCI_USE_ADMA; 28472134a922SPierre Ossman } 28482134a922SPierre Ossman } 28492134a922SPierre Ossman 28507659150cSPierre Ossman /* 28517659150cSPierre Ossman * If we use DMA, then it's up to the caller to set the DMA 28527659150cSPierre Ossman * mask, but PIO does not need the hw shim so we set a new 28537659150cSPierre Ossman * mask here in that case. 28547659150cSPierre Ossman */ 2855a13abc7bSRichard Röjfors if (!(host->flags & (SDHCI_USE_SDMA | SDHCI_USE_ADMA))) { 28567659150cSPierre Ossman host->dma_mask = DMA_BIT_MASK(64); 28577659150cSPierre Ossman mmc_dev(host->mmc)->dma_mask = &host->dma_mask; 28587659150cSPierre Ossman } 28591c6a0718SPierre Ossman 2860c4687d5fSZhangfei Gao if (host->version >= SDHCI_SPEC_300) 2861f2119df6SArindam Nath host->max_clk = (caps[0] & SDHCI_CLOCK_V3_BASE_MASK) 2862c4687d5fSZhangfei Gao >> SDHCI_CLOCK_BASE_SHIFT; 2863c4687d5fSZhangfei Gao else 2864f2119df6SArindam Nath host->max_clk = (caps[0] & SDHCI_CLOCK_BASE_MASK) 2865c4687d5fSZhangfei Gao >> SDHCI_CLOCK_BASE_SHIFT; 2866c4687d5fSZhangfei Gao 28674240ff0aSBen Dooks host->max_clk *= 1000000; 2868f27f47efSAnton Vorontsov if (host->max_clk == 0 || host->quirks & 2869f27f47efSAnton Vorontsov SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN) { 28704240ff0aSBen Dooks if (!host->ops->get_max_clock) { 2871a3c76eb9SGirish K S pr_err("%s: Hardware doesn't specify base clock " 2872b69c9058SPierre Ossman "frequency.\n", mmc_hostname(mmc)); 2873b8c86fc5SPierre Ossman return -ENODEV; 28741c6a0718SPierre Ossman } 28754240ff0aSBen Dooks host->max_clk = host->ops->get_max_clock(host); 28764240ff0aSBen Dooks } 28771c6a0718SPierre Ossman 28781c6a0718SPierre Ossman /* 2879c3ed3877SArindam Nath * In case of Host Controller v3.00, find out whether clock 2880c3ed3877SArindam Nath * multiplier is supported. 2881c3ed3877SArindam Nath */ 2882c3ed3877SArindam Nath host->clk_mul = (caps[1] & SDHCI_CLOCK_MUL_MASK) >> 2883c3ed3877SArindam Nath SDHCI_CLOCK_MUL_SHIFT; 2884c3ed3877SArindam Nath 2885c3ed3877SArindam Nath /* 2886c3ed3877SArindam Nath * In case the value in Clock Multiplier is 0, then programmable 2887c3ed3877SArindam Nath * clock mode is not supported, otherwise the actual clock 2888c3ed3877SArindam Nath * multiplier is one more than the value of Clock Multiplier 2889c3ed3877SArindam Nath * in the Capabilities Register. 2890c3ed3877SArindam Nath */ 2891c3ed3877SArindam Nath if (host->clk_mul) 2892c3ed3877SArindam Nath host->clk_mul += 1; 2893c3ed3877SArindam Nath 2894c3ed3877SArindam Nath /* 28951c6a0718SPierre Ossman * Set host parameters. 28961c6a0718SPierre Ossman */ 28971c6a0718SPierre Ossman mmc->ops = &sdhci_ops; 2898c3ed3877SArindam Nath mmc->f_max = host->max_clk; 2899ce5f036bSMarek Szyprowski if (host->ops->get_min_clock) 2900a9e58f25SAnton Vorontsov mmc->f_min = host->ops->get_min_clock(host); 2901c3ed3877SArindam Nath else if (host->version >= SDHCI_SPEC_300) { 2902c3ed3877SArindam Nath if (host->clk_mul) { 2903c3ed3877SArindam Nath mmc->f_min = (host->max_clk * host->clk_mul) / 1024; 2904c3ed3877SArindam Nath mmc->f_max = host->max_clk * host->clk_mul; 2905c3ed3877SArindam Nath } else 29060397526dSZhangfei Gao mmc->f_min = host->max_clk / SDHCI_MAX_DIV_SPEC_300; 2907c3ed3877SArindam Nath } else 29080397526dSZhangfei Gao mmc->f_min = host->max_clk / SDHCI_MAX_DIV_SPEC_200; 290915ec4461SPhilip Rakity 2910272308caSAndy Shevchenko host->timeout_clk = 2911272308caSAndy Shevchenko (caps[0] & SDHCI_TIMEOUT_CLK_MASK) >> SDHCI_TIMEOUT_CLK_SHIFT; 2912272308caSAndy Shevchenko if (host->timeout_clk == 0) { 2913272308caSAndy Shevchenko if (host->ops->get_timeout_clock) { 2914272308caSAndy Shevchenko host->timeout_clk = host->ops->get_timeout_clock(host); 2915272308caSAndy Shevchenko } else if (!(host->quirks & 2916272308caSAndy Shevchenko SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK)) { 2917a3c76eb9SGirish K S pr_err("%s: Hardware doesn't specify timeout clock " 2918272308caSAndy Shevchenko "frequency.\n", mmc_hostname(mmc)); 2919272308caSAndy Shevchenko return -ENODEV; 2920272308caSAndy Shevchenko } 2921272308caSAndy Shevchenko } 2922272308caSAndy Shevchenko if (caps[0] & SDHCI_TIMEOUT_CLK_UNIT) 2923272308caSAndy Shevchenko host->timeout_clk *= 1000; 2924272308caSAndy Shevchenko 2925272308caSAndy Shevchenko if (host->quirks & SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK) 292665be3fefSAndy Shevchenko host->timeout_clk = mmc->f_max / 1000; 2927272308caSAndy Shevchenko 292858d1246dSAdrian Hunter mmc->max_discard_to = (1 << 27) / host->timeout_clk; 292958d1246dSAdrian Hunter 2930e89d456fSAndrei Warkentin mmc->caps |= MMC_CAP_SDIO_IRQ | MMC_CAP_ERASE | MMC_CAP_CMD23; 2931e89d456fSAndrei Warkentin 2932e89d456fSAndrei Warkentin if (host->quirks & SDHCI_QUIRK_MULTIBLOCK_READ_ACMD12) 2933e89d456fSAndrei Warkentin host->flags |= SDHCI_AUTO_CMD12; 29345fe23c7fSAnton Vorontsov 29358edf6371SAndrei Warkentin /* Auto-CMD23 stuff only works in ADMA or PIO. */ 29364f3d3e9bSAndrei Warkentin if ((host->version >= SDHCI_SPEC_300) && 29378edf6371SAndrei Warkentin ((host->flags & SDHCI_USE_ADMA) || 29384f3d3e9bSAndrei Warkentin !(host->flags & SDHCI_USE_SDMA))) { 29398edf6371SAndrei Warkentin host->flags |= SDHCI_AUTO_CMD23; 29408edf6371SAndrei Warkentin DBG("%s: Auto-CMD23 available\n", mmc_hostname(mmc)); 29418edf6371SAndrei Warkentin } else { 29428edf6371SAndrei Warkentin DBG("%s: Auto-CMD23 unavailable\n", mmc_hostname(mmc)); 29438edf6371SAndrei Warkentin } 29448edf6371SAndrei Warkentin 294515ec4461SPhilip Rakity /* 294615ec4461SPhilip Rakity * A controller may support 8-bit width, but the board itself 294715ec4461SPhilip Rakity * might not have the pins brought out. Boards that support 294815ec4461SPhilip Rakity * 8-bit width must set "mmc->caps |= MMC_CAP_8_BIT_DATA;" in 294915ec4461SPhilip Rakity * their platform code before calling sdhci_add_host(), and we 295015ec4461SPhilip Rakity * won't assume 8-bit width for hosts without that CAP. 295115ec4461SPhilip Rakity */ 29525fe23c7fSAnton Vorontsov if (!(host->quirks & SDHCI_QUIRK_FORCE_1_BIT_DATA)) 295315ec4461SPhilip Rakity mmc->caps |= MMC_CAP_4_BIT_DATA; 29541c6a0718SPierre Ossman 295563ef5d8cSJerry Huang if (host->quirks2 & SDHCI_QUIRK2_HOST_NO_CMD23) 295663ef5d8cSJerry Huang mmc->caps &= ~MMC_CAP_CMD23; 295763ef5d8cSJerry Huang 2958f2119df6SArindam Nath if (caps[0] & SDHCI_CAN_DO_HISPD) 2959a29e7e18SZhangfei Gao mmc->caps |= MMC_CAP_SD_HIGHSPEED | MMC_CAP_MMC_HIGHSPEED; 29601c6a0718SPierre Ossman 2961176d1ed4SJaehoon Chung if ((host->quirks & SDHCI_QUIRK_BROKEN_CARD_DETECTION) && 2962eb6d5ae1SDaniel Drake !(host->mmc->caps & MMC_CAP_NONREMOVABLE)) 296368d1fb7eSAnton Vorontsov mmc->caps |= MMC_CAP_NEEDS_POLL; 296468d1fb7eSAnton Vorontsov 29656231f3deSPhilip Rakity /* If vqmmc regulator and no 1.8V signalling, then there's no UHS */ 29666231f3deSPhilip Rakity host->vqmmc = regulator_get(mmc_dev(mmc), "vqmmc"); 2967657d5982SKevin Liu if (IS_ERR_OR_NULL(host->vqmmc)) { 2968657d5982SKevin Liu if (PTR_ERR(host->vqmmc) < 0) { 2969657d5982SKevin Liu pr_info("%s: no vqmmc regulator found\n", 2970657d5982SKevin Liu mmc_hostname(mmc)); 29716231f3deSPhilip Rakity host->vqmmc = NULL; 29726231f3deSPhilip Rakity } 29738363c374SKevin Liu } else { 2974a3361abaSChris Ball ret = regulator_enable(host->vqmmc); 2975cec2e216SKevin Liu if (!regulator_is_supported_voltage(host->vqmmc, 1700000, 2976cec2e216SKevin Liu 1950000)) 29778363c374SKevin Liu caps[1] &= ~(SDHCI_SUPPORT_SDR104 | 29788363c374SKevin Liu SDHCI_SUPPORT_SDR50 | 29796231f3deSPhilip Rakity SDHCI_SUPPORT_DDR50); 2980a3361abaSChris Ball if (ret) { 2981a3361abaSChris Ball pr_warn("%s: Failed to enable vqmmc regulator: %d\n", 2982a3361abaSChris Ball mmc_hostname(mmc), ret); 2983a3361abaSChris Ball host->vqmmc = NULL; 2984a3361abaSChris Ball } 29858363c374SKevin Liu } 29866231f3deSPhilip Rakity 29876a66180aSDaniel Drake if (host->quirks2 & SDHCI_QUIRK2_NO_1_8_V) 29886a66180aSDaniel Drake caps[1] &= ~(SDHCI_SUPPORT_SDR104 | SDHCI_SUPPORT_SDR50 | 29896a66180aSDaniel Drake SDHCI_SUPPORT_DDR50); 29906a66180aSDaniel Drake 29914188bba0SAl Cooper /* Any UHS-I mode in caps implies SDR12 and SDR25 support. */ 29924188bba0SAl Cooper if (caps[1] & (SDHCI_SUPPORT_SDR104 | SDHCI_SUPPORT_SDR50 | 29934188bba0SAl Cooper SDHCI_SUPPORT_DDR50)) 2994f2119df6SArindam Nath mmc->caps |= MMC_CAP_UHS_SDR12 | MMC_CAP_UHS_SDR25; 2995f2119df6SArindam Nath 2996f2119df6SArindam Nath /* SDR104 supports also implies SDR50 support */ 2997156e14b1SGiuseppe CAVALLARO if (caps[1] & SDHCI_SUPPORT_SDR104) { 2998f2119df6SArindam Nath mmc->caps |= MMC_CAP_UHS_SDR104 | MMC_CAP_UHS_SDR50; 2999156e14b1SGiuseppe CAVALLARO /* SD3.0: SDR104 is supported so (for eMMC) the caps2 3000156e14b1SGiuseppe CAVALLARO * field can be promoted to support HS200. 3001156e14b1SGiuseppe CAVALLARO */ 3002156e14b1SGiuseppe CAVALLARO mmc->caps2 |= MMC_CAP2_HS200; 3003156e14b1SGiuseppe CAVALLARO } else if (caps[1] & SDHCI_SUPPORT_SDR50) 3004f2119df6SArindam Nath mmc->caps |= MMC_CAP_UHS_SDR50; 3005f2119df6SArindam Nath 3006f2119df6SArindam Nath if (caps[1] & SDHCI_SUPPORT_DDR50) 3007f2119df6SArindam Nath mmc->caps |= MMC_CAP_UHS_DDR50; 3008f2119df6SArindam Nath 3009069c9f14SGirish K S /* Does the host need tuning for SDR50? */ 3010b513ea25SArindam Nath if (caps[1] & SDHCI_USE_SDR50_TUNING) 3011b513ea25SArindam Nath host->flags |= SDHCI_SDR50_NEEDS_TUNING; 3012b513ea25SArindam Nath 3013156e14b1SGiuseppe CAVALLARO /* Does the host need tuning for SDR104 / HS200? */ 3014069c9f14SGirish K S if (mmc->caps2 & MMC_CAP2_HS200) 3015156e14b1SGiuseppe CAVALLARO host->flags |= SDHCI_SDR104_NEEDS_TUNING; 3016069c9f14SGirish K S 3017d6d50a15SArindam Nath /* Driver Type(s) (A, C, D) supported by the host */ 3018d6d50a15SArindam Nath if (caps[1] & SDHCI_DRIVER_TYPE_A) 3019d6d50a15SArindam Nath mmc->caps |= MMC_CAP_DRIVER_TYPE_A; 3020d6d50a15SArindam Nath if (caps[1] & SDHCI_DRIVER_TYPE_C) 3021d6d50a15SArindam Nath mmc->caps |= MMC_CAP_DRIVER_TYPE_C; 3022d6d50a15SArindam Nath if (caps[1] & SDHCI_DRIVER_TYPE_D) 3023d6d50a15SArindam Nath mmc->caps |= MMC_CAP_DRIVER_TYPE_D; 3024d6d50a15SArindam Nath 3025cf2b5eeaSArindam Nath /* Initial value for re-tuning timer count */ 3026cf2b5eeaSArindam Nath host->tuning_count = (caps[1] & SDHCI_RETUNING_TIMER_COUNT_MASK) >> 3027cf2b5eeaSArindam Nath SDHCI_RETUNING_TIMER_COUNT_SHIFT; 3028cf2b5eeaSArindam Nath 3029cf2b5eeaSArindam Nath /* 3030cf2b5eeaSArindam Nath * In case Re-tuning Timer is not disabled, the actual value of 3031cf2b5eeaSArindam Nath * re-tuning timer will be 2 ^ (n - 1). 3032cf2b5eeaSArindam Nath */ 3033cf2b5eeaSArindam Nath if (host->tuning_count) 3034cf2b5eeaSArindam Nath host->tuning_count = 1 << (host->tuning_count - 1); 3035cf2b5eeaSArindam Nath 3036cf2b5eeaSArindam Nath /* Re-tuning mode supported by the Host Controller */ 3037cf2b5eeaSArindam Nath host->tuning_mode = (caps[1] & SDHCI_RETUNING_MODE_MASK) >> 3038cf2b5eeaSArindam Nath SDHCI_RETUNING_MODE_SHIFT; 3039cf2b5eeaSArindam Nath 30408f230f45STakashi Iwai ocr_avail = 0; 3041bad37e1aSPhilip Rakity 3042bad37e1aSPhilip Rakity host->vmmc = regulator_get(mmc_dev(mmc), "vmmc"); 3043657d5982SKevin Liu if (IS_ERR_OR_NULL(host->vmmc)) { 3044657d5982SKevin Liu if (PTR_ERR(host->vmmc) < 0) { 3045657d5982SKevin Liu pr_info("%s: no vmmc regulator found\n", 3046657d5982SKevin Liu mmc_hostname(mmc)); 3047bad37e1aSPhilip Rakity host->vmmc = NULL; 3048657d5982SKevin Liu } 30498363c374SKevin Liu } 3050bad37e1aSPhilip Rakity 305168737043SPhilip Rakity #ifdef CONFIG_REGULATOR 3052a4f8f257SMarek Szyprowski /* 3053a4f8f257SMarek Szyprowski * Voltage range check makes sense only if regulator reports 3054a4f8f257SMarek Szyprowski * any voltage value. 3055a4f8f257SMarek Szyprowski */ 3056a4f8f257SMarek Szyprowski if (host->vmmc && regulator_get_voltage(host->vmmc) > 0) { 3057cec2e216SKevin Liu ret = regulator_is_supported_voltage(host->vmmc, 2700000, 3058cec2e216SKevin Liu 3600000); 305968737043SPhilip Rakity if ((ret <= 0) || (!(caps[0] & SDHCI_CAN_VDD_330))) 306068737043SPhilip Rakity caps[0] &= ~SDHCI_CAN_VDD_330; 306168737043SPhilip Rakity if ((ret <= 0) || (!(caps[0] & SDHCI_CAN_VDD_300))) 306268737043SPhilip Rakity caps[0] &= ~SDHCI_CAN_VDD_300; 3063cec2e216SKevin Liu ret = regulator_is_supported_voltage(host->vmmc, 1700000, 3064cec2e216SKevin Liu 1950000); 306568737043SPhilip Rakity if ((ret <= 0) || (!(caps[0] & SDHCI_CAN_VDD_180))) 306668737043SPhilip Rakity caps[0] &= ~SDHCI_CAN_VDD_180; 306768737043SPhilip Rakity } 306868737043SPhilip Rakity #endif /* CONFIG_REGULATOR */ 306968737043SPhilip Rakity 3070f2119df6SArindam Nath /* 3071f2119df6SArindam Nath * According to SD Host Controller spec v3.00, if the Host System 3072f2119df6SArindam Nath * can afford more than 150mA, Host Driver should set XPC to 1. Also 3073f2119df6SArindam Nath * the value is meaningful only if Voltage Support in the Capabilities 3074f2119df6SArindam Nath * register is set. The actual current value is 4 times the register 3075f2119df6SArindam Nath * value. 3076f2119df6SArindam Nath */ 3077f2119df6SArindam Nath max_current_caps = sdhci_readl(host, SDHCI_MAX_CURRENT); 3078bad37e1aSPhilip Rakity if (!max_current_caps && host->vmmc) { 3079bad37e1aSPhilip Rakity u32 curr = regulator_get_current_limit(host->vmmc); 3080bad37e1aSPhilip Rakity if (curr > 0) { 3081bad37e1aSPhilip Rakity 3082bad37e1aSPhilip Rakity /* convert to SDHCI_MAX_CURRENT format */ 3083bad37e1aSPhilip Rakity curr = curr/1000; /* convert to mA */ 3084bad37e1aSPhilip Rakity curr = curr/SDHCI_MAX_CURRENT_MULTIPLIER; 3085bad37e1aSPhilip Rakity 3086bad37e1aSPhilip Rakity curr = min_t(u32, curr, SDHCI_MAX_CURRENT_LIMIT); 3087bad37e1aSPhilip Rakity max_current_caps = 3088bad37e1aSPhilip Rakity (curr << SDHCI_MAX_CURRENT_330_SHIFT) | 3089bad37e1aSPhilip Rakity (curr << SDHCI_MAX_CURRENT_300_SHIFT) | 3090bad37e1aSPhilip Rakity (curr << SDHCI_MAX_CURRENT_180_SHIFT); 3091bad37e1aSPhilip Rakity } 3092bad37e1aSPhilip Rakity } 3093f2119df6SArindam Nath 3094f2119df6SArindam Nath if (caps[0] & SDHCI_CAN_VDD_330) { 30958f230f45STakashi Iwai ocr_avail |= MMC_VDD_32_33 | MMC_VDD_33_34; 3096f2119df6SArindam Nath 309755c4665eSAaron Lu mmc->max_current_330 = ((max_current_caps & 3098f2119df6SArindam Nath SDHCI_MAX_CURRENT_330_MASK) >> 3099f2119df6SArindam Nath SDHCI_MAX_CURRENT_330_SHIFT) * 3100f2119df6SArindam Nath SDHCI_MAX_CURRENT_MULTIPLIER; 3101f2119df6SArindam Nath } 3102f2119df6SArindam Nath if (caps[0] & SDHCI_CAN_VDD_300) { 31038f230f45STakashi Iwai ocr_avail |= MMC_VDD_29_30 | MMC_VDD_30_31; 3104f2119df6SArindam Nath 310555c4665eSAaron Lu mmc->max_current_300 = ((max_current_caps & 3106f2119df6SArindam Nath SDHCI_MAX_CURRENT_300_MASK) >> 3107f2119df6SArindam Nath SDHCI_MAX_CURRENT_300_SHIFT) * 3108f2119df6SArindam Nath SDHCI_MAX_CURRENT_MULTIPLIER; 3109f2119df6SArindam Nath } 3110f2119df6SArindam Nath if (caps[0] & SDHCI_CAN_VDD_180) { 31118f230f45STakashi Iwai ocr_avail |= MMC_VDD_165_195; 31128f230f45STakashi Iwai 311355c4665eSAaron Lu mmc->max_current_180 = ((max_current_caps & 3114f2119df6SArindam Nath SDHCI_MAX_CURRENT_180_MASK) >> 3115f2119df6SArindam Nath SDHCI_MAX_CURRENT_180_SHIFT) * 3116f2119df6SArindam Nath SDHCI_MAX_CURRENT_MULTIPLIER; 3117f2119df6SArindam Nath } 3118f2119df6SArindam Nath 31198f230f45STakashi Iwai mmc->ocr_avail = ocr_avail; 31208f230f45STakashi Iwai mmc->ocr_avail_sdio = ocr_avail; 31218f230f45STakashi Iwai if (host->ocr_avail_sdio) 31228f230f45STakashi Iwai mmc->ocr_avail_sdio &= host->ocr_avail_sdio; 31238f230f45STakashi Iwai mmc->ocr_avail_sd = ocr_avail; 31248f230f45STakashi Iwai if (host->ocr_avail_sd) 31258f230f45STakashi Iwai mmc->ocr_avail_sd &= host->ocr_avail_sd; 31268f230f45STakashi Iwai else /* normal SD controllers don't support 1.8V */ 31278f230f45STakashi Iwai mmc->ocr_avail_sd &= ~MMC_VDD_165_195; 31288f230f45STakashi Iwai mmc->ocr_avail_mmc = ocr_avail; 31298f230f45STakashi Iwai if (host->ocr_avail_mmc) 31308f230f45STakashi Iwai mmc->ocr_avail_mmc &= host->ocr_avail_mmc; 31311c6a0718SPierre Ossman 31321c6a0718SPierre Ossman if (mmc->ocr_avail == 0) { 3133a3c76eb9SGirish K S pr_err("%s: Hardware doesn't report any " 3134b69c9058SPierre Ossman "support voltages.\n", mmc_hostname(mmc)); 3135b8c86fc5SPierre Ossman return -ENODEV; 31361c6a0718SPierre Ossman } 31371c6a0718SPierre Ossman 31381c6a0718SPierre Ossman spin_lock_init(&host->lock); 31391c6a0718SPierre Ossman 31401c6a0718SPierre Ossman /* 31412134a922SPierre Ossman * Maximum number of segments. Depends on if the hardware 31422134a922SPierre Ossman * can do scatter/gather or not. 31431c6a0718SPierre Ossman */ 31442134a922SPierre Ossman if (host->flags & SDHCI_USE_ADMA) 3145a36274e0SMartin K. Petersen mmc->max_segs = 128; 3146a13abc7bSRichard Röjfors else if (host->flags & SDHCI_USE_SDMA) 3147a36274e0SMartin K. Petersen mmc->max_segs = 1; 31482134a922SPierre Ossman else /* PIO */ 3149a36274e0SMartin K. Petersen mmc->max_segs = 128; 31501c6a0718SPierre Ossman 31511c6a0718SPierre Ossman /* 31521c6a0718SPierre Ossman * Maximum number of sectors in one transfer. Limited by DMA boundary 31531c6a0718SPierre Ossman * size (512KiB). 31541c6a0718SPierre Ossman */ 31551c6a0718SPierre Ossman mmc->max_req_size = 524288; 31561c6a0718SPierre Ossman 31571c6a0718SPierre Ossman /* 31581c6a0718SPierre Ossman * Maximum segment size. Could be one segment with the maximum number 31592134a922SPierre Ossman * of bytes. When doing hardware scatter/gather, each entry cannot 31602134a922SPierre Ossman * be larger than 64 KiB though. 31611c6a0718SPierre Ossman */ 316230652aa3SOlof Johansson if (host->flags & SDHCI_USE_ADMA) { 316330652aa3SOlof Johansson if (host->quirks & SDHCI_QUIRK_BROKEN_ADMA_ZEROLEN_DESC) 316430652aa3SOlof Johansson mmc->max_seg_size = 65535; 31652134a922SPierre Ossman else 316630652aa3SOlof Johansson mmc->max_seg_size = 65536; 316730652aa3SOlof Johansson } else { 31681c6a0718SPierre Ossman mmc->max_seg_size = mmc->max_req_size; 316930652aa3SOlof Johansson } 31701c6a0718SPierre Ossman 31711c6a0718SPierre Ossman /* 31721c6a0718SPierre Ossman * Maximum block size. This varies from controller to controller and 31731c6a0718SPierre Ossman * is specified in the capabilities register. 31741c6a0718SPierre Ossman */ 31750633f654SAnton Vorontsov if (host->quirks & SDHCI_QUIRK_FORCE_BLK_SZ_2048) { 31760633f654SAnton Vorontsov mmc->max_blk_size = 2; 31770633f654SAnton Vorontsov } else { 3178f2119df6SArindam Nath mmc->max_blk_size = (caps[0] & SDHCI_MAX_BLOCK_MASK) >> 31790633f654SAnton Vorontsov SDHCI_MAX_BLOCK_SHIFT; 31801c6a0718SPierre Ossman if (mmc->max_blk_size >= 3) { 3181a3c76eb9SGirish K S pr_warning("%s: Invalid maximum block size, " 3182b69c9058SPierre Ossman "assuming 512 bytes\n", mmc_hostname(mmc)); 31830633f654SAnton Vorontsov mmc->max_blk_size = 0; 31840633f654SAnton Vorontsov } 31850633f654SAnton Vorontsov } 31860633f654SAnton Vorontsov 31871c6a0718SPierre Ossman mmc->max_blk_size = 512 << mmc->max_blk_size; 31881c6a0718SPierre Ossman 31891c6a0718SPierre Ossman /* 31901c6a0718SPierre Ossman * Maximum block count. 31911c6a0718SPierre Ossman */ 31921388eefdSBen Dooks mmc->max_blk_count = (host->quirks & SDHCI_QUIRK_NO_MULTIBLOCK) ? 1 : 65535; 31931c6a0718SPierre Ossman 31941c6a0718SPierre Ossman /* 31951c6a0718SPierre Ossman * Init tasklets. 31961c6a0718SPierre Ossman */ 31971c6a0718SPierre Ossman tasklet_init(&host->card_tasklet, 31981c6a0718SPierre Ossman sdhci_tasklet_card, (unsigned long)host); 31991c6a0718SPierre Ossman tasklet_init(&host->finish_tasklet, 32001c6a0718SPierre Ossman sdhci_tasklet_finish, (unsigned long)host); 32011c6a0718SPierre Ossman 32021c6a0718SPierre Ossman setup_timer(&host->timer, sdhci_timeout_timer, (unsigned long)host); 32031c6a0718SPierre Ossman 3204cf2b5eeaSArindam Nath if (host->version >= SDHCI_SPEC_300) { 3205b513ea25SArindam Nath init_waitqueue_head(&host->buf_ready_int); 3206b513ea25SArindam Nath 3207cf2b5eeaSArindam Nath /* Initialize re-tuning timer */ 3208cf2b5eeaSArindam Nath init_timer(&host->tuning_timer); 3209cf2b5eeaSArindam Nath host->tuning_timer.data = (unsigned long)host; 3210cf2b5eeaSArindam Nath host->tuning_timer.function = sdhci_tuning_timer; 3211cf2b5eeaSArindam Nath } 3212cf2b5eeaSArindam Nath 32131c6a0718SPierre Ossman ret = request_irq(host->irq, sdhci_irq, IRQF_SHARED, 3214b69c9058SPierre Ossman mmc_hostname(mmc), host); 32150fc81ee3SMark Brown if (ret) { 32160fc81ee3SMark Brown pr_err("%s: Failed to request IRQ %d: %d\n", 32170fc81ee3SMark Brown mmc_hostname(mmc), host->irq, ret); 32181c6a0718SPierre Ossman goto untasklet; 32190fc81ee3SMark Brown } 32201c6a0718SPierre Ossman 32212f4cbb3dSNicolas Pitre sdhci_init(host, 0); 32221c6a0718SPierre Ossman 32231c6a0718SPierre Ossman #ifdef CONFIG_MMC_DEBUG 32241c6a0718SPierre Ossman sdhci_dumpregs(host); 32251c6a0718SPierre Ossman #endif 32261c6a0718SPierre Ossman 3227f9134319SPierre Ossman #ifdef SDHCI_USE_LEDS_CLASS 32285dbace0cSHelmut Schaa snprintf(host->led_name, sizeof(host->led_name), 32295dbace0cSHelmut Schaa "%s::", mmc_hostname(mmc)); 32305dbace0cSHelmut Schaa host->led.name = host->led_name; 32312f730fecSPierre Ossman host->led.brightness = LED_OFF; 32322f730fecSPierre Ossman host->led.default_trigger = mmc_hostname(mmc); 32332f730fecSPierre Ossman host->led.brightness_set = sdhci_led_control; 32342f730fecSPierre Ossman 3235b8c86fc5SPierre Ossman ret = led_classdev_register(mmc_dev(mmc), &host->led); 32360fc81ee3SMark Brown if (ret) { 32370fc81ee3SMark Brown pr_err("%s: Failed to register LED device: %d\n", 32380fc81ee3SMark Brown mmc_hostname(mmc), ret); 32392f730fecSPierre Ossman goto reset; 32400fc81ee3SMark Brown } 32412f730fecSPierre Ossman #endif 32422f730fecSPierre Ossman 32431c6a0718SPierre Ossman mmiowb(); 32441c6a0718SPierre Ossman 32451c6a0718SPierre Ossman mmc_add_host(mmc); 32461c6a0718SPierre Ossman 3247a3c76eb9SGirish K S pr_info("%s: SDHCI controller on %s [%s] using %s\n", 3248d1b26863SKay Sievers mmc_hostname(mmc), host->hw_name, dev_name(mmc_dev(mmc)), 3249a13abc7bSRichard Röjfors (host->flags & SDHCI_USE_ADMA) ? "ADMA" : 3250a13abc7bSRichard Röjfors (host->flags & SDHCI_USE_SDMA) ? "DMA" : "PIO"); 32511c6a0718SPierre Ossman 32527260cf5eSAnton Vorontsov sdhci_enable_card_detection(host); 32537260cf5eSAnton Vorontsov 32541c6a0718SPierre Ossman return 0; 32551c6a0718SPierre Ossman 3256f9134319SPierre Ossman #ifdef SDHCI_USE_LEDS_CLASS 32572f730fecSPierre Ossman reset: 32582f730fecSPierre Ossman sdhci_reset(host, SDHCI_RESET_ALL); 3259b0a8deceSKevin Liu sdhci_mask_irqs(host, SDHCI_INT_ALL_MASK); 32602f730fecSPierre Ossman free_irq(host->irq, host); 32612f730fecSPierre Ossman #endif 32621c6a0718SPierre Ossman untasklet: 32631c6a0718SPierre Ossman tasklet_kill(&host->card_tasklet); 32641c6a0718SPierre Ossman tasklet_kill(&host->finish_tasklet); 32651c6a0718SPierre Ossman 32661c6a0718SPierre Ossman return ret; 32671c6a0718SPierre Ossman } 32681c6a0718SPierre Ossman 3269b8c86fc5SPierre Ossman EXPORT_SYMBOL_GPL(sdhci_add_host); 3270b8c86fc5SPierre Ossman 32711e72859eSPierre Ossman void sdhci_remove_host(struct sdhci_host *host, int dead) 32721c6a0718SPierre Ossman { 32731e72859eSPierre Ossman unsigned long flags; 32741e72859eSPierre Ossman 32751e72859eSPierre Ossman if (dead) { 32761e72859eSPierre Ossman spin_lock_irqsave(&host->lock, flags); 32771e72859eSPierre Ossman 32781e72859eSPierre Ossman host->flags |= SDHCI_DEVICE_DEAD; 32791e72859eSPierre Ossman 32801e72859eSPierre Ossman if (host->mrq) { 3281a3c76eb9SGirish K S pr_err("%s: Controller removed during " 32821e72859eSPierre Ossman " transfer!\n", mmc_hostname(host->mmc)); 32831e72859eSPierre Ossman 32841e72859eSPierre Ossman host->mrq->cmd->error = -ENOMEDIUM; 32851e72859eSPierre Ossman tasklet_schedule(&host->finish_tasklet); 32861e72859eSPierre Ossman } 32871e72859eSPierre Ossman 32881e72859eSPierre Ossman spin_unlock_irqrestore(&host->lock, flags); 32891e72859eSPierre Ossman } 32901e72859eSPierre Ossman 32917260cf5eSAnton Vorontsov sdhci_disable_card_detection(host); 32927260cf5eSAnton Vorontsov 3293b8c86fc5SPierre Ossman mmc_remove_host(host->mmc); 32941c6a0718SPierre Ossman 3295f9134319SPierre Ossman #ifdef SDHCI_USE_LEDS_CLASS 32962f730fecSPierre Ossman led_classdev_unregister(&host->led); 32972f730fecSPierre Ossman #endif 32982f730fecSPierre Ossman 32991e72859eSPierre Ossman if (!dead) 33001c6a0718SPierre Ossman sdhci_reset(host, SDHCI_RESET_ALL); 33011c6a0718SPierre Ossman 3302b0a8deceSKevin Liu sdhci_mask_irqs(host, SDHCI_INT_ALL_MASK); 33031c6a0718SPierre Ossman free_irq(host->irq, host); 33041c6a0718SPierre Ossman 33051c6a0718SPierre Ossman del_timer_sync(&host->timer); 33061c6a0718SPierre Ossman 33071c6a0718SPierre Ossman tasklet_kill(&host->card_tasklet); 33081c6a0718SPierre Ossman tasklet_kill(&host->finish_tasklet); 33092134a922SPierre Ossman 331077dcb3f4SPhilip Rakity if (host->vmmc) { 331177dcb3f4SPhilip Rakity regulator_disable(host->vmmc); 33129bea3c85SMarek Szyprowski regulator_put(host->vmmc); 331377dcb3f4SPhilip Rakity } 33149bea3c85SMarek Szyprowski 33156231f3deSPhilip Rakity if (host->vqmmc) { 33166231f3deSPhilip Rakity regulator_disable(host->vqmmc); 33176231f3deSPhilip Rakity regulator_put(host->vqmmc); 33186231f3deSPhilip Rakity } 33196231f3deSPhilip Rakity 33202134a922SPierre Ossman kfree(host->adma_desc); 33212134a922SPierre Ossman kfree(host->align_buffer); 33222134a922SPierre Ossman 33232134a922SPierre Ossman host->adma_desc = NULL; 33242134a922SPierre Ossman host->align_buffer = NULL; 33251c6a0718SPierre Ossman } 33261c6a0718SPierre Ossman 3327b8c86fc5SPierre Ossman EXPORT_SYMBOL_GPL(sdhci_remove_host); 3328b8c86fc5SPierre Ossman 3329b8c86fc5SPierre Ossman void sdhci_free_host(struct sdhci_host *host) 33301c6a0718SPierre Ossman { 3331b8c86fc5SPierre Ossman mmc_free_host(host->mmc); 33321c6a0718SPierre Ossman } 33331c6a0718SPierre Ossman 3334b8c86fc5SPierre Ossman EXPORT_SYMBOL_GPL(sdhci_free_host); 33351c6a0718SPierre Ossman 33361c6a0718SPierre Ossman /*****************************************************************************\ 33371c6a0718SPierre Ossman * * 33381c6a0718SPierre Ossman * Driver init/exit * 33391c6a0718SPierre Ossman * * 33401c6a0718SPierre Ossman \*****************************************************************************/ 33411c6a0718SPierre Ossman 33421c6a0718SPierre Ossman static int __init sdhci_drv_init(void) 33431c6a0718SPierre Ossman { 3344a3c76eb9SGirish K S pr_info(DRIVER_NAME 33451c6a0718SPierre Ossman ": Secure Digital Host Controller Interface driver\n"); 3346a3c76eb9SGirish K S pr_info(DRIVER_NAME ": Copyright(c) Pierre Ossman\n"); 33471c6a0718SPierre Ossman 3348b8c86fc5SPierre Ossman return 0; 33491c6a0718SPierre Ossman } 33501c6a0718SPierre Ossman 33511c6a0718SPierre Ossman static void __exit sdhci_drv_exit(void) 33521c6a0718SPierre Ossman { 33531c6a0718SPierre Ossman } 33541c6a0718SPierre Ossman 33551c6a0718SPierre Ossman module_init(sdhci_drv_init); 33561c6a0718SPierre Ossman module_exit(sdhci_drv_exit); 33571c6a0718SPierre Ossman 33581c6a0718SPierre Ossman module_param(debug_quirks, uint, 0444); 335966fd8ad5SAdrian Hunter module_param(debug_quirks2, uint, 0444); 33601c6a0718SPierre Ossman 336132710e8fSPierre Ossman MODULE_AUTHOR("Pierre Ossman <pierre@ossman.eu>"); 3362b8c86fc5SPierre Ossman MODULE_DESCRIPTION("Secure Digital Host Controller Interface core driver"); 33631c6a0718SPierre Ossman MODULE_LICENSE("GPL"); 33641c6a0718SPierre Ossman 33651c6a0718SPierre Ossman MODULE_PARM_DESC(debug_quirks, "Force certain quirks."); 336666fd8ad5SAdrian Hunter MODULE_PARM_DESC(debug_quirks2, "Force certain other quirks."); 3367