1 /* 2 * Copyright (C) 2010 Google, Inc. 3 * 4 * This software is licensed under the terms of the GNU General Public 5 * License version 2, as published by the Free Software Foundation, and 6 * may be copied, distributed, and modified under those terms. 7 * 8 * This program is distributed in the hope that it will be useful, 9 * but WITHOUT ANY WARRANTY; without even the implied warranty of 10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 11 * GNU General Public License for more details. 12 * 13 */ 14 15 #include <linux/err.h> 16 #include <linux/init.h> 17 #include <linux/platform_device.h> 18 #include <linux/clk.h> 19 #include <linux/io.h> 20 #include <linux/gpio.h> 21 #include <linux/mmc/card.h> 22 #include <linux/mmc/host.h> 23 24 #include <asm/gpio.h> 25 26 #include <mach/gpio-tegra.h> 27 #include <mach/sdhci.h> 28 29 #include "sdhci-pltfm.h" 30 31 static u32 tegra_sdhci_readl(struct sdhci_host *host, int reg) 32 { 33 u32 val; 34 35 if (unlikely(reg == SDHCI_PRESENT_STATE)) { 36 /* Use wp_gpio here instead? */ 37 val = readl(host->ioaddr + reg); 38 return val | SDHCI_WRITE_PROTECT; 39 } 40 41 return readl(host->ioaddr + reg); 42 } 43 44 static u16 tegra_sdhci_readw(struct sdhci_host *host, int reg) 45 { 46 if (unlikely(reg == SDHCI_HOST_VERSION)) { 47 /* Erratum: Version register is invalid in HW. */ 48 return SDHCI_SPEC_200; 49 } 50 51 return readw(host->ioaddr + reg); 52 } 53 54 static void tegra_sdhci_writel(struct sdhci_host *host, u32 val, int reg) 55 { 56 /* Seems like we're getting spurious timeout and crc errors, so 57 * disable signalling of them. In case of real errors software 58 * timers should take care of eventually detecting them. 59 */ 60 if (unlikely(reg == SDHCI_SIGNAL_ENABLE)) 61 val &= ~(SDHCI_INT_TIMEOUT|SDHCI_INT_CRC); 62 63 writel(val, host->ioaddr + reg); 64 65 if (unlikely(reg == SDHCI_INT_ENABLE)) { 66 /* Erratum: Must enable block gap interrupt detection */ 67 u8 gap_ctrl = readb(host->ioaddr + SDHCI_BLOCK_GAP_CONTROL); 68 if (val & SDHCI_INT_CARD_INT) 69 gap_ctrl |= 0x8; 70 else 71 gap_ctrl &= ~0x8; 72 writeb(gap_ctrl, host->ioaddr + SDHCI_BLOCK_GAP_CONTROL); 73 } 74 } 75 76 static unsigned int tegra_sdhci_get_ro(struct sdhci_host *sdhci) 77 { 78 struct platform_device *pdev = to_platform_device(mmc_dev(sdhci->mmc)); 79 struct tegra_sdhci_platform_data *plat; 80 81 plat = pdev->dev.platform_data; 82 83 if (!gpio_is_valid(plat->wp_gpio)) 84 return -1; 85 86 return gpio_get_value(plat->wp_gpio); 87 } 88 89 static irqreturn_t carddetect_irq(int irq, void *data) 90 { 91 struct sdhci_host *sdhost = (struct sdhci_host *)data; 92 93 tasklet_schedule(&sdhost->card_tasklet); 94 return IRQ_HANDLED; 95 }; 96 97 static int tegra_sdhci_8bit(struct sdhci_host *host, int bus_width) 98 { 99 struct platform_device *pdev = to_platform_device(mmc_dev(host->mmc)); 100 struct tegra_sdhci_platform_data *plat; 101 u32 ctrl; 102 103 plat = pdev->dev.platform_data; 104 105 ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL); 106 if (plat->is_8bit && bus_width == MMC_BUS_WIDTH_8) { 107 ctrl &= ~SDHCI_CTRL_4BITBUS; 108 ctrl |= SDHCI_CTRL_8BITBUS; 109 } else { 110 ctrl &= ~SDHCI_CTRL_8BITBUS; 111 if (bus_width == MMC_BUS_WIDTH_4) 112 ctrl |= SDHCI_CTRL_4BITBUS; 113 else 114 ctrl &= ~SDHCI_CTRL_4BITBUS; 115 } 116 sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL); 117 return 0; 118 } 119 120 static struct sdhci_ops tegra_sdhci_ops = { 121 .get_ro = tegra_sdhci_get_ro, 122 .read_l = tegra_sdhci_readl, 123 .read_w = tegra_sdhci_readw, 124 .write_l = tegra_sdhci_writel, 125 .platform_8bit_width = tegra_sdhci_8bit, 126 }; 127 128 static struct sdhci_pltfm_data sdhci_tegra_pdata = { 129 .quirks = SDHCI_QUIRK_BROKEN_TIMEOUT_VAL | 130 SDHCI_QUIRK_SINGLE_POWER_WRITE | 131 SDHCI_QUIRK_NO_HISPD_BIT | 132 SDHCI_QUIRK_BROKEN_ADMA_ZEROLEN_DESC, 133 .ops = &tegra_sdhci_ops, 134 }; 135 136 static int __devinit sdhci_tegra_probe(struct platform_device *pdev) 137 { 138 struct sdhci_pltfm_host *pltfm_host; 139 struct tegra_sdhci_platform_data *plat; 140 struct sdhci_host *host; 141 struct clk *clk; 142 int rc; 143 144 host = sdhci_pltfm_init(pdev, &sdhci_tegra_pdata); 145 if (IS_ERR(host)) 146 return PTR_ERR(host); 147 148 pltfm_host = sdhci_priv(host); 149 150 plat = pdev->dev.platform_data; 151 152 if (plat == NULL) { 153 dev_err(mmc_dev(host->mmc), "missing platform data\n"); 154 rc = -ENXIO; 155 goto err_no_plat; 156 } 157 158 if (gpio_is_valid(plat->power_gpio)) { 159 rc = gpio_request(plat->power_gpio, "sdhci_power"); 160 if (rc) { 161 dev_err(mmc_dev(host->mmc), 162 "failed to allocate power gpio\n"); 163 goto err_power_req; 164 } 165 tegra_gpio_enable(plat->power_gpio); 166 gpio_direction_output(plat->power_gpio, 1); 167 } 168 169 if (gpio_is_valid(plat->cd_gpio)) { 170 rc = gpio_request(plat->cd_gpio, "sdhci_cd"); 171 if (rc) { 172 dev_err(mmc_dev(host->mmc), 173 "failed to allocate cd gpio\n"); 174 goto err_cd_req; 175 } 176 tegra_gpio_enable(plat->cd_gpio); 177 gpio_direction_input(plat->cd_gpio); 178 179 rc = request_irq(gpio_to_irq(plat->cd_gpio), carddetect_irq, 180 IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING, 181 mmc_hostname(host->mmc), host); 182 183 if (rc) { 184 dev_err(mmc_dev(host->mmc), "request irq error\n"); 185 goto err_cd_irq_req; 186 } 187 188 } 189 190 if (gpio_is_valid(plat->wp_gpio)) { 191 rc = gpio_request(plat->wp_gpio, "sdhci_wp"); 192 if (rc) { 193 dev_err(mmc_dev(host->mmc), 194 "failed to allocate wp gpio\n"); 195 goto err_wp_req; 196 } 197 tegra_gpio_enable(plat->wp_gpio); 198 gpio_direction_input(plat->wp_gpio); 199 } 200 201 clk = clk_get(mmc_dev(host->mmc), NULL); 202 if (IS_ERR(clk)) { 203 dev_err(mmc_dev(host->mmc), "clk err\n"); 204 rc = PTR_ERR(clk); 205 goto err_clk_get; 206 } 207 clk_enable(clk); 208 pltfm_host->clk = clk; 209 210 host->mmc->pm_caps = plat->pm_flags; 211 212 if (plat->is_8bit) 213 host->mmc->caps |= MMC_CAP_8_BIT_DATA; 214 215 rc = sdhci_add_host(host); 216 if (rc) 217 goto err_add_host; 218 219 return 0; 220 221 err_add_host: 222 clk_disable(pltfm_host->clk); 223 clk_put(pltfm_host->clk); 224 err_clk_get: 225 if (gpio_is_valid(plat->wp_gpio)) { 226 tegra_gpio_disable(plat->wp_gpio); 227 gpio_free(plat->wp_gpio); 228 } 229 err_wp_req: 230 if (gpio_is_valid(plat->cd_gpio)) 231 free_irq(gpio_to_irq(plat->cd_gpio), host); 232 err_cd_irq_req: 233 if (gpio_is_valid(plat->cd_gpio)) { 234 tegra_gpio_disable(plat->cd_gpio); 235 gpio_free(plat->cd_gpio); 236 } 237 err_cd_req: 238 if (gpio_is_valid(plat->power_gpio)) { 239 tegra_gpio_disable(plat->power_gpio); 240 gpio_free(plat->power_gpio); 241 } 242 err_power_req: 243 err_no_plat: 244 sdhci_pltfm_free(pdev); 245 return rc; 246 } 247 248 static int __devexit sdhci_tegra_remove(struct platform_device *pdev) 249 { 250 struct sdhci_host *host = platform_get_drvdata(pdev); 251 struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); 252 struct tegra_sdhci_platform_data *plat; 253 int dead = (readl(host->ioaddr + SDHCI_INT_STATUS) == 0xffffffff); 254 255 sdhci_remove_host(host, dead); 256 257 plat = pdev->dev.platform_data; 258 259 if (gpio_is_valid(plat->wp_gpio)) { 260 tegra_gpio_disable(plat->wp_gpio); 261 gpio_free(plat->wp_gpio); 262 } 263 264 if (gpio_is_valid(plat->cd_gpio)) { 265 free_irq(gpio_to_irq(plat->cd_gpio), host); 266 tegra_gpio_disable(plat->cd_gpio); 267 gpio_free(plat->cd_gpio); 268 } 269 270 if (gpio_is_valid(plat->power_gpio)) { 271 tegra_gpio_disable(plat->power_gpio); 272 gpio_free(plat->power_gpio); 273 } 274 275 clk_disable(pltfm_host->clk); 276 clk_put(pltfm_host->clk); 277 278 sdhci_pltfm_free(pdev); 279 280 return 0; 281 } 282 283 static struct platform_driver sdhci_tegra_driver = { 284 .driver = { 285 .name = "sdhci-tegra", 286 .owner = THIS_MODULE, 287 }, 288 .probe = sdhci_tegra_probe, 289 .remove = __devexit_p(sdhci_tegra_remove), 290 #ifdef CONFIG_PM 291 .suspend = sdhci_pltfm_suspend, 292 .resume = sdhci_pltfm_resume, 293 #endif 294 }; 295 296 static int __init sdhci_tegra_init(void) 297 { 298 return platform_driver_register(&sdhci_tegra_driver); 299 } 300 module_init(sdhci_tegra_init); 301 302 static void __exit sdhci_tegra_exit(void) 303 { 304 platform_driver_unregister(&sdhci_tegra_driver); 305 } 306 module_exit(sdhci_tegra_exit); 307 308 MODULE_DESCRIPTION("SDHCI driver for Tegra"); 309 MODULE_AUTHOR(" Google, Inc."); 310 MODULE_LICENSE("GPL v2"); 311