1 /* 2 * Copyright (C) 2010 Google, Inc. 3 * 4 * This software is licensed under the terms of the GNU General Public 5 * License version 2, as published by the Free Software Foundation, and 6 * may be copied, distributed, and modified under those terms. 7 * 8 * This program is distributed in the hope that it will be useful, 9 * but WITHOUT ANY WARRANTY; without even the implied warranty of 10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 11 * GNU General Public License for more details. 12 * 13 */ 14 15 #include <linux/err.h> 16 #include <linux/module.h> 17 #include <linux/init.h> 18 #include <linux/platform_device.h> 19 #include <linux/clk.h> 20 #include <linux/io.h> 21 #include <linux/of.h> 22 #include <linux/of_device.h> 23 #include <linux/of_gpio.h> 24 #include <linux/gpio.h> 25 #include <linux/mmc/card.h> 26 #include <linux/mmc/host.h> 27 28 #include <asm/gpio.h> 29 30 #include "sdhci-pltfm.h" 31 32 /* Tegra SDHOST controller vendor register definitions */ 33 #define SDHCI_TEGRA_VENDOR_MISC_CTRL 0x120 34 #define SDHCI_MISC_CTRL_ENABLE_SDHCI_SPEC_300 0x20 35 36 #define NVQUIRK_FORCE_SDHCI_SPEC_200 BIT(0) 37 #define NVQUIRK_ENABLE_BLOCK_GAP_DET BIT(1) 38 #define NVQUIRK_ENABLE_SDHCI_SPEC_300 BIT(2) 39 40 struct sdhci_tegra_soc_data { 41 struct sdhci_pltfm_data *pdata; 42 u32 nvquirks; 43 }; 44 45 struct sdhci_tegra { 46 const struct sdhci_tegra_soc_data *soc_data; 47 int cd_gpio; 48 int wp_gpio; 49 int power_gpio; 50 int is_8bit; 51 }; 52 53 static u32 tegra_sdhci_readl(struct sdhci_host *host, int reg) 54 { 55 u32 val; 56 57 if (unlikely(reg == SDHCI_PRESENT_STATE)) { 58 /* Use wp_gpio here instead? */ 59 val = readl(host->ioaddr + reg); 60 return val | SDHCI_WRITE_PROTECT; 61 } 62 63 return readl(host->ioaddr + reg); 64 } 65 66 static u16 tegra_sdhci_readw(struct sdhci_host *host, int reg) 67 { 68 struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); 69 struct sdhci_tegra *tegra_host = pltfm_host->priv; 70 const struct sdhci_tegra_soc_data *soc_data = tegra_host->soc_data; 71 72 if (unlikely((soc_data->nvquirks & NVQUIRK_FORCE_SDHCI_SPEC_200) && 73 (reg == SDHCI_HOST_VERSION))) { 74 /* Erratum: Version register is invalid in HW. */ 75 return SDHCI_SPEC_200; 76 } 77 78 return readw(host->ioaddr + reg); 79 } 80 81 static void tegra_sdhci_writel(struct sdhci_host *host, u32 val, int reg) 82 { 83 struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); 84 struct sdhci_tegra *tegra_host = pltfm_host->priv; 85 const struct sdhci_tegra_soc_data *soc_data = tegra_host->soc_data; 86 87 /* Seems like we're getting spurious timeout and crc errors, so 88 * disable signalling of them. In case of real errors software 89 * timers should take care of eventually detecting them. 90 */ 91 if (unlikely(reg == SDHCI_SIGNAL_ENABLE)) 92 val &= ~(SDHCI_INT_TIMEOUT|SDHCI_INT_CRC); 93 94 writel(val, host->ioaddr + reg); 95 96 if (unlikely((soc_data->nvquirks & NVQUIRK_ENABLE_BLOCK_GAP_DET) && 97 (reg == SDHCI_INT_ENABLE))) { 98 /* Erratum: Must enable block gap interrupt detection */ 99 u8 gap_ctrl = readb(host->ioaddr + SDHCI_BLOCK_GAP_CONTROL); 100 if (val & SDHCI_INT_CARD_INT) 101 gap_ctrl |= 0x8; 102 else 103 gap_ctrl &= ~0x8; 104 writeb(gap_ctrl, host->ioaddr + SDHCI_BLOCK_GAP_CONTROL); 105 } 106 } 107 108 static unsigned int tegra_sdhci_get_ro(struct sdhci_host *host) 109 { 110 struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); 111 struct sdhci_tegra *tegra_host = pltfm_host->priv; 112 113 if (!gpio_is_valid(tegra_host->wp_gpio)) 114 return -1; 115 116 return gpio_get_value(tegra_host->wp_gpio); 117 } 118 119 static irqreturn_t carddetect_irq(int irq, void *data) 120 { 121 struct sdhci_host *sdhost = (struct sdhci_host *)data; 122 123 tasklet_schedule(&sdhost->card_tasklet); 124 return IRQ_HANDLED; 125 }; 126 127 static void tegra_sdhci_reset_exit(struct sdhci_host *host, u8 mask) 128 { 129 struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); 130 struct sdhci_tegra *tegra_host = pltfm_host->priv; 131 const struct sdhci_tegra_soc_data *soc_data = tegra_host->soc_data; 132 133 if (!(mask & SDHCI_RESET_ALL)) 134 return; 135 136 /* Erratum: Enable SDHCI spec v3.00 support */ 137 if (soc_data->nvquirks & NVQUIRK_ENABLE_SDHCI_SPEC_300) { 138 u32 misc_ctrl; 139 140 misc_ctrl = sdhci_readb(host, SDHCI_TEGRA_VENDOR_MISC_CTRL); 141 misc_ctrl |= SDHCI_MISC_CTRL_ENABLE_SDHCI_SPEC_300; 142 sdhci_writeb(host, misc_ctrl, SDHCI_TEGRA_VENDOR_MISC_CTRL); 143 } 144 } 145 146 static int tegra_sdhci_buswidth(struct sdhci_host *host, int bus_width) 147 { 148 struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); 149 struct sdhci_tegra *tegra_host = pltfm_host->priv; 150 u32 ctrl; 151 152 ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL); 153 if (tegra_host->is_8bit && bus_width == MMC_BUS_WIDTH_8) { 154 ctrl &= ~SDHCI_CTRL_4BITBUS; 155 ctrl |= SDHCI_CTRL_8BITBUS; 156 } else { 157 ctrl &= ~SDHCI_CTRL_8BITBUS; 158 if (bus_width == MMC_BUS_WIDTH_4) 159 ctrl |= SDHCI_CTRL_4BITBUS; 160 else 161 ctrl &= ~SDHCI_CTRL_4BITBUS; 162 } 163 sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL); 164 return 0; 165 } 166 167 static struct sdhci_ops tegra_sdhci_ops = { 168 .get_ro = tegra_sdhci_get_ro, 169 .read_l = tegra_sdhci_readl, 170 .read_w = tegra_sdhci_readw, 171 .write_l = tegra_sdhci_writel, 172 .platform_bus_width = tegra_sdhci_buswidth, 173 .platform_reset_exit = tegra_sdhci_reset_exit, 174 }; 175 176 #ifdef CONFIG_ARCH_TEGRA_2x_SOC 177 static struct sdhci_pltfm_data sdhci_tegra20_pdata = { 178 .quirks = SDHCI_QUIRK_BROKEN_TIMEOUT_VAL | 179 SDHCI_QUIRK_SINGLE_POWER_WRITE | 180 SDHCI_QUIRK_NO_HISPD_BIT | 181 SDHCI_QUIRK_BROKEN_ADMA_ZEROLEN_DESC, 182 .ops = &tegra_sdhci_ops, 183 }; 184 185 static struct sdhci_tegra_soc_data soc_data_tegra20 = { 186 .pdata = &sdhci_tegra20_pdata, 187 .nvquirks = NVQUIRK_FORCE_SDHCI_SPEC_200 | 188 NVQUIRK_ENABLE_BLOCK_GAP_DET, 189 }; 190 #endif 191 192 #ifdef CONFIG_ARCH_TEGRA_3x_SOC 193 static struct sdhci_pltfm_data sdhci_tegra30_pdata = { 194 .quirks = SDHCI_QUIRK_BROKEN_TIMEOUT_VAL | 195 SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK | 196 SDHCI_QUIRK_SINGLE_POWER_WRITE | 197 SDHCI_QUIRK_NO_HISPD_BIT | 198 SDHCI_QUIRK_BROKEN_ADMA_ZEROLEN_DESC, 199 .ops = &tegra_sdhci_ops, 200 }; 201 202 static struct sdhci_tegra_soc_data soc_data_tegra30 = { 203 .pdata = &sdhci_tegra30_pdata, 204 .nvquirks = NVQUIRK_ENABLE_SDHCI_SPEC_300, 205 }; 206 #endif 207 208 static const struct of_device_id sdhci_tegra_dt_match[] = { 209 #ifdef CONFIG_ARCH_TEGRA_3x_SOC 210 { .compatible = "nvidia,tegra30-sdhci", .data = &soc_data_tegra30 }, 211 #endif 212 #ifdef CONFIG_ARCH_TEGRA_2x_SOC 213 { .compatible = "nvidia,tegra20-sdhci", .data = &soc_data_tegra20 }, 214 #endif 215 {} 216 }; 217 MODULE_DEVICE_TABLE(of, sdhci_dt_ids); 218 219 static void sdhci_tegra_parse_dt(struct device *dev, 220 struct sdhci_tegra *tegra_host) 221 { 222 struct device_node *np = dev->of_node; 223 u32 bus_width; 224 225 tegra_host->cd_gpio = of_get_named_gpio(np, "cd-gpios", 0); 226 tegra_host->wp_gpio = of_get_named_gpio(np, "wp-gpios", 0); 227 tegra_host->power_gpio = of_get_named_gpio(np, "power-gpios", 0); 228 229 if (of_property_read_u32(np, "bus-width", &bus_width) == 0 && 230 bus_width == 8) 231 tegra_host->is_8bit = 1; 232 } 233 234 static int sdhci_tegra_probe(struct platform_device *pdev) 235 { 236 const struct of_device_id *match; 237 const struct sdhci_tegra_soc_data *soc_data; 238 struct sdhci_host *host; 239 struct sdhci_pltfm_host *pltfm_host; 240 struct sdhci_tegra *tegra_host; 241 struct clk *clk; 242 int rc; 243 244 match = of_match_device(sdhci_tegra_dt_match, &pdev->dev); 245 if (!match) 246 return -EINVAL; 247 soc_data = match->data; 248 249 host = sdhci_pltfm_init(pdev, soc_data->pdata); 250 if (IS_ERR(host)) 251 return PTR_ERR(host); 252 pltfm_host = sdhci_priv(host); 253 254 tegra_host = devm_kzalloc(&pdev->dev, sizeof(*tegra_host), GFP_KERNEL); 255 if (!tegra_host) { 256 dev_err(mmc_dev(host->mmc), "failed to allocate tegra_host\n"); 257 rc = -ENOMEM; 258 goto err_alloc_tegra_host; 259 } 260 tegra_host->soc_data = soc_data; 261 pltfm_host->priv = tegra_host; 262 263 sdhci_tegra_parse_dt(&pdev->dev, tegra_host); 264 265 if (gpio_is_valid(tegra_host->power_gpio)) { 266 rc = gpio_request(tegra_host->power_gpio, "sdhci_power"); 267 if (rc) { 268 dev_err(mmc_dev(host->mmc), 269 "failed to allocate power gpio\n"); 270 goto err_power_req; 271 } 272 gpio_direction_output(tegra_host->power_gpio, 1); 273 } 274 275 if (gpio_is_valid(tegra_host->cd_gpio)) { 276 rc = gpio_request(tegra_host->cd_gpio, "sdhci_cd"); 277 if (rc) { 278 dev_err(mmc_dev(host->mmc), 279 "failed to allocate cd gpio\n"); 280 goto err_cd_req; 281 } 282 gpio_direction_input(tegra_host->cd_gpio); 283 284 rc = request_irq(gpio_to_irq(tegra_host->cd_gpio), 285 carddetect_irq, 286 IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING, 287 mmc_hostname(host->mmc), host); 288 289 if (rc) { 290 dev_err(mmc_dev(host->mmc), "request irq error\n"); 291 goto err_cd_irq_req; 292 } 293 294 } 295 296 if (gpio_is_valid(tegra_host->wp_gpio)) { 297 rc = gpio_request(tegra_host->wp_gpio, "sdhci_wp"); 298 if (rc) { 299 dev_err(mmc_dev(host->mmc), 300 "failed to allocate wp gpio\n"); 301 goto err_wp_req; 302 } 303 gpio_direction_input(tegra_host->wp_gpio); 304 } 305 306 clk = clk_get(mmc_dev(host->mmc), NULL); 307 if (IS_ERR(clk)) { 308 dev_err(mmc_dev(host->mmc), "clk err\n"); 309 rc = PTR_ERR(clk); 310 goto err_clk_get; 311 } 312 clk_prepare_enable(clk); 313 pltfm_host->clk = clk; 314 315 if (tegra_host->is_8bit) 316 host->mmc->caps |= MMC_CAP_8_BIT_DATA; 317 318 rc = sdhci_add_host(host); 319 if (rc) 320 goto err_add_host; 321 322 return 0; 323 324 err_add_host: 325 clk_disable_unprepare(pltfm_host->clk); 326 clk_put(pltfm_host->clk); 327 err_clk_get: 328 if (gpio_is_valid(tegra_host->wp_gpio)) 329 gpio_free(tegra_host->wp_gpio); 330 err_wp_req: 331 if (gpio_is_valid(tegra_host->cd_gpio)) 332 free_irq(gpio_to_irq(tegra_host->cd_gpio), host); 333 err_cd_irq_req: 334 if (gpio_is_valid(tegra_host->cd_gpio)) 335 gpio_free(tegra_host->cd_gpio); 336 err_cd_req: 337 if (gpio_is_valid(tegra_host->power_gpio)) 338 gpio_free(tegra_host->power_gpio); 339 err_power_req: 340 err_alloc_tegra_host: 341 sdhci_pltfm_free(pdev); 342 return rc; 343 } 344 345 static int sdhci_tegra_remove(struct platform_device *pdev) 346 { 347 struct sdhci_host *host = platform_get_drvdata(pdev); 348 struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); 349 struct sdhci_tegra *tegra_host = pltfm_host->priv; 350 int dead = (readl(host->ioaddr + SDHCI_INT_STATUS) == 0xffffffff); 351 352 sdhci_remove_host(host, dead); 353 354 if (gpio_is_valid(tegra_host->wp_gpio)) 355 gpio_free(tegra_host->wp_gpio); 356 357 if (gpio_is_valid(tegra_host->cd_gpio)) { 358 free_irq(gpio_to_irq(tegra_host->cd_gpio), host); 359 gpio_free(tegra_host->cd_gpio); 360 } 361 362 if (gpio_is_valid(tegra_host->power_gpio)) 363 gpio_free(tegra_host->power_gpio); 364 365 clk_disable_unprepare(pltfm_host->clk); 366 clk_put(pltfm_host->clk); 367 368 sdhci_pltfm_free(pdev); 369 370 return 0; 371 } 372 373 static struct platform_driver sdhci_tegra_driver = { 374 .driver = { 375 .name = "sdhci-tegra", 376 .owner = THIS_MODULE, 377 .of_match_table = sdhci_tegra_dt_match, 378 .pm = SDHCI_PLTFM_PMOPS, 379 }, 380 .probe = sdhci_tegra_probe, 381 .remove = sdhci_tegra_remove, 382 }; 383 384 module_platform_driver(sdhci_tegra_driver); 385 386 MODULE_DESCRIPTION("SDHCI driver for Tegra"); 387 MODULE_AUTHOR("Google, Inc."); 388 MODULE_LICENSE("GPL v2"); 389