xref: /openbmc/linux/drivers/mmc/host/sdhci-s3c.c (revision baa7eb025ab14f3cba2e35c0a8648f9c9f01d24f)
1 /* linux/drivers/mmc/host/sdhci-s3c.c
2  *
3  * Copyright 2008 Openmoko Inc.
4  * Copyright 2008 Simtec Electronics
5  *      Ben Dooks <ben@simtec.co.uk>
6  *      http://armlinux.simtec.co.uk/
7  *
8  * SDHCI (HSMMC) support for Samsung SoC
9  *
10  * This program is free software; you can redistribute it and/or modify
11  * it under the terms of the GNU General Public License version 2 as
12  * published by the Free Software Foundation.
13  */
14 
15 #include <linux/delay.h>
16 #include <linux/dma-mapping.h>
17 #include <linux/platform_device.h>
18 #include <linux/slab.h>
19 #include <linux/clk.h>
20 #include <linux/io.h>
21 #include <linux/gpio.h>
22 
23 #include <linux/mmc/host.h>
24 
25 #include <plat/sdhci.h>
26 #include <plat/regs-sdhci.h>
27 
28 #include "sdhci.h"
29 
30 #define MAX_BUS_CLK	(4)
31 
32 /**
33  * struct sdhci_s3c - S3C SDHCI instance
34  * @host: The SDHCI host created
35  * @pdev: The platform device we where created from.
36  * @ioarea: The resource created when we claimed the IO area.
37  * @pdata: The platform data for this controller.
38  * @cur_clk: The index of the current bus clock.
39  * @clk_io: The clock for the internal bus interface.
40  * @clk_bus: The clocks that are available for the SD/MMC bus clock.
41  */
42 struct sdhci_s3c {
43 	struct sdhci_host	*host;
44 	struct platform_device	*pdev;
45 	struct resource		*ioarea;
46 	struct s3c_sdhci_platdata *pdata;
47 	unsigned int		cur_clk;
48 	int			ext_cd_irq;
49 	int			ext_cd_gpio;
50 
51 	struct clk		*clk_io;
52 	struct clk		*clk_bus[MAX_BUS_CLK];
53 };
54 
55 static inline struct sdhci_s3c *to_s3c(struct sdhci_host *host)
56 {
57 	return sdhci_priv(host);
58 }
59 
60 /**
61  * get_curclk - convert ctrl2 register to clock source number
62  * @ctrl2: Control2 register value.
63  */
64 static u32 get_curclk(u32 ctrl2)
65 {
66 	ctrl2 &= S3C_SDHCI_CTRL2_SELBASECLK_MASK;
67 	ctrl2 >>= S3C_SDHCI_CTRL2_SELBASECLK_SHIFT;
68 
69 	return ctrl2;
70 }
71 
72 static void sdhci_s3c_check_sclk(struct sdhci_host *host)
73 {
74 	struct sdhci_s3c *ourhost = to_s3c(host);
75 	u32 tmp = readl(host->ioaddr + S3C_SDHCI_CONTROL2);
76 
77 	if (get_curclk(tmp) != ourhost->cur_clk) {
78 		dev_dbg(&ourhost->pdev->dev, "restored ctrl2 clock setting\n");
79 
80 		tmp &= ~S3C_SDHCI_CTRL2_SELBASECLK_MASK;
81 		tmp |= ourhost->cur_clk << S3C_SDHCI_CTRL2_SELBASECLK_SHIFT;
82 		writel(tmp, host->ioaddr + 0x80);
83 	}
84 }
85 
86 /**
87  * sdhci_s3c_get_max_clk - callback to get maximum clock frequency.
88  * @host: The SDHCI host instance.
89  *
90  * Callback to return the maximum clock rate acheivable by the controller.
91 */
92 static unsigned int sdhci_s3c_get_max_clk(struct sdhci_host *host)
93 {
94 	struct sdhci_s3c *ourhost = to_s3c(host);
95 	struct clk *busclk;
96 	unsigned int rate, max;
97 	int clk;
98 
99 	/* note, a reset will reset the clock source */
100 
101 	sdhci_s3c_check_sclk(host);
102 
103 	for (max = 0, clk = 0; clk < MAX_BUS_CLK; clk++) {
104 		busclk = ourhost->clk_bus[clk];
105 		if (!busclk)
106 			continue;
107 
108 		rate = clk_get_rate(busclk);
109 		if (rate > max)
110 			max = rate;
111 	}
112 
113 	return max;
114 }
115 
116 /**
117  * sdhci_s3c_consider_clock - consider one the bus clocks for current setting
118  * @ourhost: Our SDHCI instance.
119  * @src: The source clock index.
120  * @wanted: The clock frequency wanted.
121  */
122 static unsigned int sdhci_s3c_consider_clock(struct sdhci_s3c *ourhost,
123 					     unsigned int src,
124 					     unsigned int wanted)
125 {
126 	unsigned long rate;
127 	struct clk *clksrc = ourhost->clk_bus[src];
128 	int div;
129 
130 	if (!clksrc)
131 		return UINT_MAX;
132 
133 	rate = clk_get_rate(clksrc);
134 
135 	for (div = 1; div < 256; div *= 2) {
136 		if ((rate / div) <= wanted)
137 			break;
138 	}
139 
140 	dev_dbg(&ourhost->pdev->dev, "clk %d: rate %ld, want %d, got %ld\n",
141 		src, rate, wanted, rate / div);
142 
143 	return (wanted - (rate / div));
144 }
145 
146 /**
147  * sdhci_s3c_set_clock - callback on clock change
148  * @host: The SDHCI host being changed
149  * @clock: The clock rate being requested.
150  *
151  * When the card's clock is going to be changed, look at the new frequency
152  * and find the best clock source to go with it.
153 */
154 static void sdhci_s3c_set_clock(struct sdhci_host *host, unsigned int clock)
155 {
156 	struct sdhci_s3c *ourhost = to_s3c(host);
157 	unsigned int best = UINT_MAX;
158 	unsigned int delta;
159 	int best_src = 0;
160 	int src;
161 	u32 ctrl;
162 
163 	/* don't bother if the clock is going off. */
164 	if (clock == 0)
165 		return;
166 
167 	for (src = 0; src < MAX_BUS_CLK; src++) {
168 		delta = sdhci_s3c_consider_clock(ourhost, src, clock);
169 		if (delta < best) {
170 			best = delta;
171 			best_src = src;
172 		}
173 	}
174 
175 	dev_dbg(&ourhost->pdev->dev,
176 		"selected source %d, clock %d, delta %d\n",
177 		 best_src, clock, best);
178 
179 	/* select the new clock source */
180 
181 	if (ourhost->cur_clk != best_src) {
182 		struct clk *clk = ourhost->clk_bus[best_src];
183 
184 		/* turn clock off to card before changing clock source */
185 		writew(0, host->ioaddr + SDHCI_CLOCK_CONTROL);
186 
187 		ourhost->cur_clk = best_src;
188 		host->max_clk = clk_get_rate(clk);
189 
190 		ctrl = readl(host->ioaddr + S3C_SDHCI_CONTROL2);
191 		ctrl &= ~S3C_SDHCI_CTRL2_SELBASECLK_MASK;
192 		ctrl |= best_src << S3C_SDHCI_CTRL2_SELBASECLK_SHIFT;
193 		writel(ctrl, host->ioaddr + S3C_SDHCI_CONTROL2);
194 	}
195 
196 	/* reconfigure the hardware for new clock rate */
197 
198 	{
199 		struct mmc_ios ios;
200 
201 		ios.clock = clock;
202 
203 		if (ourhost->pdata->cfg_card)
204 			(ourhost->pdata->cfg_card)(ourhost->pdev, host->ioaddr,
205 						   &ios, NULL);
206 	}
207 }
208 
209 /**
210  * sdhci_s3c_get_min_clock - callback to get minimal supported clock value
211  * @host: The SDHCI host being queried
212  *
213  * To init mmc host properly a minimal clock value is needed. For high system
214  * bus clock's values the standard formula gives values out of allowed range.
215  * The clock still can be set to lower values, if clock source other then
216  * system bus is selected.
217 */
218 static unsigned int sdhci_s3c_get_min_clock(struct sdhci_host *host)
219 {
220 	struct sdhci_s3c *ourhost = to_s3c(host);
221 	unsigned int delta, min = UINT_MAX;
222 	int src;
223 
224 	for (src = 0; src < MAX_BUS_CLK; src++) {
225 		delta = sdhci_s3c_consider_clock(ourhost, src, 0);
226 		if (delta == UINT_MAX)
227 			continue;
228 		/* delta is a negative value in this case */
229 		if (-delta < min)
230 			min = -delta;
231 	}
232 	return min;
233 }
234 
235 static struct sdhci_ops sdhci_s3c_ops = {
236 	.get_max_clock		= sdhci_s3c_get_max_clk,
237 	.set_clock		= sdhci_s3c_set_clock,
238 	.get_min_clock		= sdhci_s3c_get_min_clock,
239 };
240 
241 static void sdhci_s3c_notify_change(struct platform_device *dev, int state)
242 {
243 	struct sdhci_host *host = platform_get_drvdata(dev);
244 	unsigned long flags;
245 
246 	if (host) {
247 		spin_lock_irqsave(&host->lock, flags);
248 		if (state) {
249 			dev_dbg(&dev->dev, "card inserted.\n");
250 			host->flags &= ~SDHCI_DEVICE_DEAD;
251 			host->quirks |= SDHCI_QUIRK_BROKEN_CARD_DETECTION;
252 		} else {
253 			dev_dbg(&dev->dev, "card removed.\n");
254 			host->flags |= SDHCI_DEVICE_DEAD;
255 			host->quirks &= ~SDHCI_QUIRK_BROKEN_CARD_DETECTION;
256 		}
257 		tasklet_schedule(&host->card_tasklet);
258 		spin_unlock_irqrestore(&host->lock, flags);
259 	}
260 }
261 
262 static irqreturn_t sdhci_s3c_gpio_card_detect_thread(int irq, void *dev_id)
263 {
264 	struct sdhci_s3c *sc = dev_id;
265 	int status = gpio_get_value(sc->ext_cd_gpio);
266 	if (sc->pdata->ext_cd_gpio_invert)
267 		status = !status;
268 	sdhci_s3c_notify_change(sc->pdev, status);
269 	return IRQ_HANDLED;
270 }
271 
272 static void sdhci_s3c_setup_card_detect_gpio(struct sdhci_s3c *sc)
273 {
274 	struct s3c_sdhci_platdata *pdata = sc->pdata;
275 	struct device *dev = &sc->pdev->dev;
276 
277 	if (gpio_request(pdata->ext_cd_gpio, "SDHCI EXT CD") == 0) {
278 		sc->ext_cd_gpio = pdata->ext_cd_gpio;
279 		sc->ext_cd_irq = gpio_to_irq(pdata->ext_cd_gpio);
280 		if (sc->ext_cd_irq &&
281 		    request_threaded_irq(sc->ext_cd_irq, NULL,
282 					 sdhci_s3c_gpio_card_detect_thread,
283 					 IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
284 					 dev_name(dev), sc) == 0) {
285 			int status = gpio_get_value(sc->ext_cd_gpio);
286 			if (pdata->ext_cd_gpio_invert)
287 				status = !status;
288 			sdhci_s3c_notify_change(sc->pdev, status);
289 		} else {
290 			dev_warn(dev, "cannot request irq for card detect\n");
291 			sc->ext_cd_irq = 0;
292 		}
293 	} else {
294 		dev_err(dev, "cannot request gpio for card detect\n");
295 	}
296 }
297 
298 static int __devinit sdhci_s3c_probe(struct platform_device *pdev)
299 {
300 	struct s3c_sdhci_platdata *pdata = pdev->dev.platform_data;
301 	struct device *dev = &pdev->dev;
302 	struct sdhci_host *host;
303 	struct sdhci_s3c *sc;
304 	struct resource *res;
305 	int ret, irq, ptr, clks;
306 
307 	if (!pdata) {
308 		dev_err(dev, "no device data specified\n");
309 		return -ENOENT;
310 	}
311 
312 	irq = platform_get_irq(pdev, 0);
313 	if (irq < 0) {
314 		dev_err(dev, "no irq specified\n");
315 		return irq;
316 	}
317 
318 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
319 	if (!res) {
320 		dev_err(dev, "no memory specified\n");
321 		return -ENOENT;
322 	}
323 
324 	host = sdhci_alloc_host(dev, sizeof(struct sdhci_s3c));
325 	if (IS_ERR(host)) {
326 		dev_err(dev, "sdhci_alloc_host() failed\n");
327 		return PTR_ERR(host);
328 	}
329 
330 	sc = sdhci_priv(host);
331 
332 	sc->host = host;
333 	sc->pdev = pdev;
334 	sc->pdata = pdata;
335 	sc->ext_cd_gpio = -1; /* invalid gpio number */
336 
337 	platform_set_drvdata(pdev, host);
338 
339 	sc->clk_io = clk_get(dev, "hsmmc");
340 	if (IS_ERR(sc->clk_io)) {
341 		dev_err(dev, "failed to get io clock\n");
342 		ret = PTR_ERR(sc->clk_io);
343 		goto err_io_clk;
344 	}
345 
346 	/* enable the local io clock and keep it running for the moment. */
347 	clk_enable(sc->clk_io);
348 
349 	for (clks = 0, ptr = 0; ptr < MAX_BUS_CLK; ptr++) {
350 		struct clk *clk;
351 		char *name = pdata->clocks[ptr];
352 
353 		if (name == NULL)
354 			continue;
355 
356 		clk = clk_get(dev, name);
357 		if (IS_ERR(clk)) {
358 			dev_err(dev, "failed to get clock %s\n", name);
359 			continue;
360 		}
361 
362 		clks++;
363 		sc->clk_bus[ptr] = clk;
364 		clk_enable(clk);
365 
366 		dev_info(dev, "clock source %d: %s (%ld Hz)\n",
367 			 ptr, name, clk_get_rate(clk));
368 	}
369 
370 	if (clks == 0) {
371 		dev_err(dev, "failed to find any bus clocks\n");
372 		ret = -ENOENT;
373 		goto err_no_busclks;
374 	}
375 
376 	sc->ioarea = request_mem_region(res->start, resource_size(res),
377 					mmc_hostname(host->mmc));
378 	if (!sc->ioarea) {
379 		dev_err(dev, "failed to reserve register area\n");
380 		ret = -ENXIO;
381 		goto err_req_regs;
382 	}
383 
384 	host->ioaddr = ioremap_nocache(res->start, resource_size(res));
385 	if (!host->ioaddr) {
386 		dev_err(dev, "failed to map registers\n");
387 		ret = -ENXIO;
388 		goto err_req_regs;
389 	}
390 
391 	/* Ensure we have minimal gpio selected CMD/CLK/Detect */
392 	if (pdata->cfg_gpio)
393 		pdata->cfg_gpio(pdev, pdata->max_width);
394 
395 	host->hw_name = "samsung-hsmmc";
396 	host->ops = &sdhci_s3c_ops;
397 	host->quirks = 0;
398 	host->irq = irq;
399 
400 	/* Setup quirks for the controller */
401 	host->quirks |= SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC;
402 	host->quirks |= SDHCI_QUIRK_NO_HISPD_BIT;
403 
404 #ifndef CONFIG_MMC_SDHCI_S3C_DMA
405 
406 	/* we currently see overruns on errors, so disable the SDMA
407 	 * support as well. */
408 	host->quirks |= SDHCI_QUIRK_BROKEN_DMA;
409 
410 #endif /* CONFIG_MMC_SDHCI_S3C_DMA */
411 
412 	/* It seems we do not get an DATA transfer complete on non-busy
413 	 * transfers, not sure if this is a problem with this specific
414 	 * SDHCI block, or a missing configuration that needs to be set. */
415 	host->quirks |= SDHCI_QUIRK_NO_BUSY_IRQ;
416 
417 	if (pdata->cd_type == S3C_SDHCI_CD_NONE ||
418 	    pdata->cd_type == S3C_SDHCI_CD_PERMANENT)
419 		host->quirks |= SDHCI_QUIRK_BROKEN_CARD_DETECTION;
420 
421 	if (pdata->cd_type == S3C_SDHCI_CD_PERMANENT)
422 		host->mmc->caps = MMC_CAP_NONREMOVABLE;
423 
424 	host->quirks |= (SDHCI_QUIRK_32BIT_DMA_ADDR |
425 			 SDHCI_QUIRK_32BIT_DMA_SIZE);
426 
427 	/* HSMMC on Samsung SoCs uses SDCLK as timeout clock */
428 	host->quirks |= SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK;
429 
430 	ret = sdhci_add_host(host);
431 	if (ret) {
432 		dev_err(dev, "sdhci_add_host() failed\n");
433 		goto err_add_host;
434 	}
435 
436 	/* The following two methods of card detection might call
437 	   sdhci_s3c_notify_change() immediately, so they can be called
438 	   only after sdhci_add_host(). Setup errors are ignored. */
439 	if (pdata->cd_type == S3C_SDHCI_CD_EXTERNAL && pdata->ext_cd_init)
440 		pdata->ext_cd_init(&sdhci_s3c_notify_change);
441 	if (pdata->cd_type == S3C_SDHCI_CD_GPIO &&
442 	    gpio_is_valid(pdata->ext_cd_gpio))
443 		sdhci_s3c_setup_card_detect_gpio(sc);
444 
445 	return 0;
446 
447  err_add_host:
448 	release_resource(sc->ioarea);
449 	kfree(sc->ioarea);
450 
451  err_req_regs:
452 	for (ptr = 0; ptr < MAX_BUS_CLK; ptr++) {
453 		clk_disable(sc->clk_bus[ptr]);
454 		clk_put(sc->clk_bus[ptr]);
455 	}
456 
457  err_no_busclks:
458 	clk_disable(sc->clk_io);
459 	clk_put(sc->clk_io);
460 
461  err_io_clk:
462 	sdhci_free_host(host);
463 
464 	return ret;
465 }
466 
467 static int __devexit sdhci_s3c_remove(struct platform_device *pdev)
468 {
469 	struct s3c_sdhci_platdata *pdata = pdev->dev.platform_data;
470 	struct sdhci_host *host =  platform_get_drvdata(pdev);
471 	struct sdhci_s3c *sc = sdhci_priv(host);
472 	int ptr;
473 
474 	if (pdata->cd_type == S3C_SDHCI_CD_EXTERNAL && pdata->ext_cd_cleanup)
475 		pdata->ext_cd_cleanup(&sdhci_s3c_notify_change);
476 
477 	if (sc->ext_cd_irq)
478 		free_irq(sc->ext_cd_irq, sc);
479 
480 	if (gpio_is_valid(sc->ext_cd_gpio))
481 		gpio_free(sc->ext_cd_gpio);
482 
483 	sdhci_remove_host(host, 1);
484 
485 	for (ptr = 0; ptr < 3; ptr++) {
486 		if (sc->clk_bus[ptr]) {
487 			clk_disable(sc->clk_bus[ptr]);
488 			clk_put(sc->clk_bus[ptr]);
489 		}
490 	}
491 	clk_disable(sc->clk_io);
492 	clk_put(sc->clk_io);
493 
494 	iounmap(host->ioaddr);
495 	release_resource(sc->ioarea);
496 	kfree(sc->ioarea);
497 
498 	sdhci_free_host(host);
499 	platform_set_drvdata(pdev, NULL);
500 
501 	return 0;
502 }
503 
504 #ifdef CONFIG_PM
505 
506 static int sdhci_s3c_suspend(struct platform_device *dev, pm_message_t pm)
507 {
508 	struct sdhci_host *host = platform_get_drvdata(dev);
509 
510 	sdhci_suspend_host(host, pm);
511 	return 0;
512 }
513 
514 static int sdhci_s3c_resume(struct platform_device *dev)
515 {
516 	struct sdhci_host *host = platform_get_drvdata(dev);
517 
518 	sdhci_resume_host(host);
519 	return 0;
520 }
521 
522 #else
523 #define sdhci_s3c_suspend NULL
524 #define sdhci_s3c_resume NULL
525 #endif
526 
527 static struct platform_driver sdhci_s3c_driver = {
528 	.probe		= sdhci_s3c_probe,
529 	.remove		= __devexit_p(sdhci_s3c_remove),
530 	.suspend	= sdhci_s3c_suspend,
531 	.resume	        = sdhci_s3c_resume,
532 	.driver		= {
533 		.owner	= THIS_MODULE,
534 		.name	= "s3c-sdhci",
535 	},
536 };
537 
538 static int __init sdhci_s3c_init(void)
539 {
540 	return platform_driver_register(&sdhci_s3c_driver);
541 }
542 
543 static void __exit sdhci_s3c_exit(void)
544 {
545 	platform_driver_unregister(&sdhci_s3c_driver);
546 }
547 
548 module_init(sdhci_s3c_init);
549 module_exit(sdhci_s3c_exit);
550 
551 MODULE_DESCRIPTION("Samsung SDHCI (HSMMC) glue");
552 MODULE_AUTHOR("Ben Dooks, <ben@simtec.co.uk>");
553 MODULE_LICENSE("GPL v2");
554 MODULE_ALIAS("platform:s3c-sdhci");
555