10d1bb41aSBen Dooks /* linux/drivers/mmc/host/sdhci-s3c.c 20d1bb41aSBen Dooks * 30d1bb41aSBen Dooks * Copyright 2008 Openmoko Inc. 40d1bb41aSBen Dooks * Copyright 2008 Simtec Electronics 50d1bb41aSBen Dooks * Ben Dooks <ben@simtec.co.uk> 60d1bb41aSBen Dooks * http://armlinux.simtec.co.uk/ 70d1bb41aSBen Dooks * 80d1bb41aSBen Dooks * SDHCI (HSMMC) support for Samsung SoC 90d1bb41aSBen Dooks * 100d1bb41aSBen Dooks * This program is free software; you can redistribute it and/or modify 110d1bb41aSBen Dooks * it under the terms of the GNU General Public License version 2 as 120d1bb41aSBen Dooks * published by the Free Software Foundation. 130d1bb41aSBen Dooks */ 140d1bb41aSBen Dooks 150d1bb41aSBen Dooks #include <linux/delay.h> 160d1bb41aSBen Dooks #include <linux/dma-mapping.h> 170d1bb41aSBen Dooks #include <linux/platform_device.h> 185a0e3ad6STejun Heo #include <linux/slab.h> 190d1bb41aSBen Dooks #include <linux/clk.h> 200d1bb41aSBen Dooks #include <linux/io.h> 2117866e14SMarek Szyprowski #include <linux/gpio.h> 2255156d24SMark Brown #include <linux/module.h> 230d1bb41aSBen Dooks 240d1bb41aSBen Dooks #include <linux/mmc/host.h> 250d1bb41aSBen Dooks 260d1bb41aSBen Dooks #include <plat/sdhci.h> 270d1bb41aSBen Dooks #include <plat/regs-sdhci.h> 280d1bb41aSBen Dooks 290d1bb41aSBen Dooks #include "sdhci.h" 300d1bb41aSBen Dooks 310d1bb41aSBen Dooks #define MAX_BUS_CLK (4) 320d1bb41aSBen Dooks 330d1bb41aSBen Dooks /** 340d1bb41aSBen Dooks * struct sdhci_s3c - S3C SDHCI instance 350d1bb41aSBen Dooks * @host: The SDHCI host created 360d1bb41aSBen Dooks * @pdev: The platform device we where created from. 370d1bb41aSBen Dooks * @ioarea: The resource created when we claimed the IO area. 380d1bb41aSBen Dooks * @pdata: The platform data for this controller. 390d1bb41aSBen Dooks * @cur_clk: The index of the current bus clock. 400d1bb41aSBen Dooks * @clk_io: The clock for the internal bus interface. 410d1bb41aSBen Dooks * @clk_bus: The clocks that are available for the SD/MMC bus clock. 420d1bb41aSBen Dooks */ 430d1bb41aSBen Dooks struct sdhci_s3c { 440d1bb41aSBen Dooks struct sdhci_host *host; 450d1bb41aSBen Dooks struct platform_device *pdev; 460d1bb41aSBen Dooks struct resource *ioarea; 470d1bb41aSBen Dooks struct s3c_sdhci_platdata *pdata; 480d1bb41aSBen Dooks unsigned int cur_clk; 4917866e14SMarek Szyprowski int ext_cd_irq; 5017866e14SMarek Szyprowski int ext_cd_gpio; 510d1bb41aSBen Dooks 520d1bb41aSBen Dooks struct clk *clk_io; 530d1bb41aSBen Dooks struct clk *clk_bus[MAX_BUS_CLK]; 540d1bb41aSBen Dooks }; 550d1bb41aSBen Dooks 560d1bb41aSBen Dooks static inline struct sdhci_s3c *to_s3c(struct sdhci_host *host) 570d1bb41aSBen Dooks { 580d1bb41aSBen Dooks return sdhci_priv(host); 590d1bb41aSBen Dooks } 600d1bb41aSBen Dooks 610d1bb41aSBen Dooks /** 620d1bb41aSBen Dooks * get_curclk - convert ctrl2 register to clock source number 630d1bb41aSBen Dooks * @ctrl2: Control2 register value. 640d1bb41aSBen Dooks */ 650d1bb41aSBen Dooks static u32 get_curclk(u32 ctrl2) 660d1bb41aSBen Dooks { 670d1bb41aSBen Dooks ctrl2 &= S3C_SDHCI_CTRL2_SELBASECLK_MASK; 680d1bb41aSBen Dooks ctrl2 >>= S3C_SDHCI_CTRL2_SELBASECLK_SHIFT; 690d1bb41aSBen Dooks 700d1bb41aSBen Dooks return ctrl2; 710d1bb41aSBen Dooks } 720d1bb41aSBen Dooks 730d1bb41aSBen Dooks static void sdhci_s3c_check_sclk(struct sdhci_host *host) 740d1bb41aSBen Dooks { 750d1bb41aSBen Dooks struct sdhci_s3c *ourhost = to_s3c(host); 760d1bb41aSBen Dooks u32 tmp = readl(host->ioaddr + S3C_SDHCI_CONTROL2); 770d1bb41aSBen Dooks 780d1bb41aSBen Dooks if (get_curclk(tmp) != ourhost->cur_clk) { 790d1bb41aSBen Dooks dev_dbg(&ourhost->pdev->dev, "restored ctrl2 clock setting\n"); 800d1bb41aSBen Dooks 810d1bb41aSBen Dooks tmp &= ~S3C_SDHCI_CTRL2_SELBASECLK_MASK; 820d1bb41aSBen Dooks tmp |= ourhost->cur_clk << S3C_SDHCI_CTRL2_SELBASECLK_SHIFT; 830d1bb41aSBen Dooks writel(tmp, host->ioaddr + 0x80); 840d1bb41aSBen Dooks } 850d1bb41aSBen Dooks } 860d1bb41aSBen Dooks 870d1bb41aSBen Dooks /** 880d1bb41aSBen Dooks * sdhci_s3c_get_max_clk - callback to get maximum clock frequency. 890d1bb41aSBen Dooks * @host: The SDHCI host instance. 900d1bb41aSBen Dooks * 910d1bb41aSBen Dooks * Callback to return the maximum clock rate acheivable by the controller. 920d1bb41aSBen Dooks */ 930d1bb41aSBen Dooks static unsigned int sdhci_s3c_get_max_clk(struct sdhci_host *host) 940d1bb41aSBen Dooks { 950d1bb41aSBen Dooks struct sdhci_s3c *ourhost = to_s3c(host); 960d1bb41aSBen Dooks struct clk *busclk; 970d1bb41aSBen Dooks unsigned int rate, max; 980d1bb41aSBen Dooks int clk; 990d1bb41aSBen Dooks 1000d1bb41aSBen Dooks /* note, a reset will reset the clock source */ 1010d1bb41aSBen Dooks 1020d1bb41aSBen Dooks sdhci_s3c_check_sclk(host); 1030d1bb41aSBen Dooks 1040d1bb41aSBen Dooks for (max = 0, clk = 0; clk < MAX_BUS_CLK; clk++) { 1050d1bb41aSBen Dooks busclk = ourhost->clk_bus[clk]; 1060d1bb41aSBen Dooks if (!busclk) 1070d1bb41aSBen Dooks continue; 1080d1bb41aSBen Dooks 1090d1bb41aSBen Dooks rate = clk_get_rate(busclk); 1100d1bb41aSBen Dooks if (rate > max) 1110d1bb41aSBen Dooks max = rate; 1120d1bb41aSBen Dooks } 1130d1bb41aSBen Dooks 1140d1bb41aSBen Dooks return max; 1150d1bb41aSBen Dooks } 1160d1bb41aSBen Dooks 1170d1bb41aSBen Dooks /** 1180d1bb41aSBen Dooks * sdhci_s3c_consider_clock - consider one the bus clocks for current setting 1190d1bb41aSBen Dooks * @ourhost: Our SDHCI instance. 1200d1bb41aSBen Dooks * @src: The source clock index. 1210d1bb41aSBen Dooks * @wanted: The clock frequency wanted. 1220d1bb41aSBen Dooks */ 1230d1bb41aSBen Dooks static unsigned int sdhci_s3c_consider_clock(struct sdhci_s3c *ourhost, 1240d1bb41aSBen Dooks unsigned int src, 1250d1bb41aSBen Dooks unsigned int wanted) 1260d1bb41aSBen Dooks { 1270d1bb41aSBen Dooks unsigned long rate; 1280d1bb41aSBen Dooks struct clk *clksrc = ourhost->clk_bus[src]; 1290d1bb41aSBen Dooks int div; 1300d1bb41aSBen Dooks 1310d1bb41aSBen Dooks if (!clksrc) 1320d1bb41aSBen Dooks return UINT_MAX; 1330d1bb41aSBen Dooks 134253e0a7cSJeongbae Seo /* 135253e0a7cSJeongbae Seo * Clock divider's step is different as 1 from that of host controller 136253e0a7cSJeongbae Seo * when 'clk_type' is S3C_SDHCI_CLK_DIV_EXTERNAL. 137253e0a7cSJeongbae Seo */ 138253e0a7cSJeongbae Seo if (ourhost->pdata->clk_type) { 139253e0a7cSJeongbae Seo rate = clk_round_rate(clksrc, wanted); 140253e0a7cSJeongbae Seo return wanted - rate; 141253e0a7cSJeongbae Seo } 142253e0a7cSJeongbae Seo 1430d1bb41aSBen Dooks rate = clk_get_rate(clksrc); 1440d1bb41aSBen Dooks 1450d1bb41aSBen Dooks for (div = 1; div < 256; div *= 2) { 1460d1bb41aSBen Dooks if ((rate / div) <= wanted) 1470d1bb41aSBen Dooks break; 1480d1bb41aSBen Dooks } 1490d1bb41aSBen Dooks 1500d1bb41aSBen Dooks dev_dbg(&ourhost->pdev->dev, "clk %d: rate %ld, want %d, got %ld\n", 1510d1bb41aSBen Dooks src, rate, wanted, rate / div); 1520d1bb41aSBen Dooks 1530d1bb41aSBen Dooks return (wanted - (rate / div)); 1540d1bb41aSBen Dooks } 1550d1bb41aSBen Dooks 1560d1bb41aSBen Dooks /** 1570d1bb41aSBen Dooks * sdhci_s3c_set_clock - callback on clock change 1580d1bb41aSBen Dooks * @host: The SDHCI host being changed 1590d1bb41aSBen Dooks * @clock: The clock rate being requested. 1600d1bb41aSBen Dooks * 1610d1bb41aSBen Dooks * When the card's clock is going to be changed, look at the new frequency 1620d1bb41aSBen Dooks * and find the best clock source to go with it. 1630d1bb41aSBen Dooks */ 1640d1bb41aSBen Dooks static void sdhci_s3c_set_clock(struct sdhci_host *host, unsigned int clock) 1650d1bb41aSBen Dooks { 1660d1bb41aSBen Dooks struct sdhci_s3c *ourhost = to_s3c(host); 1670d1bb41aSBen Dooks unsigned int best = UINT_MAX; 1680d1bb41aSBen Dooks unsigned int delta; 1690d1bb41aSBen Dooks int best_src = 0; 1700d1bb41aSBen Dooks int src; 1710d1bb41aSBen Dooks u32 ctrl; 1720d1bb41aSBen Dooks 1730d1bb41aSBen Dooks /* don't bother if the clock is going off. */ 1740d1bb41aSBen Dooks if (clock == 0) 1750d1bb41aSBen Dooks return; 1760d1bb41aSBen Dooks 1770d1bb41aSBen Dooks for (src = 0; src < MAX_BUS_CLK; src++) { 1780d1bb41aSBen Dooks delta = sdhci_s3c_consider_clock(ourhost, src, clock); 1790d1bb41aSBen Dooks if (delta < best) { 1800d1bb41aSBen Dooks best = delta; 1810d1bb41aSBen Dooks best_src = src; 1820d1bb41aSBen Dooks } 1830d1bb41aSBen Dooks } 1840d1bb41aSBen Dooks 1850d1bb41aSBen Dooks dev_dbg(&ourhost->pdev->dev, 1860d1bb41aSBen Dooks "selected source %d, clock %d, delta %d\n", 1870d1bb41aSBen Dooks best_src, clock, best); 1880d1bb41aSBen Dooks 1890d1bb41aSBen Dooks /* select the new clock source */ 1900d1bb41aSBen Dooks 1910d1bb41aSBen Dooks if (ourhost->cur_clk != best_src) { 1920d1bb41aSBen Dooks struct clk *clk = ourhost->clk_bus[best_src]; 1930d1bb41aSBen Dooks 1940d1bb41aSBen Dooks /* turn clock off to card before changing clock source */ 1950d1bb41aSBen Dooks writew(0, host->ioaddr + SDHCI_CLOCK_CONTROL); 1960d1bb41aSBen Dooks 1970d1bb41aSBen Dooks ourhost->cur_clk = best_src; 1980d1bb41aSBen Dooks host->max_clk = clk_get_rate(clk); 1990d1bb41aSBen Dooks 2000d1bb41aSBen Dooks ctrl = readl(host->ioaddr + S3C_SDHCI_CONTROL2); 2010d1bb41aSBen Dooks ctrl &= ~S3C_SDHCI_CTRL2_SELBASECLK_MASK; 2020d1bb41aSBen Dooks ctrl |= best_src << S3C_SDHCI_CTRL2_SELBASECLK_SHIFT; 2030d1bb41aSBen Dooks writel(ctrl, host->ioaddr + S3C_SDHCI_CONTROL2); 2040d1bb41aSBen Dooks } 2050d1bb41aSBen Dooks 2060d1bb41aSBen Dooks /* reconfigure the hardware for new clock rate */ 2070d1bb41aSBen Dooks 2080d1bb41aSBen Dooks { 2090d1bb41aSBen Dooks struct mmc_ios ios; 2100d1bb41aSBen Dooks 2110d1bb41aSBen Dooks ios.clock = clock; 2120d1bb41aSBen Dooks 2130d1bb41aSBen Dooks if (ourhost->pdata->cfg_card) 2140d1bb41aSBen Dooks (ourhost->pdata->cfg_card)(ourhost->pdev, host->ioaddr, 2150d1bb41aSBen Dooks &ios, NULL); 2160d1bb41aSBen Dooks } 2170d1bb41aSBen Dooks } 2180d1bb41aSBen Dooks 219ce5f036bSMarek Szyprowski /** 220ce5f036bSMarek Szyprowski * sdhci_s3c_get_min_clock - callback to get minimal supported clock value 221ce5f036bSMarek Szyprowski * @host: The SDHCI host being queried 222ce5f036bSMarek Szyprowski * 223ce5f036bSMarek Szyprowski * To init mmc host properly a minimal clock value is needed. For high system 224ce5f036bSMarek Szyprowski * bus clock's values the standard formula gives values out of allowed range. 225ce5f036bSMarek Szyprowski * The clock still can be set to lower values, if clock source other then 226ce5f036bSMarek Szyprowski * system bus is selected. 227ce5f036bSMarek Szyprowski */ 228ce5f036bSMarek Szyprowski static unsigned int sdhci_s3c_get_min_clock(struct sdhci_host *host) 229ce5f036bSMarek Szyprowski { 230ce5f036bSMarek Szyprowski struct sdhci_s3c *ourhost = to_s3c(host); 231ce5f036bSMarek Szyprowski unsigned int delta, min = UINT_MAX; 232ce5f036bSMarek Szyprowski int src; 233ce5f036bSMarek Szyprowski 234ce5f036bSMarek Szyprowski for (src = 0; src < MAX_BUS_CLK; src++) { 235ce5f036bSMarek Szyprowski delta = sdhci_s3c_consider_clock(ourhost, src, 0); 236ce5f036bSMarek Szyprowski if (delta == UINT_MAX) 237ce5f036bSMarek Szyprowski continue; 238ce5f036bSMarek Szyprowski /* delta is a negative value in this case */ 239ce5f036bSMarek Szyprowski if (-delta < min) 240ce5f036bSMarek Szyprowski min = -delta; 241ce5f036bSMarek Szyprowski } 242ce5f036bSMarek Szyprowski return min; 243ce5f036bSMarek Szyprowski } 244ce5f036bSMarek Szyprowski 245253e0a7cSJeongbae Seo /* sdhci_cmu_get_max_clk - callback to get maximum clock frequency.*/ 246253e0a7cSJeongbae Seo static unsigned int sdhci_cmu_get_max_clock(struct sdhci_host *host) 247253e0a7cSJeongbae Seo { 248253e0a7cSJeongbae Seo struct sdhci_s3c *ourhost = to_s3c(host); 249253e0a7cSJeongbae Seo 250253e0a7cSJeongbae Seo return clk_round_rate(ourhost->clk_bus[ourhost->cur_clk], UINT_MAX); 251253e0a7cSJeongbae Seo } 252253e0a7cSJeongbae Seo 253253e0a7cSJeongbae Seo /* sdhci_cmu_get_min_clock - callback to get minimal supported clock value. */ 254253e0a7cSJeongbae Seo static unsigned int sdhci_cmu_get_min_clock(struct sdhci_host *host) 255253e0a7cSJeongbae Seo { 256253e0a7cSJeongbae Seo struct sdhci_s3c *ourhost = to_s3c(host); 257253e0a7cSJeongbae Seo 258253e0a7cSJeongbae Seo /* 259253e0a7cSJeongbae Seo * initial clock can be in the frequency range of 260253e0a7cSJeongbae Seo * 100KHz-400KHz, so we set it as max value. 261253e0a7cSJeongbae Seo */ 262253e0a7cSJeongbae Seo return clk_round_rate(ourhost->clk_bus[ourhost->cur_clk], 400000); 263253e0a7cSJeongbae Seo } 264253e0a7cSJeongbae Seo 265253e0a7cSJeongbae Seo /* sdhci_cmu_set_clock - callback on clock change.*/ 266253e0a7cSJeongbae Seo static void sdhci_cmu_set_clock(struct sdhci_host *host, unsigned int clock) 267253e0a7cSJeongbae Seo { 268253e0a7cSJeongbae Seo struct sdhci_s3c *ourhost = to_s3c(host); 269253e0a7cSJeongbae Seo 270253e0a7cSJeongbae Seo /* don't bother if the clock is going off */ 271253e0a7cSJeongbae Seo if (clock == 0) 272253e0a7cSJeongbae Seo return; 273253e0a7cSJeongbae Seo 274253e0a7cSJeongbae Seo sdhci_s3c_set_clock(host, clock); 275253e0a7cSJeongbae Seo 276253e0a7cSJeongbae Seo clk_set_rate(ourhost->clk_bus[ourhost->cur_clk], clock); 277253e0a7cSJeongbae Seo 278253e0a7cSJeongbae Seo host->clock = clock; 279253e0a7cSJeongbae Seo } 280253e0a7cSJeongbae Seo 281548f07d2SJaehoon Chung /** 282548f07d2SJaehoon Chung * sdhci_s3c_platform_8bit_width - support 8bit buswidth 283548f07d2SJaehoon Chung * @host: The SDHCI host being queried 284548f07d2SJaehoon Chung * @width: MMC_BUS_WIDTH_ macro for the bus width being requested 285548f07d2SJaehoon Chung * 286548f07d2SJaehoon Chung * We have 8-bit width support but is not a v3 controller. 287548f07d2SJaehoon Chung * So we add platform_8bit_width() and support 8bit width. 288548f07d2SJaehoon Chung */ 289548f07d2SJaehoon Chung static int sdhci_s3c_platform_8bit_width(struct sdhci_host *host, int width) 290548f07d2SJaehoon Chung { 291548f07d2SJaehoon Chung u8 ctrl; 292548f07d2SJaehoon Chung 293548f07d2SJaehoon Chung ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL); 294548f07d2SJaehoon Chung 295548f07d2SJaehoon Chung switch (width) { 296548f07d2SJaehoon Chung case MMC_BUS_WIDTH_8: 297548f07d2SJaehoon Chung ctrl |= SDHCI_CTRL_8BITBUS; 298548f07d2SJaehoon Chung ctrl &= ~SDHCI_CTRL_4BITBUS; 299548f07d2SJaehoon Chung break; 300548f07d2SJaehoon Chung case MMC_BUS_WIDTH_4: 301548f07d2SJaehoon Chung ctrl |= SDHCI_CTRL_4BITBUS; 302548f07d2SJaehoon Chung ctrl &= ~SDHCI_CTRL_8BITBUS; 303548f07d2SJaehoon Chung break; 304548f07d2SJaehoon Chung default: 305548f07d2SJaehoon Chung break; 306548f07d2SJaehoon Chung } 307548f07d2SJaehoon Chung 308548f07d2SJaehoon Chung sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL); 309548f07d2SJaehoon Chung 310548f07d2SJaehoon Chung return 0; 311548f07d2SJaehoon Chung } 312548f07d2SJaehoon Chung 3130d1bb41aSBen Dooks static struct sdhci_ops sdhci_s3c_ops = { 3140d1bb41aSBen Dooks .get_max_clock = sdhci_s3c_get_max_clk, 3150d1bb41aSBen Dooks .set_clock = sdhci_s3c_set_clock, 316ce5f036bSMarek Szyprowski .get_min_clock = sdhci_s3c_get_min_clock, 317548f07d2SJaehoon Chung .platform_8bit_width = sdhci_s3c_platform_8bit_width, 3180d1bb41aSBen Dooks }; 3190d1bb41aSBen Dooks 32017866e14SMarek Szyprowski static void sdhci_s3c_notify_change(struct platform_device *dev, int state) 32117866e14SMarek Szyprowski { 32217866e14SMarek Szyprowski struct sdhci_host *host = platform_get_drvdata(dev); 32306fe577fSMarek Szyprowski unsigned long flags; 32406fe577fSMarek Szyprowski 32517866e14SMarek Szyprowski if (host) { 32606fe577fSMarek Szyprowski spin_lock_irqsave(&host->lock, flags); 32717866e14SMarek Szyprowski if (state) { 32817866e14SMarek Szyprowski dev_dbg(&dev->dev, "card inserted.\n"); 32917866e14SMarek Szyprowski host->flags &= ~SDHCI_DEVICE_DEAD; 33017866e14SMarek Szyprowski host->quirks |= SDHCI_QUIRK_BROKEN_CARD_DETECTION; 33117866e14SMarek Szyprowski } else { 33217866e14SMarek Szyprowski dev_dbg(&dev->dev, "card removed.\n"); 33317866e14SMarek Szyprowski host->flags |= SDHCI_DEVICE_DEAD; 33417866e14SMarek Szyprowski host->quirks &= ~SDHCI_QUIRK_BROKEN_CARD_DETECTION; 33517866e14SMarek Szyprowski } 336f522886eSKyungmin Park tasklet_schedule(&host->card_tasklet); 33706fe577fSMarek Szyprowski spin_unlock_irqrestore(&host->lock, flags); 33817866e14SMarek Szyprowski } 33917866e14SMarek Szyprowski } 34017866e14SMarek Szyprowski 34117866e14SMarek Szyprowski static irqreturn_t sdhci_s3c_gpio_card_detect_thread(int irq, void *dev_id) 34217866e14SMarek Szyprowski { 34317866e14SMarek Szyprowski struct sdhci_s3c *sc = dev_id; 34417866e14SMarek Szyprowski int status = gpio_get_value(sc->ext_cd_gpio); 34517866e14SMarek Szyprowski if (sc->pdata->ext_cd_gpio_invert) 34617866e14SMarek Szyprowski status = !status; 34717866e14SMarek Szyprowski sdhci_s3c_notify_change(sc->pdev, status); 34817866e14SMarek Szyprowski return IRQ_HANDLED; 34917866e14SMarek Szyprowski } 35017866e14SMarek Szyprowski 35117866e14SMarek Szyprowski static void sdhci_s3c_setup_card_detect_gpio(struct sdhci_s3c *sc) 35217866e14SMarek Szyprowski { 35317866e14SMarek Szyprowski struct s3c_sdhci_platdata *pdata = sc->pdata; 35417866e14SMarek Szyprowski struct device *dev = &sc->pdev->dev; 35517866e14SMarek Szyprowski 35617866e14SMarek Szyprowski if (gpio_request(pdata->ext_cd_gpio, "SDHCI EXT CD") == 0) { 35717866e14SMarek Szyprowski sc->ext_cd_gpio = pdata->ext_cd_gpio; 35817866e14SMarek Szyprowski sc->ext_cd_irq = gpio_to_irq(pdata->ext_cd_gpio); 35917866e14SMarek Szyprowski if (sc->ext_cd_irq && 36017866e14SMarek Szyprowski request_threaded_irq(sc->ext_cd_irq, NULL, 36117866e14SMarek Szyprowski sdhci_s3c_gpio_card_detect_thread, 36217866e14SMarek Szyprowski IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING, 36317866e14SMarek Szyprowski dev_name(dev), sc) == 0) { 36417866e14SMarek Szyprowski int status = gpio_get_value(sc->ext_cd_gpio); 36517866e14SMarek Szyprowski if (pdata->ext_cd_gpio_invert) 36617866e14SMarek Szyprowski status = !status; 36717866e14SMarek Szyprowski sdhci_s3c_notify_change(sc->pdev, status); 36817866e14SMarek Szyprowski } else { 36917866e14SMarek Szyprowski dev_warn(dev, "cannot request irq for card detect\n"); 37017866e14SMarek Szyprowski sc->ext_cd_irq = 0; 37117866e14SMarek Szyprowski } 37217866e14SMarek Szyprowski } else { 37317866e14SMarek Szyprowski dev_err(dev, "cannot request gpio for card detect\n"); 37417866e14SMarek Szyprowski } 37517866e14SMarek Szyprowski } 37617866e14SMarek Szyprowski 3770d1bb41aSBen Dooks static int __devinit sdhci_s3c_probe(struct platform_device *pdev) 3780d1bb41aSBen Dooks { 3790d1bb41aSBen Dooks struct s3c_sdhci_platdata *pdata = pdev->dev.platform_data; 3800d1bb41aSBen Dooks struct device *dev = &pdev->dev; 3810d1bb41aSBen Dooks struct sdhci_host *host; 3820d1bb41aSBen Dooks struct sdhci_s3c *sc; 3830d1bb41aSBen Dooks struct resource *res; 3840d1bb41aSBen Dooks int ret, irq, ptr, clks; 3850d1bb41aSBen Dooks 3860d1bb41aSBen Dooks if (!pdata) { 3870d1bb41aSBen Dooks dev_err(dev, "no device data specified\n"); 3880d1bb41aSBen Dooks return -ENOENT; 3890d1bb41aSBen Dooks } 3900d1bb41aSBen Dooks 3910d1bb41aSBen Dooks irq = platform_get_irq(pdev, 0); 3920d1bb41aSBen Dooks if (irq < 0) { 3930d1bb41aSBen Dooks dev_err(dev, "no irq specified\n"); 3940d1bb41aSBen Dooks return irq; 3950d1bb41aSBen Dooks } 3960d1bb41aSBen Dooks 3970d1bb41aSBen Dooks res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 3980d1bb41aSBen Dooks if (!res) { 3990d1bb41aSBen Dooks dev_err(dev, "no memory specified\n"); 4000d1bb41aSBen Dooks return -ENOENT; 4010d1bb41aSBen Dooks } 4020d1bb41aSBen Dooks 4030d1bb41aSBen Dooks host = sdhci_alloc_host(dev, sizeof(struct sdhci_s3c)); 4040d1bb41aSBen Dooks if (IS_ERR(host)) { 4050d1bb41aSBen Dooks dev_err(dev, "sdhci_alloc_host() failed\n"); 4060d1bb41aSBen Dooks return PTR_ERR(host); 4070d1bb41aSBen Dooks } 4080d1bb41aSBen Dooks 4090d1bb41aSBen Dooks sc = sdhci_priv(host); 4100d1bb41aSBen Dooks 4110d1bb41aSBen Dooks sc->host = host; 4120d1bb41aSBen Dooks sc->pdev = pdev; 4130d1bb41aSBen Dooks sc->pdata = pdata; 41417866e14SMarek Szyprowski sc->ext_cd_gpio = -1; /* invalid gpio number */ 4150d1bb41aSBen Dooks 4160d1bb41aSBen Dooks platform_set_drvdata(pdev, host); 4170d1bb41aSBen Dooks 4180d1bb41aSBen Dooks sc->clk_io = clk_get(dev, "hsmmc"); 4190d1bb41aSBen Dooks if (IS_ERR(sc->clk_io)) { 4200d1bb41aSBen Dooks dev_err(dev, "failed to get io clock\n"); 4210d1bb41aSBen Dooks ret = PTR_ERR(sc->clk_io); 4220d1bb41aSBen Dooks goto err_io_clk; 4230d1bb41aSBen Dooks } 4240d1bb41aSBen Dooks 4250d1bb41aSBen Dooks /* enable the local io clock and keep it running for the moment. */ 4260d1bb41aSBen Dooks clk_enable(sc->clk_io); 4270d1bb41aSBen Dooks 4280d1bb41aSBen Dooks for (clks = 0, ptr = 0; ptr < MAX_BUS_CLK; ptr++) { 4290d1bb41aSBen Dooks struct clk *clk; 4300d1bb41aSBen Dooks char *name = pdata->clocks[ptr]; 4310d1bb41aSBen Dooks 4320d1bb41aSBen Dooks if (name == NULL) 4330d1bb41aSBen Dooks continue; 4340d1bb41aSBen Dooks 4350d1bb41aSBen Dooks clk = clk_get(dev, name); 4360d1bb41aSBen Dooks if (IS_ERR(clk)) { 4370d1bb41aSBen Dooks dev_err(dev, "failed to get clock %s\n", name); 4380d1bb41aSBen Dooks continue; 4390d1bb41aSBen Dooks } 4400d1bb41aSBen Dooks 4410d1bb41aSBen Dooks clks++; 4420d1bb41aSBen Dooks sc->clk_bus[ptr] = clk; 443253e0a7cSJeongbae Seo 444253e0a7cSJeongbae Seo /* 445253e0a7cSJeongbae Seo * save current clock index to know which clock bus 446253e0a7cSJeongbae Seo * is used later in overriding functions. 447253e0a7cSJeongbae Seo */ 448253e0a7cSJeongbae Seo sc->cur_clk = ptr; 449253e0a7cSJeongbae Seo 4500d1bb41aSBen Dooks clk_enable(clk); 4510d1bb41aSBen Dooks 4520d1bb41aSBen Dooks dev_info(dev, "clock source %d: %s (%ld Hz)\n", 4530d1bb41aSBen Dooks ptr, name, clk_get_rate(clk)); 4540d1bb41aSBen Dooks } 4550d1bb41aSBen Dooks 4560d1bb41aSBen Dooks if (clks == 0) { 4570d1bb41aSBen Dooks dev_err(dev, "failed to find any bus clocks\n"); 4580d1bb41aSBen Dooks ret = -ENOENT; 4590d1bb41aSBen Dooks goto err_no_busclks; 4600d1bb41aSBen Dooks } 4610d1bb41aSBen Dooks 4620d1bb41aSBen Dooks sc->ioarea = request_mem_region(res->start, resource_size(res), 4630d1bb41aSBen Dooks mmc_hostname(host->mmc)); 4640d1bb41aSBen Dooks if (!sc->ioarea) { 4650d1bb41aSBen Dooks dev_err(dev, "failed to reserve register area\n"); 4660d1bb41aSBen Dooks ret = -ENXIO; 4670d1bb41aSBen Dooks goto err_req_regs; 4680d1bb41aSBen Dooks } 4690d1bb41aSBen Dooks 4700d1bb41aSBen Dooks host->ioaddr = ioremap_nocache(res->start, resource_size(res)); 4710d1bb41aSBen Dooks if (!host->ioaddr) { 4720d1bb41aSBen Dooks dev_err(dev, "failed to map registers\n"); 4730d1bb41aSBen Dooks ret = -ENXIO; 4740d1bb41aSBen Dooks goto err_req_regs; 4750d1bb41aSBen Dooks } 4760d1bb41aSBen Dooks 4770d1bb41aSBen Dooks /* Ensure we have minimal gpio selected CMD/CLK/Detect */ 4780d1bb41aSBen Dooks if (pdata->cfg_gpio) 4790d1bb41aSBen Dooks pdata->cfg_gpio(pdev, pdata->max_width); 4800d1bb41aSBen Dooks 4810d1bb41aSBen Dooks host->hw_name = "samsung-hsmmc"; 4820d1bb41aSBen Dooks host->ops = &sdhci_s3c_ops; 4830d1bb41aSBen Dooks host->quirks = 0; 4840d1bb41aSBen Dooks host->irq = irq; 4850d1bb41aSBen Dooks 4860d1bb41aSBen Dooks /* Setup quirks for the controller */ 487b2e75effSThomas Abraham host->quirks |= SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC; 488a1d56460SMarek Szyprowski host->quirks |= SDHCI_QUIRK_NO_HISPD_BIT; 4890d1bb41aSBen Dooks 4900d1bb41aSBen Dooks #ifndef CONFIG_MMC_SDHCI_S3C_DMA 4910d1bb41aSBen Dooks 4920d1bb41aSBen Dooks /* we currently see overruns on errors, so disable the SDMA 4930d1bb41aSBen Dooks * support as well. */ 4940d1bb41aSBen Dooks host->quirks |= SDHCI_QUIRK_BROKEN_DMA; 4950d1bb41aSBen Dooks 4960d1bb41aSBen Dooks #endif /* CONFIG_MMC_SDHCI_S3C_DMA */ 4970d1bb41aSBen Dooks 4980d1bb41aSBen Dooks /* It seems we do not get an DATA transfer complete on non-busy 4990d1bb41aSBen Dooks * transfers, not sure if this is a problem with this specific 5000d1bb41aSBen Dooks * SDHCI block, or a missing configuration that needs to be set. */ 5010d1bb41aSBen Dooks host->quirks |= SDHCI_QUIRK_NO_BUSY_IRQ; 5020d1bb41aSBen Dooks 503732f0e31SKyungmin Park /* This host supports the Auto CMD12 */ 504732f0e31SKyungmin Park host->quirks |= SDHCI_QUIRK_MULTIBLOCK_READ_ACMD12; 505732f0e31SKyungmin Park 5067199e2b6SJaehoon Chung /* Samsung SoCs need BROKEN_ADMA_ZEROLEN_DESC */ 5077199e2b6SJaehoon Chung host->quirks |= SDHCI_QUIRK_BROKEN_ADMA_ZEROLEN_DESC; 5087199e2b6SJaehoon Chung 50917866e14SMarek Szyprowski if (pdata->cd_type == S3C_SDHCI_CD_NONE || 51017866e14SMarek Szyprowski pdata->cd_type == S3C_SDHCI_CD_PERMANENT) 51117866e14SMarek Szyprowski host->quirks |= SDHCI_QUIRK_BROKEN_CARD_DETECTION; 51217866e14SMarek Szyprowski 51317866e14SMarek Szyprowski if (pdata->cd_type == S3C_SDHCI_CD_PERMANENT) 51417866e14SMarek Szyprowski host->mmc->caps = MMC_CAP_NONREMOVABLE; 51517866e14SMarek Szyprowski 516548f07d2SJaehoon Chung if (pdata->host_caps) 517548f07d2SJaehoon Chung host->mmc->caps |= pdata->host_caps; 518548f07d2SJaehoon Chung 5190d1bb41aSBen Dooks host->quirks |= (SDHCI_QUIRK_32BIT_DMA_ADDR | 5200d1bb41aSBen Dooks SDHCI_QUIRK_32BIT_DMA_SIZE); 5210d1bb41aSBen Dooks 5223fe42e07SHyuk Lee /* HSMMC on Samsung SoCs uses SDCLK as timeout clock */ 5233fe42e07SHyuk Lee host->quirks |= SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK; 5243fe42e07SHyuk Lee 525253e0a7cSJeongbae Seo /* 526253e0a7cSJeongbae Seo * If controller does not have internal clock divider, 527253e0a7cSJeongbae Seo * we can use overriding functions instead of default. 528253e0a7cSJeongbae Seo */ 529253e0a7cSJeongbae Seo if (pdata->clk_type) { 530253e0a7cSJeongbae Seo sdhci_s3c_ops.set_clock = sdhci_cmu_set_clock; 531253e0a7cSJeongbae Seo sdhci_s3c_ops.get_min_clock = sdhci_cmu_get_min_clock; 532253e0a7cSJeongbae Seo sdhci_s3c_ops.get_max_clock = sdhci_cmu_get_max_clock; 533253e0a7cSJeongbae Seo } 534253e0a7cSJeongbae Seo 535b3824f2cSJeongbae Seo /* It supports additional host capabilities if needed */ 536b3824f2cSJeongbae Seo if (pdata->host_caps) 537b3824f2cSJeongbae Seo host->mmc->caps |= pdata->host_caps; 538b3824f2cSJeongbae Seo 5390d1bb41aSBen Dooks ret = sdhci_add_host(host); 5400d1bb41aSBen Dooks if (ret) { 5410d1bb41aSBen Dooks dev_err(dev, "sdhci_add_host() failed\n"); 5420d1bb41aSBen Dooks goto err_add_host; 5430d1bb41aSBen Dooks } 5440d1bb41aSBen Dooks 54517866e14SMarek Szyprowski /* The following two methods of card detection might call 54617866e14SMarek Szyprowski sdhci_s3c_notify_change() immediately, so they can be called 54717866e14SMarek Szyprowski only after sdhci_add_host(). Setup errors are ignored. */ 54817866e14SMarek Szyprowski if (pdata->cd_type == S3C_SDHCI_CD_EXTERNAL && pdata->ext_cd_init) 54917866e14SMarek Szyprowski pdata->ext_cd_init(&sdhci_s3c_notify_change); 55017866e14SMarek Szyprowski if (pdata->cd_type == S3C_SDHCI_CD_GPIO && 55117866e14SMarek Szyprowski gpio_is_valid(pdata->ext_cd_gpio)) 55217866e14SMarek Szyprowski sdhci_s3c_setup_card_detect_gpio(sc); 55317866e14SMarek Szyprowski 5540d1bb41aSBen Dooks return 0; 5550d1bb41aSBen Dooks 5560d1bb41aSBen Dooks err_add_host: 5570d1bb41aSBen Dooks release_resource(sc->ioarea); 5580d1bb41aSBen Dooks kfree(sc->ioarea); 5590d1bb41aSBen Dooks 5600d1bb41aSBen Dooks err_req_regs: 5610d1bb41aSBen Dooks for (ptr = 0; ptr < MAX_BUS_CLK; ptr++) { 5620d1bb41aSBen Dooks clk_disable(sc->clk_bus[ptr]); 5630d1bb41aSBen Dooks clk_put(sc->clk_bus[ptr]); 5640d1bb41aSBen Dooks } 5650d1bb41aSBen Dooks 5660d1bb41aSBen Dooks err_no_busclks: 5670d1bb41aSBen Dooks clk_disable(sc->clk_io); 5680d1bb41aSBen Dooks clk_put(sc->clk_io); 5690d1bb41aSBen Dooks 5700d1bb41aSBen Dooks err_io_clk: 5710d1bb41aSBen Dooks sdhci_free_host(host); 5720d1bb41aSBen Dooks 5730d1bb41aSBen Dooks return ret; 5740d1bb41aSBen Dooks } 5750d1bb41aSBen Dooks 5760d1bb41aSBen Dooks static int __devexit sdhci_s3c_remove(struct platform_device *pdev) 5770d1bb41aSBen Dooks { 57817866e14SMarek Szyprowski struct s3c_sdhci_platdata *pdata = pdev->dev.platform_data; 5799d51a6b2SMarek Szyprowski struct sdhci_host *host = platform_get_drvdata(pdev); 5809d51a6b2SMarek Szyprowski struct sdhci_s3c *sc = sdhci_priv(host); 5819d51a6b2SMarek Szyprowski int ptr; 5829d51a6b2SMarek Szyprowski 58317866e14SMarek Szyprowski if (pdata->cd_type == S3C_SDHCI_CD_EXTERNAL && pdata->ext_cd_cleanup) 58417866e14SMarek Szyprowski pdata->ext_cd_cleanup(&sdhci_s3c_notify_change); 58517866e14SMarek Szyprowski 58617866e14SMarek Szyprowski if (sc->ext_cd_irq) 58717866e14SMarek Szyprowski free_irq(sc->ext_cd_irq, sc); 58817866e14SMarek Szyprowski 58917866e14SMarek Szyprowski if (gpio_is_valid(sc->ext_cd_gpio)) 59017866e14SMarek Szyprowski gpio_free(sc->ext_cd_gpio); 59117866e14SMarek Szyprowski 5929d51a6b2SMarek Szyprowski sdhci_remove_host(host, 1); 5939d51a6b2SMarek Szyprowski 5949d51a6b2SMarek Szyprowski for (ptr = 0; ptr < 3; ptr++) { 5959320f7cbSMarek Szyprowski if (sc->clk_bus[ptr]) { 5969d51a6b2SMarek Szyprowski clk_disable(sc->clk_bus[ptr]); 5979d51a6b2SMarek Szyprowski clk_put(sc->clk_bus[ptr]); 5989d51a6b2SMarek Szyprowski } 5999320f7cbSMarek Szyprowski } 6009d51a6b2SMarek Szyprowski clk_disable(sc->clk_io); 6019d51a6b2SMarek Szyprowski clk_put(sc->clk_io); 6029d51a6b2SMarek Szyprowski 6039d51a6b2SMarek Szyprowski iounmap(host->ioaddr); 6049d51a6b2SMarek Szyprowski release_resource(sc->ioarea); 6059d51a6b2SMarek Szyprowski kfree(sc->ioarea); 6069d51a6b2SMarek Szyprowski 6079d51a6b2SMarek Szyprowski sdhci_free_host(host); 6089d51a6b2SMarek Szyprowski platform_set_drvdata(pdev, NULL); 6099d51a6b2SMarek Szyprowski 6100d1bb41aSBen Dooks return 0; 6110d1bb41aSBen Dooks } 6120d1bb41aSBen Dooks 6130d1bb41aSBen Dooks #ifdef CONFIG_PM 6140d1bb41aSBen Dooks 6150d1bb41aSBen Dooks static int sdhci_s3c_suspend(struct platform_device *dev, pm_message_t pm) 6160d1bb41aSBen Dooks { 6170d1bb41aSBen Dooks struct sdhci_host *host = platform_get_drvdata(dev); 6180d1bb41aSBen Dooks 61965d13516SWonil Choi return sdhci_suspend_host(host, pm); 6200d1bb41aSBen Dooks } 6210d1bb41aSBen Dooks 6220d1bb41aSBen Dooks static int sdhci_s3c_resume(struct platform_device *dev) 6230d1bb41aSBen Dooks { 6240d1bb41aSBen Dooks struct sdhci_host *host = platform_get_drvdata(dev); 6250d1bb41aSBen Dooks 62665d13516SWonil Choi return sdhci_resume_host(host); 6270d1bb41aSBen Dooks } 6280d1bb41aSBen Dooks 6290d1bb41aSBen Dooks #else 6300d1bb41aSBen Dooks #define sdhci_s3c_suspend NULL 6310d1bb41aSBen Dooks #define sdhci_s3c_resume NULL 6320d1bb41aSBen Dooks #endif 6330d1bb41aSBen Dooks 6340d1bb41aSBen Dooks static struct platform_driver sdhci_s3c_driver = { 6350d1bb41aSBen Dooks .probe = sdhci_s3c_probe, 6360d1bb41aSBen Dooks .remove = __devexit_p(sdhci_s3c_remove), 6370d1bb41aSBen Dooks .suspend = sdhci_s3c_suspend, 6380d1bb41aSBen Dooks .resume = sdhci_s3c_resume, 6390d1bb41aSBen Dooks .driver = { 6400d1bb41aSBen Dooks .owner = THIS_MODULE, 6410d1bb41aSBen Dooks .name = "s3c-sdhci", 6420d1bb41aSBen Dooks }, 6430d1bb41aSBen Dooks }; 6440d1bb41aSBen Dooks 6450d1bb41aSBen Dooks static int __init sdhci_s3c_init(void) 6460d1bb41aSBen Dooks { 6470d1bb41aSBen Dooks return platform_driver_register(&sdhci_s3c_driver); 6480d1bb41aSBen Dooks } 6490d1bb41aSBen Dooks 6500d1bb41aSBen Dooks static void __exit sdhci_s3c_exit(void) 6510d1bb41aSBen Dooks { 6520d1bb41aSBen Dooks platform_driver_unregister(&sdhci_s3c_driver); 6530d1bb41aSBen Dooks } 6540d1bb41aSBen Dooks 6550d1bb41aSBen Dooks module_init(sdhci_s3c_init); 6560d1bb41aSBen Dooks module_exit(sdhci_s3c_exit); 6570d1bb41aSBen Dooks 6580d1bb41aSBen Dooks MODULE_DESCRIPTION("Samsung SDHCI (HSMMC) glue"); 6590d1bb41aSBen Dooks MODULE_AUTHOR("Ben Dooks, <ben@simtec.co.uk>"); 6600d1bb41aSBen Dooks MODULE_LICENSE("GPL v2"); 6610d1bb41aSBen Dooks MODULE_ALIAS("platform:s3c-sdhci"); 662