10d1bb41aSBen Dooks /* linux/drivers/mmc/host/sdhci-s3c.c 20d1bb41aSBen Dooks * 30d1bb41aSBen Dooks * Copyright 2008 Openmoko Inc. 40d1bb41aSBen Dooks * Copyright 2008 Simtec Electronics 50d1bb41aSBen Dooks * Ben Dooks <ben@simtec.co.uk> 60d1bb41aSBen Dooks * http://armlinux.simtec.co.uk/ 70d1bb41aSBen Dooks * 80d1bb41aSBen Dooks * SDHCI (HSMMC) support for Samsung SoC 90d1bb41aSBen Dooks * 100d1bb41aSBen Dooks * This program is free software; you can redistribute it and/or modify 110d1bb41aSBen Dooks * it under the terms of the GNU General Public License version 2 as 120d1bb41aSBen Dooks * published by the Free Software Foundation. 130d1bb41aSBen Dooks */ 140d1bb41aSBen Dooks 150d1bb41aSBen Dooks #include <linux/delay.h> 160d1bb41aSBen Dooks #include <linux/dma-mapping.h> 170d1bb41aSBen Dooks #include <linux/platform_device.h> 185a0e3ad6STejun Heo #include <linux/slab.h> 190d1bb41aSBen Dooks #include <linux/clk.h> 200d1bb41aSBen Dooks #include <linux/io.h> 2117866e14SMarek Szyprowski #include <linux/gpio.h> 2255156d24SMark Brown #include <linux/module.h> 230d1bb41aSBen Dooks 240d1bb41aSBen Dooks #include <linux/mmc/host.h> 250d1bb41aSBen Dooks 260d1bb41aSBen Dooks #include <plat/sdhci.h> 270d1bb41aSBen Dooks #include <plat/regs-sdhci.h> 280d1bb41aSBen Dooks 290d1bb41aSBen Dooks #include "sdhci.h" 300d1bb41aSBen Dooks 310d1bb41aSBen Dooks #define MAX_BUS_CLK (4) 320d1bb41aSBen Dooks 330d1bb41aSBen Dooks /** 340d1bb41aSBen Dooks * struct sdhci_s3c - S3C SDHCI instance 350d1bb41aSBen Dooks * @host: The SDHCI host created 360d1bb41aSBen Dooks * @pdev: The platform device we where created from. 370d1bb41aSBen Dooks * @ioarea: The resource created when we claimed the IO area. 380d1bb41aSBen Dooks * @pdata: The platform data for this controller. 390d1bb41aSBen Dooks * @cur_clk: The index of the current bus clock. 400d1bb41aSBen Dooks * @clk_io: The clock for the internal bus interface. 410d1bb41aSBen Dooks * @clk_bus: The clocks that are available for the SD/MMC bus clock. 420d1bb41aSBen Dooks */ 430d1bb41aSBen Dooks struct sdhci_s3c { 440d1bb41aSBen Dooks struct sdhci_host *host; 450d1bb41aSBen Dooks struct platform_device *pdev; 460d1bb41aSBen Dooks struct resource *ioarea; 470d1bb41aSBen Dooks struct s3c_sdhci_platdata *pdata; 480d1bb41aSBen Dooks unsigned int cur_clk; 4917866e14SMarek Szyprowski int ext_cd_irq; 5017866e14SMarek Szyprowski int ext_cd_gpio; 510d1bb41aSBen Dooks 520d1bb41aSBen Dooks struct clk *clk_io; 530d1bb41aSBen Dooks struct clk *clk_bus[MAX_BUS_CLK]; 540d1bb41aSBen Dooks }; 550d1bb41aSBen Dooks 563119936aSThomas Abraham /** 573119936aSThomas Abraham * struct sdhci_s3c_driver_data - S3C SDHCI platform specific driver data 583119936aSThomas Abraham * @sdhci_quirks: sdhci host specific quirks. 593119936aSThomas Abraham * 603119936aSThomas Abraham * Specifies platform specific configuration of sdhci controller. 613119936aSThomas Abraham * Note: A structure for driver specific platform data is used for future 623119936aSThomas Abraham * expansion of its usage. 633119936aSThomas Abraham */ 643119936aSThomas Abraham struct sdhci_s3c_drv_data { 653119936aSThomas Abraham unsigned int sdhci_quirks; 663119936aSThomas Abraham }; 673119936aSThomas Abraham 680d1bb41aSBen Dooks static inline struct sdhci_s3c *to_s3c(struct sdhci_host *host) 690d1bb41aSBen Dooks { 700d1bb41aSBen Dooks return sdhci_priv(host); 710d1bb41aSBen Dooks } 720d1bb41aSBen Dooks 730d1bb41aSBen Dooks /** 740d1bb41aSBen Dooks * get_curclk - convert ctrl2 register to clock source number 750d1bb41aSBen Dooks * @ctrl2: Control2 register value. 760d1bb41aSBen Dooks */ 770d1bb41aSBen Dooks static u32 get_curclk(u32 ctrl2) 780d1bb41aSBen Dooks { 790d1bb41aSBen Dooks ctrl2 &= S3C_SDHCI_CTRL2_SELBASECLK_MASK; 800d1bb41aSBen Dooks ctrl2 >>= S3C_SDHCI_CTRL2_SELBASECLK_SHIFT; 810d1bb41aSBen Dooks 820d1bb41aSBen Dooks return ctrl2; 830d1bb41aSBen Dooks } 840d1bb41aSBen Dooks 850d1bb41aSBen Dooks static void sdhci_s3c_check_sclk(struct sdhci_host *host) 860d1bb41aSBen Dooks { 870d1bb41aSBen Dooks struct sdhci_s3c *ourhost = to_s3c(host); 880d1bb41aSBen Dooks u32 tmp = readl(host->ioaddr + S3C_SDHCI_CONTROL2); 890d1bb41aSBen Dooks 900d1bb41aSBen Dooks if (get_curclk(tmp) != ourhost->cur_clk) { 910d1bb41aSBen Dooks dev_dbg(&ourhost->pdev->dev, "restored ctrl2 clock setting\n"); 920d1bb41aSBen Dooks 930d1bb41aSBen Dooks tmp &= ~S3C_SDHCI_CTRL2_SELBASECLK_MASK; 940d1bb41aSBen Dooks tmp |= ourhost->cur_clk << S3C_SDHCI_CTRL2_SELBASECLK_SHIFT; 957003fecbSJingoo Han writel(tmp, host->ioaddr + S3C_SDHCI_CONTROL2); 960d1bb41aSBen Dooks } 970d1bb41aSBen Dooks } 980d1bb41aSBen Dooks 990d1bb41aSBen Dooks /** 1000d1bb41aSBen Dooks * sdhci_s3c_get_max_clk - callback to get maximum clock frequency. 1010d1bb41aSBen Dooks * @host: The SDHCI host instance. 1020d1bb41aSBen Dooks * 1030d1bb41aSBen Dooks * Callback to return the maximum clock rate acheivable by the controller. 1040d1bb41aSBen Dooks */ 1050d1bb41aSBen Dooks static unsigned int sdhci_s3c_get_max_clk(struct sdhci_host *host) 1060d1bb41aSBen Dooks { 1070d1bb41aSBen Dooks struct sdhci_s3c *ourhost = to_s3c(host); 1080d1bb41aSBen Dooks struct clk *busclk; 1090d1bb41aSBen Dooks unsigned int rate, max; 1100d1bb41aSBen Dooks int clk; 1110d1bb41aSBen Dooks 1120d1bb41aSBen Dooks /* note, a reset will reset the clock source */ 1130d1bb41aSBen Dooks 1140d1bb41aSBen Dooks sdhci_s3c_check_sclk(host); 1150d1bb41aSBen Dooks 1160d1bb41aSBen Dooks for (max = 0, clk = 0; clk < MAX_BUS_CLK; clk++) { 1170d1bb41aSBen Dooks busclk = ourhost->clk_bus[clk]; 1180d1bb41aSBen Dooks if (!busclk) 1190d1bb41aSBen Dooks continue; 1200d1bb41aSBen Dooks 1210d1bb41aSBen Dooks rate = clk_get_rate(busclk); 1220d1bb41aSBen Dooks if (rate > max) 1230d1bb41aSBen Dooks max = rate; 1240d1bb41aSBen Dooks } 1250d1bb41aSBen Dooks 1260d1bb41aSBen Dooks return max; 1270d1bb41aSBen Dooks } 1280d1bb41aSBen Dooks 1290d1bb41aSBen Dooks /** 1300d1bb41aSBen Dooks * sdhci_s3c_consider_clock - consider one the bus clocks for current setting 1310d1bb41aSBen Dooks * @ourhost: Our SDHCI instance. 1320d1bb41aSBen Dooks * @src: The source clock index. 1330d1bb41aSBen Dooks * @wanted: The clock frequency wanted. 1340d1bb41aSBen Dooks */ 1350d1bb41aSBen Dooks static unsigned int sdhci_s3c_consider_clock(struct sdhci_s3c *ourhost, 1360d1bb41aSBen Dooks unsigned int src, 1370d1bb41aSBen Dooks unsigned int wanted) 1380d1bb41aSBen Dooks { 1390d1bb41aSBen Dooks unsigned long rate; 1400d1bb41aSBen Dooks struct clk *clksrc = ourhost->clk_bus[src]; 1410d1bb41aSBen Dooks int div; 1420d1bb41aSBen Dooks 1430d1bb41aSBen Dooks if (!clksrc) 1440d1bb41aSBen Dooks return UINT_MAX; 1450d1bb41aSBen Dooks 146253e0a7cSJeongbae Seo /* 1473119936aSThomas Abraham * If controller uses a non-standard clock division, find the best clock 1483119936aSThomas Abraham * speed possible with selected clock source and skip the division. 149253e0a7cSJeongbae Seo */ 1503119936aSThomas Abraham if (ourhost->host->quirks & SDHCI_QUIRK_NONSTANDARD_CLOCK) { 151253e0a7cSJeongbae Seo rate = clk_round_rate(clksrc, wanted); 152253e0a7cSJeongbae Seo return wanted - rate; 153253e0a7cSJeongbae Seo } 154253e0a7cSJeongbae Seo 1550d1bb41aSBen Dooks rate = clk_get_rate(clksrc); 1560d1bb41aSBen Dooks 1570d1bb41aSBen Dooks for (div = 1; div < 256; div *= 2) { 1580d1bb41aSBen Dooks if ((rate / div) <= wanted) 1590d1bb41aSBen Dooks break; 1600d1bb41aSBen Dooks } 1610d1bb41aSBen Dooks 1620d1bb41aSBen Dooks dev_dbg(&ourhost->pdev->dev, "clk %d: rate %ld, want %d, got %ld\n", 1630d1bb41aSBen Dooks src, rate, wanted, rate / div); 1640d1bb41aSBen Dooks 1650d1bb41aSBen Dooks return (wanted - (rate / div)); 1660d1bb41aSBen Dooks } 1670d1bb41aSBen Dooks 1680d1bb41aSBen Dooks /** 1690d1bb41aSBen Dooks * sdhci_s3c_set_clock - callback on clock change 1700d1bb41aSBen Dooks * @host: The SDHCI host being changed 1710d1bb41aSBen Dooks * @clock: The clock rate being requested. 1720d1bb41aSBen Dooks * 1730d1bb41aSBen Dooks * When the card's clock is going to be changed, look at the new frequency 1740d1bb41aSBen Dooks * and find the best clock source to go with it. 1750d1bb41aSBen Dooks */ 1760d1bb41aSBen Dooks static void sdhci_s3c_set_clock(struct sdhci_host *host, unsigned int clock) 1770d1bb41aSBen Dooks { 1780d1bb41aSBen Dooks struct sdhci_s3c *ourhost = to_s3c(host); 1790d1bb41aSBen Dooks unsigned int best = UINT_MAX; 1800d1bb41aSBen Dooks unsigned int delta; 1810d1bb41aSBen Dooks int best_src = 0; 1820d1bb41aSBen Dooks int src; 1830d1bb41aSBen Dooks u32 ctrl; 1840d1bb41aSBen Dooks 1850d1bb41aSBen Dooks /* don't bother if the clock is going off. */ 1860d1bb41aSBen Dooks if (clock == 0) 1870d1bb41aSBen Dooks return; 1880d1bb41aSBen Dooks 1890d1bb41aSBen Dooks for (src = 0; src < MAX_BUS_CLK; src++) { 1900d1bb41aSBen Dooks delta = sdhci_s3c_consider_clock(ourhost, src, clock); 1910d1bb41aSBen Dooks if (delta < best) { 1920d1bb41aSBen Dooks best = delta; 1930d1bb41aSBen Dooks best_src = src; 1940d1bb41aSBen Dooks } 1950d1bb41aSBen Dooks } 1960d1bb41aSBen Dooks 1970d1bb41aSBen Dooks dev_dbg(&ourhost->pdev->dev, 1980d1bb41aSBen Dooks "selected source %d, clock %d, delta %d\n", 1990d1bb41aSBen Dooks best_src, clock, best); 2000d1bb41aSBen Dooks 2010d1bb41aSBen Dooks /* select the new clock source */ 2020d1bb41aSBen Dooks 2030d1bb41aSBen Dooks if (ourhost->cur_clk != best_src) { 2040d1bb41aSBen Dooks struct clk *clk = ourhost->clk_bus[best_src]; 2050d1bb41aSBen Dooks 2060d1bb41aSBen Dooks /* turn clock off to card before changing clock source */ 2070d1bb41aSBen Dooks writew(0, host->ioaddr + SDHCI_CLOCK_CONTROL); 2080d1bb41aSBen Dooks 2090d1bb41aSBen Dooks ourhost->cur_clk = best_src; 2100d1bb41aSBen Dooks host->max_clk = clk_get_rate(clk); 2110d1bb41aSBen Dooks 2120d1bb41aSBen Dooks ctrl = readl(host->ioaddr + S3C_SDHCI_CONTROL2); 2130d1bb41aSBen Dooks ctrl &= ~S3C_SDHCI_CTRL2_SELBASECLK_MASK; 2140d1bb41aSBen Dooks ctrl |= best_src << S3C_SDHCI_CTRL2_SELBASECLK_SHIFT; 2150d1bb41aSBen Dooks writel(ctrl, host->ioaddr + S3C_SDHCI_CONTROL2); 2160d1bb41aSBen Dooks } 2170d1bb41aSBen Dooks 2186fe47179SThomas Abraham /* reprogram default hardware configuration */ 2196fe47179SThomas Abraham writel(S3C64XX_SDHCI_CONTROL4_DRIVE_9mA, 2206fe47179SThomas Abraham host->ioaddr + S3C64XX_SDHCI_CONTROL4); 2210d1bb41aSBen Dooks 2226fe47179SThomas Abraham ctrl = readl(host->ioaddr + S3C_SDHCI_CONTROL2); 2236fe47179SThomas Abraham ctrl |= (S3C64XX_SDHCI_CTRL2_ENSTAASYNCCLR | 2246fe47179SThomas Abraham S3C64XX_SDHCI_CTRL2_ENCMDCNFMSK | 2256fe47179SThomas Abraham S3C_SDHCI_CTRL2_ENFBCLKRX | 2266fe47179SThomas Abraham S3C_SDHCI_CTRL2_DFCNT_NONE | 2276fe47179SThomas Abraham S3C_SDHCI_CTRL2_ENCLKOUTHOLD); 2286fe47179SThomas Abraham writel(ctrl, host->ioaddr + S3C_SDHCI_CONTROL2); 2290d1bb41aSBen Dooks 2306fe47179SThomas Abraham /* reconfigure the controller for new clock rate */ 2316fe47179SThomas Abraham ctrl = (S3C_SDHCI_CTRL3_FCSEL1 | S3C_SDHCI_CTRL3_FCSEL0); 2326fe47179SThomas Abraham if (clock < 25 * 1000000) 2336fe47179SThomas Abraham ctrl |= (S3C_SDHCI_CTRL3_FCSEL3 | S3C_SDHCI_CTRL3_FCSEL2); 2346fe47179SThomas Abraham writel(ctrl, host->ioaddr + S3C_SDHCI_CONTROL3); 2350d1bb41aSBen Dooks } 2360d1bb41aSBen Dooks 237ce5f036bSMarek Szyprowski /** 238ce5f036bSMarek Szyprowski * sdhci_s3c_get_min_clock - callback to get minimal supported clock value 239ce5f036bSMarek Szyprowski * @host: The SDHCI host being queried 240ce5f036bSMarek Szyprowski * 241ce5f036bSMarek Szyprowski * To init mmc host properly a minimal clock value is needed. For high system 242ce5f036bSMarek Szyprowski * bus clock's values the standard formula gives values out of allowed range. 243ce5f036bSMarek Szyprowski * The clock still can be set to lower values, if clock source other then 244ce5f036bSMarek Szyprowski * system bus is selected. 245ce5f036bSMarek Szyprowski */ 246ce5f036bSMarek Szyprowski static unsigned int sdhci_s3c_get_min_clock(struct sdhci_host *host) 247ce5f036bSMarek Szyprowski { 248ce5f036bSMarek Szyprowski struct sdhci_s3c *ourhost = to_s3c(host); 249ce5f036bSMarek Szyprowski unsigned int delta, min = UINT_MAX; 250ce5f036bSMarek Szyprowski int src; 251ce5f036bSMarek Szyprowski 252ce5f036bSMarek Szyprowski for (src = 0; src < MAX_BUS_CLK; src++) { 253ce5f036bSMarek Szyprowski delta = sdhci_s3c_consider_clock(ourhost, src, 0); 254ce5f036bSMarek Szyprowski if (delta == UINT_MAX) 255ce5f036bSMarek Szyprowski continue; 256ce5f036bSMarek Szyprowski /* delta is a negative value in this case */ 257ce5f036bSMarek Szyprowski if (-delta < min) 258ce5f036bSMarek Szyprowski min = -delta; 259ce5f036bSMarek Szyprowski } 260ce5f036bSMarek Szyprowski return min; 261ce5f036bSMarek Szyprowski } 262ce5f036bSMarek Szyprowski 263253e0a7cSJeongbae Seo /* sdhci_cmu_get_max_clk - callback to get maximum clock frequency.*/ 264253e0a7cSJeongbae Seo static unsigned int sdhci_cmu_get_max_clock(struct sdhci_host *host) 265253e0a7cSJeongbae Seo { 266253e0a7cSJeongbae Seo struct sdhci_s3c *ourhost = to_s3c(host); 267253e0a7cSJeongbae Seo 268253e0a7cSJeongbae Seo return clk_round_rate(ourhost->clk_bus[ourhost->cur_clk], UINT_MAX); 269253e0a7cSJeongbae Seo } 270253e0a7cSJeongbae Seo 271253e0a7cSJeongbae Seo /* sdhci_cmu_get_min_clock - callback to get minimal supported clock value. */ 272253e0a7cSJeongbae Seo static unsigned int sdhci_cmu_get_min_clock(struct sdhci_host *host) 273253e0a7cSJeongbae Seo { 274253e0a7cSJeongbae Seo struct sdhci_s3c *ourhost = to_s3c(host); 275253e0a7cSJeongbae Seo 276253e0a7cSJeongbae Seo /* 277253e0a7cSJeongbae Seo * initial clock can be in the frequency range of 278253e0a7cSJeongbae Seo * 100KHz-400KHz, so we set it as max value. 279253e0a7cSJeongbae Seo */ 280253e0a7cSJeongbae Seo return clk_round_rate(ourhost->clk_bus[ourhost->cur_clk], 400000); 281253e0a7cSJeongbae Seo } 282253e0a7cSJeongbae Seo 283253e0a7cSJeongbae Seo /* sdhci_cmu_set_clock - callback on clock change.*/ 284253e0a7cSJeongbae Seo static void sdhci_cmu_set_clock(struct sdhci_host *host, unsigned int clock) 285253e0a7cSJeongbae Seo { 286253e0a7cSJeongbae Seo struct sdhci_s3c *ourhost = to_s3c(host); 2873119936aSThomas Abraham unsigned long timeout; 2883119936aSThomas Abraham u16 clk = 0; 289253e0a7cSJeongbae Seo 290253e0a7cSJeongbae Seo /* don't bother if the clock is going off */ 291253e0a7cSJeongbae Seo if (clock == 0) 292253e0a7cSJeongbae Seo return; 293253e0a7cSJeongbae Seo 294253e0a7cSJeongbae Seo sdhci_s3c_set_clock(host, clock); 295253e0a7cSJeongbae Seo 296253e0a7cSJeongbae Seo clk_set_rate(ourhost->clk_bus[ourhost->cur_clk], clock); 297253e0a7cSJeongbae Seo 298253e0a7cSJeongbae Seo host->clock = clock; 2993119936aSThomas Abraham 3003119936aSThomas Abraham clk = SDHCI_CLOCK_INT_EN; 3013119936aSThomas Abraham sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); 3023119936aSThomas Abraham 3033119936aSThomas Abraham /* Wait max 20 ms */ 3043119936aSThomas Abraham timeout = 20; 3053119936aSThomas Abraham while (!((clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL)) 3063119936aSThomas Abraham & SDHCI_CLOCK_INT_STABLE)) { 3073119936aSThomas Abraham if (timeout == 0) { 3083119936aSThomas Abraham printk(KERN_ERR "%s: Internal clock never " 3093119936aSThomas Abraham "stabilised.\n", mmc_hostname(host->mmc)); 3103119936aSThomas Abraham return; 3113119936aSThomas Abraham } 3123119936aSThomas Abraham timeout--; 3133119936aSThomas Abraham mdelay(1); 3143119936aSThomas Abraham } 3153119936aSThomas Abraham 3163119936aSThomas Abraham clk |= SDHCI_CLOCK_CARD_EN; 3173119936aSThomas Abraham sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); 318253e0a7cSJeongbae Seo } 319253e0a7cSJeongbae Seo 320548f07d2SJaehoon Chung /** 321548f07d2SJaehoon Chung * sdhci_s3c_platform_8bit_width - support 8bit buswidth 322548f07d2SJaehoon Chung * @host: The SDHCI host being queried 323548f07d2SJaehoon Chung * @width: MMC_BUS_WIDTH_ macro for the bus width being requested 324548f07d2SJaehoon Chung * 325548f07d2SJaehoon Chung * We have 8-bit width support but is not a v3 controller. 326548f07d2SJaehoon Chung * So we add platform_8bit_width() and support 8bit width. 327548f07d2SJaehoon Chung */ 328548f07d2SJaehoon Chung static int sdhci_s3c_platform_8bit_width(struct sdhci_host *host, int width) 329548f07d2SJaehoon Chung { 330548f07d2SJaehoon Chung u8 ctrl; 331548f07d2SJaehoon Chung 332548f07d2SJaehoon Chung ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL); 333548f07d2SJaehoon Chung 334548f07d2SJaehoon Chung switch (width) { 335548f07d2SJaehoon Chung case MMC_BUS_WIDTH_8: 336548f07d2SJaehoon Chung ctrl |= SDHCI_CTRL_8BITBUS; 337548f07d2SJaehoon Chung ctrl &= ~SDHCI_CTRL_4BITBUS; 338548f07d2SJaehoon Chung break; 339548f07d2SJaehoon Chung case MMC_BUS_WIDTH_4: 340548f07d2SJaehoon Chung ctrl |= SDHCI_CTRL_4BITBUS; 341548f07d2SJaehoon Chung ctrl &= ~SDHCI_CTRL_8BITBUS; 342548f07d2SJaehoon Chung break; 343548f07d2SJaehoon Chung default: 34449bb1e61SGirish K S ctrl &= ~SDHCI_CTRL_4BITBUS; 34549bb1e61SGirish K S ctrl &= ~SDHCI_CTRL_8BITBUS; 346548f07d2SJaehoon Chung break; 347548f07d2SJaehoon Chung } 348548f07d2SJaehoon Chung 349548f07d2SJaehoon Chung sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL); 350548f07d2SJaehoon Chung 351548f07d2SJaehoon Chung return 0; 352548f07d2SJaehoon Chung } 353548f07d2SJaehoon Chung 3540d1bb41aSBen Dooks static struct sdhci_ops sdhci_s3c_ops = { 3550d1bb41aSBen Dooks .get_max_clock = sdhci_s3c_get_max_clk, 3560d1bb41aSBen Dooks .set_clock = sdhci_s3c_set_clock, 357ce5f036bSMarek Szyprowski .get_min_clock = sdhci_s3c_get_min_clock, 358548f07d2SJaehoon Chung .platform_8bit_width = sdhci_s3c_platform_8bit_width, 3590d1bb41aSBen Dooks }; 3600d1bb41aSBen Dooks 36117866e14SMarek Szyprowski static void sdhci_s3c_notify_change(struct platform_device *dev, int state) 36217866e14SMarek Szyprowski { 36317866e14SMarek Szyprowski struct sdhci_host *host = platform_get_drvdata(dev); 36406fe577fSMarek Szyprowski unsigned long flags; 36506fe577fSMarek Szyprowski 36617866e14SMarek Szyprowski if (host) { 36706fe577fSMarek Szyprowski spin_lock_irqsave(&host->lock, flags); 36817866e14SMarek Szyprowski if (state) { 36917866e14SMarek Szyprowski dev_dbg(&dev->dev, "card inserted.\n"); 37017866e14SMarek Szyprowski host->flags &= ~SDHCI_DEVICE_DEAD; 37117866e14SMarek Szyprowski host->quirks |= SDHCI_QUIRK_BROKEN_CARD_DETECTION; 37217866e14SMarek Szyprowski } else { 37317866e14SMarek Szyprowski dev_dbg(&dev->dev, "card removed.\n"); 37417866e14SMarek Szyprowski host->flags |= SDHCI_DEVICE_DEAD; 37517866e14SMarek Szyprowski host->quirks &= ~SDHCI_QUIRK_BROKEN_CARD_DETECTION; 37617866e14SMarek Szyprowski } 377f522886eSKyungmin Park tasklet_schedule(&host->card_tasklet); 37806fe577fSMarek Szyprowski spin_unlock_irqrestore(&host->lock, flags); 37917866e14SMarek Szyprowski } 38017866e14SMarek Szyprowski } 38117866e14SMarek Szyprowski 38217866e14SMarek Szyprowski static irqreturn_t sdhci_s3c_gpio_card_detect_thread(int irq, void *dev_id) 38317866e14SMarek Szyprowski { 38417866e14SMarek Szyprowski struct sdhci_s3c *sc = dev_id; 38517866e14SMarek Szyprowski int status = gpio_get_value(sc->ext_cd_gpio); 38617866e14SMarek Szyprowski if (sc->pdata->ext_cd_gpio_invert) 38717866e14SMarek Szyprowski status = !status; 38817866e14SMarek Szyprowski sdhci_s3c_notify_change(sc->pdev, status); 38917866e14SMarek Szyprowski return IRQ_HANDLED; 39017866e14SMarek Szyprowski } 39117866e14SMarek Szyprowski 39217866e14SMarek Szyprowski static void sdhci_s3c_setup_card_detect_gpio(struct sdhci_s3c *sc) 39317866e14SMarek Szyprowski { 39417866e14SMarek Szyprowski struct s3c_sdhci_platdata *pdata = sc->pdata; 39517866e14SMarek Szyprowski struct device *dev = &sc->pdev->dev; 39617866e14SMarek Szyprowski 39717866e14SMarek Szyprowski if (gpio_request(pdata->ext_cd_gpio, "SDHCI EXT CD") == 0) { 39817866e14SMarek Szyprowski sc->ext_cd_gpio = pdata->ext_cd_gpio; 39917866e14SMarek Szyprowski sc->ext_cd_irq = gpio_to_irq(pdata->ext_cd_gpio); 40017866e14SMarek Szyprowski if (sc->ext_cd_irq && 40117866e14SMarek Szyprowski request_threaded_irq(sc->ext_cd_irq, NULL, 40217866e14SMarek Szyprowski sdhci_s3c_gpio_card_detect_thread, 40317866e14SMarek Szyprowski IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING, 40417866e14SMarek Szyprowski dev_name(dev), sc) == 0) { 40517866e14SMarek Szyprowski int status = gpio_get_value(sc->ext_cd_gpio); 40617866e14SMarek Szyprowski if (pdata->ext_cd_gpio_invert) 40717866e14SMarek Szyprowski status = !status; 40817866e14SMarek Szyprowski sdhci_s3c_notify_change(sc->pdev, status); 40917866e14SMarek Szyprowski } else { 41017866e14SMarek Szyprowski dev_warn(dev, "cannot request irq for card detect\n"); 41117866e14SMarek Szyprowski sc->ext_cd_irq = 0; 41217866e14SMarek Szyprowski } 41317866e14SMarek Szyprowski } else { 41417866e14SMarek Szyprowski dev_err(dev, "cannot request gpio for card detect\n"); 41517866e14SMarek Szyprowski } 41617866e14SMarek Szyprowski } 41717866e14SMarek Szyprowski 4183119936aSThomas Abraham static inline struct sdhci_s3c_drv_data *sdhci_s3c_get_driver_data( 4193119936aSThomas Abraham struct platform_device *pdev) 4203119936aSThomas Abraham { 4213119936aSThomas Abraham return (struct sdhci_s3c_drv_data *) 4223119936aSThomas Abraham platform_get_device_id(pdev)->driver_data; 4233119936aSThomas Abraham } 4243119936aSThomas Abraham 4250d1bb41aSBen Dooks static int __devinit sdhci_s3c_probe(struct platform_device *pdev) 4260d1bb41aSBen Dooks { 4271d4dc338SThomas Abraham struct s3c_sdhci_platdata *pdata; 4283119936aSThomas Abraham struct sdhci_s3c_drv_data *drv_data; 4290d1bb41aSBen Dooks struct device *dev = &pdev->dev; 4300d1bb41aSBen Dooks struct sdhci_host *host; 4310d1bb41aSBen Dooks struct sdhci_s3c *sc; 4320d1bb41aSBen Dooks struct resource *res; 4330d1bb41aSBen Dooks int ret, irq, ptr, clks; 4340d1bb41aSBen Dooks 4351d4dc338SThomas Abraham if (!pdev->dev.platform_data) { 4360d1bb41aSBen Dooks dev_err(dev, "no device data specified\n"); 4370d1bb41aSBen Dooks return -ENOENT; 4380d1bb41aSBen Dooks } 4390d1bb41aSBen Dooks 4400d1bb41aSBen Dooks irq = platform_get_irq(pdev, 0); 4410d1bb41aSBen Dooks if (irq < 0) { 4420d1bb41aSBen Dooks dev_err(dev, "no irq specified\n"); 4430d1bb41aSBen Dooks return irq; 4440d1bb41aSBen Dooks } 4450d1bb41aSBen Dooks 4460d1bb41aSBen Dooks res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 4470d1bb41aSBen Dooks if (!res) { 4480d1bb41aSBen Dooks dev_err(dev, "no memory specified\n"); 4490d1bb41aSBen Dooks return -ENOENT; 4500d1bb41aSBen Dooks } 4510d1bb41aSBen Dooks 4520d1bb41aSBen Dooks host = sdhci_alloc_host(dev, sizeof(struct sdhci_s3c)); 4530d1bb41aSBen Dooks if (IS_ERR(host)) { 4540d1bb41aSBen Dooks dev_err(dev, "sdhci_alloc_host() failed\n"); 4550d1bb41aSBen Dooks return PTR_ERR(host); 4560d1bb41aSBen Dooks } 4570d1bb41aSBen Dooks 4581d4dc338SThomas Abraham pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL); 4591d4dc338SThomas Abraham if (!pdata) { 4601d4dc338SThomas Abraham ret = -ENOMEM; 4611d4dc338SThomas Abraham goto err_io_clk; 4621d4dc338SThomas Abraham } 4631d4dc338SThomas Abraham memcpy(pdata, pdev->dev.platform_data, sizeof(*pdata)); 4641d4dc338SThomas Abraham 4653119936aSThomas Abraham drv_data = sdhci_s3c_get_driver_data(pdev); 4660d1bb41aSBen Dooks sc = sdhci_priv(host); 4670d1bb41aSBen Dooks 4680d1bb41aSBen Dooks sc->host = host; 4690d1bb41aSBen Dooks sc->pdev = pdev; 4700d1bb41aSBen Dooks sc->pdata = pdata; 47117866e14SMarek Szyprowski sc->ext_cd_gpio = -1; /* invalid gpio number */ 4720d1bb41aSBen Dooks 4730d1bb41aSBen Dooks platform_set_drvdata(pdev, host); 4740d1bb41aSBen Dooks 4750d1bb41aSBen Dooks sc->clk_io = clk_get(dev, "hsmmc"); 4760d1bb41aSBen Dooks if (IS_ERR(sc->clk_io)) { 4770d1bb41aSBen Dooks dev_err(dev, "failed to get io clock\n"); 4780d1bb41aSBen Dooks ret = PTR_ERR(sc->clk_io); 4790d1bb41aSBen Dooks goto err_io_clk; 4800d1bb41aSBen Dooks } 4810d1bb41aSBen Dooks 4820d1bb41aSBen Dooks /* enable the local io clock and keep it running for the moment. */ 4830d1bb41aSBen Dooks clk_enable(sc->clk_io); 4840d1bb41aSBen Dooks 4850d1bb41aSBen Dooks for (clks = 0, ptr = 0; ptr < MAX_BUS_CLK; ptr++) { 4860d1bb41aSBen Dooks struct clk *clk; 4874346b6d9SRajeshwari Shinde char name[14]; 4880d1bb41aSBen Dooks 4894346b6d9SRajeshwari Shinde snprintf(name, 14, "mmc_busclk.%d", ptr); 4900d1bb41aSBen Dooks clk = clk_get(dev, name); 4910d1bb41aSBen Dooks if (IS_ERR(clk)) { 4920d1bb41aSBen Dooks continue; 4930d1bb41aSBen Dooks } 4940d1bb41aSBen Dooks 4950d1bb41aSBen Dooks clks++; 4960d1bb41aSBen Dooks sc->clk_bus[ptr] = clk; 497253e0a7cSJeongbae Seo 498253e0a7cSJeongbae Seo /* 499253e0a7cSJeongbae Seo * save current clock index to know which clock bus 500253e0a7cSJeongbae Seo * is used later in overriding functions. 501253e0a7cSJeongbae Seo */ 502253e0a7cSJeongbae Seo sc->cur_clk = ptr; 503253e0a7cSJeongbae Seo 5040d1bb41aSBen Dooks clk_enable(clk); 5050d1bb41aSBen Dooks 5060d1bb41aSBen Dooks dev_info(dev, "clock source %d: %s (%ld Hz)\n", 5070d1bb41aSBen Dooks ptr, name, clk_get_rate(clk)); 5080d1bb41aSBen Dooks } 5090d1bb41aSBen Dooks 5100d1bb41aSBen Dooks if (clks == 0) { 5110d1bb41aSBen Dooks dev_err(dev, "failed to find any bus clocks\n"); 5120d1bb41aSBen Dooks ret = -ENOENT; 5130d1bb41aSBen Dooks goto err_no_busclks; 5140d1bb41aSBen Dooks } 5150d1bb41aSBen Dooks 5160d1bb41aSBen Dooks sc->ioarea = request_mem_region(res->start, resource_size(res), 5170d1bb41aSBen Dooks mmc_hostname(host->mmc)); 5180d1bb41aSBen Dooks if (!sc->ioarea) { 5190d1bb41aSBen Dooks dev_err(dev, "failed to reserve register area\n"); 5200d1bb41aSBen Dooks ret = -ENXIO; 5210d1bb41aSBen Dooks goto err_req_regs; 5220d1bb41aSBen Dooks } 5230d1bb41aSBen Dooks 5240d1bb41aSBen Dooks host->ioaddr = ioremap_nocache(res->start, resource_size(res)); 5250d1bb41aSBen Dooks if (!host->ioaddr) { 5260d1bb41aSBen Dooks dev_err(dev, "failed to map registers\n"); 5270d1bb41aSBen Dooks ret = -ENXIO; 5280d1bb41aSBen Dooks goto err_req_regs; 5290d1bb41aSBen Dooks } 5300d1bb41aSBen Dooks 5310d1bb41aSBen Dooks /* Ensure we have minimal gpio selected CMD/CLK/Detect */ 5320d1bb41aSBen Dooks if (pdata->cfg_gpio) 5330d1bb41aSBen Dooks pdata->cfg_gpio(pdev, pdata->max_width); 5340d1bb41aSBen Dooks 5350d1bb41aSBen Dooks host->hw_name = "samsung-hsmmc"; 5360d1bb41aSBen Dooks host->ops = &sdhci_s3c_ops; 5370d1bb41aSBen Dooks host->quirks = 0; 5380d1bb41aSBen Dooks host->irq = irq; 5390d1bb41aSBen Dooks 5400d1bb41aSBen Dooks /* Setup quirks for the controller */ 541b2e75effSThomas Abraham host->quirks |= SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC; 542a1d56460SMarek Szyprowski host->quirks |= SDHCI_QUIRK_NO_HISPD_BIT; 5433119936aSThomas Abraham if (drv_data) 5443119936aSThomas Abraham host->quirks |= drv_data->sdhci_quirks; 5450d1bb41aSBen Dooks 5460d1bb41aSBen Dooks #ifndef CONFIG_MMC_SDHCI_S3C_DMA 5470d1bb41aSBen Dooks 5480d1bb41aSBen Dooks /* we currently see overruns on errors, so disable the SDMA 5490d1bb41aSBen Dooks * support as well. */ 5500d1bb41aSBen Dooks host->quirks |= SDHCI_QUIRK_BROKEN_DMA; 5510d1bb41aSBen Dooks 5520d1bb41aSBen Dooks #endif /* CONFIG_MMC_SDHCI_S3C_DMA */ 5530d1bb41aSBen Dooks 5540d1bb41aSBen Dooks /* It seems we do not get an DATA transfer complete on non-busy 5550d1bb41aSBen Dooks * transfers, not sure if this is a problem with this specific 5560d1bb41aSBen Dooks * SDHCI block, or a missing configuration that needs to be set. */ 5570d1bb41aSBen Dooks host->quirks |= SDHCI_QUIRK_NO_BUSY_IRQ; 5580d1bb41aSBen Dooks 559732f0e31SKyungmin Park /* This host supports the Auto CMD12 */ 560732f0e31SKyungmin Park host->quirks |= SDHCI_QUIRK_MULTIBLOCK_READ_ACMD12; 561732f0e31SKyungmin Park 5627199e2b6SJaehoon Chung /* Samsung SoCs need BROKEN_ADMA_ZEROLEN_DESC */ 5637199e2b6SJaehoon Chung host->quirks |= SDHCI_QUIRK_BROKEN_ADMA_ZEROLEN_DESC; 5647199e2b6SJaehoon Chung 56517866e14SMarek Szyprowski if (pdata->cd_type == S3C_SDHCI_CD_NONE || 56617866e14SMarek Szyprowski pdata->cd_type == S3C_SDHCI_CD_PERMANENT) 56717866e14SMarek Szyprowski host->quirks |= SDHCI_QUIRK_BROKEN_CARD_DETECTION; 56817866e14SMarek Szyprowski 56917866e14SMarek Szyprowski if (pdata->cd_type == S3C_SDHCI_CD_PERMANENT) 57017866e14SMarek Szyprowski host->mmc->caps = MMC_CAP_NONREMOVABLE; 57117866e14SMarek Szyprowski 5720d22c770SThomas Abraham switch (pdata->max_width) { 5730d22c770SThomas Abraham case 8: 5740d22c770SThomas Abraham host->mmc->caps |= MMC_CAP_8_BIT_DATA; 5750d22c770SThomas Abraham case 4: 5760d22c770SThomas Abraham host->mmc->caps |= MMC_CAP_4_BIT_DATA; 5770d22c770SThomas Abraham break; 5780d22c770SThomas Abraham } 5790d22c770SThomas Abraham 580fa1773ccSSangwook Lee if (pdata->pm_caps) 581fa1773ccSSangwook Lee host->mmc->pm_caps |= pdata->pm_caps; 582fa1773ccSSangwook Lee 5830d1bb41aSBen Dooks host->quirks |= (SDHCI_QUIRK_32BIT_DMA_ADDR | 5840d1bb41aSBen Dooks SDHCI_QUIRK_32BIT_DMA_SIZE); 5850d1bb41aSBen Dooks 5863fe42e07SHyuk Lee /* HSMMC on Samsung SoCs uses SDCLK as timeout clock */ 5873fe42e07SHyuk Lee host->quirks |= SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK; 5883fe42e07SHyuk Lee 589253e0a7cSJeongbae Seo /* 590253e0a7cSJeongbae Seo * If controller does not have internal clock divider, 591253e0a7cSJeongbae Seo * we can use overriding functions instead of default. 592253e0a7cSJeongbae Seo */ 5933119936aSThomas Abraham if (host->quirks & SDHCI_QUIRK_NONSTANDARD_CLOCK) { 594253e0a7cSJeongbae Seo sdhci_s3c_ops.set_clock = sdhci_cmu_set_clock; 595253e0a7cSJeongbae Seo sdhci_s3c_ops.get_min_clock = sdhci_cmu_get_min_clock; 596253e0a7cSJeongbae Seo sdhci_s3c_ops.get_max_clock = sdhci_cmu_get_max_clock; 597253e0a7cSJeongbae Seo } 598253e0a7cSJeongbae Seo 599b3824f2cSJeongbae Seo /* It supports additional host capabilities if needed */ 600b3824f2cSJeongbae Seo if (pdata->host_caps) 601b3824f2cSJeongbae Seo host->mmc->caps |= pdata->host_caps; 602b3824f2cSJeongbae Seo 603c1c4b66dSJaehoon Chung if (pdata->host_caps2) 604c1c4b66dSJaehoon Chung host->mmc->caps2 |= pdata->host_caps2; 605c1c4b66dSJaehoon Chung 6060d1bb41aSBen Dooks ret = sdhci_add_host(host); 6070d1bb41aSBen Dooks if (ret) { 6080d1bb41aSBen Dooks dev_err(dev, "sdhci_add_host() failed\n"); 6090d1bb41aSBen Dooks goto err_add_host; 6100d1bb41aSBen Dooks } 6110d1bb41aSBen Dooks 61217866e14SMarek Szyprowski /* The following two methods of card detection might call 61317866e14SMarek Szyprowski sdhci_s3c_notify_change() immediately, so they can be called 61417866e14SMarek Szyprowski only after sdhci_add_host(). Setup errors are ignored. */ 61517866e14SMarek Szyprowski if (pdata->cd_type == S3C_SDHCI_CD_EXTERNAL && pdata->ext_cd_init) 61617866e14SMarek Szyprowski pdata->ext_cd_init(&sdhci_s3c_notify_change); 61717866e14SMarek Szyprowski if (pdata->cd_type == S3C_SDHCI_CD_GPIO && 61817866e14SMarek Szyprowski gpio_is_valid(pdata->ext_cd_gpio)) 61917866e14SMarek Szyprowski sdhci_s3c_setup_card_detect_gpio(sc); 62017866e14SMarek Szyprowski 6210d1bb41aSBen Dooks return 0; 6220d1bb41aSBen Dooks 6230d1bb41aSBen Dooks err_add_host: 6240d1bb41aSBen Dooks release_resource(sc->ioarea); 6250d1bb41aSBen Dooks kfree(sc->ioarea); 6260d1bb41aSBen Dooks 6270d1bb41aSBen Dooks err_req_regs: 6280d1bb41aSBen Dooks for (ptr = 0; ptr < MAX_BUS_CLK; ptr++) { 629326adda5SJaehoon Chung if (sc->clk_bus[ptr]) { 6300d1bb41aSBen Dooks clk_disable(sc->clk_bus[ptr]); 6310d1bb41aSBen Dooks clk_put(sc->clk_bus[ptr]); 6320d1bb41aSBen Dooks } 633326adda5SJaehoon Chung } 6340d1bb41aSBen Dooks 6350d1bb41aSBen Dooks err_no_busclks: 6360d1bb41aSBen Dooks clk_disable(sc->clk_io); 6370d1bb41aSBen Dooks clk_put(sc->clk_io); 6380d1bb41aSBen Dooks 6390d1bb41aSBen Dooks err_io_clk: 6400d1bb41aSBen Dooks sdhci_free_host(host); 6410d1bb41aSBen Dooks 6420d1bb41aSBen Dooks return ret; 6430d1bb41aSBen Dooks } 6440d1bb41aSBen Dooks 6450d1bb41aSBen Dooks static int __devexit sdhci_s3c_remove(struct platform_device *pdev) 6460d1bb41aSBen Dooks { 64717866e14SMarek Szyprowski struct s3c_sdhci_platdata *pdata = pdev->dev.platform_data; 6489d51a6b2SMarek Szyprowski struct sdhci_host *host = platform_get_drvdata(pdev); 6499d51a6b2SMarek Szyprowski struct sdhci_s3c *sc = sdhci_priv(host); 6509d51a6b2SMarek Szyprowski int ptr; 6519d51a6b2SMarek Szyprowski 65217866e14SMarek Szyprowski if (pdata->cd_type == S3C_SDHCI_CD_EXTERNAL && pdata->ext_cd_cleanup) 65317866e14SMarek Szyprowski pdata->ext_cd_cleanup(&sdhci_s3c_notify_change); 65417866e14SMarek Szyprowski 65517866e14SMarek Szyprowski if (sc->ext_cd_irq) 65617866e14SMarek Szyprowski free_irq(sc->ext_cd_irq, sc); 65717866e14SMarek Szyprowski 65817866e14SMarek Szyprowski if (gpio_is_valid(sc->ext_cd_gpio)) 65917866e14SMarek Szyprowski gpio_free(sc->ext_cd_gpio); 66017866e14SMarek Szyprowski 6619d51a6b2SMarek Szyprowski sdhci_remove_host(host, 1); 6629d51a6b2SMarek Szyprowski 6639d51a6b2SMarek Szyprowski for (ptr = 0; ptr < 3; ptr++) { 6649320f7cbSMarek Szyprowski if (sc->clk_bus[ptr]) { 6659d51a6b2SMarek Szyprowski clk_disable(sc->clk_bus[ptr]); 6669d51a6b2SMarek Szyprowski clk_put(sc->clk_bus[ptr]); 6679d51a6b2SMarek Szyprowski } 6689320f7cbSMarek Szyprowski } 6699d51a6b2SMarek Szyprowski clk_disable(sc->clk_io); 6709d51a6b2SMarek Szyprowski clk_put(sc->clk_io); 6719d51a6b2SMarek Szyprowski 6729d51a6b2SMarek Szyprowski iounmap(host->ioaddr); 6739d51a6b2SMarek Szyprowski release_resource(sc->ioarea); 6749d51a6b2SMarek Szyprowski kfree(sc->ioarea); 6759d51a6b2SMarek Szyprowski 6769d51a6b2SMarek Szyprowski sdhci_free_host(host); 6779d51a6b2SMarek Szyprowski platform_set_drvdata(pdev, NULL); 6789d51a6b2SMarek Szyprowski 6790d1bb41aSBen Dooks return 0; 6800d1bb41aSBen Dooks } 6810d1bb41aSBen Dooks 6820d1bb41aSBen Dooks #ifdef CONFIG_PM 6830d1bb41aSBen Dooks 68429495aa0SManuel Lauss static int sdhci_s3c_suspend(struct device *dev) 6850d1bb41aSBen Dooks { 68629495aa0SManuel Lauss struct sdhci_host *host = dev_get_drvdata(dev); 6870d1bb41aSBen Dooks 68829495aa0SManuel Lauss return sdhci_suspend_host(host); 6890d1bb41aSBen Dooks } 6900d1bb41aSBen Dooks 69129495aa0SManuel Lauss static int sdhci_s3c_resume(struct device *dev) 6920d1bb41aSBen Dooks { 69329495aa0SManuel Lauss struct sdhci_host *host = dev_get_drvdata(dev); 6940d1bb41aSBen Dooks 69565d13516SWonil Choi return sdhci_resume_host(host); 6960d1bb41aSBen Dooks } 6970d1bb41aSBen Dooks 69829495aa0SManuel Lauss static const struct dev_pm_ops sdhci_s3c_pmops = { 69929495aa0SManuel Lauss .suspend = sdhci_s3c_suspend, 70029495aa0SManuel Lauss .resume = sdhci_s3c_resume, 70129495aa0SManuel Lauss }; 70229495aa0SManuel Lauss 70329495aa0SManuel Lauss #define SDHCI_S3C_PMOPS (&sdhci_s3c_pmops) 70429495aa0SManuel Lauss 7050d1bb41aSBen Dooks #else 70629495aa0SManuel Lauss #define SDHCI_S3C_PMOPS NULL 7070d1bb41aSBen Dooks #endif 7080d1bb41aSBen Dooks 7093119936aSThomas Abraham #if defined(CONFIG_CPU_EXYNOS4210) || defined(CONFIG_SOC_EXYNOS4212) 7103119936aSThomas Abraham static struct sdhci_s3c_drv_data exynos4_sdhci_drv_data = { 7113119936aSThomas Abraham .sdhci_quirks = SDHCI_QUIRK_NONSTANDARD_CLOCK, 7123119936aSThomas Abraham }; 7133119936aSThomas Abraham #define EXYNOS4_SDHCI_DRV_DATA ((kernel_ulong_t)&exynos4_sdhci_drv_data) 7143119936aSThomas Abraham #else 7153119936aSThomas Abraham #define EXYNOS4_SDHCI_DRV_DATA ((kernel_ulong_t)NULL) 7163119936aSThomas Abraham #endif 7173119936aSThomas Abraham 7183119936aSThomas Abraham static struct platform_device_id sdhci_s3c_driver_ids[] = { 7193119936aSThomas Abraham { 7203119936aSThomas Abraham .name = "s3c-sdhci", 7213119936aSThomas Abraham .driver_data = (kernel_ulong_t)NULL, 7223119936aSThomas Abraham }, { 7233119936aSThomas Abraham .name = "exynos4-sdhci", 7243119936aSThomas Abraham .driver_data = EXYNOS4_SDHCI_DRV_DATA, 7253119936aSThomas Abraham }, 7263119936aSThomas Abraham { } 7273119936aSThomas Abraham }; 7283119936aSThomas Abraham MODULE_DEVICE_TABLE(platform, sdhci_s3c_driver_ids); 7293119936aSThomas Abraham 7300d1bb41aSBen Dooks static struct platform_driver sdhci_s3c_driver = { 7310d1bb41aSBen Dooks .probe = sdhci_s3c_probe, 7320d1bb41aSBen Dooks .remove = __devexit_p(sdhci_s3c_remove), 7333119936aSThomas Abraham .id_table = sdhci_s3c_driver_ids, 7340d1bb41aSBen Dooks .driver = { 7350d1bb41aSBen Dooks .owner = THIS_MODULE, 7360d1bb41aSBen Dooks .name = "s3c-sdhci", 73729495aa0SManuel Lauss .pm = SDHCI_S3C_PMOPS, 7380d1bb41aSBen Dooks }, 7390d1bb41aSBen Dooks }; 7400d1bb41aSBen Dooks 741d1f81a64SAxel Lin module_platform_driver(sdhci_s3c_driver); 7420d1bb41aSBen Dooks 7430d1bb41aSBen Dooks MODULE_DESCRIPTION("Samsung SDHCI (HSMMC) glue"); 7440d1bb41aSBen Dooks MODULE_AUTHOR("Ben Dooks, <ben@simtec.co.uk>"); 7450d1bb41aSBen Dooks MODULE_LICENSE("GPL v2"); 7460d1bb41aSBen Dooks MODULE_ALIAS("platform:s3c-sdhci"); 747