xref: /openbmc/linux/drivers/mmc/host/sdhci-pci.h (revision 9fb29c73)
1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef __SDHCI_PCI_H
3 #define __SDHCI_PCI_H
4 
5 /*
6  * PCI device IDs, sub IDs
7  */
8 
9 #define PCI_DEVICE_ID_O2_SDS0		0x8420
10 #define PCI_DEVICE_ID_O2_SDS1		0x8421
11 #define PCI_DEVICE_ID_O2_FUJIN2		0x8520
12 #define PCI_DEVICE_ID_O2_SEABIRD0	0x8620
13 #define PCI_DEVICE_ID_O2_SEABIRD1	0x8621
14 
15 #define PCI_DEVICE_ID_INTEL_PCH_SDIO0	0x8809
16 #define PCI_DEVICE_ID_INTEL_PCH_SDIO1	0x880a
17 #define PCI_DEVICE_ID_INTEL_BYT_EMMC	0x0f14
18 #define PCI_DEVICE_ID_INTEL_BYT_SDIO	0x0f15
19 #define PCI_DEVICE_ID_INTEL_BYT_SD	0x0f16
20 #define PCI_DEVICE_ID_INTEL_BYT_EMMC2	0x0f50
21 #define PCI_DEVICE_ID_INTEL_BSW_EMMC	0x2294
22 #define PCI_DEVICE_ID_INTEL_BSW_SDIO	0x2295
23 #define PCI_DEVICE_ID_INTEL_BSW_SD	0x2296
24 #define PCI_DEVICE_ID_INTEL_MRFLD_MMC	0x1190
25 #define PCI_DEVICE_ID_INTEL_CLV_SDIO0	0x08f9
26 #define PCI_DEVICE_ID_INTEL_CLV_SDIO1	0x08fa
27 #define PCI_DEVICE_ID_INTEL_CLV_SDIO2	0x08fb
28 #define PCI_DEVICE_ID_INTEL_CLV_EMMC0	0x08e5
29 #define PCI_DEVICE_ID_INTEL_CLV_EMMC1	0x08e6
30 #define PCI_DEVICE_ID_INTEL_QRK_SD	0x08A7
31 #define PCI_DEVICE_ID_INTEL_SPT_EMMC	0x9d2b
32 #define PCI_DEVICE_ID_INTEL_SPT_SDIO	0x9d2c
33 #define PCI_DEVICE_ID_INTEL_SPT_SD	0x9d2d
34 #define PCI_DEVICE_ID_INTEL_DNV_EMMC	0x19db
35 #define PCI_DEVICE_ID_INTEL_CDF_EMMC	0x18db
36 #define PCI_DEVICE_ID_INTEL_BXT_SD	0x0aca
37 #define PCI_DEVICE_ID_INTEL_BXT_EMMC	0x0acc
38 #define PCI_DEVICE_ID_INTEL_BXT_SDIO	0x0ad0
39 #define PCI_DEVICE_ID_INTEL_BXTM_SD	0x1aca
40 #define PCI_DEVICE_ID_INTEL_BXTM_EMMC	0x1acc
41 #define PCI_DEVICE_ID_INTEL_BXTM_SDIO	0x1ad0
42 #define PCI_DEVICE_ID_INTEL_APL_SD	0x5aca
43 #define PCI_DEVICE_ID_INTEL_APL_EMMC	0x5acc
44 #define PCI_DEVICE_ID_INTEL_APL_SDIO	0x5ad0
45 #define PCI_DEVICE_ID_INTEL_GLK_SD	0x31ca
46 #define PCI_DEVICE_ID_INTEL_GLK_EMMC	0x31cc
47 #define PCI_DEVICE_ID_INTEL_GLK_SDIO	0x31d0
48 #define PCI_DEVICE_ID_INTEL_CNP_EMMC	0x9dc4
49 #define PCI_DEVICE_ID_INTEL_CNP_SD	0x9df5
50 #define PCI_DEVICE_ID_INTEL_CNPH_SD	0xa375
51 #define PCI_DEVICE_ID_INTEL_ICP_EMMC	0x34c4
52 #define PCI_DEVICE_ID_INTEL_ICP_SD	0x34f8
53 
54 #define PCI_DEVICE_ID_SYSKONNECT_8000	0x8000
55 #define PCI_DEVICE_ID_VIA_95D0		0x95d0
56 #define PCI_DEVICE_ID_REALTEK_5250	0x5250
57 
58 #define PCI_SUBDEVICE_ID_NI_7884	0x7884
59 #define PCI_SUBDEVICE_ID_NI_78E3	0x78e3
60 
61 #define PCI_VENDOR_ID_ARASAN		0x16e6
62 #define PCI_DEVICE_ID_ARASAN_PHY_EMMC	0x0670
63 
64 #define PCI_DEVICE_ID_SYNOPSYS_DWC_MSHC 0xc202
65 
66 /*
67  * PCI device class and mask
68  */
69 
70 #define SYSTEM_SDHCI			(PCI_CLASS_SYSTEM_SDHCI << 8)
71 #define PCI_CLASS_MASK			0xFFFF00
72 
73 /*
74  * Macros for PCI device-description
75  */
76 
77 #define _PCI_VEND(vend) PCI_VENDOR_ID_##vend
78 #define _PCI_DEV(vend, dev) PCI_DEVICE_ID_##vend##_##dev
79 #define _PCI_SUBDEV(subvend, subdev) PCI_SUBDEVICE_ID_##subvend##_##subdev
80 
81 #define SDHCI_PCI_DEVICE(vend, dev, cfg) { \
82 	.vendor = _PCI_VEND(vend), .device = _PCI_DEV(vend, dev), \
83 	.subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID, \
84 	.driver_data = (kernel_ulong_t)&(sdhci_##cfg) \
85 }
86 
87 #define SDHCI_PCI_SUBDEVICE(vend, dev, subvend, subdev, cfg) { \
88 	.vendor = _PCI_VEND(vend), .device = _PCI_DEV(vend, dev), \
89 	.subvendor = _PCI_VEND(subvend), \
90 	.subdevice = _PCI_SUBDEV(subvend, subdev), \
91 	.driver_data = (kernel_ulong_t)&(sdhci_##cfg) \
92 }
93 
94 #define SDHCI_PCI_DEVICE_CLASS(vend, cl, cl_msk, cfg) { \
95 	.vendor = _PCI_VEND(vend), .device = PCI_ANY_ID, \
96 	.subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID, \
97 	.class = (cl), .class_mask = (cl_msk), \
98 	.driver_data = (kernel_ulong_t)&(sdhci_##cfg) \
99 }
100 
101 /*
102  * PCI registers
103  */
104 
105 #define PCI_SDHCI_IFPIO			0x00
106 #define PCI_SDHCI_IFDMA			0x01
107 #define PCI_SDHCI_IFVENDOR		0x02
108 
109 #define PCI_SLOT_INFO			0x40	/* 8 bits */
110 #define  PCI_SLOT_INFO_SLOTS(x)		((x >> 4) & 7)
111 #define  PCI_SLOT_INFO_FIRST_BAR_MASK	0x07
112 
113 #define MAX_SLOTS			8
114 
115 struct sdhci_pci_chip;
116 struct sdhci_pci_slot;
117 
118 struct sdhci_pci_fixes {
119 	unsigned int		quirks;
120 	unsigned int		quirks2;
121 	bool			allow_runtime_pm;
122 	bool			own_cd_for_runtime_pm;
123 
124 	int			(*probe) (struct sdhci_pci_chip *);
125 
126 	int			(*probe_slot) (struct sdhci_pci_slot *);
127 	int			(*add_host) (struct sdhci_pci_slot *);
128 	void			(*remove_slot) (struct sdhci_pci_slot *, int);
129 
130 #ifdef CONFIG_PM_SLEEP
131 	int			(*suspend) (struct sdhci_pci_chip *);
132 	int			(*resume) (struct sdhci_pci_chip *);
133 #endif
134 #ifdef CONFIG_PM
135 	int			(*runtime_suspend) (struct sdhci_pci_chip *);
136 	int			(*runtime_resume) (struct sdhci_pci_chip *);
137 #endif
138 
139 	const struct sdhci_ops	*ops;
140 	size_t			priv_size;
141 };
142 
143 struct sdhci_pci_slot {
144 	struct sdhci_pci_chip	*chip;
145 	struct sdhci_host	*host;
146 	struct sdhci_pci_data	*data;
147 
148 	int			rst_n_gpio;
149 	int			cd_gpio;
150 	int			cd_irq;
151 
152 	int			cd_idx;
153 	bool			cd_override_level;
154 
155 	void (*hw_reset)(struct sdhci_host *host);
156 	unsigned long		private[0] ____cacheline_aligned;
157 };
158 
159 struct sdhci_pci_chip {
160 	struct pci_dev		*pdev;
161 
162 	unsigned int		quirks;
163 	unsigned int		quirks2;
164 	bool			allow_runtime_pm;
165 	bool			pm_retune;
166 	bool			rpm_retune;
167 	const struct sdhci_pci_fixes *fixes;
168 
169 	int			num_slots;	/* Slots on controller */
170 	struct sdhci_pci_slot	*slots[MAX_SLOTS]; /* Pointers to host slots */
171 };
172 
173 static inline void *sdhci_pci_priv(struct sdhci_pci_slot *slot)
174 {
175 	return (void *)slot->private;
176 }
177 
178 #ifdef CONFIG_PM_SLEEP
179 int sdhci_pci_resume_host(struct sdhci_pci_chip *chip);
180 #endif
181 int sdhci_pci_enable_dma(struct sdhci_host *host);
182 int sdhci_pci_o2_probe_slot(struct sdhci_pci_slot *slot);
183 int sdhci_pci_o2_probe(struct sdhci_pci_chip *chip);
184 #ifdef CONFIG_PM_SLEEP
185 int sdhci_pci_o2_resume(struct sdhci_pci_chip *chip);
186 #endif
187 
188 extern const struct sdhci_pci_fixes sdhci_arasan;
189 extern const struct sdhci_pci_fixes sdhci_snps;
190 
191 #endif /* __SDHCI_PCI_H */
192