1 #ifndef __SDHCI_PCI_H 2 #define __SDHCI_PCI_H 3 4 /* 5 * PCI device IDs 6 */ 7 8 #define PCI_DEVICE_ID_INTEL_PCH_SDIO0 0x8809 9 #define PCI_DEVICE_ID_INTEL_PCH_SDIO1 0x880a 10 #define PCI_DEVICE_ID_INTEL_BYT_EMMC 0x0f14 11 #define PCI_DEVICE_ID_INTEL_BYT_SDIO 0x0f15 12 #define PCI_DEVICE_ID_INTEL_BYT_SD 0x0f16 13 #define PCI_DEVICE_ID_INTEL_BYT_EMMC2 0x0f50 14 #define PCI_DEVICE_ID_INTEL_BSW_EMMC 0x2294 15 #define PCI_DEVICE_ID_INTEL_BSW_SDIO 0x2295 16 #define PCI_DEVICE_ID_INTEL_BSW_SD 0x2296 17 #define PCI_DEVICE_ID_INTEL_MRFL_MMC 0x1190 18 #define PCI_DEVICE_ID_INTEL_CLV_SDIO0 0x08f9 19 #define PCI_DEVICE_ID_INTEL_CLV_SDIO1 0x08fa 20 #define PCI_DEVICE_ID_INTEL_CLV_SDIO2 0x08fb 21 #define PCI_DEVICE_ID_INTEL_CLV_EMMC0 0x08e5 22 #define PCI_DEVICE_ID_INTEL_CLV_EMMC1 0x08e6 23 #define PCI_DEVICE_ID_INTEL_QRK_SD 0x08A7 24 #define PCI_DEVICE_ID_INTEL_SPT_EMMC 0x9d2b 25 #define PCI_DEVICE_ID_INTEL_SPT_SDIO 0x9d2c 26 #define PCI_DEVICE_ID_INTEL_SPT_SD 0x9d2d 27 #define PCI_DEVICE_ID_INTEL_DNV_EMMC 0x19db 28 #define PCI_DEVICE_ID_INTEL_BXT_SD 0x0aca 29 #define PCI_DEVICE_ID_INTEL_BXT_EMMC 0x0acc 30 #define PCI_DEVICE_ID_INTEL_BXT_SDIO 0x0ad0 31 #define PCI_DEVICE_ID_INTEL_BXTM_SD 0x1aca 32 #define PCI_DEVICE_ID_INTEL_BXTM_EMMC 0x1acc 33 #define PCI_DEVICE_ID_INTEL_BXTM_SDIO 0x1ad0 34 #define PCI_DEVICE_ID_INTEL_APL_SD 0x5aca 35 #define PCI_DEVICE_ID_INTEL_APL_EMMC 0x5acc 36 #define PCI_DEVICE_ID_INTEL_APL_SDIO 0x5ad0 37 38 /* 39 * PCI registers 40 */ 41 42 #define PCI_SDHCI_IFPIO 0x00 43 #define PCI_SDHCI_IFDMA 0x01 44 #define PCI_SDHCI_IFVENDOR 0x02 45 46 #define PCI_SLOT_INFO 0x40 /* 8 bits */ 47 #define PCI_SLOT_INFO_SLOTS(x) ((x >> 4) & 7) 48 #define PCI_SLOT_INFO_FIRST_BAR_MASK 0x07 49 50 #define MAX_SLOTS 8 51 52 struct sdhci_pci_chip; 53 struct sdhci_pci_slot; 54 55 struct sdhci_pci_fixes { 56 unsigned int quirks; 57 unsigned int quirks2; 58 bool allow_runtime_pm; 59 bool own_cd_for_runtime_pm; 60 61 int (*probe) (struct sdhci_pci_chip *); 62 63 int (*probe_slot) (struct sdhci_pci_slot *); 64 void (*remove_slot) (struct sdhci_pci_slot *, int); 65 66 int (*suspend) (struct sdhci_pci_chip *); 67 int (*resume) (struct sdhci_pci_chip *); 68 }; 69 70 struct sdhci_pci_slot { 71 struct sdhci_pci_chip *chip; 72 struct sdhci_host *host; 73 struct sdhci_pci_data *data; 74 75 int pci_bar; 76 int rst_n_gpio; 77 int cd_gpio; 78 int cd_irq; 79 80 char *cd_con_id; 81 int cd_idx; 82 bool cd_override_level; 83 84 void (*hw_reset)(struct sdhci_host *host); 85 int (*select_drive_strength)(struct sdhci_host *host, 86 struct mmc_card *card, 87 unsigned int max_dtr, int host_drv, 88 int card_drv, int *drv_type); 89 }; 90 91 struct sdhci_pci_chip { 92 struct pci_dev *pdev; 93 94 unsigned int quirks; 95 unsigned int quirks2; 96 bool allow_runtime_pm; 97 const struct sdhci_pci_fixes *fixes; 98 99 int num_slots; /* Slots on controller */ 100 struct sdhci_pci_slot *slots[MAX_SLOTS]; /* Pointers to host slots */ 101 }; 102 103 #endif /* __SDHCI_PCI_H */ 104