xref: /openbmc/linux/drivers/mmc/host/sdhci-pci.h (revision d38dcad4)
1522624f9SAdam Lee #ifndef __SDHCI_PCI_H
2522624f9SAdam Lee #define __SDHCI_PCI_H
3522624f9SAdam Lee 
4522624f9SAdam Lee /*
5522624f9SAdam Lee  * PCI device IDs
6522624f9SAdam Lee  */
7522624f9SAdam Lee 
8522624f9SAdam Lee #define PCI_DEVICE_ID_INTEL_PCH_SDIO0	0x8809
9522624f9SAdam Lee #define PCI_DEVICE_ID_INTEL_PCH_SDIO1	0x880a
10522624f9SAdam Lee #define PCI_DEVICE_ID_INTEL_BYT_EMMC	0x0f14
11522624f9SAdam Lee #define PCI_DEVICE_ID_INTEL_BYT_SDIO	0x0f15
12522624f9SAdam Lee #define PCI_DEVICE_ID_INTEL_BYT_SD	0x0f16
13522624f9SAdam Lee #define PCI_DEVICE_ID_INTEL_BYT_EMMC2	0x0f50
14066173b6SAlan Cox #define PCI_DEVICE_ID_INTEL_BSW_EMMC	0x2294
15066173b6SAlan Cox #define PCI_DEVICE_ID_INTEL_BSW_SDIO	0x2295
16066173b6SAlan Cox #define PCI_DEVICE_ID_INTEL_BSW_SD	0x2296
171f64cec2SAndy Shevchenko #define PCI_DEVICE_ID_INTEL_MRFLD_MMC	0x1190
18522624f9SAdam Lee #define PCI_DEVICE_ID_INTEL_CLV_SDIO0	0x08f9
19522624f9SAdam Lee #define PCI_DEVICE_ID_INTEL_CLV_SDIO1	0x08fa
20522624f9SAdam Lee #define PCI_DEVICE_ID_INTEL_CLV_SDIO2	0x08fb
21522624f9SAdam Lee #define PCI_DEVICE_ID_INTEL_CLV_EMMC0	0x08e5
22522624f9SAdam Lee #define PCI_DEVICE_ID_INTEL_CLV_EMMC1	0x08e6
2343e968ceSDerek Browne #define PCI_DEVICE_ID_INTEL_QRK_SD	0x08A7
241f7f2652SAdrian Hunter #define PCI_DEVICE_ID_INTEL_SPT_EMMC	0x9d2b
251f7f2652SAdrian Hunter #define PCI_DEVICE_ID_INTEL_SPT_SDIO	0x9d2c
261f7f2652SAdrian Hunter #define PCI_DEVICE_ID_INTEL_SPT_SD	0x9d2d
2706bf9c56SAdrian Hunter #define PCI_DEVICE_ID_INTEL_DNV_EMMC	0x19db
284fd4c065SAdrian Hunter #define PCI_DEVICE_ID_INTEL_BXT_SD	0x0aca
294fd4c065SAdrian Hunter #define PCI_DEVICE_ID_INTEL_BXT_EMMC	0x0acc
304fd4c065SAdrian Hunter #define PCI_DEVICE_ID_INTEL_BXT_SDIO	0x0ad0
3101d6b2a4SAdrian Hunter #define PCI_DEVICE_ID_INTEL_BXTM_SD	0x1aca
3201d6b2a4SAdrian Hunter #define PCI_DEVICE_ID_INTEL_BXTM_EMMC	0x1acc
3301d6b2a4SAdrian Hunter #define PCI_DEVICE_ID_INTEL_BXTM_SDIO	0x1ad0
344fd4c065SAdrian Hunter #define PCI_DEVICE_ID_INTEL_APL_SD	0x5aca
354fd4c065SAdrian Hunter #define PCI_DEVICE_ID_INTEL_APL_EMMC	0x5acc
364fd4c065SAdrian Hunter #define PCI_DEVICE_ID_INTEL_APL_SDIO	0x5ad0
372d1956d0SAdrian Hunter #define PCI_DEVICE_ID_INTEL_GLK_SD	0x31ca
382d1956d0SAdrian Hunter #define PCI_DEVICE_ID_INTEL_GLK_EMMC	0x31cc
392d1956d0SAdrian Hunter #define PCI_DEVICE_ID_INTEL_GLK_SDIO	0x31d0
40522624f9SAdam Lee 
41522624f9SAdam Lee /*
42522624f9SAdam Lee  * PCI registers
43522624f9SAdam Lee  */
44522624f9SAdam Lee 
45522624f9SAdam Lee #define PCI_SDHCI_IFPIO			0x00
46522624f9SAdam Lee #define PCI_SDHCI_IFDMA			0x01
47522624f9SAdam Lee #define PCI_SDHCI_IFVENDOR		0x02
48522624f9SAdam Lee 
49522624f9SAdam Lee #define PCI_SLOT_INFO			0x40	/* 8 bits */
50522624f9SAdam Lee #define  PCI_SLOT_INFO_SLOTS(x)		((x >> 4) & 7)
51522624f9SAdam Lee #define  PCI_SLOT_INFO_FIRST_BAR_MASK	0x07
52522624f9SAdam Lee 
53522624f9SAdam Lee #define MAX_SLOTS			8
54522624f9SAdam Lee 
55522624f9SAdam Lee struct sdhci_pci_chip;
56522624f9SAdam Lee struct sdhci_pci_slot;
57522624f9SAdam Lee 
58522624f9SAdam Lee struct sdhci_pci_fixes {
59522624f9SAdam Lee 	unsigned int		quirks;
60522624f9SAdam Lee 	unsigned int		quirks2;
61522624f9SAdam Lee 	bool			allow_runtime_pm;
6277a0122eSAdrian Hunter 	bool			own_cd_for_runtime_pm;
63522624f9SAdam Lee 
64522624f9SAdam Lee 	int			(*probe) (struct sdhci_pci_chip *);
65522624f9SAdam Lee 
66522624f9SAdam Lee 	int			(*probe_slot) (struct sdhci_pci_slot *);
67522624f9SAdam Lee 	void			(*remove_slot) (struct sdhci_pci_slot *, int);
68522624f9SAdam Lee 
69522624f9SAdam Lee 	int			(*suspend) (struct sdhci_pci_chip *);
70522624f9SAdam Lee 	int			(*resume) (struct sdhci_pci_chip *);
716bc09063SAdrian Hunter 
726bc09063SAdrian Hunter 	const struct sdhci_ops	*ops;
73522624f9SAdam Lee };
74522624f9SAdam Lee 
75522624f9SAdam Lee struct sdhci_pci_slot {
76522624f9SAdam Lee 	struct sdhci_pci_chip	*chip;
77522624f9SAdam Lee 	struct sdhci_host	*host;
78522624f9SAdam Lee 	struct sdhci_pci_data	*data;
79522624f9SAdam Lee 
80522624f9SAdam Lee 	int			rst_n_gpio;
81522624f9SAdam Lee 	int			cd_gpio;
82522624f9SAdam Lee 	int			cd_irq;
83522624f9SAdam Lee 
84ff59c520SAdrian Hunter 	int			cd_idx;
85ff59c520SAdrian Hunter 	bool			cd_override_level;
86ff59c520SAdrian Hunter 
87522624f9SAdam Lee 	void (*hw_reset)(struct sdhci_host *host);
88e1bfad6dSAdrian Hunter 	int (*select_drive_strength)(struct sdhci_host *host,
89e1bfad6dSAdrian Hunter 				     struct mmc_card *card,
90e1bfad6dSAdrian Hunter 				     unsigned int max_dtr, int host_drv,
91e1bfad6dSAdrian Hunter 				     int card_drv, int *drv_type);
92522624f9SAdam Lee };
93522624f9SAdam Lee 
94522624f9SAdam Lee struct sdhci_pci_chip {
95522624f9SAdam Lee 	struct pci_dev		*pdev;
96522624f9SAdam Lee 
97522624f9SAdam Lee 	unsigned int		quirks;
98522624f9SAdam Lee 	unsigned int		quirks2;
99522624f9SAdam Lee 	bool			allow_runtime_pm;
100d38dcad4SAdrian Hunter 	bool			pm_retune;
101d38dcad4SAdrian Hunter 	bool			rpm_retune;
102522624f9SAdam Lee 	const struct sdhci_pci_fixes *fixes;
103522624f9SAdam Lee 
104522624f9SAdam Lee 	int			num_slots;	/* Slots on controller */
105522624f9SAdam Lee 	struct sdhci_pci_slot	*slots[MAX_SLOTS]; /* Pointers to host slots */
106522624f9SAdam Lee };
107522624f9SAdam Lee 
108522624f9SAdam Lee #endif /* __SDHCI_PCI_H */
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