1522624f9SAdam Lee #ifndef __SDHCI_PCI_H 2522624f9SAdam Lee #define __SDHCI_PCI_H 3522624f9SAdam Lee 4522624f9SAdam Lee /* 5c949c907SMatthias Kraemer * PCI device IDs, sub IDs 6522624f9SAdam Lee */ 7522624f9SAdam Lee 8522624f9SAdam Lee #define PCI_DEVICE_ID_INTEL_PCH_SDIO0 0x8809 9522624f9SAdam Lee #define PCI_DEVICE_ID_INTEL_PCH_SDIO1 0x880a 10522624f9SAdam Lee #define PCI_DEVICE_ID_INTEL_BYT_EMMC 0x0f14 11522624f9SAdam Lee #define PCI_DEVICE_ID_INTEL_BYT_SDIO 0x0f15 12522624f9SAdam Lee #define PCI_DEVICE_ID_INTEL_BYT_SD 0x0f16 13522624f9SAdam Lee #define PCI_DEVICE_ID_INTEL_BYT_EMMC2 0x0f50 14066173b6SAlan Cox #define PCI_DEVICE_ID_INTEL_BSW_EMMC 0x2294 15066173b6SAlan Cox #define PCI_DEVICE_ID_INTEL_BSW_SDIO 0x2295 16066173b6SAlan Cox #define PCI_DEVICE_ID_INTEL_BSW_SD 0x2296 171f64cec2SAndy Shevchenko #define PCI_DEVICE_ID_INTEL_MRFLD_MMC 0x1190 18522624f9SAdam Lee #define PCI_DEVICE_ID_INTEL_CLV_SDIO0 0x08f9 19522624f9SAdam Lee #define PCI_DEVICE_ID_INTEL_CLV_SDIO1 0x08fa 20522624f9SAdam Lee #define PCI_DEVICE_ID_INTEL_CLV_SDIO2 0x08fb 21522624f9SAdam Lee #define PCI_DEVICE_ID_INTEL_CLV_EMMC0 0x08e5 22522624f9SAdam Lee #define PCI_DEVICE_ID_INTEL_CLV_EMMC1 0x08e6 2343e968ceSDerek Browne #define PCI_DEVICE_ID_INTEL_QRK_SD 0x08A7 241f7f2652SAdrian Hunter #define PCI_DEVICE_ID_INTEL_SPT_EMMC 0x9d2b 251f7f2652SAdrian Hunter #define PCI_DEVICE_ID_INTEL_SPT_SDIO 0x9d2c 261f7f2652SAdrian Hunter #define PCI_DEVICE_ID_INTEL_SPT_SD 0x9d2d 2706bf9c56SAdrian Hunter #define PCI_DEVICE_ID_INTEL_DNV_EMMC 0x19db 284fd4c065SAdrian Hunter #define PCI_DEVICE_ID_INTEL_BXT_SD 0x0aca 294fd4c065SAdrian Hunter #define PCI_DEVICE_ID_INTEL_BXT_EMMC 0x0acc 304fd4c065SAdrian Hunter #define PCI_DEVICE_ID_INTEL_BXT_SDIO 0x0ad0 3101d6b2a4SAdrian Hunter #define PCI_DEVICE_ID_INTEL_BXTM_SD 0x1aca 3201d6b2a4SAdrian Hunter #define PCI_DEVICE_ID_INTEL_BXTM_EMMC 0x1acc 3301d6b2a4SAdrian Hunter #define PCI_DEVICE_ID_INTEL_BXTM_SDIO 0x1ad0 344fd4c065SAdrian Hunter #define PCI_DEVICE_ID_INTEL_APL_SD 0x5aca 354fd4c065SAdrian Hunter #define PCI_DEVICE_ID_INTEL_APL_EMMC 0x5acc 364fd4c065SAdrian Hunter #define PCI_DEVICE_ID_INTEL_APL_SDIO 0x5ad0 372d1956d0SAdrian Hunter #define PCI_DEVICE_ID_INTEL_GLK_SD 0x31ca 382d1956d0SAdrian Hunter #define PCI_DEVICE_ID_INTEL_GLK_EMMC 0x31cc 392d1956d0SAdrian Hunter #define PCI_DEVICE_ID_INTEL_GLK_SDIO 0x31d0 40522624f9SAdam Lee 41c949c907SMatthias Kraemer #define PCI_DEVICE_ID_SYSKONNECT_8000 0x8000 42c949c907SMatthias Kraemer #define PCI_DEVICE_ID_VIA_95D0 0x95d0 43c949c907SMatthias Kraemer #define PCI_DEVICE_ID_REALTEK_5250 0x5250 44c949c907SMatthias Kraemer 45c949c907SMatthias Kraemer #define PCI_SUBDEVICE_ID_NI_7884 0x7884 46c949c907SMatthias Kraemer 47c949c907SMatthias Kraemer /* 48c949c907SMatthias Kraemer * PCI device class and mask 49c949c907SMatthias Kraemer */ 50c949c907SMatthias Kraemer 51c949c907SMatthias Kraemer #define SYSTEM_SDHCI (PCI_CLASS_SYSTEM_SDHCI << 8) 52c949c907SMatthias Kraemer #define PCI_CLASS_MASK 0xFFFF00 53c949c907SMatthias Kraemer 54c949c907SMatthias Kraemer /* 55c949c907SMatthias Kraemer * Macros for PCI device-description 56c949c907SMatthias Kraemer */ 57c949c907SMatthias Kraemer 58c949c907SMatthias Kraemer #define _PCI_VEND(vend) PCI_VENDOR_ID_##vend 59c949c907SMatthias Kraemer #define _PCI_DEV(vend, dev) PCI_DEVICE_ID_##vend##_##dev 60c949c907SMatthias Kraemer #define _PCI_SUBDEV(subvend, subdev) PCI_SUBDEVICE_ID_##subvend##_##subdev 61c949c907SMatthias Kraemer 62c949c907SMatthias Kraemer #define SDHCI_PCI_DEVICE(vend, dev, cfg) { \ 63c949c907SMatthias Kraemer .vendor = _PCI_VEND(vend), .device = _PCI_DEV(vend, dev), \ 64c949c907SMatthias Kraemer .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID, \ 65c949c907SMatthias Kraemer .driver_data = (kernel_ulong_t)&(sdhci_##cfg) \ 66c949c907SMatthias Kraemer } 67c949c907SMatthias Kraemer 68c949c907SMatthias Kraemer #define SDHCI_PCI_SUBDEVICE(vend, dev, subvend, subdev, cfg) { \ 69c949c907SMatthias Kraemer .vendor = _PCI_VEND(vend), .device = _PCI_DEV(vend, dev), \ 70c949c907SMatthias Kraemer .subvendor = _PCI_VEND(subvend), \ 71c949c907SMatthias Kraemer .subdevice = _PCI_SUBDEV(subvend, subdev), \ 72c949c907SMatthias Kraemer .driver_data = (kernel_ulong_t)&(sdhci_##cfg) \ 73c949c907SMatthias Kraemer } 74c949c907SMatthias Kraemer 75c949c907SMatthias Kraemer #define SDHCI_PCI_DEVICE_CLASS(vend, cl, cl_msk, cfg) { \ 76c949c907SMatthias Kraemer .vendor = _PCI_VEND(vend), .device = PCI_ANY_ID, \ 77c949c907SMatthias Kraemer .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID, \ 78c949c907SMatthias Kraemer .class = (cl), .class_mask = (cl_msk), \ 79c949c907SMatthias Kraemer .driver_data = (kernel_ulong_t)&(sdhci_##cfg) \ 80c949c907SMatthias Kraemer } 81c949c907SMatthias Kraemer 82522624f9SAdam Lee /* 83522624f9SAdam Lee * PCI registers 84522624f9SAdam Lee */ 85522624f9SAdam Lee 86522624f9SAdam Lee #define PCI_SDHCI_IFPIO 0x00 87522624f9SAdam Lee #define PCI_SDHCI_IFDMA 0x01 88522624f9SAdam Lee #define PCI_SDHCI_IFVENDOR 0x02 89522624f9SAdam Lee 90522624f9SAdam Lee #define PCI_SLOT_INFO 0x40 /* 8 bits */ 91522624f9SAdam Lee #define PCI_SLOT_INFO_SLOTS(x) ((x >> 4) & 7) 92522624f9SAdam Lee #define PCI_SLOT_INFO_FIRST_BAR_MASK 0x07 93522624f9SAdam Lee 94522624f9SAdam Lee #define MAX_SLOTS 8 95522624f9SAdam Lee 96522624f9SAdam Lee struct sdhci_pci_chip; 97522624f9SAdam Lee struct sdhci_pci_slot; 98522624f9SAdam Lee 99522624f9SAdam Lee struct sdhci_pci_fixes { 100522624f9SAdam Lee unsigned int quirks; 101522624f9SAdam Lee unsigned int quirks2; 102522624f9SAdam Lee bool allow_runtime_pm; 10377a0122eSAdrian Hunter bool own_cd_for_runtime_pm; 104522624f9SAdam Lee 105522624f9SAdam Lee int (*probe) (struct sdhci_pci_chip *); 106522624f9SAdam Lee 107522624f9SAdam Lee int (*probe_slot) (struct sdhci_pci_slot *); 10861c951deSAdrian Hunter int (*add_host) (struct sdhci_pci_slot *); 109522624f9SAdam Lee void (*remove_slot) (struct sdhci_pci_slot *, int); 110522624f9SAdam Lee 111b7813f0fSAdrian Hunter #ifdef CONFIG_PM_SLEEP 112522624f9SAdam Lee int (*suspend) (struct sdhci_pci_chip *); 113522624f9SAdam Lee int (*resume) (struct sdhci_pci_chip *); 114b7813f0fSAdrian Hunter #endif 115966d696aSAdrian Hunter #ifdef CONFIG_PM 116966d696aSAdrian Hunter int (*runtime_suspend) (struct sdhci_pci_chip *); 117966d696aSAdrian Hunter int (*runtime_resume) (struct sdhci_pci_chip *); 118966d696aSAdrian Hunter #endif 1196bc09063SAdrian Hunter 1206bc09063SAdrian Hunter const struct sdhci_ops *ops; 121ac9f67b5SAdrian Hunter size_t priv_size; 122522624f9SAdam Lee }; 123522624f9SAdam Lee 124522624f9SAdam Lee struct sdhci_pci_slot { 125522624f9SAdam Lee struct sdhci_pci_chip *chip; 126522624f9SAdam Lee struct sdhci_host *host; 127522624f9SAdam Lee struct sdhci_pci_data *data; 128522624f9SAdam Lee 129522624f9SAdam Lee int rst_n_gpio; 130522624f9SAdam Lee int cd_gpio; 131522624f9SAdam Lee int cd_irq; 132522624f9SAdam Lee 133ff59c520SAdrian Hunter int cd_idx; 134ff59c520SAdrian Hunter bool cd_override_level; 135ff59c520SAdrian Hunter 136522624f9SAdam Lee void (*hw_reset)(struct sdhci_host *host); 137ac9f67b5SAdrian Hunter unsigned long private[0] ____cacheline_aligned; 138522624f9SAdam Lee }; 139522624f9SAdam Lee 140522624f9SAdam Lee struct sdhci_pci_chip { 141522624f9SAdam Lee struct pci_dev *pdev; 142522624f9SAdam Lee 143522624f9SAdam Lee unsigned int quirks; 144522624f9SAdam Lee unsigned int quirks2; 145522624f9SAdam Lee bool allow_runtime_pm; 146d38dcad4SAdrian Hunter bool pm_retune; 147d38dcad4SAdrian Hunter bool rpm_retune; 148522624f9SAdam Lee const struct sdhci_pci_fixes *fixes; 149522624f9SAdam Lee 150522624f9SAdam Lee int num_slots; /* Slots on controller */ 151522624f9SAdam Lee struct sdhci_pci_slot *slots[MAX_SLOTS]; /* Pointers to host slots */ 152522624f9SAdam Lee }; 153522624f9SAdam Lee 154ac9f67b5SAdrian Hunter static inline void *sdhci_pci_priv(struct sdhci_pci_slot *slot) 155ac9f67b5SAdrian Hunter { 156ac9f67b5SAdrian Hunter return (void *)slot->private; 157ac9f67b5SAdrian Hunter } 158ac9f67b5SAdrian Hunter 15930cf2803SAdrian Hunter #ifdef CONFIG_PM_SLEEP 16030cf2803SAdrian Hunter int sdhci_pci_resume_host(struct sdhci_pci_chip *chip); 16130cf2803SAdrian Hunter #endif 16230cf2803SAdrian Hunter 163522624f9SAdam Lee #endif /* __SDHCI_PCI_H */ 164