xref: /openbmc/linux/drivers/mmc/host/sdhci-pci.h (revision 1f7f2652)
1522624f9SAdam Lee #ifndef __SDHCI_PCI_H
2522624f9SAdam Lee #define __SDHCI_PCI_H
3522624f9SAdam Lee 
4522624f9SAdam Lee /*
5522624f9SAdam Lee  * PCI device IDs
6522624f9SAdam Lee  */
7522624f9SAdam Lee 
8522624f9SAdam Lee #define PCI_DEVICE_ID_INTEL_PCH_SDIO0	0x8809
9522624f9SAdam Lee #define PCI_DEVICE_ID_INTEL_PCH_SDIO1	0x880a
10522624f9SAdam Lee #define PCI_DEVICE_ID_INTEL_BYT_EMMC	0x0f14
11522624f9SAdam Lee #define PCI_DEVICE_ID_INTEL_BYT_SDIO	0x0f15
12522624f9SAdam Lee #define PCI_DEVICE_ID_INTEL_BYT_SD	0x0f16
13522624f9SAdam Lee #define PCI_DEVICE_ID_INTEL_BYT_EMMC2	0x0f50
14066173b6SAlan Cox #define PCI_DEVICE_ID_INTEL_BSW_EMMC	0x2294
15066173b6SAlan Cox #define PCI_DEVICE_ID_INTEL_BSW_SDIO	0x2295
16066173b6SAlan Cox #define PCI_DEVICE_ID_INTEL_BSW_SD	0x2296
17522624f9SAdam Lee #define PCI_DEVICE_ID_INTEL_MRFL_MMC	0x1190
18522624f9SAdam Lee #define PCI_DEVICE_ID_INTEL_CLV_SDIO0	0x08f9
19522624f9SAdam Lee #define PCI_DEVICE_ID_INTEL_CLV_SDIO1	0x08fa
20522624f9SAdam Lee #define PCI_DEVICE_ID_INTEL_CLV_SDIO2	0x08fb
21522624f9SAdam Lee #define PCI_DEVICE_ID_INTEL_CLV_EMMC0	0x08e5
22522624f9SAdam Lee #define PCI_DEVICE_ID_INTEL_CLV_EMMC1	0x08e6
2343e968ceSDerek Browne #define PCI_DEVICE_ID_INTEL_QRK_SD	0x08A7
241f7f2652SAdrian Hunter #define PCI_DEVICE_ID_INTEL_SPT_EMMC	0x9d2b
251f7f2652SAdrian Hunter #define PCI_DEVICE_ID_INTEL_SPT_SDIO	0x9d2c
261f7f2652SAdrian Hunter #define PCI_DEVICE_ID_INTEL_SPT_SD	0x9d2d
27522624f9SAdam Lee 
28522624f9SAdam Lee /*
29522624f9SAdam Lee  * PCI registers
30522624f9SAdam Lee  */
31522624f9SAdam Lee 
32522624f9SAdam Lee #define PCI_SDHCI_IFPIO			0x00
33522624f9SAdam Lee #define PCI_SDHCI_IFDMA			0x01
34522624f9SAdam Lee #define PCI_SDHCI_IFVENDOR		0x02
35522624f9SAdam Lee 
36522624f9SAdam Lee #define PCI_SLOT_INFO			0x40	/* 8 bits */
37522624f9SAdam Lee #define  PCI_SLOT_INFO_SLOTS(x)		((x >> 4) & 7)
38522624f9SAdam Lee #define  PCI_SLOT_INFO_FIRST_BAR_MASK	0x07
39522624f9SAdam Lee 
40522624f9SAdam Lee #define MAX_SLOTS			8
41522624f9SAdam Lee 
42522624f9SAdam Lee struct sdhci_pci_chip;
43522624f9SAdam Lee struct sdhci_pci_slot;
44522624f9SAdam Lee 
45522624f9SAdam Lee struct sdhci_pci_fixes {
46522624f9SAdam Lee 	unsigned int		quirks;
47522624f9SAdam Lee 	unsigned int		quirks2;
48522624f9SAdam Lee 	bool			allow_runtime_pm;
4977a0122eSAdrian Hunter 	bool			own_cd_for_runtime_pm;
50522624f9SAdam Lee 
51522624f9SAdam Lee 	int			(*probe) (struct sdhci_pci_chip *);
52522624f9SAdam Lee 
53522624f9SAdam Lee 	int			(*probe_slot) (struct sdhci_pci_slot *);
54522624f9SAdam Lee 	void			(*remove_slot) (struct sdhci_pci_slot *, int);
55522624f9SAdam Lee 
56522624f9SAdam Lee 	int			(*suspend) (struct sdhci_pci_chip *);
57522624f9SAdam Lee 	int			(*resume) (struct sdhci_pci_chip *);
58522624f9SAdam Lee };
59522624f9SAdam Lee 
60522624f9SAdam Lee struct sdhci_pci_slot {
61522624f9SAdam Lee 	struct sdhci_pci_chip	*chip;
62522624f9SAdam Lee 	struct sdhci_host	*host;
63522624f9SAdam Lee 	struct sdhci_pci_data	*data;
64522624f9SAdam Lee 
65522624f9SAdam Lee 	int			pci_bar;
66522624f9SAdam Lee 	int			rst_n_gpio;
67522624f9SAdam Lee 	int			cd_gpio;
68522624f9SAdam Lee 	int			cd_irq;
69522624f9SAdam Lee 
70ff59c520SAdrian Hunter 	char			*cd_con_id;
71ff59c520SAdrian Hunter 	int			cd_idx;
72ff59c520SAdrian Hunter 	bool			cd_override_level;
73ff59c520SAdrian Hunter 
74522624f9SAdam Lee 	void (*hw_reset)(struct sdhci_host *host);
75522624f9SAdam Lee };
76522624f9SAdam Lee 
77522624f9SAdam Lee struct sdhci_pci_chip {
78522624f9SAdam Lee 	struct pci_dev		*pdev;
79522624f9SAdam Lee 
80522624f9SAdam Lee 	unsigned int		quirks;
81522624f9SAdam Lee 	unsigned int		quirks2;
82522624f9SAdam Lee 	bool			allow_runtime_pm;
83522624f9SAdam Lee 	const struct sdhci_pci_fixes *fixes;
84522624f9SAdam Lee 
85522624f9SAdam Lee 	int			num_slots;	/* Slots on controller */
86522624f9SAdam Lee 	struct sdhci_pci_slot	*slots[MAX_SLOTS]; /* Pointers to host slots */
87522624f9SAdam Lee };
88522624f9SAdam Lee 
89522624f9SAdam Lee #endif /* __SDHCI_PCI_H */
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