1b2441318SGreg Kroah-Hartman /* SPDX-License-Identifier: GPL-2.0 */ 2522624f9SAdam Lee #ifndef __SDHCI_PCI_H 3522624f9SAdam Lee #define __SDHCI_PCI_H 4522624f9SAdam Lee 5522624f9SAdam Lee /* 6c949c907SMatthias Kraemer * PCI device IDs, sub IDs 7522624f9SAdam Lee */ 8522624f9SAdam Lee 9361eeda0SAdrian Hunter #define PCI_DEVICE_ID_O2_SDS0 0x8420 10361eeda0SAdrian Hunter #define PCI_DEVICE_ID_O2_SDS1 0x8421 11361eeda0SAdrian Hunter #define PCI_DEVICE_ID_O2_FUJIN2 0x8520 12361eeda0SAdrian Hunter #define PCI_DEVICE_ID_O2_SEABIRD0 0x8620 13361eeda0SAdrian Hunter #define PCI_DEVICE_ID_O2_SEABIRD1 0x8621 14361eeda0SAdrian Hunter 15522624f9SAdam Lee #define PCI_DEVICE_ID_INTEL_PCH_SDIO0 0x8809 16522624f9SAdam Lee #define PCI_DEVICE_ID_INTEL_PCH_SDIO1 0x880a 17522624f9SAdam Lee #define PCI_DEVICE_ID_INTEL_BYT_EMMC 0x0f14 18522624f9SAdam Lee #define PCI_DEVICE_ID_INTEL_BYT_SDIO 0x0f15 19522624f9SAdam Lee #define PCI_DEVICE_ID_INTEL_BYT_SD 0x0f16 20522624f9SAdam Lee #define PCI_DEVICE_ID_INTEL_BYT_EMMC2 0x0f50 21066173b6SAlan Cox #define PCI_DEVICE_ID_INTEL_BSW_EMMC 0x2294 22066173b6SAlan Cox #define PCI_DEVICE_ID_INTEL_BSW_SDIO 0x2295 23066173b6SAlan Cox #define PCI_DEVICE_ID_INTEL_BSW_SD 0x2296 241f64cec2SAndy Shevchenko #define PCI_DEVICE_ID_INTEL_MRFLD_MMC 0x1190 25522624f9SAdam Lee #define PCI_DEVICE_ID_INTEL_CLV_SDIO0 0x08f9 26522624f9SAdam Lee #define PCI_DEVICE_ID_INTEL_CLV_SDIO1 0x08fa 27522624f9SAdam Lee #define PCI_DEVICE_ID_INTEL_CLV_SDIO2 0x08fb 28522624f9SAdam Lee #define PCI_DEVICE_ID_INTEL_CLV_EMMC0 0x08e5 29522624f9SAdam Lee #define PCI_DEVICE_ID_INTEL_CLV_EMMC1 0x08e6 3043e968ceSDerek Browne #define PCI_DEVICE_ID_INTEL_QRK_SD 0x08A7 311f7f2652SAdrian Hunter #define PCI_DEVICE_ID_INTEL_SPT_EMMC 0x9d2b 321f7f2652SAdrian Hunter #define PCI_DEVICE_ID_INTEL_SPT_SDIO 0x9d2c 331f7f2652SAdrian Hunter #define PCI_DEVICE_ID_INTEL_SPT_SD 0x9d2d 3406bf9c56SAdrian Hunter #define PCI_DEVICE_ID_INTEL_DNV_EMMC 0x19db 35cdaba732SAdrian Hunter #define PCI_DEVICE_ID_INTEL_CDF_EMMC 0x18db 364fd4c065SAdrian Hunter #define PCI_DEVICE_ID_INTEL_BXT_SD 0x0aca 374fd4c065SAdrian Hunter #define PCI_DEVICE_ID_INTEL_BXT_EMMC 0x0acc 384fd4c065SAdrian Hunter #define PCI_DEVICE_ID_INTEL_BXT_SDIO 0x0ad0 3901d6b2a4SAdrian Hunter #define PCI_DEVICE_ID_INTEL_BXTM_SD 0x1aca 4001d6b2a4SAdrian Hunter #define PCI_DEVICE_ID_INTEL_BXTM_EMMC 0x1acc 4101d6b2a4SAdrian Hunter #define PCI_DEVICE_ID_INTEL_BXTM_SDIO 0x1ad0 424fd4c065SAdrian Hunter #define PCI_DEVICE_ID_INTEL_APL_SD 0x5aca 434fd4c065SAdrian Hunter #define PCI_DEVICE_ID_INTEL_APL_EMMC 0x5acc 444fd4c065SAdrian Hunter #define PCI_DEVICE_ID_INTEL_APL_SDIO 0x5ad0 452d1956d0SAdrian Hunter #define PCI_DEVICE_ID_INTEL_GLK_SD 0x31ca 462d1956d0SAdrian Hunter #define PCI_DEVICE_ID_INTEL_GLK_EMMC 0x31cc 472d1956d0SAdrian Hunter #define PCI_DEVICE_ID_INTEL_GLK_SDIO 0x31d0 48bc55dcd8SAdrian Hunter #define PCI_DEVICE_ID_INTEL_CNP_EMMC 0x9dc4 49bc55dcd8SAdrian Hunter #define PCI_DEVICE_ID_INTEL_CNP_SD 0x9df5 50bc55dcd8SAdrian Hunter #define PCI_DEVICE_ID_INTEL_CNPH_SD 0xa375 515637ffadSAdrian Hunter #define PCI_DEVICE_ID_INTEL_ICP_EMMC 0x34c4 525637ffadSAdrian Hunter #define PCI_DEVICE_ID_INTEL_ICP_SD 0x34f8 53cb3a7d4aSAdrian Hunter #define PCI_DEVICE_ID_INTEL_EHL_EMMC 0x4b47 54cb3a7d4aSAdrian Hunter #define PCI_DEVICE_ID_INTEL_EHL_SD 0x4b48 55765c5967SAdrian Hunter #define PCI_DEVICE_ID_INTEL_CML_EMMC 0x02c4 56765c5967SAdrian Hunter #define PCI_DEVICE_ID_INTEL_CML_SD 0x02f5 578f05eee6SAdrian Hunter #define PCI_DEVICE_ID_INTEL_CMLH_SD 0x06f5 58315e3bd7SAdrian Hunter #define PCI_DEVICE_ID_INTEL_JSL_EMMC 0x4dc4 59315e3bd7SAdrian Hunter #define PCI_DEVICE_ID_INTEL_JSL_SD 0x4df8 60522624f9SAdam Lee 61c949c907SMatthias Kraemer #define PCI_DEVICE_ID_SYSKONNECT_8000 0x8000 62c949c907SMatthias Kraemer #define PCI_DEVICE_ID_VIA_95D0 0x95d0 63c949c907SMatthias Kraemer #define PCI_DEVICE_ID_REALTEK_5250 0x5250 64c949c907SMatthias Kraemer 65c949c907SMatthias Kraemer #define PCI_SUBDEVICE_ID_NI_7884 0x7884 66bb26b841SKyle Roeschley #define PCI_SUBDEVICE_ID_NI_78E3 0x78e3 67c949c907SMatthias Kraemer 68d72d72cdSAtul Garg #define PCI_VENDOR_ID_ARASAN 0x16e6 69d72d72cdSAtul Garg #define PCI_DEVICE_ID_ARASAN_PHY_EMMC 0x0670 70d72d72cdSAtul Garg 71152f8204SPrabu Thangamuthu #define PCI_DEVICE_ID_SYNOPSYS_DWC_MSHC 0xc202 72152f8204SPrabu Thangamuthu 73e51df6ceSBen Chuang #define PCI_DEVICE_ID_GLI_9755 0x9755 74e51df6ceSBen Chuang #define PCI_DEVICE_ID_GLI_9750 0x9750 751ae1d2d6SBen Chuang #define PCI_DEVICE_ID_GLI_9763E 0xe763 76e51df6ceSBen Chuang 77c949c907SMatthias Kraemer /* 78c949c907SMatthias Kraemer * PCI device class and mask 79c949c907SMatthias Kraemer */ 80c949c907SMatthias Kraemer 81c949c907SMatthias Kraemer #define SYSTEM_SDHCI (PCI_CLASS_SYSTEM_SDHCI << 8) 82c949c907SMatthias Kraemer #define PCI_CLASS_MASK 0xFFFF00 83c949c907SMatthias Kraemer 84c949c907SMatthias Kraemer /* 85c949c907SMatthias Kraemer * Macros for PCI device-description 86c949c907SMatthias Kraemer */ 87c949c907SMatthias Kraemer 88c949c907SMatthias Kraemer #define _PCI_VEND(vend) PCI_VENDOR_ID_##vend 89c949c907SMatthias Kraemer #define _PCI_DEV(vend, dev) PCI_DEVICE_ID_##vend##_##dev 90c949c907SMatthias Kraemer #define _PCI_SUBDEV(subvend, subdev) PCI_SUBDEVICE_ID_##subvend##_##subdev 91c949c907SMatthias Kraemer 92c949c907SMatthias Kraemer #define SDHCI_PCI_DEVICE(vend, dev, cfg) { \ 93c949c907SMatthias Kraemer .vendor = _PCI_VEND(vend), .device = _PCI_DEV(vend, dev), \ 94c949c907SMatthias Kraemer .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID, \ 95c949c907SMatthias Kraemer .driver_data = (kernel_ulong_t)&(sdhci_##cfg) \ 96c949c907SMatthias Kraemer } 97c949c907SMatthias Kraemer 98c949c907SMatthias Kraemer #define SDHCI_PCI_SUBDEVICE(vend, dev, subvend, subdev, cfg) { \ 99c949c907SMatthias Kraemer .vendor = _PCI_VEND(vend), .device = _PCI_DEV(vend, dev), \ 100c949c907SMatthias Kraemer .subvendor = _PCI_VEND(subvend), \ 101c949c907SMatthias Kraemer .subdevice = _PCI_SUBDEV(subvend, subdev), \ 102c949c907SMatthias Kraemer .driver_data = (kernel_ulong_t)&(sdhci_##cfg) \ 103c949c907SMatthias Kraemer } 104c949c907SMatthias Kraemer 105c949c907SMatthias Kraemer #define SDHCI_PCI_DEVICE_CLASS(vend, cl, cl_msk, cfg) { \ 106c949c907SMatthias Kraemer .vendor = _PCI_VEND(vend), .device = PCI_ANY_ID, \ 107c949c907SMatthias Kraemer .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID, \ 108c949c907SMatthias Kraemer .class = (cl), .class_mask = (cl_msk), \ 109c949c907SMatthias Kraemer .driver_data = (kernel_ulong_t)&(sdhci_##cfg) \ 110c949c907SMatthias Kraemer } 111c949c907SMatthias Kraemer 112522624f9SAdam Lee /* 113522624f9SAdam Lee * PCI registers 114522624f9SAdam Lee */ 115522624f9SAdam Lee 116522624f9SAdam Lee #define PCI_SDHCI_IFPIO 0x00 117522624f9SAdam Lee #define PCI_SDHCI_IFDMA 0x01 118522624f9SAdam Lee #define PCI_SDHCI_IFVENDOR 0x02 119522624f9SAdam Lee 120522624f9SAdam Lee #define PCI_SLOT_INFO 0x40 /* 8 bits */ 121522624f9SAdam Lee #define PCI_SLOT_INFO_SLOTS(x) ((x >> 4) & 7) 122522624f9SAdam Lee #define PCI_SLOT_INFO_FIRST_BAR_MASK 0x07 123522624f9SAdam Lee 124522624f9SAdam Lee #define MAX_SLOTS 8 125522624f9SAdam Lee 126522624f9SAdam Lee struct sdhci_pci_chip; 127522624f9SAdam Lee struct sdhci_pci_slot; 128522624f9SAdam Lee 129522624f9SAdam Lee struct sdhci_pci_fixes { 130522624f9SAdam Lee unsigned int quirks; 131522624f9SAdam Lee unsigned int quirks2; 132522624f9SAdam Lee bool allow_runtime_pm; 13377a0122eSAdrian Hunter bool own_cd_for_runtime_pm; 134522624f9SAdam Lee 135522624f9SAdam Lee int (*probe) (struct sdhci_pci_chip *); 136522624f9SAdam Lee 137522624f9SAdam Lee int (*probe_slot) (struct sdhci_pci_slot *); 13861c951deSAdrian Hunter int (*add_host) (struct sdhci_pci_slot *); 139522624f9SAdam Lee void (*remove_slot) (struct sdhci_pci_slot *, int); 140522624f9SAdam Lee 141b7813f0fSAdrian Hunter #ifdef CONFIG_PM_SLEEP 142522624f9SAdam Lee int (*suspend) (struct sdhci_pci_chip *); 143522624f9SAdam Lee int (*resume) (struct sdhci_pci_chip *); 144b7813f0fSAdrian Hunter #endif 145966d696aSAdrian Hunter #ifdef CONFIG_PM 146966d696aSAdrian Hunter int (*runtime_suspend) (struct sdhci_pci_chip *); 147966d696aSAdrian Hunter int (*runtime_resume) (struct sdhci_pci_chip *); 148966d696aSAdrian Hunter #endif 1496bc09063SAdrian Hunter 1506bc09063SAdrian Hunter const struct sdhci_ops *ops; 151ac9f67b5SAdrian Hunter size_t priv_size; 152522624f9SAdam Lee }; 153522624f9SAdam Lee 154522624f9SAdam Lee struct sdhci_pci_slot { 155522624f9SAdam Lee struct sdhci_pci_chip *chip; 156522624f9SAdam Lee struct sdhci_host *host; 157522624f9SAdam Lee struct sdhci_pci_data *data; 158522624f9SAdam Lee 159522624f9SAdam Lee int rst_n_gpio; 160522624f9SAdam Lee int cd_gpio; 161522624f9SAdam Lee int cd_irq; 162522624f9SAdam Lee 163ff59c520SAdrian Hunter int cd_idx; 164ff59c520SAdrian Hunter bool cd_override_level; 165ff59c520SAdrian Hunter 166522624f9SAdam Lee void (*hw_reset)(struct sdhci_host *host); 1671a91a36aSGustavo A. R. Silva unsigned long private[] ____cacheline_aligned; 168522624f9SAdam Lee }; 169522624f9SAdam Lee 170522624f9SAdam Lee struct sdhci_pci_chip { 171522624f9SAdam Lee struct pci_dev *pdev; 172522624f9SAdam Lee 173522624f9SAdam Lee unsigned int quirks; 174522624f9SAdam Lee unsigned int quirks2; 175522624f9SAdam Lee bool allow_runtime_pm; 176d38dcad4SAdrian Hunter bool pm_retune; 177d38dcad4SAdrian Hunter bool rpm_retune; 178522624f9SAdam Lee const struct sdhci_pci_fixes *fixes; 179522624f9SAdam Lee 180522624f9SAdam Lee int num_slots; /* Slots on controller */ 181522624f9SAdam Lee struct sdhci_pci_slot *slots[MAX_SLOTS]; /* Pointers to host slots */ 182522624f9SAdam Lee }; 183522624f9SAdam Lee 184ac9f67b5SAdrian Hunter static inline void *sdhci_pci_priv(struct sdhci_pci_slot *slot) 185ac9f67b5SAdrian Hunter { 186ac9f67b5SAdrian Hunter return (void *)slot->private; 187ac9f67b5SAdrian Hunter } 188ac9f67b5SAdrian Hunter 18930cf2803SAdrian Hunter #ifdef CONFIG_PM_SLEEP 19030cf2803SAdrian Hunter int sdhci_pci_resume_host(struct sdhci_pci_chip *chip); 19130cf2803SAdrian Hunter #endif 192d72d72cdSAtul Garg int sdhci_pci_enable_dma(struct sdhci_host *host); 193361eeda0SAdrian Hunter 194d72d72cdSAtul Garg extern const struct sdhci_pci_fixes sdhci_arasan; 195152f8204SPrabu Thangamuthu extern const struct sdhci_pci_fixes sdhci_snps; 196328be8beSErnest Zhang(WH) extern const struct sdhci_pci_fixes sdhci_o2; 197e51df6ceSBen Chuang extern const struct sdhci_pci_fixes sdhci_gl9750; 198e51df6ceSBen Chuang extern const struct sdhci_pci_fixes sdhci_gl9755; 1991ae1d2d6SBen Chuang extern const struct sdhci_pci_fixes sdhci_gl9763e; 200d72d72cdSAtul Garg 201522624f9SAdam Lee #endif /* __SDHCI_PCI_H */ 202