1659c9bc1SBen Hutchings /* linux/drivers/mmc/host/sdhci-pci.c - SDHCI on PCI bus interface 2659c9bc1SBen Hutchings * 3659c9bc1SBen Hutchings * Copyright (C) 2005-2008 Pierre Ossman, All Rights Reserved. 4659c9bc1SBen Hutchings * 5659c9bc1SBen Hutchings * This program is free software; you can redistribute it and/or modify 6659c9bc1SBen Hutchings * it under the terms of the GNU General Public License as published by 7659c9bc1SBen Hutchings * the Free Software Foundation; either version 2 of the License, or (at 8659c9bc1SBen Hutchings * your option) any later version. 9659c9bc1SBen Hutchings * 10659c9bc1SBen Hutchings * Thanks to the following companies for their support: 11659c9bc1SBen Hutchings * 12659c9bc1SBen Hutchings * - JMicron (hardware and technical support) 13659c9bc1SBen Hutchings */ 14659c9bc1SBen Hutchings 15a72016a4SAdrian Hunter #include <linux/string.h> 16659c9bc1SBen Hutchings #include <linux/delay.h> 17659c9bc1SBen Hutchings #include <linux/highmem.h> 18659c9bc1SBen Hutchings #include <linux/module.h> 19659c9bc1SBen Hutchings #include <linux/pci.h> 20659c9bc1SBen Hutchings #include <linux/dma-mapping.h> 21659c9bc1SBen Hutchings #include <linux/slab.h> 22659c9bc1SBen Hutchings #include <linux/device.h> 23659c9bc1SBen Hutchings #include <linux/mmc/host.h> 24659c9bc1SBen Hutchings #include <linux/mmc/mmc.h> 25659c9bc1SBen Hutchings #include <linux/scatterlist.h> 26659c9bc1SBen Hutchings #include <linux/io.h> 27659c9bc1SBen Hutchings #include <linux/gpio.h> 28659c9bc1SBen Hutchings #include <linux/pm_runtime.h> 29659c9bc1SBen Hutchings #include <linux/mmc/slot-gpio.h> 30659c9bc1SBen Hutchings #include <linux/mmc/sdhci-pci-data.h> 313f23df72SZach Brown #include <linux/acpi.h> 32659c9bc1SBen Hutchings 33659c9bc1SBen Hutchings #include "sdhci.h" 34659c9bc1SBen Hutchings #include "sdhci-pci.h" 35659c9bc1SBen Hutchings #include "sdhci-pci-o2micro.h" 36659c9bc1SBen Hutchings 37fee686b7SAdrian Hunter static int sdhci_pci_enable_dma(struct sdhci_host *host); 38fee686b7SAdrian Hunter static void sdhci_pci_hw_reset(struct sdhci_host *host); 39fee686b7SAdrian Hunter 4030cf2803SAdrian Hunter #ifdef CONFIG_PM_SLEEP 4130cf2803SAdrian Hunter static int __sdhci_pci_suspend_host(struct sdhci_pci_chip *chip) 4230cf2803SAdrian Hunter { 4330cf2803SAdrian Hunter int i, ret; 4430cf2803SAdrian Hunter 4530cf2803SAdrian Hunter for (i = 0; i < chip->num_slots; i++) { 4630cf2803SAdrian Hunter struct sdhci_pci_slot *slot = chip->slots[i]; 4730cf2803SAdrian Hunter struct sdhci_host *host; 4830cf2803SAdrian Hunter 4930cf2803SAdrian Hunter if (!slot) 5030cf2803SAdrian Hunter continue; 5130cf2803SAdrian Hunter 5230cf2803SAdrian Hunter host = slot->host; 5330cf2803SAdrian Hunter 5430cf2803SAdrian Hunter if (chip->pm_retune && host->tuning_mode != SDHCI_TUNING_MODE_3) 5530cf2803SAdrian Hunter mmc_retune_needed(host->mmc); 5630cf2803SAdrian Hunter 5730cf2803SAdrian Hunter ret = sdhci_suspend_host(host); 5830cf2803SAdrian Hunter if (ret) 5930cf2803SAdrian Hunter goto err_pci_suspend; 6030cf2803SAdrian Hunter 6130cf2803SAdrian Hunter if (host->mmc->pm_flags & MMC_PM_WAKE_SDIO_IRQ) 6230cf2803SAdrian Hunter sdhci_enable_irq_wakeups(host); 6330cf2803SAdrian Hunter } 6430cf2803SAdrian Hunter 6530cf2803SAdrian Hunter return 0; 6630cf2803SAdrian Hunter 6730cf2803SAdrian Hunter err_pci_suspend: 6830cf2803SAdrian Hunter while (--i >= 0) 6930cf2803SAdrian Hunter sdhci_resume_host(chip->slots[i]->host); 7030cf2803SAdrian Hunter return ret; 7130cf2803SAdrian Hunter } 7230cf2803SAdrian Hunter 7330cf2803SAdrian Hunter static int sdhci_pci_init_wakeup(struct sdhci_pci_chip *chip) 7430cf2803SAdrian Hunter { 7530cf2803SAdrian Hunter mmc_pm_flag_t pm_flags = 0; 7630cf2803SAdrian Hunter int i; 7730cf2803SAdrian Hunter 7830cf2803SAdrian Hunter for (i = 0; i < chip->num_slots; i++) { 7930cf2803SAdrian Hunter struct sdhci_pci_slot *slot = chip->slots[i]; 8030cf2803SAdrian Hunter 8130cf2803SAdrian Hunter if (slot) 8230cf2803SAdrian Hunter pm_flags |= slot->host->mmc->pm_flags; 8330cf2803SAdrian Hunter } 8430cf2803SAdrian Hunter 8530cf2803SAdrian Hunter return device_init_wakeup(&chip->pdev->dev, 8630cf2803SAdrian Hunter (pm_flags & MMC_PM_KEEP_POWER) && 8730cf2803SAdrian Hunter (pm_flags & MMC_PM_WAKE_SDIO_IRQ)); 8830cf2803SAdrian Hunter } 8930cf2803SAdrian Hunter 9030cf2803SAdrian Hunter static int sdhci_pci_suspend_host(struct sdhci_pci_chip *chip) 9130cf2803SAdrian Hunter { 9230cf2803SAdrian Hunter int ret; 9330cf2803SAdrian Hunter 9430cf2803SAdrian Hunter ret = __sdhci_pci_suspend_host(chip); 9530cf2803SAdrian Hunter if (ret) 9630cf2803SAdrian Hunter return ret; 9730cf2803SAdrian Hunter 9830cf2803SAdrian Hunter sdhci_pci_init_wakeup(chip); 9930cf2803SAdrian Hunter 10030cf2803SAdrian Hunter return 0; 10130cf2803SAdrian Hunter } 10230cf2803SAdrian Hunter 10330cf2803SAdrian Hunter int sdhci_pci_resume_host(struct sdhci_pci_chip *chip) 10430cf2803SAdrian Hunter { 10530cf2803SAdrian Hunter struct sdhci_pci_slot *slot; 10630cf2803SAdrian Hunter int i, ret; 10730cf2803SAdrian Hunter 10830cf2803SAdrian Hunter for (i = 0; i < chip->num_slots; i++) { 10930cf2803SAdrian Hunter slot = chip->slots[i]; 11030cf2803SAdrian Hunter if (!slot) 11130cf2803SAdrian Hunter continue; 11230cf2803SAdrian Hunter 11330cf2803SAdrian Hunter ret = sdhci_resume_host(slot->host); 11430cf2803SAdrian Hunter if (ret) 11530cf2803SAdrian Hunter return ret; 11630cf2803SAdrian Hunter } 11730cf2803SAdrian Hunter 11830cf2803SAdrian Hunter return 0; 11930cf2803SAdrian Hunter } 12030cf2803SAdrian Hunter #endif 12130cf2803SAdrian Hunter 122966d696aSAdrian Hunter #ifdef CONFIG_PM 123966d696aSAdrian Hunter static int sdhci_pci_runtime_suspend_host(struct sdhci_pci_chip *chip) 124966d696aSAdrian Hunter { 125966d696aSAdrian Hunter struct sdhci_pci_slot *slot; 126966d696aSAdrian Hunter struct sdhci_host *host; 127966d696aSAdrian Hunter int i, ret; 128966d696aSAdrian Hunter 129966d696aSAdrian Hunter for (i = 0; i < chip->num_slots; i++) { 130966d696aSAdrian Hunter slot = chip->slots[i]; 131966d696aSAdrian Hunter if (!slot) 132966d696aSAdrian Hunter continue; 133966d696aSAdrian Hunter 134966d696aSAdrian Hunter host = slot->host; 135966d696aSAdrian Hunter 136966d696aSAdrian Hunter ret = sdhci_runtime_suspend_host(host); 137966d696aSAdrian Hunter if (ret) 138966d696aSAdrian Hunter goto err_pci_runtime_suspend; 139966d696aSAdrian Hunter 140966d696aSAdrian Hunter if (chip->rpm_retune && 141966d696aSAdrian Hunter host->tuning_mode != SDHCI_TUNING_MODE_3) 142966d696aSAdrian Hunter mmc_retune_needed(host->mmc); 143966d696aSAdrian Hunter } 144966d696aSAdrian Hunter 145966d696aSAdrian Hunter return 0; 146966d696aSAdrian Hunter 147966d696aSAdrian Hunter err_pci_runtime_suspend: 148966d696aSAdrian Hunter while (--i >= 0) 149966d696aSAdrian Hunter sdhci_runtime_resume_host(chip->slots[i]->host); 150966d696aSAdrian Hunter return ret; 151966d696aSAdrian Hunter } 152966d696aSAdrian Hunter 153966d696aSAdrian Hunter static int sdhci_pci_runtime_resume_host(struct sdhci_pci_chip *chip) 154966d696aSAdrian Hunter { 155966d696aSAdrian Hunter struct sdhci_pci_slot *slot; 156966d696aSAdrian Hunter int i, ret; 157966d696aSAdrian Hunter 158966d696aSAdrian Hunter for (i = 0; i < chip->num_slots; i++) { 159966d696aSAdrian Hunter slot = chip->slots[i]; 160966d696aSAdrian Hunter if (!slot) 161966d696aSAdrian Hunter continue; 162966d696aSAdrian Hunter 163966d696aSAdrian Hunter ret = sdhci_runtime_resume_host(slot->host); 164966d696aSAdrian Hunter if (ret) 165966d696aSAdrian Hunter return ret; 166966d696aSAdrian Hunter } 167966d696aSAdrian Hunter 168966d696aSAdrian Hunter return 0; 169966d696aSAdrian Hunter } 170966d696aSAdrian Hunter #endif 171966d696aSAdrian Hunter 172659c9bc1SBen Hutchings /*****************************************************************************\ 173659c9bc1SBen Hutchings * * 174659c9bc1SBen Hutchings * Hardware specific quirk handling * 175659c9bc1SBen Hutchings * * 176659c9bc1SBen Hutchings \*****************************************************************************/ 177659c9bc1SBen Hutchings 178659c9bc1SBen Hutchings static int ricoh_probe(struct sdhci_pci_chip *chip) 179659c9bc1SBen Hutchings { 180659c9bc1SBen Hutchings if (chip->pdev->subsystem_vendor == PCI_VENDOR_ID_SAMSUNG || 181659c9bc1SBen Hutchings chip->pdev->subsystem_vendor == PCI_VENDOR_ID_SONY) 182659c9bc1SBen Hutchings chip->quirks |= SDHCI_QUIRK_NO_CARD_NO_RESET; 183659c9bc1SBen Hutchings return 0; 184659c9bc1SBen Hutchings } 185659c9bc1SBen Hutchings 186659c9bc1SBen Hutchings static int ricoh_mmc_probe_slot(struct sdhci_pci_slot *slot) 187659c9bc1SBen Hutchings { 188659c9bc1SBen Hutchings slot->host->caps = 189659c9bc1SBen Hutchings ((0x21 << SDHCI_TIMEOUT_CLK_SHIFT) 190659c9bc1SBen Hutchings & SDHCI_TIMEOUT_CLK_MASK) | 191659c9bc1SBen Hutchings 192659c9bc1SBen Hutchings ((0x21 << SDHCI_CLOCK_BASE_SHIFT) 193659c9bc1SBen Hutchings & SDHCI_CLOCK_BASE_MASK) | 194659c9bc1SBen Hutchings 195659c9bc1SBen Hutchings SDHCI_TIMEOUT_CLK_UNIT | 196659c9bc1SBen Hutchings SDHCI_CAN_VDD_330 | 197659c9bc1SBen Hutchings SDHCI_CAN_DO_HISPD | 198659c9bc1SBen Hutchings SDHCI_CAN_DO_SDMA; 199659c9bc1SBen Hutchings return 0; 200659c9bc1SBen Hutchings } 201659c9bc1SBen Hutchings 202b7813f0fSAdrian Hunter #ifdef CONFIG_PM_SLEEP 203659c9bc1SBen Hutchings static int ricoh_mmc_resume(struct sdhci_pci_chip *chip) 204659c9bc1SBen Hutchings { 205659c9bc1SBen Hutchings /* Apply a delay to allow controller to settle */ 206659c9bc1SBen Hutchings /* Otherwise it becomes confused if card state changed 207659c9bc1SBen Hutchings during suspend */ 208659c9bc1SBen Hutchings msleep(500); 20930cf2803SAdrian Hunter return sdhci_pci_resume_host(chip); 210659c9bc1SBen Hutchings } 211b7813f0fSAdrian Hunter #endif 212659c9bc1SBen Hutchings 213659c9bc1SBen Hutchings static const struct sdhci_pci_fixes sdhci_ricoh = { 214659c9bc1SBen Hutchings .probe = ricoh_probe, 215659c9bc1SBen Hutchings .quirks = SDHCI_QUIRK_32BIT_DMA_ADDR | 216659c9bc1SBen Hutchings SDHCI_QUIRK_FORCE_DMA | 217659c9bc1SBen Hutchings SDHCI_QUIRK_CLOCK_BEFORE_RESET, 218659c9bc1SBen Hutchings }; 219659c9bc1SBen Hutchings 220659c9bc1SBen Hutchings static const struct sdhci_pci_fixes sdhci_ricoh_mmc = { 221659c9bc1SBen Hutchings .probe_slot = ricoh_mmc_probe_slot, 222b7813f0fSAdrian Hunter #ifdef CONFIG_PM_SLEEP 223659c9bc1SBen Hutchings .resume = ricoh_mmc_resume, 224b7813f0fSAdrian Hunter #endif 225659c9bc1SBen Hutchings .quirks = SDHCI_QUIRK_32BIT_DMA_ADDR | 226659c9bc1SBen Hutchings SDHCI_QUIRK_CLOCK_BEFORE_RESET | 227659c9bc1SBen Hutchings SDHCI_QUIRK_NO_CARD_NO_RESET | 228659c9bc1SBen Hutchings SDHCI_QUIRK_MISSING_CAPS 229659c9bc1SBen Hutchings }; 230659c9bc1SBen Hutchings 231659c9bc1SBen Hutchings static const struct sdhci_pci_fixes sdhci_ene_712 = { 232659c9bc1SBen Hutchings .quirks = SDHCI_QUIRK_SINGLE_POWER_WRITE | 233659c9bc1SBen Hutchings SDHCI_QUIRK_BROKEN_DMA, 234659c9bc1SBen Hutchings }; 235659c9bc1SBen Hutchings 236659c9bc1SBen Hutchings static const struct sdhci_pci_fixes sdhci_ene_714 = { 237659c9bc1SBen Hutchings .quirks = SDHCI_QUIRK_SINGLE_POWER_WRITE | 238659c9bc1SBen Hutchings SDHCI_QUIRK_RESET_CMD_DATA_ON_IOS | 239659c9bc1SBen Hutchings SDHCI_QUIRK_BROKEN_DMA, 240659c9bc1SBen Hutchings }; 241659c9bc1SBen Hutchings 242659c9bc1SBen Hutchings static const struct sdhci_pci_fixes sdhci_cafe = { 243659c9bc1SBen Hutchings .quirks = SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER | 244659c9bc1SBen Hutchings SDHCI_QUIRK_NO_BUSY_IRQ | 245659c9bc1SBen Hutchings SDHCI_QUIRK_BROKEN_CARD_DETECTION | 246659c9bc1SBen Hutchings SDHCI_QUIRK_BROKEN_TIMEOUT_VAL, 247659c9bc1SBen Hutchings }; 248659c9bc1SBen Hutchings 249659c9bc1SBen Hutchings static const struct sdhci_pci_fixes sdhci_intel_qrk = { 250659c9bc1SBen Hutchings .quirks = SDHCI_QUIRK_NO_HISPD_BIT, 251659c9bc1SBen Hutchings }; 252659c9bc1SBen Hutchings 253659c9bc1SBen Hutchings static int mrst_hc_probe_slot(struct sdhci_pci_slot *slot) 254659c9bc1SBen Hutchings { 255659c9bc1SBen Hutchings slot->host->mmc->caps |= MMC_CAP_8_BIT_DATA; 256659c9bc1SBen Hutchings return 0; 257659c9bc1SBen Hutchings } 258659c9bc1SBen Hutchings 259659c9bc1SBen Hutchings /* 260659c9bc1SBen Hutchings * ADMA operation is disabled for Moorestown platform due to 261659c9bc1SBen Hutchings * hardware bugs. 262659c9bc1SBen Hutchings */ 263659c9bc1SBen Hutchings static int mrst_hc_probe(struct sdhci_pci_chip *chip) 264659c9bc1SBen Hutchings { 265659c9bc1SBen Hutchings /* 266659c9bc1SBen Hutchings * slots number is fixed here for MRST as SDIO3/5 are never used and 267659c9bc1SBen Hutchings * have hardware bugs. 268659c9bc1SBen Hutchings */ 269659c9bc1SBen Hutchings chip->num_slots = 1; 270659c9bc1SBen Hutchings return 0; 271659c9bc1SBen Hutchings } 272659c9bc1SBen Hutchings 273659c9bc1SBen Hutchings static int pch_hc_probe_slot(struct sdhci_pci_slot *slot) 274659c9bc1SBen Hutchings { 275659c9bc1SBen Hutchings slot->host->mmc->caps |= MMC_CAP_8_BIT_DATA; 276659c9bc1SBen Hutchings return 0; 277659c9bc1SBen Hutchings } 278659c9bc1SBen Hutchings 279659c9bc1SBen Hutchings #ifdef CONFIG_PM 280659c9bc1SBen Hutchings 281659c9bc1SBen Hutchings static irqreturn_t sdhci_pci_sd_cd(int irq, void *dev_id) 282659c9bc1SBen Hutchings { 283659c9bc1SBen Hutchings struct sdhci_pci_slot *slot = dev_id; 284659c9bc1SBen Hutchings struct sdhci_host *host = slot->host; 285659c9bc1SBen Hutchings 286659c9bc1SBen Hutchings mmc_detect_change(host->mmc, msecs_to_jiffies(200)); 287659c9bc1SBen Hutchings return IRQ_HANDLED; 288659c9bc1SBen Hutchings } 289659c9bc1SBen Hutchings 290659c9bc1SBen Hutchings static void sdhci_pci_add_own_cd(struct sdhci_pci_slot *slot) 291659c9bc1SBen Hutchings { 292659c9bc1SBen Hutchings int err, irq, gpio = slot->cd_gpio; 293659c9bc1SBen Hutchings 294659c9bc1SBen Hutchings slot->cd_gpio = -EINVAL; 295659c9bc1SBen Hutchings slot->cd_irq = -EINVAL; 296659c9bc1SBen Hutchings 297659c9bc1SBen Hutchings if (!gpio_is_valid(gpio)) 298659c9bc1SBen Hutchings return; 299659c9bc1SBen Hutchings 300c10bc372SAndy Shevchenko err = devm_gpio_request(&slot->chip->pdev->dev, gpio, "sd_cd"); 301659c9bc1SBen Hutchings if (err < 0) 302659c9bc1SBen Hutchings goto out; 303659c9bc1SBen Hutchings 304659c9bc1SBen Hutchings err = gpio_direction_input(gpio); 305659c9bc1SBen Hutchings if (err < 0) 306659c9bc1SBen Hutchings goto out_free; 307659c9bc1SBen Hutchings 308659c9bc1SBen Hutchings irq = gpio_to_irq(gpio); 309659c9bc1SBen Hutchings if (irq < 0) 310659c9bc1SBen Hutchings goto out_free; 311659c9bc1SBen Hutchings 312659c9bc1SBen Hutchings err = request_irq(irq, sdhci_pci_sd_cd, IRQF_TRIGGER_RISING | 313659c9bc1SBen Hutchings IRQF_TRIGGER_FALLING, "sd_cd", slot); 314659c9bc1SBen Hutchings if (err) 315659c9bc1SBen Hutchings goto out_free; 316659c9bc1SBen Hutchings 317659c9bc1SBen Hutchings slot->cd_gpio = gpio; 318659c9bc1SBen Hutchings slot->cd_irq = irq; 319659c9bc1SBen Hutchings 320659c9bc1SBen Hutchings return; 321659c9bc1SBen Hutchings 322659c9bc1SBen Hutchings out_free: 323c10bc372SAndy Shevchenko devm_gpio_free(&slot->chip->pdev->dev, gpio); 324659c9bc1SBen Hutchings out: 325659c9bc1SBen Hutchings dev_warn(&slot->chip->pdev->dev, "failed to setup card detect wake up\n"); 326659c9bc1SBen Hutchings } 327659c9bc1SBen Hutchings 328659c9bc1SBen Hutchings static void sdhci_pci_remove_own_cd(struct sdhci_pci_slot *slot) 329659c9bc1SBen Hutchings { 330659c9bc1SBen Hutchings if (slot->cd_irq >= 0) 331659c9bc1SBen Hutchings free_irq(slot->cd_irq, slot); 332659c9bc1SBen Hutchings } 333659c9bc1SBen Hutchings 334659c9bc1SBen Hutchings #else 335659c9bc1SBen Hutchings 336659c9bc1SBen Hutchings static inline void sdhci_pci_add_own_cd(struct sdhci_pci_slot *slot) 337659c9bc1SBen Hutchings { 338659c9bc1SBen Hutchings } 339659c9bc1SBen Hutchings 340659c9bc1SBen Hutchings static inline void sdhci_pci_remove_own_cd(struct sdhci_pci_slot *slot) 341659c9bc1SBen Hutchings { 342659c9bc1SBen Hutchings } 343659c9bc1SBen Hutchings 344659c9bc1SBen Hutchings #endif 345659c9bc1SBen Hutchings 346659c9bc1SBen Hutchings static int mfd_emmc_probe_slot(struct sdhci_pci_slot *slot) 347659c9bc1SBen Hutchings { 348659c9bc1SBen Hutchings slot->host->mmc->caps |= MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE; 349d2a47176SUlf Hansson slot->host->mmc->caps2 |= MMC_CAP2_BOOTPART_NOACC; 350659c9bc1SBen Hutchings return 0; 351659c9bc1SBen Hutchings } 352659c9bc1SBen Hutchings 353659c9bc1SBen Hutchings static int mfd_sdio_probe_slot(struct sdhci_pci_slot *slot) 354659c9bc1SBen Hutchings { 355659c9bc1SBen Hutchings slot->host->mmc->caps |= MMC_CAP_POWER_OFF_CARD | MMC_CAP_NONREMOVABLE; 356659c9bc1SBen Hutchings return 0; 357659c9bc1SBen Hutchings } 358659c9bc1SBen Hutchings 359659c9bc1SBen Hutchings static const struct sdhci_pci_fixes sdhci_intel_mrst_hc0 = { 360659c9bc1SBen Hutchings .quirks = SDHCI_QUIRK_BROKEN_ADMA | SDHCI_QUIRK_NO_HISPD_BIT, 361659c9bc1SBen Hutchings .probe_slot = mrst_hc_probe_slot, 362659c9bc1SBen Hutchings }; 363659c9bc1SBen Hutchings 364659c9bc1SBen Hutchings static const struct sdhci_pci_fixes sdhci_intel_mrst_hc1_hc2 = { 365659c9bc1SBen Hutchings .quirks = SDHCI_QUIRK_BROKEN_ADMA | SDHCI_QUIRK_NO_HISPD_BIT, 366659c9bc1SBen Hutchings .probe = mrst_hc_probe, 367659c9bc1SBen Hutchings }; 368659c9bc1SBen Hutchings 369659c9bc1SBen Hutchings static const struct sdhci_pci_fixes sdhci_intel_mfd_sd = { 370659c9bc1SBen Hutchings .quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC, 371659c9bc1SBen Hutchings .allow_runtime_pm = true, 372659c9bc1SBen Hutchings .own_cd_for_runtime_pm = true, 373659c9bc1SBen Hutchings }; 374659c9bc1SBen Hutchings 375659c9bc1SBen Hutchings static const struct sdhci_pci_fixes sdhci_intel_mfd_sdio = { 376659c9bc1SBen Hutchings .quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC, 377659c9bc1SBen Hutchings .quirks2 = SDHCI_QUIRK2_HOST_OFF_CARD_ON, 378659c9bc1SBen Hutchings .allow_runtime_pm = true, 379659c9bc1SBen Hutchings .probe_slot = mfd_sdio_probe_slot, 380659c9bc1SBen Hutchings }; 381659c9bc1SBen Hutchings 382659c9bc1SBen Hutchings static const struct sdhci_pci_fixes sdhci_intel_mfd_emmc = { 383659c9bc1SBen Hutchings .quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC, 384659c9bc1SBen Hutchings .allow_runtime_pm = true, 385659c9bc1SBen Hutchings .probe_slot = mfd_emmc_probe_slot, 386659c9bc1SBen Hutchings }; 387659c9bc1SBen Hutchings 388659c9bc1SBen Hutchings static const struct sdhci_pci_fixes sdhci_intel_pch_sdio = { 389659c9bc1SBen Hutchings .quirks = SDHCI_QUIRK_BROKEN_ADMA, 390659c9bc1SBen Hutchings .probe_slot = pch_hc_probe_slot, 391659c9bc1SBen Hutchings }; 392659c9bc1SBen Hutchings 393c959a6b0SAdrian Hunter enum { 394c959a6b0SAdrian Hunter INTEL_DSM_FNS = 0, 3956ae03368SAdrian Hunter INTEL_DSM_V18_SWITCH = 3, 39651ced59cSAdrian Hunter INTEL_DSM_DRV_STRENGTH = 9, 397c959a6b0SAdrian Hunter INTEL_DSM_D3_RETUNE = 10, 398c959a6b0SAdrian Hunter }; 399c959a6b0SAdrian Hunter 400c959a6b0SAdrian Hunter struct intel_host { 401c959a6b0SAdrian Hunter u32 dsm_fns; 40251ced59cSAdrian Hunter int drv_strength; 403c959a6b0SAdrian Hunter bool d3_retune; 404c959a6b0SAdrian Hunter }; 405c959a6b0SAdrian Hunter 406c37f69ffSColin Ian King static const guid_t intel_dsm_guid = 40794116f81SAndy Shevchenko GUID_INIT(0xF6C13EA5, 0x65CD, 0x461F, 40894116f81SAndy Shevchenko 0xAB, 0x7A, 0x29, 0xF7, 0xE8, 0xD5, 0xBD, 0x61); 409c959a6b0SAdrian Hunter 410c959a6b0SAdrian Hunter static int __intel_dsm(struct intel_host *intel_host, struct device *dev, 411c959a6b0SAdrian Hunter unsigned int fn, u32 *result) 412c959a6b0SAdrian Hunter { 413c959a6b0SAdrian Hunter union acpi_object *obj; 414c959a6b0SAdrian Hunter int err = 0; 415a72016a4SAdrian Hunter size_t len; 416c959a6b0SAdrian Hunter 41794116f81SAndy Shevchenko obj = acpi_evaluate_dsm(ACPI_HANDLE(dev), &intel_dsm_guid, 0, fn, NULL); 418c959a6b0SAdrian Hunter if (!obj) 419c959a6b0SAdrian Hunter return -EOPNOTSUPP; 420c959a6b0SAdrian Hunter 421c959a6b0SAdrian Hunter if (obj->type != ACPI_TYPE_BUFFER || obj->buffer.length < 1) { 422c959a6b0SAdrian Hunter err = -EINVAL; 423c959a6b0SAdrian Hunter goto out; 424c959a6b0SAdrian Hunter } 425c959a6b0SAdrian Hunter 426a72016a4SAdrian Hunter len = min_t(size_t, obj->buffer.length, 4); 427a72016a4SAdrian Hunter 428a72016a4SAdrian Hunter *result = 0; 429a72016a4SAdrian Hunter memcpy(result, obj->buffer.pointer, len); 430c959a6b0SAdrian Hunter out: 431c959a6b0SAdrian Hunter ACPI_FREE(obj); 432c959a6b0SAdrian Hunter 433c959a6b0SAdrian Hunter return err; 434c959a6b0SAdrian Hunter } 435c959a6b0SAdrian Hunter 436c959a6b0SAdrian Hunter static int intel_dsm(struct intel_host *intel_host, struct device *dev, 437c959a6b0SAdrian Hunter unsigned int fn, u32 *result) 438c959a6b0SAdrian Hunter { 439c959a6b0SAdrian Hunter if (fn > 31 || !(intel_host->dsm_fns & (1 << fn))) 440c959a6b0SAdrian Hunter return -EOPNOTSUPP; 441c959a6b0SAdrian Hunter 442c959a6b0SAdrian Hunter return __intel_dsm(intel_host, dev, fn, result); 443c959a6b0SAdrian Hunter } 444c959a6b0SAdrian Hunter 445c959a6b0SAdrian Hunter static void intel_dsm_init(struct intel_host *intel_host, struct device *dev, 446c959a6b0SAdrian Hunter struct mmc_host *mmc) 447c959a6b0SAdrian Hunter { 448c959a6b0SAdrian Hunter int err; 449c959a6b0SAdrian Hunter u32 val; 450c959a6b0SAdrian Hunter 451eb701ce1SAdrian Hunter intel_host->d3_retune = true; 452eb701ce1SAdrian Hunter 453c959a6b0SAdrian Hunter err = __intel_dsm(intel_host, dev, INTEL_DSM_FNS, &intel_host->dsm_fns); 454c959a6b0SAdrian Hunter if (err) { 455c959a6b0SAdrian Hunter pr_debug("%s: DSM not supported, error %d\n", 456c959a6b0SAdrian Hunter mmc_hostname(mmc), err); 457c959a6b0SAdrian Hunter return; 458c959a6b0SAdrian Hunter } 459c959a6b0SAdrian Hunter 460c959a6b0SAdrian Hunter pr_debug("%s: DSM function mask %#x\n", 461c959a6b0SAdrian Hunter mmc_hostname(mmc), intel_host->dsm_fns); 462c959a6b0SAdrian Hunter 46351ced59cSAdrian Hunter err = intel_dsm(intel_host, dev, INTEL_DSM_DRV_STRENGTH, &val); 46451ced59cSAdrian Hunter intel_host->drv_strength = err ? 0 : val; 46551ced59cSAdrian Hunter 466c959a6b0SAdrian Hunter err = intel_dsm(intel_host, dev, INTEL_DSM_D3_RETUNE, &val); 467c959a6b0SAdrian Hunter intel_host->d3_retune = err ? true : !!val; 468c959a6b0SAdrian Hunter } 469c959a6b0SAdrian Hunter 470659c9bc1SBen Hutchings static void sdhci_pci_int_hw_reset(struct sdhci_host *host) 471659c9bc1SBen Hutchings { 472659c9bc1SBen Hutchings u8 reg; 473659c9bc1SBen Hutchings 474659c9bc1SBen Hutchings reg = sdhci_readb(host, SDHCI_POWER_CONTROL); 475659c9bc1SBen Hutchings reg |= 0x10; 476659c9bc1SBen Hutchings sdhci_writeb(host, reg, SDHCI_POWER_CONTROL); 477659c9bc1SBen Hutchings /* For eMMC, minimum is 1us but give it 9us for good measure */ 478659c9bc1SBen Hutchings udelay(9); 479659c9bc1SBen Hutchings reg &= ~0x10; 480659c9bc1SBen Hutchings sdhci_writeb(host, reg, SDHCI_POWER_CONTROL); 481659c9bc1SBen Hutchings /* For eMMC, minimum is 200us but give it 300us for good measure */ 482659c9bc1SBen Hutchings usleep_range(300, 1000); 483659c9bc1SBen Hutchings } 484659c9bc1SBen Hutchings 48551ced59cSAdrian Hunter static int intel_select_drive_strength(struct mmc_card *card, 48651ced59cSAdrian Hunter unsigned int max_dtr, int host_drv, 48751ced59cSAdrian Hunter int card_drv, int *drv_type) 488659c9bc1SBen Hutchings { 48951ced59cSAdrian Hunter struct sdhci_host *host = mmc_priv(card->host); 49051ced59cSAdrian Hunter struct sdhci_pci_slot *slot = sdhci_priv(host); 49151ced59cSAdrian Hunter struct intel_host *intel_host = sdhci_pci_priv(slot); 492659c9bc1SBen Hutchings 49351ced59cSAdrian Hunter return intel_host->drv_strength; 494659c9bc1SBen Hutchings } 495659c9bc1SBen Hutchings 496163cbe31SAdrian Hunter static int bxt_get_cd(struct mmc_host *mmc) 497163cbe31SAdrian Hunter { 498163cbe31SAdrian Hunter int gpio_cd = mmc_gpio_get_cd(mmc); 499163cbe31SAdrian Hunter struct sdhci_host *host = mmc_priv(mmc); 500163cbe31SAdrian Hunter unsigned long flags; 501163cbe31SAdrian Hunter int ret = 0; 502163cbe31SAdrian Hunter 503163cbe31SAdrian Hunter if (!gpio_cd) 504163cbe31SAdrian Hunter return 0; 505163cbe31SAdrian Hunter 506163cbe31SAdrian Hunter spin_lock_irqsave(&host->lock, flags); 507163cbe31SAdrian Hunter 508163cbe31SAdrian Hunter if (host->flags & SDHCI_DEVICE_DEAD) 509163cbe31SAdrian Hunter goto out; 510163cbe31SAdrian Hunter 511163cbe31SAdrian Hunter ret = !!(sdhci_readl(host, SDHCI_PRESENT_STATE) & SDHCI_CARD_PRESENT); 512163cbe31SAdrian Hunter out: 513163cbe31SAdrian Hunter spin_unlock_irqrestore(&host->lock, flags); 514163cbe31SAdrian Hunter 515163cbe31SAdrian Hunter return ret; 516163cbe31SAdrian Hunter } 517163cbe31SAdrian Hunter 51848d685a2SAdrian Hunter #define SDHCI_INTEL_PWR_TIMEOUT_CNT 20 51948d685a2SAdrian Hunter #define SDHCI_INTEL_PWR_TIMEOUT_UDELAY 100 52048d685a2SAdrian Hunter 52148d685a2SAdrian Hunter static void sdhci_intel_set_power(struct sdhci_host *host, unsigned char mode, 52248d685a2SAdrian Hunter unsigned short vdd) 52348d685a2SAdrian Hunter { 52448d685a2SAdrian Hunter int cntr; 52548d685a2SAdrian Hunter u8 reg; 52648d685a2SAdrian Hunter 52748d685a2SAdrian Hunter sdhci_set_power(host, mode, vdd); 52848d685a2SAdrian Hunter 52948d685a2SAdrian Hunter if (mode == MMC_POWER_OFF) 53048d685a2SAdrian Hunter return; 53148d685a2SAdrian Hunter 53248d685a2SAdrian Hunter /* 53348d685a2SAdrian Hunter * Bus power might not enable after D3 -> D0 transition due to the 53448d685a2SAdrian Hunter * present state not yet having propagated. Retry for up to 2ms. 53548d685a2SAdrian Hunter */ 53648d685a2SAdrian Hunter for (cntr = 0; cntr < SDHCI_INTEL_PWR_TIMEOUT_CNT; cntr++) { 53748d685a2SAdrian Hunter reg = sdhci_readb(host, SDHCI_POWER_CONTROL); 53848d685a2SAdrian Hunter if (reg & SDHCI_POWER_ON) 53948d685a2SAdrian Hunter break; 54048d685a2SAdrian Hunter udelay(SDHCI_INTEL_PWR_TIMEOUT_UDELAY); 54148d685a2SAdrian Hunter reg |= SDHCI_POWER_ON; 54248d685a2SAdrian Hunter sdhci_writeb(host, reg, SDHCI_POWER_CONTROL); 54348d685a2SAdrian Hunter } 54448d685a2SAdrian Hunter } 54548d685a2SAdrian Hunter 546bc55dcd8SAdrian Hunter #define INTEL_HS400_ES_REG 0x78 547bc55dcd8SAdrian Hunter #define INTEL_HS400_ES_BIT BIT(0) 548bc55dcd8SAdrian Hunter 549bc55dcd8SAdrian Hunter static void intel_hs400_enhanced_strobe(struct mmc_host *mmc, 550bc55dcd8SAdrian Hunter struct mmc_ios *ios) 551bc55dcd8SAdrian Hunter { 552bc55dcd8SAdrian Hunter struct sdhci_host *host = mmc_priv(mmc); 553bc55dcd8SAdrian Hunter u32 val; 554bc55dcd8SAdrian Hunter 555bc55dcd8SAdrian Hunter val = sdhci_readl(host, INTEL_HS400_ES_REG); 556bc55dcd8SAdrian Hunter if (ios->enhanced_strobe) 557bc55dcd8SAdrian Hunter val |= INTEL_HS400_ES_BIT; 558bc55dcd8SAdrian Hunter else 559bc55dcd8SAdrian Hunter val &= ~INTEL_HS400_ES_BIT; 560bc55dcd8SAdrian Hunter sdhci_writel(host, val, INTEL_HS400_ES_REG); 561bc55dcd8SAdrian Hunter } 562bc55dcd8SAdrian Hunter 5636ae03368SAdrian Hunter static void sdhci_intel_voltage_switch(struct sdhci_host *host) 5646ae03368SAdrian Hunter { 5656ae03368SAdrian Hunter struct sdhci_pci_slot *slot = sdhci_priv(host); 5666ae03368SAdrian Hunter struct intel_host *intel_host = sdhci_pci_priv(slot); 5676ae03368SAdrian Hunter struct device *dev = &slot->chip->pdev->dev; 5686ae03368SAdrian Hunter u32 result = 0; 5696ae03368SAdrian Hunter int err; 5706ae03368SAdrian Hunter 5716ae03368SAdrian Hunter err = intel_dsm(intel_host, dev, INTEL_DSM_V18_SWITCH, &result); 5726ae03368SAdrian Hunter pr_debug("%s: %s DSM error %d result %u\n", 5736ae03368SAdrian Hunter mmc_hostname(host->mmc), __func__, err, result); 5746ae03368SAdrian Hunter } 5756ae03368SAdrian Hunter 57648d685a2SAdrian Hunter static const struct sdhci_ops sdhci_intel_byt_ops = { 57748d685a2SAdrian Hunter .set_clock = sdhci_set_clock, 57848d685a2SAdrian Hunter .set_power = sdhci_intel_set_power, 57948d685a2SAdrian Hunter .enable_dma = sdhci_pci_enable_dma, 580adc16398SMichał Mirosław .set_bus_width = sdhci_set_bus_width, 58148d685a2SAdrian Hunter .reset = sdhci_reset, 58248d685a2SAdrian Hunter .set_uhs_signaling = sdhci_set_uhs_signaling, 58348d685a2SAdrian Hunter .hw_reset = sdhci_pci_hw_reset, 5846ae03368SAdrian Hunter .voltage_switch = sdhci_intel_voltage_switch, 58548d685a2SAdrian Hunter }; 58648d685a2SAdrian Hunter 587c959a6b0SAdrian Hunter static void byt_read_dsm(struct sdhci_pci_slot *slot) 588c959a6b0SAdrian Hunter { 589c959a6b0SAdrian Hunter struct intel_host *intel_host = sdhci_pci_priv(slot); 590c959a6b0SAdrian Hunter struct device *dev = &slot->chip->pdev->dev; 591c959a6b0SAdrian Hunter struct mmc_host *mmc = slot->host->mmc; 592c959a6b0SAdrian Hunter 593c959a6b0SAdrian Hunter intel_dsm_init(intel_host, dev, mmc); 594c959a6b0SAdrian Hunter slot->chip->rpm_retune = intel_host->d3_retune; 595c959a6b0SAdrian Hunter } 596c959a6b0SAdrian Hunter 597659c9bc1SBen Hutchings static int byt_emmc_probe_slot(struct sdhci_pci_slot *slot) 598659c9bc1SBen Hutchings { 599c959a6b0SAdrian Hunter byt_read_dsm(slot); 600659c9bc1SBen Hutchings slot->host->mmc->caps |= MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE | 601659c9bc1SBen Hutchings MMC_CAP_HW_RESET | MMC_CAP_1_8V_DDR | 60232828857SAdrian Hunter MMC_CAP_CMD_DURING_TFR | 603659c9bc1SBen Hutchings MMC_CAP_WAIT_WHILE_BUSY; 604659c9bc1SBen Hutchings slot->hw_reset = sdhci_pci_int_hw_reset; 605659c9bc1SBen Hutchings if (slot->chip->pdev->device == PCI_DEVICE_ID_INTEL_BSW_EMMC) 606659c9bc1SBen Hutchings slot->host->timeout_clk = 1000; /* 1000 kHz i.e. 1 MHz */ 60751ced59cSAdrian Hunter slot->host->mmc_host_ops.select_drive_strength = 60851ced59cSAdrian Hunter intel_select_drive_strength; 609659c9bc1SBen Hutchings return 0; 610659c9bc1SBen Hutchings } 611659c9bc1SBen Hutchings 612bc55dcd8SAdrian Hunter static int glk_emmc_probe_slot(struct sdhci_pci_slot *slot) 613bc55dcd8SAdrian Hunter { 614bc55dcd8SAdrian Hunter int ret = byt_emmc_probe_slot(slot); 615bc55dcd8SAdrian Hunter 616bc55dcd8SAdrian Hunter if (slot->chip->pdev->device != PCI_DEVICE_ID_INTEL_GLK_EMMC) { 617bc55dcd8SAdrian Hunter slot->host->mmc->caps2 |= MMC_CAP2_HS400_ES, 618bc55dcd8SAdrian Hunter slot->host->mmc_host_ops.hs400_enhanced_strobe = 619bc55dcd8SAdrian Hunter intel_hs400_enhanced_strobe; 620bc55dcd8SAdrian Hunter } 621bc55dcd8SAdrian Hunter 622bc55dcd8SAdrian Hunter return ret; 623bc55dcd8SAdrian Hunter } 624bc55dcd8SAdrian Hunter 6253f23df72SZach Brown #ifdef CONFIG_ACPI 6263f23df72SZach Brown static int ni_set_max_freq(struct sdhci_pci_slot *slot) 6273f23df72SZach Brown { 6283f23df72SZach Brown acpi_status status; 6293f23df72SZach Brown unsigned long long max_freq; 6303f23df72SZach Brown 6313f23df72SZach Brown status = acpi_evaluate_integer(ACPI_HANDLE(&slot->chip->pdev->dev), 6323f23df72SZach Brown "MXFQ", NULL, &max_freq); 6333f23df72SZach Brown if (ACPI_FAILURE(status)) { 6343f23df72SZach Brown dev_err(&slot->chip->pdev->dev, 6353f23df72SZach Brown "MXFQ not found in acpi table\n"); 6363f23df72SZach Brown return -EINVAL; 6373f23df72SZach Brown } 6383f23df72SZach Brown 6393f23df72SZach Brown slot->host->mmc->f_max = max_freq * 1000000; 6403f23df72SZach Brown 6413f23df72SZach Brown return 0; 6423f23df72SZach Brown } 6433f23df72SZach Brown #else 6443f23df72SZach Brown static inline int ni_set_max_freq(struct sdhci_pci_slot *slot) 6453f23df72SZach Brown { 6463f23df72SZach Brown return 0; 6473f23df72SZach Brown } 6483f23df72SZach Brown #endif 6493f23df72SZach Brown 65042b06496SZach Brown static int ni_byt_sdio_probe_slot(struct sdhci_pci_slot *slot) 65142b06496SZach Brown { 6523f23df72SZach Brown int err; 6533f23df72SZach Brown 654c959a6b0SAdrian Hunter byt_read_dsm(slot); 655c959a6b0SAdrian Hunter 6563f23df72SZach Brown err = ni_set_max_freq(slot); 6573f23df72SZach Brown if (err) 6583f23df72SZach Brown return err; 6593f23df72SZach Brown 66042b06496SZach Brown slot->host->mmc->caps |= MMC_CAP_POWER_OFF_CARD | MMC_CAP_NONREMOVABLE | 66142b06496SZach Brown MMC_CAP_WAIT_WHILE_BUSY; 66242b06496SZach Brown return 0; 66342b06496SZach Brown } 66442b06496SZach Brown 665659c9bc1SBen Hutchings static int byt_sdio_probe_slot(struct sdhci_pci_slot *slot) 666659c9bc1SBen Hutchings { 667c959a6b0SAdrian Hunter byt_read_dsm(slot); 668659c9bc1SBen Hutchings slot->host->mmc->caps |= MMC_CAP_POWER_OFF_CARD | MMC_CAP_NONREMOVABLE | 669659c9bc1SBen Hutchings MMC_CAP_WAIT_WHILE_BUSY; 670659c9bc1SBen Hutchings return 0; 671659c9bc1SBen Hutchings } 672659c9bc1SBen Hutchings 673659c9bc1SBen Hutchings static int byt_sd_probe_slot(struct sdhci_pci_slot *slot) 674659c9bc1SBen Hutchings { 675c959a6b0SAdrian Hunter byt_read_dsm(slot); 676c2c49a2eSAzhar Shaikh slot->host->mmc->caps |= MMC_CAP_WAIT_WHILE_BUSY | 6776cf4156cSAdrian Hunter MMC_CAP_AGGRESSIVE_PM | MMC_CAP_CD_WAKE; 678659c9bc1SBen Hutchings slot->cd_idx = 0; 679659c9bc1SBen Hutchings slot->cd_override_level = true; 680163cbe31SAdrian Hunter if (slot->chip->pdev->device == PCI_DEVICE_ID_INTEL_BXT_SD || 68101d6b2a4SAdrian Hunter slot->chip->pdev->device == PCI_DEVICE_ID_INTEL_BXTM_SD || 6822d1956d0SAdrian Hunter slot->chip->pdev->device == PCI_DEVICE_ID_INTEL_APL_SD || 683c2c49a2eSAzhar Shaikh slot->chip->pdev->device == PCI_DEVICE_ID_INTEL_GLK_SD) 684163cbe31SAdrian Hunter slot->host->mmc_host_ops.get_cd = bxt_get_cd; 685163cbe31SAdrian Hunter 686659c9bc1SBen Hutchings return 0; 687659c9bc1SBen Hutchings } 688659c9bc1SBen Hutchings 689659c9bc1SBen Hutchings static const struct sdhci_pci_fixes sdhci_intel_byt_emmc = { 690659c9bc1SBen Hutchings .allow_runtime_pm = true, 691659c9bc1SBen Hutchings .probe_slot = byt_emmc_probe_slot, 692659c9bc1SBen Hutchings .quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC, 693659c9bc1SBen Hutchings .quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN | 694659c9bc1SBen Hutchings SDHCI_QUIRK2_CAPS_BIT63_FOR_HS400 | 695659c9bc1SBen Hutchings SDHCI_QUIRK2_STOP_WITH_TC, 696fee686b7SAdrian Hunter .ops = &sdhci_intel_byt_ops, 697c959a6b0SAdrian Hunter .priv_size = sizeof(struct intel_host), 698659c9bc1SBen Hutchings }; 699659c9bc1SBen Hutchings 700bc55dcd8SAdrian Hunter static const struct sdhci_pci_fixes sdhci_intel_glk_emmc = { 701bc55dcd8SAdrian Hunter .allow_runtime_pm = true, 702bc55dcd8SAdrian Hunter .probe_slot = glk_emmc_probe_slot, 703bc55dcd8SAdrian Hunter .quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC, 704bc55dcd8SAdrian Hunter .quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN | 705bc55dcd8SAdrian Hunter SDHCI_QUIRK2_CAPS_BIT63_FOR_HS400 | 706bc55dcd8SAdrian Hunter SDHCI_QUIRK2_STOP_WITH_TC, 707bc55dcd8SAdrian Hunter .ops = &sdhci_intel_byt_ops, 708bc55dcd8SAdrian Hunter .priv_size = sizeof(struct intel_host), 709bc55dcd8SAdrian Hunter }; 710bc55dcd8SAdrian Hunter 71142b06496SZach Brown static const struct sdhci_pci_fixes sdhci_ni_byt_sdio = { 71242b06496SZach Brown .quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC, 71342b06496SZach Brown .quirks2 = SDHCI_QUIRK2_HOST_OFF_CARD_ON | 71442b06496SZach Brown SDHCI_QUIRK2_PRESET_VALUE_BROKEN, 71542b06496SZach Brown .allow_runtime_pm = true, 71642b06496SZach Brown .probe_slot = ni_byt_sdio_probe_slot, 71742b06496SZach Brown .ops = &sdhci_intel_byt_ops, 718c959a6b0SAdrian Hunter .priv_size = sizeof(struct intel_host), 71942b06496SZach Brown }; 72042b06496SZach Brown 721659c9bc1SBen Hutchings static const struct sdhci_pci_fixes sdhci_intel_byt_sdio = { 722659c9bc1SBen Hutchings .quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC, 723659c9bc1SBen Hutchings .quirks2 = SDHCI_QUIRK2_HOST_OFF_CARD_ON | 724659c9bc1SBen Hutchings SDHCI_QUIRK2_PRESET_VALUE_BROKEN, 725659c9bc1SBen Hutchings .allow_runtime_pm = true, 726659c9bc1SBen Hutchings .probe_slot = byt_sdio_probe_slot, 727fee686b7SAdrian Hunter .ops = &sdhci_intel_byt_ops, 728c959a6b0SAdrian Hunter .priv_size = sizeof(struct intel_host), 729659c9bc1SBen Hutchings }; 730659c9bc1SBen Hutchings 731659c9bc1SBen Hutchings static const struct sdhci_pci_fixes sdhci_intel_byt_sd = { 732659c9bc1SBen Hutchings .quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC, 733659c9bc1SBen Hutchings .quirks2 = SDHCI_QUIRK2_CARD_ON_NEEDS_BUS_ON | 734659c9bc1SBen Hutchings SDHCI_QUIRK2_PRESET_VALUE_BROKEN | 735659c9bc1SBen Hutchings SDHCI_QUIRK2_STOP_WITH_TC, 736659c9bc1SBen Hutchings .allow_runtime_pm = true, 737659c9bc1SBen Hutchings .own_cd_for_runtime_pm = true, 738659c9bc1SBen Hutchings .probe_slot = byt_sd_probe_slot, 739fee686b7SAdrian Hunter .ops = &sdhci_intel_byt_ops, 740c959a6b0SAdrian Hunter .priv_size = sizeof(struct intel_host), 741659c9bc1SBen Hutchings }; 742659c9bc1SBen Hutchings 743659c9bc1SBen Hutchings /* Define Host controllers for Intel Merrifield platform */ 7441f64cec2SAndy Shevchenko #define INTEL_MRFLD_EMMC_0 0 7451f64cec2SAndy Shevchenko #define INTEL_MRFLD_EMMC_1 1 7464674b6c8SAndy Shevchenko #define INTEL_MRFLD_SD 2 747d5565577SAndy Shevchenko #define INTEL_MRFLD_SDIO 3 748659c9bc1SBen Hutchings 7490e39220eSAndy Shevchenko #ifdef CONFIG_ACPI 7500e39220eSAndy Shevchenko static void intel_mrfld_mmc_fix_up_power_slot(struct sdhci_pci_slot *slot) 7510e39220eSAndy Shevchenko { 7520e39220eSAndy Shevchenko struct acpi_device *device, *child; 7530e39220eSAndy Shevchenko 7540e39220eSAndy Shevchenko device = ACPI_COMPANION(&slot->chip->pdev->dev); 7550e39220eSAndy Shevchenko if (!device) 7560e39220eSAndy Shevchenko return; 7570e39220eSAndy Shevchenko 7580e39220eSAndy Shevchenko acpi_device_fix_up_power(device); 7590e39220eSAndy Shevchenko list_for_each_entry(child, &device->children, node) 7600e39220eSAndy Shevchenko if (child->status.present && child->status.enabled) 7610e39220eSAndy Shevchenko acpi_device_fix_up_power(child); 7620e39220eSAndy Shevchenko } 7630e39220eSAndy Shevchenko #else 7640e39220eSAndy Shevchenko static inline void intel_mrfld_mmc_fix_up_power_slot(struct sdhci_pci_slot *slot) {} 7650e39220eSAndy Shevchenko #endif 7660e39220eSAndy Shevchenko 7671f64cec2SAndy Shevchenko static int intel_mrfld_mmc_probe_slot(struct sdhci_pci_slot *slot) 768659c9bc1SBen Hutchings { 7692e57bbe2SAndy Shevchenko unsigned int func = PCI_FUNC(slot->chip->pdev->devfn); 7702e57bbe2SAndy Shevchenko 7712e57bbe2SAndy Shevchenko switch (func) { 7722e57bbe2SAndy Shevchenko case INTEL_MRFLD_EMMC_0: 7732e57bbe2SAndy Shevchenko case INTEL_MRFLD_EMMC_1: 7742e57bbe2SAndy Shevchenko slot->host->mmc->caps |= MMC_CAP_NONREMOVABLE | 7752e57bbe2SAndy Shevchenko MMC_CAP_8_BIT_DATA | 7762e57bbe2SAndy Shevchenko MMC_CAP_1_8V_DDR; 7772e57bbe2SAndy Shevchenko break; 7784674b6c8SAndy Shevchenko case INTEL_MRFLD_SD: 7794674b6c8SAndy Shevchenko slot->host->quirks2 |= SDHCI_QUIRK2_NO_1_8_V; 7804674b6c8SAndy Shevchenko break; 781d5565577SAndy Shevchenko case INTEL_MRFLD_SDIO: 782d5565577SAndy Shevchenko slot->host->mmc->caps |= MMC_CAP_NONREMOVABLE | 783d5565577SAndy Shevchenko MMC_CAP_POWER_OFF_CARD; 784d5565577SAndy Shevchenko break; 7852e57bbe2SAndy Shevchenko default: 786659c9bc1SBen Hutchings return -ENODEV; 7872e57bbe2SAndy Shevchenko } 7880e39220eSAndy Shevchenko 7890e39220eSAndy Shevchenko intel_mrfld_mmc_fix_up_power_slot(slot); 790659c9bc1SBen Hutchings return 0; 791659c9bc1SBen Hutchings } 792659c9bc1SBen Hutchings 7931f64cec2SAndy Shevchenko static const struct sdhci_pci_fixes sdhci_intel_mrfld_mmc = { 794659c9bc1SBen Hutchings .quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC, 795659c9bc1SBen Hutchings .quirks2 = SDHCI_QUIRK2_BROKEN_HS200 | 796659c9bc1SBen Hutchings SDHCI_QUIRK2_PRESET_VALUE_BROKEN, 797659c9bc1SBen Hutchings .allow_runtime_pm = true, 7981f64cec2SAndy Shevchenko .probe_slot = intel_mrfld_mmc_probe_slot, 799659c9bc1SBen Hutchings }; 800659c9bc1SBen Hutchings 801659c9bc1SBen Hutchings /* O2Micro extra registers */ 802659c9bc1SBen Hutchings #define O2_SD_LOCK_WP 0xD3 803659c9bc1SBen Hutchings #define O2_SD_MULTI_VCC3V 0xEE 804659c9bc1SBen Hutchings #define O2_SD_CLKREQ 0xEC 805659c9bc1SBen Hutchings #define O2_SD_CAPS 0xE0 806659c9bc1SBen Hutchings #define O2_SD_ADMA1 0xE2 807659c9bc1SBen Hutchings #define O2_SD_ADMA2 0xE7 808659c9bc1SBen Hutchings #define O2_SD_INF_MOD 0xF1 809659c9bc1SBen Hutchings 810659c9bc1SBen Hutchings static int jmicron_pmos(struct sdhci_pci_chip *chip, int on) 811659c9bc1SBen Hutchings { 812659c9bc1SBen Hutchings u8 scratch; 813659c9bc1SBen Hutchings int ret; 814659c9bc1SBen Hutchings 815659c9bc1SBen Hutchings ret = pci_read_config_byte(chip->pdev, 0xAE, &scratch); 816659c9bc1SBen Hutchings if (ret) 817659c9bc1SBen Hutchings return ret; 818659c9bc1SBen Hutchings 819659c9bc1SBen Hutchings /* 820659c9bc1SBen Hutchings * Turn PMOS on [bit 0], set over current detection to 2.4 V 821659c9bc1SBen Hutchings * [bit 1:2] and enable over current debouncing [bit 6]. 822659c9bc1SBen Hutchings */ 823659c9bc1SBen Hutchings if (on) 824659c9bc1SBen Hutchings scratch |= 0x47; 825659c9bc1SBen Hutchings else 826659c9bc1SBen Hutchings scratch &= ~0x47; 827659c9bc1SBen Hutchings 8287582041fSkbuild test robot return pci_write_config_byte(chip->pdev, 0xAE, scratch); 829659c9bc1SBen Hutchings } 830659c9bc1SBen Hutchings 831659c9bc1SBen Hutchings static int jmicron_probe(struct sdhci_pci_chip *chip) 832659c9bc1SBen Hutchings { 833659c9bc1SBen Hutchings int ret; 834659c9bc1SBen Hutchings u16 mmcdev = 0; 835659c9bc1SBen Hutchings 836659c9bc1SBen Hutchings if (chip->pdev->revision == 0) { 837659c9bc1SBen Hutchings chip->quirks |= SDHCI_QUIRK_32BIT_DMA_ADDR | 838659c9bc1SBen Hutchings SDHCI_QUIRK_32BIT_DMA_SIZE | 839659c9bc1SBen Hutchings SDHCI_QUIRK_32BIT_ADMA_SIZE | 840659c9bc1SBen Hutchings SDHCI_QUIRK_RESET_AFTER_REQUEST | 841659c9bc1SBen Hutchings SDHCI_QUIRK_BROKEN_SMALL_PIO; 842659c9bc1SBen Hutchings } 843659c9bc1SBen Hutchings 844659c9bc1SBen Hutchings /* 845659c9bc1SBen Hutchings * JMicron chips can have two interfaces to the same hardware 846659c9bc1SBen Hutchings * in order to work around limitations in Microsoft's driver. 847659c9bc1SBen Hutchings * We need to make sure we only bind to one of them. 848659c9bc1SBen Hutchings * 849659c9bc1SBen Hutchings * This code assumes two things: 850659c9bc1SBen Hutchings * 851659c9bc1SBen Hutchings * 1. The PCI code adds subfunctions in order. 852659c9bc1SBen Hutchings * 853659c9bc1SBen Hutchings * 2. The MMC interface has a lower subfunction number 854659c9bc1SBen Hutchings * than the SD interface. 855659c9bc1SBen Hutchings */ 856659c9bc1SBen Hutchings if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_SD) 857659c9bc1SBen Hutchings mmcdev = PCI_DEVICE_ID_JMICRON_JMB38X_MMC; 858659c9bc1SBen Hutchings else if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_SD) 859659c9bc1SBen Hutchings mmcdev = PCI_DEVICE_ID_JMICRON_JMB388_ESD; 860659c9bc1SBen Hutchings 861659c9bc1SBen Hutchings if (mmcdev) { 862659c9bc1SBen Hutchings struct pci_dev *sd_dev; 863659c9bc1SBen Hutchings 864659c9bc1SBen Hutchings sd_dev = NULL; 865659c9bc1SBen Hutchings while ((sd_dev = pci_get_device(PCI_VENDOR_ID_JMICRON, 866659c9bc1SBen Hutchings mmcdev, sd_dev)) != NULL) { 867659c9bc1SBen Hutchings if ((PCI_SLOT(chip->pdev->devfn) == 868659c9bc1SBen Hutchings PCI_SLOT(sd_dev->devfn)) && 869659c9bc1SBen Hutchings (chip->pdev->bus == sd_dev->bus)) 870659c9bc1SBen Hutchings break; 871659c9bc1SBen Hutchings } 872659c9bc1SBen Hutchings 873659c9bc1SBen Hutchings if (sd_dev) { 874659c9bc1SBen Hutchings pci_dev_put(sd_dev); 875659c9bc1SBen Hutchings dev_info(&chip->pdev->dev, "Refusing to bind to " 876659c9bc1SBen Hutchings "secondary interface.\n"); 877659c9bc1SBen Hutchings return -ENODEV; 878659c9bc1SBen Hutchings } 879659c9bc1SBen Hutchings } 880659c9bc1SBen Hutchings 881659c9bc1SBen Hutchings /* 882659c9bc1SBen Hutchings * JMicron chips need a bit of a nudge to enable the power 883659c9bc1SBen Hutchings * output pins. 884659c9bc1SBen Hutchings */ 885659c9bc1SBen Hutchings ret = jmicron_pmos(chip, 1); 886659c9bc1SBen Hutchings if (ret) { 887659c9bc1SBen Hutchings dev_err(&chip->pdev->dev, "Failure enabling card power\n"); 888659c9bc1SBen Hutchings return ret; 889659c9bc1SBen Hutchings } 890659c9bc1SBen Hutchings 891659c9bc1SBen Hutchings /* quirk for unsable RO-detection on JM388 chips */ 892659c9bc1SBen Hutchings if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_SD || 893659c9bc1SBen Hutchings chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD) 894659c9bc1SBen Hutchings chip->quirks |= SDHCI_QUIRK_UNSTABLE_RO_DETECT; 895659c9bc1SBen Hutchings 896659c9bc1SBen Hutchings return 0; 897659c9bc1SBen Hutchings } 898659c9bc1SBen Hutchings 899659c9bc1SBen Hutchings static void jmicron_enable_mmc(struct sdhci_host *host, int on) 900659c9bc1SBen Hutchings { 901659c9bc1SBen Hutchings u8 scratch; 902659c9bc1SBen Hutchings 903659c9bc1SBen Hutchings scratch = readb(host->ioaddr + 0xC0); 904659c9bc1SBen Hutchings 905659c9bc1SBen Hutchings if (on) 906659c9bc1SBen Hutchings scratch |= 0x01; 907659c9bc1SBen Hutchings else 908659c9bc1SBen Hutchings scratch &= ~0x01; 909659c9bc1SBen Hutchings 910659c9bc1SBen Hutchings writeb(scratch, host->ioaddr + 0xC0); 911659c9bc1SBen Hutchings } 912659c9bc1SBen Hutchings 913659c9bc1SBen Hutchings static int jmicron_probe_slot(struct sdhci_pci_slot *slot) 914659c9bc1SBen Hutchings { 915659c9bc1SBen Hutchings if (slot->chip->pdev->revision == 0) { 916659c9bc1SBen Hutchings u16 version; 917659c9bc1SBen Hutchings 918659c9bc1SBen Hutchings version = readl(slot->host->ioaddr + SDHCI_HOST_VERSION); 919659c9bc1SBen Hutchings version = (version & SDHCI_VENDOR_VER_MASK) >> 920659c9bc1SBen Hutchings SDHCI_VENDOR_VER_SHIFT; 921659c9bc1SBen Hutchings 922659c9bc1SBen Hutchings /* 923659c9bc1SBen Hutchings * Older versions of the chip have lots of nasty glitches 924659c9bc1SBen Hutchings * in the ADMA engine. It's best just to avoid it 925659c9bc1SBen Hutchings * completely. 926659c9bc1SBen Hutchings */ 927659c9bc1SBen Hutchings if (version < 0xAC) 928659c9bc1SBen Hutchings slot->host->quirks |= SDHCI_QUIRK_BROKEN_ADMA; 929659c9bc1SBen Hutchings } 930659c9bc1SBen Hutchings 931659c9bc1SBen Hutchings /* JM388 MMC doesn't support 1.8V while SD supports it */ 932659c9bc1SBen Hutchings if (slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD) { 933659c9bc1SBen Hutchings slot->host->ocr_avail_sd = MMC_VDD_32_33 | MMC_VDD_33_34 | 934659c9bc1SBen Hutchings MMC_VDD_29_30 | MMC_VDD_30_31 | 935659c9bc1SBen Hutchings MMC_VDD_165_195; /* allow 1.8V */ 936659c9bc1SBen Hutchings slot->host->ocr_avail_mmc = MMC_VDD_32_33 | MMC_VDD_33_34 | 937659c9bc1SBen Hutchings MMC_VDD_29_30 | MMC_VDD_30_31; /* no 1.8V for MMC */ 938659c9bc1SBen Hutchings } 939659c9bc1SBen Hutchings 940659c9bc1SBen Hutchings /* 941659c9bc1SBen Hutchings * The secondary interface requires a bit set to get the 942659c9bc1SBen Hutchings * interrupts. 943659c9bc1SBen Hutchings */ 944659c9bc1SBen Hutchings if (slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC || 945659c9bc1SBen Hutchings slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD) 946659c9bc1SBen Hutchings jmicron_enable_mmc(slot->host, 1); 947659c9bc1SBen Hutchings 948659c9bc1SBen Hutchings slot->host->mmc->caps |= MMC_CAP_BUS_WIDTH_TEST; 949659c9bc1SBen Hutchings 950659c9bc1SBen Hutchings return 0; 951659c9bc1SBen Hutchings } 952659c9bc1SBen Hutchings 953659c9bc1SBen Hutchings static void jmicron_remove_slot(struct sdhci_pci_slot *slot, int dead) 954659c9bc1SBen Hutchings { 955659c9bc1SBen Hutchings if (dead) 956659c9bc1SBen Hutchings return; 957659c9bc1SBen Hutchings 958659c9bc1SBen Hutchings if (slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC || 959659c9bc1SBen Hutchings slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD) 960659c9bc1SBen Hutchings jmicron_enable_mmc(slot->host, 0); 961659c9bc1SBen Hutchings } 962659c9bc1SBen Hutchings 963b7813f0fSAdrian Hunter #ifdef CONFIG_PM_SLEEP 964659c9bc1SBen Hutchings static int jmicron_suspend(struct sdhci_pci_chip *chip) 965659c9bc1SBen Hutchings { 96630cf2803SAdrian Hunter int i, ret; 96730cf2803SAdrian Hunter 96830cf2803SAdrian Hunter ret = __sdhci_pci_suspend_host(chip); 96930cf2803SAdrian Hunter if (ret) 97030cf2803SAdrian Hunter return ret; 971659c9bc1SBen Hutchings 972659c9bc1SBen Hutchings if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC || 973659c9bc1SBen Hutchings chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD) { 974659c9bc1SBen Hutchings for (i = 0; i < chip->num_slots; i++) 975659c9bc1SBen Hutchings jmicron_enable_mmc(chip->slots[i]->host, 0); 976659c9bc1SBen Hutchings } 977659c9bc1SBen Hutchings 97830cf2803SAdrian Hunter sdhci_pci_init_wakeup(chip); 97930cf2803SAdrian Hunter 980659c9bc1SBen Hutchings return 0; 981659c9bc1SBen Hutchings } 982659c9bc1SBen Hutchings 983659c9bc1SBen Hutchings static int jmicron_resume(struct sdhci_pci_chip *chip) 984659c9bc1SBen Hutchings { 985659c9bc1SBen Hutchings int ret, i; 986659c9bc1SBen Hutchings 987659c9bc1SBen Hutchings if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC || 988659c9bc1SBen Hutchings chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD) { 989659c9bc1SBen Hutchings for (i = 0; i < chip->num_slots; i++) 990659c9bc1SBen Hutchings jmicron_enable_mmc(chip->slots[i]->host, 1); 991659c9bc1SBen Hutchings } 992659c9bc1SBen Hutchings 993659c9bc1SBen Hutchings ret = jmicron_pmos(chip, 1); 994659c9bc1SBen Hutchings if (ret) { 995659c9bc1SBen Hutchings dev_err(&chip->pdev->dev, "Failure enabling card power\n"); 996659c9bc1SBen Hutchings return ret; 997659c9bc1SBen Hutchings } 998659c9bc1SBen Hutchings 99930cf2803SAdrian Hunter return sdhci_pci_resume_host(chip); 1000659c9bc1SBen Hutchings } 1001b7813f0fSAdrian Hunter #endif 1002659c9bc1SBen Hutchings 1003659c9bc1SBen Hutchings static const struct sdhci_pci_fixes sdhci_o2 = { 1004659c9bc1SBen Hutchings .probe = sdhci_pci_o2_probe, 1005659c9bc1SBen Hutchings .quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC, 1006659c9bc1SBen Hutchings .quirks2 = SDHCI_QUIRK2_CLEAR_TRANSFERMODE_REG_BEFORE_CMD, 1007659c9bc1SBen Hutchings .probe_slot = sdhci_pci_o2_probe_slot, 1008b7813f0fSAdrian Hunter #ifdef CONFIG_PM_SLEEP 1009659c9bc1SBen Hutchings .resume = sdhci_pci_o2_resume, 1010b7813f0fSAdrian Hunter #endif 1011659c9bc1SBen Hutchings }; 1012659c9bc1SBen Hutchings 1013659c9bc1SBen Hutchings static const struct sdhci_pci_fixes sdhci_jmicron = { 1014659c9bc1SBen Hutchings .probe = jmicron_probe, 1015659c9bc1SBen Hutchings 1016659c9bc1SBen Hutchings .probe_slot = jmicron_probe_slot, 1017659c9bc1SBen Hutchings .remove_slot = jmicron_remove_slot, 1018659c9bc1SBen Hutchings 1019b7813f0fSAdrian Hunter #ifdef CONFIG_PM_SLEEP 1020659c9bc1SBen Hutchings .suspend = jmicron_suspend, 1021659c9bc1SBen Hutchings .resume = jmicron_resume, 1022b7813f0fSAdrian Hunter #endif 1023659c9bc1SBen Hutchings }; 1024659c9bc1SBen Hutchings 1025659c9bc1SBen Hutchings /* SysKonnect CardBus2SDIO extra registers */ 1026659c9bc1SBen Hutchings #define SYSKT_CTRL 0x200 1027659c9bc1SBen Hutchings #define SYSKT_RDFIFO_STAT 0x204 1028659c9bc1SBen Hutchings #define SYSKT_WRFIFO_STAT 0x208 1029659c9bc1SBen Hutchings #define SYSKT_POWER_DATA 0x20c 1030659c9bc1SBen Hutchings #define SYSKT_POWER_330 0xef 1031659c9bc1SBen Hutchings #define SYSKT_POWER_300 0xf8 1032659c9bc1SBen Hutchings #define SYSKT_POWER_184 0xcc 1033659c9bc1SBen Hutchings #define SYSKT_POWER_CMD 0x20d 1034659c9bc1SBen Hutchings #define SYSKT_POWER_START (1 << 7) 1035659c9bc1SBen Hutchings #define SYSKT_POWER_STATUS 0x20e 1036659c9bc1SBen Hutchings #define SYSKT_POWER_STATUS_OK (1 << 0) 1037659c9bc1SBen Hutchings #define SYSKT_BOARD_REV 0x210 1038659c9bc1SBen Hutchings #define SYSKT_CHIP_REV 0x211 1039659c9bc1SBen Hutchings #define SYSKT_CONF_DATA 0x212 1040659c9bc1SBen Hutchings #define SYSKT_CONF_DATA_1V8 (1 << 2) 1041659c9bc1SBen Hutchings #define SYSKT_CONF_DATA_2V5 (1 << 1) 1042659c9bc1SBen Hutchings #define SYSKT_CONF_DATA_3V3 (1 << 0) 1043659c9bc1SBen Hutchings 1044659c9bc1SBen Hutchings static int syskt_probe(struct sdhci_pci_chip *chip) 1045659c9bc1SBen Hutchings { 1046659c9bc1SBen Hutchings if ((chip->pdev->class & 0x0000FF) == PCI_SDHCI_IFVENDOR) { 1047659c9bc1SBen Hutchings chip->pdev->class &= ~0x0000FF; 1048659c9bc1SBen Hutchings chip->pdev->class |= PCI_SDHCI_IFDMA; 1049659c9bc1SBen Hutchings } 1050659c9bc1SBen Hutchings return 0; 1051659c9bc1SBen Hutchings } 1052659c9bc1SBen Hutchings 1053659c9bc1SBen Hutchings static int syskt_probe_slot(struct sdhci_pci_slot *slot) 1054659c9bc1SBen Hutchings { 1055659c9bc1SBen Hutchings int tm, ps; 1056659c9bc1SBen Hutchings 1057659c9bc1SBen Hutchings u8 board_rev = readb(slot->host->ioaddr + SYSKT_BOARD_REV); 1058659c9bc1SBen Hutchings u8 chip_rev = readb(slot->host->ioaddr + SYSKT_CHIP_REV); 1059659c9bc1SBen Hutchings dev_info(&slot->chip->pdev->dev, "SysKonnect CardBus2SDIO, " 1060659c9bc1SBen Hutchings "board rev %d.%d, chip rev %d.%d\n", 1061659c9bc1SBen Hutchings board_rev >> 4, board_rev & 0xf, 1062659c9bc1SBen Hutchings chip_rev >> 4, chip_rev & 0xf); 1063659c9bc1SBen Hutchings if (chip_rev >= 0x20) 1064659c9bc1SBen Hutchings slot->host->quirks |= SDHCI_QUIRK_FORCE_DMA; 1065659c9bc1SBen Hutchings 1066659c9bc1SBen Hutchings writeb(SYSKT_POWER_330, slot->host->ioaddr + SYSKT_POWER_DATA); 1067659c9bc1SBen Hutchings writeb(SYSKT_POWER_START, slot->host->ioaddr + SYSKT_POWER_CMD); 1068659c9bc1SBen Hutchings udelay(50); 1069659c9bc1SBen Hutchings tm = 10; /* Wait max 1 ms */ 1070659c9bc1SBen Hutchings do { 1071659c9bc1SBen Hutchings ps = readw(slot->host->ioaddr + SYSKT_POWER_STATUS); 1072659c9bc1SBen Hutchings if (ps & SYSKT_POWER_STATUS_OK) 1073659c9bc1SBen Hutchings break; 1074659c9bc1SBen Hutchings udelay(100); 1075659c9bc1SBen Hutchings } while (--tm); 1076659c9bc1SBen Hutchings if (!tm) { 1077659c9bc1SBen Hutchings dev_err(&slot->chip->pdev->dev, 1078659c9bc1SBen Hutchings "power regulator never stabilized"); 1079659c9bc1SBen Hutchings writeb(0, slot->host->ioaddr + SYSKT_POWER_CMD); 1080659c9bc1SBen Hutchings return -ENODEV; 1081659c9bc1SBen Hutchings } 1082659c9bc1SBen Hutchings 1083659c9bc1SBen Hutchings return 0; 1084659c9bc1SBen Hutchings } 1085659c9bc1SBen Hutchings 1086659c9bc1SBen Hutchings static const struct sdhci_pci_fixes sdhci_syskt = { 1087659c9bc1SBen Hutchings .quirks = SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER, 1088659c9bc1SBen Hutchings .probe = syskt_probe, 1089659c9bc1SBen Hutchings .probe_slot = syskt_probe_slot, 1090659c9bc1SBen Hutchings }; 1091659c9bc1SBen Hutchings 1092659c9bc1SBen Hutchings static int via_probe(struct sdhci_pci_chip *chip) 1093659c9bc1SBen Hutchings { 1094659c9bc1SBen Hutchings if (chip->pdev->revision == 0x10) 1095659c9bc1SBen Hutchings chip->quirks |= SDHCI_QUIRK_DELAY_AFTER_POWER; 1096659c9bc1SBen Hutchings 1097659c9bc1SBen Hutchings return 0; 1098659c9bc1SBen Hutchings } 1099659c9bc1SBen Hutchings 1100659c9bc1SBen Hutchings static const struct sdhci_pci_fixes sdhci_via = { 1101659c9bc1SBen Hutchings .probe = via_probe, 1102659c9bc1SBen Hutchings }; 1103659c9bc1SBen Hutchings 1104659c9bc1SBen Hutchings static int rtsx_probe_slot(struct sdhci_pci_slot *slot) 1105659c9bc1SBen Hutchings { 1106659c9bc1SBen Hutchings slot->host->mmc->caps2 |= MMC_CAP2_HS200; 1107659c9bc1SBen Hutchings return 0; 1108659c9bc1SBen Hutchings } 1109659c9bc1SBen Hutchings 1110659c9bc1SBen Hutchings static const struct sdhci_pci_fixes sdhci_rtsx = { 1111659c9bc1SBen Hutchings .quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN | 1112659c9bc1SBen Hutchings SDHCI_QUIRK2_BROKEN_64_BIT_DMA | 1113659c9bc1SBen Hutchings SDHCI_QUIRK2_BROKEN_DDR50, 1114659c9bc1SBen Hutchings .probe_slot = rtsx_probe_slot, 1115659c9bc1SBen Hutchings }; 1116659c9bc1SBen Hutchings 1117659c9bc1SBen Hutchings /*AMD chipset generation*/ 1118659c9bc1SBen Hutchings enum amd_chipset_gen { 1119659c9bc1SBen Hutchings AMD_CHIPSET_BEFORE_ML, 1120659c9bc1SBen Hutchings AMD_CHIPSET_CZ, 1121659c9bc1SBen Hutchings AMD_CHIPSET_NL, 1122659c9bc1SBen Hutchings AMD_CHIPSET_UNKNOWN, 1123659c9bc1SBen Hutchings }; 1124659c9bc1SBen Hutchings 1125c31165d7SShyam Sundar S K /* AMD registers */ 1126c31165d7SShyam Sundar S K #define AMD_SD_AUTO_PATTERN 0xB8 1127c31165d7SShyam Sundar S K #define AMD_MSLEEP_DURATION 4 1128c31165d7SShyam Sundar S K #define AMD_SD_MISC_CONTROL 0xD0 1129c31165d7SShyam Sundar S K #define AMD_MAX_TUNE_VALUE 0x0B 1130c31165d7SShyam Sundar S K #define AMD_AUTO_TUNE_SEL 0x10800 1131c31165d7SShyam Sundar S K #define AMD_FIFO_PTR 0x30 1132c31165d7SShyam Sundar S K #define AMD_BIT_MASK 0x1F 1133c31165d7SShyam Sundar S K 1134c31165d7SShyam Sundar S K static void amd_tuning_reset(struct sdhci_host *host) 1135c31165d7SShyam Sundar S K { 1136c31165d7SShyam Sundar S K unsigned int val; 1137c31165d7SShyam Sundar S K 1138c31165d7SShyam Sundar S K val = sdhci_readw(host, SDHCI_HOST_CONTROL2); 1139c31165d7SShyam Sundar S K val |= SDHCI_CTRL_PRESET_VAL_ENABLE | SDHCI_CTRL_EXEC_TUNING; 1140c31165d7SShyam Sundar S K sdhci_writew(host, val, SDHCI_HOST_CONTROL2); 1141c31165d7SShyam Sundar S K 1142c31165d7SShyam Sundar S K val = sdhci_readw(host, SDHCI_HOST_CONTROL2); 1143c31165d7SShyam Sundar S K val &= ~SDHCI_CTRL_EXEC_TUNING; 1144c31165d7SShyam Sundar S K sdhci_writew(host, val, SDHCI_HOST_CONTROL2); 1145c31165d7SShyam Sundar S K } 1146c31165d7SShyam Sundar S K 1147c31165d7SShyam Sundar S K static void amd_config_tuning_phase(struct pci_dev *pdev, u8 phase) 1148c31165d7SShyam Sundar S K { 1149c31165d7SShyam Sundar S K unsigned int val; 1150c31165d7SShyam Sundar S K 1151c31165d7SShyam Sundar S K pci_read_config_dword(pdev, AMD_SD_AUTO_PATTERN, &val); 1152c31165d7SShyam Sundar S K val &= ~AMD_BIT_MASK; 1153c31165d7SShyam Sundar S K val |= (AMD_AUTO_TUNE_SEL | (phase << 1)); 1154c31165d7SShyam Sundar S K pci_write_config_dword(pdev, AMD_SD_AUTO_PATTERN, val); 1155c31165d7SShyam Sundar S K } 1156c31165d7SShyam Sundar S K 1157c31165d7SShyam Sundar S K static void amd_enable_manual_tuning(struct pci_dev *pdev) 1158c31165d7SShyam Sundar S K { 1159c31165d7SShyam Sundar S K unsigned int val; 1160c31165d7SShyam Sundar S K 1161c31165d7SShyam Sundar S K pci_read_config_dword(pdev, AMD_SD_MISC_CONTROL, &val); 1162c31165d7SShyam Sundar S K val |= AMD_FIFO_PTR; 1163c31165d7SShyam Sundar S K pci_write_config_dword(pdev, AMD_SD_MISC_CONTROL, val); 1164c31165d7SShyam Sundar S K } 1165c31165d7SShyam Sundar S K 1166c31165d7SShyam Sundar S K static int amd_execute_tuning(struct sdhci_host *host, u32 opcode) 1167c31165d7SShyam Sundar S K { 1168c31165d7SShyam Sundar S K struct sdhci_pci_slot *slot = sdhci_priv(host); 1169c31165d7SShyam Sundar S K struct pci_dev *pdev = slot->chip->pdev; 1170c31165d7SShyam Sundar S K u8 valid_win = 0; 1171c31165d7SShyam Sundar S K u8 valid_win_max = 0; 1172c31165d7SShyam Sundar S K u8 valid_win_end = 0; 1173c31165d7SShyam Sundar S K u8 ctrl, tune_around; 1174c31165d7SShyam Sundar S K 1175c31165d7SShyam Sundar S K amd_tuning_reset(host); 1176c31165d7SShyam Sundar S K 1177c31165d7SShyam Sundar S K for (tune_around = 0; tune_around < 12; tune_around++) { 1178c31165d7SShyam Sundar S K amd_config_tuning_phase(pdev, tune_around); 1179c31165d7SShyam Sundar S K 1180c31165d7SShyam Sundar S K if (mmc_send_tuning(host->mmc, opcode, NULL)) { 1181c31165d7SShyam Sundar S K valid_win = 0; 1182c31165d7SShyam Sundar S K msleep(AMD_MSLEEP_DURATION); 1183c31165d7SShyam Sundar S K ctrl = SDHCI_RESET_CMD | SDHCI_RESET_DATA; 1184c31165d7SShyam Sundar S K sdhci_writeb(host, ctrl, SDHCI_SOFTWARE_RESET); 1185c31165d7SShyam Sundar S K } else if (++valid_win > valid_win_max) { 1186c31165d7SShyam Sundar S K valid_win_max = valid_win; 1187c31165d7SShyam Sundar S K valid_win_end = tune_around; 1188c31165d7SShyam Sundar S K } 1189c31165d7SShyam Sundar S K } 1190c31165d7SShyam Sundar S K 1191c31165d7SShyam Sundar S K if (!valid_win_max) { 1192c31165d7SShyam Sundar S K dev_err(&pdev->dev, "no tuning point found\n"); 1193c31165d7SShyam Sundar S K return -EIO; 1194c31165d7SShyam Sundar S K } 1195c31165d7SShyam Sundar S K 1196c31165d7SShyam Sundar S K amd_config_tuning_phase(pdev, valid_win_end - valid_win_max / 2); 1197c31165d7SShyam Sundar S K 1198c31165d7SShyam Sundar S K amd_enable_manual_tuning(pdev); 1199c31165d7SShyam Sundar S K 1200c31165d7SShyam Sundar S K host->mmc->retune_period = 0; 1201c31165d7SShyam Sundar S K 1202c31165d7SShyam Sundar S K return 0; 1203c31165d7SShyam Sundar S K } 1204c31165d7SShyam Sundar S K 1205659c9bc1SBen Hutchings static int amd_probe(struct sdhci_pci_chip *chip) 1206659c9bc1SBen Hutchings { 1207659c9bc1SBen Hutchings struct pci_dev *smbus_dev; 1208659c9bc1SBen Hutchings enum amd_chipset_gen gen; 1209659c9bc1SBen Hutchings 1210659c9bc1SBen Hutchings smbus_dev = pci_get_device(PCI_VENDOR_ID_AMD, 1211659c9bc1SBen Hutchings PCI_DEVICE_ID_AMD_HUDSON2_SMBUS, NULL); 1212659c9bc1SBen Hutchings if (smbus_dev) { 1213659c9bc1SBen Hutchings gen = AMD_CHIPSET_BEFORE_ML; 1214659c9bc1SBen Hutchings } else { 1215659c9bc1SBen Hutchings smbus_dev = pci_get_device(PCI_VENDOR_ID_AMD, 1216659c9bc1SBen Hutchings PCI_DEVICE_ID_AMD_KERNCZ_SMBUS, NULL); 1217659c9bc1SBen Hutchings if (smbus_dev) { 1218659c9bc1SBen Hutchings if (smbus_dev->revision < 0x51) 1219659c9bc1SBen Hutchings gen = AMD_CHIPSET_CZ; 1220659c9bc1SBen Hutchings else 1221659c9bc1SBen Hutchings gen = AMD_CHIPSET_NL; 1222659c9bc1SBen Hutchings } else { 1223659c9bc1SBen Hutchings gen = AMD_CHIPSET_UNKNOWN; 1224659c9bc1SBen Hutchings } 1225659c9bc1SBen Hutchings } 1226659c9bc1SBen Hutchings 1227c31165d7SShyam Sundar S K if (gen == AMD_CHIPSET_BEFORE_ML || gen == AMD_CHIPSET_CZ) 1228659c9bc1SBen Hutchings chip->quirks2 |= SDHCI_QUIRK2_CLEAR_TRANSFERMODE_REG_BEFORE_CMD; 1229659c9bc1SBen Hutchings 1230659c9bc1SBen Hutchings return 0; 1231659c9bc1SBen Hutchings } 1232659c9bc1SBen Hutchings 1233c31165d7SShyam Sundar S K static const struct sdhci_ops amd_sdhci_pci_ops = { 1234c31165d7SShyam Sundar S K .set_clock = sdhci_set_clock, 1235c31165d7SShyam Sundar S K .enable_dma = sdhci_pci_enable_dma, 1236adc16398SMichał Mirosław .set_bus_width = sdhci_set_bus_width, 1237c31165d7SShyam Sundar S K .reset = sdhci_reset, 1238c31165d7SShyam Sundar S K .set_uhs_signaling = sdhci_set_uhs_signaling, 1239c31165d7SShyam Sundar S K .platform_execute_tuning = amd_execute_tuning, 1240c31165d7SShyam Sundar S K }; 1241c31165d7SShyam Sundar S K 1242659c9bc1SBen Hutchings static const struct sdhci_pci_fixes sdhci_amd = { 1243659c9bc1SBen Hutchings .probe = amd_probe, 1244c31165d7SShyam Sundar S K .ops = &amd_sdhci_pci_ops, 1245659c9bc1SBen Hutchings }; 1246659c9bc1SBen Hutchings 1247659c9bc1SBen Hutchings static const struct pci_device_id pci_ids[] = { 1248c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(RICOH, R5C822, ricoh), 1249c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(RICOH, R5C843, ricoh_mmc), 1250c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(RICOH, R5CE822, ricoh_mmc), 1251c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(RICOH, R5CE823, ricoh_mmc), 1252c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(ENE, CB712_SD, ene_712), 1253c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(ENE, CB712_SD_2, ene_712), 1254c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(ENE, CB714_SD, ene_714), 1255c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(ENE, CB714_SD_2, ene_714), 1256c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(MARVELL, 88ALP01_SD, cafe), 1257c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(JMICRON, JMB38X_SD, jmicron), 1258c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(JMICRON, JMB38X_MMC, jmicron), 1259c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(JMICRON, JMB388_SD, jmicron), 1260c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(JMICRON, JMB388_ESD, jmicron), 1261c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(SYSKONNECT, 8000, syskt), 1262c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(VIA, 95D0, via), 1263c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(REALTEK, 5250, rtsx), 1264c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, QRK_SD, intel_qrk), 1265c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, MRST_SD0, intel_mrst_hc0), 1266c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, MRST_SD1, intel_mrst_hc1_hc2), 1267c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, MRST_SD2, intel_mrst_hc1_hc2), 1268c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, MFD_SD, intel_mfd_sd), 1269c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, MFD_SDIO1, intel_mfd_sdio), 1270c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, MFD_SDIO2, intel_mfd_sdio), 1271c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, MFD_EMMC0, intel_mfd_emmc), 1272c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, MFD_EMMC1, intel_mfd_emmc), 1273c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, PCH_SDIO0, intel_pch_sdio), 1274c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, PCH_SDIO1, intel_pch_sdio), 1275c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, BYT_EMMC, intel_byt_emmc), 1276c949c907SMatthias Kraemer SDHCI_PCI_SUBDEVICE(INTEL, BYT_SDIO, NI, 7884, ni_byt_sdio), 1277c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, BYT_SDIO, intel_byt_sdio), 1278c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, BYT_SD, intel_byt_sd), 1279c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, BYT_EMMC2, intel_byt_emmc), 1280c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, BSW_EMMC, intel_byt_emmc), 1281c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, BSW_SDIO, intel_byt_sdio), 1282c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, BSW_SD, intel_byt_sd), 1283c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, CLV_SDIO0, intel_mfd_sd), 1284c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, CLV_SDIO1, intel_mfd_sdio), 1285c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, CLV_SDIO2, intel_mfd_sdio), 1286c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, CLV_EMMC0, intel_mfd_emmc), 1287c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, CLV_EMMC1, intel_mfd_emmc), 1288c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, MRFLD_MMC, intel_mrfld_mmc), 1289c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, SPT_EMMC, intel_byt_emmc), 1290c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, SPT_SDIO, intel_byt_sdio), 1291c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, SPT_SD, intel_byt_sd), 1292c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, DNV_EMMC, intel_byt_emmc), 1293c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, BXT_EMMC, intel_byt_emmc), 1294c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, BXT_SDIO, intel_byt_sdio), 1295c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, BXT_SD, intel_byt_sd), 1296c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, BXTM_EMMC, intel_byt_emmc), 1297c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, BXTM_SDIO, intel_byt_sdio), 1298c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, BXTM_SD, intel_byt_sd), 1299c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, APL_EMMC, intel_byt_emmc), 1300c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, APL_SDIO, intel_byt_sdio), 1301c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, APL_SD, intel_byt_sd), 1302bc55dcd8SAdrian Hunter SDHCI_PCI_DEVICE(INTEL, GLK_EMMC, intel_glk_emmc), 1303c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, GLK_SDIO, intel_byt_sdio), 1304c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, GLK_SD, intel_byt_sd), 1305bc55dcd8SAdrian Hunter SDHCI_PCI_DEVICE(INTEL, CNP_EMMC, intel_glk_emmc), 1306bc55dcd8SAdrian Hunter SDHCI_PCI_DEVICE(INTEL, CNP_SD, intel_byt_sd), 1307bc55dcd8SAdrian Hunter SDHCI_PCI_DEVICE(INTEL, CNPH_SD, intel_byt_sd), 1308c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(O2, 8120, o2), 1309c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(O2, 8220, o2), 1310c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(O2, 8221, o2), 1311c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(O2, 8320, o2), 1312c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(O2, 8321, o2), 1313c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(O2, FUJIN2, o2), 1314c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(O2, SDS0, o2), 1315c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(O2, SDS1, o2), 1316c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(O2, SEABIRD0, o2), 1317c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(O2, SEABIRD1, o2), 1318c949c907SMatthias Kraemer SDHCI_PCI_DEVICE_CLASS(AMD, SYSTEM_SDHCI, PCI_CLASS_MASK, amd), 1319c949c907SMatthias Kraemer /* Generic SD host controller */ 1320c949c907SMatthias Kraemer {PCI_DEVICE_CLASS(SYSTEM_SDHCI, PCI_CLASS_MASK)}, 1321659c9bc1SBen Hutchings { /* end: all zeroes */ }, 1322659c9bc1SBen Hutchings }; 1323659c9bc1SBen Hutchings 1324659c9bc1SBen Hutchings MODULE_DEVICE_TABLE(pci, pci_ids); 1325659c9bc1SBen Hutchings 1326659c9bc1SBen Hutchings /*****************************************************************************\ 1327659c9bc1SBen Hutchings * * 1328659c9bc1SBen Hutchings * SDHCI core callbacks * 1329659c9bc1SBen Hutchings * * 1330659c9bc1SBen Hutchings \*****************************************************************************/ 1331659c9bc1SBen Hutchings 1332659c9bc1SBen Hutchings static int sdhci_pci_enable_dma(struct sdhci_host *host) 1333659c9bc1SBen Hutchings { 1334659c9bc1SBen Hutchings struct sdhci_pci_slot *slot; 1335659c9bc1SBen Hutchings struct pci_dev *pdev; 1336659c9bc1SBen Hutchings 1337659c9bc1SBen Hutchings slot = sdhci_priv(host); 1338659c9bc1SBen Hutchings pdev = slot->chip->pdev; 1339659c9bc1SBen Hutchings 1340659c9bc1SBen Hutchings if (((pdev->class & 0xFFFF00) == (PCI_CLASS_SYSTEM_SDHCI << 8)) && 1341659c9bc1SBen Hutchings ((pdev->class & 0x0000FF) != PCI_SDHCI_IFDMA) && 1342659c9bc1SBen Hutchings (host->flags & SDHCI_USE_SDMA)) { 1343659c9bc1SBen Hutchings dev_warn(&pdev->dev, "Will use DMA mode even though HW " 1344659c9bc1SBen Hutchings "doesn't fully claim to support it.\n"); 1345659c9bc1SBen Hutchings } 1346659c9bc1SBen Hutchings 1347659c9bc1SBen Hutchings pci_set_master(pdev); 1348659c9bc1SBen Hutchings 1349659c9bc1SBen Hutchings return 0; 1350659c9bc1SBen Hutchings } 1351659c9bc1SBen Hutchings 1352659c9bc1SBen Hutchings static void sdhci_pci_gpio_hw_reset(struct sdhci_host *host) 1353659c9bc1SBen Hutchings { 1354659c9bc1SBen Hutchings struct sdhci_pci_slot *slot = sdhci_priv(host); 1355659c9bc1SBen Hutchings int rst_n_gpio = slot->rst_n_gpio; 1356659c9bc1SBen Hutchings 1357659c9bc1SBen Hutchings if (!gpio_is_valid(rst_n_gpio)) 1358659c9bc1SBen Hutchings return; 1359659c9bc1SBen Hutchings gpio_set_value_cansleep(rst_n_gpio, 0); 1360659c9bc1SBen Hutchings /* For eMMC, minimum is 1us but give it 10us for good measure */ 1361659c9bc1SBen Hutchings udelay(10); 1362659c9bc1SBen Hutchings gpio_set_value_cansleep(rst_n_gpio, 1); 1363659c9bc1SBen Hutchings /* For eMMC, minimum is 200us but give it 300us for good measure */ 1364659c9bc1SBen Hutchings usleep_range(300, 1000); 1365659c9bc1SBen Hutchings } 1366659c9bc1SBen Hutchings 1367659c9bc1SBen Hutchings static void sdhci_pci_hw_reset(struct sdhci_host *host) 1368659c9bc1SBen Hutchings { 1369659c9bc1SBen Hutchings struct sdhci_pci_slot *slot = sdhci_priv(host); 1370659c9bc1SBen Hutchings 1371659c9bc1SBen Hutchings if (slot->hw_reset) 1372659c9bc1SBen Hutchings slot->hw_reset(host); 1373659c9bc1SBen Hutchings } 1374659c9bc1SBen Hutchings 1375659c9bc1SBen Hutchings static const struct sdhci_ops sdhci_pci_ops = { 1376659c9bc1SBen Hutchings .set_clock = sdhci_set_clock, 1377659c9bc1SBen Hutchings .enable_dma = sdhci_pci_enable_dma, 1378adc16398SMichał Mirosław .set_bus_width = sdhci_set_bus_width, 1379659c9bc1SBen Hutchings .reset = sdhci_reset, 1380659c9bc1SBen Hutchings .set_uhs_signaling = sdhci_set_uhs_signaling, 1381659c9bc1SBen Hutchings .hw_reset = sdhci_pci_hw_reset, 1382659c9bc1SBen Hutchings }; 1383659c9bc1SBen Hutchings 1384659c9bc1SBen Hutchings /*****************************************************************************\ 1385659c9bc1SBen Hutchings * * 1386659c9bc1SBen Hutchings * Suspend/resume * 1387659c9bc1SBen Hutchings * * 1388659c9bc1SBen Hutchings \*****************************************************************************/ 1389659c9bc1SBen Hutchings 1390f9900f15SUlf Hansson #ifdef CONFIG_PM_SLEEP 1391659c9bc1SBen Hutchings static int sdhci_pci_suspend(struct device *dev) 1392659c9bc1SBen Hutchings { 1393659c9bc1SBen Hutchings struct pci_dev *pdev = to_pci_dev(dev); 139430cf2803SAdrian Hunter struct sdhci_pci_chip *chip = pci_get_drvdata(pdev); 1395659c9bc1SBen Hutchings 1396659c9bc1SBen Hutchings if (!chip) 1397659c9bc1SBen Hutchings return 0; 1398659c9bc1SBen Hutchings 139930cf2803SAdrian Hunter if (chip->fixes && chip->fixes->suspend) 140030cf2803SAdrian Hunter return chip->fixes->suspend(chip); 1401659c9bc1SBen Hutchings 140230cf2803SAdrian Hunter return sdhci_pci_suspend_host(chip); 1403659c9bc1SBen Hutchings } 1404659c9bc1SBen Hutchings 1405659c9bc1SBen Hutchings static int sdhci_pci_resume(struct device *dev) 1406659c9bc1SBen Hutchings { 1407659c9bc1SBen Hutchings struct pci_dev *pdev = to_pci_dev(dev); 140830cf2803SAdrian Hunter struct sdhci_pci_chip *chip = pci_get_drvdata(pdev); 1409659c9bc1SBen Hutchings 1410659c9bc1SBen Hutchings if (!chip) 1411659c9bc1SBen Hutchings return 0; 1412659c9bc1SBen Hutchings 141330cf2803SAdrian Hunter if (chip->fixes && chip->fixes->resume) 141430cf2803SAdrian Hunter return chip->fixes->resume(chip); 1415659c9bc1SBen Hutchings 141630cf2803SAdrian Hunter return sdhci_pci_resume_host(chip); 1417659c9bc1SBen Hutchings } 1418f9900f15SUlf Hansson #endif 1419659c9bc1SBen Hutchings 1420f9900f15SUlf Hansson #ifdef CONFIG_PM 1421659c9bc1SBen Hutchings static int sdhci_pci_runtime_suspend(struct device *dev) 1422659c9bc1SBen Hutchings { 1423923a231cSGeliang Tang struct pci_dev *pdev = to_pci_dev(dev); 1424966d696aSAdrian Hunter struct sdhci_pci_chip *chip = pci_get_drvdata(pdev); 1425659c9bc1SBen Hutchings 1426659c9bc1SBen Hutchings if (!chip) 1427659c9bc1SBen Hutchings return 0; 1428659c9bc1SBen Hutchings 1429966d696aSAdrian Hunter if (chip->fixes && chip->fixes->runtime_suspend) 1430966d696aSAdrian Hunter return chip->fixes->runtime_suspend(chip); 1431659c9bc1SBen Hutchings 1432966d696aSAdrian Hunter return sdhci_pci_runtime_suspend_host(chip); 1433659c9bc1SBen Hutchings } 1434659c9bc1SBen Hutchings 1435659c9bc1SBen Hutchings static int sdhci_pci_runtime_resume(struct device *dev) 1436659c9bc1SBen Hutchings { 1437923a231cSGeliang Tang struct pci_dev *pdev = to_pci_dev(dev); 1438966d696aSAdrian Hunter struct sdhci_pci_chip *chip = pci_get_drvdata(pdev); 1439659c9bc1SBen Hutchings 1440659c9bc1SBen Hutchings if (!chip) 1441659c9bc1SBen Hutchings return 0; 1442659c9bc1SBen Hutchings 1443966d696aSAdrian Hunter if (chip->fixes && chip->fixes->runtime_resume) 1444966d696aSAdrian Hunter return chip->fixes->runtime_resume(chip); 1445659c9bc1SBen Hutchings 1446966d696aSAdrian Hunter return sdhci_pci_runtime_resume_host(chip); 1447659c9bc1SBen Hutchings } 1448f9900f15SUlf Hansson #endif 1449659c9bc1SBen Hutchings 1450659c9bc1SBen Hutchings static const struct dev_pm_ops sdhci_pci_pm_ops = { 1451f9900f15SUlf Hansson SET_SYSTEM_SLEEP_PM_OPS(sdhci_pci_suspend, sdhci_pci_resume) 1452659c9bc1SBen Hutchings SET_RUNTIME_PM_OPS(sdhci_pci_runtime_suspend, 1453659c9bc1SBen Hutchings sdhci_pci_runtime_resume, NULL) 1454659c9bc1SBen Hutchings }; 1455659c9bc1SBen Hutchings 1456659c9bc1SBen Hutchings /*****************************************************************************\ 1457659c9bc1SBen Hutchings * * 1458659c9bc1SBen Hutchings * Device probing/removal * 1459659c9bc1SBen Hutchings * * 1460659c9bc1SBen Hutchings \*****************************************************************************/ 1461659c9bc1SBen Hutchings 1462659c9bc1SBen Hutchings static struct sdhci_pci_slot *sdhci_pci_probe_slot( 1463659c9bc1SBen Hutchings struct pci_dev *pdev, struct sdhci_pci_chip *chip, int first_bar, 1464659c9bc1SBen Hutchings int slotno) 1465659c9bc1SBen Hutchings { 1466659c9bc1SBen Hutchings struct sdhci_pci_slot *slot; 1467659c9bc1SBen Hutchings struct sdhci_host *host; 1468659c9bc1SBen Hutchings int ret, bar = first_bar + slotno; 1469ac9f67b5SAdrian Hunter size_t priv_size = chip->fixes ? chip->fixes->priv_size : 0; 1470659c9bc1SBen Hutchings 1471659c9bc1SBen Hutchings if (!(pci_resource_flags(pdev, bar) & IORESOURCE_MEM)) { 1472659c9bc1SBen Hutchings dev_err(&pdev->dev, "BAR %d is not iomem. Aborting.\n", bar); 1473659c9bc1SBen Hutchings return ERR_PTR(-ENODEV); 1474659c9bc1SBen Hutchings } 1475659c9bc1SBen Hutchings 1476659c9bc1SBen Hutchings if (pci_resource_len(pdev, bar) < 0x100) { 1477659c9bc1SBen Hutchings dev_err(&pdev->dev, "Invalid iomem size. You may " 1478659c9bc1SBen Hutchings "experience problems.\n"); 1479659c9bc1SBen Hutchings } 1480659c9bc1SBen Hutchings 1481659c9bc1SBen Hutchings if ((pdev->class & 0x0000FF) == PCI_SDHCI_IFVENDOR) { 1482659c9bc1SBen Hutchings dev_err(&pdev->dev, "Vendor specific interface. Aborting.\n"); 1483659c9bc1SBen Hutchings return ERR_PTR(-ENODEV); 1484659c9bc1SBen Hutchings } 1485659c9bc1SBen Hutchings 1486659c9bc1SBen Hutchings if ((pdev->class & 0x0000FF) > PCI_SDHCI_IFVENDOR) { 1487659c9bc1SBen Hutchings dev_err(&pdev->dev, "Unknown interface. Aborting.\n"); 1488659c9bc1SBen Hutchings return ERR_PTR(-ENODEV); 1489659c9bc1SBen Hutchings } 1490659c9bc1SBen Hutchings 1491ac9f67b5SAdrian Hunter host = sdhci_alloc_host(&pdev->dev, sizeof(*slot) + priv_size); 1492659c9bc1SBen Hutchings if (IS_ERR(host)) { 1493659c9bc1SBen Hutchings dev_err(&pdev->dev, "cannot allocate host\n"); 1494659c9bc1SBen Hutchings return ERR_CAST(host); 1495659c9bc1SBen Hutchings } 1496659c9bc1SBen Hutchings 1497659c9bc1SBen Hutchings slot = sdhci_priv(host); 1498659c9bc1SBen Hutchings 1499659c9bc1SBen Hutchings slot->chip = chip; 1500659c9bc1SBen Hutchings slot->host = host; 1501659c9bc1SBen Hutchings slot->rst_n_gpio = -EINVAL; 1502659c9bc1SBen Hutchings slot->cd_gpio = -EINVAL; 1503659c9bc1SBen Hutchings slot->cd_idx = -1; 1504659c9bc1SBen Hutchings 1505659c9bc1SBen Hutchings /* Retrieve platform data if there is any */ 1506659c9bc1SBen Hutchings if (*sdhci_pci_get_data) 1507659c9bc1SBen Hutchings slot->data = sdhci_pci_get_data(pdev, slotno); 1508659c9bc1SBen Hutchings 1509659c9bc1SBen Hutchings if (slot->data) { 1510659c9bc1SBen Hutchings if (slot->data->setup) { 1511659c9bc1SBen Hutchings ret = slot->data->setup(slot->data); 1512659c9bc1SBen Hutchings if (ret) { 1513659c9bc1SBen Hutchings dev_err(&pdev->dev, "platform setup failed\n"); 1514659c9bc1SBen Hutchings goto free; 1515659c9bc1SBen Hutchings } 1516659c9bc1SBen Hutchings } 1517659c9bc1SBen Hutchings slot->rst_n_gpio = slot->data->rst_n_gpio; 1518659c9bc1SBen Hutchings slot->cd_gpio = slot->data->cd_gpio; 1519659c9bc1SBen Hutchings } 1520659c9bc1SBen Hutchings 1521659c9bc1SBen Hutchings host->hw_name = "PCI"; 15226bc09063SAdrian Hunter host->ops = chip->fixes && chip->fixes->ops ? 15236bc09063SAdrian Hunter chip->fixes->ops : 15246bc09063SAdrian Hunter &sdhci_pci_ops; 1525659c9bc1SBen Hutchings host->quirks = chip->quirks; 1526659c9bc1SBen Hutchings host->quirks2 = chip->quirks2; 1527659c9bc1SBen Hutchings 1528659c9bc1SBen Hutchings host->irq = pdev->irq; 1529659c9bc1SBen Hutchings 1530c10bc372SAndy Shevchenko ret = pcim_iomap_regions(pdev, BIT(bar), mmc_hostname(host->mmc)); 1531659c9bc1SBen Hutchings if (ret) { 1532659c9bc1SBen Hutchings dev_err(&pdev->dev, "cannot request region\n"); 1533659c9bc1SBen Hutchings goto cleanup; 1534659c9bc1SBen Hutchings } 1535659c9bc1SBen Hutchings 1536c10bc372SAndy Shevchenko host->ioaddr = pcim_iomap_table(pdev)[bar]; 1537659c9bc1SBen Hutchings 1538659c9bc1SBen Hutchings if (chip->fixes && chip->fixes->probe_slot) { 1539659c9bc1SBen Hutchings ret = chip->fixes->probe_slot(slot); 1540659c9bc1SBen Hutchings if (ret) 1541c10bc372SAndy Shevchenko goto cleanup; 1542659c9bc1SBen Hutchings } 1543659c9bc1SBen Hutchings 1544659c9bc1SBen Hutchings if (gpio_is_valid(slot->rst_n_gpio)) { 1545c10bc372SAndy Shevchenko if (!devm_gpio_request(&pdev->dev, slot->rst_n_gpio, "eMMC_reset")) { 1546659c9bc1SBen Hutchings gpio_direction_output(slot->rst_n_gpio, 1); 1547659c9bc1SBen Hutchings slot->host->mmc->caps |= MMC_CAP_HW_RESET; 1548659c9bc1SBen Hutchings slot->hw_reset = sdhci_pci_gpio_hw_reset; 1549659c9bc1SBen Hutchings } else { 1550659c9bc1SBen Hutchings dev_warn(&pdev->dev, "failed to request rst_n_gpio\n"); 1551659c9bc1SBen Hutchings slot->rst_n_gpio = -EINVAL; 1552659c9bc1SBen Hutchings } 1553659c9bc1SBen Hutchings } 1554659c9bc1SBen Hutchings 1555659c9bc1SBen Hutchings host->mmc->pm_caps = MMC_PM_KEEP_POWER | MMC_PM_WAKE_SDIO_IRQ; 1556659c9bc1SBen Hutchings host->mmc->slotno = slotno; 1557659c9bc1SBen Hutchings host->mmc->caps2 |= MMC_CAP2_NO_PRESCAN_POWERUP; 1558659c9bc1SBen Hutchings 15598f743d03SDavid E. Box if (slot->cd_idx >= 0) { 15606ac9b837SAndy Shevchenko ret = mmc_gpiod_request_cd(host->mmc, NULL, slot->cd_idx, 15618f743d03SDavid E. Box slot->cd_override_level, 0, NULL); 15628f743d03SDavid E. Box if (ret == -EPROBE_DEFER) 15638f743d03SDavid E. Box goto remove; 15648f743d03SDavid E. Box 15658f743d03SDavid E. Box if (ret) { 1566659c9bc1SBen Hutchings dev_warn(&pdev->dev, "failed to setup card detect gpio\n"); 1567659c9bc1SBen Hutchings slot->cd_idx = -1; 1568659c9bc1SBen Hutchings } 15698f743d03SDavid E. Box } 1570659c9bc1SBen Hutchings 157161c951deSAdrian Hunter if (chip->fixes && chip->fixes->add_host) 157261c951deSAdrian Hunter ret = chip->fixes->add_host(slot); 157361c951deSAdrian Hunter else 1574659c9bc1SBen Hutchings ret = sdhci_add_host(host); 1575659c9bc1SBen Hutchings if (ret) 1576659c9bc1SBen Hutchings goto remove; 1577659c9bc1SBen Hutchings 1578659c9bc1SBen Hutchings sdhci_pci_add_own_cd(slot); 1579659c9bc1SBen Hutchings 1580659c9bc1SBen Hutchings /* 1581659c9bc1SBen Hutchings * Check if the chip needs a separate GPIO for card detect to wake up 1582659c9bc1SBen Hutchings * from runtime suspend. If it is not there, don't allow runtime PM. 1583659c9bc1SBen Hutchings * Note sdhci_pci_add_own_cd() sets slot->cd_gpio to -EINVAL on failure. 1584659c9bc1SBen Hutchings */ 1585659c9bc1SBen Hutchings if (chip->fixes && chip->fixes->own_cd_for_runtime_pm && 1586659c9bc1SBen Hutchings !gpio_is_valid(slot->cd_gpio) && slot->cd_idx < 0) 1587659c9bc1SBen Hutchings chip->allow_runtime_pm = false; 1588659c9bc1SBen Hutchings 1589659c9bc1SBen Hutchings return slot; 1590659c9bc1SBen Hutchings 1591659c9bc1SBen Hutchings remove: 1592659c9bc1SBen Hutchings if (chip->fixes && chip->fixes->remove_slot) 1593659c9bc1SBen Hutchings chip->fixes->remove_slot(slot, 0); 1594659c9bc1SBen Hutchings 1595659c9bc1SBen Hutchings cleanup: 1596659c9bc1SBen Hutchings if (slot->data && slot->data->cleanup) 1597659c9bc1SBen Hutchings slot->data->cleanup(slot->data); 1598659c9bc1SBen Hutchings 1599659c9bc1SBen Hutchings free: 1600659c9bc1SBen Hutchings sdhci_free_host(host); 1601659c9bc1SBen Hutchings 1602659c9bc1SBen Hutchings return ERR_PTR(ret); 1603659c9bc1SBen Hutchings } 1604659c9bc1SBen Hutchings 1605659c9bc1SBen Hutchings static void sdhci_pci_remove_slot(struct sdhci_pci_slot *slot) 1606659c9bc1SBen Hutchings { 1607659c9bc1SBen Hutchings int dead; 1608659c9bc1SBen Hutchings u32 scratch; 1609659c9bc1SBen Hutchings 1610659c9bc1SBen Hutchings sdhci_pci_remove_own_cd(slot); 1611659c9bc1SBen Hutchings 1612659c9bc1SBen Hutchings dead = 0; 1613659c9bc1SBen Hutchings scratch = readl(slot->host->ioaddr + SDHCI_INT_STATUS); 1614659c9bc1SBen Hutchings if (scratch == (u32)-1) 1615659c9bc1SBen Hutchings dead = 1; 1616659c9bc1SBen Hutchings 1617659c9bc1SBen Hutchings sdhci_remove_host(slot->host, dead); 1618659c9bc1SBen Hutchings 1619659c9bc1SBen Hutchings if (slot->chip->fixes && slot->chip->fixes->remove_slot) 1620659c9bc1SBen Hutchings slot->chip->fixes->remove_slot(slot, dead); 1621659c9bc1SBen Hutchings 1622659c9bc1SBen Hutchings if (slot->data && slot->data->cleanup) 1623659c9bc1SBen Hutchings slot->data->cleanup(slot->data); 1624659c9bc1SBen Hutchings 1625659c9bc1SBen Hutchings sdhci_free_host(slot->host); 1626659c9bc1SBen Hutchings } 1627659c9bc1SBen Hutchings 1628659c9bc1SBen Hutchings static void sdhci_pci_runtime_pm_allow(struct device *dev) 1629659c9bc1SBen Hutchings { 163000884b61SAdrian Hunter pm_suspend_ignore_children(dev, 1); 1631659c9bc1SBen Hutchings pm_runtime_set_autosuspend_delay(dev, 50); 1632659c9bc1SBen Hutchings pm_runtime_use_autosuspend(dev); 163300884b61SAdrian Hunter pm_runtime_allow(dev); 163400884b61SAdrian Hunter /* Stay active until mmc core scans for a card */ 163500884b61SAdrian Hunter pm_runtime_put_noidle(dev); 1636659c9bc1SBen Hutchings } 1637659c9bc1SBen Hutchings 1638659c9bc1SBen Hutchings static void sdhci_pci_runtime_pm_forbid(struct device *dev) 1639659c9bc1SBen Hutchings { 1640659c9bc1SBen Hutchings pm_runtime_forbid(dev); 1641659c9bc1SBen Hutchings pm_runtime_get_noresume(dev); 1642659c9bc1SBen Hutchings } 1643659c9bc1SBen Hutchings 1644659c9bc1SBen Hutchings static int sdhci_pci_probe(struct pci_dev *pdev, 1645659c9bc1SBen Hutchings const struct pci_device_id *ent) 1646659c9bc1SBen Hutchings { 1647659c9bc1SBen Hutchings struct sdhci_pci_chip *chip; 1648659c9bc1SBen Hutchings struct sdhci_pci_slot *slot; 1649659c9bc1SBen Hutchings 1650659c9bc1SBen Hutchings u8 slots, first_bar; 1651659c9bc1SBen Hutchings int ret, i; 1652659c9bc1SBen Hutchings 1653659c9bc1SBen Hutchings BUG_ON(pdev == NULL); 1654659c9bc1SBen Hutchings BUG_ON(ent == NULL); 1655659c9bc1SBen Hutchings 1656659c9bc1SBen Hutchings dev_info(&pdev->dev, "SDHCI controller found [%04x:%04x] (rev %x)\n", 1657659c9bc1SBen Hutchings (int)pdev->vendor, (int)pdev->device, (int)pdev->revision); 1658659c9bc1SBen Hutchings 1659659c9bc1SBen Hutchings ret = pci_read_config_byte(pdev, PCI_SLOT_INFO, &slots); 1660659c9bc1SBen Hutchings if (ret) 1661659c9bc1SBen Hutchings return ret; 1662659c9bc1SBen Hutchings 1663659c9bc1SBen Hutchings slots = PCI_SLOT_INFO_SLOTS(slots) + 1; 1664659c9bc1SBen Hutchings dev_dbg(&pdev->dev, "found %d slot(s)\n", slots); 1665659c9bc1SBen Hutchings if (slots == 0) 1666659c9bc1SBen Hutchings return -ENODEV; 1667659c9bc1SBen Hutchings 1668659c9bc1SBen Hutchings BUG_ON(slots > MAX_SLOTS); 1669659c9bc1SBen Hutchings 1670659c9bc1SBen Hutchings ret = pci_read_config_byte(pdev, PCI_SLOT_INFO, &first_bar); 1671659c9bc1SBen Hutchings if (ret) 1672659c9bc1SBen Hutchings return ret; 1673659c9bc1SBen Hutchings 1674659c9bc1SBen Hutchings first_bar &= PCI_SLOT_INFO_FIRST_BAR_MASK; 1675659c9bc1SBen Hutchings 1676659c9bc1SBen Hutchings if (first_bar > 5) { 1677659c9bc1SBen Hutchings dev_err(&pdev->dev, "Invalid first BAR. Aborting.\n"); 1678659c9bc1SBen Hutchings return -ENODEV; 1679659c9bc1SBen Hutchings } 1680659c9bc1SBen Hutchings 168152ac7acfSAndy Shevchenko ret = pcim_enable_device(pdev); 1682659c9bc1SBen Hutchings if (ret) 1683659c9bc1SBen Hutchings return ret; 1684659c9bc1SBen Hutchings 168552ac7acfSAndy Shevchenko chip = devm_kzalloc(&pdev->dev, sizeof(*chip), GFP_KERNEL); 168652ac7acfSAndy Shevchenko if (!chip) 168752ac7acfSAndy Shevchenko return -ENOMEM; 1688659c9bc1SBen Hutchings 1689659c9bc1SBen Hutchings chip->pdev = pdev; 1690659c9bc1SBen Hutchings chip->fixes = (const struct sdhci_pci_fixes *)ent->driver_data; 1691659c9bc1SBen Hutchings if (chip->fixes) { 1692659c9bc1SBen Hutchings chip->quirks = chip->fixes->quirks; 1693659c9bc1SBen Hutchings chip->quirks2 = chip->fixes->quirks2; 1694659c9bc1SBen Hutchings chip->allow_runtime_pm = chip->fixes->allow_runtime_pm; 1695659c9bc1SBen Hutchings } 1696659c9bc1SBen Hutchings chip->num_slots = slots; 1697d38dcad4SAdrian Hunter chip->pm_retune = true; 1698d38dcad4SAdrian Hunter chip->rpm_retune = true; 1699659c9bc1SBen Hutchings 1700659c9bc1SBen Hutchings pci_set_drvdata(pdev, chip); 1701659c9bc1SBen Hutchings 1702659c9bc1SBen Hutchings if (chip->fixes && chip->fixes->probe) { 1703659c9bc1SBen Hutchings ret = chip->fixes->probe(chip); 1704659c9bc1SBen Hutchings if (ret) 170552ac7acfSAndy Shevchenko return ret; 1706659c9bc1SBen Hutchings } 1707659c9bc1SBen Hutchings 1708659c9bc1SBen Hutchings slots = chip->num_slots; /* Quirk may have changed this */ 1709659c9bc1SBen Hutchings 1710659c9bc1SBen Hutchings for (i = 0; i < slots; i++) { 1711659c9bc1SBen Hutchings slot = sdhci_pci_probe_slot(pdev, chip, first_bar, i); 1712659c9bc1SBen Hutchings if (IS_ERR(slot)) { 1713659c9bc1SBen Hutchings for (i--; i >= 0; i--) 1714659c9bc1SBen Hutchings sdhci_pci_remove_slot(chip->slots[i]); 171552ac7acfSAndy Shevchenko return PTR_ERR(slot); 1716659c9bc1SBen Hutchings } 1717659c9bc1SBen Hutchings 1718659c9bc1SBen Hutchings chip->slots[i] = slot; 1719659c9bc1SBen Hutchings } 1720659c9bc1SBen Hutchings 1721659c9bc1SBen Hutchings if (chip->allow_runtime_pm) 1722659c9bc1SBen Hutchings sdhci_pci_runtime_pm_allow(&pdev->dev); 1723659c9bc1SBen Hutchings 1724659c9bc1SBen Hutchings return 0; 1725659c9bc1SBen Hutchings } 1726659c9bc1SBen Hutchings 1727659c9bc1SBen Hutchings static void sdhci_pci_remove(struct pci_dev *pdev) 1728659c9bc1SBen Hutchings { 1729659c9bc1SBen Hutchings int i; 173052ac7acfSAndy Shevchenko struct sdhci_pci_chip *chip = pci_get_drvdata(pdev); 1731659c9bc1SBen Hutchings 1732659c9bc1SBen Hutchings if (chip->allow_runtime_pm) 1733659c9bc1SBen Hutchings sdhci_pci_runtime_pm_forbid(&pdev->dev); 1734659c9bc1SBen Hutchings 1735659c9bc1SBen Hutchings for (i = 0; i < chip->num_slots; i++) 1736659c9bc1SBen Hutchings sdhci_pci_remove_slot(chip->slots[i]); 1737659c9bc1SBen Hutchings } 1738659c9bc1SBen Hutchings 1739659c9bc1SBen Hutchings static struct pci_driver sdhci_driver = { 1740659c9bc1SBen Hutchings .name = "sdhci-pci", 1741659c9bc1SBen Hutchings .id_table = pci_ids, 1742659c9bc1SBen Hutchings .probe = sdhci_pci_probe, 1743659c9bc1SBen Hutchings .remove = sdhci_pci_remove, 1744659c9bc1SBen Hutchings .driver = { 1745659c9bc1SBen Hutchings .pm = &sdhci_pci_pm_ops 1746659c9bc1SBen Hutchings }, 1747659c9bc1SBen Hutchings }; 1748659c9bc1SBen Hutchings 1749659c9bc1SBen Hutchings module_pci_driver(sdhci_driver); 1750659c9bc1SBen Hutchings 1751659c9bc1SBen Hutchings MODULE_AUTHOR("Pierre Ossman <pierre@ossman.eu>"); 1752659c9bc1SBen Hutchings MODULE_DESCRIPTION("Secure Digital Host Controller Interface PCI driver"); 1753659c9bc1SBen Hutchings MODULE_LICENSE("GPL"); 1754