1659c9bc1SBen Hutchings /* linux/drivers/mmc/host/sdhci-pci.c - SDHCI on PCI bus interface 2659c9bc1SBen Hutchings * 3659c9bc1SBen Hutchings * Copyright (C) 2005-2008 Pierre Ossman, All Rights Reserved. 4659c9bc1SBen Hutchings * 5659c9bc1SBen Hutchings * This program is free software; you can redistribute it and/or modify 6659c9bc1SBen Hutchings * it under the terms of the GNU General Public License as published by 7659c9bc1SBen Hutchings * the Free Software Foundation; either version 2 of the License, or (at 8659c9bc1SBen Hutchings * your option) any later version. 9659c9bc1SBen Hutchings * 10659c9bc1SBen Hutchings * Thanks to the following companies for their support: 11659c9bc1SBen Hutchings * 12659c9bc1SBen Hutchings * - JMicron (hardware and technical support) 13659c9bc1SBen Hutchings */ 14659c9bc1SBen Hutchings 15a72016a4SAdrian Hunter #include <linux/string.h> 16659c9bc1SBen Hutchings #include <linux/delay.h> 17659c9bc1SBen Hutchings #include <linux/highmem.h> 18659c9bc1SBen Hutchings #include <linux/module.h> 19659c9bc1SBen Hutchings #include <linux/pci.h> 20659c9bc1SBen Hutchings #include <linux/dma-mapping.h> 21659c9bc1SBen Hutchings #include <linux/slab.h> 22659c9bc1SBen Hutchings #include <linux/device.h> 23659c9bc1SBen Hutchings #include <linux/mmc/host.h> 24659c9bc1SBen Hutchings #include <linux/mmc/mmc.h> 25659c9bc1SBen Hutchings #include <linux/scatterlist.h> 26659c9bc1SBen Hutchings #include <linux/io.h> 27659c9bc1SBen Hutchings #include <linux/gpio.h> 28659c9bc1SBen Hutchings #include <linux/pm_runtime.h> 29659c9bc1SBen Hutchings #include <linux/mmc/slot-gpio.h> 30659c9bc1SBen Hutchings #include <linux/mmc/sdhci-pci-data.h> 313f23df72SZach Brown #include <linux/acpi.h> 32659c9bc1SBen Hutchings 33659c9bc1SBen Hutchings #include "sdhci.h" 34659c9bc1SBen Hutchings #include "sdhci-pci.h" 35659c9bc1SBen Hutchings #include "sdhci-pci-o2micro.h" 36659c9bc1SBen Hutchings 37fee686b7SAdrian Hunter static int sdhci_pci_enable_dma(struct sdhci_host *host); 38fee686b7SAdrian Hunter static void sdhci_pci_set_bus_width(struct sdhci_host *host, int width); 39fee686b7SAdrian Hunter static void sdhci_pci_hw_reset(struct sdhci_host *host); 40fee686b7SAdrian Hunter 4130cf2803SAdrian Hunter #ifdef CONFIG_PM_SLEEP 4230cf2803SAdrian Hunter static int __sdhci_pci_suspend_host(struct sdhci_pci_chip *chip) 4330cf2803SAdrian Hunter { 4430cf2803SAdrian Hunter int i, ret; 4530cf2803SAdrian Hunter 4630cf2803SAdrian Hunter for (i = 0; i < chip->num_slots; i++) { 4730cf2803SAdrian Hunter struct sdhci_pci_slot *slot = chip->slots[i]; 4830cf2803SAdrian Hunter struct sdhci_host *host; 4930cf2803SAdrian Hunter 5030cf2803SAdrian Hunter if (!slot) 5130cf2803SAdrian Hunter continue; 5230cf2803SAdrian Hunter 5330cf2803SAdrian Hunter host = slot->host; 5430cf2803SAdrian Hunter 5530cf2803SAdrian Hunter if (chip->pm_retune && host->tuning_mode != SDHCI_TUNING_MODE_3) 5630cf2803SAdrian Hunter mmc_retune_needed(host->mmc); 5730cf2803SAdrian Hunter 5830cf2803SAdrian Hunter ret = sdhci_suspend_host(host); 5930cf2803SAdrian Hunter if (ret) 6030cf2803SAdrian Hunter goto err_pci_suspend; 6130cf2803SAdrian Hunter 6230cf2803SAdrian Hunter if (host->mmc->pm_flags & MMC_PM_WAKE_SDIO_IRQ) 6330cf2803SAdrian Hunter sdhci_enable_irq_wakeups(host); 6430cf2803SAdrian Hunter } 6530cf2803SAdrian Hunter 6630cf2803SAdrian Hunter return 0; 6730cf2803SAdrian Hunter 6830cf2803SAdrian Hunter err_pci_suspend: 6930cf2803SAdrian Hunter while (--i >= 0) 7030cf2803SAdrian Hunter sdhci_resume_host(chip->slots[i]->host); 7130cf2803SAdrian Hunter return ret; 7230cf2803SAdrian Hunter } 7330cf2803SAdrian Hunter 7430cf2803SAdrian Hunter static int sdhci_pci_init_wakeup(struct sdhci_pci_chip *chip) 7530cf2803SAdrian Hunter { 7630cf2803SAdrian Hunter mmc_pm_flag_t pm_flags = 0; 7730cf2803SAdrian Hunter int i; 7830cf2803SAdrian Hunter 7930cf2803SAdrian Hunter for (i = 0; i < chip->num_slots; i++) { 8030cf2803SAdrian Hunter struct sdhci_pci_slot *slot = chip->slots[i]; 8130cf2803SAdrian Hunter 8230cf2803SAdrian Hunter if (slot) 8330cf2803SAdrian Hunter pm_flags |= slot->host->mmc->pm_flags; 8430cf2803SAdrian Hunter } 8530cf2803SAdrian Hunter 8630cf2803SAdrian Hunter return device_init_wakeup(&chip->pdev->dev, 8730cf2803SAdrian Hunter (pm_flags & MMC_PM_KEEP_POWER) && 8830cf2803SAdrian Hunter (pm_flags & MMC_PM_WAKE_SDIO_IRQ)); 8930cf2803SAdrian Hunter } 9030cf2803SAdrian Hunter 9130cf2803SAdrian Hunter static int sdhci_pci_suspend_host(struct sdhci_pci_chip *chip) 9230cf2803SAdrian Hunter { 9330cf2803SAdrian Hunter int ret; 9430cf2803SAdrian Hunter 9530cf2803SAdrian Hunter ret = __sdhci_pci_suspend_host(chip); 9630cf2803SAdrian Hunter if (ret) 9730cf2803SAdrian Hunter return ret; 9830cf2803SAdrian Hunter 9930cf2803SAdrian Hunter sdhci_pci_init_wakeup(chip); 10030cf2803SAdrian Hunter 10130cf2803SAdrian Hunter return 0; 10230cf2803SAdrian Hunter } 10330cf2803SAdrian Hunter 10430cf2803SAdrian Hunter int sdhci_pci_resume_host(struct sdhci_pci_chip *chip) 10530cf2803SAdrian Hunter { 10630cf2803SAdrian Hunter struct sdhci_pci_slot *slot; 10730cf2803SAdrian Hunter int i, ret; 10830cf2803SAdrian Hunter 10930cf2803SAdrian Hunter for (i = 0; i < chip->num_slots; i++) { 11030cf2803SAdrian Hunter slot = chip->slots[i]; 11130cf2803SAdrian Hunter if (!slot) 11230cf2803SAdrian Hunter continue; 11330cf2803SAdrian Hunter 11430cf2803SAdrian Hunter ret = sdhci_resume_host(slot->host); 11530cf2803SAdrian Hunter if (ret) 11630cf2803SAdrian Hunter return ret; 11730cf2803SAdrian Hunter } 11830cf2803SAdrian Hunter 11930cf2803SAdrian Hunter return 0; 12030cf2803SAdrian Hunter } 12130cf2803SAdrian Hunter #endif 12230cf2803SAdrian Hunter 123966d696aSAdrian Hunter #ifdef CONFIG_PM 124966d696aSAdrian Hunter static int sdhci_pci_runtime_suspend_host(struct sdhci_pci_chip *chip) 125966d696aSAdrian Hunter { 126966d696aSAdrian Hunter struct sdhci_pci_slot *slot; 127966d696aSAdrian Hunter struct sdhci_host *host; 128966d696aSAdrian Hunter int i, ret; 129966d696aSAdrian Hunter 130966d696aSAdrian Hunter for (i = 0; i < chip->num_slots; i++) { 131966d696aSAdrian Hunter slot = chip->slots[i]; 132966d696aSAdrian Hunter if (!slot) 133966d696aSAdrian Hunter continue; 134966d696aSAdrian Hunter 135966d696aSAdrian Hunter host = slot->host; 136966d696aSAdrian Hunter 137966d696aSAdrian Hunter ret = sdhci_runtime_suspend_host(host); 138966d696aSAdrian Hunter if (ret) 139966d696aSAdrian Hunter goto err_pci_runtime_suspend; 140966d696aSAdrian Hunter 141966d696aSAdrian Hunter if (chip->rpm_retune && 142966d696aSAdrian Hunter host->tuning_mode != SDHCI_TUNING_MODE_3) 143966d696aSAdrian Hunter mmc_retune_needed(host->mmc); 144966d696aSAdrian Hunter } 145966d696aSAdrian Hunter 146966d696aSAdrian Hunter return 0; 147966d696aSAdrian Hunter 148966d696aSAdrian Hunter err_pci_runtime_suspend: 149966d696aSAdrian Hunter while (--i >= 0) 150966d696aSAdrian Hunter sdhci_runtime_resume_host(chip->slots[i]->host); 151966d696aSAdrian Hunter return ret; 152966d696aSAdrian Hunter } 153966d696aSAdrian Hunter 154966d696aSAdrian Hunter static int sdhci_pci_runtime_resume_host(struct sdhci_pci_chip *chip) 155966d696aSAdrian Hunter { 156966d696aSAdrian Hunter struct sdhci_pci_slot *slot; 157966d696aSAdrian Hunter int i, ret; 158966d696aSAdrian Hunter 159966d696aSAdrian Hunter for (i = 0; i < chip->num_slots; i++) { 160966d696aSAdrian Hunter slot = chip->slots[i]; 161966d696aSAdrian Hunter if (!slot) 162966d696aSAdrian Hunter continue; 163966d696aSAdrian Hunter 164966d696aSAdrian Hunter ret = sdhci_runtime_resume_host(slot->host); 165966d696aSAdrian Hunter if (ret) 166966d696aSAdrian Hunter return ret; 167966d696aSAdrian Hunter } 168966d696aSAdrian Hunter 169966d696aSAdrian Hunter return 0; 170966d696aSAdrian Hunter } 171966d696aSAdrian Hunter #endif 172966d696aSAdrian Hunter 173659c9bc1SBen Hutchings /*****************************************************************************\ 174659c9bc1SBen Hutchings * * 175659c9bc1SBen Hutchings * Hardware specific quirk handling * 176659c9bc1SBen Hutchings * * 177659c9bc1SBen Hutchings \*****************************************************************************/ 178659c9bc1SBen Hutchings 179659c9bc1SBen Hutchings static int ricoh_probe(struct sdhci_pci_chip *chip) 180659c9bc1SBen Hutchings { 181659c9bc1SBen Hutchings if (chip->pdev->subsystem_vendor == PCI_VENDOR_ID_SAMSUNG || 182659c9bc1SBen Hutchings chip->pdev->subsystem_vendor == PCI_VENDOR_ID_SONY) 183659c9bc1SBen Hutchings chip->quirks |= SDHCI_QUIRK_NO_CARD_NO_RESET; 184659c9bc1SBen Hutchings return 0; 185659c9bc1SBen Hutchings } 186659c9bc1SBen Hutchings 187659c9bc1SBen Hutchings static int ricoh_mmc_probe_slot(struct sdhci_pci_slot *slot) 188659c9bc1SBen Hutchings { 189659c9bc1SBen Hutchings slot->host->caps = 190659c9bc1SBen Hutchings ((0x21 << SDHCI_TIMEOUT_CLK_SHIFT) 191659c9bc1SBen Hutchings & SDHCI_TIMEOUT_CLK_MASK) | 192659c9bc1SBen Hutchings 193659c9bc1SBen Hutchings ((0x21 << SDHCI_CLOCK_BASE_SHIFT) 194659c9bc1SBen Hutchings & SDHCI_CLOCK_BASE_MASK) | 195659c9bc1SBen Hutchings 196659c9bc1SBen Hutchings SDHCI_TIMEOUT_CLK_UNIT | 197659c9bc1SBen Hutchings SDHCI_CAN_VDD_330 | 198659c9bc1SBen Hutchings SDHCI_CAN_DO_HISPD | 199659c9bc1SBen Hutchings SDHCI_CAN_DO_SDMA; 200659c9bc1SBen Hutchings return 0; 201659c9bc1SBen Hutchings } 202659c9bc1SBen Hutchings 203b7813f0fSAdrian Hunter #ifdef CONFIG_PM_SLEEP 204659c9bc1SBen Hutchings static int ricoh_mmc_resume(struct sdhci_pci_chip *chip) 205659c9bc1SBen Hutchings { 206659c9bc1SBen Hutchings /* Apply a delay to allow controller to settle */ 207659c9bc1SBen Hutchings /* Otherwise it becomes confused if card state changed 208659c9bc1SBen Hutchings during suspend */ 209659c9bc1SBen Hutchings msleep(500); 21030cf2803SAdrian Hunter return sdhci_pci_resume_host(chip); 211659c9bc1SBen Hutchings } 212b7813f0fSAdrian Hunter #endif 213659c9bc1SBen Hutchings 214659c9bc1SBen Hutchings static const struct sdhci_pci_fixes sdhci_ricoh = { 215659c9bc1SBen Hutchings .probe = ricoh_probe, 216659c9bc1SBen Hutchings .quirks = SDHCI_QUIRK_32BIT_DMA_ADDR | 217659c9bc1SBen Hutchings SDHCI_QUIRK_FORCE_DMA | 218659c9bc1SBen Hutchings SDHCI_QUIRK_CLOCK_BEFORE_RESET, 219659c9bc1SBen Hutchings }; 220659c9bc1SBen Hutchings 221659c9bc1SBen Hutchings static const struct sdhci_pci_fixes sdhci_ricoh_mmc = { 222659c9bc1SBen Hutchings .probe_slot = ricoh_mmc_probe_slot, 223b7813f0fSAdrian Hunter #ifdef CONFIG_PM_SLEEP 224659c9bc1SBen Hutchings .resume = ricoh_mmc_resume, 225b7813f0fSAdrian Hunter #endif 226659c9bc1SBen Hutchings .quirks = SDHCI_QUIRK_32BIT_DMA_ADDR | 227659c9bc1SBen Hutchings SDHCI_QUIRK_CLOCK_BEFORE_RESET | 228659c9bc1SBen Hutchings SDHCI_QUIRK_NO_CARD_NO_RESET | 229659c9bc1SBen Hutchings SDHCI_QUIRK_MISSING_CAPS 230659c9bc1SBen Hutchings }; 231659c9bc1SBen Hutchings 232659c9bc1SBen Hutchings static const struct sdhci_pci_fixes sdhci_ene_712 = { 233659c9bc1SBen Hutchings .quirks = SDHCI_QUIRK_SINGLE_POWER_WRITE | 234659c9bc1SBen Hutchings SDHCI_QUIRK_BROKEN_DMA, 235659c9bc1SBen Hutchings }; 236659c9bc1SBen Hutchings 237659c9bc1SBen Hutchings static const struct sdhci_pci_fixes sdhci_ene_714 = { 238659c9bc1SBen Hutchings .quirks = SDHCI_QUIRK_SINGLE_POWER_WRITE | 239659c9bc1SBen Hutchings SDHCI_QUIRK_RESET_CMD_DATA_ON_IOS | 240659c9bc1SBen Hutchings SDHCI_QUIRK_BROKEN_DMA, 241659c9bc1SBen Hutchings }; 242659c9bc1SBen Hutchings 243659c9bc1SBen Hutchings static const struct sdhci_pci_fixes sdhci_cafe = { 244659c9bc1SBen Hutchings .quirks = SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER | 245659c9bc1SBen Hutchings SDHCI_QUIRK_NO_BUSY_IRQ | 246659c9bc1SBen Hutchings SDHCI_QUIRK_BROKEN_CARD_DETECTION | 247659c9bc1SBen Hutchings SDHCI_QUIRK_BROKEN_TIMEOUT_VAL, 248659c9bc1SBen Hutchings }; 249659c9bc1SBen Hutchings 250659c9bc1SBen Hutchings static const struct sdhci_pci_fixes sdhci_intel_qrk = { 251659c9bc1SBen Hutchings .quirks = SDHCI_QUIRK_NO_HISPD_BIT, 252659c9bc1SBen Hutchings }; 253659c9bc1SBen Hutchings 254659c9bc1SBen Hutchings static int mrst_hc_probe_slot(struct sdhci_pci_slot *slot) 255659c9bc1SBen Hutchings { 256659c9bc1SBen Hutchings slot->host->mmc->caps |= MMC_CAP_8_BIT_DATA; 257659c9bc1SBen Hutchings return 0; 258659c9bc1SBen Hutchings } 259659c9bc1SBen Hutchings 260659c9bc1SBen Hutchings /* 261659c9bc1SBen Hutchings * ADMA operation is disabled for Moorestown platform due to 262659c9bc1SBen Hutchings * hardware bugs. 263659c9bc1SBen Hutchings */ 264659c9bc1SBen Hutchings static int mrst_hc_probe(struct sdhci_pci_chip *chip) 265659c9bc1SBen Hutchings { 266659c9bc1SBen Hutchings /* 267659c9bc1SBen Hutchings * slots number is fixed here for MRST as SDIO3/5 are never used and 268659c9bc1SBen Hutchings * have hardware bugs. 269659c9bc1SBen Hutchings */ 270659c9bc1SBen Hutchings chip->num_slots = 1; 271659c9bc1SBen Hutchings return 0; 272659c9bc1SBen Hutchings } 273659c9bc1SBen Hutchings 274659c9bc1SBen Hutchings static int pch_hc_probe_slot(struct sdhci_pci_slot *slot) 275659c9bc1SBen Hutchings { 276659c9bc1SBen Hutchings slot->host->mmc->caps |= MMC_CAP_8_BIT_DATA; 277659c9bc1SBen Hutchings return 0; 278659c9bc1SBen Hutchings } 279659c9bc1SBen Hutchings 280659c9bc1SBen Hutchings #ifdef CONFIG_PM 281659c9bc1SBen Hutchings 282659c9bc1SBen Hutchings static irqreturn_t sdhci_pci_sd_cd(int irq, void *dev_id) 283659c9bc1SBen Hutchings { 284659c9bc1SBen Hutchings struct sdhci_pci_slot *slot = dev_id; 285659c9bc1SBen Hutchings struct sdhci_host *host = slot->host; 286659c9bc1SBen Hutchings 287659c9bc1SBen Hutchings mmc_detect_change(host->mmc, msecs_to_jiffies(200)); 288659c9bc1SBen Hutchings return IRQ_HANDLED; 289659c9bc1SBen Hutchings } 290659c9bc1SBen Hutchings 291659c9bc1SBen Hutchings static void sdhci_pci_add_own_cd(struct sdhci_pci_slot *slot) 292659c9bc1SBen Hutchings { 293659c9bc1SBen Hutchings int err, irq, gpio = slot->cd_gpio; 294659c9bc1SBen Hutchings 295659c9bc1SBen Hutchings slot->cd_gpio = -EINVAL; 296659c9bc1SBen Hutchings slot->cd_irq = -EINVAL; 297659c9bc1SBen Hutchings 298659c9bc1SBen Hutchings if (!gpio_is_valid(gpio)) 299659c9bc1SBen Hutchings return; 300659c9bc1SBen Hutchings 301c10bc372SAndy Shevchenko err = devm_gpio_request(&slot->chip->pdev->dev, gpio, "sd_cd"); 302659c9bc1SBen Hutchings if (err < 0) 303659c9bc1SBen Hutchings goto out; 304659c9bc1SBen Hutchings 305659c9bc1SBen Hutchings err = gpio_direction_input(gpio); 306659c9bc1SBen Hutchings if (err < 0) 307659c9bc1SBen Hutchings goto out_free; 308659c9bc1SBen Hutchings 309659c9bc1SBen Hutchings irq = gpio_to_irq(gpio); 310659c9bc1SBen Hutchings if (irq < 0) 311659c9bc1SBen Hutchings goto out_free; 312659c9bc1SBen Hutchings 313659c9bc1SBen Hutchings err = request_irq(irq, sdhci_pci_sd_cd, IRQF_TRIGGER_RISING | 314659c9bc1SBen Hutchings IRQF_TRIGGER_FALLING, "sd_cd", slot); 315659c9bc1SBen Hutchings if (err) 316659c9bc1SBen Hutchings goto out_free; 317659c9bc1SBen Hutchings 318659c9bc1SBen Hutchings slot->cd_gpio = gpio; 319659c9bc1SBen Hutchings slot->cd_irq = irq; 320659c9bc1SBen Hutchings 321659c9bc1SBen Hutchings return; 322659c9bc1SBen Hutchings 323659c9bc1SBen Hutchings out_free: 324c10bc372SAndy Shevchenko devm_gpio_free(&slot->chip->pdev->dev, gpio); 325659c9bc1SBen Hutchings out: 326659c9bc1SBen Hutchings dev_warn(&slot->chip->pdev->dev, "failed to setup card detect wake up\n"); 327659c9bc1SBen Hutchings } 328659c9bc1SBen Hutchings 329659c9bc1SBen Hutchings static void sdhci_pci_remove_own_cd(struct sdhci_pci_slot *slot) 330659c9bc1SBen Hutchings { 331659c9bc1SBen Hutchings if (slot->cd_irq >= 0) 332659c9bc1SBen Hutchings free_irq(slot->cd_irq, slot); 333659c9bc1SBen Hutchings } 334659c9bc1SBen Hutchings 335659c9bc1SBen Hutchings #else 336659c9bc1SBen Hutchings 337659c9bc1SBen Hutchings static inline void sdhci_pci_add_own_cd(struct sdhci_pci_slot *slot) 338659c9bc1SBen Hutchings { 339659c9bc1SBen Hutchings } 340659c9bc1SBen Hutchings 341659c9bc1SBen Hutchings static inline void sdhci_pci_remove_own_cd(struct sdhci_pci_slot *slot) 342659c9bc1SBen Hutchings { 343659c9bc1SBen Hutchings } 344659c9bc1SBen Hutchings 345659c9bc1SBen Hutchings #endif 346659c9bc1SBen Hutchings 347659c9bc1SBen Hutchings static int mfd_emmc_probe_slot(struct sdhci_pci_slot *slot) 348659c9bc1SBen Hutchings { 349659c9bc1SBen Hutchings slot->host->mmc->caps |= MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE; 350659c9bc1SBen Hutchings slot->host->mmc->caps2 |= MMC_CAP2_BOOTPART_NOACC | 351659c9bc1SBen Hutchings MMC_CAP2_HC_ERASE_SZ; 352659c9bc1SBen Hutchings return 0; 353659c9bc1SBen Hutchings } 354659c9bc1SBen Hutchings 355659c9bc1SBen Hutchings static int mfd_sdio_probe_slot(struct sdhci_pci_slot *slot) 356659c9bc1SBen Hutchings { 357659c9bc1SBen Hutchings slot->host->mmc->caps |= MMC_CAP_POWER_OFF_CARD | MMC_CAP_NONREMOVABLE; 358659c9bc1SBen Hutchings return 0; 359659c9bc1SBen Hutchings } 360659c9bc1SBen Hutchings 361659c9bc1SBen Hutchings static const struct sdhci_pci_fixes sdhci_intel_mrst_hc0 = { 362659c9bc1SBen Hutchings .quirks = SDHCI_QUIRK_BROKEN_ADMA | SDHCI_QUIRK_NO_HISPD_BIT, 363659c9bc1SBen Hutchings .probe_slot = mrst_hc_probe_slot, 364659c9bc1SBen Hutchings }; 365659c9bc1SBen Hutchings 366659c9bc1SBen Hutchings static const struct sdhci_pci_fixes sdhci_intel_mrst_hc1_hc2 = { 367659c9bc1SBen Hutchings .quirks = SDHCI_QUIRK_BROKEN_ADMA | SDHCI_QUIRK_NO_HISPD_BIT, 368659c9bc1SBen Hutchings .probe = mrst_hc_probe, 369659c9bc1SBen Hutchings }; 370659c9bc1SBen Hutchings 371659c9bc1SBen Hutchings static const struct sdhci_pci_fixes sdhci_intel_mfd_sd = { 372659c9bc1SBen Hutchings .quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC, 373659c9bc1SBen Hutchings .allow_runtime_pm = true, 374659c9bc1SBen Hutchings .own_cd_for_runtime_pm = true, 375659c9bc1SBen Hutchings }; 376659c9bc1SBen Hutchings 377659c9bc1SBen Hutchings static const struct sdhci_pci_fixes sdhci_intel_mfd_sdio = { 378659c9bc1SBen Hutchings .quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC, 379659c9bc1SBen Hutchings .quirks2 = SDHCI_QUIRK2_HOST_OFF_CARD_ON, 380659c9bc1SBen Hutchings .allow_runtime_pm = true, 381659c9bc1SBen Hutchings .probe_slot = mfd_sdio_probe_slot, 382659c9bc1SBen Hutchings }; 383659c9bc1SBen Hutchings 384659c9bc1SBen Hutchings static const struct sdhci_pci_fixes sdhci_intel_mfd_emmc = { 385659c9bc1SBen Hutchings .quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC, 386659c9bc1SBen Hutchings .allow_runtime_pm = true, 387659c9bc1SBen Hutchings .probe_slot = mfd_emmc_probe_slot, 388659c9bc1SBen Hutchings }; 389659c9bc1SBen Hutchings 390659c9bc1SBen Hutchings static const struct sdhci_pci_fixes sdhci_intel_pch_sdio = { 391659c9bc1SBen Hutchings .quirks = SDHCI_QUIRK_BROKEN_ADMA, 392659c9bc1SBen Hutchings .probe_slot = pch_hc_probe_slot, 393659c9bc1SBen Hutchings }; 394659c9bc1SBen Hutchings 395c959a6b0SAdrian Hunter enum { 396c959a6b0SAdrian Hunter INTEL_DSM_FNS = 0, 39751ced59cSAdrian Hunter INTEL_DSM_DRV_STRENGTH = 9, 398c959a6b0SAdrian Hunter INTEL_DSM_D3_RETUNE = 10, 399c959a6b0SAdrian Hunter }; 400c959a6b0SAdrian Hunter 401c959a6b0SAdrian Hunter struct intel_host { 402c959a6b0SAdrian Hunter u32 dsm_fns; 40351ced59cSAdrian Hunter int drv_strength; 404c959a6b0SAdrian Hunter bool d3_retune; 405c959a6b0SAdrian Hunter }; 406c959a6b0SAdrian Hunter 407c959a6b0SAdrian Hunter const u8 intel_dsm_uuid[] = { 408c959a6b0SAdrian Hunter 0xA5, 0x3E, 0xC1, 0xF6, 0xCD, 0x65, 0x1F, 0x46, 409c959a6b0SAdrian Hunter 0xAB, 0x7A, 0x29, 0xF7, 0xE8, 0xD5, 0xBD, 0x61, 410c959a6b0SAdrian Hunter }; 411c959a6b0SAdrian Hunter 412c959a6b0SAdrian Hunter static int __intel_dsm(struct intel_host *intel_host, struct device *dev, 413c959a6b0SAdrian Hunter unsigned int fn, u32 *result) 414c959a6b0SAdrian Hunter { 415c959a6b0SAdrian Hunter union acpi_object *obj; 416c959a6b0SAdrian Hunter int err = 0; 417a72016a4SAdrian Hunter size_t len; 418c959a6b0SAdrian Hunter 419c959a6b0SAdrian Hunter obj = acpi_evaluate_dsm(ACPI_HANDLE(dev), intel_dsm_uuid, 0, fn, NULL); 420c959a6b0SAdrian Hunter if (!obj) 421c959a6b0SAdrian Hunter return -EOPNOTSUPP; 422c959a6b0SAdrian Hunter 423c959a6b0SAdrian Hunter if (obj->type != ACPI_TYPE_BUFFER || obj->buffer.length < 1) { 424c959a6b0SAdrian Hunter err = -EINVAL; 425c959a6b0SAdrian Hunter goto out; 426c959a6b0SAdrian Hunter } 427c959a6b0SAdrian Hunter 428a72016a4SAdrian Hunter len = min_t(size_t, obj->buffer.length, 4); 429a72016a4SAdrian Hunter 430a72016a4SAdrian Hunter *result = 0; 431a72016a4SAdrian Hunter memcpy(result, obj->buffer.pointer, len); 432c959a6b0SAdrian Hunter out: 433c959a6b0SAdrian Hunter ACPI_FREE(obj); 434c959a6b0SAdrian Hunter 435c959a6b0SAdrian Hunter return err; 436c959a6b0SAdrian Hunter } 437c959a6b0SAdrian Hunter 438c959a6b0SAdrian Hunter static int intel_dsm(struct intel_host *intel_host, struct device *dev, 439c959a6b0SAdrian Hunter unsigned int fn, u32 *result) 440c959a6b0SAdrian Hunter { 441c959a6b0SAdrian Hunter if (fn > 31 || !(intel_host->dsm_fns & (1 << fn))) 442c959a6b0SAdrian Hunter return -EOPNOTSUPP; 443c959a6b0SAdrian Hunter 444c959a6b0SAdrian Hunter return __intel_dsm(intel_host, dev, fn, result); 445c959a6b0SAdrian Hunter } 446c959a6b0SAdrian Hunter 447c959a6b0SAdrian Hunter static void intel_dsm_init(struct intel_host *intel_host, struct device *dev, 448c959a6b0SAdrian Hunter struct mmc_host *mmc) 449c959a6b0SAdrian Hunter { 450c959a6b0SAdrian Hunter int err; 451c959a6b0SAdrian Hunter u32 val; 452c959a6b0SAdrian Hunter 453c959a6b0SAdrian Hunter err = __intel_dsm(intel_host, dev, INTEL_DSM_FNS, &intel_host->dsm_fns); 454c959a6b0SAdrian Hunter if (err) { 455c959a6b0SAdrian Hunter pr_debug("%s: DSM not supported, error %d\n", 456c959a6b0SAdrian Hunter mmc_hostname(mmc), err); 457c959a6b0SAdrian Hunter return; 458c959a6b0SAdrian Hunter } 459c959a6b0SAdrian Hunter 460c959a6b0SAdrian Hunter pr_debug("%s: DSM function mask %#x\n", 461c959a6b0SAdrian Hunter mmc_hostname(mmc), intel_host->dsm_fns); 462c959a6b0SAdrian Hunter 46351ced59cSAdrian Hunter err = intel_dsm(intel_host, dev, INTEL_DSM_DRV_STRENGTH, &val); 46451ced59cSAdrian Hunter intel_host->drv_strength = err ? 0 : val; 46551ced59cSAdrian Hunter 466c959a6b0SAdrian Hunter err = intel_dsm(intel_host, dev, INTEL_DSM_D3_RETUNE, &val); 467c959a6b0SAdrian Hunter intel_host->d3_retune = err ? true : !!val; 468c959a6b0SAdrian Hunter } 469c959a6b0SAdrian Hunter 470659c9bc1SBen Hutchings static void sdhci_pci_int_hw_reset(struct sdhci_host *host) 471659c9bc1SBen Hutchings { 472659c9bc1SBen Hutchings u8 reg; 473659c9bc1SBen Hutchings 474659c9bc1SBen Hutchings reg = sdhci_readb(host, SDHCI_POWER_CONTROL); 475659c9bc1SBen Hutchings reg |= 0x10; 476659c9bc1SBen Hutchings sdhci_writeb(host, reg, SDHCI_POWER_CONTROL); 477659c9bc1SBen Hutchings /* For eMMC, minimum is 1us but give it 9us for good measure */ 478659c9bc1SBen Hutchings udelay(9); 479659c9bc1SBen Hutchings reg &= ~0x10; 480659c9bc1SBen Hutchings sdhci_writeb(host, reg, SDHCI_POWER_CONTROL); 481659c9bc1SBen Hutchings /* For eMMC, minimum is 200us but give it 300us for good measure */ 482659c9bc1SBen Hutchings usleep_range(300, 1000); 483659c9bc1SBen Hutchings } 484659c9bc1SBen Hutchings 48551ced59cSAdrian Hunter static int intel_select_drive_strength(struct mmc_card *card, 48651ced59cSAdrian Hunter unsigned int max_dtr, int host_drv, 48751ced59cSAdrian Hunter int card_drv, int *drv_type) 488659c9bc1SBen Hutchings { 48951ced59cSAdrian Hunter struct sdhci_host *host = mmc_priv(card->host); 49051ced59cSAdrian Hunter struct sdhci_pci_slot *slot = sdhci_priv(host); 49151ced59cSAdrian Hunter struct intel_host *intel_host = sdhci_pci_priv(slot); 492659c9bc1SBen Hutchings 49351ced59cSAdrian Hunter return intel_host->drv_strength; 494659c9bc1SBen Hutchings } 495659c9bc1SBen Hutchings 496163cbe31SAdrian Hunter static int bxt_get_cd(struct mmc_host *mmc) 497163cbe31SAdrian Hunter { 498163cbe31SAdrian Hunter int gpio_cd = mmc_gpio_get_cd(mmc); 499163cbe31SAdrian Hunter struct sdhci_host *host = mmc_priv(mmc); 500163cbe31SAdrian Hunter unsigned long flags; 501163cbe31SAdrian Hunter int ret = 0; 502163cbe31SAdrian Hunter 503163cbe31SAdrian Hunter if (!gpio_cd) 504163cbe31SAdrian Hunter return 0; 505163cbe31SAdrian Hunter 506163cbe31SAdrian Hunter spin_lock_irqsave(&host->lock, flags); 507163cbe31SAdrian Hunter 508163cbe31SAdrian Hunter if (host->flags & SDHCI_DEVICE_DEAD) 509163cbe31SAdrian Hunter goto out; 510163cbe31SAdrian Hunter 511163cbe31SAdrian Hunter ret = !!(sdhci_readl(host, SDHCI_PRESENT_STATE) & SDHCI_CARD_PRESENT); 512163cbe31SAdrian Hunter out: 513163cbe31SAdrian Hunter spin_unlock_irqrestore(&host->lock, flags); 514163cbe31SAdrian Hunter 515163cbe31SAdrian Hunter return ret; 516163cbe31SAdrian Hunter } 517163cbe31SAdrian Hunter 51848d685a2SAdrian Hunter #define SDHCI_INTEL_PWR_TIMEOUT_CNT 20 51948d685a2SAdrian Hunter #define SDHCI_INTEL_PWR_TIMEOUT_UDELAY 100 52048d685a2SAdrian Hunter 52148d685a2SAdrian Hunter static void sdhci_intel_set_power(struct sdhci_host *host, unsigned char mode, 52248d685a2SAdrian Hunter unsigned short vdd) 52348d685a2SAdrian Hunter { 52448d685a2SAdrian Hunter int cntr; 52548d685a2SAdrian Hunter u8 reg; 52648d685a2SAdrian Hunter 52748d685a2SAdrian Hunter sdhci_set_power(host, mode, vdd); 52848d685a2SAdrian Hunter 52948d685a2SAdrian Hunter if (mode == MMC_POWER_OFF) 53048d685a2SAdrian Hunter return; 53148d685a2SAdrian Hunter 53248d685a2SAdrian Hunter /* 53348d685a2SAdrian Hunter * Bus power might not enable after D3 -> D0 transition due to the 53448d685a2SAdrian Hunter * present state not yet having propagated. Retry for up to 2ms. 53548d685a2SAdrian Hunter */ 53648d685a2SAdrian Hunter for (cntr = 0; cntr < SDHCI_INTEL_PWR_TIMEOUT_CNT; cntr++) { 53748d685a2SAdrian Hunter reg = sdhci_readb(host, SDHCI_POWER_CONTROL); 53848d685a2SAdrian Hunter if (reg & SDHCI_POWER_ON) 53948d685a2SAdrian Hunter break; 54048d685a2SAdrian Hunter udelay(SDHCI_INTEL_PWR_TIMEOUT_UDELAY); 54148d685a2SAdrian Hunter reg |= SDHCI_POWER_ON; 54248d685a2SAdrian Hunter sdhci_writeb(host, reg, SDHCI_POWER_CONTROL); 54348d685a2SAdrian Hunter } 54448d685a2SAdrian Hunter } 54548d685a2SAdrian Hunter 546bc55dcd8SAdrian Hunter #define INTEL_HS400_ES_REG 0x78 547bc55dcd8SAdrian Hunter #define INTEL_HS400_ES_BIT BIT(0) 548bc55dcd8SAdrian Hunter 549bc55dcd8SAdrian Hunter static void intel_hs400_enhanced_strobe(struct mmc_host *mmc, 550bc55dcd8SAdrian Hunter struct mmc_ios *ios) 551bc55dcd8SAdrian Hunter { 552bc55dcd8SAdrian Hunter struct sdhci_host *host = mmc_priv(mmc); 553bc55dcd8SAdrian Hunter u32 val; 554bc55dcd8SAdrian Hunter 555bc55dcd8SAdrian Hunter val = sdhci_readl(host, INTEL_HS400_ES_REG); 556bc55dcd8SAdrian Hunter if (ios->enhanced_strobe) 557bc55dcd8SAdrian Hunter val |= INTEL_HS400_ES_BIT; 558bc55dcd8SAdrian Hunter else 559bc55dcd8SAdrian Hunter val &= ~INTEL_HS400_ES_BIT; 560bc55dcd8SAdrian Hunter sdhci_writel(host, val, INTEL_HS400_ES_REG); 561bc55dcd8SAdrian Hunter } 562bc55dcd8SAdrian Hunter 56348d685a2SAdrian Hunter static const struct sdhci_ops sdhci_intel_byt_ops = { 56448d685a2SAdrian Hunter .set_clock = sdhci_set_clock, 56548d685a2SAdrian Hunter .set_power = sdhci_intel_set_power, 56648d685a2SAdrian Hunter .enable_dma = sdhci_pci_enable_dma, 56748d685a2SAdrian Hunter .set_bus_width = sdhci_pci_set_bus_width, 56848d685a2SAdrian Hunter .reset = sdhci_reset, 56948d685a2SAdrian Hunter .set_uhs_signaling = sdhci_set_uhs_signaling, 57048d685a2SAdrian Hunter .hw_reset = sdhci_pci_hw_reset, 57148d685a2SAdrian Hunter }; 57248d685a2SAdrian Hunter 573c959a6b0SAdrian Hunter static void byt_read_dsm(struct sdhci_pci_slot *slot) 574c959a6b0SAdrian Hunter { 575c959a6b0SAdrian Hunter struct intel_host *intel_host = sdhci_pci_priv(slot); 576c959a6b0SAdrian Hunter struct device *dev = &slot->chip->pdev->dev; 577c959a6b0SAdrian Hunter struct mmc_host *mmc = slot->host->mmc; 578c959a6b0SAdrian Hunter 579c959a6b0SAdrian Hunter intel_dsm_init(intel_host, dev, mmc); 580c959a6b0SAdrian Hunter slot->chip->rpm_retune = intel_host->d3_retune; 581c959a6b0SAdrian Hunter } 582c959a6b0SAdrian Hunter 583659c9bc1SBen Hutchings static int byt_emmc_probe_slot(struct sdhci_pci_slot *slot) 584659c9bc1SBen Hutchings { 585c959a6b0SAdrian Hunter byt_read_dsm(slot); 586659c9bc1SBen Hutchings slot->host->mmc->caps |= MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE | 587659c9bc1SBen Hutchings MMC_CAP_HW_RESET | MMC_CAP_1_8V_DDR | 58832828857SAdrian Hunter MMC_CAP_CMD_DURING_TFR | 589659c9bc1SBen Hutchings MMC_CAP_WAIT_WHILE_BUSY; 590659c9bc1SBen Hutchings slot->host->mmc->caps2 |= MMC_CAP2_HC_ERASE_SZ; 591659c9bc1SBen Hutchings slot->hw_reset = sdhci_pci_int_hw_reset; 592659c9bc1SBen Hutchings if (slot->chip->pdev->device == PCI_DEVICE_ID_INTEL_BSW_EMMC) 593659c9bc1SBen Hutchings slot->host->timeout_clk = 1000; /* 1000 kHz i.e. 1 MHz */ 59451ced59cSAdrian Hunter slot->host->mmc_host_ops.select_drive_strength = 59551ced59cSAdrian Hunter intel_select_drive_strength; 596659c9bc1SBen Hutchings return 0; 597659c9bc1SBen Hutchings } 598659c9bc1SBen Hutchings 599bc55dcd8SAdrian Hunter static int glk_emmc_probe_slot(struct sdhci_pci_slot *slot) 600bc55dcd8SAdrian Hunter { 601bc55dcd8SAdrian Hunter int ret = byt_emmc_probe_slot(slot); 602bc55dcd8SAdrian Hunter 603bc55dcd8SAdrian Hunter if (slot->chip->pdev->device != PCI_DEVICE_ID_INTEL_GLK_EMMC) { 604bc55dcd8SAdrian Hunter slot->host->mmc->caps2 |= MMC_CAP2_HS400_ES, 605bc55dcd8SAdrian Hunter slot->host->mmc_host_ops.hs400_enhanced_strobe = 606bc55dcd8SAdrian Hunter intel_hs400_enhanced_strobe; 607bc55dcd8SAdrian Hunter } 608bc55dcd8SAdrian Hunter 609bc55dcd8SAdrian Hunter return ret; 610bc55dcd8SAdrian Hunter } 611bc55dcd8SAdrian Hunter 6123f23df72SZach Brown #ifdef CONFIG_ACPI 6133f23df72SZach Brown static int ni_set_max_freq(struct sdhci_pci_slot *slot) 6143f23df72SZach Brown { 6153f23df72SZach Brown acpi_status status; 6163f23df72SZach Brown unsigned long long max_freq; 6173f23df72SZach Brown 6183f23df72SZach Brown status = acpi_evaluate_integer(ACPI_HANDLE(&slot->chip->pdev->dev), 6193f23df72SZach Brown "MXFQ", NULL, &max_freq); 6203f23df72SZach Brown if (ACPI_FAILURE(status)) { 6213f23df72SZach Brown dev_err(&slot->chip->pdev->dev, 6223f23df72SZach Brown "MXFQ not found in acpi table\n"); 6233f23df72SZach Brown return -EINVAL; 6243f23df72SZach Brown } 6253f23df72SZach Brown 6263f23df72SZach Brown slot->host->mmc->f_max = max_freq * 1000000; 6273f23df72SZach Brown 6283f23df72SZach Brown return 0; 6293f23df72SZach Brown } 6303f23df72SZach Brown #else 6313f23df72SZach Brown static inline int ni_set_max_freq(struct sdhci_pci_slot *slot) 6323f23df72SZach Brown { 6333f23df72SZach Brown return 0; 6343f23df72SZach Brown } 6353f23df72SZach Brown #endif 6363f23df72SZach Brown 63742b06496SZach Brown static int ni_byt_sdio_probe_slot(struct sdhci_pci_slot *slot) 63842b06496SZach Brown { 6393f23df72SZach Brown int err; 6403f23df72SZach Brown 641c959a6b0SAdrian Hunter byt_read_dsm(slot); 642c959a6b0SAdrian Hunter 6433f23df72SZach Brown err = ni_set_max_freq(slot); 6443f23df72SZach Brown if (err) 6453f23df72SZach Brown return err; 6463f23df72SZach Brown 64742b06496SZach Brown slot->host->mmc->caps |= MMC_CAP_POWER_OFF_CARD | MMC_CAP_NONREMOVABLE | 64842b06496SZach Brown MMC_CAP_WAIT_WHILE_BUSY; 64942b06496SZach Brown return 0; 65042b06496SZach Brown } 65142b06496SZach Brown 652659c9bc1SBen Hutchings static int byt_sdio_probe_slot(struct sdhci_pci_slot *slot) 653659c9bc1SBen Hutchings { 654c959a6b0SAdrian Hunter byt_read_dsm(slot); 655659c9bc1SBen Hutchings slot->host->mmc->caps |= MMC_CAP_POWER_OFF_CARD | MMC_CAP_NONREMOVABLE | 656659c9bc1SBen Hutchings MMC_CAP_WAIT_WHILE_BUSY; 657659c9bc1SBen Hutchings return 0; 658659c9bc1SBen Hutchings } 659659c9bc1SBen Hutchings 660659c9bc1SBen Hutchings static int byt_sd_probe_slot(struct sdhci_pci_slot *slot) 661659c9bc1SBen Hutchings { 662c959a6b0SAdrian Hunter byt_read_dsm(slot); 663c2c49a2eSAzhar Shaikh slot->host->mmc->caps |= MMC_CAP_WAIT_WHILE_BUSY | 664c2c49a2eSAzhar Shaikh MMC_CAP_AGGRESSIVE_PM; 665659c9bc1SBen Hutchings slot->cd_idx = 0; 666659c9bc1SBen Hutchings slot->cd_override_level = true; 667163cbe31SAdrian Hunter if (slot->chip->pdev->device == PCI_DEVICE_ID_INTEL_BXT_SD || 66801d6b2a4SAdrian Hunter slot->chip->pdev->device == PCI_DEVICE_ID_INTEL_BXTM_SD || 6692d1956d0SAdrian Hunter slot->chip->pdev->device == PCI_DEVICE_ID_INTEL_APL_SD || 670c2c49a2eSAzhar Shaikh slot->chip->pdev->device == PCI_DEVICE_ID_INTEL_GLK_SD) 671163cbe31SAdrian Hunter slot->host->mmc_host_ops.get_cd = bxt_get_cd; 672163cbe31SAdrian Hunter 673659c9bc1SBen Hutchings return 0; 674659c9bc1SBen Hutchings } 675659c9bc1SBen Hutchings 676659c9bc1SBen Hutchings static const struct sdhci_pci_fixes sdhci_intel_byt_emmc = { 677659c9bc1SBen Hutchings .allow_runtime_pm = true, 678659c9bc1SBen Hutchings .probe_slot = byt_emmc_probe_slot, 679659c9bc1SBen Hutchings .quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC, 680659c9bc1SBen Hutchings .quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN | 681659c9bc1SBen Hutchings SDHCI_QUIRK2_CAPS_BIT63_FOR_HS400 | 682659c9bc1SBen Hutchings SDHCI_QUIRK2_STOP_WITH_TC, 683fee686b7SAdrian Hunter .ops = &sdhci_intel_byt_ops, 684c959a6b0SAdrian Hunter .priv_size = sizeof(struct intel_host), 685659c9bc1SBen Hutchings }; 686659c9bc1SBen Hutchings 687bc55dcd8SAdrian Hunter static const struct sdhci_pci_fixes sdhci_intel_glk_emmc = { 688bc55dcd8SAdrian Hunter .allow_runtime_pm = true, 689bc55dcd8SAdrian Hunter .probe_slot = glk_emmc_probe_slot, 690bc55dcd8SAdrian Hunter .quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC, 691bc55dcd8SAdrian Hunter .quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN | 692bc55dcd8SAdrian Hunter SDHCI_QUIRK2_CAPS_BIT63_FOR_HS400 | 693bc55dcd8SAdrian Hunter SDHCI_QUIRK2_STOP_WITH_TC, 694bc55dcd8SAdrian Hunter .ops = &sdhci_intel_byt_ops, 695bc55dcd8SAdrian Hunter .priv_size = sizeof(struct intel_host), 696bc55dcd8SAdrian Hunter }; 697bc55dcd8SAdrian Hunter 69842b06496SZach Brown static const struct sdhci_pci_fixes sdhci_ni_byt_sdio = { 69942b06496SZach Brown .quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC, 70042b06496SZach Brown .quirks2 = SDHCI_QUIRK2_HOST_OFF_CARD_ON | 70142b06496SZach Brown SDHCI_QUIRK2_PRESET_VALUE_BROKEN, 70242b06496SZach Brown .allow_runtime_pm = true, 70342b06496SZach Brown .probe_slot = ni_byt_sdio_probe_slot, 70442b06496SZach Brown .ops = &sdhci_intel_byt_ops, 705c959a6b0SAdrian Hunter .priv_size = sizeof(struct intel_host), 70642b06496SZach Brown }; 70742b06496SZach Brown 708659c9bc1SBen Hutchings static const struct sdhci_pci_fixes sdhci_intel_byt_sdio = { 709659c9bc1SBen Hutchings .quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC, 710659c9bc1SBen Hutchings .quirks2 = SDHCI_QUIRK2_HOST_OFF_CARD_ON | 711659c9bc1SBen Hutchings SDHCI_QUIRK2_PRESET_VALUE_BROKEN, 712659c9bc1SBen Hutchings .allow_runtime_pm = true, 713659c9bc1SBen Hutchings .probe_slot = byt_sdio_probe_slot, 714fee686b7SAdrian Hunter .ops = &sdhci_intel_byt_ops, 715c959a6b0SAdrian Hunter .priv_size = sizeof(struct intel_host), 716659c9bc1SBen Hutchings }; 717659c9bc1SBen Hutchings 718659c9bc1SBen Hutchings static const struct sdhci_pci_fixes sdhci_intel_byt_sd = { 719659c9bc1SBen Hutchings .quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC, 720659c9bc1SBen Hutchings .quirks2 = SDHCI_QUIRK2_CARD_ON_NEEDS_BUS_ON | 721659c9bc1SBen Hutchings SDHCI_QUIRK2_PRESET_VALUE_BROKEN | 722659c9bc1SBen Hutchings SDHCI_QUIRK2_STOP_WITH_TC, 723659c9bc1SBen Hutchings .allow_runtime_pm = true, 724659c9bc1SBen Hutchings .own_cd_for_runtime_pm = true, 725659c9bc1SBen Hutchings .probe_slot = byt_sd_probe_slot, 726fee686b7SAdrian Hunter .ops = &sdhci_intel_byt_ops, 727c959a6b0SAdrian Hunter .priv_size = sizeof(struct intel_host), 728659c9bc1SBen Hutchings }; 729659c9bc1SBen Hutchings 730659c9bc1SBen Hutchings /* Define Host controllers for Intel Merrifield platform */ 7311f64cec2SAndy Shevchenko #define INTEL_MRFLD_EMMC_0 0 7321f64cec2SAndy Shevchenko #define INTEL_MRFLD_EMMC_1 1 7334674b6c8SAndy Shevchenko #define INTEL_MRFLD_SD 2 734d5565577SAndy Shevchenko #define INTEL_MRFLD_SDIO 3 735659c9bc1SBen Hutchings 7361f64cec2SAndy Shevchenko static int intel_mrfld_mmc_probe_slot(struct sdhci_pci_slot *slot) 737659c9bc1SBen Hutchings { 7382e57bbe2SAndy Shevchenko unsigned int func = PCI_FUNC(slot->chip->pdev->devfn); 7392e57bbe2SAndy Shevchenko 7402e57bbe2SAndy Shevchenko switch (func) { 7412e57bbe2SAndy Shevchenko case INTEL_MRFLD_EMMC_0: 7422e57bbe2SAndy Shevchenko case INTEL_MRFLD_EMMC_1: 7432e57bbe2SAndy Shevchenko slot->host->mmc->caps |= MMC_CAP_NONREMOVABLE | 7442e57bbe2SAndy Shevchenko MMC_CAP_8_BIT_DATA | 7452e57bbe2SAndy Shevchenko MMC_CAP_1_8V_DDR; 7462e57bbe2SAndy Shevchenko break; 7474674b6c8SAndy Shevchenko case INTEL_MRFLD_SD: 7484674b6c8SAndy Shevchenko slot->host->quirks2 |= SDHCI_QUIRK2_NO_1_8_V; 7494674b6c8SAndy Shevchenko break; 750d5565577SAndy Shevchenko case INTEL_MRFLD_SDIO: 751d5565577SAndy Shevchenko slot->host->mmc->caps |= MMC_CAP_NONREMOVABLE | 752d5565577SAndy Shevchenko MMC_CAP_POWER_OFF_CARD; 753d5565577SAndy Shevchenko break; 7542e57bbe2SAndy Shevchenko default: 755659c9bc1SBen Hutchings return -ENODEV; 7562e57bbe2SAndy Shevchenko } 757659c9bc1SBen Hutchings return 0; 758659c9bc1SBen Hutchings } 759659c9bc1SBen Hutchings 7601f64cec2SAndy Shevchenko static const struct sdhci_pci_fixes sdhci_intel_mrfld_mmc = { 761659c9bc1SBen Hutchings .quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC, 762659c9bc1SBen Hutchings .quirks2 = SDHCI_QUIRK2_BROKEN_HS200 | 763659c9bc1SBen Hutchings SDHCI_QUIRK2_PRESET_VALUE_BROKEN, 764659c9bc1SBen Hutchings .allow_runtime_pm = true, 7651f64cec2SAndy Shevchenko .probe_slot = intel_mrfld_mmc_probe_slot, 766659c9bc1SBen Hutchings }; 767659c9bc1SBen Hutchings 768659c9bc1SBen Hutchings /* O2Micro extra registers */ 769659c9bc1SBen Hutchings #define O2_SD_LOCK_WP 0xD3 770659c9bc1SBen Hutchings #define O2_SD_MULTI_VCC3V 0xEE 771659c9bc1SBen Hutchings #define O2_SD_CLKREQ 0xEC 772659c9bc1SBen Hutchings #define O2_SD_CAPS 0xE0 773659c9bc1SBen Hutchings #define O2_SD_ADMA1 0xE2 774659c9bc1SBen Hutchings #define O2_SD_ADMA2 0xE7 775659c9bc1SBen Hutchings #define O2_SD_INF_MOD 0xF1 776659c9bc1SBen Hutchings 777659c9bc1SBen Hutchings static int jmicron_pmos(struct sdhci_pci_chip *chip, int on) 778659c9bc1SBen Hutchings { 779659c9bc1SBen Hutchings u8 scratch; 780659c9bc1SBen Hutchings int ret; 781659c9bc1SBen Hutchings 782659c9bc1SBen Hutchings ret = pci_read_config_byte(chip->pdev, 0xAE, &scratch); 783659c9bc1SBen Hutchings if (ret) 784659c9bc1SBen Hutchings return ret; 785659c9bc1SBen Hutchings 786659c9bc1SBen Hutchings /* 787659c9bc1SBen Hutchings * Turn PMOS on [bit 0], set over current detection to 2.4 V 788659c9bc1SBen Hutchings * [bit 1:2] and enable over current debouncing [bit 6]. 789659c9bc1SBen Hutchings */ 790659c9bc1SBen Hutchings if (on) 791659c9bc1SBen Hutchings scratch |= 0x47; 792659c9bc1SBen Hutchings else 793659c9bc1SBen Hutchings scratch &= ~0x47; 794659c9bc1SBen Hutchings 7957582041fSkbuild test robot return pci_write_config_byte(chip->pdev, 0xAE, scratch); 796659c9bc1SBen Hutchings } 797659c9bc1SBen Hutchings 798659c9bc1SBen Hutchings static int jmicron_probe(struct sdhci_pci_chip *chip) 799659c9bc1SBen Hutchings { 800659c9bc1SBen Hutchings int ret; 801659c9bc1SBen Hutchings u16 mmcdev = 0; 802659c9bc1SBen Hutchings 803659c9bc1SBen Hutchings if (chip->pdev->revision == 0) { 804659c9bc1SBen Hutchings chip->quirks |= SDHCI_QUIRK_32BIT_DMA_ADDR | 805659c9bc1SBen Hutchings SDHCI_QUIRK_32BIT_DMA_SIZE | 806659c9bc1SBen Hutchings SDHCI_QUIRK_32BIT_ADMA_SIZE | 807659c9bc1SBen Hutchings SDHCI_QUIRK_RESET_AFTER_REQUEST | 808659c9bc1SBen Hutchings SDHCI_QUIRK_BROKEN_SMALL_PIO; 809659c9bc1SBen Hutchings } 810659c9bc1SBen Hutchings 811659c9bc1SBen Hutchings /* 812659c9bc1SBen Hutchings * JMicron chips can have two interfaces to the same hardware 813659c9bc1SBen Hutchings * in order to work around limitations in Microsoft's driver. 814659c9bc1SBen Hutchings * We need to make sure we only bind to one of them. 815659c9bc1SBen Hutchings * 816659c9bc1SBen Hutchings * This code assumes two things: 817659c9bc1SBen Hutchings * 818659c9bc1SBen Hutchings * 1. The PCI code adds subfunctions in order. 819659c9bc1SBen Hutchings * 820659c9bc1SBen Hutchings * 2. The MMC interface has a lower subfunction number 821659c9bc1SBen Hutchings * than the SD interface. 822659c9bc1SBen Hutchings */ 823659c9bc1SBen Hutchings if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_SD) 824659c9bc1SBen Hutchings mmcdev = PCI_DEVICE_ID_JMICRON_JMB38X_MMC; 825659c9bc1SBen Hutchings else if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_SD) 826659c9bc1SBen Hutchings mmcdev = PCI_DEVICE_ID_JMICRON_JMB388_ESD; 827659c9bc1SBen Hutchings 828659c9bc1SBen Hutchings if (mmcdev) { 829659c9bc1SBen Hutchings struct pci_dev *sd_dev; 830659c9bc1SBen Hutchings 831659c9bc1SBen Hutchings sd_dev = NULL; 832659c9bc1SBen Hutchings while ((sd_dev = pci_get_device(PCI_VENDOR_ID_JMICRON, 833659c9bc1SBen Hutchings mmcdev, sd_dev)) != NULL) { 834659c9bc1SBen Hutchings if ((PCI_SLOT(chip->pdev->devfn) == 835659c9bc1SBen Hutchings PCI_SLOT(sd_dev->devfn)) && 836659c9bc1SBen Hutchings (chip->pdev->bus == sd_dev->bus)) 837659c9bc1SBen Hutchings break; 838659c9bc1SBen Hutchings } 839659c9bc1SBen Hutchings 840659c9bc1SBen Hutchings if (sd_dev) { 841659c9bc1SBen Hutchings pci_dev_put(sd_dev); 842659c9bc1SBen Hutchings dev_info(&chip->pdev->dev, "Refusing to bind to " 843659c9bc1SBen Hutchings "secondary interface.\n"); 844659c9bc1SBen Hutchings return -ENODEV; 845659c9bc1SBen Hutchings } 846659c9bc1SBen Hutchings } 847659c9bc1SBen Hutchings 848659c9bc1SBen Hutchings /* 849659c9bc1SBen Hutchings * JMicron chips need a bit of a nudge to enable the power 850659c9bc1SBen Hutchings * output pins. 851659c9bc1SBen Hutchings */ 852659c9bc1SBen Hutchings ret = jmicron_pmos(chip, 1); 853659c9bc1SBen Hutchings if (ret) { 854659c9bc1SBen Hutchings dev_err(&chip->pdev->dev, "Failure enabling card power\n"); 855659c9bc1SBen Hutchings return ret; 856659c9bc1SBen Hutchings } 857659c9bc1SBen Hutchings 858659c9bc1SBen Hutchings /* quirk for unsable RO-detection on JM388 chips */ 859659c9bc1SBen Hutchings if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_SD || 860659c9bc1SBen Hutchings chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD) 861659c9bc1SBen Hutchings chip->quirks |= SDHCI_QUIRK_UNSTABLE_RO_DETECT; 862659c9bc1SBen Hutchings 863659c9bc1SBen Hutchings return 0; 864659c9bc1SBen Hutchings } 865659c9bc1SBen Hutchings 866659c9bc1SBen Hutchings static void jmicron_enable_mmc(struct sdhci_host *host, int on) 867659c9bc1SBen Hutchings { 868659c9bc1SBen Hutchings u8 scratch; 869659c9bc1SBen Hutchings 870659c9bc1SBen Hutchings scratch = readb(host->ioaddr + 0xC0); 871659c9bc1SBen Hutchings 872659c9bc1SBen Hutchings if (on) 873659c9bc1SBen Hutchings scratch |= 0x01; 874659c9bc1SBen Hutchings else 875659c9bc1SBen Hutchings scratch &= ~0x01; 876659c9bc1SBen Hutchings 877659c9bc1SBen Hutchings writeb(scratch, host->ioaddr + 0xC0); 878659c9bc1SBen Hutchings } 879659c9bc1SBen Hutchings 880659c9bc1SBen Hutchings static int jmicron_probe_slot(struct sdhci_pci_slot *slot) 881659c9bc1SBen Hutchings { 882659c9bc1SBen Hutchings if (slot->chip->pdev->revision == 0) { 883659c9bc1SBen Hutchings u16 version; 884659c9bc1SBen Hutchings 885659c9bc1SBen Hutchings version = readl(slot->host->ioaddr + SDHCI_HOST_VERSION); 886659c9bc1SBen Hutchings version = (version & SDHCI_VENDOR_VER_MASK) >> 887659c9bc1SBen Hutchings SDHCI_VENDOR_VER_SHIFT; 888659c9bc1SBen Hutchings 889659c9bc1SBen Hutchings /* 890659c9bc1SBen Hutchings * Older versions of the chip have lots of nasty glitches 891659c9bc1SBen Hutchings * in the ADMA engine. It's best just to avoid it 892659c9bc1SBen Hutchings * completely. 893659c9bc1SBen Hutchings */ 894659c9bc1SBen Hutchings if (version < 0xAC) 895659c9bc1SBen Hutchings slot->host->quirks |= SDHCI_QUIRK_BROKEN_ADMA; 896659c9bc1SBen Hutchings } 897659c9bc1SBen Hutchings 898659c9bc1SBen Hutchings /* JM388 MMC doesn't support 1.8V while SD supports it */ 899659c9bc1SBen Hutchings if (slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD) { 900659c9bc1SBen Hutchings slot->host->ocr_avail_sd = MMC_VDD_32_33 | MMC_VDD_33_34 | 901659c9bc1SBen Hutchings MMC_VDD_29_30 | MMC_VDD_30_31 | 902659c9bc1SBen Hutchings MMC_VDD_165_195; /* allow 1.8V */ 903659c9bc1SBen Hutchings slot->host->ocr_avail_mmc = MMC_VDD_32_33 | MMC_VDD_33_34 | 904659c9bc1SBen Hutchings MMC_VDD_29_30 | MMC_VDD_30_31; /* no 1.8V for MMC */ 905659c9bc1SBen Hutchings } 906659c9bc1SBen Hutchings 907659c9bc1SBen Hutchings /* 908659c9bc1SBen Hutchings * The secondary interface requires a bit set to get the 909659c9bc1SBen Hutchings * interrupts. 910659c9bc1SBen Hutchings */ 911659c9bc1SBen Hutchings if (slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC || 912659c9bc1SBen Hutchings slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD) 913659c9bc1SBen Hutchings jmicron_enable_mmc(slot->host, 1); 914659c9bc1SBen Hutchings 915659c9bc1SBen Hutchings slot->host->mmc->caps |= MMC_CAP_BUS_WIDTH_TEST; 916659c9bc1SBen Hutchings 917659c9bc1SBen Hutchings return 0; 918659c9bc1SBen Hutchings } 919659c9bc1SBen Hutchings 920659c9bc1SBen Hutchings static void jmicron_remove_slot(struct sdhci_pci_slot *slot, int dead) 921659c9bc1SBen Hutchings { 922659c9bc1SBen Hutchings if (dead) 923659c9bc1SBen Hutchings return; 924659c9bc1SBen Hutchings 925659c9bc1SBen Hutchings if (slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC || 926659c9bc1SBen Hutchings slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD) 927659c9bc1SBen Hutchings jmicron_enable_mmc(slot->host, 0); 928659c9bc1SBen Hutchings } 929659c9bc1SBen Hutchings 930b7813f0fSAdrian Hunter #ifdef CONFIG_PM_SLEEP 931659c9bc1SBen Hutchings static int jmicron_suspend(struct sdhci_pci_chip *chip) 932659c9bc1SBen Hutchings { 93330cf2803SAdrian Hunter int i, ret; 93430cf2803SAdrian Hunter 93530cf2803SAdrian Hunter ret = __sdhci_pci_suspend_host(chip); 93630cf2803SAdrian Hunter if (ret) 93730cf2803SAdrian Hunter return ret; 938659c9bc1SBen Hutchings 939659c9bc1SBen Hutchings if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC || 940659c9bc1SBen Hutchings chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD) { 941659c9bc1SBen Hutchings for (i = 0; i < chip->num_slots; i++) 942659c9bc1SBen Hutchings jmicron_enable_mmc(chip->slots[i]->host, 0); 943659c9bc1SBen Hutchings } 944659c9bc1SBen Hutchings 94530cf2803SAdrian Hunter sdhci_pci_init_wakeup(chip); 94630cf2803SAdrian Hunter 947659c9bc1SBen Hutchings return 0; 948659c9bc1SBen Hutchings } 949659c9bc1SBen Hutchings 950659c9bc1SBen Hutchings static int jmicron_resume(struct sdhci_pci_chip *chip) 951659c9bc1SBen Hutchings { 952659c9bc1SBen Hutchings int ret, i; 953659c9bc1SBen Hutchings 954659c9bc1SBen Hutchings if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC || 955659c9bc1SBen Hutchings chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD) { 956659c9bc1SBen Hutchings for (i = 0; i < chip->num_slots; i++) 957659c9bc1SBen Hutchings jmicron_enable_mmc(chip->slots[i]->host, 1); 958659c9bc1SBen Hutchings } 959659c9bc1SBen Hutchings 960659c9bc1SBen Hutchings ret = jmicron_pmos(chip, 1); 961659c9bc1SBen Hutchings if (ret) { 962659c9bc1SBen Hutchings dev_err(&chip->pdev->dev, "Failure enabling card power\n"); 963659c9bc1SBen Hutchings return ret; 964659c9bc1SBen Hutchings } 965659c9bc1SBen Hutchings 96630cf2803SAdrian Hunter return sdhci_pci_resume_host(chip); 967659c9bc1SBen Hutchings } 968b7813f0fSAdrian Hunter #endif 969659c9bc1SBen Hutchings 970659c9bc1SBen Hutchings static const struct sdhci_pci_fixes sdhci_o2 = { 971659c9bc1SBen Hutchings .probe = sdhci_pci_o2_probe, 972659c9bc1SBen Hutchings .quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC, 973659c9bc1SBen Hutchings .quirks2 = SDHCI_QUIRK2_CLEAR_TRANSFERMODE_REG_BEFORE_CMD, 974659c9bc1SBen Hutchings .probe_slot = sdhci_pci_o2_probe_slot, 975b7813f0fSAdrian Hunter #ifdef CONFIG_PM_SLEEP 976659c9bc1SBen Hutchings .resume = sdhci_pci_o2_resume, 977b7813f0fSAdrian Hunter #endif 978659c9bc1SBen Hutchings }; 979659c9bc1SBen Hutchings 980659c9bc1SBen Hutchings static const struct sdhci_pci_fixes sdhci_jmicron = { 981659c9bc1SBen Hutchings .probe = jmicron_probe, 982659c9bc1SBen Hutchings 983659c9bc1SBen Hutchings .probe_slot = jmicron_probe_slot, 984659c9bc1SBen Hutchings .remove_slot = jmicron_remove_slot, 985659c9bc1SBen Hutchings 986b7813f0fSAdrian Hunter #ifdef CONFIG_PM_SLEEP 987659c9bc1SBen Hutchings .suspend = jmicron_suspend, 988659c9bc1SBen Hutchings .resume = jmicron_resume, 989b7813f0fSAdrian Hunter #endif 990659c9bc1SBen Hutchings }; 991659c9bc1SBen Hutchings 992659c9bc1SBen Hutchings /* SysKonnect CardBus2SDIO extra registers */ 993659c9bc1SBen Hutchings #define SYSKT_CTRL 0x200 994659c9bc1SBen Hutchings #define SYSKT_RDFIFO_STAT 0x204 995659c9bc1SBen Hutchings #define SYSKT_WRFIFO_STAT 0x208 996659c9bc1SBen Hutchings #define SYSKT_POWER_DATA 0x20c 997659c9bc1SBen Hutchings #define SYSKT_POWER_330 0xef 998659c9bc1SBen Hutchings #define SYSKT_POWER_300 0xf8 999659c9bc1SBen Hutchings #define SYSKT_POWER_184 0xcc 1000659c9bc1SBen Hutchings #define SYSKT_POWER_CMD 0x20d 1001659c9bc1SBen Hutchings #define SYSKT_POWER_START (1 << 7) 1002659c9bc1SBen Hutchings #define SYSKT_POWER_STATUS 0x20e 1003659c9bc1SBen Hutchings #define SYSKT_POWER_STATUS_OK (1 << 0) 1004659c9bc1SBen Hutchings #define SYSKT_BOARD_REV 0x210 1005659c9bc1SBen Hutchings #define SYSKT_CHIP_REV 0x211 1006659c9bc1SBen Hutchings #define SYSKT_CONF_DATA 0x212 1007659c9bc1SBen Hutchings #define SYSKT_CONF_DATA_1V8 (1 << 2) 1008659c9bc1SBen Hutchings #define SYSKT_CONF_DATA_2V5 (1 << 1) 1009659c9bc1SBen Hutchings #define SYSKT_CONF_DATA_3V3 (1 << 0) 1010659c9bc1SBen Hutchings 1011659c9bc1SBen Hutchings static int syskt_probe(struct sdhci_pci_chip *chip) 1012659c9bc1SBen Hutchings { 1013659c9bc1SBen Hutchings if ((chip->pdev->class & 0x0000FF) == PCI_SDHCI_IFVENDOR) { 1014659c9bc1SBen Hutchings chip->pdev->class &= ~0x0000FF; 1015659c9bc1SBen Hutchings chip->pdev->class |= PCI_SDHCI_IFDMA; 1016659c9bc1SBen Hutchings } 1017659c9bc1SBen Hutchings return 0; 1018659c9bc1SBen Hutchings } 1019659c9bc1SBen Hutchings 1020659c9bc1SBen Hutchings static int syskt_probe_slot(struct sdhci_pci_slot *slot) 1021659c9bc1SBen Hutchings { 1022659c9bc1SBen Hutchings int tm, ps; 1023659c9bc1SBen Hutchings 1024659c9bc1SBen Hutchings u8 board_rev = readb(slot->host->ioaddr + SYSKT_BOARD_REV); 1025659c9bc1SBen Hutchings u8 chip_rev = readb(slot->host->ioaddr + SYSKT_CHIP_REV); 1026659c9bc1SBen Hutchings dev_info(&slot->chip->pdev->dev, "SysKonnect CardBus2SDIO, " 1027659c9bc1SBen Hutchings "board rev %d.%d, chip rev %d.%d\n", 1028659c9bc1SBen Hutchings board_rev >> 4, board_rev & 0xf, 1029659c9bc1SBen Hutchings chip_rev >> 4, chip_rev & 0xf); 1030659c9bc1SBen Hutchings if (chip_rev >= 0x20) 1031659c9bc1SBen Hutchings slot->host->quirks |= SDHCI_QUIRK_FORCE_DMA; 1032659c9bc1SBen Hutchings 1033659c9bc1SBen Hutchings writeb(SYSKT_POWER_330, slot->host->ioaddr + SYSKT_POWER_DATA); 1034659c9bc1SBen Hutchings writeb(SYSKT_POWER_START, slot->host->ioaddr + SYSKT_POWER_CMD); 1035659c9bc1SBen Hutchings udelay(50); 1036659c9bc1SBen Hutchings tm = 10; /* Wait max 1 ms */ 1037659c9bc1SBen Hutchings do { 1038659c9bc1SBen Hutchings ps = readw(slot->host->ioaddr + SYSKT_POWER_STATUS); 1039659c9bc1SBen Hutchings if (ps & SYSKT_POWER_STATUS_OK) 1040659c9bc1SBen Hutchings break; 1041659c9bc1SBen Hutchings udelay(100); 1042659c9bc1SBen Hutchings } while (--tm); 1043659c9bc1SBen Hutchings if (!tm) { 1044659c9bc1SBen Hutchings dev_err(&slot->chip->pdev->dev, 1045659c9bc1SBen Hutchings "power regulator never stabilized"); 1046659c9bc1SBen Hutchings writeb(0, slot->host->ioaddr + SYSKT_POWER_CMD); 1047659c9bc1SBen Hutchings return -ENODEV; 1048659c9bc1SBen Hutchings } 1049659c9bc1SBen Hutchings 1050659c9bc1SBen Hutchings return 0; 1051659c9bc1SBen Hutchings } 1052659c9bc1SBen Hutchings 1053659c9bc1SBen Hutchings static const struct sdhci_pci_fixes sdhci_syskt = { 1054659c9bc1SBen Hutchings .quirks = SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER, 1055659c9bc1SBen Hutchings .probe = syskt_probe, 1056659c9bc1SBen Hutchings .probe_slot = syskt_probe_slot, 1057659c9bc1SBen Hutchings }; 1058659c9bc1SBen Hutchings 1059659c9bc1SBen Hutchings static int via_probe(struct sdhci_pci_chip *chip) 1060659c9bc1SBen Hutchings { 1061659c9bc1SBen Hutchings if (chip->pdev->revision == 0x10) 1062659c9bc1SBen Hutchings chip->quirks |= SDHCI_QUIRK_DELAY_AFTER_POWER; 1063659c9bc1SBen Hutchings 1064659c9bc1SBen Hutchings return 0; 1065659c9bc1SBen Hutchings } 1066659c9bc1SBen Hutchings 1067659c9bc1SBen Hutchings static const struct sdhci_pci_fixes sdhci_via = { 1068659c9bc1SBen Hutchings .probe = via_probe, 1069659c9bc1SBen Hutchings }; 1070659c9bc1SBen Hutchings 1071659c9bc1SBen Hutchings static int rtsx_probe_slot(struct sdhci_pci_slot *slot) 1072659c9bc1SBen Hutchings { 1073659c9bc1SBen Hutchings slot->host->mmc->caps2 |= MMC_CAP2_HS200; 1074659c9bc1SBen Hutchings return 0; 1075659c9bc1SBen Hutchings } 1076659c9bc1SBen Hutchings 1077659c9bc1SBen Hutchings static const struct sdhci_pci_fixes sdhci_rtsx = { 1078659c9bc1SBen Hutchings .quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN | 1079659c9bc1SBen Hutchings SDHCI_QUIRK2_BROKEN_64_BIT_DMA | 1080659c9bc1SBen Hutchings SDHCI_QUIRK2_BROKEN_DDR50, 1081659c9bc1SBen Hutchings .probe_slot = rtsx_probe_slot, 1082659c9bc1SBen Hutchings }; 1083659c9bc1SBen Hutchings 1084659c9bc1SBen Hutchings /*AMD chipset generation*/ 1085659c9bc1SBen Hutchings enum amd_chipset_gen { 1086659c9bc1SBen Hutchings AMD_CHIPSET_BEFORE_ML, 1087659c9bc1SBen Hutchings AMD_CHIPSET_CZ, 1088659c9bc1SBen Hutchings AMD_CHIPSET_NL, 1089659c9bc1SBen Hutchings AMD_CHIPSET_UNKNOWN, 1090659c9bc1SBen Hutchings }; 1091659c9bc1SBen Hutchings 1092c31165d7SShyam Sundar S K /* AMD registers */ 1093c31165d7SShyam Sundar S K #define AMD_SD_AUTO_PATTERN 0xB8 1094c31165d7SShyam Sundar S K #define AMD_MSLEEP_DURATION 4 1095c31165d7SShyam Sundar S K #define AMD_SD_MISC_CONTROL 0xD0 1096c31165d7SShyam Sundar S K #define AMD_MAX_TUNE_VALUE 0x0B 1097c31165d7SShyam Sundar S K #define AMD_AUTO_TUNE_SEL 0x10800 1098c31165d7SShyam Sundar S K #define AMD_FIFO_PTR 0x30 1099c31165d7SShyam Sundar S K #define AMD_BIT_MASK 0x1F 1100c31165d7SShyam Sundar S K 1101c31165d7SShyam Sundar S K static void amd_tuning_reset(struct sdhci_host *host) 1102c31165d7SShyam Sundar S K { 1103c31165d7SShyam Sundar S K unsigned int val; 1104c31165d7SShyam Sundar S K 1105c31165d7SShyam Sundar S K val = sdhci_readw(host, SDHCI_HOST_CONTROL2); 1106c31165d7SShyam Sundar S K val |= SDHCI_CTRL_PRESET_VAL_ENABLE | SDHCI_CTRL_EXEC_TUNING; 1107c31165d7SShyam Sundar S K sdhci_writew(host, val, SDHCI_HOST_CONTROL2); 1108c31165d7SShyam Sundar S K 1109c31165d7SShyam Sundar S K val = sdhci_readw(host, SDHCI_HOST_CONTROL2); 1110c31165d7SShyam Sundar S K val &= ~SDHCI_CTRL_EXEC_TUNING; 1111c31165d7SShyam Sundar S K sdhci_writew(host, val, SDHCI_HOST_CONTROL2); 1112c31165d7SShyam Sundar S K } 1113c31165d7SShyam Sundar S K 1114c31165d7SShyam Sundar S K static void amd_config_tuning_phase(struct pci_dev *pdev, u8 phase) 1115c31165d7SShyam Sundar S K { 1116c31165d7SShyam Sundar S K unsigned int val; 1117c31165d7SShyam Sundar S K 1118c31165d7SShyam Sundar S K pci_read_config_dword(pdev, AMD_SD_AUTO_PATTERN, &val); 1119c31165d7SShyam Sundar S K val &= ~AMD_BIT_MASK; 1120c31165d7SShyam Sundar S K val |= (AMD_AUTO_TUNE_SEL | (phase << 1)); 1121c31165d7SShyam Sundar S K pci_write_config_dword(pdev, AMD_SD_AUTO_PATTERN, val); 1122c31165d7SShyam Sundar S K } 1123c31165d7SShyam Sundar S K 1124c31165d7SShyam Sundar S K static void amd_enable_manual_tuning(struct pci_dev *pdev) 1125c31165d7SShyam Sundar S K { 1126c31165d7SShyam Sundar S K unsigned int val; 1127c31165d7SShyam Sundar S K 1128c31165d7SShyam Sundar S K pci_read_config_dword(pdev, AMD_SD_MISC_CONTROL, &val); 1129c31165d7SShyam Sundar S K val |= AMD_FIFO_PTR; 1130c31165d7SShyam Sundar S K pci_write_config_dword(pdev, AMD_SD_MISC_CONTROL, val); 1131c31165d7SShyam Sundar S K } 1132c31165d7SShyam Sundar S K 1133c31165d7SShyam Sundar S K static int amd_execute_tuning(struct sdhci_host *host, u32 opcode) 1134c31165d7SShyam Sundar S K { 1135c31165d7SShyam Sundar S K struct sdhci_pci_slot *slot = sdhci_priv(host); 1136c31165d7SShyam Sundar S K struct pci_dev *pdev = slot->chip->pdev; 1137c31165d7SShyam Sundar S K u8 valid_win = 0; 1138c31165d7SShyam Sundar S K u8 valid_win_max = 0; 1139c31165d7SShyam Sundar S K u8 valid_win_end = 0; 1140c31165d7SShyam Sundar S K u8 ctrl, tune_around; 1141c31165d7SShyam Sundar S K 1142c31165d7SShyam Sundar S K amd_tuning_reset(host); 1143c31165d7SShyam Sundar S K 1144c31165d7SShyam Sundar S K for (tune_around = 0; tune_around < 12; tune_around++) { 1145c31165d7SShyam Sundar S K amd_config_tuning_phase(pdev, tune_around); 1146c31165d7SShyam Sundar S K 1147c31165d7SShyam Sundar S K if (mmc_send_tuning(host->mmc, opcode, NULL)) { 1148c31165d7SShyam Sundar S K valid_win = 0; 1149c31165d7SShyam Sundar S K msleep(AMD_MSLEEP_DURATION); 1150c31165d7SShyam Sundar S K ctrl = SDHCI_RESET_CMD | SDHCI_RESET_DATA; 1151c31165d7SShyam Sundar S K sdhci_writeb(host, ctrl, SDHCI_SOFTWARE_RESET); 1152c31165d7SShyam Sundar S K } else if (++valid_win > valid_win_max) { 1153c31165d7SShyam Sundar S K valid_win_max = valid_win; 1154c31165d7SShyam Sundar S K valid_win_end = tune_around; 1155c31165d7SShyam Sundar S K } 1156c31165d7SShyam Sundar S K } 1157c31165d7SShyam Sundar S K 1158c31165d7SShyam Sundar S K if (!valid_win_max) { 1159c31165d7SShyam Sundar S K dev_err(&pdev->dev, "no tuning point found\n"); 1160c31165d7SShyam Sundar S K return -EIO; 1161c31165d7SShyam Sundar S K } 1162c31165d7SShyam Sundar S K 1163c31165d7SShyam Sundar S K amd_config_tuning_phase(pdev, valid_win_end - valid_win_max / 2); 1164c31165d7SShyam Sundar S K 1165c31165d7SShyam Sundar S K amd_enable_manual_tuning(pdev); 1166c31165d7SShyam Sundar S K 1167c31165d7SShyam Sundar S K host->mmc->retune_period = 0; 1168c31165d7SShyam Sundar S K 1169c31165d7SShyam Sundar S K return 0; 1170c31165d7SShyam Sundar S K } 1171c31165d7SShyam Sundar S K 1172659c9bc1SBen Hutchings static int amd_probe(struct sdhci_pci_chip *chip) 1173659c9bc1SBen Hutchings { 1174659c9bc1SBen Hutchings struct pci_dev *smbus_dev; 1175659c9bc1SBen Hutchings enum amd_chipset_gen gen; 1176659c9bc1SBen Hutchings 1177659c9bc1SBen Hutchings smbus_dev = pci_get_device(PCI_VENDOR_ID_AMD, 1178659c9bc1SBen Hutchings PCI_DEVICE_ID_AMD_HUDSON2_SMBUS, NULL); 1179659c9bc1SBen Hutchings if (smbus_dev) { 1180659c9bc1SBen Hutchings gen = AMD_CHIPSET_BEFORE_ML; 1181659c9bc1SBen Hutchings } else { 1182659c9bc1SBen Hutchings smbus_dev = pci_get_device(PCI_VENDOR_ID_AMD, 1183659c9bc1SBen Hutchings PCI_DEVICE_ID_AMD_KERNCZ_SMBUS, NULL); 1184659c9bc1SBen Hutchings if (smbus_dev) { 1185659c9bc1SBen Hutchings if (smbus_dev->revision < 0x51) 1186659c9bc1SBen Hutchings gen = AMD_CHIPSET_CZ; 1187659c9bc1SBen Hutchings else 1188659c9bc1SBen Hutchings gen = AMD_CHIPSET_NL; 1189659c9bc1SBen Hutchings } else { 1190659c9bc1SBen Hutchings gen = AMD_CHIPSET_UNKNOWN; 1191659c9bc1SBen Hutchings } 1192659c9bc1SBen Hutchings } 1193659c9bc1SBen Hutchings 1194c31165d7SShyam Sundar S K if (gen == AMD_CHIPSET_BEFORE_ML || gen == AMD_CHIPSET_CZ) 1195659c9bc1SBen Hutchings chip->quirks2 |= SDHCI_QUIRK2_CLEAR_TRANSFERMODE_REG_BEFORE_CMD; 1196659c9bc1SBen Hutchings 1197659c9bc1SBen Hutchings return 0; 1198659c9bc1SBen Hutchings } 1199659c9bc1SBen Hutchings 1200c31165d7SShyam Sundar S K static const struct sdhci_ops amd_sdhci_pci_ops = { 1201c31165d7SShyam Sundar S K .set_clock = sdhci_set_clock, 1202c31165d7SShyam Sundar S K .enable_dma = sdhci_pci_enable_dma, 1203c31165d7SShyam Sundar S K .set_bus_width = sdhci_pci_set_bus_width, 1204c31165d7SShyam Sundar S K .reset = sdhci_reset, 1205c31165d7SShyam Sundar S K .set_uhs_signaling = sdhci_set_uhs_signaling, 1206c31165d7SShyam Sundar S K .platform_execute_tuning = amd_execute_tuning, 1207c31165d7SShyam Sundar S K }; 1208c31165d7SShyam Sundar S K 1209659c9bc1SBen Hutchings static const struct sdhci_pci_fixes sdhci_amd = { 1210659c9bc1SBen Hutchings .probe = amd_probe, 1211c31165d7SShyam Sundar S K .ops = &amd_sdhci_pci_ops, 1212659c9bc1SBen Hutchings }; 1213659c9bc1SBen Hutchings 1214659c9bc1SBen Hutchings static const struct pci_device_id pci_ids[] = { 1215c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(RICOH, R5C822, ricoh), 1216c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(RICOH, R5C843, ricoh_mmc), 1217c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(RICOH, R5CE822, ricoh_mmc), 1218c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(RICOH, R5CE823, ricoh_mmc), 1219c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(ENE, CB712_SD, ene_712), 1220c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(ENE, CB712_SD_2, ene_712), 1221c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(ENE, CB714_SD, ene_714), 1222c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(ENE, CB714_SD_2, ene_714), 1223c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(MARVELL, 88ALP01_SD, cafe), 1224c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(JMICRON, JMB38X_SD, jmicron), 1225c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(JMICRON, JMB38X_MMC, jmicron), 1226c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(JMICRON, JMB388_SD, jmicron), 1227c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(JMICRON, JMB388_ESD, jmicron), 1228c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(SYSKONNECT, 8000, syskt), 1229c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(VIA, 95D0, via), 1230c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(REALTEK, 5250, rtsx), 1231c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, QRK_SD, intel_qrk), 1232c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, MRST_SD0, intel_mrst_hc0), 1233c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, MRST_SD1, intel_mrst_hc1_hc2), 1234c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, MRST_SD2, intel_mrst_hc1_hc2), 1235c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, MFD_SD, intel_mfd_sd), 1236c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, MFD_SDIO1, intel_mfd_sdio), 1237c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, MFD_SDIO2, intel_mfd_sdio), 1238c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, MFD_EMMC0, intel_mfd_emmc), 1239c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, MFD_EMMC1, intel_mfd_emmc), 1240c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, PCH_SDIO0, intel_pch_sdio), 1241c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, PCH_SDIO1, intel_pch_sdio), 1242c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, BYT_EMMC, intel_byt_emmc), 1243c949c907SMatthias Kraemer SDHCI_PCI_SUBDEVICE(INTEL, BYT_SDIO, NI, 7884, ni_byt_sdio), 1244c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, BYT_SDIO, intel_byt_sdio), 1245c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, BYT_SD, intel_byt_sd), 1246c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, BYT_EMMC2, intel_byt_emmc), 1247c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, BSW_EMMC, intel_byt_emmc), 1248c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, BSW_SDIO, intel_byt_sdio), 1249c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, BSW_SD, intel_byt_sd), 1250c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, CLV_SDIO0, intel_mfd_sd), 1251c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, CLV_SDIO1, intel_mfd_sdio), 1252c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, CLV_SDIO2, intel_mfd_sdio), 1253c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, CLV_EMMC0, intel_mfd_emmc), 1254c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, CLV_EMMC1, intel_mfd_emmc), 1255c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, MRFLD_MMC, intel_mrfld_mmc), 1256c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, SPT_EMMC, intel_byt_emmc), 1257c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, SPT_SDIO, intel_byt_sdio), 1258c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, SPT_SD, intel_byt_sd), 1259c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, DNV_EMMC, intel_byt_emmc), 1260c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, BXT_EMMC, intel_byt_emmc), 1261c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, BXT_SDIO, intel_byt_sdio), 1262c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, BXT_SD, intel_byt_sd), 1263c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, BXTM_EMMC, intel_byt_emmc), 1264c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, BXTM_SDIO, intel_byt_sdio), 1265c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, BXTM_SD, intel_byt_sd), 1266c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, APL_EMMC, intel_byt_emmc), 1267c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, APL_SDIO, intel_byt_sdio), 1268c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, APL_SD, intel_byt_sd), 1269bc55dcd8SAdrian Hunter SDHCI_PCI_DEVICE(INTEL, GLK_EMMC, intel_glk_emmc), 1270c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, GLK_SDIO, intel_byt_sdio), 1271c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, GLK_SD, intel_byt_sd), 1272bc55dcd8SAdrian Hunter SDHCI_PCI_DEVICE(INTEL, CNP_EMMC, intel_glk_emmc), 1273bc55dcd8SAdrian Hunter SDHCI_PCI_DEVICE(INTEL, CNP_SD, intel_byt_sd), 1274bc55dcd8SAdrian Hunter SDHCI_PCI_DEVICE(INTEL, CNPH_SD, intel_byt_sd), 1275c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(O2, 8120, o2), 1276c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(O2, 8220, o2), 1277c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(O2, 8221, o2), 1278c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(O2, 8320, o2), 1279c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(O2, 8321, o2), 1280c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(O2, FUJIN2, o2), 1281c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(O2, SDS0, o2), 1282c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(O2, SDS1, o2), 1283c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(O2, SEABIRD0, o2), 1284c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(O2, SEABIRD1, o2), 1285c949c907SMatthias Kraemer SDHCI_PCI_DEVICE_CLASS(AMD, SYSTEM_SDHCI, PCI_CLASS_MASK, amd), 1286c949c907SMatthias Kraemer /* Generic SD host controller */ 1287c949c907SMatthias Kraemer {PCI_DEVICE_CLASS(SYSTEM_SDHCI, PCI_CLASS_MASK)}, 1288659c9bc1SBen Hutchings { /* end: all zeroes */ }, 1289659c9bc1SBen Hutchings }; 1290659c9bc1SBen Hutchings 1291659c9bc1SBen Hutchings MODULE_DEVICE_TABLE(pci, pci_ids); 1292659c9bc1SBen Hutchings 1293659c9bc1SBen Hutchings /*****************************************************************************\ 1294659c9bc1SBen Hutchings * * 1295659c9bc1SBen Hutchings * SDHCI core callbacks * 1296659c9bc1SBen Hutchings * * 1297659c9bc1SBen Hutchings \*****************************************************************************/ 1298659c9bc1SBen Hutchings 1299659c9bc1SBen Hutchings static int sdhci_pci_enable_dma(struct sdhci_host *host) 1300659c9bc1SBen Hutchings { 1301659c9bc1SBen Hutchings struct sdhci_pci_slot *slot; 1302659c9bc1SBen Hutchings struct pci_dev *pdev; 1303659c9bc1SBen Hutchings 1304659c9bc1SBen Hutchings slot = sdhci_priv(host); 1305659c9bc1SBen Hutchings pdev = slot->chip->pdev; 1306659c9bc1SBen Hutchings 1307659c9bc1SBen Hutchings if (((pdev->class & 0xFFFF00) == (PCI_CLASS_SYSTEM_SDHCI << 8)) && 1308659c9bc1SBen Hutchings ((pdev->class & 0x0000FF) != PCI_SDHCI_IFDMA) && 1309659c9bc1SBen Hutchings (host->flags & SDHCI_USE_SDMA)) { 1310659c9bc1SBen Hutchings dev_warn(&pdev->dev, "Will use DMA mode even though HW " 1311659c9bc1SBen Hutchings "doesn't fully claim to support it.\n"); 1312659c9bc1SBen Hutchings } 1313659c9bc1SBen Hutchings 1314659c9bc1SBen Hutchings pci_set_master(pdev); 1315659c9bc1SBen Hutchings 1316659c9bc1SBen Hutchings return 0; 1317659c9bc1SBen Hutchings } 1318659c9bc1SBen Hutchings 1319659c9bc1SBen Hutchings static void sdhci_pci_set_bus_width(struct sdhci_host *host, int width) 1320659c9bc1SBen Hutchings { 1321659c9bc1SBen Hutchings u8 ctrl; 1322659c9bc1SBen Hutchings 1323659c9bc1SBen Hutchings ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL); 1324659c9bc1SBen Hutchings 1325659c9bc1SBen Hutchings switch (width) { 1326659c9bc1SBen Hutchings case MMC_BUS_WIDTH_8: 1327659c9bc1SBen Hutchings ctrl |= SDHCI_CTRL_8BITBUS; 1328659c9bc1SBen Hutchings ctrl &= ~SDHCI_CTRL_4BITBUS; 1329659c9bc1SBen Hutchings break; 1330659c9bc1SBen Hutchings case MMC_BUS_WIDTH_4: 1331659c9bc1SBen Hutchings ctrl |= SDHCI_CTRL_4BITBUS; 1332659c9bc1SBen Hutchings ctrl &= ~SDHCI_CTRL_8BITBUS; 1333659c9bc1SBen Hutchings break; 1334659c9bc1SBen Hutchings default: 1335659c9bc1SBen Hutchings ctrl &= ~(SDHCI_CTRL_8BITBUS | SDHCI_CTRL_4BITBUS); 1336659c9bc1SBen Hutchings break; 1337659c9bc1SBen Hutchings } 1338659c9bc1SBen Hutchings 1339659c9bc1SBen Hutchings sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL); 1340659c9bc1SBen Hutchings } 1341659c9bc1SBen Hutchings 1342659c9bc1SBen Hutchings static void sdhci_pci_gpio_hw_reset(struct sdhci_host *host) 1343659c9bc1SBen Hutchings { 1344659c9bc1SBen Hutchings struct sdhci_pci_slot *slot = sdhci_priv(host); 1345659c9bc1SBen Hutchings int rst_n_gpio = slot->rst_n_gpio; 1346659c9bc1SBen Hutchings 1347659c9bc1SBen Hutchings if (!gpio_is_valid(rst_n_gpio)) 1348659c9bc1SBen Hutchings return; 1349659c9bc1SBen Hutchings gpio_set_value_cansleep(rst_n_gpio, 0); 1350659c9bc1SBen Hutchings /* For eMMC, minimum is 1us but give it 10us for good measure */ 1351659c9bc1SBen Hutchings udelay(10); 1352659c9bc1SBen Hutchings gpio_set_value_cansleep(rst_n_gpio, 1); 1353659c9bc1SBen Hutchings /* For eMMC, minimum is 200us but give it 300us for good measure */ 1354659c9bc1SBen Hutchings usleep_range(300, 1000); 1355659c9bc1SBen Hutchings } 1356659c9bc1SBen Hutchings 1357659c9bc1SBen Hutchings static void sdhci_pci_hw_reset(struct sdhci_host *host) 1358659c9bc1SBen Hutchings { 1359659c9bc1SBen Hutchings struct sdhci_pci_slot *slot = sdhci_priv(host); 1360659c9bc1SBen Hutchings 1361659c9bc1SBen Hutchings if (slot->hw_reset) 1362659c9bc1SBen Hutchings slot->hw_reset(host); 1363659c9bc1SBen Hutchings } 1364659c9bc1SBen Hutchings 1365659c9bc1SBen Hutchings static const struct sdhci_ops sdhci_pci_ops = { 1366659c9bc1SBen Hutchings .set_clock = sdhci_set_clock, 1367659c9bc1SBen Hutchings .enable_dma = sdhci_pci_enable_dma, 1368659c9bc1SBen Hutchings .set_bus_width = sdhci_pci_set_bus_width, 1369659c9bc1SBen Hutchings .reset = sdhci_reset, 1370659c9bc1SBen Hutchings .set_uhs_signaling = sdhci_set_uhs_signaling, 1371659c9bc1SBen Hutchings .hw_reset = sdhci_pci_hw_reset, 1372659c9bc1SBen Hutchings }; 1373659c9bc1SBen Hutchings 1374659c9bc1SBen Hutchings /*****************************************************************************\ 1375659c9bc1SBen Hutchings * * 1376659c9bc1SBen Hutchings * Suspend/resume * 1377659c9bc1SBen Hutchings * * 1378659c9bc1SBen Hutchings \*****************************************************************************/ 1379659c9bc1SBen Hutchings 1380f9900f15SUlf Hansson #ifdef CONFIG_PM_SLEEP 1381659c9bc1SBen Hutchings static int sdhci_pci_suspend(struct device *dev) 1382659c9bc1SBen Hutchings { 1383659c9bc1SBen Hutchings struct pci_dev *pdev = to_pci_dev(dev); 138430cf2803SAdrian Hunter struct sdhci_pci_chip *chip = pci_get_drvdata(pdev); 1385659c9bc1SBen Hutchings 1386659c9bc1SBen Hutchings if (!chip) 1387659c9bc1SBen Hutchings return 0; 1388659c9bc1SBen Hutchings 138930cf2803SAdrian Hunter if (chip->fixes && chip->fixes->suspend) 139030cf2803SAdrian Hunter return chip->fixes->suspend(chip); 1391659c9bc1SBen Hutchings 139230cf2803SAdrian Hunter return sdhci_pci_suspend_host(chip); 1393659c9bc1SBen Hutchings } 1394659c9bc1SBen Hutchings 1395659c9bc1SBen Hutchings static int sdhci_pci_resume(struct device *dev) 1396659c9bc1SBen Hutchings { 1397659c9bc1SBen Hutchings struct pci_dev *pdev = to_pci_dev(dev); 139830cf2803SAdrian Hunter struct sdhci_pci_chip *chip = pci_get_drvdata(pdev); 1399659c9bc1SBen Hutchings 1400659c9bc1SBen Hutchings if (!chip) 1401659c9bc1SBen Hutchings return 0; 1402659c9bc1SBen Hutchings 140330cf2803SAdrian Hunter if (chip->fixes && chip->fixes->resume) 140430cf2803SAdrian Hunter return chip->fixes->resume(chip); 1405659c9bc1SBen Hutchings 140630cf2803SAdrian Hunter return sdhci_pci_resume_host(chip); 1407659c9bc1SBen Hutchings } 1408f9900f15SUlf Hansson #endif 1409659c9bc1SBen Hutchings 1410f9900f15SUlf Hansson #ifdef CONFIG_PM 1411659c9bc1SBen Hutchings static int sdhci_pci_runtime_suspend(struct device *dev) 1412659c9bc1SBen Hutchings { 1413923a231cSGeliang Tang struct pci_dev *pdev = to_pci_dev(dev); 1414966d696aSAdrian Hunter struct sdhci_pci_chip *chip = pci_get_drvdata(pdev); 1415659c9bc1SBen Hutchings 1416659c9bc1SBen Hutchings if (!chip) 1417659c9bc1SBen Hutchings return 0; 1418659c9bc1SBen Hutchings 1419966d696aSAdrian Hunter if (chip->fixes && chip->fixes->runtime_suspend) 1420966d696aSAdrian Hunter return chip->fixes->runtime_suspend(chip); 1421659c9bc1SBen Hutchings 1422966d696aSAdrian Hunter return sdhci_pci_runtime_suspend_host(chip); 1423659c9bc1SBen Hutchings } 1424659c9bc1SBen Hutchings 1425659c9bc1SBen Hutchings static int sdhci_pci_runtime_resume(struct device *dev) 1426659c9bc1SBen Hutchings { 1427923a231cSGeliang Tang struct pci_dev *pdev = to_pci_dev(dev); 1428966d696aSAdrian Hunter struct sdhci_pci_chip *chip = pci_get_drvdata(pdev); 1429659c9bc1SBen Hutchings 1430659c9bc1SBen Hutchings if (!chip) 1431659c9bc1SBen Hutchings return 0; 1432659c9bc1SBen Hutchings 1433966d696aSAdrian Hunter if (chip->fixes && chip->fixes->runtime_resume) 1434966d696aSAdrian Hunter return chip->fixes->runtime_resume(chip); 1435659c9bc1SBen Hutchings 1436966d696aSAdrian Hunter return sdhci_pci_runtime_resume_host(chip); 1437659c9bc1SBen Hutchings } 1438f9900f15SUlf Hansson #endif 1439659c9bc1SBen Hutchings 1440659c9bc1SBen Hutchings static const struct dev_pm_ops sdhci_pci_pm_ops = { 1441f9900f15SUlf Hansson SET_SYSTEM_SLEEP_PM_OPS(sdhci_pci_suspend, sdhci_pci_resume) 1442659c9bc1SBen Hutchings SET_RUNTIME_PM_OPS(sdhci_pci_runtime_suspend, 1443659c9bc1SBen Hutchings sdhci_pci_runtime_resume, NULL) 1444659c9bc1SBen Hutchings }; 1445659c9bc1SBen Hutchings 1446659c9bc1SBen Hutchings /*****************************************************************************\ 1447659c9bc1SBen Hutchings * * 1448659c9bc1SBen Hutchings * Device probing/removal * 1449659c9bc1SBen Hutchings * * 1450659c9bc1SBen Hutchings \*****************************************************************************/ 1451659c9bc1SBen Hutchings 1452659c9bc1SBen Hutchings static struct sdhci_pci_slot *sdhci_pci_probe_slot( 1453659c9bc1SBen Hutchings struct pci_dev *pdev, struct sdhci_pci_chip *chip, int first_bar, 1454659c9bc1SBen Hutchings int slotno) 1455659c9bc1SBen Hutchings { 1456659c9bc1SBen Hutchings struct sdhci_pci_slot *slot; 1457659c9bc1SBen Hutchings struct sdhci_host *host; 1458659c9bc1SBen Hutchings int ret, bar = first_bar + slotno; 1459ac9f67b5SAdrian Hunter size_t priv_size = chip->fixes ? chip->fixes->priv_size : 0; 1460659c9bc1SBen Hutchings 1461659c9bc1SBen Hutchings if (!(pci_resource_flags(pdev, bar) & IORESOURCE_MEM)) { 1462659c9bc1SBen Hutchings dev_err(&pdev->dev, "BAR %d is not iomem. Aborting.\n", bar); 1463659c9bc1SBen Hutchings return ERR_PTR(-ENODEV); 1464659c9bc1SBen Hutchings } 1465659c9bc1SBen Hutchings 1466659c9bc1SBen Hutchings if (pci_resource_len(pdev, bar) < 0x100) { 1467659c9bc1SBen Hutchings dev_err(&pdev->dev, "Invalid iomem size. You may " 1468659c9bc1SBen Hutchings "experience problems.\n"); 1469659c9bc1SBen Hutchings } 1470659c9bc1SBen Hutchings 1471659c9bc1SBen Hutchings if ((pdev->class & 0x0000FF) == PCI_SDHCI_IFVENDOR) { 1472659c9bc1SBen Hutchings dev_err(&pdev->dev, "Vendor specific interface. Aborting.\n"); 1473659c9bc1SBen Hutchings return ERR_PTR(-ENODEV); 1474659c9bc1SBen Hutchings } 1475659c9bc1SBen Hutchings 1476659c9bc1SBen Hutchings if ((pdev->class & 0x0000FF) > PCI_SDHCI_IFVENDOR) { 1477659c9bc1SBen Hutchings dev_err(&pdev->dev, "Unknown interface. Aborting.\n"); 1478659c9bc1SBen Hutchings return ERR_PTR(-ENODEV); 1479659c9bc1SBen Hutchings } 1480659c9bc1SBen Hutchings 1481ac9f67b5SAdrian Hunter host = sdhci_alloc_host(&pdev->dev, sizeof(*slot) + priv_size); 1482659c9bc1SBen Hutchings if (IS_ERR(host)) { 1483659c9bc1SBen Hutchings dev_err(&pdev->dev, "cannot allocate host\n"); 1484659c9bc1SBen Hutchings return ERR_CAST(host); 1485659c9bc1SBen Hutchings } 1486659c9bc1SBen Hutchings 1487659c9bc1SBen Hutchings slot = sdhci_priv(host); 1488659c9bc1SBen Hutchings 1489659c9bc1SBen Hutchings slot->chip = chip; 1490659c9bc1SBen Hutchings slot->host = host; 1491659c9bc1SBen Hutchings slot->rst_n_gpio = -EINVAL; 1492659c9bc1SBen Hutchings slot->cd_gpio = -EINVAL; 1493659c9bc1SBen Hutchings slot->cd_idx = -1; 1494659c9bc1SBen Hutchings 1495659c9bc1SBen Hutchings /* Retrieve platform data if there is any */ 1496659c9bc1SBen Hutchings if (*sdhci_pci_get_data) 1497659c9bc1SBen Hutchings slot->data = sdhci_pci_get_data(pdev, slotno); 1498659c9bc1SBen Hutchings 1499659c9bc1SBen Hutchings if (slot->data) { 1500659c9bc1SBen Hutchings if (slot->data->setup) { 1501659c9bc1SBen Hutchings ret = slot->data->setup(slot->data); 1502659c9bc1SBen Hutchings if (ret) { 1503659c9bc1SBen Hutchings dev_err(&pdev->dev, "platform setup failed\n"); 1504659c9bc1SBen Hutchings goto free; 1505659c9bc1SBen Hutchings } 1506659c9bc1SBen Hutchings } 1507659c9bc1SBen Hutchings slot->rst_n_gpio = slot->data->rst_n_gpio; 1508659c9bc1SBen Hutchings slot->cd_gpio = slot->data->cd_gpio; 1509659c9bc1SBen Hutchings } 1510659c9bc1SBen Hutchings 1511659c9bc1SBen Hutchings host->hw_name = "PCI"; 15126bc09063SAdrian Hunter host->ops = chip->fixes && chip->fixes->ops ? 15136bc09063SAdrian Hunter chip->fixes->ops : 15146bc09063SAdrian Hunter &sdhci_pci_ops; 1515659c9bc1SBen Hutchings host->quirks = chip->quirks; 1516659c9bc1SBen Hutchings host->quirks2 = chip->quirks2; 1517659c9bc1SBen Hutchings 1518659c9bc1SBen Hutchings host->irq = pdev->irq; 1519659c9bc1SBen Hutchings 1520c10bc372SAndy Shevchenko ret = pcim_iomap_regions(pdev, BIT(bar), mmc_hostname(host->mmc)); 1521659c9bc1SBen Hutchings if (ret) { 1522659c9bc1SBen Hutchings dev_err(&pdev->dev, "cannot request region\n"); 1523659c9bc1SBen Hutchings goto cleanup; 1524659c9bc1SBen Hutchings } 1525659c9bc1SBen Hutchings 1526c10bc372SAndy Shevchenko host->ioaddr = pcim_iomap_table(pdev)[bar]; 1527659c9bc1SBen Hutchings 1528659c9bc1SBen Hutchings if (chip->fixes && chip->fixes->probe_slot) { 1529659c9bc1SBen Hutchings ret = chip->fixes->probe_slot(slot); 1530659c9bc1SBen Hutchings if (ret) 1531c10bc372SAndy Shevchenko goto cleanup; 1532659c9bc1SBen Hutchings } 1533659c9bc1SBen Hutchings 1534659c9bc1SBen Hutchings if (gpio_is_valid(slot->rst_n_gpio)) { 1535c10bc372SAndy Shevchenko if (!devm_gpio_request(&pdev->dev, slot->rst_n_gpio, "eMMC_reset")) { 1536659c9bc1SBen Hutchings gpio_direction_output(slot->rst_n_gpio, 1); 1537659c9bc1SBen Hutchings slot->host->mmc->caps |= MMC_CAP_HW_RESET; 1538659c9bc1SBen Hutchings slot->hw_reset = sdhci_pci_gpio_hw_reset; 1539659c9bc1SBen Hutchings } else { 1540659c9bc1SBen Hutchings dev_warn(&pdev->dev, "failed to request rst_n_gpio\n"); 1541659c9bc1SBen Hutchings slot->rst_n_gpio = -EINVAL; 1542659c9bc1SBen Hutchings } 1543659c9bc1SBen Hutchings } 1544659c9bc1SBen Hutchings 1545659c9bc1SBen Hutchings host->mmc->pm_caps = MMC_PM_KEEP_POWER | MMC_PM_WAKE_SDIO_IRQ; 1546659c9bc1SBen Hutchings host->mmc->slotno = slotno; 1547659c9bc1SBen Hutchings host->mmc->caps2 |= MMC_CAP2_NO_PRESCAN_POWERUP; 1548659c9bc1SBen Hutchings 15498f743d03SDavid E. Box if (slot->cd_idx >= 0) { 15506ac9b837SAndy Shevchenko ret = mmc_gpiod_request_cd(host->mmc, NULL, slot->cd_idx, 15518f743d03SDavid E. Box slot->cd_override_level, 0, NULL); 15528f743d03SDavid E. Box if (ret == -EPROBE_DEFER) 15538f743d03SDavid E. Box goto remove; 15548f743d03SDavid E. Box 15558f743d03SDavid E. Box if (ret) { 1556659c9bc1SBen Hutchings dev_warn(&pdev->dev, "failed to setup card detect gpio\n"); 1557659c9bc1SBen Hutchings slot->cd_idx = -1; 1558659c9bc1SBen Hutchings } 15598f743d03SDavid E. Box } 1560659c9bc1SBen Hutchings 156161c951deSAdrian Hunter if (chip->fixes && chip->fixes->add_host) 156261c951deSAdrian Hunter ret = chip->fixes->add_host(slot); 156361c951deSAdrian Hunter else 1564659c9bc1SBen Hutchings ret = sdhci_add_host(host); 1565659c9bc1SBen Hutchings if (ret) 1566659c9bc1SBen Hutchings goto remove; 1567659c9bc1SBen Hutchings 1568659c9bc1SBen Hutchings sdhci_pci_add_own_cd(slot); 1569659c9bc1SBen Hutchings 1570659c9bc1SBen Hutchings /* 1571659c9bc1SBen Hutchings * Check if the chip needs a separate GPIO for card detect to wake up 1572659c9bc1SBen Hutchings * from runtime suspend. If it is not there, don't allow runtime PM. 1573659c9bc1SBen Hutchings * Note sdhci_pci_add_own_cd() sets slot->cd_gpio to -EINVAL on failure. 1574659c9bc1SBen Hutchings */ 1575659c9bc1SBen Hutchings if (chip->fixes && chip->fixes->own_cd_for_runtime_pm && 1576659c9bc1SBen Hutchings !gpio_is_valid(slot->cd_gpio) && slot->cd_idx < 0) 1577659c9bc1SBen Hutchings chip->allow_runtime_pm = false; 1578659c9bc1SBen Hutchings 1579659c9bc1SBen Hutchings return slot; 1580659c9bc1SBen Hutchings 1581659c9bc1SBen Hutchings remove: 1582659c9bc1SBen Hutchings if (chip->fixes && chip->fixes->remove_slot) 1583659c9bc1SBen Hutchings chip->fixes->remove_slot(slot, 0); 1584659c9bc1SBen Hutchings 1585659c9bc1SBen Hutchings cleanup: 1586659c9bc1SBen Hutchings if (slot->data && slot->data->cleanup) 1587659c9bc1SBen Hutchings slot->data->cleanup(slot->data); 1588659c9bc1SBen Hutchings 1589659c9bc1SBen Hutchings free: 1590659c9bc1SBen Hutchings sdhci_free_host(host); 1591659c9bc1SBen Hutchings 1592659c9bc1SBen Hutchings return ERR_PTR(ret); 1593659c9bc1SBen Hutchings } 1594659c9bc1SBen Hutchings 1595659c9bc1SBen Hutchings static void sdhci_pci_remove_slot(struct sdhci_pci_slot *slot) 1596659c9bc1SBen Hutchings { 1597659c9bc1SBen Hutchings int dead; 1598659c9bc1SBen Hutchings u32 scratch; 1599659c9bc1SBen Hutchings 1600659c9bc1SBen Hutchings sdhci_pci_remove_own_cd(slot); 1601659c9bc1SBen Hutchings 1602659c9bc1SBen Hutchings dead = 0; 1603659c9bc1SBen Hutchings scratch = readl(slot->host->ioaddr + SDHCI_INT_STATUS); 1604659c9bc1SBen Hutchings if (scratch == (u32)-1) 1605659c9bc1SBen Hutchings dead = 1; 1606659c9bc1SBen Hutchings 1607659c9bc1SBen Hutchings sdhci_remove_host(slot->host, dead); 1608659c9bc1SBen Hutchings 1609659c9bc1SBen Hutchings if (slot->chip->fixes && slot->chip->fixes->remove_slot) 1610659c9bc1SBen Hutchings slot->chip->fixes->remove_slot(slot, dead); 1611659c9bc1SBen Hutchings 1612659c9bc1SBen Hutchings if (slot->data && slot->data->cleanup) 1613659c9bc1SBen Hutchings slot->data->cleanup(slot->data); 1614659c9bc1SBen Hutchings 1615659c9bc1SBen Hutchings sdhci_free_host(slot->host); 1616659c9bc1SBen Hutchings } 1617659c9bc1SBen Hutchings 1618659c9bc1SBen Hutchings static void sdhci_pci_runtime_pm_allow(struct device *dev) 1619659c9bc1SBen Hutchings { 162000884b61SAdrian Hunter pm_suspend_ignore_children(dev, 1); 1621659c9bc1SBen Hutchings pm_runtime_set_autosuspend_delay(dev, 50); 1622659c9bc1SBen Hutchings pm_runtime_use_autosuspend(dev); 162300884b61SAdrian Hunter pm_runtime_allow(dev); 162400884b61SAdrian Hunter /* Stay active until mmc core scans for a card */ 162500884b61SAdrian Hunter pm_runtime_put_noidle(dev); 1626659c9bc1SBen Hutchings } 1627659c9bc1SBen Hutchings 1628659c9bc1SBen Hutchings static void sdhci_pci_runtime_pm_forbid(struct device *dev) 1629659c9bc1SBen Hutchings { 1630659c9bc1SBen Hutchings pm_runtime_forbid(dev); 1631659c9bc1SBen Hutchings pm_runtime_get_noresume(dev); 1632659c9bc1SBen Hutchings } 1633659c9bc1SBen Hutchings 1634659c9bc1SBen Hutchings static int sdhci_pci_probe(struct pci_dev *pdev, 1635659c9bc1SBen Hutchings const struct pci_device_id *ent) 1636659c9bc1SBen Hutchings { 1637659c9bc1SBen Hutchings struct sdhci_pci_chip *chip; 1638659c9bc1SBen Hutchings struct sdhci_pci_slot *slot; 1639659c9bc1SBen Hutchings 1640659c9bc1SBen Hutchings u8 slots, first_bar; 1641659c9bc1SBen Hutchings int ret, i; 1642659c9bc1SBen Hutchings 1643659c9bc1SBen Hutchings BUG_ON(pdev == NULL); 1644659c9bc1SBen Hutchings BUG_ON(ent == NULL); 1645659c9bc1SBen Hutchings 1646659c9bc1SBen Hutchings dev_info(&pdev->dev, "SDHCI controller found [%04x:%04x] (rev %x)\n", 1647659c9bc1SBen Hutchings (int)pdev->vendor, (int)pdev->device, (int)pdev->revision); 1648659c9bc1SBen Hutchings 1649659c9bc1SBen Hutchings ret = pci_read_config_byte(pdev, PCI_SLOT_INFO, &slots); 1650659c9bc1SBen Hutchings if (ret) 1651659c9bc1SBen Hutchings return ret; 1652659c9bc1SBen Hutchings 1653659c9bc1SBen Hutchings slots = PCI_SLOT_INFO_SLOTS(slots) + 1; 1654659c9bc1SBen Hutchings dev_dbg(&pdev->dev, "found %d slot(s)\n", slots); 1655659c9bc1SBen Hutchings if (slots == 0) 1656659c9bc1SBen Hutchings return -ENODEV; 1657659c9bc1SBen Hutchings 1658659c9bc1SBen Hutchings BUG_ON(slots > MAX_SLOTS); 1659659c9bc1SBen Hutchings 1660659c9bc1SBen Hutchings ret = pci_read_config_byte(pdev, PCI_SLOT_INFO, &first_bar); 1661659c9bc1SBen Hutchings if (ret) 1662659c9bc1SBen Hutchings return ret; 1663659c9bc1SBen Hutchings 1664659c9bc1SBen Hutchings first_bar &= PCI_SLOT_INFO_FIRST_BAR_MASK; 1665659c9bc1SBen Hutchings 1666659c9bc1SBen Hutchings if (first_bar > 5) { 1667659c9bc1SBen Hutchings dev_err(&pdev->dev, "Invalid first BAR. Aborting.\n"); 1668659c9bc1SBen Hutchings return -ENODEV; 1669659c9bc1SBen Hutchings } 1670659c9bc1SBen Hutchings 167152ac7acfSAndy Shevchenko ret = pcim_enable_device(pdev); 1672659c9bc1SBen Hutchings if (ret) 1673659c9bc1SBen Hutchings return ret; 1674659c9bc1SBen Hutchings 167552ac7acfSAndy Shevchenko chip = devm_kzalloc(&pdev->dev, sizeof(*chip), GFP_KERNEL); 167652ac7acfSAndy Shevchenko if (!chip) 167752ac7acfSAndy Shevchenko return -ENOMEM; 1678659c9bc1SBen Hutchings 1679659c9bc1SBen Hutchings chip->pdev = pdev; 1680659c9bc1SBen Hutchings chip->fixes = (const struct sdhci_pci_fixes *)ent->driver_data; 1681659c9bc1SBen Hutchings if (chip->fixes) { 1682659c9bc1SBen Hutchings chip->quirks = chip->fixes->quirks; 1683659c9bc1SBen Hutchings chip->quirks2 = chip->fixes->quirks2; 1684659c9bc1SBen Hutchings chip->allow_runtime_pm = chip->fixes->allow_runtime_pm; 1685659c9bc1SBen Hutchings } 1686659c9bc1SBen Hutchings chip->num_slots = slots; 1687d38dcad4SAdrian Hunter chip->pm_retune = true; 1688d38dcad4SAdrian Hunter chip->rpm_retune = true; 1689659c9bc1SBen Hutchings 1690659c9bc1SBen Hutchings pci_set_drvdata(pdev, chip); 1691659c9bc1SBen Hutchings 1692659c9bc1SBen Hutchings if (chip->fixes && chip->fixes->probe) { 1693659c9bc1SBen Hutchings ret = chip->fixes->probe(chip); 1694659c9bc1SBen Hutchings if (ret) 169552ac7acfSAndy Shevchenko return ret; 1696659c9bc1SBen Hutchings } 1697659c9bc1SBen Hutchings 1698659c9bc1SBen Hutchings slots = chip->num_slots; /* Quirk may have changed this */ 1699659c9bc1SBen Hutchings 1700659c9bc1SBen Hutchings for (i = 0; i < slots; i++) { 1701659c9bc1SBen Hutchings slot = sdhci_pci_probe_slot(pdev, chip, first_bar, i); 1702659c9bc1SBen Hutchings if (IS_ERR(slot)) { 1703659c9bc1SBen Hutchings for (i--; i >= 0; i--) 1704659c9bc1SBen Hutchings sdhci_pci_remove_slot(chip->slots[i]); 170552ac7acfSAndy Shevchenko return PTR_ERR(slot); 1706659c9bc1SBen Hutchings } 1707659c9bc1SBen Hutchings 1708659c9bc1SBen Hutchings chip->slots[i] = slot; 1709659c9bc1SBen Hutchings } 1710659c9bc1SBen Hutchings 1711659c9bc1SBen Hutchings if (chip->allow_runtime_pm) 1712659c9bc1SBen Hutchings sdhci_pci_runtime_pm_allow(&pdev->dev); 1713659c9bc1SBen Hutchings 1714659c9bc1SBen Hutchings return 0; 1715659c9bc1SBen Hutchings } 1716659c9bc1SBen Hutchings 1717659c9bc1SBen Hutchings static void sdhci_pci_remove(struct pci_dev *pdev) 1718659c9bc1SBen Hutchings { 1719659c9bc1SBen Hutchings int i; 172052ac7acfSAndy Shevchenko struct sdhci_pci_chip *chip = pci_get_drvdata(pdev); 1721659c9bc1SBen Hutchings 1722659c9bc1SBen Hutchings if (chip->allow_runtime_pm) 1723659c9bc1SBen Hutchings sdhci_pci_runtime_pm_forbid(&pdev->dev); 1724659c9bc1SBen Hutchings 1725659c9bc1SBen Hutchings for (i = 0; i < chip->num_slots; i++) 1726659c9bc1SBen Hutchings sdhci_pci_remove_slot(chip->slots[i]); 1727659c9bc1SBen Hutchings } 1728659c9bc1SBen Hutchings 1729659c9bc1SBen Hutchings static struct pci_driver sdhci_driver = { 1730659c9bc1SBen Hutchings .name = "sdhci-pci", 1731659c9bc1SBen Hutchings .id_table = pci_ids, 1732659c9bc1SBen Hutchings .probe = sdhci_pci_probe, 1733659c9bc1SBen Hutchings .remove = sdhci_pci_remove, 1734659c9bc1SBen Hutchings .driver = { 1735659c9bc1SBen Hutchings .pm = &sdhci_pci_pm_ops 1736659c9bc1SBen Hutchings }, 1737659c9bc1SBen Hutchings }; 1738659c9bc1SBen Hutchings 1739659c9bc1SBen Hutchings module_pci_driver(sdhci_driver); 1740659c9bc1SBen Hutchings 1741659c9bc1SBen Hutchings MODULE_AUTHOR("Pierre Ossman <pierre@ossman.eu>"); 1742659c9bc1SBen Hutchings MODULE_DESCRIPTION("Secure Digital Host Controller Interface PCI driver"); 1743659c9bc1SBen Hutchings MODULE_LICENSE("GPL"); 1744