1659c9bc1SBen Hutchings /* linux/drivers/mmc/host/sdhci-pci.c - SDHCI on PCI bus interface 2659c9bc1SBen Hutchings * 3659c9bc1SBen Hutchings * Copyright (C) 2005-2008 Pierre Ossman, All Rights Reserved. 4659c9bc1SBen Hutchings * 5659c9bc1SBen Hutchings * This program is free software; you can redistribute it and/or modify 6659c9bc1SBen Hutchings * it under the terms of the GNU General Public License as published by 7659c9bc1SBen Hutchings * the Free Software Foundation; either version 2 of the License, or (at 8659c9bc1SBen Hutchings * your option) any later version. 9659c9bc1SBen Hutchings * 10659c9bc1SBen Hutchings * Thanks to the following companies for their support: 11659c9bc1SBen Hutchings * 12659c9bc1SBen Hutchings * - JMicron (hardware and technical support) 13659c9bc1SBen Hutchings */ 14659c9bc1SBen Hutchings 15a72016a4SAdrian Hunter #include <linux/string.h> 16659c9bc1SBen Hutchings #include <linux/delay.h> 17659c9bc1SBen Hutchings #include <linux/highmem.h> 18659c9bc1SBen Hutchings #include <linux/module.h> 19659c9bc1SBen Hutchings #include <linux/pci.h> 20659c9bc1SBen Hutchings #include <linux/dma-mapping.h> 21659c9bc1SBen Hutchings #include <linux/slab.h> 22659c9bc1SBen Hutchings #include <linux/device.h> 23659c9bc1SBen Hutchings #include <linux/mmc/host.h> 24659c9bc1SBen Hutchings #include <linux/mmc/mmc.h> 25659c9bc1SBen Hutchings #include <linux/scatterlist.h> 26659c9bc1SBen Hutchings #include <linux/io.h> 27659c9bc1SBen Hutchings #include <linux/gpio.h> 28659c9bc1SBen Hutchings #include <linux/pm_runtime.h> 29659c9bc1SBen Hutchings #include <linux/mmc/slot-gpio.h> 30659c9bc1SBen Hutchings #include <linux/mmc/sdhci-pci-data.h> 313f23df72SZach Brown #include <linux/acpi.h> 32659c9bc1SBen Hutchings 338ee82bdaSAdrian Hunter #include "cqhci.h" 348ee82bdaSAdrian Hunter 35659c9bc1SBen Hutchings #include "sdhci.h" 36659c9bc1SBen Hutchings #include "sdhci-pci.h" 37659c9bc1SBen Hutchings 38fee686b7SAdrian Hunter static void sdhci_pci_hw_reset(struct sdhci_host *host); 39fee686b7SAdrian Hunter 4030cf2803SAdrian Hunter #ifdef CONFIG_PM_SLEEP 4130cf2803SAdrian Hunter static int sdhci_pci_init_wakeup(struct sdhci_pci_chip *chip) 4230cf2803SAdrian Hunter { 4330cf2803SAdrian Hunter mmc_pm_flag_t pm_flags = 0; 44d56ee1ffSAdrian Hunter bool cap_cd_wake = false; 4530cf2803SAdrian Hunter int i; 4630cf2803SAdrian Hunter 4730cf2803SAdrian Hunter for (i = 0; i < chip->num_slots; i++) { 4830cf2803SAdrian Hunter struct sdhci_pci_slot *slot = chip->slots[i]; 4930cf2803SAdrian Hunter 50d56ee1ffSAdrian Hunter if (slot) { 5130cf2803SAdrian Hunter pm_flags |= slot->host->mmc->pm_flags; 52d56ee1ffSAdrian Hunter if (slot->host->mmc->caps & MMC_CAP_CD_WAKE) 53d56ee1ffSAdrian Hunter cap_cd_wake = true; 54d56ee1ffSAdrian Hunter } 5530cf2803SAdrian Hunter } 5630cf2803SAdrian Hunter 57d56ee1ffSAdrian Hunter if ((pm_flags & MMC_PM_KEEP_POWER) && (pm_flags & MMC_PM_WAKE_SDIO_IRQ)) 58d56ee1ffSAdrian Hunter return device_wakeup_enable(&chip->pdev->dev); 59d56ee1ffSAdrian Hunter else if (!cap_cd_wake) 60d56ee1ffSAdrian Hunter return device_wakeup_disable(&chip->pdev->dev); 61d56ee1ffSAdrian Hunter 62d56ee1ffSAdrian Hunter return 0; 6330cf2803SAdrian Hunter } 6430cf2803SAdrian Hunter 6530cf2803SAdrian Hunter static int sdhci_pci_suspend_host(struct sdhci_pci_chip *chip) 6630cf2803SAdrian Hunter { 675c3c6126SAdrian Hunter int i, ret; 6830cf2803SAdrian Hunter 6930cf2803SAdrian Hunter sdhci_pci_init_wakeup(chip); 7030cf2803SAdrian Hunter 715c3c6126SAdrian Hunter for (i = 0; i < chip->num_slots; i++) { 725c3c6126SAdrian Hunter struct sdhci_pci_slot *slot = chip->slots[i]; 735c3c6126SAdrian Hunter struct sdhci_host *host; 745c3c6126SAdrian Hunter 755c3c6126SAdrian Hunter if (!slot) 765c3c6126SAdrian Hunter continue; 775c3c6126SAdrian Hunter 785c3c6126SAdrian Hunter host = slot->host; 795c3c6126SAdrian Hunter 805c3c6126SAdrian Hunter if (chip->pm_retune && host->tuning_mode != SDHCI_TUNING_MODE_3) 815c3c6126SAdrian Hunter mmc_retune_needed(host->mmc); 825c3c6126SAdrian Hunter 835c3c6126SAdrian Hunter ret = sdhci_suspend_host(host); 845c3c6126SAdrian Hunter if (ret) 855c3c6126SAdrian Hunter goto err_pci_suspend; 86d56ee1ffSAdrian Hunter 87d56ee1ffSAdrian Hunter if (device_may_wakeup(&chip->pdev->dev)) 88d56ee1ffSAdrian Hunter mmc_gpio_set_cd_wake(host->mmc, true); 895c3c6126SAdrian Hunter } 905c3c6126SAdrian Hunter 9130cf2803SAdrian Hunter return 0; 925c3c6126SAdrian Hunter 935c3c6126SAdrian Hunter err_pci_suspend: 945c3c6126SAdrian Hunter while (--i >= 0) 955c3c6126SAdrian Hunter sdhci_resume_host(chip->slots[i]->host); 965c3c6126SAdrian Hunter return ret; 9730cf2803SAdrian Hunter } 9830cf2803SAdrian Hunter 9930cf2803SAdrian Hunter int sdhci_pci_resume_host(struct sdhci_pci_chip *chip) 10030cf2803SAdrian Hunter { 10130cf2803SAdrian Hunter struct sdhci_pci_slot *slot; 10230cf2803SAdrian Hunter int i, ret; 10330cf2803SAdrian Hunter 10430cf2803SAdrian Hunter for (i = 0; i < chip->num_slots; i++) { 10530cf2803SAdrian Hunter slot = chip->slots[i]; 10630cf2803SAdrian Hunter if (!slot) 10730cf2803SAdrian Hunter continue; 10830cf2803SAdrian Hunter 10930cf2803SAdrian Hunter ret = sdhci_resume_host(slot->host); 11030cf2803SAdrian Hunter if (ret) 11130cf2803SAdrian Hunter return ret; 112d56ee1ffSAdrian Hunter 113d56ee1ffSAdrian Hunter mmc_gpio_set_cd_wake(slot->host->mmc, false); 11430cf2803SAdrian Hunter } 11530cf2803SAdrian Hunter 11630cf2803SAdrian Hunter return 0; 11730cf2803SAdrian Hunter } 1188ee82bdaSAdrian Hunter 1198ee82bdaSAdrian Hunter static int sdhci_cqhci_suspend(struct sdhci_pci_chip *chip) 1208ee82bdaSAdrian Hunter { 1218ee82bdaSAdrian Hunter int ret; 1228ee82bdaSAdrian Hunter 1238ee82bdaSAdrian Hunter ret = cqhci_suspend(chip->slots[0]->host->mmc); 1248ee82bdaSAdrian Hunter if (ret) 1258ee82bdaSAdrian Hunter return ret; 1268ee82bdaSAdrian Hunter 1278ee82bdaSAdrian Hunter return sdhci_pci_suspend_host(chip); 1288ee82bdaSAdrian Hunter } 1298ee82bdaSAdrian Hunter 1308ee82bdaSAdrian Hunter static int sdhci_cqhci_resume(struct sdhci_pci_chip *chip) 1318ee82bdaSAdrian Hunter { 1328ee82bdaSAdrian Hunter int ret; 1338ee82bdaSAdrian Hunter 1348ee82bdaSAdrian Hunter ret = sdhci_pci_resume_host(chip); 1358ee82bdaSAdrian Hunter if (ret) 1368ee82bdaSAdrian Hunter return ret; 1378ee82bdaSAdrian Hunter 1388ee82bdaSAdrian Hunter return cqhci_resume(chip->slots[0]->host->mmc); 1398ee82bdaSAdrian Hunter } 14030cf2803SAdrian Hunter #endif 14130cf2803SAdrian Hunter 142966d696aSAdrian Hunter #ifdef CONFIG_PM 143966d696aSAdrian Hunter static int sdhci_pci_runtime_suspend_host(struct sdhci_pci_chip *chip) 144966d696aSAdrian Hunter { 145966d696aSAdrian Hunter struct sdhci_pci_slot *slot; 146966d696aSAdrian Hunter struct sdhci_host *host; 147966d696aSAdrian Hunter int i, ret; 148966d696aSAdrian Hunter 149966d696aSAdrian Hunter for (i = 0; i < chip->num_slots; i++) { 150966d696aSAdrian Hunter slot = chip->slots[i]; 151966d696aSAdrian Hunter if (!slot) 152966d696aSAdrian Hunter continue; 153966d696aSAdrian Hunter 154966d696aSAdrian Hunter host = slot->host; 155966d696aSAdrian Hunter 156966d696aSAdrian Hunter ret = sdhci_runtime_suspend_host(host); 157966d696aSAdrian Hunter if (ret) 158966d696aSAdrian Hunter goto err_pci_runtime_suspend; 159966d696aSAdrian Hunter 160966d696aSAdrian Hunter if (chip->rpm_retune && 161966d696aSAdrian Hunter host->tuning_mode != SDHCI_TUNING_MODE_3) 162966d696aSAdrian Hunter mmc_retune_needed(host->mmc); 163966d696aSAdrian Hunter } 164966d696aSAdrian Hunter 165966d696aSAdrian Hunter return 0; 166966d696aSAdrian Hunter 167966d696aSAdrian Hunter err_pci_runtime_suspend: 168966d696aSAdrian Hunter while (--i >= 0) 169966d696aSAdrian Hunter sdhci_runtime_resume_host(chip->slots[i]->host); 170966d696aSAdrian Hunter return ret; 171966d696aSAdrian Hunter } 172966d696aSAdrian Hunter 173966d696aSAdrian Hunter static int sdhci_pci_runtime_resume_host(struct sdhci_pci_chip *chip) 174966d696aSAdrian Hunter { 175966d696aSAdrian Hunter struct sdhci_pci_slot *slot; 176966d696aSAdrian Hunter int i, ret; 177966d696aSAdrian Hunter 178966d696aSAdrian Hunter for (i = 0; i < chip->num_slots; i++) { 179966d696aSAdrian Hunter slot = chip->slots[i]; 180966d696aSAdrian Hunter if (!slot) 181966d696aSAdrian Hunter continue; 182966d696aSAdrian Hunter 183966d696aSAdrian Hunter ret = sdhci_runtime_resume_host(slot->host); 184966d696aSAdrian Hunter if (ret) 185966d696aSAdrian Hunter return ret; 186966d696aSAdrian Hunter } 187966d696aSAdrian Hunter 188966d696aSAdrian Hunter return 0; 189966d696aSAdrian Hunter } 1908ee82bdaSAdrian Hunter 1918ee82bdaSAdrian Hunter static int sdhci_cqhci_runtime_suspend(struct sdhci_pci_chip *chip) 1928ee82bdaSAdrian Hunter { 1938ee82bdaSAdrian Hunter int ret; 1948ee82bdaSAdrian Hunter 1958ee82bdaSAdrian Hunter ret = cqhci_suspend(chip->slots[0]->host->mmc); 1968ee82bdaSAdrian Hunter if (ret) 1978ee82bdaSAdrian Hunter return ret; 1988ee82bdaSAdrian Hunter 1998ee82bdaSAdrian Hunter return sdhci_pci_runtime_suspend_host(chip); 2008ee82bdaSAdrian Hunter } 2018ee82bdaSAdrian Hunter 2028ee82bdaSAdrian Hunter static int sdhci_cqhci_runtime_resume(struct sdhci_pci_chip *chip) 2038ee82bdaSAdrian Hunter { 2048ee82bdaSAdrian Hunter int ret; 2058ee82bdaSAdrian Hunter 2068ee82bdaSAdrian Hunter ret = sdhci_pci_runtime_resume_host(chip); 2078ee82bdaSAdrian Hunter if (ret) 2088ee82bdaSAdrian Hunter return ret; 2098ee82bdaSAdrian Hunter 2108ee82bdaSAdrian Hunter return cqhci_resume(chip->slots[0]->host->mmc); 2118ee82bdaSAdrian Hunter } 212966d696aSAdrian Hunter #endif 213966d696aSAdrian Hunter 2148ee82bdaSAdrian Hunter static u32 sdhci_cqhci_irq(struct sdhci_host *host, u32 intmask) 2158ee82bdaSAdrian Hunter { 2168ee82bdaSAdrian Hunter int cmd_error = 0; 2178ee82bdaSAdrian Hunter int data_error = 0; 2188ee82bdaSAdrian Hunter 2198ee82bdaSAdrian Hunter if (!sdhci_cqe_irq(host, intmask, &cmd_error, &data_error)) 2208ee82bdaSAdrian Hunter return intmask; 2218ee82bdaSAdrian Hunter 2228ee82bdaSAdrian Hunter cqhci_irq(host->mmc, intmask, cmd_error, data_error); 2238ee82bdaSAdrian Hunter 2248ee82bdaSAdrian Hunter return 0; 2258ee82bdaSAdrian Hunter } 2268ee82bdaSAdrian Hunter 2278ee82bdaSAdrian Hunter static void sdhci_pci_dumpregs(struct mmc_host *mmc) 2288ee82bdaSAdrian Hunter { 2298ee82bdaSAdrian Hunter sdhci_dumpregs(mmc_priv(mmc)); 2308ee82bdaSAdrian Hunter } 2318ee82bdaSAdrian Hunter 232659c9bc1SBen Hutchings /*****************************************************************************\ 233659c9bc1SBen Hutchings * * 234659c9bc1SBen Hutchings * Hardware specific quirk handling * 235659c9bc1SBen Hutchings * * 236659c9bc1SBen Hutchings \*****************************************************************************/ 237659c9bc1SBen Hutchings 238659c9bc1SBen Hutchings static int ricoh_probe(struct sdhci_pci_chip *chip) 239659c9bc1SBen Hutchings { 240659c9bc1SBen Hutchings if (chip->pdev->subsystem_vendor == PCI_VENDOR_ID_SAMSUNG || 241659c9bc1SBen Hutchings chip->pdev->subsystem_vendor == PCI_VENDOR_ID_SONY) 242659c9bc1SBen Hutchings chip->quirks |= SDHCI_QUIRK_NO_CARD_NO_RESET; 243659c9bc1SBen Hutchings return 0; 244659c9bc1SBen Hutchings } 245659c9bc1SBen Hutchings 246659c9bc1SBen Hutchings static int ricoh_mmc_probe_slot(struct sdhci_pci_slot *slot) 247659c9bc1SBen Hutchings { 248659c9bc1SBen Hutchings slot->host->caps = 249659c9bc1SBen Hutchings ((0x21 << SDHCI_TIMEOUT_CLK_SHIFT) 250659c9bc1SBen Hutchings & SDHCI_TIMEOUT_CLK_MASK) | 251659c9bc1SBen Hutchings 252659c9bc1SBen Hutchings ((0x21 << SDHCI_CLOCK_BASE_SHIFT) 253659c9bc1SBen Hutchings & SDHCI_CLOCK_BASE_MASK) | 254659c9bc1SBen Hutchings 255659c9bc1SBen Hutchings SDHCI_TIMEOUT_CLK_UNIT | 256659c9bc1SBen Hutchings SDHCI_CAN_VDD_330 | 257659c9bc1SBen Hutchings SDHCI_CAN_DO_HISPD | 258659c9bc1SBen Hutchings SDHCI_CAN_DO_SDMA; 259659c9bc1SBen Hutchings return 0; 260659c9bc1SBen Hutchings } 261659c9bc1SBen Hutchings 262b7813f0fSAdrian Hunter #ifdef CONFIG_PM_SLEEP 263659c9bc1SBen Hutchings static int ricoh_mmc_resume(struct sdhci_pci_chip *chip) 264659c9bc1SBen Hutchings { 265659c9bc1SBen Hutchings /* Apply a delay to allow controller to settle */ 266659c9bc1SBen Hutchings /* Otherwise it becomes confused if card state changed 267659c9bc1SBen Hutchings during suspend */ 268659c9bc1SBen Hutchings msleep(500); 26930cf2803SAdrian Hunter return sdhci_pci_resume_host(chip); 270659c9bc1SBen Hutchings } 271b7813f0fSAdrian Hunter #endif 272659c9bc1SBen Hutchings 273659c9bc1SBen Hutchings static const struct sdhci_pci_fixes sdhci_ricoh = { 274659c9bc1SBen Hutchings .probe = ricoh_probe, 275659c9bc1SBen Hutchings .quirks = SDHCI_QUIRK_32BIT_DMA_ADDR | 276659c9bc1SBen Hutchings SDHCI_QUIRK_FORCE_DMA | 277659c9bc1SBen Hutchings SDHCI_QUIRK_CLOCK_BEFORE_RESET, 278659c9bc1SBen Hutchings }; 279659c9bc1SBen Hutchings 280659c9bc1SBen Hutchings static const struct sdhci_pci_fixes sdhci_ricoh_mmc = { 281659c9bc1SBen Hutchings .probe_slot = ricoh_mmc_probe_slot, 282b7813f0fSAdrian Hunter #ifdef CONFIG_PM_SLEEP 283659c9bc1SBen Hutchings .resume = ricoh_mmc_resume, 284b7813f0fSAdrian Hunter #endif 285659c9bc1SBen Hutchings .quirks = SDHCI_QUIRK_32BIT_DMA_ADDR | 286659c9bc1SBen Hutchings SDHCI_QUIRK_CLOCK_BEFORE_RESET | 287659c9bc1SBen Hutchings SDHCI_QUIRK_NO_CARD_NO_RESET | 288659c9bc1SBen Hutchings SDHCI_QUIRK_MISSING_CAPS 289659c9bc1SBen Hutchings }; 290659c9bc1SBen Hutchings 291659c9bc1SBen Hutchings static const struct sdhci_pci_fixes sdhci_ene_712 = { 292659c9bc1SBen Hutchings .quirks = SDHCI_QUIRK_SINGLE_POWER_WRITE | 293659c9bc1SBen Hutchings SDHCI_QUIRK_BROKEN_DMA, 294659c9bc1SBen Hutchings }; 295659c9bc1SBen Hutchings 296659c9bc1SBen Hutchings static const struct sdhci_pci_fixes sdhci_ene_714 = { 297659c9bc1SBen Hutchings .quirks = SDHCI_QUIRK_SINGLE_POWER_WRITE | 298659c9bc1SBen Hutchings SDHCI_QUIRK_RESET_CMD_DATA_ON_IOS | 299659c9bc1SBen Hutchings SDHCI_QUIRK_BROKEN_DMA, 300659c9bc1SBen Hutchings }; 301659c9bc1SBen Hutchings 302659c9bc1SBen Hutchings static const struct sdhci_pci_fixes sdhci_cafe = { 303659c9bc1SBen Hutchings .quirks = SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER | 304659c9bc1SBen Hutchings SDHCI_QUIRK_NO_BUSY_IRQ | 305659c9bc1SBen Hutchings SDHCI_QUIRK_BROKEN_CARD_DETECTION | 306659c9bc1SBen Hutchings SDHCI_QUIRK_BROKEN_TIMEOUT_VAL, 307659c9bc1SBen Hutchings }; 308659c9bc1SBen Hutchings 309659c9bc1SBen Hutchings static const struct sdhci_pci_fixes sdhci_intel_qrk = { 310659c9bc1SBen Hutchings .quirks = SDHCI_QUIRK_NO_HISPD_BIT, 311659c9bc1SBen Hutchings }; 312659c9bc1SBen Hutchings 313659c9bc1SBen Hutchings static int mrst_hc_probe_slot(struct sdhci_pci_slot *slot) 314659c9bc1SBen Hutchings { 315659c9bc1SBen Hutchings slot->host->mmc->caps |= MMC_CAP_8_BIT_DATA; 316659c9bc1SBen Hutchings return 0; 317659c9bc1SBen Hutchings } 318659c9bc1SBen Hutchings 319659c9bc1SBen Hutchings /* 320659c9bc1SBen Hutchings * ADMA operation is disabled for Moorestown platform due to 321659c9bc1SBen Hutchings * hardware bugs. 322659c9bc1SBen Hutchings */ 323659c9bc1SBen Hutchings static int mrst_hc_probe(struct sdhci_pci_chip *chip) 324659c9bc1SBen Hutchings { 325659c9bc1SBen Hutchings /* 326659c9bc1SBen Hutchings * slots number is fixed here for MRST as SDIO3/5 are never used and 327659c9bc1SBen Hutchings * have hardware bugs. 328659c9bc1SBen Hutchings */ 329659c9bc1SBen Hutchings chip->num_slots = 1; 330659c9bc1SBen Hutchings return 0; 331659c9bc1SBen Hutchings } 332659c9bc1SBen Hutchings 333659c9bc1SBen Hutchings static int pch_hc_probe_slot(struct sdhci_pci_slot *slot) 334659c9bc1SBen Hutchings { 335659c9bc1SBen Hutchings slot->host->mmc->caps |= MMC_CAP_8_BIT_DATA; 336659c9bc1SBen Hutchings return 0; 337659c9bc1SBen Hutchings } 338659c9bc1SBen Hutchings 339659c9bc1SBen Hutchings #ifdef CONFIG_PM 340659c9bc1SBen Hutchings 341659c9bc1SBen Hutchings static irqreturn_t sdhci_pci_sd_cd(int irq, void *dev_id) 342659c9bc1SBen Hutchings { 343659c9bc1SBen Hutchings struct sdhci_pci_slot *slot = dev_id; 344659c9bc1SBen Hutchings struct sdhci_host *host = slot->host; 345659c9bc1SBen Hutchings 346659c9bc1SBen Hutchings mmc_detect_change(host->mmc, msecs_to_jiffies(200)); 347659c9bc1SBen Hutchings return IRQ_HANDLED; 348659c9bc1SBen Hutchings } 349659c9bc1SBen Hutchings 350659c9bc1SBen Hutchings static void sdhci_pci_add_own_cd(struct sdhci_pci_slot *slot) 351659c9bc1SBen Hutchings { 352659c9bc1SBen Hutchings int err, irq, gpio = slot->cd_gpio; 353659c9bc1SBen Hutchings 354659c9bc1SBen Hutchings slot->cd_gpio = -EINVAL; 355659c9bc1SBen Hutchings slot->cd_irq = -EINVAL; 356659c9bc1SBen Hutchings 357659c9bc1SBen Hutchings if (!gpio_is_valid(gpio)) 358659c9bc1SBen Hutchings return; 359659c9bc1SBen Hutchings 360c10bc372SAndy Shevchenko err = devm_gpio_request(&slot->chip->pdev->dev, gpio, "sd_cd"); 361659c9bc1SBen Hutchings if (err < 0) 362659c9bc1SBen Hutchings goto out; 363659c9bc1SBen Hutchings 364659c9bc1SBen Hutchings err = gpio_direction_input(gpio); 365659c9bc1SBen Hutchings if (err < 0) 366659c9bc1SBen Hutchings goto out_free; 367659c9bc1SBen Hutchings 368659c9bc1SBen Hutchings irq = gpio_to_irq(gpio); 369659c9bc1SBen Hutchings if (irq < 0) 370659c9bc1SBen Hutchings goto out_free; 371659c9bc1SBen Hutchings 372659c9bc1SBen Hutchings err = request_irq(irq, sdhci_pci_sd_cd, IRQF_TRIGGER_RISING | 373659c9bc1SBen Hutchings IRQF_TRIGGER_FALLING, "sd_cd", slot); 374659c9bc1SBen Hutchings if (err) 375659c9bc1SBen Hutchings goto out_free; 376659c9bc1SBen Hutchings 377659c9bc1SBen Hutchings slot->cd_gpio = gpio; 378659c9bc1SBen Hutchings slot->cd_irq = irq; 379659c9bc1SBen Hutchings 380659c9bc1SBen Hutchings return; 381659c9bc1SBen Hutchings 382659c9bc1SBen Hutchings out_free: 383c10bc372SAndy Shevchenko devm_gpio_free(&slot->chip->pdev->dev, gpio); 384659c9bc1SBen Hutchings out: 385659c9bc1SBen Hutchings dev_warn(&slot->chip->pdev->dev, "failed to setup card detect wake up\n"); 386659c9bc1SBen Hutchings } 387659c9bc1SBen Hutchings 388659c9bc1SBen Hutchings static void sdhci_pci_remove_own_cd(struct sdhci_pci_slot *slot) 389659c9bc1SBen Hutchings { 390659c9bc1SBen Hutchings if (slot->cd_irq >= 0) 391659c9bc1SBen Hutchings free_irq(slot->cd_irq, slot); 392659c9bc1SBen Hutchings } 393659c9bc1SBen Hutchings 394659c9bc1SBen Hutchings #else 395659c9bc1SBen Hutchings 396659c9bc1SBen Hutchings static inline void sdhci_pci_add_own_cd(struct sdhci_pci_slot *slot) 397659c9bc1SBen Hutchings { 398659c9bc1SBen Hutchings } 399659c9bc1SBen Hutchings 400659c9bc1SBen Hutchings static inline void sdhci_pci_remove_own_cd(struct sdhci_pci_slot *slot) 401659c9bc1SBen Hutchings { 402659c9bc1SBen Hutchings } 403659c9bc1SBen Hutchings 404659c9bc1SBen Hutchings #endif 405659c9bc1SBen Hutchings 406659c9bc1SBen Hutchings static int mfd_emmc_probe_slot(struct sdhci_pci_slot *slot) 407659c9bc1SBen Hutchings { 408659c9bc1SBen Hutchings slot->host->mmc->caps |= MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE; 409d2a47176SUlf Hansson slot->host->mmc->caps2 |= MMC_CAP2_BOOTPART_NOACC; 410659c9bc1SBen Hutchings return 0; 411659c9bc1SBen Hutchings } 412659c9bc1SBen Hutchings 413659c9bc1SBen Hutchings static int mfd_sdio_probe_slot(struct sdhci_pci_slot *slot) 414659c9bc1SBen Hutchings { 415659c9bc1SBen Hutchings slot->host->mmc->caps |= MMC_CAP_POWER_OFF_CARD | MMC_CAP_NONREMOVABLE; 416659c9bc1SBen Hutchings return 0; 417659c9bc1SBen Hutchings } 418659c9bc1SBen Hutchings 419659c9bc1SBen Hutchings static const struct sdhci_pci_fixes sdhci_intel_mrst_hc0 = { 420659c9bc1SBen Hutchings .quirks = SDHCI_QUIRK_BROKEN_ADMA | SDHCI_QUIRK_NO_HISPD_BIT, 421659c9bc1SBen Hutchings .probe_slot = mrst_hc_probe_slot, 422659c9bc1SBen Hutchings }; 423659c9bc1SBen Hutchings 424659c9bc1SBen Hutchings static const struct sdhci_pci_fixes sdhci_intel_mrst_hc1_hc2 = { 425659c9bc1SBen Hutchings .quirks = SDHCI_QUIRK_BROKEN_ADMA | SDHCI_QUIRK_NO_HISPD_BIT, 426659c9bc1SBen Hutchings .probe = mrst_hc_probe, 427659c9bc1SBen Hutchings }; 428659c9bc1SBen Hutchings 429659c9bc1SBen Hutchings static const struct sdhci_pci_fixes sdhci_intel_mfd_sd = { 430659c9bc1SBen Hutchings .quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC, 431659c9bc1SBen Hutchings .allow_runtime_pm = true, 432659c9bc1SBen Hutchings .own_cd_for_runtime_pm = true, 433659c9bc1SBen Hutchings }; 434659c9bc1SBen Hutchings 435659c9bc1SBen Hutchings static const struct sdhci_pci_fixes sdhci_intel_mfd_sdio = { 436659c9bc1SBen Hutchings .quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC, 437659c9bc1SBen Hutchings .quirks2 = SDHCI_QUIRK2_HOST_OFF_CARD_ON, 438659c9bc1SBen Hutchings .allow_runtime_pm = true, 439659c9bc1SBen Hutchings .probe_slot = mfd_sdio_probe_slot, 440659c9bc1SBen Hutchings }; 441659c9bc1SBen Hutchings 442659c9bc1SBen Hutchings static const struct sdhci_pci_fixes sdhci_intel_mfd_emmc = { 443659c9bc1SBen Hutchings .quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC, 444659c9bc1SBen Hutchings .allow_runtime_pm = true, 445659c9bc1SBen Hutchings .probe_slot = mfd_emmc_probe_slot, 446659c9bc1SBen Hutchings }; 447659c9bc1SBen Hutchings 448659c9bc1SBen Hutchings static const struct sdhci_pci_fixes sdhci_intel_pch_sdio = { 449659c9bc1SBen Hutchings .quirks = SDHCI_QUIRK_BROKEN_ADMA, 450659c9bc1SBen Hutchings .probe_slot = pch_hc_probe_slot, 451659c9bc1SBen Hutchings }; 452659c9bc1SBen Hutchings 453c959a6b0SAdrian Hunter enum { 454c959a6b0SAdrian Hunter INTEL_DSM_FNS = 0, 4556ae03368SAdrian Hunter INTEL_DSM_V18_SWITCH = 3, 45651ced59cSAdrian Hunter INTEL_DSM_DRV_STRENGTH = 9, 457c959a6b0SAdrian Hunter INTEL_DSM_D3_RETUNE = 10, 458c959a6b0SAdrian Hunter }; 459c959a6b0SAdrian Hunter 460c959a6b0SAdrian Hunter struct intel_host { 461c959a6b0SAdrian Hunter u32 dsm_fns; 46251ced59cSAdrian Hunter int drv_strength; 463c959a6b0SAdrian Hunter bool d3_retune; 464c959a6b0SAdrian Hunter }; 465c959a6b0SAdrian Hunter 466c37f69ffSColin Ian King static const guid_t intel_dsm_guid = 46794116f81SAndy Shevchenko GUID_INIT(0xF6C13EA5, 0x65CD, 0x461F, 46894116f81SAndy Shevchenko 0xAB, 0x7A, 0x29, 0xF7, 0xE8, 0xD5, 0xBD, 0x61); 469c959a6b0SAdrian Hunter 470c959a6b0SAdrian Hunter static int __intel_dsm(struct intel_host *intel_host, struct device *dev, 471c959a6b0SAdrian Hunter unsigned int fn, u32 *result) 472c959a6b0SAdrian Hunter { 473c959a6b0SAdrian Hunter union acpi_object *obj; 474c959a6b0SAdrian Hunter int err = 0; 475a72016a4SAdrian Hunter size_t len; 476c959a6b0SAdrian Hunter 47794116f81SAndy Shevchenko obj = acpi_evaluate_dsm(ACPI_HANDLE(dev), &intel_dsm_guid, 0, fn, NULL); 478c959a6b0SAdrian Hunter if (!obj) 479c959a6b0SAdrian Hunter return -EOPNOTSUPP; 480c959a6b0SAdrian Hunter 481c959a6b0SAdrian Hunter if (obj->type != ACPI_TYPE_BUFFER || obj->buffer.length < 1) { 482c959a6b0SAdrian Hunter err = -EINVAL; 483c959a6b0SAdrian Hunter goto out; 484c959a6b0SAdrian Hunter } 485c959a6b0SAdrian Hunter 486a72016a4SAdrian Hunter len = min_t(size_t, obj->buffer.length, 4); 487a72016a4SAdrian Hunter 488a72016a4SAdrian Hunter *result = 0; 489a72016a4SAdrian Hunter memcpy(result, obj->buffer.pointer, len); 490c959a6b0SAdrian Hunter out: 491c959a6b0SAdrian Hunter ACPI_FREE(obj); 492c959a6b0SAdrian Hunter 493c959a6b0SAdrian Hunter return err; 494c959a6b0SAdrian Hunter } 495c959a6b0SAdrian Hunter 496c959a6b0SAdrian Hunter static int intel_dsm(struct intel_host *intel_host, struct device *dev, 497c959a6b0SAdrian Hunter unsigned int fn, u32 *result) 498c959a6b0SAdrian Hunter { 499c959a6b0SAdrian Hunter if (fn > 31 || !(intel_host->dsm_fns & (1 << fn))) 500c959a6b0SAdrian Hunter return -EOPNOTSUPP; 501c959a6b0SAdrian Hunter 502c959a6b0SAdrian Hunter return __intel_dsm(intel_host, dev, fn, result); 503c959a6b0SAdrian Hunter } 504c959a6b0SAdrian Hunter 505c959a6b0SAdrian Hunter static void intel_dsm_init(struct intel_host *intel_host, struct device *dev, 506c959a6b0SAdrian Hunter struct mmc_host *mmc) 507c959a6b0SAdrian Hunter { 508c959a6b0SAdrian Hunter int err; 509c959a6b0SAdrian Hunter u32 val; 510c959a6b0SAdrian Hunter 511eb701ce1SAdrian Hunter intel_host->d3_retune = true; 512eb701ce1SAdrian Hunter 513c959a6b0SAdrian Hunter err = __intel_dsm(intel_host, dev, INTEL_DSM_FNS, &intel_host->dsm_fns); 514c959a6b0SAdrian Hunter if (err) { 515c959a6b0SAdrian Hunter pr_debug("%s: DSM not supported, error %d\n", 516c959a6b0SAdrian Hunter mmc_hostname(mmc), err); 517c959a6b0SAdrian Hunter return; 518c959a6b0SAdrian Hunter } 519c959a6b0SAdrian Hunter 520c959a6b0SAdrian Hunter pr_debug("%s: DSM function mask %#x\n", 521c959a6b0SAdrian Hunter mmc_hostname(mmc), intel_host->dsm_fns); 522c959a6b0SAdrian Hunter 52351ced59cSAdrian Hunter err = intel_dsm(intel_host, dev, INTEL_DSM_DRV_STRENGTH, &val); 52451ced59cSAdrian Hunter intel_host->drv_strength = err ? 0 : val; 52551ced59cSAdrian Hunter 526c959a6b0SAdrian Hunter err = intel_dsm(intel_host, dev, INTEL_DSM_D3_RETUNE, &val); 527c959a6b0SAdrian Hunter intel_host->d3_retune = err ? true : !!val; 528c959a6b0SAdrian Hunter } 529c959a6b0SAdrian Hunter 530659c9bc1SBen Hutchings static void sdhci_pci_int_hw_reset(struct sdhci_host *host) 531659c9bc1SBen Hutchings { 532659c9bc1SBen Hutchings u8 reg; 533659c9bc1SBen Hutchings 534659c9bc1SBen Hutchings reg = sdhci_readb(host, SDHCI_POWER_CONTROL); 535659c9bc1SBen Hutchings reg |= 0x10; 536659c9bc1SBen Hutchings sdhci_writeb(host, reg, SDHCI_POWER_CONTROL); 537659c9bc1SBen Hutchings /* For eMMC, minimum is 1us but give it 9us for good measure */ 538659c9bc1SBen Hutchings udelay(9); 539659c9bc1SBen Hutchings reg &= ~0x10; 540659c9bc1SBen Hutchings sdhci_writeb(host, reg, SDHCI_POWER_CONTROL); 541659c9bc1SBen Hutchings /* For eMMC, minimum is 200us but give it 300us for good measure */ 542659c9bc1SBen Hutchings usleep_range(300, 1000); 543659c9bc1SBen Hutchings } 544659c9bc1SBen Hutchings 54551ced59cSAdrian Hunter static int intel_select_drive_strength(struct mmc_card *card, 54651ced59cSAdrian Hunter unsigned int max_dtr, int host_drv, 54751ced59cSAdrian Hunter int card_drv, int *drv_type) 548659c9bc1SBen Hutchings { 54951ced59cSAdrian Hunter struct sdhci_host *host = mmc_priv(card->host); 55051ced59cSAdrian Hunter struct sdhci_pci_slot *slot = sdhci_priv(host); 55151ced59cSAdrian Hunter struct intel_host *intel_host = sdhci_pci_priv(slot); 552659c9bc1SBen Hutchings 55351ced59cSAdrian Hunter return intel_host->drv_strength; 554659c9bc1SBen Hutchings } 555659c9bc1SBen Hutchings 556163cbe31SAdrian Hunter static int bxt_get_cd(struct mmc_host *mmc) 557163cbe31SAdrian Hunter { 558163cbe31SAdrian Hunter int gpio_cd = mmc_gpio_get_cd(mmc); 559163cbe31SAdrian Hunter struct sdhci_host *host = mmc_priv(mmc); 560163cbe31SAdrian Hunter unsigned long flags; 561163cbe31SAdrian Hunter int ret = 0; 562163cbe31SAdrian Hunter 563163cbe31SAdrian Hunter if (!gpio_cd) 564163cbe31SAdrian Hunter return 0; 565163cbe31SAdrian Hunter 566163cbe31SAdrian Hunter spin_lock_irqsave(&host->lock, flags); 567163cbe31SAdrian Hunter 568163cbe31SAdrian Hunter if (host->flags & SDHCI_DEVICE_DEAD) 569163cbe31SAdrian Hunter goto out; 570163cbe31SAdrian Hunter 571163cbe31SAdrian Hunter ret = !!(sdhci_readl(host, SDHCI_PRESENT_STATE) & SDHCI_CARD_PRESENT); 572163cbe31SAdrian Hunter out: 573163cbe31SAdrian Hunter spin_unlock_irqrestore(&host->lock, flags); 574163cbe31SAdrian Hunter 575163cbe31SAdrian Hunter return ret; 576163cbe31SAdrian Hunter } 577163cbe31SAdrian Hunter 57848d685a2SAdrian Hunter #define SDHCI_INTEL_PWR_TIMEOUT_CNT 20 57948d685a2SAdrian Hunter #define SDHCI_INTEL_PWR_TIMEOUT_UDELAY 100 58048d685a2SAdrian Hunter 58148d685a2SAdrian Hunter static void sdhci_intel_set_power(struct sdhci_host *host, unsigned char mode, 58248d685a2SAdrian Hunter unsigned short vdd) 58348d685a2SAdrian Hunter { 58448d685a2SAdrian Hunter int cntr; 58548d685a2SAdrian Hunter u8 reg; 58648d685a2SAdrian Hunter 58748d685a2SAdrian Hunter sdhci_set_power(host, mode, vdd); 58848d685a2SAdrian Hunter 58948d685a2SAdrian Hunter if (mode == MMC_POWER_OFF) 59048d685a2SAdrian Hunter return; 59148d685a2SAdrian Hunter 59248d685a2SAdrian Hunter /* 59348d685a2SAdrian Hunter * Bus power might not enable after D3 -> D0 transition due to the 59448d685a2SAdrian Hunter * present state not yet having propagated. Retry for up to 2ms. 59548d685a2SAdrian Hunter */ 59648d685a2SAdrian Hunter for (cntr = 0; cntr < SDHCI_INTEL_PWR_TIMEOUT_CNT; cntr++) { 59748d685a2SAdrian Hunter reg = sdhci_readb(host, SDHCI_POWER_CONTROL); 59848d685a2SAdrian Hunter if (reg & SDHCI_POWER_ON) 59948d685a2SAdrian Hunter break; 60048d685a2SAdrian Hunter udelay(SDHCI_INTEL_PWR_TIMEOUT_UDELAY); 60148d685a2SAdrian Hunter reg |= SDHCI_POWER_ON; 60248d685a2SAdrian Hunter sdhci_writeb(host, reg, SDHCI_POWER_CONTROL); 60348d685a2SAdrian Hunter } 60448d685a2SAdrian Hunter } 60548d685a2SAdrian Hunter 606bc55dcd8SAdrian Hunter #define INTEL_HS400_ES_REG 0x78 607bc55dcd8SAdrian Hunter #define INTEL_HS400_ES_BIT BIT(0) 608bc55dcd8SAdrian Hunter 609bc55dcd8SAdrian Hunter static void intel_hs400_enhanced_strobe(struct mmc_host *mmc, 610bc55dcd8SAdrian Hunter struct mmc_ios *ios) 611bc55dcd8SAdrian Hunter { 612bc55dcd8SAdrian Hunter struct sdhci_host *host = mmc_priv(mmc); 613bc55dcd8SAdrian Hunter u32 val; 614bc55dcd8SAdrian Hunter 615bc55dcd8SAdrian Hunter val = sdhci_readl(host, INTEL_HS400_ES_REG); 616bc55dcd8SAdrian Hunter if (ios->enhanced_strobe) 617bc55dcd8SAdrian Hunter val |= INTEL_HS400_ES_BIT; 618bc55dcd8SAdrian Hunter else 619bc55dcd8SAdrian Hunter val &= ~INTEL_HS400_ES_BIT; 620bc55dcd8SAdrian Hunter sdhci_writel(host, val, INTEL_HS400_ES_REG); 621bc55dcd8SAdrian Hunter } 622bc55dcd8SAdrian Hunter 6236ae03368SAdrian Hunter static void sdhci_intel_voltage_switch(struct sdhci_host *host) 6246ae03368SAdrian Hunter { 6256ae03368SAdrian Hunter struct sdhci_pci_slot *slot = sdhci_priv(host); 6266ae03368SAdrian Hunter struct intel_host *intel_host = sdhci_pci_priv(slot); 6276ae03368SAdrian Hunter struct device *dev = &slot->chip->pdev->dev; 6286ae03368SAdrian Hunter u32 result = 0; 6296ae03368SAdrian Hunter int err; 6306ae03368SAdrian Hunter 6316ae03368SAdrian Hunter err = intel_dsm(intel_host, dev, INTEL_DSM_V18_SWITCH, &result); 6326ae03368SAdrian Hunter pr_debug("%s: %s DSM error %d result %u\n", 6336ae03368SAdrian Hunter mmc_hostname(host->mmc), __func__, err, result); 6346ae03368SAdrian Hunter } 6356ae03368SAdrian Hunter 63648d685a2SAdrian Hunter static const struct sdhci_ops sdhci_intel_byt_ops = { 63748d685a2SAdrian Hunter .set_clock = sdhci_set_clock, 63848d685a2SAdrian Hunter .set_power = sdhci_intel_set_power, 63948d685a2SAdrian Hunter .enable_dma = sdhci_pci_enable_dma, 640adc16398SMichał Mirosław .set_bus_width = sdhci_set_bus_width, 64148d685a2SAdrian Hunter .reset = sdhci_reset, 64248d685a2SAdrian Hunter .set_uhs_signaling = sdhci_set_uhs_signaling, 64348d685a2SAdrian Hunter .hw_reset = sdhci_pci_hw_reset, 6446ae03368SAdrian Hunter .voltage_switch = sdhci_intel_voltage_switch, 64548d685a2SAdrian Hunter }; 64648d685a2SAdrian Hunter 6478ee82bdaSAdrian Hunter static const struct sdhci_ops sdhci_intel_glk_ops = { 6488ee82bdaSAdrian Hunter .set_clock = sdhci_set_clock, 6498ee82bdaSAdrian Hunter .set_power = sdhci_intel_set_power, 6508ee82bdaSAdrian Hunter .enable_dma = sdhci_pci_enable_dma, 6518ee82bdaSAdrian Hunter .set_bus_width = sdhci_set_bus_width, 6528ee82bdaSAdrian Hunter .reset = sdhci_reset, 6538ee82bdaSAdrian Hunter .set_uhs_signaling = sdhci_set_uhs_signaling, 6548ee82bdaSAdrian Hunter .hw_reset = sdhci_pci_hw_reset, 6558ee82bdaSAdrian Hunter .voltage_switch = sdhci_intel_voltage_switch, 6568ee82bdaSAdrian Hunter .irq = sdhci_cqhci_irq, 6578ee82bdaSAdrian Hunter }; 6588ee82bdaSAdrian Hunter 659c959a6b0SAdrian Hunter static void byt_read_dsm(struct sdhci_pci_slot *slot) 660c959a6b0SAdrian Hunter { 661c959a6b0SAdrian Hunter struct intel_host *intel_host = sdhci_pci_priv(slot); 662c959a6b0SAdrian Hunter struct device *dev = &slot->chip->pdev->dev; 663c959a6b0SAdrian Hunter struct mmc_host *mmc = slot->host->mmc; 664c959a6b0SAdrian Hunter 665c959a6b0SAdrian Hunter intel_dsm_init(intel_host, dev, mmc); 666c959a6b0SAdrian Hunter slot->chip->rpm_retune = intel_host->d3_retune; 667c959a6b0SAdrian Hunter } 668c959a6b0SAdrian Hunter 669f8870ae6SAdrian Hunter static int intel_execute_tuning(struct mmc_host *mmc, u32 opcode) 670f8870ae6SAdrian Hunter { 671f8870ae6SAdrian Hunter int err = sdhci_execute_tuning(mmc, opcode); 672f8870ae6SAdrian Hunter struct sdhci_host *host = mmc_priv(mmc); 673f8870ae6SAdrian Hunter 674f8870ae6SAdrian Hunter if (err) 675f8870ae6SAdrian Hunter return err; 676f8870ae6SAdrian Hunter 677f8870ae6SAdrian Hunter /* 678f8870ae6SAdrian Hunter * Tuning can leave the IP in an active state (Buffer Read Enable bit 679f8870ae6SAdrian Hunter * set) which prevents the entry to low power states (i.e. S0i3). Data 680f8870ae6SAdrian Hunter * reset will clear it. 681f8870ae6SAdrian Hunter */ 682f8870ae6SAdrian Hunter sdhci_reset(host, SDHCI_RESET_DATA); 683f8870ae6SAdrian Hunter 684f8870ae6SAdrian Hunter return 0; 685f8870ae6SAdrian Hunter } 686f8870ae6SAdrian Hunter 687f8870ae6SAdrian Hunter static void byt_probe_slot(struct sdhci_pci_slot *slot) 688f8870ae6SAdrian Hunter { 689f8870ae6SAdrian Hunter struct mmc_host_ops *ops = &slot->host->mmc_host_ops; 690f8870ae6SAdrian Hunter 691f8870ae6SAdrian Hunter byt_read_dsm(slot); 692f8870ae6SAdrian Hunter 693f8870ae6SAdrian Hunter ops->execute_tuning = intel_execute_tuning; 694f8870ae6SAdrian Hunter } 695f8870ae6SAdrian Hunter 696659c9bc1SBen Hutchings static int byt_emmc_probe_slot(struct sdhci_pci_slot *slot) 697659c9bc1SBen Hutchings { 698f8870ae6SAdrian Hunter byt_probe_slot(slot); 699659c9bc1SBen Hutchings slot->host->mmc->caps |= MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE | 700659c9bc1SBen Hutchings MMC_CAP_HW_RESET | MMC_CAP_1_8V_DDR | 70132828857SAdrian Hunter MMC_CAP_CMD_DURING_TFR | 702659c9bc1SBen Hutchings MMC_CAP_WAIT_WHILE_BUSY; 703659c9bc1SBen Hutchings slot->hw_reset = sdhci_pci_int_hw_reset; 704659c9bc1SBen Hutchings if (slot->chip->pdev->device == PCI_DEVICE_ID_INTEL_BSW_EMMC) 705659c9bc1SBen Hutchings slot->host->timeout_clk = 1000; /* 1000 kHz i.e. 1 MHz */ 70651ced59cSAdrian Hunter slot->host->mmc_host_ops.select_drive_strength = 70751ced59cSAdrian Hunter intel_select_drive_strength; 708659c9bc1SBen Hutchings return 0; 709659c9bc1SBen Hutchings } 710659c9bc1SBen Hutchings 711bc55dcd8SAdrian Hunter static int glk_emmc_probe_slot(struct sdhci_pci_slot *slot) 712bc55dcd8SAdrian Hunter { 713bc55dcd8SAdrian Hunter int ret = byt_emmc_probe_slot(slot); 714bc55dcd8SAdrian Hunter 7158ee82bdaSAdrian Hunter slot->host->mmc->caps2 |= MMC_CAP2_CQE; 7168ee82bdaSAdrian Hunter 717bc55dcd8SAdrian Hunter if (slot->chip->pdev->device != PCI_DEVICE_ID_INTEL_GLK_EMMC) { 718bc55dcd8SAdrian Hunter slot->host->mmc->caps2 |= MMC_CAP2_HS400_ES, 719bc55dcd8SAdrian Hunter slot->host->mmc_host_ops.hs400_enhanced_strobe = 720bc55dcd8SAdrian Hunter intel_hs400_enhanced_strobe; 7218ee82bdaSAdrian Hunter slot->host->mmc->caps2 |= MMC_CAP2_CQE_DCMD; 722bc55dcd8SAdrian Hunter } 723bc55dcd8SAdrian Hunter 724bc55dcd8SAdrian Hunter return ret; 725bc55dcd8SAdrian Hunter } 726bc55dcd8SAdrian Hunter 7278ee82bdaSAdrian Hunter static const struct cqhci_host_ops glk_cqhci_ops = { 7287b7d57fdSAdrian Hunter .enable = sdhci_cqe_enable, 7298ee82bdaSAdrian Hunter .disable = sdhci_cqe_disable, 7308ee82bdaSAdrian Hunter .dumpregs = sdhci_pci_dumpregs, 7318ee82bdaSAdrian Hunter }; 7328ee82bdaSAdrian Hunter 7338ee82bdaSAdrian Hunter static int glk_emmc_add_host(struct sdhci_pci_slot *slot) 7348ee82bdaSAdrian Hunter { 7358ee82bdaSAdrian Hunter struct device *dev = &slot->chip->pdev->dev; 7368ee82bdaSAdrian Hunter struct sdhci_host *host = slot->host; 7378ee82bdaSAdrian Hunter struct cqhci_host *cq_host; 7388ee82bdaSAdrian Hunter bool dma64; 7398ee82bdaSAdrian Hunter int ret; 7408ee82bdaSAdrian Hunter 7418ee82bdaSAdrian Hunter ret = sdhci_setup_host(host); 7428ee82bdaSAdrian Hunter if (ret) 7438ee82bdaSAdrian Hunter return ret; 7448ee82bdaSAdrian Hunter 7458ee82bdaSAdrian Hunter cq_host = devm_kzalloc(dev, sizeof(*cq_host), GFP_KERNEL); 7468ee82bdaSAdrian Hunter if (!cq_host) { 7478ee82bdaSAdrian Hunter ret = -ENOMEM; 7488ee82bdaSAdrian Hunter goto cleanup; 7498ee82bdaSAdrian Hunter } 7508ee82bdaSAdrian Hunter 7518ee82bdaSAdrian Hunter cq_host->mmio = host->ioaddr + 0x200; 7528ee82bdaSAdrian Hunter cq_host->quirks |= CQHCI_QUIRK_SHORT_TXFR_DESC_SZ; 7538ee82bdaSAdrian Hunter cq_host->ops = &glk_cqhci_ops; 7548ee82bdaSAdrian Hunter 7558ee82bdaSAdrian Hunter dma64 = host->flags & SDHCI_USE_64_BIT_DMA; 7568ee82bdaSAdrian Hunter if (dma64) 7578ee82bdaSAdrian Hunter cq_host->caps |= CQHCI_TASK_DESC_SZ_128; 7588ee82bdaSAdrian Hunter 7598ee82bdaSAdrian Hunter ret = cqhci_init(cq_host, host->mmc, dma64); 7608ee82bdaSAdrian Hunter if (ret) 7618ee82bdaSAdrian Hunter goto cleanup; 7628ee82bdaSAdrian Hunter 7638ee82bdaSAdrian Hunter ret = __sdhci_add_host(host); 7648ee82bdaSAdrian Hunter if (ret) 7658ee82bdaSAdrian Hunter goto cleanup; 7668ee82bdaSAdrian Hunter 7678ee82bdaSAdrian Hunter return 0; 7688ee82bdaSAdrian Hunter 7698ee82bdaSAdrian Hunter cleanup: 7708ee82bdaSAdrian Hunter sdhci_cleanup_host(host); 7718ee82bdaSAdrian Hunter return ret; 7728ee82bdaSAdrian Hunter } 7738ee82bdaSAdrian Hunter 7743f23df72SZach Brown #ifdef CONFIG_ACPI 7753f23df72SZach Brown static int ni_set_max_freq(struct sdhci_pci_slot *slot) 7763f23df72SZach Brown { 7773f23df72SZach Brown acpi_status status; 7783f23df72SZach Brown unsigned long long max_freq; 7793f23df72SZach Brown 7803f23df72SZach Brown status = acpi_evaluate_integer(ACPI_HANDLE(&slot->chip->pdev->dev), 7813f23df72SZach Brown "MXFQ", NULL, &max_freq); 7823f23df72SZach Brown if (ACPI_FAILURE(status)) { 7833f23df72SZach Brown dev_err(&slot->chip->pdev->dev, 7843f23df72SZach Brown "MXFQ not found in acpi table\n"); 7853f23df72SZach Brown return -EINVAL; 7863f23df72SZach Brown } 7873f23df72SZach Brown 7883f23df72SZach Brown slot->host->mmc->f_max = max_freq * 1000000; 7893f23df72SZach Brown 7903f23df72SZach Brown return 0; 7913f23df72SZach Brown } 7923f23df72SZach Brown #else 7933f23df72SZach Brown static inline int ni_set_max_freq(struct sdhci_pci_slot *slot) 7943f23df72SZach Brown { 7953f23df72SZach Brown return 0; 7963f23df72SZach Brown } 7973f23df72SZach Brown #endif 7983f23df72SZach Brown 79942b06496SZach Brown static int ni_byt_sdio_probe_slot(struct sdhci_pci_slot *slot) 80042b06496SZach Brown { 8013f23df72SZach Brown int err; 8023f23df72SZach Brown 803f8870ae6SAdrian Hunter byt_probe_slot(slot); 804c959a6b0SAdrian Hunter 8053f23df72SZach Brown err = ni_set_max_freq(slot); 8063f23df72SZach Brown if (err) 8073f23df72SZach Brown return err; 8083f23df72SZach Brown 80942b06496SZach Brown slot->host->mmc->caps |= MMC_CAP_POWER_OFF_CARD | MMC_CAP_NONREMOVABLE | 81042b06496SZach Brown MMC_CAP_WAIT_WHILE_BUSY; 81142b06496SZach Brown return 0; 81242b06496SZach Brown } 81342b06496SZach Brown 814659c9bc1SBen Hutchings static int byt_sdio_probe_slot(struct sdhci_pci_slot *slot) 815659c9bc1SBen Hutchings { 816f8870ae6SAdrian Hunter byt_probe_slot(slot); 817659c9bc1SBen Hutchings slot->host->mmc->caps |= MMC_CAP_POWER_OFF_CARD | MMC_CAP_NONREMOVABLE | 818659c9bc1SBen Hutchings MMC_CAP_WAIT_WHILE_BUSY; 819659c9bc1SBen Hutchings return 0; 820659c9bc1SBen Hutchings } 821659c9bc1SBen Hutchings 822659c9bc1SBen Hutchings static int byt_sd_probe_slot(struct sdhci_pci_slot *slot) 823659c9bc1SBen Hutchings { 824f8870ae6SAdrian Hunter byt_probe_slot(slot); 825c2c49a2eSAzhar Shaikh slot->host->mmc->caps |= MMC_CAP_WAIT_WHILE_BUSY | 8266cf4156cSAdrian Hunter MMC_CAP_AGGRESSIVE_PM | MMC_CAP_CD_WAKE; 827659c9bc1SBen Hutchings slot->cd_idx = 0; 828659c9bc1SBen Hutchings slot->cd_override_level = true; 829163cbe31SAdrian Hunter if (slot->chip->pdev->device == PCI_DEVICE_ID_INTEL_BXT_SD || 83001d6b2a4SAdrian Hunter slot->chip->pdev->device == PCI_DEVICE_ID_INTEL_BXTM_SD || 8312d1956d0SAdrian Hunter slot->chip->pdev->device == PCI_DEVICE_ID_INTEL_APL_SD || 832c2c49a2eSAzhar Shaikh slot->chip->pdev->device == PCI_DEVICE_ID_INTEL_GLK_SD) 833163cbe31SAdrian Hunter slot->host->mmc_host_ops.get_cd = bxt_get_cd; 834163cbe31SAdrian Hunter 835bb26b841SKyle Roeschley if (slot->chip->pdev->subsystem_vendor == PCI_VENDOR_ID_NI && 836bb26b841SKyle Roeschley slot->chip->pdev->subsystem_device == PCI_SUBDEVICE_ID_NI_78E3) 837bb26b841SKyle Roeschley slot->host->mmc->caps2 |= MMC_CAP2_AVOID_3_3V; 838bb26b841SKyle Roeschley 839659c9bc1SBen Hutchings return 0; 840659c9bc1SBen Hutchings } 841659c9bc1SBen Hutchings 842659c9bc1SBen Hutchings static const struct sdhci_pci_fixes sdhci_intel_byt_emmc = { 843659c9bc1SBen Hutchings .allow_runtime_pm = true, 844659c9bc1SBen Hutchings .probe_slot = byt_emmc_probe_slot, 845659c9bc1SBen Hutchings .quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC, 846659c9bc1SBen Hutchings .quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN | 847659c9bc1SBen Hutchings SDHCI_QUIRK2_CAPS_BIT63_FOR_HS400 | 848659c9bc1SBen Hutchings SDHCI_QUIRK2_STOP_WITH_TC, 849fee686b7SAdrian Hunter .ops = &sdhci_intel_byt_ops, 850c959a6b0SAdrian Hunter .priv_size = sizeof(struct intel_host), 851659c9bc1SBen Hutchings }; 852659c9bc1SBen Hutchings 853bc55dcd8SAdrian Hunter static const struct sdhci_pci_fixes sdhci_intel_glk_emmc = { 854bc55dcd8SAdrian Hunter .allow_runtime_pm = true, 855bc55dcd8SAdrian Hunter .probe_slot = glk_emmc_probe_slot, 8568ee82bdaSAdrian Hunter .add_host = glk_emmc_add_host, 8578ee82bdaSAdrian Hunter #ifdef CONFIG_PM_SLEEP 8588ee82bdaSAdrian Hunter .suspend = sdhci_cqhci_suspend, 8598ee82bdaSAdrian Hunter .resume = sdhci_cqhci_resume, 8608ee82bdaSAdrian Hunter #endif 8618ee82bdaSAdrian Hunter #ifdef CONFIG_PM 8628ee82bdaSAdrian Hunter .runtime_suspend = sdhci_cqhci_runtime_suspend, 8638ee82bdaSAdrian Hunter .runtime_resume = sdhci_cqhci_runtime_resume, 8648ee82bdaSAdrian Hunter #endif 865bc55dcd8SAdrian Hunter .quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC, 866bc55dcd8SAdrian Hunter .quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN | 867bc55dcd8SAdrian Hunter SDHCI_QUIRK2_CAPS_BIT63_FOR_HS400 | 868bc55dcd8SAdrian Hunter SDHCI_QUIRK2_STOP_WITH_TC, 8698ee82bdaSAdrian Hunter .ops = &sdhci_intel_glk_ops, 870bc55dcd8SAdrian Hunter .priv_size = sizeof(struct intel_host), 871bc55dcd8SAdrian Hunter }; 872bc55dcd8SAdrian Hunter 87342b06496SZach Brown static const struct sdhci_pci_fixes sdhci_ni_byt_sdio = { 87442b06496SZach Brown .quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC, 87542b06496SZach Brown .quirks2 = SDHCI_QUIRK2_HOST_OFF_CARD_ON | 87642b06496SZach Brown SDHCI_QUIRK2_PRESET_VALUE_BROKEN, 87742b06496SZach Brown .allow_runtime_pm = true, 87842b06496SZach Brown .probe_slot = ni_byt_sdio_probe_slot, 87942b06496SZach Brown .ops = &sdhci_intel_byt_ops, 880c959a6b0SAdrian Hunter .priv_size = sizeof(struct intel_host), 88142b06496SZach Brown }; 88242b06496SZach Brown 883659c9bc1SBen Hutchings static const struct sdhci_pci_fixes sdhci_intel_byt_sdio = { 884659c9bc1SBen Hutchings .quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC, 885659c9bc1SBen Hutchings .quirks2 = SDHCI_QUIRK2_HOST_OFF_CARD_ON | 886659c9bc1SBen Hutchings SDHCI_QUIRK2_PRESET_VALUE_BROKEN, 887659c9bc1SBen Hutchings .allow_runtime_pm = true, 888659c9bc1SBen Hutchings .probe_slot = byt_sdio_probe_slot, 889fee686b7SAdrian Hunter .ops = &sdhci_intel_byt_ops, 890c959a6b0SAdrian Hunter .priv_size = sizeof(struct intel_host), 891659c9bc1SBen Hutchings }; 892659c9bc1SBen Hutchings 893659c9bc1SBen Hutchings static const struct sdhci_pci_fixes sdhci_intel_byt_sd = { 894659c9bc1SBen Hutchings .quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC, 895659c9bc1SBen Hutchings .quirks2 = SDHCI_QUIRK2_CARD_ON_NEEDS_BUS_ON | 896659c9bc1SBen Hutchings SDHCI_QUIRK2_PRESET_VALUE_BROKEN | 897659c9bc1SBen Hutchings SDHCI_QUIRK2_STOP_WITH_TC, 898659c9bc1SBen Hutchings .allow_runtime_pm = true, 899659c9bc1SBen Hutchings .own_cd_for_runtime_pm = true, 900659c9bc1SBen Hutchings .probe_slot = byt_sd_probe_slot, 901fee686b7SAdrian Hunter .ops = &sdhci_intel_byt_ops, 902c959a6b0SAdrian Hunter .priv_size = sizeof(struct intel_host), 903659c9bc1SBen Hutchings }; 904659c9bc1SBen Hutchings 905659c9bc1SBen Hutchings /* Define Host controllers for Intel Merrifield platform */ 9061f64cec2SAndy Shevchenko #define INTEL_MRFLD_EMMC_0 0 9071f64cec2SAndy Shevchenko #define INTEL_MRFLD_EMMC_1 1 9084674b6c8SAndy Shevchenko #define INTEL_MRFLD_SD 2 909d5565577SAndy Shevchenko #define INTEL_MRFLD_SDIO 3 910659c9bc1SBen Hutchings 9110e39220eSAndy Shevchenko #ifdef CONFIG_ACPI 9120e39220eSAndy Shevchenko static void intel_mrfld_mmc_fix_up_power_slot(struct sdhci_pci_slot *slot) 9130e39220eSAndy Shevchenko { 9140e39220eSAndy Shevchenko struct acpi_device *device, *child; 9150e39220eSAndy Shevchenko 9160e39220eSAndy Shevchenko device = ACPI_COMPANION(&slot->chip->pdev->dev); 9170e39220eSAndy Shevchenko if (!device) 9180e39220eSAndy Shevchenko return; 9190e39220eSAndy Shevchenko 9200e39220eSAndy Shevchenko acpi_device_fix_up_power(device); 9210e39220eSAndy Shevchenko list_for_each_entry(child, &device->children, node) 9220e39220eSAndy Shevchenko if (child->status.present && child->status.enabled) 9230e39220eSAndy Shevchenko acpi_device_fix_up_power(child); 9240e39220eSAndy Shevchenko } 9250e39220eSAndy Shevchenko #else 9260e39220eSAndy Shevchenko static inline void intel_mrfld_mmc_fix_up_power_slot(struct sdhci_pci_slot *slot) {} 9270e39220eSAndy Shevchenko #endif 9280e39220eSAndy Shevchenko 9291f64cec2SAndy Shevchenko static int intel_mrfld_mmc_probe_slot(struct sdhci_pci_slot *slot) 930659c9bc1SBen Hutchings { 9312e57bbe2SAndy Shevchenko unsigned int func = PCI_FUNC(slot->chip->pdev->devfn); 9322e57bbe2SAndy Shevchenko 9332e57bbe2SAndy Shevchenko switch (func) { 9342e57bbe2SAndy Shevchenko case INTEL_MRFLD_EMMC_0: 9352e57bbe2SAndy Shevchenko case INTEL_MRFLD_EMMC_1: 9362e57bbe2SAndy Shevchenko slot->host->mmc->caps |= MMC_CAP_NONREMOVABLE | 9372e57bbe2SAndy Shevchenko MMC_CAP_8_BIT_DATA | 9382e57bbe2SAndy Shevchenko MMC_CAP_1_8V_DDR; 9392e57bbe2SAndy Shevchenko break; 9404674b6c8SAndy Shevchenko case INTEL_MRFLD_SD: 9414674b6c8SAndy Shevchenko slot->host->quirks2 |= SDHCI_QUIRK2_NO_1_8_V; 9424674b6c8SAndy Shevchenko break; 943d5565577SAndy Shevchenko case INTEL_MRFLD_SDIO: 9442a609abeSAndy Shevchenko /* Advertise 2.0v for compatibility with the SDIO card's OCR */ 9452a609abeSAndy Shevchenko slot->host->ocr_mask = MMC_VDD_20_21 | MMC_VDD_165_195; 946d5565577SAndy Shevchenko slot->host->mmc->caps |= MMC_CAP_NONREMOVABLE | 947d5565577SAndy Shevchenko MMC_CAP_POWER_OFF_CARD; 948d5565577SAndy Shevchenko break; 9492e57bbe2SAndy Shevchenko default: 950659c9bc1SBen Hutchings return -ENODEV; 9512e57bbe2SAndy Shevchenko } 9520e39220eSAndy Shevchenko 9530e39220eSAndy Shevchenko intel_mrfld_mmc_fix_up_power_slot(slot); 954659c9bc1SBen Hutchings return 0; 955659c9bc1SBen Hutchings } 956659c9bc1SBen Hutchings 9571f64cec2SAndy Shevchenko static const struct sdhci_pci_fixes sdhci_intel_mrfld_mmc = { 958659c9bc1SBen Hutchings .quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC, 959659c9bc1SBen Hutchings .quirks2 = SDHCI_QUIRK2_BROKEN_HS200 | 960659c9bc1SBen Hutchings SDHCI_QUIRK2_PRESET_VALUE_BROKEN, 961659c9bc1SBen Hutchings .allow_runtime_pm = true, 9621f64cec2SAndy Shevchenko .probe_slot = intel_mrfld_mmc_probe_slot, 963659c9bc1SBen Hutchings }; 964659c9bc1SBen Hutchings 965659c9bc1SBen Hutchings static int jmicron_pmos(struct sdhci_pci_chip *chip, int on) 966659c9bc1SBen Hutchings { 967659c9bc1SBen Hutchings u8 scratch; 968659c9bc1SBen Hutchings int ret; 969659c9bc1SBen Hutchings 970659c9bc1SBen Hutchings ret = pci_read_config_byte(chip->pdev, 0xAE, &scratch); 971659c9bc1SBen Hutchings if (ret) 972659c9bc1SBen Hutchings return ret; 973659c9bc1SBen Hutchings 974659c9bc1SBen Hutchings /* 975659c9bc1SBen Hutchings * Turn PMOS on [bit 0], set over current detection to 2.4 V 976659c9bc1SBen Hutchings * [bit 1:2] and enable over current debouncing [bit 6]. 977659c9bc1SBen Hutchings */ 978659c9bc1SBen Hutchings if (on) 979659c9bc1SBen Hutchings scratch |= 0x47; 980659c9bc1SBen Hutchings else 981659c9bc1SBen Hutchings scratch &= ~0x47; 982659c9bc1SBen Hutchings 9837582041fSkbuild test robot return pci_write_config_byte(chip->pdev, 0xAE, scratch); 984659c9bc1SBen Hutchings } 985659c9bc1SBen Hutchings 986659c9bc1SBen Hutchings static int jmicron_probe(struct sdhci_pci_chip *chip) 987659c9bc1SBen Hutchings { 988659c9bc1SBen Hutchings int ret; 989659c9bc1SBen Hutchings u16 mmcdev = 0; 990659c9bc1SBen Hutchings 991659c9bc1SBen Hutchings if (chip->pdev->revision == 0) { 992659c9bc1SBen Hutchings chip->quirks |= SDHCI_QUIRK_32BIT_DMA_ADDR | 993659c9bc1SBen Hutchings SDHCI_QUIRK_32BIT_DMA_SIZE | 994659c9bc1SBen Hutchings SDHCI_QUIRK_32BIT_ADMA_SIZE | 995659c9bc1SBen Hutchings SDHCI_QUIRK_RESET_AFTER_REQUEST | 996659c9bc1SBen Hutchings SDHCI_QUIRK_BROKEN_SMALL_PIO; 997659c9bc1SBen Hutchings } 998659c9bc1SBen Hutchings 999659c9bc1SBen Hutchings /* 1000659c9bc1SBen Hutchings * JMicron chips can have two interfaces to the same hardware 1001659c9bc1SBen Hutchings * in order to work around limitations in Microsoft's driver. 1002659c9bc1SBen Hutchings * We need to make sure we only bind to one of them. 1003659c9bc1SBen Hutchings * 1004659c9bc1SBen Hutchings * This code assumes two things: 1005659c9bc1SBen Hutchings * 1006659c9bc1SBen Hutchings * 1. The PCI code adds subfunctions in order. 1007659c9bc1SBen Hutchings * 1008659c9bc1SBen Hutchings * 2. The MMC interface has a lower subfunction number 1009659c9bc1SBen Hutchings * than the SD interface. 1010659c9bc1SBen Hutchings */ 1011659c9bc1SBen Hutchings if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_SD) 1012659c9bc1SBen Hutchings mmcdev = PCI_DEVICE_ID_JMICRON_JMB38X_MMC; 1013659c9bc1SBen Hutchings else if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_SD) 1014659c9bc1SBen Hutchings mmcdev = PCI_DEVICE_ID_JMICRON_JMB388_ESD; 1015659c9bc1SBen Hutchings 1016659c9bc1SBen Hutchings if (mmcdev) { 1017659c9bc1SBen Hutchings struct pci_dev *sd_dev; 1018659c9bc1SBen Hutchings 1019659c9bc1SBen Hutchings sd_dev = NULL; 1020659c9bc1SBen Hutchings while ((sd_dev = pci_get_device(PCI_VENDOR_ID_JMICRON, 1021659c9bc1SBen Hutchings mmcdev, sd_dev)) != NULL) { 1022659c9bc1SBen Hutchings if ((PCI_SLOT(chip->pdev->devfn) == 1023659c9bc1SBen Hutchings PCI_SLOT(sd_dev->devfn)) && 1024659c9bc1SBen Hutchings (chip->pdev->bus == sd_dev->bus)) 1025659c9bc1SBen Hutchings break; 1026659c9bc1SBen Hutchings } 1027659c9bc1SBen Hutchings 1028659c9bc1SBen Hutchings if (sd_dev) { 1029659c9bc1SBen Hutchings pci_dev_put(sd_dev); 1030659c9bc1SBen Hutchings dev_info(&chip->pdev->dev, "Refusing to bind to " 1031659c9bc1SBen Hutchings "secondary interface.\n"); 1032659c9bc1SBen Hutchings return -ENODEV; 1033659c9bc1SBen Hutchings } 1034659c9bc1SBen Hutchings } 1035659c9bc1SBen Hutchings 1036659c9bc1SBen Hutchings /* 1037659c9bc1SBen Hutchings * JMicron chips need a bit of a nudge to enable the power 1038659c9bc1SBen Hutchings * output pins. 1039659c9bc1SBen Hutchings */ 1040659c9bc1SBen Hutchings ret = jmicron_pmos(chip, 1); 1041659c9bc1SBen Hutchings if (ret) { 1042659c9bc1SBen Hutchings dev_err(&chip->pdev->dev, "Failure enabling card power\n"); 1043659c9bc1SBen Hutchings return ret; 1044659c9bc1SBen Hutchings } 1045659c9bc1SBen Hutchings 1046659c9bc1SBen Hutchings /* quirk for unsable RO-detection on JM388 chips */ 1047659c9bc1SBen Hutchings if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_SD || 1048659c9bc1SBen Hutchings chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD) 1049659c9bc1SBen Hutchings chip->quirks |= SDHCI_QUIRK_UNSTABLE_RO_DETECT; 1050659c9bc1SBen Hutchings 1051659c9bc1SBen Hutchings return 0; 1052659c9bc1SBen Hutchings } 1053659c9bc1SBen Hutchings 1054659c9bc1SBen Hutchings static void jmicron_enable_mmc(struct sdhci_host *host, int on) 1055659c9bc1SBen Hutchings { 1056659c9bc1SBen Hutchings u8 scratch; 1057659c9bc1SBen Hutchings 1058659c9bc1SBen Hutchings scratch = readb(host->ioaddr + 0xC0); 1059659c9bc1SBen Hutchings 1060659c9bc1SBen Hutchings if (on) 1061659c9bc1SBen Hutchings scratch |= 0x01; 1062659c9bc1SBen Hutchings else 1063659c9bc1SBen Hutchings scratch &= ~0x01; 1064659c9bc1SBen Hutchings 1065659c9bc1SBen Hutchings writeb(scratch, host->ioaddr + 0xC0); 1066659c9bc1SBen Hutchings } 1067659c9bc1SBen Hutchings 1068659c9bc1SBen Hutchings static int jmicron_probe_slot(struct sdhci_pci_slot *slot) 1069659c9bc1SBen Hutchings { 1070659c9bc1SBen Hutchings if (slot->chip->pdev->revision == 0) { 1071659c9bc1SBen Hutchings u16 version; 1072659c9bc1SBen Hutchings 1073659c9bc1SBen Hutchings version = readl(slot->host->ioaddr + SDHCI_HOST_VERSION); 1074659c9bc1SBen Hutchings version = (version & SDHCI_VENDOR_VER_MASK) >> 1075659c9bc1SBen Hutchings SDHCI_VENDOR_VER_SHIFT; 1076659c9bc1SBen Hutchings 1077659c9bc1SBen Hutchings /* 1078659c9bc1SBen Hutchings * Older versions of the chip have lots of nasty glitches 1079659c9bc1SBen Hutchings * in the ADMA engine. It's best just to avoid it 1080659c9bc1SBen Hutchings * completely. 1081659c9bc1SBen Hutchings */ 1082659c9bc1SBen Hutchings if (version < 0xAC) 1083659c9bc1SBen Hutchings slot->host->quirks |= SDHCI_QUIRK_BROKEN_ADMA; 1084659c9bc1SBen Hutchings } 1085659c9bc1SBen Hutchings 1086659c9bc1SBen Hutchings /* JM388 MMC doesn't support 1.8V while SD supports it */ 1087659c9bc1SBen Hutchings if (slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD) { 1088659c9bc1SBen Hutchings slot->host->ocr_avail_sd = MMC_VDD_32_33 | MMC_VDD_33_34 | 1089659c9bc1SBen Hutchings MMC_VDD_29_30 | MMC_VDD_30_31 | 1090659c9bc1SBen Hutchings MMC_VDD_165_195; /* allow 1.8V */ 1091659c9bc1SBen Hutchings slot->host->ocr_avail_mmc = MMC_VDD_32_33 | MMC_VDD_33_34 | 1092659c9bc1SBen Hutchings MMC_VDD_29_30 | MMC_VDD_30_31; /* no 1.8V for MMC */ 1093659c9bc1SBen Hutchings } 1094659c9bc1SBen Hutchings 1095659c9bc1SBen Hutchings /* 1096659c9bc1SBen Hutchings * The secondary interface requires a bit set to get the 1097659c9bc1SBen Hutchings * interrupts. 1098659c9bc1SBen Hutchings */ 1099659c9bc1SBen Hutchings if (slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC || 1100659c9bc1SBen Hutchings slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD) 1101659c9bc1SBen Hutchings jmicron_enable_mmc(slot->host, 1); 1102659c9bc1SBen Hutchings 1103659c9bc1SBen Hutchings slot->host->mmc->caps |= MMC_CAP_BUS_WIDTH_TEST; 1104659c9bc1SBen Hutchings 1105659c9bc1SBen Hutchings return 0; 1106659c9bc1SBen Hutchings } 1107659c9bc1SBen Hutchings 1108659c9bc1SBen Hutchings static void jmicron_remove_slot(struct sdhci_pci_slot *slot, int dead) 1109659c9bc1SBen Hutchings { 1110659c9bc1SBen Hutchings if (dead) 1111659c9bc1SBen Hutchings return; 1112659c9bc1SBen Hutchings 1113659c9bc1SBen Hutchings if (slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC || 1114659c9bc1SBen Hutchings slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD) 1115659c9bc1SBen Hutchings jmicron_enable_mmc(slot->host, 0); 1116659c9bc1SBen Hutchings } 1117659c9bc1SBen Hutchings 1118b7813f0fSAdrian Hunter #ifdef CONFIG_PM_SLEEP 1119659c9bc1SBen Hutchings static int jmicron_suspend(struct sdhci_pci_chip *chip) 1120659c9bc1SBen Hutchings { 112130cf2803SAdrian Hunter int i, ret; 112230cf2803SAdrian Hunter 11235c3c6126SAdrian Hunter ret = sdhci_pci_suspend_host(chip); 112430cf2803SAdrian Hunter if (ret) 112530cf2803SAdrian Hunter return ret; 1126659c9bc1SBen Hutchings 1127659c9bc1SBen Hutchings if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC || 1128659c9bc1SBen Hutchings chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD) { 1129659c9bc1SBen Hutchings for (i = 0; i < chip->num_slots; i++) 1130659c9bc1SBen Hutchings jmicron_enable_mmc(chip->slots[i]->host, 0); 1131659c9bc1SBen Hutchings } 1132659c9bc1SBen Hutchings 1133659c9bc1SBen Hutchings return 0; 1134659c9bc1SBen Hutchings } 1135659c9bc1SBen Hutchings 1136659c9bc1SBen Hutchings static int jmicron_resume(struct sdhci_pci_chip *chip) 1137659c9bc1SBen Hutchings { 1138659c9bc1SBen Hutchings int ret, i; 1139659c9bc1SBen Hutchings 1140659c9bc1SBen Hutchings if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC || 1141659c9bc1SBen Hutchings chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD) { 1142659c9bc1SBen Hutchings for (i = 0; i < chip->num_slots; i++) 1143659c9bc1SBen Hutchings jmicron_enable_mmc(chip->slots[i]->host, 1); 1144659c9bc1SBen Hutchings } 1145659c9bc1SBen Hutchings 1146659c9bc1SBen Hutchings ret = jmicron_pmos(chip, 1); 1147659c9bc1SBen Hutchings if (ret) { 1148659c9bc1SBen Hutchings dev_err(&chip->pdev->dev, "Failure enabling card power\n"); 1149659c9bc1SBen Hutchings return ret; 1150659c9bc1SBen Hutchings } 1151659c9bc1SBen Hutchings 115230cf2803SAdrian Hunter return sdhci_pci_resume_host(chip); 1153659c9bc1SBen Hutchings } 1154b7813f0fSAdrian Hunter #endif 1155659c9bc1SBen Hutchings 1156659c9bc1SBen Hutchings static const struct sdhci_pci_fixes sdhci_o2 = { 1157659c9bc1SBen Hutchings .probe = sdhci_pci_o2_probe, 1158659c9bc1SBen Hutchings .quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC, 1159659c9bc1SBen Hutchings .quirks2 = SDHCI_QUIRK2_CLEAR_TRANSFERMODE_REG_BEFORE_CMD, 1160659c9bc1SBen Hutchings .probe_slot = sdhci_pci_o2_probe_slot, 1161b7813f0fSAdrian Hunter #ifdef CONFIG_PM_SLEEP 1162659c9bc1SBen Hutchings .resume = sdhci_pci_o2_resume, 1163b7813f0fSAdrian Hunter #endif 1164659c9bc1SBen Hutchings }; 1165659c9bc1SBen Hutchings 1166659c9bc1SBen Hutchings static const struct sdhci_pci_fixes sdhci_jmicron = { 1167659c9bc1SBen Hutchings .probe = jmicron_probe, 1168659c9bc1SBen Hutchings 1169659c9bc1SBen Hutchings .probe_slot = jmicron_probe_slot, 1170659c9bc1SBen Hutchings .remove_slot = jmicron_remove_slot, 1171659c9bc1SBen Hutchings 1172b7813f0fSAdrian Hunter #ifdef CONFIG_PM_SLEEP 1173659c9bc1SBen Hutchings .suspend = jmicron_suspend, 1174659c9bc1SBen Hutchings .resume = jmicron_resume, 1175b7813f0fSAdrian Hunter #endif 1176659c9bc1SBen Hutchings }; 1177659c9bc1SBen Hutchings 1178659c9bc1SBen Hutchings /* SysKonnect CardBus2SDIO extra registers */ 1179659c9bc1SBen Hutchings #define SYSKT_CTRL 0x200 1180659c9bc1SBen Hutchings #define SYSKT_RDFIFO_STAT 0x204 1181659c9bc1SBen Hutchings #define SYSKT_WRFIFO_STAT 0x208 1182659c9bc1SBen Hutchings #define SYSKT_POWER_DATA 0x20c 1183659c9bc1SBen Hutchings #define SYSKT_POWER_330 0xef 1184659c9bc1SBen Hutchings #define SYSKT_POWER_300 0xf8 1185659c9bc1SBen Hutchings #define SYSKT_POWER_184 0xcc 1186659c9bc1SBen Hutchings #define SYSKT_POWER_CMD 0x20d 1187659c9bc1SBen Hutchings #define SYSKT_POWER_START (1 << 7) 1188659c9bc1SBen Hutchings #define SYSKT_POWER_STATUS 0x20e 1189659c9bc1SBen Hutchings #define SYSKT_POWER_STATUS_OK (1 << 0) 1190659c9bc1SBen Hutchings #define SYSKT_BOARD_REV 0x210 1191659c9bc1SBen Hutchings #define SYSKT_CHIP_REV 0x211 1192659c9bc1SBen Hutchings #define SYSKT_CONF_DATA 0x212 1193659c9bc1SBen Hutchings #define SYSKT_CONF_DATA_1V8 (1 << 2) 1194659c9bc1SBen Hutchings #define SYSKT_CONF_DATA_2V5 (1 << 1) 1195659c9bc1SBen Hutchings #define SYSKT_CONF_DATA_3V3 (1 << 0) 1196659c9bc1SBen Hutchings 1197659c9bc1SBen Hutchings static int syskt_probe(struct sdhci_pci_chip *chip) 1198659c9bc1SBen Hutchings { 1199659c9bc1SBen Hutchings if ((chip->pdev->class & 0x0000FF) == PCI_SDHCI_IFVENDOR) { 1200659c9bc1SBen Hutchings chip->pdev->class &= ~0x0000FF; 1201659c9bc1SBen Hutchings chip->pdev->class |= PCI_SDHCI_IFDMA; 1202659c9bc1SBen Hutchings } 1203659c9bc1SBen Hutchings return 0; 1204659c9bc1SBen Hutchings } 1205659c9bc1SBen Hutchings 1206659c9bc1SBen Hutchings static int syskt_probe_slot(struct sdhci_pci_slot *slot) 1207659c9bc1SBen Hutchings { 1208659c9bc1SBen Hutchings int tm, ps; 1209659c9bc1SBen Hutchings 1210659c9bc1SBen Hutchings u8 board_rev = readb(slot->host->ioaddr + SYSKT_BOARD_REV); 1211659c9bc1SBen Hutchings u8 chip_rev = readb(slot->host->ioaddr + SYSKT_CHIP_REV); 1212659c9bc1SBen Hutchings dev_info(&slot->chip->pdev->dev, "SysKonnect CardBus2SDIO, " 1213659c9bc1SBen Hutchings "board rev %d.%d, chip rev %d.%d\n", 1214659c9bc1SBen Hutchings board_rev >> 4, board_rev & 0xf, 1215659c9bc1SBen Hutchings chip_rev >> 4, chip_rev & 0xf); 1216659c9bc1SBen Hutchings if (chip_rev >= 0x20) 1217659c9bc1SBen Hutchings slot->host->quirks |= SDHCI_QUIRK_FORCE_DMA; 1218659c9bc1SBen Hutchings 1219659c9bc1SBen Hutchings writeb(SYSKT_POWER_330, slot->host->ioaddr + SYSKT_POWER_DATA); 1220659c9bc1SBen Hutchings writeb(SYSKT_POWER_START, slot->host->ioaddr + SYSKT_POWER_CMD); 1221659c9bc1SBen Hutchings udelay(50); 1222659c9bc1SBen Hutchings tm = 10; /* Wait max 1 ms */ 1223659c9bc1SBen Hutchings do { 1224659c9bc1SBen Hutchings ps = readw(slot->host->ioaddr + SYSKT_POWER_STATUS); 1225659c9bc1SBen Hutchings if (ps & SYSKT_POWER_STATUS_OK) 1226659c9bc1SBen Hutchings break; 1227659c9bc1SBen Hutchings udelay(100); 1228659c9bc1SBen Hutchings } while (--tm); 1229659c9bc1SBen Hutchings if (!tm) { 1230659c9bc1SBen Hutchings dev_err(&slot->chip->pdev->dev, 1231659c9bc1SBen Hutchings "power regulator never stabilized"); 1232659c9bc1SBen Hutchings writeb(0, slot->host->ioaddr + SYSKT_POWER_CMD); 1233659c9bc1SBen Hutchings return -ENODEV; 1234659c9bc1SBen Hutchings } 1235659c9bc1SBen Hutchings 1236659c9bc1SBen Hutchings return 0; 1237659c9bc1SBen Hutchings } 1238659c9bc1SBen Hutchings 1239659c9bc1SBen Hutchings static const struct sdhci_pci_fixes sdhci_syskt = { 1240659c9bc1SBen Hutchings .quirks = SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER, 1241659c9bc1SBen Hutchings .probe = syskt_probe, 1242659c9bc1SBen Hutchings .probe_slot = syskt_probe_slot, 1243659c9bc1SBen Hutchings }; 1244659c9bc1SBen Hutchings 1245659c9bc1SBen Hutchings static int via_probe(struct sdhci_pci_chip *chip) 1246659c9bc1SBen Hutchings { 1247659c9bc1SBen Hutchings if (chip->pdev->revision == 0x10) 1248659c9bc1SBen Hutchings chip->quirks |= SDHCI_QUIRK_DELAY_AFTER_POWER; 1249659c9bc1SBen Hutchings 1250659c9bc1SBen Hutchings return 0; 1251659c9bc1SBen Hutchings } 1252659c9bc1SBen Hutchings 1253659c9bc1SBen Hutchings static const struct sdhci_pci_fixes sdhci_via = { 1254659c9bc1SBen Hutchings .probe = via_probe, 1255659c9bc1SBen Hutchings }; 1256659c9bc1SBen Hutchings 1257659c9bc1SBen Hutchings static int rtsx_probe_slot(struct sdhci_pci_slot *slot) 1258659c9bc1SBen Hutchings { 1259659c9bc1SBen Hutchings slot->host->mmc->caps2 |= MMC_CAP2_HS200; 1260659c9bc1SBen Hutchings return 0; 1261659c9bc1SBen Hutchings } 1262659c9bc1SBen Hutchings 1263659c9bc1SBen Hutchings static const struct sdhci_pci_fixes sdhci_rtsx = { 1264659c9bc1SBen Hutchings .quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN | 1265659c9bc1SBen Hutchings SDHCI_QUIRK2_BROKEN_64_BIT_DMA | 1266659c9bc1SBen Hutchings SDHCI_QUIRK2_BROKEN_DDR50, 1267659c9bc1SBen Hutchings .probe_slot = rtsx_probe_slot, 1268659c9bc1SBen Hutchings }; 1269659c9bc1SBen Hutchings 1270659c9bc1SBen Hutchings /*AMD chipset generation*/ 1271659c9bc1SBen Hutchings enum amd_chipset_gen { 1272659c9bc1SBen Hutchings AMD_CHIPSET_BEFORE_ML, 1273659c9bc1SBen Hutchings AMD_CHIPSET_CZ, 1274659c9bc1SBen Hutchings AMD_CHIPSET_NL, 1275659c9bc1SBen Hutchings AMD_CHIPSET_UNKNOWN, 1276659c9bc1SBen Hutchings }; 1277659c9bc1SBen Hutchings 1278c31165d7SShyam Sundar S K /* AMD registers */ 1279c31165d7SShyam Sundar S K #define AMD_SD_AUTO_PATTERN 0xB8 1280c31165d7SShyam Sundar S K #define AMD_MSLEEP_DURATION 4 1281c31165d7SShyam Sundar S K #define AMD_SD_MISC_CONTROL 0xD0 1282c31165d7SShyam Sundar S K #define AMD_MAX_TUNE_VALUE 0x0B 1283c31165d7SShyam Sundar S K #define AMD_AUTO_TUNE_SEL 0x10800 1284c31165d7SShyam Sundar S K #define AMD_FIFO_PTR 0x30 1285c31165d7SShyam Sundar S K #define AMD_BIT_MASK 0x1F 1286c31165d7SShyam Sundar S K 1287c31165d7SShyam Sundar S K static void amd_tuning_reset(struct sdhci_host *host) 1288c31165d7SShyam Sundar S K { 1289c31165d7SShyam Sundar S K unsigned int val; 1290c31165d7SShyam Sundar S K 1291c31165d7SShyam Sundar S K val = sdhci_readw(host, SDHCI_HOST_CONTROL2); 1292c31165d7SShyam Sundar S K val |= SDHCI_CTRL_PRESET_VAL_ENABLE | SDHCI_CTRL_EXEC_TUNING; 1293c31165d7SShyam Sundar S K sdhci_writew(host, val, SDHCI_HOST_CONTROL2); 1294c31165d7SShyam Sundar S K 1295c31165d7SShyam Sundar S K val = sdhci_readw(host, SDHCI_HOST_CONTROL2); 1296c31165d7SShyam Sundar S K val &= ~SDHCI_CTRL_EXEC_TUNING; 1297c31165d7SShyam Sundar S K sdhci_writew(host, val, SDHCI_HOST_CONTROL2); 1298c31165d7SShyam Sundar S K } 1299c31165d7SShyam Sundar S K 1300c31165d7SShyam Sundar S K static void amd_config_tuning_phase(struct pci_dev *pdev, u8 phase) 1301c31165d7SShyam Sundar S K { 1302c31165d7SShyam Sundar S K unsigned int val; 1303c31165d7SShyam Sundar S K 1304c31165d7SShyam Sundar S K pci_read_config_dword(pdev, AMD_SD_AUTO_PATTERN, &val); 1305c31165d7SShyam Sundar S K val &= ~AMD_BIT_MASK; 1306c31165d7SShyam Sundar S K val |= (AMD_AUTO_TUNE_SEL | (phase << 1)); 1307c31165d7SShyam Sundar S K pci_write_config_dword(pdev, AMD_SD_AUTO_PATTERN, val); 1308c31165d7SShyam Sundar S K } 1309c31165d7SShyam Sundar S K 1310c31165d7SShyam Sundar S K static void amd_enable_manual_tuning(struct pci_dev *pdev) 1311c31165d7SShyam Sundar S K { 1312c31165d7SShyam Sundar S K unsigned int val; 1313c31165d7SShyam Sundar S K 1314c31165d7SShyam Sundar S K pci_read_config_dword(pdev, AMD_SD_MISC_CONTROL, &val); 1315c31165d7SShyam Sundar S K val |= AMD_FIFO_PTR; 1316c31165d7SShyam Sundar S K pci_write_config_dword(pdev, AMD_SD_MISC_CONTROL, val); 1317c31165d7SShyam Sundar S K } 1318c31165d7SShyam Sundar S K 1319300ad899SDaniel Kurtz static int amd_execute_tuning_hs200(struct sdhci_host *host, u32 opcode) 1320c31165d7SShyam Sundar S K { 1321c31165d7SShyam Sundar S K struct sdhci_pci_slot *slot = sdhci_priv(host); 1322c31165d7SShyam Sundar S K struct pci_dev *pdev = slot->chip->pdev; 1323c31165d7SShyam Sundar S K u8 valid_win = 0; 1324c31165d7SShyam Sundar S K u8 valid_win_max = 0; 1325c31165d7SShyam Sundar S K u8 valid_win_end = 0; 1326c31165d7SShyam Sundar S K u8 ctrl, tune_around; 1327c31165d7SShyam Sundar S K 1328c31165d7SShyam Sundar S K amd_tuning_reset(host); 1329c31165d7SShyam Sundar S K 1330c31165d7SShyam Sundar S K for (tune_around = 0; tune_around < 12; tune_around++) { 1331c31165d7SShyam Sundar S K amd_config_tuning_phase(pdev, tune_around); 1332c31165d7SShyam Sundar S K 1333c31165d7SShyam Sundar S K if (mmc_send_tuning(host->mmc, opcode, NULL)) { 1334c31165d7SShyam Sundar S K valid_win = 0; 1335c31165d7SShyam Sundar S K msleep(AMD_MSLEEP_DURATION); 1336c31165d7SShyam Sundar S K ctrl = SDHCI_RESET_CMD | SDHCI_RESET_DATA; 1337c31165d7SShyam Sundar S K sdhci_writeb(host, ctrl, SDHCI_SOFTWARE_RESET); 1338c31165d7SShyam Sundar S K } else if (++valid_win > valid_win_max) { 1339c31165d7SShyam Sundar S K valid_win_max = valid_win; 1340c31165d7SShyam Sundar S K valid_win_end = tune_around; 1341c31165d7SShyam Sundar S K } 1342c31165d7SShyam Sundar S K } 1343c31165d7SShyam Sundar S K 1344c31165d7SShyam Sundar S K if (!valid_win_max) { 1345c31165d7SShyam Sundar S K dev_err(&pdev->dev, "no tuning point found\n"); 1346c31165d7SShyam Sundar S K return -EIO; 1347c31165d7SShyam Sundar S K } 1348c31165d7SShyam Sundar S K 1349c31165d7SShyam Sundar S K amd_config_tuning_phase(pdev, valid_win_end - valid_win_max / 2); 1350c31165d7SShyam Sundar S K 1351c31165d7SShyam Sundar S K amd_enable_manual_tuning(pdev); 1352c31165d7SShyam Sundar S K 1353c31165d7SShyam Sundar S K host->mmc->retune_period = 0; 1354c31165d7SShyam Sundar S K 1355c31165d7SShyam Sundar S K return 0; 1356c31165d7SShyam Sundar S K } 1357c31165d7SShyam Sundar S K 1358300ad899SDaniel Kurtz static int amd_execute_tuning(struct mmc_host *mmc, u32 opcode) 1359300ad899SDaniel Kurtz { 1360300ad899SDaniel Kurtz struct sdhci_host *host = mmc_priv(mmc); 1361300ad899SDaniel Kurtz 1362300ad899SDaniel Kurtz /* AMD requires custom HS200 tuning */ 1363300ad899SDaniel Kurtz if (host->timing == MMC_TIMING_MMC_HS200) 1364300ad899SDaniel Kurtz return amd_execute_tuning_hs200(host, opcode); 1365300ad899SDaniel Kurtz 1366300ad899SDaniel Kurtz /* Otherwise perform standard SDHCI tuning */ 1367300ad899SDaniel Kurtz return sdhci_execute_tuning(mmc, opcode); 1368300ad899SDaniel Kurtz } 1369300ad899SDaniel Kurtz 1370300ad899SDaniel Kurtz static int amd_probe_slot(struct sdhci_pci_slot *slot) 1371300ad899SDaniel Kurtz { 1372300ad899SDaniel Kurtz struct mmc_host_ops *ops = &slot->host->mmc_host_ops; 1373300ad899SDaniel Kurtz 1374300ad899SDaniel Kurtz ops->execute_tuning = amd_execute_tuning; 1375300ad899SDaniel Kurtz 1376300ad899SDaniel Kurtz return 0; 1377300ad899SDaniel Kurtz } 1378300ad899SDaniel Kurtz 1379659c9bc1SBen Hutchings static int amd_probe(struct sdhci_pci_chip *chip) 1380659c9bc1SBen Hutchings { 1381659c9bc1SBen Hutchings struct pci_dev *smbus_dev; 1382659c9bc1SBen Hutchings enum amd_chipset_gen gen; 1383659c9bc1SBen Hutchings 1384659c9bc1SBen Hutchings smbus_dev = pci_get_device(PCI_VENDOR_ID_AMD, 1385659c9bc1SBen Hutchings PCI_DEVICE_ID_AMD_HUDSON2_SMBUS, NULL); 1386659c9bc1SBen Hutchings if (smbus_dev) { 1387659c9bc1SBen Hutchings gen = AMD_CHIPSET_BEFORE_ML; 1388659c9bc1SBen Hutchings } else { 1389659c9bc1SBen Hutchings smbus_dev = pci_get_device(PCI_VENDOR_ID_AMD, 1390659c9bc1SBen Hutchings PCI_DEVICE_ID_AMD_KERNCZ_SMBUS, NULL); 1391659c9bc1SBen Hutchings if (smbus_dev) { 1392659c9bc1SBen Hutchings if (smbus_dev->revision < 0x51) 1393659c9bc1SBen Hutchings gen = AMD_CHIPSET_CZ; 1394659c9bc1SBen Hutchings else 1395659c9bc1SBen Hutchings gen = AMD_CHIPSET_NL; 1396659c9bc1SBen Hutchings } else { 1397659c9bc1SBen Hutchings gen = AMD_CHIPSET_UNKNOWN; 1398659c9bc1SBen Hutchings } 1399659c9bc1SBen Hutchings } 1400659c9bc1SBen Hutchings 1401c31165d7SShyam Sundar S K if (gen == AMD_CHIPSET_BEFORE_ML || gen == AMD_CHIPSET_CZ) 1402659c9bc1SBen Hutchings chip->quirks2 |= SDHCI_QUIRK2_CLEAR_TRANSFERMODE_REG_BEFORE_CMD; 1403659c9bc1SBen Hutchings 1404659c9bc1SBen Hutchings return 0; 1405659c9bc1SBen Hutchings } 1406659c9bc1SBen Hutchings 1407c31165d7SShyam Sundar S K static const struct sdhci_ops amd_sdhci_pci_ops = { 1408c31165d7SShyam Sundar S K .set_clock = sdhci_set_clock, 1409c31165d7SShyam Sundar S K .enable_dma = sdhci_pci_enable_dma, 1410adc16398SMichał Mirosław .set_bus_width = sdhci_set_bus_width, 1411c31165d7SShyam Sundar S K .reset = sdhci_reset, 1412c31165d7SShyam Sundar S K .set_uhs_signaling = sdhci_set_uhs_signaling, 1413c31165d7SShyam Sundar S K }; 1414c31165d7SShyam Sundar S K 1415659c9bc1SBen Hutchings static const struct sdhci_pci_fixes sdhci_amd = { 1416659c9bc1SBen Hutchings .probe = amd_probe, 1417c31165d7SShyam Sundar S K .ops = &amd_sdhci_pci_ops, 1418300ad899SDaniel Kurtz .probe_slot = amd_probe_slot, 1419659c9bc1SBen Hutchings }; 1420659c9bc1SBen Hutchings 1421659c9bc1SBen Hutchings static const struct pci_device_id pci_ids[] = { 1422c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(RICOH, R5C822, ricoh), 1423c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(RICOH, R5C843, ricoh_mmc), 1424c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(RICOH, R5CE822, ricoh_mmc), 1425c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(RICOH, R5CE823, ricoh_mmc), 1426c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(ENE, CB712_SD, ene_712), 1427c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(ENE, CB712_SD_2, ene_712), 1428c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(ENE, CB714_SD, ene_714), 1429c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(ENE, CB714_SD_2, ene_714), 1430c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(MARVELL, 88ALP01_SD, cafe), 1431c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(JMICRON, JMB38X_SD, jmicron), 1432c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(JMICRON, JMB38X_MMC, jmicron), 1433c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(JMICRON, JMB388_SD, jmicron), 1434c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(JMICRON, JMB388_ESD, jmicron), 1435c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(SYSKONNECT, 8000, syskt), 1436c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(VIA, 95D0, via), 1437c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(REALTEK, 5250, rtsx), 1438c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, QRK_SD, intel_qrk), 1439c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, MRST_SD0, intel_mrst_hc0), 1440c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, MRST_SD1, intel_mrst_hc1_hc2), 1441c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, MRST_SD2, intel_mrst_hc1_hc2), 1442c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, MFD_SD, intel_mfd_sd), 1443c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, MFD_SDIO1, intel_mfd_sdio), 1444c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, MFD_SDIO2, intel_mfd_sdio), 1445c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, MFD_EMMC0, intel_mfd_emmc), 1446c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, MFD_EMMC1, intel_mfd_emmc), 1447c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, PCH_SDIO0, intel_pch_sdio), 1448c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, PCH_SDIO1, intel_pch_sdio), 1449c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, BYT_EMMC, intel_byt_emmc), 1450c949c907SMatthias Kraemer SDHCI_PCI_SUBDEVICE(INTEL, BYT_SDIO, NI, 7884, ni_byt_sdio), 1451c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, BYT_SDIO, intel_byt_sdio), 1452c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, BYT_SD, intel_byt_sd), 1453c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, BYT_EMMC2, intel_byt_emmc), 1454c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, BSW_EMMC, intel_byt_emmc), 1455c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, BSW_SDIO, intel_byt_sdio), 1456c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, BSW_SD, intel_byt_sd), 1457c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, CLV_SDIO0, intel_mfd_sd), 1458c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, CLV_SDIO1, intel_mfd_sdio), 1459c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, CLV_SDIO2, intel_mfd_sdio), 1460c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, CLV_EMMC0, intel_mfd_emmc), 1461c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, CLV_EMMC1, intel_mfd_emmc), 1462c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, MRFLD_MMC, intel_mrfld_mmc), 1463c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, SPT_EMMC, intel_byt_emmc), 1464c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, SPT_SDIO, intel_byt_sdio), 1465c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, SPT_SD, intel_byt_sd), 1466c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, DNV_EMMC, intel_byt_emmc), 1467cdaba732SAdrian Hunter SDHCI_PCI_DEVICE(INTEL, CDF_EMMC, intel_glk_emmc), 1468c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, BXT_EMMC, intel_byt_emmc), 1469c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, BXT_SDIO, intel_byt_sdio), 1470c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, BXT_SD, intel_byt_sd), 1471c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, BXTM_EMMC, intel_byt_emmc), 1472c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, BXTM_SDIO, intel_byt_sdio), 1473c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, BXTM_SD, intel_byt_sd), 1474c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, APL_EMMC, intel_byt_emmc), 1475c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, APL_SDIO, intel_byt_sdio), 1476c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, APL_SD, intel_byt_sd), 1477bc55dcd8SAdrian Hunter SDHCI_PCI_DEVICE(INTEL, GLK_EMMC, intel_glk_emmc), 1478c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, GLK_SDIO, intel_byt_sdio), 1479c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, GLK_SD, intel_byt_sd), 1480bc55dcd8SAdrian Hunter SDHCI_PCI_DEVICE(INTEL, CNP_EMMC, intel_glk_emmc), 1481bc55dcd8SAdrian Hunter SDHCI_PCI_DEVICE(INTEL, CNP_SD, intel_byt_sd), 1482bc55dcd8SAdrian Hunter SDHCI_PCI_DEVICE(INTEL, CNPH_SD, intel_byt_sd), 1483c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(O2, 8120, o2), 1484c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(O2, 8220, o2), 1485c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(O2, 8221, o2), 1486c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(O2, 8320, o2), 1487c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(O2, 8321, o2), 1488c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(O2, FUJIN2, o2), 1489c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(O2, SDS0, o2), 1490c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(O2, SDS1, o2), 1491c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(O2, SEABIRD0, o2), 1492c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(O2, SEABIRD1, o2), 1493d72d72cdSAtul Garg SDHCI_PCI_DEVICE(ARASAN, PHY_EMMC, arasan), 1494c949c907SMatthias Kraemer SDHCI_PCI_DEVICE_CLASS(AMD, SYSTEM_SDHCI, PCI_CLASS_MASK, amd), 1495c949c907SMatthias Kraemer /* Generic SD host controller */ 1496c949c907SMatthias Kraemer {PCI_DEVICE_CLASS(SYSTEM_SDHCI, PCI_CLASS_MASK)}, 1497659c9bc1SBen Hutchings { /* end: all zeroes */ }, 1498659c9bc1SBen Hutchings }; 1499659c9bc1SBen Hutchings 1500659c9bc1SBen Hutchings MODULE_DEVICE_TABLE(pci, pci_ids); 1501659c9bc1SBen Hutchings 1502659c9bc1SBen Hutchings /*****************************************************************************\ 1503659c9bc1SBen Hutchings * * 1504659c9bc1SBen Hutchings * SDHCI core callbacks * 1505659c9bc1SBen Hutchings * * 1506659c9bc1SBen Hutchings \*****************************************************************************/ 1507659c9bc1SBen Hutchings 1508d72d72cdSAtul Garg int sdhci_pci_enable_dma(struct sdhci_host *host) 1509659c9bc1SBen Hutchings { 1510659c9bc1SBen Hutchings struct sdhci_pci_slot *slot; 1511659c9bc1SBen Hutchings struct pci_dev *pdev; 1512659c9bc1SBen Hutchings 1513659c9bc1SBen Hutchings slot = sdhci_priv(host); 1514659c9bc1SBen Hutchings pdev = slot->chip->pdev; 1515659c9bc1SBen Hutchings 1516659c9bc1SBen Hutchings if (((pdev->class & 0xFFFF00) == (PCI_CLASS_SYSTEM_SDHCI << 8)) && 1517659c9bc1SBen Hutchings ((pdev->class & 0x0000FF) != PCI_SDHCI_IFDMA) && 1518659c9bc1SBen Hutchings (host->flags & SDHCI_USE_SDMA)) { 1519659c9bc1SBen Hutchings dev_warn(&pdev->dev, "Will use DMA mode even though HW " 1520659c9bc1SBen Hutchings "doesn't fully claim to support it.\n"); 1521659c9bc1SBen Hutchings } 1522659c9bc1SBen Hutchings 1523659c9bc1SBen Hutchings pci_set_master(pdev); 1524659c9bc1SBen Hutchings 1525659c9bc1SBen Hutchings return 0; 1526659c9bc1SBen Hutchings } 1527659c9bc1SBen Hutchings 1528659c9bc1SBen Hutchings static void sdhci_pci_gpio_hw_reset(struct sdhci_host *host) 1529659c9bc1SBen Hutchings { 1530659c9bc1SBen Hutchings struct sdhci_pci_slot *slot = sdhci_priv(host); 1531659c9bc1SBen Hutchings int rst_n_gpio = slot->rst_n_gpio; 1532659c9bc1SBen Hutchings 1533659c9bc1SBen Hutchings if (!gpio_is_valid(rst_n_gpio)) 1534659c9bc1SBen Hutchings return; 1535659c9bc1SBen Hutchings gpio_set_value_cansleep(rst_n_gpio, 0); 1536659c9bc1SBen Hutchings /* For eMMC, minimum is 1us but give it 10us for good measure */ 1537659c9bc1SBen Hutchings udelay(10); 1538659c9bc1SBen Hutchings gpio_set_value_cansleep(rst_n_gpio, 1); 1539659c9bc1SBen Hutchings /* For eMMC, minimum is 200us but give it 300us for good measure */ 1540659c9bc1SBen Hutchings usleep_range(300, 1000); 1541659c9bc1SBen Hutchings } 1542659c9bc1SBen Hutchings 1543659c9bc1SBen Hutchings static void sdhci_pci_hw_reset(struct sdhci_host *host) 1544659c9bc1SBen Hutchings { 1545659c9bc1SBen Hutchings struct sdhci_pci_slot *slot = sdhci_priv(host); 1546659c9bc1SBen Hutchings 1547659c9bc1SBen Hutchings if (slot->hw_reset) 1548659c9bc1SBen Hutchings slot->hw_reset(host); 1549659c9bc1SBen Hutchings } 1550659c9bc1SBen Hutchings 1551659c9bc1SBen Hutchings static const struct sdhci_ops sdhci_pci_ops = { 1552659c9bc1SBen Hutchings .set_clock = sdhci_set_clock, 1553659c9bc1SBen Hutchings .enable_dma = sdhci_pci_enable_dma, 1554adc16398SMichał Mirosław .set_bus_width = sdhci_set_bus_width, 1555659c9bc1SBen Hutchings .reset = sdhci_reset, 1556659c9bc1SBen Hutchings .set_uhs_signaling = sdhci_set_uhs_signaling, 1557659c9bc1SBen Hutchings .hw_reset = sdhci_pci_hw_reset, 1558659c9bc1SBen Hutchings }; 1559659c9bc1SBen Hutchings 1560659c9bc1SBen Hutchings /*****************************************************************************\ 1561659c9bc1SBen Hutchings * * 1562659c9bc1SBen Hutchings * Suspend/resume * 1563659c9bc1SBen Hutchings * * 1564659c9bc1SBen Hutchings \*****************************************************************************/ 1565659c9bc1SBen Hutchings 1566f9900f15SUlf Hansson #ifdef CONFIG_PM_SLEEP 1567659c9bc1SBen Hutchings static int sdhci_pci_suspend(struct device *dev) 1568659c9bc1SBen Hutchings { 1569659c9bc1SBen Hutchings struct pci_dev *pdev = to_pci_dev(dev); 157030cf2803SAdrian Hunter struct sdhci_pci_chip *chip = pci_get_drvdata(pdev); 1571659c9bc1SBen Hutchings 1572659c9bc1SBen Hutchings if (!chip) 1573659c9bc1SBen Hutchings return 0; 1574659c9bc1SBen Hutchings 157530cf2803SAdrian Hunter if (chip->fixes && chip->fixes->suspend) 157630cf2803SAdrian Hunter return chip->fixes->suspend(chip); 1577659c9bc1SBen Hutchings 157830cf2803SAdrian Hunter return sdhci_pci_suspend_host(chip); 1579659c9bc1SBen Hutchings } 1580659c9bc1SBen Hutchings 1581659c9bc1SBen Hutchings static int sdhci_pci_resume(struct device *dev) 1582659c9bc1SBen Hutchings { 1583659c9bc1SBen Hutchings struct pci_dev *pdev = to_pci_dev(dev); 158430cf2803SAdrian Hunter struct sdhci_pci_chip *chip = pci_get_drvdata(pdev); 1585659c9bc1SBen Hutchings 1586659c9bc1SBen Hutchings if (!chip) 1587659c9bc1SBen Hutchings return 0; 1588659c9bc1SBen Hutchings 158930cf2803SAdrian Hunter if (chip->fixes && chip->fixes->resume) 159030cf2803SAdrian Hunter return chip->fixes->resume(chip); 1591659c9bc1SBen Hutchings 159230cf2803SAdrian Hunter return sdhci_pci_resume_host(chip); 1593659c9bc1SBen Hutchings } 1594f9900f15SUlf Hansson #endif 1595659c9bc1SBen Hutchings 1596f9900f15SUlf Hansson #ifdef CONFIG_PM 1597659c9bc1SBen Hutchings static int sdhci_pci_runtime_suspend(struct device *dev) 1598659c9bc1SBen Hutchings { 1599923a231cSGeliang Tang struct pci_dev *pdev = to_pci_dev(dev); 1600966d696aSAdrian Hunter struct sdhci_pci_chip *chip = pci_get_drvdata(pdev); 1601659c9bc1SBen Hutchings 1602659c9bc1SBen Hutchings if (!chip) 1603659c9bc1SBen Hutchings return 0; 1604659c9bc1SBen Hutchings 1605966d696aSAdrian Hunter if (chip->fixes && chip->fixes->runtime_suspend) 1606966d696aSAdrian Hunter return chip->fixes->runtime_suspend(chip); 1607659c9bc1SBen Hutchings 1608966d696aSAdrian Hunter return sdhci_pci_runtime_suspend_host(chip); 1609659c9bc1SBen Hutchings } 1610659c9bc1SBen Hutchings 1611659c9bc1SBen Hutchings static int sdhci_pci_runtime_resume(struct device *dev) 1612659c9bc1SBen Hutchings { 1613923a231cSGeliang Tang struct pci_dev *pdev = to_pci_dev(dev); 1614966d696aSAdrian Hunter struct sdhci_pci_chip *chip = pci_get_drvdata(pdev); 1615659c9bc1SBen Hutchings 1616659c9bc1SBen Hutchings if (!chip) 1617659c9bc1SBen Hutchings return 0; 1618659c9bc1SBen Hutchings 1619966d696aSAdrian Hunter if (chip->fixes && chip->fixes->runtime_resume) 1620966d696aSAdrian Hunter return chip->fixes->runtime_resume(chip); 1621659c9bc1SBen Hutchings 1622966d696aSAdrian Hunter return sdhci_pci_runtime_resume_host(chip); 1623659c9bc1SBen Hutchings } 1624f9900f15SUlf Hansson #endif 1625659c9bc1SBen Hutchings 1626659c9bc1SBen Hutchings static const struct dev_pm_ops sdhci_pci_pm_ops = { 1627f9900f15SUlf Hansson SET_SYSTEM_SLEEP_PM_OPS(sdhci_pci_suspend, sdhci_pci_resume) 1628659c9bc1SBen Hutchings SET_RUNTIME_PM_OPS(sdhci_pci_runtime_suspend, 1629659c9bc1SBen Hutchings sdhci_pci_runtime_resume, NULL) 1630659c9bc1SBen Hutchings }; 1631659c9bc1SBen Hutchings 1632659c9bc1SBen Hutchings /*****************************************************************************\ 1633659c9bc1SBen Hutchings * * 1634659c9bc1SBen Hutchings * Device probing/removal * 1635659c9bc1SBen Hutchings * * 1636659c9bc1SBen Hutchings \*****************************************************************************/ 1637659c9bc1SBen Hutchings 1638659c9bc1SBen Hutchings static struct sdhci_pci_slot *sdhci_pci_probe_slot( 1639659c9bc1SBen Hutchings struct pci_dev *pdev, struct sdhci_pci_chip *chip, int first_bar, 1640659c9bc1SBen Hutchings int slotno) 1641659c9bc1SBen Hutchings { 1642659c9bc1SBen Hutchings struct sdhci_pci_slot *slot; 1643659c9bc1SBen Hutchings struct sdhci_host *host; 1644659c9bc1SBen Hutchings int ret, bar = first_bar + slotno; 1645ac9f67b5SAdrian Hunter size_t priv_size = chip->fixes ? chip->fixes->priv_size : 0; 1646659c9bc1SBen Hutchings 1647659c9bc1SBen Hutchings if (!(pci_resource_flags(pdev, bar) & IORESOURCE_MEM)) { 1648659c9bc1SBen Hutchings dev_err(&pdev->dev, "BAR %d is not iomem. Aborting.\n", bar); 1649659c9bc1SBen Hutchings return ERR_PTR(-ENODEV); 1650659c9bc1SBen Hutchings } 1651659c9bc1SBen Hutchings 1652659c9bc1SBen Hutchings if (pci_resource_len(pdev, bar) < 0x100) { 1653659c9bc1SBen Hutchings dev_err(&pdev->dev, "Invalid iomem size. You may " 1654659c9bc1SBen Hutchings "experience problems.\n"); 1655659c9bc1SBen Hutchings } 1656659c9bc1SBen Hutchings 1657659c9bc1SBen Hutchings if ((pdev->class & 0x0000FF) == PCI_SDHCI_IFVENDOR) { 1658659c9bc1SBen Hutchings dev_err(&pdev->dev, "Vendor specific interface. Aborting.\n"); 1659659c9bc1SBen Hutchings return ERR_PTR(-ENODEV); 1660659c9bc1SBen Hutchings } 1661659c9bc1SBen Hutchings 1662659c9bc1SBen Hutchings if ((pdev->class & 0x0000FF) > PCI_SDHCI_IFVENDOR) { 1663659c9bc1SBen Hutchings dev_err(&pdev->dev, "Unknown interface. Aborting.\n"); 1664659c9bc1SBen Hutchings return ERR_PTR(-ENODEV); 1665659c9bc1SBen Hutchings } 1666659c9bc1SBen Hutchings 1667ac9f67b5SAdrian Hunter host = sdhci_alloc_host(&pdev->dev, sizeof(*slot) + priv_size); 1668659c9bc1SBen Hutchings if (IS_ERR(host)) { 1669659c9bc1SBen Hutchings dev_err(&pdev->dev, "cannot allocate host\n"); 1670659c9bc1SBen Hutchings return ERR_CAST(host); 1671659c9bc1SBen Hutchings } 1672659c9bc1SBen Hutchings 1673659c9bc1SBen Hutchings slot = sdhci_priv(host); 1674659c9bc1SBen Hutchings 1675659c9bc1SBen Hutchings slot->chip = chip; 1676659c9bc1SBen Hutchings slot->host = host; 1677659c9bc1SBen Hutchings slot->rst_n_gpio = -EINVAL; 1678659c9bc1SBen Hutchings slot->cd_gpio = -EINVAL; 1679659c9bc1SBen Hutchings slot->cd_idx = -1; 1680659c9bc1SBen Hutchings 1681659c9bc1SBen Hutchings /* Retrieve platform data if there is any */ 1682659c9bc1SBen Hutchings if (*sdhci_pci_get_data) 1683659c9bc1SBen Hutchings slot->data = sdhci_pci_get_data(pdev, slotno); 1684659c9bc1SBen Hutchings 1685659c9bc1SBen Hutchings if (slot->data) { 1686659c9bc1SBen Hutchings if (slot->data->setup) { 1687659c9bc1SBen Hutchings ret = slot->data->setup(slot->data); 1688659c9bc1SBen Hutchings if (ret) { 1689659c9bc1SBen Hutchings dev_err(&pdev->dev, "platform setup failed\n"); 1690659c9bc1SBen Hutchings goto free; 1691659c9bc1SBen Hutchings } 1692659c9bc1SBen Hutchings } 1693659c9bc1SBen Hutchings slot->rst_n_gpio = slot->data->rst_n_gpio; 1694659c9bc1SBen Hutchings slot->cd_gpio = slot->data->cd_gpio; 1695659c9bc1SBen Hutchings } 1696659c9bc1SBen Hutchings 1697659c9bc1SBen Hutchings host->hw_name = "PCI"; 16986bc09063SAdrian Hunter host->ops = chip->fixes && chip->fixes->ops ? 16996bc09063SAdrian Hunter chip->fixes->ops : 17006bc09063SAdrian Hunter &sdhci_pci_ops; 1701659c9bc1SBen Hutchings host->quirks = chip->quirks; 1702659c9bc1SBen Hutchings host->quirks2 = chip->quirks2; 1703659c9bc1SBen Hutchings 1704659c9bc1SBen Hutchings host->irq = pdev->irq; 1705659c9bc1SBen Hutchings 1706c10bc372SAndy Shevchenko ret = pcim_iomap_regions(pdev, BIT(bar), mmc_hostname(host->mmc)); 1707659c9bc1SBen Hutchings if (ret) { 1708659c9bc1SBen Hutchings dev_err(&pdev->dev, "cannot request region\n"); 1709659c9bc1SBen Hutchings goto cleanup; 1710659c9bc1SBen Hutchings } 1711659c9bc1SBen Hutchings 1712c10bc372SAndy Shevchenko host->ioaddr = pcim_iomap_table(pdev)[bar]; 1713659c9bc1SBen Hutchings 1714659c9bc1SBen Hutchings if (chip->fixes && chip->fixes->probe_slot) { 1715659c9bc1SBen Hutchings ret = chip->fixes->probe_slot(slot); 1716659c9bc1SBen Hutchings if (ret) 1717c10bc372SAndy Shevchenko goto cleanup; 1718659c9bc1SBen Hutchings } 1719659c9bc1SBen Hutchings 1720659c9bc1SBen Hutchings if (gpio_is_valid(slot->rst_n_gpio)) { 1721c10bc372SAndy Shevchenko if (!devm_gpio_request(&pdev->dev, slot->rst_n_gpio, "eMMC_reset")) { 1722659c9bc1SBen Hutchings gpio_direction_output(slot->rst_n_gpio, 1); 1723659c9bc1SBen Hutchings slot->host->mmc->caps |= MMC_CAP_HW_RESET; 1724659c9bc1SBen Hutchings slot->hw_reset = sdhci_pci_gpio_hw_reset; 1725659c9bc1SBen Hutchings } else { 1726659c9bc1SBen Hutchings dev_warn(&pdev->dev, "failed to request rst_n_gpio\n"); 1727659c9bc1SBen Hutchings slot->rst_n_gpio = -EINVAL; 1728659c9bc1SBen Hutchings } 1729659c9bc1SBen Hutchings } 1730659c9bc1SBen Hutchings 1731e92cc35dSAdrian Hunter host->mmc->pm_caps = MMC_PM_KEEP_POWER; 1732659c9bc1SBen Hutchings host->mmc->slotno = slotno; 1733659c9bc1SBen Hutchings host->mmc->caps2 |= MMC_CAP2_NO_PRESCAN_POWERUP; 1734659c9bc1SBen Hutchings 1735e92cc35dSAdrian Hunter if (device_can_wakeup(&pdev->dev)) 1736e92cc35dSAdrian Hunter host->mmc->pm_caps |= MMC_PM_WAKE_SDIO_IRQ; 1737e92cc35dSAdrian Hunter 1738d56ee1ffSAdrian Hunter if (host->mmc->caps & MMC_CAP_CD_WAKE) 1739d56ee1ffSAdrian Hunter device_init_wakeup(&pdev->dev, true); 1740d56ee1ffSAdrian Hunter 17418f743d03SDavid E. Box if (slot->cd_idx >= 0) { 17426ac9b837SAndy Shevchenko ret = mmc_gpiod_request_cd(host->mmc, NULL, slot->cd_idx, 17438f743d03SDavid E. Box slot->cd_override_level, 0, NULL); 17448f743d03SDavid E. Box if (ret == -EPROBE_DEFER) 17458f743d03SDavid E. Box goto remove; 17468f743d03SDavid E. Box 17478f743d03SDavid E. Box if (ret) { 1748659c9bc1SBen Hutchings dev_warn(&pdev->dev, "failed to setup card detect gpio\n"); 1749659c9bc1SBen Hutchings slot->cd_idx = -1; 1750659c9bc1SBen Hutchings } 17518f743d03SDavid E. Box } 1752659c9bc1SBen Hutchings 175361c951deSAdrian Hunter if (chip->fixes && chip->fixes->add_host) 175461c951deSAdrian Hunter ret = chip->fixes->add_host(slot); 175561c951deSAdrian Hunter else 1756659c9bc1SBen Hutchings ret = sdhci_add_host(host); 1757659c9bc1SBen Hutchings if (ret) 1758659c9bc1SBen Hutchings goto remove; 1759659c9bc1SBen Hutchings 1760659c9bc1SBen Hutchings sdhci_pci_add_own_cd(slot); 1761659c9bc1SBen Hutchings 1762659c9bc1SBen Hutchings /* 1763659c9bc1SBen Hutchings * Check if the chip needs a separate GPIO for card detect to wake up 1764659c9bc1SBen Hutchings * from runtime suspend. If it is not there, don't allow runtime PM. 1765659c9bc1SBen Hutchings * Note sdhci_pci_add_own_cd() sets slot->cd_gpio to -EINVAL on failure. 1766659c9bc1SBen Hutchings */ 1767659c9bc1SBen Hutchings if (chip->fixes && chip->fixes->own_cd_for_runtime_pm && 1768659c9bc1SBen Hutchings !gpio_is_valid(slot->cd_gpio) && slot->cd_idx < 0) 1769659c9bc1SBen Hutchings chip->allow_runtime_pm = false; 1770659c9bc1SBen Hutchings 1771659c9bc1SBen Hutchings return slot; 1772659c9bc1SBen Hutchings 1773659c9bc1SBen Hutchings remove: 1774659c9bc1SBen Hutchings if (chip->fixes && chip->fixes->remove_slot) 1775659c9bc1SBen Hutchings chip->fixes->remove_slot(slot, 0); 1776659c9bc1SBen Hutchings 1777659c9bc1SBen Hutchings cleanup: 1778659c9bc1SBen Hutchings if (slot->data && slot->data->cleanup) 1779659c9bc1SBen Hutchings slot->data->cleanup(slot->data); 1780659c9bc1SBen Hutchings 1781659c9bc1SBen Hutchings free: 1782659c9bc1SBen Hutchings sdhci_free_host(host); 1783659c9bc1SBen Hutchings 1784659c9bc1SBen Hutchings return ERR_PTR(ret); 1785659c9bc1SBen Hutchings } 1786659c9bc1SBen Hutchings 1787659c9bc1SBen Hutchings static void sdhci_pci_remove_slot(struct sdhci_pci_slot *slot) 1788659c9bc1SBen Hutchings { 1789659c9bc1SBen Hutchings int dead; 1790659c9bc1SBen Hutchings u32 scratch; 1791659c9bc1SBen Hutchings 1792659c9bc1SBen Hutchings sdhci_pci_remove_own_cd(slot); 1793659c9bc1SBen Hutchings 1794659c9bc1SBen Hutchings dead = 0; 1795659c9bc1SBen Hutchings scratch = readl(slot->host->ioaddr + SDHCI_INT_STATUS); 1796659c9bc1SBen Hutchings if (scratch == (u32)-1) 1797659c9bc1SBen Hutchings dead = 1; 1798659c9bc1SBen Hutchings 1799659c9bc1SBen Hutchings sdhci_remove_host(slot->host, dead); 1800659c9bc1SBen Hutchings 1801659c9bc1SBen Hutchings if (slot->chip->fixes && slot->chip->fixes->remove_slot) 1802659c9bc1SBen Hutchings slot->chip->fixes->remove_slot(slot, dead); 1803659c9bc1SBen Hutchings 1804659c9bc1SBen Hutchings if (slot->data && slot->data->cleanup) 1805659c9bc1SBen Hutchings slot->data->cleanup(slot->data); 1806659c9bc1SBen Hutchings 1807659c9bc1SBen Hutchings sdhci_free_host(slot->host); 1808659c9bc1SBen Hutchings } 1809659c9bc1SBen Hutchings 1810659c9bc1SBen Hutchings static void sdhci_pci_runtime_pm_allow(struct device *dev) 1811659c9bc1SBen Hutchings { 181200884b61SAdrian Hunter pm_suspend_ignore_children(dev, 1); 1813659c9bc1SBen Hutchings pm_runtime_set_autosuspend_delay(dev, 50); 1814659c9bc1SBen Hutchings pm_runtime_use_autosuspend(dev); 181500884b61SAdrian Hunter pm_runtime_allow(dev); 181600884b61SAdrian Hunter /* Stay active until mmc core scans for a card */ 181700884b61SAdrian Hunter pm_runtime_put_noidle(dev); 1818659c9bc1SBen Hutchings } 1819659c9bc1SBen Hutchings 1820659c9bc1SBen Hutchings static void sdhci_pci_runtime_pm_forbid(struct device *dev) 1821659c9bc1SBen Hutchings { 1822659c9bc1SBen Hutchings pm_runtime_forbid(dev); 1823659c9bc1SBen Hutchings pm_runtime_get_noresume(dev); 1824659c9bc1SBen Hutchings } 1825659c9bc1SBen Hutchings 1826659c9bc1SBen Hutchings static int sdhci_pci_probe(struct pci_dev *pdev, 1827659c9bc1SBen Hutchings const struct pci_device_id *ent) 1828659c9bc1SBen Hutchings { 1829659c9bc1SBen Hutchings struct sdhci_pci_chip *chip; 1830659c9bc1SBen Hutchings struct sdhci_pci_slot *slot; 1831659c9bc1SBen Hutchings 1832659c9bc1SBen Hutchings u8 slots, first_bar; 1833659c9bc1SBen Hutchings int ret, i; 1834659c9bc1SBen Hutchings 1835659c9bc1SBen Hutchings BUG_ON(pdev == NULL); 1836659c9bc1SBen Hutchings BUG_ON(ent == NULL); 1837659c9bc1SBen Hutchings 1838659c9bc1SBen Hutchings dev_info(&pdev->dev, "SDHCI controller found [%04x:%04x] (rev %x)\n", 1839659c9bc1SBen Hutchings (int)pdev->vendor, (int)pdev->device, (int)pdev->revision); 1840659c9bc1SBen Hutchings 1841659c9bc1SBen Hutchings ret = pci_read_config_byte(pdev, PCI_SLOT_INFO, &slots); 1842659c9bc1SBen Hutchings if (ret) 1843659c9bc1SBen Hutchings return ret; 1844659c9bc1SBen Hutchings 1845659c9bc1SBen Hutchings slots = PCI_SLOT_INFO_SLOTS(slots) + 1; 1846659c9bc1SBen Hutchings dev_dbg(&pdev->dev, "found %d slot(s)\n", slots); 1847659c9bc1SBen Hutchings if (slots == 0) 1848659c9bc1SBen Hutchings return -ENODEV; 1849659c9bc1SBen Hutchings 1850659c9bc1SBen Hutchings BUG_ON(slots > MAX_SLOTS); 1851659c9bc1SBen Hutchings 1852659c9bc1SBen Hutchings ret = pci_read_config_byte(pdev, PCI_SLOT_INFO, &first_bar); 1853659c9bc1SBen Hutchings if (ret) 1854659c9bc1SBen Hutchings return ret; 1855659c9bc1SBen Hutchings 1856659c9bc1SBen Hutchings first_bar &= PCI_SLOT_INFO_FIRST_BAR_MASK; 1857659c9bc1SBen Hutchings 1858659c9bc1SBen Hutchings if (first_bar > 5) { 1859659c9bc1SBen Hutchings dev_err(&pdev->dev, "Invalid first BAR. Aborting.\n"); 1860659c9bc1SBen Hutchings return -ENODEV; 1861659c9bc1SBen Hutchings } 1862659c9bc1SBen Hutchings 186352ac7acfSAndy Shevchenko ret = pcim_enable_device(pdev); 1864659c9bc1SBen Hutchings if (ret) 1865659c9bc1SBen Hutchings return ret; 1866659c9bc1SBen Hutchings 186752ac7acfSAndy Shevchenko chip = devm_kzalloc(&pdev->dev, sizeof(*chip), GFP_KERNEL); 186852ac7acfSAndy Shevchenko if (!chip) 186952ac7acfSAndy Shevchenko return -ENOMEM; 1870659c9bc1SBen Hutchings 1871659c9bc1SBen Hutchings chip->pdev = pdev; 1872659c9bc1SBen Hutchings chip->fixes = (const struct sdhci_pci_fixes *)ent->driver_data; 1873659c9bc1SBen Hutchings if (chip->fixes) { 1874659c9bc1SBen Hutchings chip->quirks = chip->fixes->quirks; 1875659c9bc1SBen Hutchings chip->quirks2 = chip->fixes->quirks2; 1876659c9bc1SBen Hutchings chip->allow_runtime_pm = chip->fixes->allow_runtime_pm; 1877659c9bc1SBen Hutchings } 1878659c9bc1SBen Hutchings chip->num_slots = slots; 1879d38dcad4SAdrian Hunter chip->pm_retune = true; 1880d38dcad4SAdrian Hunter chip->rpm_retune = true; 1881659c9bc1SBen Hutchings 1882659c9bc1SBen Hutchings pci_set_drvdata(pdev, chip); 1883659c9bc1SBen Hutchings 1884659c9bc1SBen Hutchings if (chip->fixes && chip->fixes->probe) { 1885659c9bc1SBen Hutchings ret = chip->fixes->probe(chip); 1886659c9bc1SBen Hutchings if (ret) 188752ac7acfSAndy Shevchenko return ret; 1888659c9bc1SBen Hutchings } 1889659c9bc1SBen Hutchings 1890659c9bc1SBen Hutchings slots = chip->num_slots; /* Quirk may have changed this */ 1891659c9bc1SBen Hutchings 1892659c9bc1SBen Hutchings for (i = 0; i < slots; i++) { 1893659c9bc1SBen Hutchings slot = sdhci_pci_probe_slot(pdev, chip, first_bar, i); 1894659c9bc1SBen Hutchings if (IS_ERR(slot)) { 1895659c9bc1SBen Hutchings for (i--; i >= 0; i--) 1896659c9bc1SBen Hutchings sdhci_pci_remove_slot(chip->slots[i]); 189752ac7acfSAndy Shevchenko return PTR_ERR(slot); 1898659c9bc1SBen Hutchings } 1899659c9bc1SBen Hutchings 1900659c9bc1SBen Hutchings chip->slots[i] = slot; 1901659c9bc1SBen Hutchings } 1902659c9bc1SBen Hutchings 1903659c9bc1SBen Hutchings if (chip->allow_runtime_pm) 1904659c9bc1SBen Hutchings sdhci_pci_runtime_pm_allow(&pdev->dev); 1905659c9bc1SBen Hutchings 1906659c9bc1SBen Hutchings return 0; 1907659c9bc1SBen Hutchings } 1908659c9bc1SBen Hutchings 1909659c9bc1SBen Hutchings static void sdhci_pci_remove(struct pci_dev *pdev) 1910659c9bc1SBen Hutchings { 1911659c9bc1SBen Hutchings int i; 191252ac7acfSAndy Shevchenko struct sdhci_pci_chip *chip = pci_get_drvdata(pdev); 1913659c9bc1SBen Hutchings 1914659c9bc1SBen Hutchings if (chip->allow_runtime_pm) 1915659c9bc1SBen Hutchings sdhci_pci_runtime_pm_forbid(&pdev->dev); 1916659c9bc1SBen Hutchings 1917659c9bc1SBen Hutchings for (i = 0; i < chip->num_slots; i++) 1918659c9bc1SBen Hutchings sdhci_pci_remove_slot(chip->slots[i]); 1919659c9bc1SBen Hutchings } 1920659c9bc1SBen Hutchings 1921659c9bc1SBen Hutchings static struct pci_driver sdhci_driver = { 1922659c9bc1SBen Hutchings .name = "sdhci-pci", 1923659c9bc1SBen Hutchings .id_table = pci_ids, 1924659c9bc1SBen Hutchings .probe = sdhci_pci_probe, 1925659c9bc1SBen Hutchings .remove = sdhci_pci_remove, 1926659c9bc1SBen Hutchings .driver = { 1927659c9bc1SBen Hutchings .pm = &sdhci_pci_pm_ops 1928659c9bc1SBen Hutchings }, 1929659c9bc1SBen Hutchings }; 1930659c9bc1SBen Hutchings 1931659c9bc1SBen Hutchings module_pci_driver(sdhci_driver); 1932659c9bc1SBen Hutchings 1933659c9bc1SBen Hutchings MODULE_AUTHOR("Pierre Ossman <pierre@ossman.eu>"); 1934659c9bc1SBen Hutchings MODULE_DESCRIPTION("Secure Digital Host Controller Interface PCI driver"); 1935659c9bc1SBen Hutchings MODULE_LICENSE("GPL"); 1936