12874c5fdSThomas Gleixner // SPDX-License-Identifier: GPL-2.0-or-later 2659c9bc1SBen Hutchings /* linux/drivers/mmc/host/sdhci-pci.c - SDHCI on PCI bus interface 3659c9bc1SBen Hutchings * 4659c9bc1SBen Hutchings * Copyright (C) 2005-2008 Pierre Ossman, All Rights Reserved. 5659c9bc1SBen Hutchings * 6659c9bc1SBen Hutchings * Thanks to the following companies for their support: 7659c9bc1SBen Hutchings * 8659c9bc1SBen Hutchings * - JMicron (hardware and technical support) 9659c9bc1SBen Hutchings */ 10659c9bc1SBen Hutchings 115305ec6aSAdrian Hunter #include <linux/bitfield.h> 12a72016a4SAdrian Hunter #include <linux/string.h> 13659c9bc1SBen Hutchings #include <linux/delay.h> 14659c9bc1SBen Hutchings #include <linux/highmem.h> 15659c9bc1SBen Hutchings #include <linux/module.h> 16659c9bc1SBen Hutchings #include <linux/pci.h> 17659c9bc1SBen Hutchings #include <linux/dma-mapping.h> 18659c9bc1SBen Hutchings #include <linux/slab.h> 19659c9bc1SBen Hutchings #include <linux/device.h> 20659c9bc1SBen Hutchings #include <linux/mmc/host.h> 21659c9bc1SBen Hutchings #include <linux/mmc/mmc.h> 22659c9bc1SBen Hutchings #include <linux/scatterlist.h> 23659c9bc1SBen Hutchings #include <linux/io.h> 247a869f00SRaul E Rangel #include <linux/iopoll.h> 25659c9bc1SBen Hutchings #include <linux/gpio.h> 26659c9bc1SBen Hutchings #include <linux/pm_runtime.h> 27659c9bc1SBen Hutchings #include <linux/mmc/slot-gpio.h> 28659c9bc1SBen Hutchings #include <linux/mmc/sdhci-pci-data.h> 293f23df72SZach Brown #include <linux/acpi.h> 30bedf9fc0SAdrian Hunter #include <linux/dmi.h> 31659c9bc1SBen Hutchings 320a49a619SAdrian Hunter #ifdef CONFIG_X86 330a49a619SAdrian Hunter #include <asm/iosf_mbi.h> 340a49a619SAdrian Hunter #endif 350a49a619SAdrian Hunter 368ee82bdaSAdrian Hunter #include "cqhci.h" 378ee82bdaSAdrian Hunter 38659c9bc1SBen Hutchings #include "sdhci.h" 39659c9bc1SBen Hutchings #include "sdhci-pci.h" 40659c9bc1SBen Hutchings 41fee686b7SAdrian Hunter static void sdhci_pci_hw_reset(struct sdhci_host *host); 42fee686b7SAdrian Hunter 4330cf2803SAdrian Hunter #ifdef CONFIG_PM_SLEEP 4430cf2803SAdrian Hunter static int sdhci_pci_init_wakeup(struct sdhci_pci_chip *chip) 4530cf2803SAdrian Hunter { 4630cf2803SAdrian Hunter mmc_pm_flag_t pm_flags = 0; 47d56ee1ffSAdrian Hunter bool cap_cd_wake = false; 4830cf2803SAdrian Hunter int i; 4930cf2803SAdrian Hunter 5030cf2803SAdrian Hunter for (i = 0; i < chip->num_slots; i++) { 5130cf2803SAdrian Hunter struct sdhci_pci_slot *slot = chip->slots[i]; 5230cf2803SAdrian Hunter 53d56ee1ffSAdrian Hunter if (slot) { 5430cf2803SAdrian Hunter pm_flags |= slot->host->mmc->pm_flags; 55d56ee1ffSAdrian Hunter if (slot->host->mmc->caps & MMC_CAP_CD_WAKE) 56d56ee1ffSAdrian Hunter cap_cd_wake = true; 57d56ee1ffSAdrian Hunter } 5830cf2803SAdrian Hunter } 5930cf2803SAdrian Hunter 60d56ee1ffSAdrian Hunter if ((pm_flags & MMC_PM_KEEP_POWER) && (pm_flags & MMC_PM_WAKE_SDIO_IRQ)) 61d56ee1ffSAdrian Hunter return device_wakeup_enable(&chip->pdev->dev); 62d56ee1ffSAdrian Hunter else if (!cap_cd_wake) 63d56ee1ffSAdrian Hunter return device_wakeup_disable(&chip->pdev->dev); 64d56ee1ffSAdrian Hunter 65d56ee1ffSAdrian Hunter return 0; 6630cf2803SAdrian Hunter } 6730cf2803SAdrian Hunter 6830cf2803SAdrian Hunter static int sdhci_pci_suspend_host(struct sdhci_pci_chip *chip) 6930cf2803SAdrian Hunter { 705c3c6126SAdrian Hunter int i, ret; 7130cf2803SAdrian Hunter 7230cf2803SAdrian Hunter sdhci_pci_init_wakeup(chip); 7330cf2803SAdrian Hunter 745c3c6126SAdrian Hunter for (i = 0; i < chip->num_slots; i++) { 755c3c6126SAdrian Hunter struct sdhci_pci_slot *slot = chip->slots[i]; 765c3c6126SAdrian Hunter struct sdhci_host *host; 775c3c6126SAdrian Hunter 785c3c6126SAdrian Hunter if (!slot) 795c3c6126SAdrian Hunter continue; 805c3c6126SAdrian Hunter 815c3c6126SAdrian Hunter host = slot->host; 825c3c6126SAdrian Hunter 835c3c6126SAdrian Hunter if (chip->pm_retune && host->tuning_mode != SDHCI_TUNING_MODE_3) 845c3c6126SAdrian Hunter mmc_retune_needed(host->mmc); 855c3c6126SAdrian Hunter 865c3c6126SAdrian Hunter ret = sdhci_suspend_host(host); 875c3c6126SAdrian Hunter if (ret) 885c3c6126SAdrian Hunter goto err_pci_suspend; 89d56ee1ffSAdrian Hunter 90d56ee1ffSAdrian Hunter if (device_may_wakeup(&chip->pdev->dev)) 91d56ee1ffSAdrian Hunter mmc_gpio_set_cd_wake(host->mmc, true); 925c3c6126SAdrian Hunter } 935c3c6126SAdrian Hunter 9430cf2803SAdrian Hunter return 0; 955c3c6126SAdrian Hunter 965c3c6126SAdrian Hunter err_pci_suspend: 975c3c6126SAdrian Hunter while (--i >= 0) 985c3c6126SAdrian Hunter sdhci_resume_host(chip->slots[i]->host); 995c3c6126SAdrian Hunter return ret; 10030cf2803SAdrian Hunter } 10130cf2803SAdrian Hunter 10230cf2803SAdrian Hunter int sdhci_pci_resume_host(struct sdhci_pci_chip *chip) 10330cf2803SAdrian Hunter { 10430cf2803SAdrian Hunter struct sdhci_pci_slot *slot; 10530cf2803SAdrian Hunter int i, ret; 10630cf2803SAdrian Hunter 10730cf2803SAdrian Hunter for (i = 0; i < chip->num_slots; i++) { 10830cf2803SAdrian Hunter slot = chip->slots[i]; 10930cf2803SAdrian Hunter if (!slot) 11030cf2803SAdrian Hunter continue; 11130cf2803SAdrian Hunter 11230cf2803SAdrian Hunter ret = sdhci_resume_host(slot->host); 11330cf2803SAdrian Hunter if (ret) 11430cf2803SAdrian Hunter return ret; 115d56ee1ffSAdrian Hunter 116d56ee1ffSAdrian Hunter mmc_gpio_set_cd_wake(slot->host->mmc, false); 11730cf2803SAdrian Hunter } 11830cf2803SAdrian Hunter 11930cf2803SAdrian Hunter return 0; 12030cf2803SAdrian Hunter } 1218ee82bdaSAdrian Hunter 1228ee82bdaSAdrian Hunter static int sdhci_cqhci_suspend(struct sdhci_pci_chip *chip) 1238ee82bdaSAdrian Hunter { 1248ee82bdaSAdrian Hunter int ret; 1258ee82bdaSAdrian Hunter 1268ee82bdaSAdrian Hunter ret = cqhci_suspend(chip->slots[0]->host->mmc); 1278ee82bdaSAdrian Hunter if (ret) 1288ee82bdaSAdrian Hunter return ret; 1298ee82bdaSAdrian Hunter 1308ee82bdaSAdrian Hunter return sdhci_pci_suspend_host(chip); 1318ee82bdaSAdrian Hunter } 1328ee82bdaSAdrian Hunter 1338ee82bdaSAdrian Hunter static int sdhci_cqhci_resume(struct sdhci_pci_chip *chip) 1348ee82bdaSAdrian Hunter { 1358ee82bdaSAdrian Hunter int ret; 1368ee82bdaSAdrian Hunter 1378ee82bdaSAdrian Hunter ret = sdhci_pci_resume_host(chip); 1388ee82bdaSAdrian Hunter if (ret) 1398ee82bdaSAdrian Hunter return ret; 1408ee82bdaSAdrian Hunter 1418ee82bdaSAdrian Hunter return cqhci_resume(chip->slots[0]->host->mmc); 1428ee82bdaSAdrian Hunter } 14330cf2803SAdrian Hunter #endif 14430cf2803SAdrian Hunter 145966d696aSAdrian Hunter #ifdef CONFIG_PM 146966d696aSAdrian Hunter static int sdhci_pci_runtime_suspend_host(struct sdhci_pci_chip *chip) 147966d696aSAdrian Hunter { 148966d696aSAdrian Hunter struct sdhci_pci_slot *slot; 149966d696aSAdrian Hunter struct sdhci_host *host; 150966d696aSAdrian Hunter int i, ret; 151966d696aSAdrian Hunter 152966d696aSAdrian Hunter for (i = 0; i < chip->num_slots; i++) { 153966d696aSAdrian Hunter slot = chip->slots[i]; 154966d696aSAdrian Hunter if (!slot) 155966d696aSAdrian Hunter continue; 156966d696aSAdrian Hunter 157966d696aSAdrian Hunter host = slot->host; 158966d696aSAdrian Hunter 159966d696aSAdrian Hunter ret = sdhci_runtime_suspend_host(host); 160966d696aSAdrian Hunter if (ret) 161966d696aSAdrian Hunter goto err_pci_runtime_suspend; 162966d696aSAdrian Hunter 163966d696aSAdrian Hunter if (chip->rpm_retune && 164966d696aSAdrian Hunter host->tuning_mode != SDHCI_TUNING_MODE_3) 165966d696aSAdrian Hunter mmc_retune_needed(host->mmc); 166966d696aSAdrian Hunter } 167966d696aSAdrian Hunter 168966d696aSAdrian Hunter return 0; 169966d696aSAdrian Hunter 170966d696aSAdrian Hunter err_pci_runtime_suspend: 171966d696aSAdrian Hunter while (--i >= 0) 172c6303c5dSBaolin Wang sdhci_runtime_resume_host(chip->slots[i]->host, 0); 173966d696aSAdrian Hunter return ret; 174966d696aSAdrian Hunter } 175966d696aSAdrian Hunter 176966d696aSAdrian Hunter static int sdhci_pci_runtime_resume_host(struct sdhci_pci_chip *chip) 177966d696aSAdrian Hunter { 178966d696aSAdrian Hunter struct sdhci_pci_slot *slot; 179966d696aSAdrian Hunter int i, ret; 180966d696aSAdrian Hunter 181966d696aSAdrian Hunter for (i = 0; i < chip->num_slots; i++) { 182966d696aSAdrian Hunter slot = chip->slots[i]; 183966d696aSAdrian Hunter if (!slot) 184966d696aSAdrian Hunter continue; 185966d696aSAdrian Hunter 186c6303c5dSBaolin Wang ret = sdhci_runtime_resume_host(slot->host, 0); 187966d696aSAdrian Hunter if (ret) 188966d696aSAdrian Hunter return ret; 189966d696aSAdrian Hunter } 190966d696aSAdrian Hunter 191966d696aSAdrian Hunter return 0; 192966d696aSAdrian Hunter } 1938ee82bdaSAdrian Hunter 1948ee82bdaSAdrian Hunter static int sdhci_cqhci_runtime_suspend(struct sdhci_pci_chip *chip) 1958ee82bdaSAdrian Hunter { 1968ee82bdaSAdrian Hunter int ret; 1978ee82bdaSAdrian Hunter 1988ee82bdaSAdrian Hunter ret = cqhci_suspend(chip->slots[0]->host->mmc); 1998ee82bdaSAdrian Hunter if (ret) 2008ee82bdaSAdrian Hunter return ret; 2018ee82bdaSAdrian Hunter 2028ee82bdaSAdrian Hunter return sdhci_pci_runtime_suspend_host(chip); 2038ee82bdaSAdrian Hunter } 2048ee82bdaSAdrian Hunter 2058ee82bdaSAdrian Hunter static int sdhci_cqhci_runtime_resume(struct sdhci_pci_chip *chip) 2068ee82bdaSAdrian Hunter { 2078ee82bdaSAdrian Hunter int ret; 2088ee82bdaSAdrian Hunter 2098ee82bdaSAdrian Hunter ret = sdhci_pci_runtime_resume_host(chip); 2108ee82bdaSAdrian Hunter if (ret) 2118ee82bdaSAdrian Hunter return ret; 2128ee82bdaSAdrian Hunter 2138ee82bdaSAdrian Hunter return cqhci_resume(chip->slots[0]->host->mmc); 2148ee82bdaSAdrian Hunter } 215966d696aSAdrian Hunter #endif 216966d696aSAdrian Hunter 2178ee82bdaSAdrian Hunter static u32 sdhci_cqhci_irq(struct sdhci_host *host, u32 intmask) 2188ee82bdaSAdrian Hunter { 2198ee82bdaSAdrian Hunter int cmd_error = 0; 2208ee82bdaSAdrian Hunter int data_error = 0; 2218ee82bdaSAdrian Hunter 2228ee82bdaSAdrian Hunter if (!sdhci_cqe_irq(host, intmask, &cmd_error, &data_error)) 2238ee82bdaSAdrian Hunter return intmask; 2248ee82bdaSAdrian Hunter 2258ee82bdaSAdrian Hunter cqhci_irq(host->mmc, intmask, cmd_error, data_error); 2268ee82bdaSAdrian Hunter 2278ee82bdaSAdrian Hunter return 0; 2288ee82bdaSAdrian Hunter } 2298ee82bdaSAdrian Hunter 2308ee82bdaSAdrian Hunter static void sdhci_pci_dumpregs(struct mmc_host *mmc) 2318ee82bdaSAdrian Hunter { 2328ee82bdaSAdrian Hunter sdhci_dumpregs(mmc_priv(mmc)); 2338ee82bdaSAdrian Hunter } 2348ee82bdaSAdrian Hunter 235df57d732SAdrian Hunter static void sdhci_cqhci_reset(struct sdhci_host *host, u8 mask) 236df57d732SAdrian Hunter { 237df57d732SAdrian Hunter if ((host->mmc->caps2 & MMC_CAP2_CQE) && (mask & SDHCI_RESET_ALL) && 238df57d732SAdrian Hunter host->mmc->cqe_private) 239df57d732SAdrian Hunter cqhci_deactivate(host->mmc); 240df57d732SAdrian Hunter sdhci_reset(host, mask); 241df57d732SAdrian Hunter } 242df57d732SAdrian Hunter 243659c9bc1SBen Hutchings /*****************************************************************************\ 244659c9bc1SBen Hutchings * * 245659c9bc1SBen Hutchings * Hardware specific quirk handling * 246659c9bc1SBen Hutchings * * 247659c9bc1SBen Hutchings \*****************************************************************************/ 248659c9bc1SBen Hutchings 249659c9bc1SBen Hutchings static int ricoh_probe(struct sdhci_pci_chip *chip) 250659c9bc1SBen Hutchings { 251659c9bc1SBen Hutchings if (chip->pdev->subsystem_vendor == PCI_VENDOR_ID_SAMSUNG || 252659c9bc1SBen Hutchings chip->pdev->subsystem_vendor == PCI_VENDOR_ID_SONY) 253659c9bc1SBen Hutchings chip->quirks |= SDHCI_QUIRK_NO_CARD_NO_RESET; 254659c9bc1SBen Hutchings return 0; 255659c9bc1SBen Hutchings } 256659c9bc1SBen Hutchings 257659c9bc1SBen Hutchings static int ricoh_mmc_probe_slot(struct sdhci_pci_slot *slot) 258659c9bc1SBen Hutchings { 259659c9bc1SBen Hutchings slot->host->caps = 260a8e809ecSMasahiro Yamada FIELD_PREP(SDHCI_TIMEOUT_CLK_MASK, 0x21) | 261a8e809ecSMasahiro Yamada FIELD_PREP(SDHCI_CLOCK_BASE_MASK, 0x21) | 262659c9bc1SBen Hutchings SDHCI_TIMEOUT_CLK_UNIT | 263659c9bc1SBen Hutchings SDHCI_CAN_VDD_330 | 264659c9bc1SBen Hutchings SDHCI_CAN_DO_HISPD | 265659c9bc1SBen Hutchings SDHCI_CAN_DO_SDMA; 266659c9bc1SBen Hutchings return 0; 267659c9bc1SBen Hutchings } 268659c9bc1SBen Hutchings 269b7813f0fSAdrian Hunter #ifdef CONFIG_PM_SLEEP 270659c9bc1SBen Hutchings static int ricoh_mmc_resume(struct sdhci_pci_chip *chip) 271659c9bc1SBen Hutchings { 272659c9bc1SBen Hutchings /* Apply a delay to allow controller to settle */ 273659c9bc1SBen Hutchings /* Otherwise it becomes confused if card state changed 274659c9bc1SBen Hutchings during suspend */ 275659c9bc1SBen Hutchings msleep(500); 27630cf2803SAdrian Hunter return sdhci_pci_resume_host(chip); 277659c9bc1SBen Hutchings } 278b7813f0fSAdrian Hunter #endif 279659c9bc1SBen Hutchings 280659c9bc1SBen Hutchings static const struct sdhci_pci_fixes sdhci_ricoh = { 281659c9bc1SBen Hutchings .probe = ricoh_probe, 282659c9bc1SBen Hutchings .quirks = SDHCI_QUIRK_32BIT_DMA_ADDR | 283659c9bc1SBen Hutchings SDHCI_QUIRK_FORCE_DMA | 284659c9bc1SBen Hutchings SDHCI_QUIRK_CLOCK_BEFORE_RESET, 285659c9bc1SBen Hutchings }; 286659c9bc1SBen Hutchings 287659c9bc1SBen Hutchings static const struct sdhci_pci_fixes sdhci_ricoh_mmc = { 288659c9bc1SBen Hutchings .probe_slot = ricoh_mmc_probe_slot, 289b7813f0fSAdrian Hunter #ifdef CONFIG_PM_SLEEP 290659c9bc1SBen Hutchings .resume = ricoh_mmc_resume, 291b7813f0fSAdrian Hunter #endif 292659c9bc1SBen Hutchings .quirks = SDHCI_QUIRK_32BIT_DMA_ADDR | 293659c9bc1SBen Hutchings SDHCI_QUIRK_CLOCK_BEFORE_RESET | 294659c9bc1SBen Hutchings SDHCI_QUIRK_NO_CARD_NO_RESET | 295659c9bc1SBen Hutchings SDHCI_QUIRK_MISSING_CAPS 296659c9bc1SBen Hutchings }; 297659c9bc1SBen Hutchings 298659c9bc1SBen Hutchings static const struct sdhci_pci_fixes sdhci_ene_712 = { 299659c9bc1SBen Hutchings .quirks = SDHCI_QUIRK_SINGLE_POWER_WRITE | 300659c9bc1SBen Hutchings SDHCI_QUIRK_BROKEN_DMA, 301659c9bc1SBen Hutchings }; 302659c9bc1SBen Hutchings 303659c9bc1SBen Hutchings static const struct sdhci_pci_fixes sdhci_ene_714 = { 304659c9bc1SBen Hutchings .quirks = SDHCI_QUIRK_SINGLE_POWER_WRITE | 305659c9bc1SBen Hutchings SDHCI_QUIRK_RESET_CMD_DATA_ON_IOS | 306659c9bc1SBen Hutchings SDHCI_QUIRK_BROKEN_DMA, 307659c9bc1SBen Hutchings }; 308659c9bc1SBen Hutchings 309659c9bc1SBen Hutchings static const struct sdhci_pci_fixes sdhci_cafe = { 310659c9bc1SBen Hutchings .quirks = SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER | 311659c9bc1SBen Hutchings SDHCI_QUIRK_NO_BUSY_IRQ | 312659c9bc1SBen Hutchings SDHCI_QUIRK_BROKEN_CARD_DETECTION | 313659c9bc1SBen Hutchings SDHCI_QUIRK_BROKEN_TIMEOUT_VAL, 314659c9bc1SBen Hutchings }; 315659c9bc1SBen Hutchings 316659c9bc1SBen Hutchings static const struct sdhci_pci_fixes sdhci_intel_qrk = { 317659c9bc1SBen Hutchings .quirks = SDHCI_QUIRK_NO_HISPD_BIT, 318659c9bc1SBen Hutchings }; 319659c9bc1SBen Hutchings 320659c9bc1SBen Hutchings static int mrst_hc_probe_slot(struct sdhci_pci_slot *slot) 321659c9bc1SBen Hutchings { 322659c9bc1SBen Hutchings slot->host->mmc->caps |= MMC_CAP_8_BIT_DATA; 323659c9bc1SBen Hutchings return 0; 324659c9bc1SBen Hutchings } 325659c9bc1SBen Hutchings 326659c9bc1SBen Hutchings /* 327659c9bc1SBen Hutchings * ADMA operation is disabled for Moorestown platform due to 328659c9bc1SBen Hutchings * hardware bugs. 329659c9bc1SBen Hutchings */ 330659c9bc1SBen Hutchings static int mrst_hc_probe(struct sdhci_pci_chip *chip) 331659c9bc1SBen Hutchings { 332659c9bc1SBen Hutchings /* 333659c9bc1SBen Hutchings * slots number is fixed here for MRST as SDIO3/5 are never used and 334659c9bc1SBen Hutchings * have hardware bugs. 335659c9bc1SBen Hutchings */ 336659c9bc1SBen Hutchings chip->num_slots = 1; 337659c9bc1SBen Hutchings return 0; 338659c9bc1SBen Hutchings } 339659c9bc1SBen Hutchings 340659c9bc1SBen Hutchings static int pch_hc_probe_slot(struct sdhci_pci_slot *slot) 341659c9bc1SBen Hutchings { 342659c9bc1SBen Hutchings slot->host->mmc->caps |= MMC_CAP_8_BIT_DATA; 343659c9bc1SBen Hutchings return 0; 344659c9bc1SBen Hutchings } 345659c9bc1SBen Hutchings 346659c9bc1SBen Hutchings #ifdef CONFIG_PM 347659c9bc1SBen Hutchings 348659c9bc1SBen Hutchings static irqreturn_t sdhci_pci_sd_cd(int irq, void *dev_id) 349659c9bc1SBen Hutchings { 350659c9bc1SBen Hutchings struct sdhci_pci_slot *slot = dev_id; 351659c9bc1SBen Hutchings struct sdhci_host *host = slot->host; 352659c9bc1SBen Hutchings 353659c9bc1SBen Hutchings mmc_detect_change(host->mmc, msecs_to_jiffies(200)); 354659c9bc1SBen Hutchings return IRQ_HANDLED; 355659c9bc1SBen Hutchings } 356659c9bc1SBen Hutchings 357659c9bc1SBen Hutchings static void sdhci_pci_add_own_cd(struct sdhci_pci_slot *slot) 358659c9bc1SBen Hutchings { 359659c9bc1SBen Hutchings int err, irq, gpio = slot->cd_gpio; 360659c9bc1SBen Hutchings 361659c9bc1SBen Hutchings slot->cd_gpio = -EINVAL; 362659c9bc1SBen Hutchings slot->cd_irq = -EINVAL; 363659c9bc1SBen Hutchings 364659c9bc1SBen Hutchings if (!gpio_is_valid(gpio)) 365659c9bc1SBen Hutchings return; 366659c9bc1SBen Hutchings 367c10bc372SAndy Shevchenko err = devm_gpio_request(&slot->chip->pdev->dev, gpio, "sd_cd"); 368659c9bc1SBen Hutchings if (err < 0) 369659c9bc1SBen Hutchings goto out; 370659c9bc1SBen Hutchings 371659c9bc1SBen Hutchings err = gpio_direction_input(gpio); 372659c9bc1SBen Hutchings if (err < 0) 373659c9bc1SBen Hutchings goto out_free; 374659c9bc1SBen Hutchings 375659c9bc1SBen Hutchings irq = gpio_to_irq(gpio); 376659c9bc1SBen Hutchings if (irq < 0) 377659c9bc1SBen Hutchings goto out_free; 378659c9bc1SBen Hutchings 379659c9bc1SBen Hutchings err = request_irq(irq, sdhci_pci_sd_cd, IRQF_TRIGGER_RISING | 380659c9bc1SBen Hutchings IRQF_TRIGGER_FALLING, "sd_cd", slot); 381659c9bc1SBen Hutchings if (err) 382659c9bc1SBen Hutchings goto out_free; 383659c9bc1SBen Hutchings 384659c9bc1SBen Hutchings slot->cd_gpio = gpio; 385659c9bc1SBen Hutchings slot->cd_irq = irq; 386659c9bc1SBen Hutchings 387659c9bc1SBen Hutchings return; 388659c9bc1SBen Hutchings 389659c9bc1SBen Hutchings out_free: 390c10bc372SAndy Shevchenko devm_gpio_free(&slot->chip->pdev->dev, gpio); 391659c9bc1SBen Hutchings out: 392659c9bc1SBen Hutchings dev_warn(&slot->chip->pdev->dev, "failed to setup card detect wake up\n"); 393659c9bc1SBen Hutchings } 394659c9bc1SBen Hutchings 395659c9bc1SBen Hutchings static void sdhci_pci_remove_own_cd(struct sdhci_pci_slot *slot) 396659c9bc1SBen Hutchings { 397659c9bc1SBen Hutchings if (slot->cd_irq >= 0) 398659c9bc1SBen Hutchings free_irq(slot->cd_irq, slot); 399659c9bc1SBen Hutchings } 400659c9bc1SBen Hutchings 401659c9bc1SBen Hutchings #else 402659c9bc1SBen Hutchings 403659c9bc1SBen Hutchings static inline void sdhci_pci_add_own_cd(struct sdhci_pci_slot *slot) 404659c9bc1SBen Hutchings { 405659c9bc1SBen Hutchings } 406659c9bc1SBen Hutchings 407659c9bc1SBen Hutchings static inline void sdhci_pci_remove_own_cd(struct sdhci_pci_slot *slot) 408659c9bc1SBen Hutchings { 409659c9bc1SBen Hutchings } 410659c9bc1SBen Hutchings 411659c9bc1SBen Hutchings #endif 412659c9bc1SBen Hutchings 413659c9bc1SBen Hutchings static int mfd_emmc_probe_slot(struct sdhci_pci_slot *slot) 414659c9bc1SBen Hutchings { 415659c9bc1SBen Hutchings slot->host->mmc->caps |= MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE; 416d2a47176SUlf Hansson slot->host->mmc->caps2 |= MMC_CAP2_BOOTPART_NOACC; 417659c9bc1SBen Hutchings return 0; 418659c9bc1SBen Hutchings } 419659c9bc1SBen Hutchings 420659c9bc1SBen Hutchings static int mfd_sdio_probe_slot(struct sdhci_pci_slot *slot) 421659c9bc1SBen Hutchings { 422659c9bc1SBen Hutchings slot->host->mmc->caps |= MMC_CAP_POWER_OFF_CARD | MMC_CAP_NONREMOVABLE; 423659c9bc1SBen Hutchings return 0; 424659c9bc1SBen Hutchings } 425659c9bc1SBen Hutchings 426659c9bc1SBen Hutchings static const struct sdhci_pci_fixes sdhci_intel_mrst_hc0 = { 427659c9bc1SBen Hutchings .quirks = SDHCI_QUIRK_BROKEN_ADMA | SDHCI_QUIRK_NO_HISPD_BIT, 428659c9bc1SBen Hutchings .probe_slot = mrst_hc_probe_slot, 429659c9bc1SBen Hutchings }; 430659c9bc1SBen Hutchings 431659c9bc1SBen Hutchings static const struct sdhci_pci_fixes sdhci_intel_mrst_hc1_hc2 = { 432659c9bc1SBen Hutchings .quirks = SDHCI_QUIRK_BROKEN_ADMA | SDHCI_QUIRK_NO_HISPD_BIT, 433659c9bc1SBen Hutchings .probe = mrst_hc_probe, 434659c9bc1SBen Hutchings }; 435659c9bc1SBen Hutchings 436659c9bc1SBen Hutchings static const struct sdhci_pci_fixes sdhci_intel_mfd_sd = { 437659c9bc1SBen Hutchings .quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC, 438659c9bc1SBen Hutchings .allow_runtime_pm = true, 439659c9bc1SBen Hutchings .own_cd_for_runtime_pm = true, 440659c9bc1SBen Hutchings }; 441659c9bc1SBen Hutchings 442659c9bc1SBen Hutchings static const struct sdhci_pci_fixes sdhci_intel_mfd_sdio = { 443659c9bc1SBen Hutchings .quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC, 444659c9bc1SBen Hutchings .quirks2 = SDHCI_QUIRK2_HOST_OFF_CARD_ON, 445659c9bc1SBen Hutchings .allow_runtime_pm = true, 446659c9bc1SBen Hutchings .probe_slot = mfd_sdio_probe_slot, 447659c9bc1SBen Hutchings }; 448659c9bc1SBen Hutchings 449659c9bc1SBen Hutchings static const struct sdhci_pci_fixes sdhci_intel_mfd_emmc = { 450659c9bc1SBen Hutchings .quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC, 451659c9bc1SBen Hutchings .allow_runtime_pm = true, 452659c9bc1SBen Hutchings .probe_slot = mfd_emmc_probe_slot, 453659c9bc1SBen Hutchings }; 454659c9bc1SBen Hutchings 455659c9bc1SBen Hutchings static const struct sdhci_pci_fixes sdhci_intel_pch_sdio = { 456659c9bc1SBen Hutchings .quirks = SDHCI_QUIRK_BROKEN_ADMA, 457659c9bc1SBen Hutchings .probe_slot = pch_hc_probe_slot, 458659c9bc1SBen Hutchings }; 459659c9bc1SBen Hutchings 4600a49a619SAdrian Hunter #ifdef CONFIG_X86 4610a49a619SAdrian Hunter 4620a49a619SAdrian Hunter #define BYT_IOSF_SCCEP 0x63 4630a49a619SAdrian Hunter #define BYT_IOSF_OCP_NETCTRL0 0x1078 4640a49a619SAdrian Hunter #define BYT_IOSF_OCP_TIMEOUT_BASE GENMASK(10, 8) 4650a49a619SAdrian Hunter 4660a49a619SAdrian Hunter static void byt_ocp_setting(struct pci_dev *pdev) 4670a49a619SAdrian Hunter { 4680a49a619SAdrian Hunter u32 val = 0; 4690a49a619SAdrian Hunter 4700a49a619SAdrian Hunter if (pdev->device != PCI_DEVICE_ID_INTEL_BYT_EMMC && 4710a49a619SAdrian Hunter pdev->device != PCI_DEVICE_ID_INTEL_BYT_SDIO && 4720a49a619SAdrian Hunter pdev->device != PCI_DEVICE_ID_INTEL_BYT_SD && 4730a49a619SAdrian Hunter pdev->device != PCI_DEVICE_ID_INTEL_BYT_EMMC2) 4740a49a619SAdrian Hunter return; 4750a49a619SAdrian Hunter 4760a49a619SAdrian Hunter if (iosf_mbi_read(BYT_IOSF_SCCEP, MBI_CR_READ, BYT_IOSF_OCP_NETCTRL0, 4770a49a619SAdrian Hunter &val)) { 4780a49a619SAdrian Hunter dev_err(&pdev->dev, "%s read error\n", __func__); 4790a49a619SAdrian Hunter return; 4800a49a619SAdrian Hunter } 4810a49a619SAdrian Hunter 4820a49a619SAdrian Hunter if (!(val & BYT_IOSF_OCP_TIMEOUT_BASE)) 4830a49a619SAdrian Hunter return; 4840a49a619SAdrian Hunter 4850a49a619SAdrian Hunter val &= ~BYT_IOSF_OCP_TIMEOUT_BASE; 4860a49a619SAdrian Hunter 4870a49a619SAdrian Hunter if (iosf_mbi_write(BYT_IOSF_SCCEP, MBI_CR_WRITE, BYT_IOSF_OCP_NETCTRL0, 4880a49a619SAdrian Hunter val)) { 4890a49a619SAdrian Hunter dev_err(&pdev->dev, "%s write error\n", __func__); 4900a49a619SAdrian Hunter return; 4910a49a619SAdrian Hunter } 4920a49a619SAdrian Hunter 4930a49a619SAdrian Hunter dev_dbg(&pdev->dev, "%s completed\n", __func__); 4940a49a619SAdrian Hunter } 4950a49a619SAdrian Hunter 4960a49a619SAdrian Hunter #else 4970a49a619SAdrian Hunter 4980a49a619SAdrian Hunter static inline void byt_ocp_setting(struct pci_dev *pdev) 4990a49a619SAdrian Hunter { 5000a49a619SAdrian Hunter } 5010a49a619SAdrian Hunter 5020a49a619SAdrian Hunter #endif 5030a49a619SAdrian Hunter 504c959a6b0SAdrian Hunter enum { 505c959a6b0SAdrian Hunter INTEL_DSM_FNS = 0, 5066ae03368SAdrian Hunter INTEL_DSM_V18_SWITCH = 3, 507be17355aSAdrian Hunter INTEL_DSM_V33_SWITCH = 4, 50851ced59cSAdrian Hunter INTEL_DSM_DRV_STRENGTH = 9, 509c959a6b0SAdrian Hunter INTEL_DSM_D3_RETUNE = 10, 510c959a6b0SAdrian Hunter }; 511c959a6b0SAdrian Hunter 512c959a6b0SAdrian Hunter struct intel_host { 513c959a6b0SAdrian Hunter u32 dsm_fns; 51451ced59cSAdrian Hunter int drv_strength; 515c959a6b0SAdrian Hunter bool d3_retune; 5165305ec6aSAdrian Hunter bool rpm_retune_ok; 5175305ec6aSAdrian Hunter u32 glk_rx_ctrl1; 5185305ec6aSAdrian Hunter u32 glk_tun_val; 519c959a6b0SAdrian Hunter }; 520c959a6b0SAdrian Hunter 521c37f69ffSColin Ian King static const guid_t intel_dsm_guid = 52294116f81SAndy Shevchenko GUID_INIT(0xF6C13EA5, 0x65CD, 0x461F, 52394116f81SAndy Shevchenko 0xAB, 0x7A, 0x29, 0xF7, 0xE8, 0xD5, 0xBD, 0x61); 524c959a6b0SAdrian Hunter 525c959a6b0SAdrian Hunter static int __intel_dsm(struct intel_host *intel_host, struct device *dev, 526c959a6b0SAdrian Hunter unsigned int fn, u32 *result) 527c959a6b0SAdrian Hunter { 528c959a6b0SAdrian Hunter union acpi_object *obj; 529c959a6b0SAdrian Hunter int err = 0; 530a72016a4SAdrian Hunter size_t len; 531c959a6b0SAdrian Hunter 53294116f81SAndy Shevchenko obj = acpi_evaluate_dsm(ACPI_HANDLE(dev), &intel_dsm_guid, 0, fn, NULL); 533c959a6b0SAdrian Hunter if (!obj) 534c959a6b0SAdrian Hunter return -EOPNOTSUPP; 535c959a6b0SAdrian Hunter 536c959a6b0SAdrian Hunter if (obj->type != ACPI_TYPE_BUFFER || obj->buffer.length < 1) { 537c959a6b0SAdrian Hunter err = -EINVAL; 538c959a6b0SAdrian Hunter goto out; 539c959a6b0SAdrian Hunter } 540c959a6b0SAdrian Hunter 541a72016a4SAdrian Hunter len = min_t(size_t, obj->buffer.length, 4); 542a72016a4SAdrian Hunter 543a72016a4SAdrian Hunter *result = 0; 544a72016a4SAdrian Hunter memcpy(result, obj->buffer.pointer, len); 545c959a6b0SAdrian Hunter out: 546c959a6b0SAdrian Hunter ACPI_FREE(obj); 547c959a6b0SAdrian Hunter 548c959a6b0SAdrian Hunter return err; 549c959a6b0SAdrian Hunter } 550c959a6b0SAdrian Hunter 551c959a6b0SAdrian Hunter static int intel_dsm(struct intel_host *intel_host, struct device *dev, 552c959a6b0SAdrian Hunter unsigned int fn, u32 *result) 553c959a6b0SAdrian Hunter { 554c959a6b0SAdrian Hunter if (fn > 31 || !(intel_host->dsm_fns & (1 << fn))) 555c959a6b0SAdrian Hunter return -EOPNOTSUPP; 556c959a6b0SAdrian Hunter 557c959a6b0SAdrian Hunter return __intel_dsm(intel_host, dev, fn, result); 558c959a6b0SAdrian Hunter } 559c959a6b0SAdrian Hunter 560c959a6b0SAdrian Hunter static void intel_dsm_init(struct intel_host *intel_host, struct device *dev, 561c959a6b0SAdrian Hunter struct mmc_host *mmc) 562c959a6b0SAdrian Hunter { 563c959a6b0SAdrian Hunter int err; 564c959a6b0SAdrian Hunter u32 val; 565c959a6b0SAdrian Hunter 566eb701ce1SAdrian Hunter intel_host->d3_retune = true; 567eb701ce1SAdrian Hunter 568c959a6b0SAdrian Hunter err = __intel_dsm(intel_host, dev, INTEL_DSM_FNS, &intel_host->dsm_fns); 569c959a6b0SAdrian Hunter if (err) { 570c959a6b0SAdrian Hunter pr_debug("%s: DSM not supported, error %d\n", 571c959a6b0SAdrian Hunter mmc_hostname(mmc), err); 572c959a6b0SAdrian Hunter return; 573c959a6b0SAdrian Hunter } 574c959a6b0SAdrian Hunter 575c959a6b0SAdrian Hunter pr_debug("%s: DSM function mask %#x\n", 576c959a6b0SAdrian Hunter mmc_hostname(mmc), intel_host->dsm_fns); 577c959a6b0SAdrian Hunter 57851ced59cSAdrian Hunter err = intel_dsm(intel_host, dev, INTEL_DSM_DRV_STRENGTH, &val); 57951ced59cSAdrian Hunter intel_host->drv_strength = err ? 0 : val; 58051ced59cSAdrian Hunter 581c959a6b0SAdrian Hunter err = intel_dsm(intel_host, dev, INTEL_DSM_D3_RETUNE, &val); 582c959a6b0SAdrian Hunter intel_host->d3_retune = err ? true : !!val; 583c959a6b0SAdrian Hunter } 584c959a6b0SAdrian Hunter 585659c9bc1SBen Hutchings static void sdhci_pci_int_hw_reset(struct sdhci_host *host) 586659c9bc1SBen Hutchings { 587659c9bc1SBen Hutchings u8 reg; 588659c9bc1SBen Hutchings 589659c9bc1SBen Hutchings reg = sdhci_readb(host, SDHCI_POWER_CONTROL); 590659c9bc1SBen Hutchings reg |= 0x10; 591659c9bc1SBen Hutchings sdhci_writeb(host, reg, SDHCI_POWER_CONTROL); 592659c9bc1SBen Hutchings /* For eMMC, minimum is 1us but give it 9us for good measure */ 593659c9bc1SBen Hutchings udelay(9); 594659c9bc1SBen Hutchings reg &= ~0x10; 595659c9bc1SBen Hutchings sdhci_writeb(host, reg, SDHCI_POWER_CONTROL); 596659c9bc1SBen Hutchings /* For eMMC, minimum is 200us but give it 300us for good measure */ 597659c9bc1SBen Hutchings usleep_range(300, 1000); 598659c9bc1SBen Hutchings } 599659c9bc1SBen Hutchings 60051ced59cSAdrian Hunter static int intel_select_drive_strength(struct mmc_card *card, 60151ced59cSAdrian Hunter unsigned int max_dtr, int host_drv, 60251ced59cSAdrian Hunter int card_drv, int *drv_type) 603659c9bc1SBen Hutchings { 60451ced59cSAdrian Hunter struct sdhci_host *host = mmc_priv(card->host); 60551ced59cSAdrian Hunter struct sdhci_pci_slot *slot = sdhci_priv(host); 60651ced59cSAdrian Hunter struct intel_host *intel_host = sdhci_pci_priv(slot); 607659c9bc1SBen Hutchings 6081a8eb6b3SAdrian Hunter if (!(mmc_driver_type_mask(intel_host->drv_strength) & card_drv)) 6091a8eb6b3SAdrian Hunter return 0; 6101a8eb6b3SAdrian Hunter 61151ced59cSAdrian Hunter return intel_host->drv_strength; 612659c9bc1SBen Hutchings } 613659c9bc1SBen Hutchings 614163cbe31SAdrian Hunter static int bxt_get_cd(struct mmc_host *mmc) 615163cbe31SAdrian Hunter { 616163cbe31SAdrian Hunter int gpio_cd = mmc_gpio_get_cd(mmc); 617163cbe31SAdrian Hunter struct sdhci_host *host = mmc_priv(mmc); 618163cbe31SAdrian Hunter unsigned long flags; 619163cbe31SAdrian Hunter int ret = 0; 620163cbe31SAdrian Hunter 621163cbe31SAdrian Hunter if (!gpio_cd) 622163cbe31SAdrian Hunter return 0; 623163cbe31SAdrian Hunter 624163cbe31SAdrian Hunter spin_lock_irqsave(&host->lock, flags); 625163cbe31SAdrian Hunter 626163cbe31SAdrian Hunter if (host->flags & SDHCI_DEVICE_DEAD) 627163cbe31SAdrian Hunter goto out; 628163cbe31SAdrian Hunter 629163cbe31SAdrian Hunter ret = !!(sdhci_readl(host, SDHCI_PRESENT_STATE) & SDHCI_CARD_PRESENT); 630163cbe31SAdrian Hunter out: 631163cbe31SAdrian Hunter spin_unlock_irqrestore(&host->lock, flags); 632163cbe31SAdrian Hunter 633163cbe31SAdrian Hunter return ret; 634163cbe31SAdrian Hunter } 635163cbe31SAdrian Hunter 63648d685a2SAdrian Hunter #define SDHCI_INTEL_PWR_TIMEOUT_CNT 20 63748d685a2SAdrian Hunter #define SDHCI_INTEL_PWR_TIMEOUT_UDELAY 100 63848d685a2SAdrian Hunter 63948d685a2SAdrian Hunter static void sdhci_intel_set_power(struct sdhci_host *host, unsigned char mode, 64048d685a2SAdrian Hunter unsigned short vdd) 64148d685a2SAdrian Hunter { 64248d685a2SAdrian Hunter int cntr; 64348d685a2SAdrian Hunter u8 reg; 64448d685a2SAdrian Hunter 64548d685a2SAdrian Hunter sdhci_set_power(host, mode, vdd); 64648d685a2SAdrian Hunter 64748d685a2SAdrian Hunter if (mode == MMC_POWER_OFF) 64848d685a2SAdrian Hunter return; 64948d685a2SAdrian Hunter 65048d685a2SAdrian Hunter /* 65148d685a2SAdrian Hunter * Bus power might not enable after D3 -> D0 transition due to the 65248d685a2SAdrian Hunter * present state not yet having propagated. Retry for up to 2ms. 65348d685a2SAdrian Hunter */ 65448d685a2SAdrian Hunter for (cntr = 0; cntr < SDHCI_INTEL_PWR_TIMEOUT_CNT; cntr++) { 65548d685a2SAdrian Hunter reg = sdhci_readb(host, SDHCI_POWER_CONTROL); 65648d685a2SAdrian Hunter if (reg & SDHCI_POWER_ON) 65748d685a2SAdrian Hunter break; 65848d685a2SAdrian Hunter udelay(SDHCI_INTEL_PWR_TIMEOUT_UDELAY); 65948d685a2SAdrian Hunter reg |= SDHCI_POWER_ON; 66048d685a2SAdrian Hunter sdhci_writeb(host, reg, SDHCI_POWER_CONTROL); 66148d685a2SAdrian Hunter } 66248d685a2SAdrian Hunter } 66348d685a2SAdrian Hunter 664bc55dcd8SAdrian Hunter #define INTEL_HS400_ES_REG 0x78 665bc55dcd8SAdrian Hunter #define INTEL_HS400_ES_BIT BIT(0) 666bc55dcd8SAdrian Hunter 667bc55dcd8SAdrian Hunter static void intel_hs400_enhanced_strobe(struct mmc_host *mmc, 668bc55dcd8SAdrian Hunter struct mmc_ios *ios) 669bc55dcd8SAdrian Hunter { 670bc55dcd8SAdrian Hunter struct sdhci_host *host = mmc_priv(mmc); 671bc55dcd8SAdrian Hunter u32 val; 672bc55dcd8SAdrian Hunter 673bc55dcd8SAdrian Hunter val = sdhci_readl(host, INTEL_HS400_ES_REG); 674bc55dcd8SAdrian Hunter if (ios->enhanced_strobe) 675bc55dcd8SAdrian Hunter val |= INTEL_HS400_ES_BIT; 676bc55dcd8SAdrian Hunter else 677bc55dcd8SAdrian Hunter val &= ~INTEL_HS400_ES_BIT; 678bc55dcd8SAdrian Hunter sdhci_writel(host, val, INTEL_HS400_ES_REG); 679bc55dcd8SAdrian Hunter } 680bc55dcd8SAdrian Hunter 681be17355aSAdrian Hunter static int intel_start_signal_voltage_switch(struct mmc_host *mmc, 682be17355aSAdrian Hunter struct mmc_ios *ios) 6836ae03368SAdrian Hunter { 684be17355aSAdrian Hunter struct device *dev = mmc_dev(mmc); 685be17355aSAdrian Hunter struct sdhci_host *host = mmc_priv(mmc); 6866ae03368SAdrian Hunter struct sdhci_pci_slot *slot = sdhci_priv(host); 6876ae03368SAdrian Hunter struct intel_host *intel_host = sdhci_pci_priv(slot); 688be17355aSAdrian Hunter unsigned int fn; 6896ae03368SAdrian Hunter u32 result = 0; 6906ae03368SAdrian Hunter int err; 6916ae03368SAdrian Hunter 692be17355aSAdrian Hunter err = sdhci_start_signal_voltage_switch(mmc, ios); 693be17355aSAdrian Hunter if (err) 694be17355aSAdrian Hunter return err; 695be17355aSAdrian Hunter 696be17355aSAdrian Hunter switch (ios->signal_voltage) { 697be17355aSAdrian Hunter case MMC_SIGNAL_VOLTAGE_330: 698be17355aSAdrian Hunter fn = INTEL_DSM_V33_SWITCH; 699be17355aSAdrian Hunter break; 700be17355aSAdrian Hunter case MMC_SIGNAL_VOLTAGE_180: 701be17355aSAdrian Hunter fn = INTEL_DSM_V18_SWITCH; 702be17355aSAdrian Hunter break; 703be17355aSAdrian Hunter default: 704be17355aSAdrian Hunter return 0; 705be17355aSAdrian Hunter } 706be17355aSAdrian Hunter 707be17355aSAdrian Hunter err = intel_dsm(intel_host, dev, fn, &result); 708be17355aSAdrian Hunter pr_debug("%s: %s DSM fn %u error %d result %u\n", 709be17355aSAdrian Hunter mmc_hostname(mmc), __func__, fn, err, result); 710be17355aSAdrian Hunter 711be17355aSAdrian Hunter return 0; 7126ae03368SAdrian Hunter } 7136ae03368SAdrian Hunter 71448d685a2SAdrian Hunter static const struct sdhci_ops sdhci_intel_byt_ops = { 71548d685a2SAdrian Hunter .set_clock = sdhci_set_clock, 71648d685a2SAdrian Hunter .set_power = sdhci_intel_set_power, 71748d685a2SAdrian Hunter .enable_dma = sdhci_pci_enable_dma, 718adc16398SMichał Mirosław .set_bus_width = sdhci_set_bus_width, 71948d685a2SAdrian Hunter .reset = sdhci_reset, 72048d685a2SAdrian Hunter .set_uhs_signaling = sdhci_set_uhs_signaling, 72148d685a2SAdrian Hunter .hw_reset = sdhci_pci_hw_reset, 72248d685a2SAdrian Hunter }; 72348d685a2SAdrian Hunter 7248ee82bdaSAdrian Hunter static const struct sdhci_ops sdhci_intel_glk_ops = { 7258ee82bdaSAdrian Hunter .set_clock = sdhci_set_clock, 7268ee82bdaSAdrian Hunter .set_power = sdhci_intel_set_power, 7278ee82bdaSAdrian Hunter .enable_dma = sdhci_pci_enable_dma, 7288ee82bdaSAdrian Hunter .set_bus_width = sdhci_set_bus_width, 729df57d732SAdrian Hunter .reset = sdhci_cqhci_reset, 7308ee82bdaSAdrian Hunter .set_uhs_signaling = sdhci_set_uhs_signaling, 7318ee82bdaSAdrian Hunter .hw_reset = sdhci_pci_hw_reset, 7328ee82bdaSAdrian Hunter .irq = sdhci_cqhci_irq, 7338ee82bdaSAdrian Hunter }; 7348ee82bdaSAdrian Hunter 735c959a6b0SAdrian Hunter static void byt_read_dsm(struct sdhci_pci_slot *slot) 736c959a6b0SAdrian Hunter { 737c959a6b0SAdrian Hunter struct intel_host *intel_host = sdhci_pci_priv(slot); 738c959a6b0SAdrian Hunter struct device *dev = &slot->chip->pdev->dev; 739c959a6b0SAdrian Hunter struct mmc_host *mmc = slot->host->mmc; 740c959a6b0SAdrian Hunter 741c959a6b0SAdrian Hunter intel_dsm_init(intel_host, dev, mmc); 742c959a6b0SAdrian Hunter slot->chip->rpm_retune = intel_host->d3_retune; 743c959a6b0SAdrian Hunter } 744c959a6b0SAdrian Hunter 745f8870ae6SAdrian Hunter static int intel_execute_tuning(struct mmc_host *mmc, u32 opcode) 746f8870ae6SAdrian Hunter { 747f8870ae6SAdrian Hunter int err = sdhci_execute_tuning(mmc, opcode); 748f8870ae6SAdrian Hunter struct sdhci_host *host = mmc_priv(mmc); 749f8870ae6SAdrian Hunter 750f8870ae6SAdrian Hunter if (err) 751f8870ae6SAdrian Hunter return err; 752f8870ae6SAdrian Hunter 753f8870ae6SAdrian Hunter /* 754f8870ae6SAdrian Hunter * Tuning can leave the IP in an active state (Buffer Read Enable bit 755f8870ae6SAdrian Hunter * set) which prevents the entry to low power states (i.e. S0i3). Data 756f8870ae6SAdrian Hunter * reset will clear it. 757f8870ae6SAdrian Hunter */ 758f8870ae6SAdrian Hunter sdhci_reset(host, SDHCI_RESET_DATA); 759f8870ae6SAdrian Hunter 760f8870ae6SAdrian Hunter return 0; 761f8870ae6SAdrian Hunter } 762f8870ae6SAdrian Hunter 763f8870ae6SAdrian Hunter static void byt_probe_slot(struct sdhci_pci_slot *slot) 764f8870ae6SAdrian Hunter { 765f8870ae6SAdrian Hunter struct mmc_host_ops *ops = &slot->host->mmc_host_ops; 766809090e8SAdrian Hunter struct device *dev = &slot->chip->pdev->dev; 767809090e8SAdrian Hunter struct mmc_host *mmc = slot->host->mmc; 768f8870ae6SAdrian Hunter 769f8870ae6SAdrian Hunter byt_read_dsm(slot); 770f8870ae6SAdrian Hunter 7710a49a619SAdrian Hunter byt_ocp_setting(slot->chip->pdev); 7720a49a619SAdrian Hunter 773f8870ae6SAdrian Hunter ops->execute_tuning = intel_execute_tuning; 774be17355aSAdrian Hunter ops->start_signal_voltage_switch = intel_start_signal_voltage_switch; 775809090e8SAdrian Hunter 776809090e8SAdrian Hunter device_property_read_u32(dev, "max-frequency", &mmc->f_max); 777f8870ae6SAdrian Hunter } 778f8870ae6SAdrian Hunter 779659c9bc1SBen Hutchings static int byt_emmc_probe_slot(struct sdhci_pci_slot *slot) 780659c9bc1SBen Hutchings { 781f8870ae6SAdrian Hunter byt_probe_slot(slot); 782659c9bc1SBen Hutchings slot->host->mmc->caps |= MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE | 783659c9bc1SBen Hutchings MMC_CAP_HW_RESET | MMC_CAP_1_8V_DDR | 78432828857SAdrian Hunter MMC_CAP_CMD_DURING_TFR | 785659c9bc1SBen Hutchings MMC_CAP_WAIT_WHILE_BUSY; 786659c9bc1SBen Hutchings slot->hw_reset = sdhci_pci_int_hw_reset; 787659c9bc1SBen Hutchings if (slot->chip->pdev->device == PCI_DEVICE_ID_INTEL_BSW_EMMC) 788659c9bc1SBen Hutchings slot->host->timeout_clk = 1000; /* 1000 kHz i.e. 1 MHz */ 78951ced59cSAdrian Hunter slot->host->mmc_host_ops.select_drive_strength = 79051ced59cSAdrian Hunter intel_select_drive_strength; 791659c9bc1SBen Hutchings return 0; 792659c9bc1SBen Hutchings } 793659c9bc1SBen Hutchings 794bedf9fc0SAdrian Hunter static bool glk_broken_cqhci(struct sdhci_pci_slot *slot) 795bedf9fc0SAdrian Hunter { 796bedf9fc0SAdrian Hunter return slot->chip->pdev->device == PCI_DEVICE_ID_INTEL_GLK_EMMC && 797afd7f308SHans de Goede (dmi_match(DMI_BIOS_VENDOR, "LENOVO") || 798afd7f308SHans de Goede dmi_match(DMI_SYS_VENDOR, "IRBIS")); 799bedf9fc0SAdrian Hunter } 800bedf9fc0SAdrian Hunter 801bc55dcd8SAdrian Hunter static int glk_emmc_probe_slot(struct sdhci_pci_slot *slot) 802bc55dcd8SAdrian Hunter { 803bc55dcd8SAdrian Hunter int ret = byt_emmc_probe_slot(slot); 804bc55dcd8SAdrian Hunter 805bedf9fc0SAdrian Hunter if (!glk_broken_cqhci(slot)) 8068ee82bdaSAdrian Hunter slot->host->mmc->caps2 |= MMC_CAP2_CQE; 8078ee82bdaSAdrian Hunter 808bc55dcd8SAdrian Hunter if (slot->chip->pdev->device != PCI_DEVICE_ID_INTEL_GLK_EMMC) { 809bc55dcd8SAdrian Hunter slot->host->mmc->caps2 |= MMC_CAP2_HS400_ES, 810bc55dcd8SAdrian Hunter slot->host->mmc_host_ops.hs400_enhanced_strobe = 811bc55dcd8SAdrian Hunter intel_hs400_enhanced_strobe; 8128ee82bdaSAdrian Hunter slot->host->mmc->caps2 |= MMC_CAP2_CQE_DCMD; 813bc55dcd8SAdrian Hunter } 814bc55dcd8SAdrian Hunter 815bc55dcd8SAdrian Hunter return ret; 816bc55dcd8SAdrian Hunter } 817bc55dcd8SAdrian Hunter 8188ee82bdaSAdrian Hunter static const struct cqhci_host_ops glk_cqhci_ops = { 8197b7d57fdSAdrian Hunter .enable = sdhci_cqe_enable, 8208ee82bdaSAdrian Hunter .disable = sdhci_cqe_disable, 8218ee82bdaSAdrian Hunter .dumpregs = sdhci_pci_dumpregs, 8228ee82bdaSAdrian Hunter }; 8238ee82bdaSAdrian Hunter 8248ee82bdaSAdrian Hunter static int glk_emmc_add_host(struct sdhci_pci_slot *slot) 8258ee82bdaSAdrian Hunter { 8268ee82bdaSAdrian Hunter struct device *dev = &slot->chip->pdev->dev; 8278ee82bdaSAdrian Hunter struct sdhci_host *host = slot->host; 8288ee82bdaSAdrian Hunter struct cqhci_host *cq_host; 8298ee82bdaSAdrian Hunter bool dma64; 8308ee82bdaSAdrian Hunter int ret; 8318ee82bdaSAdrian Hunter 8328ee82bdaSAdrian Hunter ret = sdhci_setup_host(host); 8338ee82bdaSAdrian Hunter if (ret) 8348ee82bdaSAdrian Hunter return ret; 8358ee82bdaSAdrian Hunter 8368ee82bdaSAdrian Hunter cq_host = devm_kzalloc(dev, sizeof(*cq_host), GFP_KERNEL); 8378ee82bdaSAdrian Hunter if (!cq_host) { 8388ee82bdaSAdrian Hunter ret = -ENOMEM; 8398ee82bdaSAdrian Hunter goto cleanup; 8408ee82bdaSAdrian Hunter } 8418ee82bdaSAdrian Hunter 8428ee82bdaSAdrian Hunter cq_host->mmio = host->ioaddr + 0x200; 8438ee82bdaSAdrian Hunter cq_host->quirks |= CQHCI_QUIRK_SHORT_TXFR_DESC_SZ; 8448ee82bdaSAdrian Hunter cq_host->ops = &glk_cqhci_ops; 8458ee82bdaSAdrian Hunter 8468ee82bdaSAdrian Hunter dma64 = host->flags & SDHCI_USE_64_BIT_DMA; 8478ee82bdaSAdrian Hunter if (dma64) 8488ee82bdaSAdrian Hunter cq_host->caps |= CQHCI_TASK_DESC_SZ_128; 8498ee82bdaSAdrian Hunter 8508ee82bdaSAdrian Hunter ret = cqhci_init(cq_host, host->mmc, dma64); 8518ee82bdaSAdrian Hunter if (ret) 8528ee82bdaSAdrian Hunter goto cleanup; 8538ee82bdaSAdrian Hunter 8548ee82bdaSAdrian Hunter ret = __sdhci_add_host(host); 8558ee82bdaSAdrian Hunter if (ret) 8568ee82bdaSAdrian Hunter goto cleanup; 8578ee82bdaSAdrian Hunter 8588ee82bdaSAdrian Hunter return 0; 8598ee82bdaSAdrian Hunter 8608ee82bdaSAdrian Hunter cleanup: 8618ee82bdaSAdrian Hunter sdhci_cleanup_host(host); 8628ee82bdaSAdrian Hunter return ret; 8638ee82bdaSAdrian Hunter } 8648ee82bdaSAdrian Hunter 8655305ec6aSAdrian Hunter #ifdef CONFIG_PM 8665305ec6aSAdrian Hunter #define GLK_RX_CTRL1 0x834 8675305ec6aSAdrian Hunter #define GLK_TUN_VAL 0x840 8685305ec6aSAdrian Hunter #define GLK_PATH_PLL GENMASK(13, 8) 8695305ec6aSAdrian Hunter #define GLK_DLY GENMASK(6, 0) 8705305ec6aSAdrian Hunter /* Workaround firmware failing to restore the tuning value */ 8715305ec6aSAdrian Hunter static void glk_rpm_retune_wa(struct sdhci_pci_chip *chip, bool susp) 8725305ec6aSAdrian Hunter { 8735305ec6aSAdrian Hunter struct sdhci_pci_slot *slot = chip->slots[0]; 8745305ec6aSAdrian Hunter struct intel_host *intel_host = sdhci_pci_priv(slot); 8755305ec6aSAdrian Hunter struct sdhci_host *host = slot->host; 8765305ec6aSAdrian Hunter u32 glk_rx_ctrl1; 8775305ec6aSAdrian Hunter u32 glk_tun_val; 8785305ec6aSAdrian Hunter u32 dly; 8795305ec6aSAdrian Hunter 8805305ec6aSAdrian Hunter if (intel_host->rpm_retune_ok || !mmc_can_retune(host->mmc)) 8815305ec6aSAdrian Hunter return; 8825305ec6aSAdrian Hunter 8835305ec6aSAdrian Hunter glk_rx_ctrl1 = sdhci_readl(host, GLK_RX_CTRL1); 8845305ec6aSAdrian Hunter glk_tun_val = sdhci_readl(host, GLK_TUN_VAL); 8855305ec6aSAdrian Hunter 8865305ec6aSAdrian Hunter if (susp) { 8875305ec6aSAdrian Hunter intel_host->glk_rx_ctrl1 = glk_rx_ctrl1; 8885305ec6aSAdrian Hunter intel_host->glk_tun_val = glk_tun_val; 8895305ec6aSAdrian Hunter return; 8905305ec6aSAdrian Hunter } 8915305ec6aSAdrian Hunter 8925305ec6aSAdrian Hunter if (!intel_host->glk_tun_val) 8935305ec6aSAdrian Hunter return; 8945305ec6aSAdrian Hunter 8955305ec6aSAdrian Hunter if (glk_rx_ctrl1 != intel_host->glk_rx_ctrl1) { 8965305ec6aSAdrian Hunter intel_host->rpm_retune_ok = true; 8975305ec6aSAdrian Hunter return; 8985305ec6aSAdrian Hunter } 8995305ec6aSAdrian Hunter 9005305ec6aSAdrian Hunter dly = FIELD_PREP(GLK_DLY, FIELD_GET(GLK_PATH_PLL, glk_rx_ctrl1) + 9015305ec6aSAdrian Hunter (intel_host->glk_tun_val << 1)); 9025305ec6aSAdrian Hunter if (dly == FIELD_GET(GLK_DLY, glk_rx_ctrl1)) 9035305ec6aSAdrian Hunter return; 9045305ec6aSAdrian Hunter 9055305ec6aSAdrian Hunter glk_rx_ctrl1 = (glk_rx_ctrl1 & ~GLK_DLY) | dly; 9065305ec6aSAdrian Hunter sdhci_writel(host, glk_rx_ctrl1, GLK_RX_CTRL1); 9075305ec6aSAdrian Hunter 9085305ec6aSAdrian Hunter intel_host->rpm_retune_ok = true; 9095305ec6aSAdrian Hunter chip->rpm_retune = true; 9105305ec6aSAdrian Hunter mmc_retune_needed(host->mmc); 9115305ec6aSAdrian Hunter pr_info("%s: Requiring re-tune after rpm resume", mmc_hostname(host->mmc)); 9125305ec6aSAdrian Hunter } 9135305ec6aSAdrian Hunter 9145305ec6aSAdrian Hunter static void glk_rpm_retune_chk(struct sdhci_pci_chip *chip, bool susp) 9155305ec6aSAdrian Hunter { 9165305ec6aSAdrian Hunter if (chip->pdev->device == PCI_DEVICE_ID_INTEL_GLK_EMMC && 9175305ec6aSAdrian Hunter !chip->rpm_retune) 9185305ec6aSAdrian Hunter glk_rpm_retune_wa(chip, susp); 9195305ec6aSAdrian Hunter } 9205305ec6aSAdrian Hunter 9215305ec6aSAdrian Hunter static int glk_runtime_suspend(struct sdhci_pci_chip *chip) 9225305ec6aSAdrian Hunter { 9235305ec6aSAdrian Hunter glk_rpm_retune_chk(chip, true); 9245305ec6aSAdrian Hunter 9255305ec6aSAdrian Hunter return sdhci_cqhci_runtime_suspend(chip); 9265305ec6aSAdrian Hunter } 9275305ec6aSAdrian Hunter 9285305ec6aSAdrian Hunter static int glk_runtime_resume(struct sdhci_pci_chip *chip) 9295305ec6aSAdrian Hunter { 9305305ec6aSAdrian Hunter glk_rpm_retune_chk(chip, false); 9315305ec6aSAdrian Hunter 9325305ec6aSAdrian Hunter return sdhci_cqhci_runtime_resume(chip); 9335305ec6aSAdrian Hunter } 9345305ec6aSAdrian Hunter #endif 9355305ec6aSAdrian Hunter 9363f23df72SZach Brown #ifdef CONFIG_ACPI 9373f23df72SZach Brown static int ni_set_max_freq(struct sdhci_pci_slot *slot) 9383f23df72SZach Brown { 9393f23df72SZach Brown acpi_status status; 9403f23df72SZach Brown unsigned long long max_freq; 9413f23df72SZach Brown 9423f23df72SZach Brown status = acpi_evaluate_integer(ACPI_HANDLE(&slot->chip->pdev->dev), 9433f23df72SZach Brown "MXFQ", NULL, &max_freq); 9443f23df72SZach Brown if (ACPI_FAILURE(status)) { 9453f23df72SZach Brown dev_err(&slot->chip->pdev->dev, 9463f23df72SZach Brown "MXFQ not found in acpi table\n"); 9473f23df72SZach Brown return -EINVAL; 9483f23df72SZach Brown } 9493f23df72SZach Brown 9503f23df72SZach Brown slot->host->mmc->f_max = max_freq * 1000000; 9513f23df72SZach Brown 9523f23df72SZach Brown return 0; 9533f23df72SZach Brown } 9543f23df72SZach Brown #else 9553f23df72SZach Brown static inline int ni_set_max_freq(struct sdhci_pci_slot *slot) 9563f23df72SZach Brown { 9573f23df72SZach Brown return 0; 9583f23df72SZach Brown } 9593f23df72SZach Brown #endif 9603f23df72SZach Brown 96142b06496SZach Brown static int ni_byt_sdio_probe_slot(struct sdhci_pci_slot *slot) 96242b06496SZach Brown { 9633f23df72SZach Brown int err; 9643f23df72SZach Brown 965f8870ae6SAdrian Hunter byt_probe_slot(slot); 966c959a6b0SAdrian Hunter 9673f23df72SZach Brown err = ni_set_max_freq(slot); 9683f23df72SZach Brown if (err) 9693f23df72SZach Brown return err; 9703f23df72SZach Brown 97142b06496SZach Brown slot->host->mmc->caps |= MMC_CAP_POWER_OFF_CARD | MMC_CAP_NONREMOVABLE | 97242b06496SZach Brown MMC_CAP_WAIT_WHILE_BUSY; 97342b06496SZach Brown return 0; 97442b06496SZach Brown } 97542b06496SZach Brown 976659c9bc1SBen Hutchings static int byt_sdio_probe_slot(struct sdhci_pci_slot *slot) 977659c9bc1SBen Hutchings { 978f8870ae6SAdrian Hunter byt_probe_slot(slot); 979659c9bc1SBen Hutchings slot->host->mmc->caps |= MMC_CAP_POWER_OFF_CARD | MMC_CAP_NONREMOVABLE | 980659c9bc1SBen Hutchings MMC_CAP_WAIT_WHILE_BUSY; 981659c9bc1SBen Hutchings return 0; 982659c9bc1SBen Hutchings } 983659c9bc1SBen Hutchings 984659c9bc1SBen Hutchings static int byt_sd_probe_slot(struct sdhci_pci_slot *slot) 985659c9bc1SBen Hutchings { 986f8870ae6SAdrian Hunter byt_probe_slot(slot); 987c2c49a2eSAzhar Shaikh slot->host->mmc->caps |= MMC_CAP_WAIT_WHILE_BUSY | 9886cf4156cSAdrian Hunter MMC_CAP_AGGRESSIVE_PM | MMC_CAP_CD_WAKE; 989659c9bc1SBen Hutchings slot->cd_idx = 0; 990659c9bc1SBen Hutchings slot->cd_override_level = true; 991163cbe31SAdrian Hunter if (slot->chip->pdev->device == PCI_DEVICE_ID_INTEL_BXT_SD || 99201d6b2a4SAdrian Hunter slot->chip->pdev->device == PCI_DEVICE_ID_INTEL_BXTM_SD || 9932d1956d0SAdrian Hunter slot->chip->pdev->device == PCI_DEVICE_ID_INTEL_APL_SD || 994c2c49a2eSAzhar Shaikh slot->chip->pdev->device == PCI_DEVICE_ID_INTEL_GLK_SD) 995163cbe31SAdrian Hunter slot->host->mmc_host_ops.get_cd = bxt_get_cd; 996163cbe31SAdrian Hunter 997bb26b841SKyle Roeschley if (slot->chip->pdev->subsystem_vendor == PCI_VENDOR_ID_NI && 998bb26b841SKyle Roeschley slot->chip->pdev->subsystem_device == PCI_SUBDEVICE_ID_NI_78E3) 999bb26b841SKyle Roeschley slot->host->mmc->caps2 |= MMC_CAP2_AVOID_3_3V; 1000bb26b841SKyle Roeschley 1001659c9bc1SBen Hutchings return 0; 1002659c9bc1SBen Hutchings } 1003659c9bc1SBen Hutchings 10040a49a619SAdrian Hunter #ifdef CONFIG_PM_SLEEP 10050a49a619SAdrian Hunter 10060a49a619SAdrian Hunter static int byt_resume(struct sdhci_pci_chip *chip) 10070a49a619SAdrian Hunter { 10080a49a619SAdrian Hunter byt_ocp_setting(chip->pdev); 10090a49a619SAdrian Hunter 10100a49a619SAdrian Hunter return sdhci_pci_resume_host(chip); 10110a49a619SAdrian Hunter } 10120a49a619SAdrian Hunter 10130a49a619SAdrian Hunter #endif 10140a49a619SAdrian Hunter 10150a49a619SAdrian Hunter #ifdef CONFIG_PM 10160a49a619SAdrian Hunter 10170a49a619SAdrian Hunter static int byt_runtime_resume(struct sdhci_pci_chip *chip) 10180a49a619SAdrian Hunter { 10190a49a619SAdrian Hunter byt_ocp_setting(chip->pdev); 10200a49a619SAdrian Hunter 10210a49a619SAdrian Hunter return sdhci_pci_runtime_resume_host(chip); 10220a49a619SAdrian Hunter } 10230a49a619SAdrian Hunter 10240a49a619SAdrian Hunter #endif 10250a49a619SAdrian Hunter 1026659c9bc1SBen Hutchings static const struct sdhci_pci_fixes sdhci_intel_byt_emmc = { 10270a49a619SAdrian Hunter #ifdef CONFIG_PM_SLEEP 10280a49a619SAdrian Hunter .resume = byt_resume, 10290a49a619SAdrian Hunter #endif 10300a49a619SAdrian Hunter #ifdef CONFIG_PM 10310a49a619SAdrian Hunter .runtime_resume = byt_runtime_resume, 10320a49a619SAdrian Hunter #endif 1033659c9bc1SBen Hutchings .allow_runtime_pm = true, 1034659c9bc1SBen Hutchings .probe_slot = byt_emmc_probe_slot, 1035aeae6ad3SAdrian Hunter .quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC | 1036aeae6ad3SAdrian Hunter SDHCI_QUIRK_NO_LED, 1037659c9bc1SBen Hutchings .quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN | 1038659c9bc1SBen Hutchings SDHCI_QUIRK2_CAPS_BIT63_FOR_HS400 | 1039659c9bc1SBen Hutchings SDHCI_QUIRK2_STOP_WITH_TC, 1040fee686b7SAdrian Hunter .ops = &sdhci_intel_byt_ops, 1041c959a6b0SAdrian Hunter .priv_size = sizeof(struct intel_host), 1042659c9bc1SBen Hutchings }; 1043659c9bc1SBen Hutchings 1044bc55dcd8SAdrian Hunter static const struct sdhci_pci_fixes sdhci_intel_glk_emmc = { 1045bc55dcd8SAdrian Hunter .allow_runtime_pm = true, 1046bc55dcd8SAdrian Hunter .probe_slot = glk_emmc_probe_slot, 10478ee82bdaSAdrian Hunter .add_host = glk_emmc_add_host, 10488ee82bdaSAdrian Hunter #ifdef CONFIG_PM_SLEEP 10498ee82bdaSAdrian Hunter .suspend = sdhci_cqhci_suspend, 10508ee82bdaSAdrian Hunter .resume = sdhci_cqhci_resume, 10518ee82bdaSAdrian Hunter #endif 10528ee82bdaSAdrian Hunter #ifdef CONFIG_PM 10535305ec6aSAdrian Hunter .runtime_suspend = glk_runtime_suspend, 10545305ec6aSAdrian Hunter .runtime_resume = glk_runtime_resume, 10558ee82bdaSAdrian Hunter #endif 1056aeae6ad3SAdrian Hunter .quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC | 1057aeae6ad3SAdrian Hunter SDHCI_QUIRK_NO_LED, 1058bc55dcd8SAdrian Hunter .quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN | 1059bc55dcd8SAdrian Hunter SDHCI_QUIRK2_CAPS_BIT63_FOR_HS400 | 1060bc55dcd8SAdrian Hunter SDHCI_QUIRK2_STOP_WITH_TC, 10618ee82bdaSAdrian Hunter .ops = &sdhci_intel_glk_ops, 1062bc55dcd8SAdrian Hunter .priv_size = sizeof(struct intel_host), 1063bc55dcd8SAdrian Hunter }; 1064bc55dcd8SAdrian Hunter 106542b06496SZach Brown static const struct sdhci_pci_fixes sdhci_ni_byt_sdio = { 10660a49a619SAdrian Hunter #ifdef CONFIG_PM_SLEEP 10670a49a619SAdrian Hunter .resume = byt_resume, 10680a49a619SAdrian Hunter #endif 10690a49a619SAdrian Hunter #ifdef CONFIG_PM 10700a49a619SAdrian Hunter .runtime_resume = byt_runtime_resume, 10710a49a619SAdrian Hunter #endif 1072aeae6ad3SAdrian Hunter .quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC | 1073aeae6ad3SAdrian Hunter SDHCI_QUIRK_NO_LED, 107442b06496SZach Brown .quirks2 = SDHCI_QUIRK2_HOST_OFF_CARD_ON | 107542b06496SZach Brown SDHCI_QUIRK2_PRESET_VALUE_BROKEN, 107642b06496SZach Brown .allow_runtime_pm = true, 107742b06496SZach Brown .probe_slot = ni_byt_sdio_probe_slot, 107842b06496SZach Brown .ops = &sdhci_intel_byt_ops, 1079c959a6b0SAdrian Hunter .priv_size = sizeof(struct intel_host), 108042b06496SZach Brown }; 108142b06496SZach Brown 1082659c9bc1SBen Hutchings static const struct sdhci_pci_fixes sdhci_intel_byt_sdio = { 10830a49a619SAdrian Hunter #ifdef CONFIG_PM_SLEEP 10840a49a619SAdrian Hunter .resume = byt_resume, 10850a49a619SAdrian Hunter #endif 10860a49a619SAdrian Hunter #ifdef CONFIG_PM 10870a49a619SAdrian Hunter .runtime_resume = byt_runtime_resume, 10880a49a619SAdrian Hunter #endif 1089aeae6ad3SAdrian Hunter .quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC | 1090aeae6ad3SAdrian Hunter SDHCI_QUIRK_NO_LED, 1091659c9bc1SBen Hutchings .quirks2 = SDHCI_QUIRK2_HOST_OFF_CARD_ON | 1092659c9bc1SBen Hutchings SDHCI_QUIRK2_PRESET_VALUE_BROKEN, 1093659c9bc1SBen Hutchings .allow_runtime_pm = true, 1094659c9bc1SBen Hutchings .probe_slot = byt_sdio_probe_slot, 1095fee686b7SAdrian Hunter .ops = &sdhci_intel_byt_ops, 1096c959a6b0SAdrian Hunter .priv_size = sizeof(struct intel_host), 1097659c9bc1SBen Hutchings }; 1098659c9bc1SBen Hutchings 1099659c9bc1SBen Hutchings static const struct sdhci_pci_fixes sdhci_intel_byt_sd = { 11000a49a619SAdrian Hunter #ifdef CONFIG_PM_SLEEP 11010a49a619SAdrian Hunter .resume = byt_resume, 11020a49a619SAdrian Hunter #endif 11030a49a619SAdrian Hunter #ifdef CONFIG_PM 11040a49a619SAdrian Hunter .runtime_resume = byt_runtime_resume, 11050a49a619SAdrian Hunter #endif 1106aeae6ad3SAdrian Hunter .quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC | 1107aeae6ad3SAdrian Hunter SDHCI_QUIRK_NO_LED, 1108659c9bc1SBen Hutchings .quirks2 = SDHCI_QUIRK2_CARD_ON_NEEDS_BUS_ON | 1109659c9bc1SBen Hutchings SDHCI_QUIRK2_PRESET_VALUE_BROKEN | 1110659c9bc1SBen Hutchings SDHCI_QUIRK2_STOP_WITH_TC, 1111659c9bc1SBen Hutchings .allow_runtime_pm = true, 1112659c9bc1SBen Hutchings .own_cd_for_runtime_pm = true, 1113659c9bc1SBen Hutchings .probe_slot = byt_sd_probe_slot, 1114fee686b7SAdrian Hunter .ops = &sdhci_intel_byt_ops, 1115c959a6b0SAdrian Hunter .priv_size = sizeof(struct intel_host), 1116659c9bc1SBen Hutchings }; 1117659c9bc1SBen Hutchings 1118659c9bc1SBen Hutchings /* Define Host controllers for Intel Merrifield platform */ 11191f64cec2SAndy Shevchenko #define INTEL_MRFLD_EMMC_0 0 11201f64cec2SAndy Shevchenko #define INTEL_MRFLD_EMMC_1 1 11214674b6c8SAndy Shevchenko #define INTEL_MRFLD_SD 2 1122d5565577SAndy Shevchenko #define INTEL_MRFLD_SDIO 3 1123659c9bc1SBen Hutchings 11240e39220eSAndy Shevchenko #ifdef CONFIG_ACPI 11250e39220eSAndy Shevchenko static void intel_mrfld_mmc_fix_up_power_slot(struct sdhci_pci_slot *slot) 11260e39220eSAndy Shevchenko { 11270e39220eSAndy Shevchenko struct acpi_device *device, *child; 11280e39220eSAndy Shevchenko 11290e39220eSAndy Shevchenko device = ACPI_COMPANION(&slot->chip->pdev->dev); 11300e39220eSAndy Shevchenko if (!device) 11310e39220eSAndy Shevchenko return; 11320e39220eSAndy Shevchenko 11330e39220eSAndy Shevchenko acpi_device_fix_up_power(device); 11340e39220eSAndy Shevchenko list_for_each_entry(child, &device->children, node) 11350e39220eSAndy Shevchenko if (child->status.present && child->status.enabled) 11360e39220eSAndy Shevchenko acpi_device_fix_up_power(child); 11370e39220eSAndy Shevchenko } 11380e39220eSAndy Shevchenko #else 11390e39220eSAndy Shevchenko static inline void intel_mrfld_mmc_fix_up_power_slot(struct sdhci_pci_slot *slot) {} 11400e39220eSAndy Shevchenko #endif 11410e39220eSAndy Shevchenko 11421f64cec2SAndy Shevchenko static int intel_mrfld_mmc_probe_slot(struct sdhci_pci_slot *slot) 1143659c9bc1SBen Hutchings { 11442e57bbe2SAndy Shevchenko unsigned int func = PCI_FUNC(slot->chip->pdev->devfn); 11452e57bbe2SAndy Shevchenko 11462e57bbe2SAndy Shevchenko switch (func) { 11472e57bbe2SAndy Shevchenko case INTEL_MRFLD_EMMC_0: 11482e57bbe2SAndy Shevchenko case INTEL_MRFLD_EMMC_1: 11492e57bbe2SAndy Shevchenko slot->host->mmc->caps |= MMC_CAP_NONREMOVABLE | 11502e57bbe2SAndy Shevchenko MMC_CAP_8_BIT_DATA | 11512e57bbe2SAndy Shevchenko MMC_CAP_1_8V_DDR; 11522e57bbe2SAndy Shevchenko break; 11534674b6c8SAndy Shevchenko case INTEL_MRFLD_SD: 11544674b6c8SAndy Shevchenko slot->host->quirks2 |= SDHCI_QUIRK2_NO_1_8_V; 11554674b6c8SAndy Shevchenko break; 1156d5565577SAndy Shevchenko case INTEL_MRFLD_SDIO: 11572a609abeSAndy Shevchenko /* Advertise 2.0v for compatibility with the SDIO card's OCR */ 11582a609abeSAndy Shevchenko slot->host->ocr_mask = MMC_VDD_20_21 | MMC_VDD_165_195; 1159d5565577SAndy Shevchenko slot->host->mmc->caps |= MMC_CAP_NONREMOVABLE | 1160d5565577SAndy Shevchenko MMC_CAP_POWER_OFF_CARD; 1161d5565577SAndy Shevchenko break; 11622e57bbe2SAndy Shevchenko default: 1163659c9bc1SBen Hutchings return -ENODEV; 11642e57bbe2SAndy Shevchenko } 11650e39220eSAndy Shevchenko 11660e39220eSAndy Shevchenko intel_mrfld_mmc_fix_up_power_slot(slot); 1167659c9bc1SBen Hutchings return 0; 1168659c9bc1SBen Hutchings } 1169659c9bc1SBen Hutchings 11701f64cec2SAndy Shevchenko static const struct sdhci_pci_fixes sdhci_intel_mrfld_mmc = { 1171659c9bc1SBen Hutchings .quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC, 1172659c9bc1SBen Hutchings .quirks2 = SDHCI_QUIRK2_BROKEN_HS200 | 1173659c9bc1SBen Hutchings SDHCI_QUIRK2_PRESET_VALUE_BROKEN, 1174659c9bc1SBen Hutchings .allow_runtime_pm = true, 11751f64cec2SAndy Shevchenko .probe_slot = intel_mrfld_mmc_probe_slot, 1176659c9bc1SBen Hutchings }; 1177659c9bc1SBen Hutchings 1178659c9bc1SBen Hutchings static int jmicron_pmos(struct sdhci_pci_chip *chip, int on) 1179659c9bc1SBen Hutchings { 1180659c9bc1SBen Hutchings u8 scratch; 1181659c9bc1SBen Hutchings int ret; 1182659c9bc1SBen Hutchings 1183659c9bc1SBen Hutchings ret = pci_read_config_byte(chip->pdev, 0xAE, &scratch); 1184659c9bc1SBen Hutchings if (ret) 1185659c9bc1SBen Hutchings return ret; 1186659c9bc1SBen Hutchings 1187659c9bc1SBen Hutchings /* 1188659c9bc1SBen Hutchings * Turn PMOS on [bit 0], set over current detection to 2.4 V 1189659c9bc1SBen Hutchings * [bit 1:2] and enable over current debouncing [bit 6]. 1190659c9bc1SBen Hutchings */ 1191659c9bc1SBen Hutchings if (on) 1192659c9bc1SBen Hutchings scratch |= 0x47; 1193659c9bc1SBen Hutchings else 1194659c9bc1SBen Hutchings scratch &= ~0x47; 1195659c9bc1SBen Hutchings 11967582041fSkbuild test robot return pci_write_config_byte(chip->pdev, 0xAE, scratch); 1197659c9bc1SBen Hutchings } 1198659c9bc1SBen Hutchings 1199659c9bc1SBen Hutchings static int jmicron_probe(struct sdhci_pci_chip *chip) 1200659c9bc1SBen Hutchings { 1201659c9bc1SBen Hutchings int ret; 1202659c9bc1SBen Hutchings u16 mmcdev = 0; 1203659c9bc1SBen Hutchings 1204659c9bc1SBen Hutchings if (chip->pdev->revision == 0) { 1205659c9bc1SBen Hutchings chip->quirks |= SDHCI_QUIRK_32BIT_DMA_ADDR | 1206659c9bc1SBen Hutchings SDHCI_QUIRK_32BIT_DMA_SIZE | 1207659c9bc1SBen Hutchings SDHCI_QUIRK_32BIT_ADMA_SIZE | 1208659c9bc1SBen Hutchings SDHCI_QUIRK_RESET_AFTER_REQUEST | 1209659c9bc1SBen Hutchings SDHCI_QUIRK_BROKEN_SMALL_PIO; 1210659c9bc1SBen Hutchings } 1211659c9bc1SBen Hutchings 1212659c9bc1SBen Hutchings /* 1213659c9bc1SBen Hutchings * JMicron chips can have two interfaces to the same hardware 1214659c9bc1SBen Hutchings * in order to work around limitations in Microsoft's driver. 1215659c9bc1SBen Hutchings * We need to make sure we only bind to one of them. 1216659c9bc1SBen Hutchings * 1217659c9bc1SBen Hutchings * This code assumes two things: 1218659c9bc1SBen Hutchings * 1219659c9bc1SBen Hutchings * 1. The PCI code adds subfunctions in order. 1220659c9bc1SBen Hutchings * 1221659c9bc1SBen Hutchings * 2. The MMC interface has a lower subfunction number 1222659c9bc1SBen Hutchings * than the SD interface. 1223659c9bc1SBen Hutchings */ 1224659c9bc1SBen Hutchings if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_SD) 1225659c9bc1SBen Hutchings mmcdev = PCI_DEVICE_ID_JMICRON_JMB38X_MMC; 1226659c9bc1SBen Hutchings else if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_SD) 1227659c9bc1SBen Hutchings mmcdev = PCI_DEVICE_ID_JMICRON_JMB388_ESD; 1228659c9bc1SBen Hutchings 1229659c9bc1SBen Hutchings if (mmcdev) { 1230659c9bc1SBen Hutchings struct pci_dev *sd_dev; 1231659c9bc1SBen Hutchings 1232659c9bc1SBen Hutchings sd_dev = NULL; 1233659c9bc1SBen Hutchings while ((sd_dev = pci_get_device(PCI_VENDOR_ID_JMICRON, 1234659c9bc1SBen Hutchings mmcdev, sd_dev)) != NULL) { 1235659c9bc1SBen Hutchings if ((PCI_SLOT(chip->pdev->devfn) == 1236659c9bc1SBen Hutchings PCI_SLOT(sd_dev->devfn)) && 1237659c9bc1SBen Hutchings (chip->pdev->bus == sd_dev->bus)) 1238659c9bc1SBen Hutchings break; 1239659c9bc1SBen Hutchings } 1240659c9bc1SBen Hutchings 1241659c9bc1SBen Hutchings if (sd_dev) { 1242659c9bc1SBen Hutchings pci_dev_put(sd_dev); 1243659c9bc1SBen Hutchings dev_info(&chip->pdev->dev, "Refusing to bind to " 1244659c9bc1SBen Hutchings "secondary interface.\n"); 1245659c9bc1SBen Hutchings return -ENODEV; 1246659c9bc1SBen Hutchings } 1247659c9bc1SBen Hutchings } 1248659c9bc1SBen Hutchings 1249659c9bc1SBen Hutchings /* 1250659c9bc1SBen Hutchings * JMicron chips need a bit of a nudge to enable the power 1251659c9bc1SBen Hutchings * output pins. 1252659c9bc1SBen Hutchings */ 1253659c9bc1SBen Hutchings ret = jmicron_pmos(chip, 1); 1254659c9bc1SBen Hutchings if (ret) { 1255659c9bc1SBen Hutchings dev_err(&chip->pdev->dev, "Failure enabling card power\n"); 1256659c9bc1SBen Hutchings return ret; 1257659c9bc1SBen Hutchings } 1258659c9bc1SBen Hutchings 1259659c9bc1SBen Hutchings /* quirk for unsable RO-detection on JM388 chips */ 1260659c9bc1SBen Hutchings if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_SD || 1261659c9bc1SBen Hutchings chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD) 1262659c9bc1SBen Hutchings chip->quirks |= SDHCI_QUIRK_UNSTABLE_RO_DETECT; 1263659c9bc1SBen Hutchings 1264659c9bc1SBen Hutchings return 0; 1265659c9bc1SBen Hutchings } 1266659c9bc1SBen Hutchings 1267659c9bc1SBen Hutchings static void jmicron_enable_mmc(struct sdhci_host *host, int on) 1268659c9bc1SBen Hutchings { 1269659c9bc1SBen Hutchings u8 scratch; 1270659c9bc1SBen Hutchings 1271659c9bc1SBen Hutchings scratch = readb(host->ioaddr + 0xC0); 1272659c9bc1SBen Hutchings 1273659c9bc1SBen Hutchings if (on) 1274659c9bc1SBen Hutchings scratch |= 0x01; 1275659c9bc1SBen Hutchings else 1276659c9bc1SBen Hutchings scratch &= ~0x01; 1277659c9bc1SBen Hutchings 1278659c9bc1SBen Hutchings writeb(scratch, host->ioaddr + 0xC0); 1279659c9bc1SBen Hutchings } 1280659c9bc1SBen Hutchings 1281659c9bc1SBen Hutchings static int jmicron_probe_slot(struct sdhci_pci_slot *slot) 1282659c9bc1SBen Hutchings { 1283659c9bc1SBen Hutchings if (slot->chip->pdev->revision == 0) { 1284659c9bc1SBen Hutchings u16 version; 1285659c9bc1SBen Hutchings 1286659c9bc1SBen Hutchings version = readl(slot->host->ioaddr + SDHCI_HOST_VERSION); 1287659c9bc1SBen Hutchings version = (version & SDHCI_VENDOR_VER_MASK) >> 1288659c9bc1SBen Hutchings SDHCI_VENDOR_VER_SHIFT; 1289659c9bc1SBen Hutchings 1290659c9bc1SBen Hutchings /* 1291659c9bc1SBen Hutchings * Older versions of the chip have lots of nasty glitches 1292659c9bc1SBen Hutchings * in the ADMA engine. It's best just to avoid it 1293659c9bc1SBen Hutchings * completely. 1294659c9bc1SBen Hutchings */ 1295659c9bc1SBen Hutchings if (version < 0xAC) 1296659c9bc1SBen Hutchings slot->host->quirks |= SDHCI_QUIRK_BROKEN_ADMA; 1297659c9bc1SBen Hutchings } 1298659c9bc1SBen Hutchings 1299659c9bc1SBen Hutchings /* JM388 MMC doesn't support 1.8V while SD supports it */ 1300659c9bc1SBen Hutchings if (slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD) { 1301659c9bc1SBen Hutchings slot->host->ocr_avail_sd = MMC_VDD_32_33 | MMC_VDD_33_34 | 1302659c9bc1SBen Hutchings MMC_VDD_29_30 | MMC_VDD_30_31 | 1303659c9bc1SBen Hutchings MMC_VDD_165_195; /* allow 1.8V */ 1304659c9bc1SBen Hutchings slot->host->ocr_avail_mmc = MMC_VDD_32_33 | MMC_VDD_33_34 | 1305659c9bc1SBen Hutchings MMC_VDD_29_30 | MMC_VDD_30_31; /* no 1.8V for MMC */ 1306659c9bc1SBen Hutchings } 1307659c9bc1SBen Hutchings 1308659c9bc1SBen Hutchings /* 1309659c9bc1SBen Hutchings * The secondary interface requires a bit set to get the 1310659c9bc1SBen Hutchings * interrupts. 1311659c9bc1SBen Hutchings */ 1312659c9bc1SBen Hutchings if (slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC || 1313659c9bc1SBen Hutchings slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD) 1314659c9bc1SBen Hutchings jmicron_enable_mmc(slot->host, 1); 1315659c9bc1SBen Hutchings 1316659c9bc1SBen Hutchings slot->host->mmc->caps |= MMC_CAP_BUS_WIDTH_TEST; 1317659c9bc1SBen Hutchings 1318659c9bc1SBen Hutchings return 0; 1319659c9bc1SBen Hutchings } 1320659c9bc1SBen Hutchings 1321659c9bc1SBen Hutchings static void jmicron_remove_slot(struct sdhci_pci_slot *slot, int dead) 1322659c9bc1SBen Hutchings { 1323659c9bc1SBen Hutchings if (dead) 1324659c9bc1SBen Hutchings return; 1325659c9bc1SBen Hutchings 1326659c9bc1SBen Hutchings if (slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC || 1327659c9bc1SBen Hutchings slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD) 1328659c9bc1SBen Hutchings jmicron_enable_mmc(slot->host, 0); 1329659c9bc1SBen Hutchings } 1330659c9bc1SBen Hutchings 1331b7813f0fSAdrian Hunter #ifdef CONFIG_PM_SLEEP 1332659c9bc1SBen Hutchings static int jmicron_suspend(struct sdhci_pci_chip *chip) 1333659c9bc1SBen Hutchings { 133430cf2803SAdrian Hunter int i, ret; 133530cf2803SAdrian Hunter 13365c3c6126SAdrian Hunter ret = sdhci_pci_suspend_host(chip); 133730cf2803SAdrian Hunter if (ret) 133830cf2803SAdrian Hunter return ret; 1339659c9bc1SBen Hutchings 1340659c9bc1SBen Hutchings if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC || 1341659c9bc1SBen Hutchings chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD) { 1342659c9bc1SBen Hutchings for (i = 0; i < chip->num_slots; i++) 1343659c9bc1SBen Hutchings jmicron_enable_mmc(chip->slots[i]->host, 0); 1344659c9bc1SBen Hutchings } 1345659c9bc1SBen Hutchings 1346659c9bc1SBen Hutchings return 0; 1347659c9bc1SBen Hutchings } 1348659c9bc1SBen Hutchings 1349659c9bc1SBen Hutchings static int jmicron_resume(struct sdhci_pci_chip *chip) 1350659c9bc1SBen Hutchings { 1351659c9bc1SBen Hutchings int ret, i; 1352659c9bc1SBen Hutchings 1353659c9bc1SBen Hutchings if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC || 1354659c9bc1SBen Hutchings chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD) { 1355659c9bc1SBen Hutchings for (i = 0; i < chip->num_slots; i++) 1356659c9bc1SBen Hutchings jmicron_enable_mmc(chip->slots[i]->host, 1); 1357659c9bc1SBen Hutchings } 1358659c9bc1SBen Hutchings 1359659c9bc1SBen Hutchings ret = jmicron_pmos(chip, 1); 1360659c9bc1SBen Hutchings if (ret) { 1361659c9bc1SBen Hutchings dev_err(&chip->pdev->dev, "Failure enabling card power\n"); 1362659c9bc1SBen Hutchings return ret; 1363659c9bc1SBen Hutchings } 1364659c9bc1SBen Hutchings 136530cf2803SAdrian Hunter return sdhci_pci_resume_host(chip); 1366659c9bc1SBen Hutchings } 1367b7813f0fSAdrian Hunter #endif 1368659c9bc1SBen Hutchings 1369659c9bc1SBen Hutchings static const struct sdhci_pci_fixes sdhci_jmicron = { 1370659c9bc1SBen Hutchings .probe = jmicron_probe, 1371659c9bc1SBen Hutchings 1372659c9bc1SBen Hutchings .probe_slot = jmicron_probe_slot, 1373659c9bc1SBen Hutchings .remove_slot = jmicron_remove_slot, 1374659c9bc1SBen Hutchings 1375b7813f0fSAdrian Hunter #ifdef CONFIG_PM_SLEEP 1376659c9bc1SBen Hutchings .suspend = jmicron_suspend, 1377659c9bc1SBen Hutchings .resume = jmicron_resume, 1378b7813f0fSAdrian Hunter #endif 1379659c9bc1SBen Hutchings }; 1380659c9bc1SBen Hutchings 1381659c9bc1SBen Hutchings /* SysKonnect CardBus2SDIO extra registers */ 1382659c9bc1SBen Hutchings #define SYSKT_CTRL 0x200 1383659c9bc1SBen Hutchings #define SYSKT_RDFIFO_STAT 0x204 1384659c9bc1SBen Hutchings #define SYSKT_WRFIFO_STAT 0x208 1385659c9bc1SBen Hutchings #define SYSKT_POWER_DATA 0x20c 1386659c9bc1SBen Hutchings #define SYSKT_POWER_330 0xef 1387659c9bc1SBen Hutchings #define SYSKT_POWER_300 0xf8 1388659c9bc1SBen Hutchings #define SYSKT_POWER_184 0xcc 1389659c9bc1SBen Hutchings #define SYSKT_POWER_CMD 0x20d 1390659c9bc1SBen Hutchings #define SYSKT_POWER_START (1 << 7) 1391659c9bc1SBen Hutchings #define SYSKT_POWER_STATUS 0x20e 1392659c9bc1SBen Hutchings #define SYSKT_POWER_STATUS_OK (1 << 0) 1393659c9bc1SBen Hutchings #define SYSKT_BOARD_REV 0x210 1394659c9bc1SBen Hutchings #define SYSKT_CHIP_REV 0x211 1395659c9bc1SBen Hutchings #define SYSKT_CONF_DATA 0x212 1396659c9bc1SBen Hutchings #define SYSKT_CONF_DATA_1V8 (1 << 2) 1397659c9bc1SBen Hutchings #define SYSKT_CONF_DATA_2V5 (1 << 1) 1398659c9bc1SBen Hutchings #define SYSKT_CONF_DATA_3V3 (1 << 0) 1399659c9bc1SBen Hutchings 1400659c9bc1SBen Hutchings static int syskt_probe(struct sdhci_pci_chip *chip) 1401659c9bc1SBen Hutchings { 1402659c9bc1SBen Hutchings if ((chip->pdev->class & 0x0000FF) == PCI_SDHCI_IFVENDOR) { 1403659c9bc1SBen Hutchings chip->pdev->class &= ~0x0000FF; 1404659c9bc1SBen Hutchings chip->pdev->class |= PCI_SDHCI_IFDMA; 1405659c9bc1SBen Hutchings } 1406659c9bc1SBen Hutchings return 0; 1407659c9bc1SBen Hutchings } 1408659c9bc1SBen Hutchings 1409659c9bc1SBen Hutchings static int syskt_probe_slot(struct sdhci_pci_slot *slot) 1410659c9bc1SBen Hutchings { 1411659c9bc1SBen Hutchings int tm, ps; 1412659c9bc1SBen Hutchings 1413659c9bc1SBen Hutchings u8 board_rev = readb(slot->host->ioaddr + SYSKT_BOARD_REV); 1414659c9bc1SBen Hutchings u8 chip_rev = readb(slot->host->ioaddr + SYSKT_CHIP_REV); 1415659c9bc1SBen Hutchings dev_info(&slot->chip->pdev->dev, "SysKonnect CardBus2SDIO, " 1416659c9bc1SBen Hutchings "board rev %d.%d, chip rev %d.%d\n", 1417659c9bc1SBen Hutchings board_rev >> 4, board_rev & 0xf, 1418659c9bc1SBen Hutchings chip_rev >> 4, chip_rev & 0xf); 1419659c9bc1SBen Hutchings if (chip_rev >= 0x20) 1420659c9bc1SBen Hutchings slot->host->quirks |= SDHCI_QUIRK_FORCE_DMA; 1421659c9bc1SBen Hutchings 1422659c9bc1SBen Hutchings writeb(SYSKT_POWER_330, slot->host->ioaddr + SYSKT_POWER_DATA); 1423659c9bc1SBen Hutchings writeb(SYSKT_POWER_START, slot->host->ioaddr + SYSKT_POWER_CMD); 1424659c9bc1SBen Hutchings udelay(50); 1425659c9bc1SBen Hutchings tm = 10; /* Wait max 1 ms */ 1426659c9bc1SBen Hutchings do { 1427659c9bc1SBen Hutchings ps = readw(slot->host->ioaddr + SYSKT_POWER_STATUS); 1428659c9bc1SBen Hutchings if (ps & SYSKT_POWER_STATUS_OK) 1429659c9bc1SBen Hutchings break; 1430659c9bc1SBen Hutchings udelay(100); 1431659c9bc1SBen Hutchings } while (--tm); 1432659c9bc1SBen Hutchings if (!tm) { 1433659c9bc1SBen Hutchings dev_err(&slot->chip->pdev->dev, 1434659c9bc1SBen Hutchings "power regulator never stabilized"); 1435659c9bc1SBen Hutchings writeb(0, slot->host->ioaddr + SYSKT_POWER_CMD); 1436659c9bc1SBen Hutchings return -ENODEV; 1437659c9bc1SBen Hutchings } 1438659c9bc1SBen Hutchings 1439659c9bc1SBen Hutchings return 0; 1440659c9bc1SBen Hutchings } 1441659c9bc1SBen Hutchings 1442659c9bc1SBen Hutchings static const struct sdhci_pci_fixes sdhci_syskt = { 1443659c9bc1SBen Hutchings .quirks = SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER, 1444659c9bc1SBen Hutchings .probe = syskt_probe, 1445659c9bc1SBen Hutchings .probe_slot = syskt_probe_slot, 1446659c9bc1SBen Hutchings }; 1447659c9bc1SBen Hutchings 1448659c9bc1SBen Hutchings static int via_probe(struct sdhci_pci_chip *chip) 1449659c9bc1SBen Hutchings { 1450659c9bc1SBen Hutchings if (chip->pdev->revision == 0x10) 1451659c9bc1SBen Hutchings chip->quirks |= SDHCI_QUIRK_DELAY_AFTER_POWER; 1452659c9bc1SBen Hutchings 1453659c9bc1SBen Hutchings return 0; 1454659c9bc1SBen Hutchings } 1455659c9bc1SBen Hutchings 1456659c9bc1SBen Hutchings static const struct sdhci_pci_fixes sdhci_via = { 1457659c9bc1SBen Hutchings .probe = via_probe, 1458659c9bc1SBen Hutchings }; 1459659c9bc1SBen Hutchings 1460659c9bc1SBen Hutchings static int rtsx_probe_slot(struct sdhci_pci_slot *slot) 1461659c9bc1SBen Hutchings { 1462659c9bc1SBen Hutchings slot->host->mmc->caps2 |= MMC_CAP2_HS200; 1463659c9bc1SBen Hutchings return 0; 1464659c9bc1SBen Hutchings } 1465659c9bc1SBen Hutchings 1466659c9bc1SBen Hutchings static const struct sdhci_pci_fixes sdhci_rtsx = { 1467659c9bc1SBen Hutchings .quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN | 1468659c9bc1SBen Hutchings SDHCI_QUIRK2_BROKEN_64_BIT_DMA | 1469659c9bc1SBen Hutchings SDHCI_QUIRK2_BROKEN_DDR50, 1470659c9bc1SBen Hutchings .probe_slot = rtsx_probe_slot, 1471659c9bc1SBen Hutchings }; 1472659c9bc1SBen Hutchings 1473659c9bc1SBen Hutchings /*AMD chipset generation*/ 1474659c9bc1SBen Hutchings enum amd_chipset_gen { 1475659c9bc1SBen Hutchings AMD_CHIPSET_BEFORE_ML, 1476659c9bc1SBen Hutchings AMD_CHIPSET_CZ, 1477659c9bc1SBen Hutchings AMD_CHIPSET_NL, 1478659c9bc1SBen Hutchings AMD_CHIPSET_UNKNOWN, 1479659c9bc1SBen Hutchings }; 1480659c9bc1SBen Hutchings 1481c31165d7SShyam Sundar S K /* AMD registers */ 1482c31165d7SShyam Sundar S K #define AMD_SD_AUTO_PATTERN 0xB8 1483c31165d7SShyam Sundar S K #define AMD_MSLEEP_DURATION 4 1484c31165d7SShyam Sundar S K #define AMD_SD_MISC_CONTROL 0xD0 1485c31165d7SShyam Sundar S K #define AMD_MAX_TUNE_VALUE 0x0B 1486c31165d7SShyam Sundar S K #define AMD_AUTO_TUNE_SEL 0x10800 1487c31165d7SShyam Sundar S K #define AMD_FIFO_PTR 0x30 1488c31165d7SShyam Sundar S K #define AMD_BIT_MASK 0x1F 1489c31165d7SShyam Sundar S K 1490c31165d7SShyam Sundar S K static void amd_tuning_reset(struct sdhci_host *host) 1491c31165d7SShyam Sundar S K { 1492c31165d7SShyam Sundar S K unsigned int val; 1493c31165d7SShyam Sundar S K 1494c31165d7SShyam Sundar S K val = sdhci_readw(host, SDHCI_HOST_CONTROL2); 1495c31165d7SShyam Sundar S K val |= SDHCI_CTRL_PRESET_VAL_ENABLE | SDHCI_CTRL_EXEC_TUNING; 1496c31165d7SShyam Sundar S K sdhci_writew(host, val, SDHCI_HOST_CONTROL2); 1497c31165d7SShyam Sundar S K 1498c31165d7SShyam Sundar S K val = sdhci_readw(host, SDHCI_HOST_CONTROL2); 1499c31165d7SShyam Sundar S K val &= ~SDHCI_CTRL_EXEC_TUNING; 1500c31165d7SShyam Sundar S K sdhci_writew(host, val, SDHCI_HOST_CONTROL2); 1501c31165d7SShyam Sundar S K } 1502c31165d7SShyam Sundar S K 1503c31165d7SShyam Sundar S K static void amd_config_tuning_phase(struct pci_dev *pdev, u8 phase) 1504c31165d7SShyam Sundar S K { 1505c31165d7SShyam Sundar S K unsigned int val; 1506c31165d7SShyam Sundar S K 1507c31165d7SShyam Sundar S K pci_read_config_dword(pdev, AMD_SD_AUTO_PATTERN, &val); 1508c31165d7SShyam Sundar S K val &= ~AMD_BIT_MASK; 1509c31165d7SShyam Sundar S K val |= (AMD_AUTO_TUNE_SEL | (phase << 1)); 1510c31165d7SShyam Sundar S K pci_write_config_dword(pdev, AMD_SD_AUTO_PATTERN, val); 1511c31165d7SShyam Sundar S K } 1512c31165d7SShyam Sundar S K 1513c31165d7SShyam Sundar S K static void amd_enable_manual_tuning(struct pci_dev *pdev) 1514c31165d7SShyam Sundar S K { 1515c31165d7SShyam Sundar S K unsigned int val; 1516c31165d7SShyam Sundar S K 1517c31165d7SShyam Sundar S K pci_read_config_dword(pdev, AMD_SD_MISC_CONTROL, &val); 1518c31165d7SShyam Sundar S K val |= AMD_FIFO_PTR; 1519c31165d7SShyam Sundar S K pci_write_config_dword(pdev, AMD_SD_MISC_CONTROL, val); 1520c31165d7SShyam Sundar S K } 1521c31165d7SShyam Sundar S K 1522300ad899SDaniel Kurtz static int amd_execute_tuning_hs200(struct sdhci_host *host, u32 opcode) 1523c31165d7SShyam Sundar S K { 1524c31165d7SShyam Sundar S K struct sdhci_pci_slot *slot = sdhci_priv(host); 1525c31165d7SShyam Sundar S K struct pci_dev *pdev = slot->chip->pdev; 1526c31165d7SShyam Sundar S K u8 valid_win = 0; 1527c31165d7SShyam Sundar S K u8 valid_win_max = 0; 1528c31165d7SShyam Sundar S K u8 valid_win_end = 0; 1529c31165d7SShyam Sundar S K u8 ctrl, tune_around; 1530c31165d7SShyam Sundar S K 1531c31165d7SShyam Sundar S K amd_tuning_reset(host); 1532c31165d7SShyam Sundar S K 1533c31165d7SShyam Sundar S K for (tune_around = 0; tune_around < 12; tune_around++) { 1534c31165d7SShyam Sundar S K amd_config_tuning_phase(pdev, tune_around); 1535c31165d7SShyam Sundar S K 1536c31165d7SShyam Sundar S K if (mmc_send_tuning(host->mmc, opcode, NULL)) { 1537c31165d7SShyam Sundar S K valid_win = 0; 1538c31165d7SShyam Sundar S K msleep(AMD_MSLEEP_DURATION); 1539c31165d7SShyam Sundar S K ctrl = SDHCI_RESET_CMD | SDHCI_RESET_DATA; 1540c31165d7SShyam Sundar S K sdhci_writeb(host, ctrl, SDHCI_SOFTWARE_RESET); 1541c31165d7SShyam Sundar S K } else if (++valid_win > valid_win_max) { 1542c31165d7SShyam Sundar S K valid_win_max = valid_win; 1543c31165d7SShyam Sundar S K valid_win_end = tune_around; 1544c31165d7SShyam Sundar S K } 1545c31165d7SShyam Sundar S K } 1546c31165d7SShyam Sundar S K 1547c31165d7SShyam Sundar S K if (!valid_win_max) { 1548c31165d7SShyam Sundar S K dev_err(&pdev->dev, "no tuning point found\n"); 1549c31165d7SShyam Sundar S K return -EIO; 1550c31165d7SShyam Sundar S K } 1551c31165d7SShyam Sundar S K 1552c31165d7SShyam Sundar S K amd_config_tuning_phase(pdev, valid_win_end - valid_win_max / 2); 1553c31165d7SShyam Sundar S K 1554c31165d7SShyam Sundar S K amd_enable_manual_tuning(pdev); 1555c31165d7SShyam Sundar S K 1556c31165d7SShyam Sundar S K host->mmc->retune_period = 0; 1557c31165d7SShyam Sundar S K 1558c31165d7SShyam Sundar S K return 0; 1559c31165d7SShyam Sundar S K } 1560c31165d7SShyam Sundar S K 1561300ad899SDaniel Kurtz static int amd_execute_tuning(struct mmc_host *mmc, u32 opcode) 1562300ad899SDaniel Kurtz { 1563300ad899SDaniel Kurtz struct sdhci_host *host = mmc_priv(mmc); 1564300ad899SDaniel Kurtz 1565300ad899SDaniel Kurtz /* AMD requires custom HS200 tuning */ 1566300ad899SDaniel Kurtz if (host->timing == MMC_TIMING_MMC_HS200) 1567300ad899SDaniel Kurtz return amd_execute_tuning_hs200(host, opcode); 1568300ad899SDaniel Kurtz 1569300ad899SDaniel Kurtz /* Otherwise perform standard SDHCI tuning */ 1570300ad899SDaniel Kurtz return sdhci_execute_tuning(mmc, opcode); 1571300ad899SDaniel Kurtz } 1572300ad899SDaniel Kurtz 1573300ad899SDaniel Kurtz static int amd_probe_slot(struct sdhci_pci_slot *slot) 1574300ad899SDaniel Kurtz { 1575300ad899SDaniel Kurtz struct mmc_host_ops *ops = &slot->host->mmc_host_ops; 1576300ad899SDaniel Kurtz 1577300ad899SDaniel Kurtz ops->execute_tuning = amd_execute_tuning; 1578300ad899SDaniel Kurtz 1579300ad899SDaniel Kurtz return 0; 1580300ad899SDaniel Kurtz } 1581300ad899SDaniel Kurtz 1582659c9bc1SBen Hutchings static int amd_probe(struct sdhci_pci_chip *chip) 1583659c9bc1SBen Hutchings { 1584659c9bc1SBen Hutchings struct pci_dev *smbus_dev; 1585659c9bc1SBen Hutchings enum amd_chipset_gen gen; 1586659c9bc1SBen Hutchings 1587659c9bc1SBen Hutchings smbus_dev = pci_get_device(PCI_VENDOR_ID_AMD, 1588659c9bc1SBen Hutchings PCI_DEVICE_ID_AMD_HUDSON2_SMBUS, NULL); 1589659c9bc1SBen Hutchings if (smbus_dev) { 1590659c9bc1SBen Hutchings gen = AMD_CHIPSET_BEFORE_ML; 1591659c9bc1SBen Hutchings } else { 1592659c9bc1SBen Hutchings smbus_dev = pci_get_device(PCI_VENDOR_ID_AMD, 1593659c9bc1SBen Hutchings PCI_DEVICE_ID_AMD_KERNCZ_SMBUS, NULL); 1594659c9bc1SBen Hutchings if (smbus_dev) { 1595659c9bc1SBen Hutchings if (smbus_dev->revision < 0x51) 1596659c9bc1SBen Hutchings gen = AMD_CHIPSET_CZ; 1597659c9bc1SBen Hutchings else 1598659c9bc1SBen Hutchings gen = AMD_CHIPSET_NL; 1599659c9bc1SBen Hutchings } else { 1600659c9bc1SBen Hutchings gen = AMD_CHIPSET_UNKNOWN; 1601659c9bc1SBen Hutchings } 1602659c9bc1SBen Hutchings } 1603659c9bc1SBen Hutchings 1604c31165d7SShyam Sundar S K if (gen == AMD_CHIPSET_BEFORE_ML || gen == AMD_CHIPSET_CZ) 1605659c9bc1SBen Hutchings chip->quirks2 |= SDHCI_QUIRK2_CLEAR_TRANSFERMODE_REG_BEFORE_CMD; 1606659c9bc1SBen Hutchings 1607659c9bc1SBen Hutchings return 0; 1608659c9bc1SBen Hutchings } 1609659c9bc1SBen Hutchings 16107a869f00SRaul E Rangel static u32 sdhci_read_present_state(struct sdhci_host *host) 16117a869f00SRaul E Rangel { 16127a869f00SRaul E Rangel return sdhci_readl(host, SDHCI_PRESENT_STATE); 16137a869f00SRaul E Rangel } 16147a869f00SRaul E Rangel 161538413ce3Szhengbin static void amd_sdhci_reset(struct sdhci_host *host, u8 mask) 16167a869f00SRaul E Rangel { 16177a869f00SRaul E Rangel struct sdhci_pci_slot *slot = sdhci_priv(host); 16187a869f00SRaul E Rangel struct pci_dev *pdev = slot->chip->pdev; 16197a869f00SRaul E Rangel u32 present_state; 16207a869f00SRaul E Rangel 16217a869f00SRaul E Rangel /* 16227a869f00SRaul E Rangel * SDHC 0x7906 requires a hard reset to clear all internal state. 16237a869f00SRaul E Rangel * Otherwise it can get into a bad state where the DATA lines are always 16247a869f00SRaul E Rangel * read as zeros. 16257a869f00SRaul E Rangel */ 16267a869f00SRaul E Rangel if (pdev->device == 0x7906 && (mask & SDHCI_RESET_ALL)) { 16277a869f00SRaul E Rangel pci_clear_master(pdev); 16287a869f00SRaul E Rangel 16297a869f00SRaul E Rangel pci_save_state(pdev); 16307a869f00SRaul E Rangel 16317a869f00SRaul E Rangel pci_set_power_state(pdev, PCI_D3cold); 16327a869f00SRaul E Rangel pr_debug("%s: power_state=%u\n", mmc_hostname(host->mmc), 16337a869f00SRaul E Rangel pdev->current_state); 16347a869f00SRaul E Rangel pci_set_power_state(pdev, PCI_D0); 16357a869f00SRaul E Rangel 16367a869f00SRaul E Rangel pci_restore_state(pdev); 16377a869f00SRaul E Rangel 16387a869f00SRaul E Rangel /* 16397a869f00SRaul E Rangel * SDHCI_RESET_ALL says the card detect logic should not be 16407a869f00SRaul E Rangel * reset, but since we need to reset the entire controller 16417a869f00SRaul E Rangel * we should wait until the card detect logic has stabilized. 16427a869f00SRaul E Rangel * 16437a869f00SRaul E Rangel * This normally takes about 40ms. 16447a869f00SRaul E Rangel */ 16457a869f00SRaul E Rangel readx_poll_timeout( 16467a869f00SRaul E Rangel sdhci_read_present_state, 16477a869f00SRaul E Rangel host, 16487a869f00SRaul E Rangel present_state, 16497a869f00SRaul E Rangel present_state & SDHCI_CD_STABLE, 16507a869f00SRaul E Rangel 10000, 16517a869f00SRaul E Rangel 100000 16527a869f00SRaul E Rangel ); 16537a869f00SRaul E Rangel } 16547a869f00SRaul E Rangel 16557a869f00SRaul E Rangel return sdhci_reset(host, mask); 16567a869f00SRaul E Rangel } 16577a869f00SRaul E Rangel 1658c31165d7SShyam Sundar S K static const struct sdhci_ops amd_sdhci_pci_ops = { 1659c31165d7SShyam Sundar S K .set_clock = sdhci_set_clock, 1660c31165d7SShyam Sundar S K .enable_dma = sdhci_pci_enable_dma, 1661adc16398SMichał Mirosław .set_bus_width = sdhci_set_bus_width, 16627a869f00SRaul E Rangel .reset = amd_sdhci_reset, 1663c31165d7SShyam Sundar S K .set_uhs_signaling = sdhci_set_uhs_signaling, 1664c31165d7SShyam Sundar S K }; 1665c31165d7SShyam Sundar S K 1666659c9bc1SBen Hutchings static const struct sdhci_pci_fixes sdhci_amd = { 1667659c9bc1SBen Hutchings .probe = amd_probe, 1668c31165d7SShyam Sundar S K .ops = &amd_sdhci_pci_ops, 1669300ad899SDaniel Kurtz .probe_slot = amd_probe_slot, 1670659c9bc1SBen Hutchings }; 1671659c9bc1SBen Hutchings 1672659c9bc1SBen Hutchings static const struct pci_device_id pci_ids[] = { 1673c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(RICOH, R5C822, ricoh), 1674c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(RICOH, R5C843, ricoh_mmc), 1675c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(RICOH, R5CE822, ricoh_mmc), 1676c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(RICOH, R5CE823, ricoh_mmc), 1677c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(ENE, CB712_SD, ene_712), 1678c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(ENE, CB712_SD_2, ene_712), 1679c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(ENE, CB714_SD, ene_714), 1680c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(ENE, CB714_SD_2, ene_714), 1681c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(MARVELL, 88ALP01_SD, cafe), 1682c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(JMICRON, JMB38X_SD, jmicron), 1683c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(JMICRON, JMB38X_MMC, jmicron), 1684c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(JMICRON, JMB388_SD, jmicron), 1685c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(JMICRON, JMB388_ESD, jmicron), 1686c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(SYSKONNECT, 8000, syskt), 1687c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(VIA, 95D0, via), 1688c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(REALTEK, 5250, rtsx), 1689c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, QRK_SD, intel_qrk), 1690c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, MRST_SD0, intel_mrst_hc0), 1691c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, MRST_SD1, intel_mrst_hc1_hc2), 1692c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, MRST_SD2, intel_mrst_hc1_hc2), 1693c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, MFD_SD, intel_mfd_sd), 1694c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, MFD_SDIO1, intel_mfd_sdio), 1695c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, MFD_SDIO2, intel_mfd_sdio), 1696c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, MFD_EMMC0, intel_mfd_emmc), 1697c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, MFD_EMMC1, intel_mfd_emmc), 1698c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, PCH_SDIO0, intel_pch_sdio), 1699c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, PCH_SDIO1, intel_pch_sdio), 1700c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, BYT_EMMC, intel_byt_emmc), 1701c949c907SMatthias Kraemer SDHCI_PCI_SUBDEVICE(INTEL, BYT_SDIO, NI, 7884, ni_byt_sdio), 1702c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, BYT_SDIO, intel_byt_sdio), 1703c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, BYT_SD, intel_byt_sd), 1704c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, BYT_EMMC2, intel_byt_emmc), 1705c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, BSW_EMMC, intel_byt_emmc), 1706c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, BSW_SDIO, intel_byt_sdio), 1707c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, BSW_SD, intel_byt_sd), 1708c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, CLV_SDIO0, intel_mfd_sd), 1709c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, CLV_SDIO1, intel_mfd_sdio), 1710c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, CLV_SDIO2, intel_mfd_sdio), 1711c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, CLV_EMMC0, intel_mfd_emmc), 1712c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, CLV_EMMC1, intel_mfd_emmc), 1713c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, MRFLD_MMC, intel_mrfld_mmc), 1714c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, SPT_EMMC, intel_byt_emmc), 1715c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, SPT_SDIO, intel_byt_sdio), 1716c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, SPT_SD, intel_byt_sd), 1717c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, DNV_EMMC, intel_byt_emmc), 1718cdaba732SAdrian Hunter SDHCI_PCI_DEVICE(INTEL, CDF_EMMC, intel_glk_emmc), 1719c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, BXT_EMMC, intel_byt_emmc), 1720c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, BXT_SDIO, intel_byt_sdio), 1721c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, BXT_SD, intel_byt_sd), 1722c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, BXTM_EMMC, intel_byt_emmc), 1723c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, BXTM_SDIO, intel_byt_sdio), 1724c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, BXTM_SD, intel_byt_sd), 1725c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, APL_EMMC, intel_byt_emmc), 1726c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, APL_SDIO, intel_byt_sdio), 1727c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, APL_SD, intel_byt_sd), 1728bc55dcd8SAdrian Hunter SDHCI_PCI_DEVICE(INTEL, GLK_EMMC, intel_glk_emmc), 1729c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, GLK_SDIO, intel_byt_sdio), 1730c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, GLK_SD, intel_byt_sd), 1731bc55dcd8SAdrian Hunter SDHCI_PCI_DEVICE(INTEL, CNP_EMMC, intel_glk_emmc), 1732bc55dcd8SAdrian Hunter SDHCI_PCI_DEVICE(INTEL, CNP_SD, intel_byt_sd), 1733bc55dcd8SAdrian Hunter SDHCI_PCI_DEVICE(INTEL, CNPH_SD, intel_byt_sd), 17345637ffadSAdrian Hunter SDHCI_PCI_DEVICE(INTEL, ICP_EMMC, intel_glk_emmc), 17355637ffadSAdrian Hunter SDHCI_PCI_DEVICE(INTEL, ICP_SD, intel_byt_sd), 1736cb3a7d4aSAdrian Hunter SDHCI_PCI_DEVICE(INTEL, EHL_EMMC, intel_glk_emmc), 1737cb3a7d4aSAdrian Hunter SDHCI_PCI_DEVICE(INTEL, EHL_SD, intel_byt_sd), 1738765c5967SAdrian Hunter SDHCI_PCI_DEVICE(INTEL, CML_EMMC, intel_glk_emmc), 1739765c5967SAdrian Hunter SDHCI_PCI_DEVICE(INTEL, CML_SD, intel_byt_sd), 17408f05eee6SAdrian Hunter SDHCI_PCI_DEVICE(INTEL, CMLH_SD, intel_byt_sd), 1741315e3bd7SAdrian Hunter SDHCI_PCI_DEVICE(INTEL, JSL_EMMC, intel_glk_emmc), 1742315e3bd7SAdrian Hunter SDHCI_PCI_DEVICE(INTEL, JSL_SD, intel_byt_sd), 1743c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(O2, 8120, o2), 1744c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(O2, 8220, o2), 1745c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(O2, 8221, o2), 1746c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(O2, 8320, o2), 1747c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(O2, 8321, o2), 1748c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(O2, FUJIN2, o2), 1749c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(O2, SDS0, o2), 1750c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(O2, SDS1, o2), 1751c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(O2, SEABIRD0, o2), 1752c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(O2, SEABIRD1, o2), 1753d72d72cdSAtul Garg SDHCI_PCI_DEVICE(ARASAN, PHY_EMMC, arasan), 1754152f8204SPrabu Thangamuthu SDHCI_PCI_DEVICE(SYNOPSYS, DWC_MSHC, snps), 1755e51df6ceSBen Chuang SDHCI_PCI_DEVICE(GLI, 9750, gl9750), 1756e51df6ceSBen Chuang SDHCI_PCI_DEVICE(GLI, 9755, gl9755), 17571ae1d2d6SBen Chuang SDHCI_PCI_DEVICE(GLI, 9763E, gl9763e), 1758c949c907SMatthias Kraemer SDHCI_PCI_DEVICE_CLASS(AMD, SYSTEM_SDHCI, PCI_CLASS_MASK, amd), 1759c949c907SMatthias Kraemer /* Generic SD host controller */ 1760c949c907SMatthias Kraemer {PCI_DEVICE_CLASS(SYSTEM_SDHCI, PCI_CLASS_MASK)}, 1761659c9bc1SBen Hutchings { /* end: all zeroes */ }, 1762659c9bc1SBen Hutchings }; 1763659c9bc1SBen Hutchings 1764659c9bc1SBen Hutchings MODULE_DEVICE_TABLE(pci, pci_ids); 1765659c9bc1SBen Hutchings 1766659c9bc1SBen Hutchings /*****************************************************************************\ 1767659c9bc1SBen Hutchings * * 1768659c9bc1SBen Hutchings * SDHCI core callbacks * 1769659c9bc1SBen Hutchings * * 1770659c9bc1SBen Hutchings \*****************************************************************************/ 1771659c9bc1SBen Hutchings 1772d72d72cdSAtul Garg int sdhci_pci_enable_dma(struct sdhci_host *host) 1773659c9bc1SBen Hutchings { 1774659c9bc1SBen Hutchings struct sdhci_pci_slot *slot; 1775659c9bc1SBen Hutchings struct pci_dev *pdev; 1776659c9bc1SBen Hutchings 1777659c9bc1SBen Hutchings slot = sdhci_priv(host); 1778659c9bc1SBen Hutchings pdev = slot->chip->pdev; 1779659c9bc1SBen Hutchings 1780659c9bc1SBen Hutchings if (((pdev->class & 0xFFFF00) == (PCI_CLASS_SYSTEM_SDHCI << 8)) && 1781659c9bc1SBen Hutchings ((pdev->class & 0x0000FF) != PCI_SDHCI_IFDMA) && 1782659c9bc1SBen Hutchings (host->flags & SDHCI_USE_SDMA)) { 1783659c9bc1SBen Hutchings dev_warn(&pdev->dev, "Will use DMA mode even though HW " 1784659c9bc1SBen Hutchings "doesn't fully claim to support it.\n"); 1785659c9bc1SBen Hutchings } 1786659c9bc1SBen Hutchings 1787659c9bc1SBen Hutchings pci_set_master(pdev); 1788659c9bc1SBen Hutchings 1789659c9bc1SBen Hutchings return 0; 1790659c9bc1SBen Hutchings } 1791659c9bc1SBen Hutchings 1792659c9bc1SBen Hutchings static void sdhci_pci_gpio_hw_reset(struct sdhci_host *host) 1793659c9bc1SBen Hutchings { 1794659c9bc1SBen Hutchings struct sdhci_pci_slot *slot = sdhci_priv(host); 1795659c9bc1SBen Hutchings int rst_n_gpio = slot->rst_n_gpio; 1796659c9bc1SBen Hutchings 1797659c9bc1SBen Hutchings if (!gpio_is_valid(rst_n_gpio)) 1798659c9bc1SBen Hutchings return; 1799659c9bc1SBen Hutchings gpio_set_value_cansleep(rst_n_gpio, 0); 1800659c9bc1SBen Hutchings /* For eMMC, minimum is 1us but give it 10us for good measure */ 1801659c9bc1SBen Hutchings udelay(10); 1802659c9bc1SBen Hutchings gpio_set_value_cansleep(rst_n_gpio, 1); 1803659c9bc1SBen Hutchings /* For eMMC, minimum is 200us but give it 300us for good measure */ 1804659c9bc1SBen Hutchings usleep_range(300, 1000); 1805659c9bc1SBen Hutchings } 1806659c9bc1SBen Hutchings 1807659c9bc1SBen Hutchings static void sdhci_pci_hw_reset(struct sdhci_host *host) 1808659c9bc1SBen Hutchings { 1809659c9bc1SBen Hutchings struct sdhci_pci_slot *slot = sdhci_priv(host); 1810659c9bc1SBen Hutchings 1811659c9bc1SBen Hutchings if (slot->hw_reset) 1812659c9bc1SBen Hutchings slot->hw_reset(host); 1813659c9bc1SBen Hutchings } 1814659c9bc1SBen Hutchings 1815659c9bc1SBen Hutchings static const struct sdhci_ops sdhci_pci_ops = { 1816659c9bc1SBen Hutchings .set_clock = sdhci_set_clock, 1817659c9bc1SBen Hutchings .enable_dma = sdhci_pci_enable_dma, 1818adc16398SMichał Mirosław .set_bus_width = sdhci_set_bus_width, 1819659c9bc1SBen Hutchings .reset = sdhci_reset, 1820659c9bc1SBen Hutchings .set_uhs_signaling = sdhci_set_uhs_signaling, 1821659c9bc1SBen Hutchings .hw_reset = sdhci_pci_hw_reset, 1822659c9bc1SBen Hutchings }; 1823659c9bc1SBen Hutchings 1824659c9bc1SBen Hutchings /*****************************************************************************\ 1825659c9bc1SBen Hutchings * * 1826659c9bc1SBen Hutchings * Suspend/resume * 1827659c9bc1SBen Hutchings * * 1828659c9bc1SBen Hutchings \*****************************************************************************/ 1829659c9bc1SBen Hutchings 1830f9900f15SUlf Hansson #ifdef CONFIG_PM_SLEEP 1831659c9bc1SBen Hutchings static int sdhci_pci_suspend(struct device *dev) 1832659c9bc1SBen Hutchings { 183390b51e3cSChuhong Yuan struct sdhci_pci_chip *chip = dev_get_drvdata(dev); 1834659c9bc1SBen Hutchings 1835659c9bc1SBen Hutchings if (!chip) 1836659c9bc1SBen Hutchings return 0; 1837659c9bc1SBen Hutchings 183830cf2803SAdrian Hunter if (chip->fixes && chip->fixes->suspend) 183930cf2803SAdrian Hunter return chip->fixes->suspend(chip); 1840659c9bc1SBen Hutchings 184130cf2803SAdrian Hunter return sdhci_pci_suspend_host(chip); 1842659c9bc1SBen Hutchings } 1843659c9bc1SBen Hutchings 1844659c9bc1SBen Hutchings static int sdhci_pci_resume(struct device *dev) 1845659c9bc1SBen Hutchings { 184690b51e3cSChuhong Yuan struct sdhci_pci_chip *chip = dev_get_drvdata(dev); 1847659c9bc1SBen Hutchings 1848659c9bc1SBen Hutchings if (!chip) 1849659c9bc1SBen Hutchings return 0; 1850659c9bc1SBen Hutchings 185130cf2803SAdrian Hunter if (chip->fixes && chip->fixes->resume) 185230cf2803SAdrian Hunter return chip->fixes->resume(chip); 1853659c9bc1SBen Hutchings 185430cf2803SAdrian Hunter return sdhci_pci_resume_host(chip); 1855659c9bc1SBen Hutchings } 1856f9900f15SUlf Hansson #endif 1857659c9bc1SBen Hutchings 1858f9900f15SUlf Hansson #ifdef CONFIG_PM 1859659c9bc1SBen Hutchings static int sdhci_pci_runtime_suspend(struct device *dev) 1860659c9bc1SBen Hutchings { 186190b51e3cSChuhong Yuan struct sdhci_pci_chip *chip = dev_get_drvdata(dev); 1862659c9bc1SBen Hutchings 1863659c9bc1SBen Hutchings if (!chip) 1864659c9bc1SBen Hutchings return 0; 1865659c9bc1SBen Hutchings 1866966d696aSAdrian Hunter if (chip->fixes && chip->fixes->runtime_suspend) 1867966d696aSAdrian Hunter return chip->fixes->runtime_suspend(chip); 1868659c9bc1SBen Hutchings 1869966d696aSAdrian Hunter return sdhci_pci_runtime_suspend_host(chip); 1870659c9bc1SBen Hutchings } 1871659c9bc1SBen Hutchings 1872659c9bc1SBen Hutchings static int sdhci_pci_runtime_resume(struct device *dev) 1873659c9bc1SBen Hutchings { 187490b51e3cSChuhong Yuan struct sdhci_pci_chip *chip = dev_get_drvdata(dev); 1875659c9bc1SBen Hutchings 1876659c9bc1SBen Hutchings if (!chip) 1877659c9bc1SBen Hutchings return 0; 1878659c9bc1SBen Hutchings 1879966d696aSAdrian Hunter if (chip->fixes && chip->fixes->runtime_resume) 1880966d696aSAdrian Hunter return chip->fixes->runtime_resume(chip); 1881659c9bc1SBen Hutchings 1882966d696aSAdrian Hunter return sdhci_pci_runtime_resume_host(chip); 1883659c9bc1SBen Hutchings } 1884f9900f15SUlf Hansson #endif 1885659c9bc1SBen Hutchings 1886659c9bc1SBen Hutchings static const struct dev_pm_ops sdhci_pci_pm_ops = { 1887f9900f15SUlf Hansson SET_SYSTEM_SLEEP_PM_OPS(sdhci_pci_suspend, sdhci_pci_resume) 1888659c9bc1SBen Hutchings SET_RUNTIME_PM_OPS(sdhci_pci_runtime_suspend, 1889659c9bc1SBen Hutchings sdhci_pci_runtime_resume, NULL) 1890659c9bc1SBen Hutchings }; 1891659c9bc1SBen Hutchings 1892659c9bc1SBen Hutchings /*****************************************************************************\ 1893659c9bc1SBen Hutchings * * 1894659c9bc1SBen Hutchings * Device probing/removal * 1895659c9bc1SBen Hutchings * * 1896659c9bc1SBen Hutchings \*****************************************************************************/ 1897659c9bc1SBen Hutchings 1898659c9bc1SBen Hutchings static struct sdhci_pci_slot *sdhci_pci_probe_slot( 1899659c9bc1SBen Hutchings struct pci_dev *pdev, struct sdhci_pci_chip *chip, int first_bar, 1900659c9bc1SBen Hutchings int slotno) 1901659c9bc1SBen Hutchings { 1902659c9bc1SBen Hutchings struct sdhci_pci_slot *slot; 1903659c9bc1SBen Hutchings struct sdhci_host *host; 1904659c9bc1SBen Hutchings int ret, bar = first_bar + slotno; 1905ac9f67b5SAdrian Hunter size_t priv_size = chip->fixes ? chip->fixes->priv_size : 0; 1906659c9bc1SBen Hutchings 1907659c9bc1SBen Hutchings if (!(pci_resource_flags(pdev, bar) & IORESOURCE_MEM)) { 1908659c9bc1SBen Hutchings dev_err(&pdev->dev, "BAR %d is not iomem. Aborting.\n", bar); 1909659c9bc1SBen Hutchings return ERR_PTR(-ENODEV); 1910659c9bc1SBen Hutchings } 1911659c9bc1SBen Hutchings 1912659c9bc1SBen Hutchings if (pci_resource_len(pdev, bar) < 0x100) { 1913659c9bc1SBen Hutchings dev_err(&pdev->dev, "Invalid iomem size. You may " 1914659c9bc1SBen Hutchings "experience problems.\n"); 1915659c9bc1SBen Hutchings } 1916659c9bc1SBen Hutchings 1917659c9bc1SBen Hutchings if ((pdev->class & 0x0000FF) == PCI_SDHCI_IFVENDOR) { 1918659c9bc1SBen Hutchings dev_err(&pdev->dev, "Vendor specific interface. Aborting.\n"); 1919659c9bc1SBen Hutchings return ERR_PTR(-ENODEV); 1920659c9bc1SBen Hutchings } 1921659c9bc1SBen Hutchings 1922659c9bc1SBen Hutchings if ((pdev->class & 0x0000FF) > PCI_SDHCI_IFVENDOR) { 1923659c9bc1SBen Hutchings dev_err(&pdev->dev, "Unknown interface. Aborting.\n"); 1924659c9bc1SBen Hutchings return ERR_PTR(-ENODEV); 1925659c9bc1SBen Hutchings } 1926659c9bc1SBen Hutchings 1927ac9f67b5SAdrian Hunter host = sdhci_alloc_host(&pdev->dev, sizeof(*slot) + priv_size); 1928659c9bc1SBen Hutchings if (IS_ERR(host)) { 1929659c9bc1SBen Hutchings dev_err(&pdev->dev, "cannot allocate host\n"); 1930659c9bc1SBen Hutchings return ERR_CAST(host); 1931659c9bc1SBen Hutchings } 1932659c9bc1SBen Hutchings 1933659c9bc1SBen Hutchings slot = sdhci_priv(host); 1934659c9bc1SBen Hutchings 1935659c9bc1SBen Hutchings slot->chip = chip; 1936659c9bc1SBen Hutchings slot->host = host; 1937659c9bc1SBen Hutchings slot->rst_n_gpio = -EINVAL; 1938659c9bc1SBen Hutchings slot->cd_gpio = -EINVAL; 1939659c9bc1SBen Hutchings slot->cd_idx = -1; 1940659c9bc1SBen Hutchings 1941659c9bc1SBen Hutchings /* Retrieve platform data if there is any */ 1942659c9bc1SBen Hutchings if (*sdhci_pci_get_data) 1943659c9bc1SBen Hutchings slot->data = sdhci_pci_get_data(pdev, slotno); 1944659c9bc1SBen Hutchings 1945659c9bc1SBen Hutchings if (slot->data) { 1946659c9bc1SBen Hutchings if (slot->data->setup) { 1947659c9bc1SBen Hutchings ret = slot->data->setup(slot->data); 1948659c9bc1SBen Hutchings if (ret) { 1949659c9bc1SBen Hutchings dev_err(&pdev->dev, "platform setup failed\n"); 1950659c9bc1SBen Hutchings goto free; 1951659c9bc1SBen Hutchings } 1952659c9bc1SBen Hutchings } 1953659c9bc1SBen Hutchings slot->rst_n_gpio = slot->data->rst_n_gpio; 1954659c9bc1SBen Hutchings slot->cd_gpio = slot->data->cd_gpio; 1955659c9bc1SBen Hutchings } 1956659c9bc1SBen Hutchings 1957659c9bc1SBen Hutchings host->hw_name = "PCI"; 19586bc09063SAdrian Hunter host->ops = chip->fixes && chip->fixes->ops ? 19596bc09063SAdrian Hunter chip->fixes->ops : 19606bc09063SAdrian Hunter &sdhci_pci_ops; 1961659c9bc1SBen Hutchings host->quirks = chip->quirks; 1962659c9bc1SBen Hutchings host->quirks2 = chip->quirks2; 1963659c9bc1SBen Hutchings 1964659c9bc1SBen Hutchings host->irq = pdev->irq; 1965659c9bc1SBen Hutchings 1966c10bc372SAndy Shevchenko ret = pcim_iomap_regions(pdev, BIT(bar), mmc_hostname(host->mmc)); 1967659c9bc1SBen Hutchings if (ret) { 1968659c9bc1SBen Hutchings dev_err(&pdev->dev, "cannot request region\n"); 1969659c9bc1SBen Hutchings goto cleanup; 1970659c9bc1SBen Hutchings } 1971659c9bc1SBen Hutchings 1972c10bc372SAndy Shevchenko host->ioaddr = pcim_iomap_table(pdev)[bar]; 1973659c9bc1SBen Hutchings 1974659c9bc1SBen Hutchings if (chip->fixes && chip->fixes->probe_slot) { 1975659c9bc1SBen Hutchings ret = chip->fixes->probe_slot(slot); 1976659c9bc1SBen Hutchings if (ret) 1977c10bc372SAndy Shevchenko goto cleanup; 1978659c9bc1SBen Hutchings } 1979659c9bc1SBen Hutchings 1980659c9bc1SBen Hutchings if (gpio_is_valid(slot->rst_n_gpio)) { 1981c10bc372SAndy Shevchenko if (!devm_gpio_request(&pdev->dev, slot->rst_n_gpio, "eMMC_reset")) { 1982659c9bc1SBen Hutchings gpio_direction_output(slot->rst_n_gpio, 1); 1983659c9bc1SBen Hutchings slot->host->mmc->caps |= MMC_CAP_HW_RESET; 1984659c9bc1SBen Hutchings slot->hw_reset = sdhci_pci_gpio_hw_reset; 1985659c9bc1SBen Hutchings } else { 1986659c9bc1SBen Hutchings dev_warn(&pdev->dev, "failed to request rst_n_gpio\n"); 1987659c9bc1SBen Hutchings slot->rst_n_gpio = -EINVAL; 1988659c9bc1SBen Hutchings } 1989659c9bc1SBen Hutchings } 1990659c9bc1SBen Hutchings 1991e92cc35dSAdrian Hunter host->mmc->pm_caps = MMC_PM_KEEP_POWER; 1992659c9bc1SBen Hutchings host->mmc->slotno = slotno; 1993659c9bc1SBen Hutchings host->mmc->caps2 |= MMC_CAP2_NO_PRESCAN_POWERUP; 1994659c9bc1SBen Hutchings 1995e92cc35dSAdrian Hunter if (device_can_wakeup(&pdev->dev)) 1996e92cc35dSAdrian Hunter host->mmc->pm_caps |= MMC_PM_WAKE_SDIO_IRQ; 1997e92cc35dSAdrian Hunter 1998d56ee1ffSAdrian Hunter if (host->mmc->caps & MMC_CAP_CD_WAKE) 1999d56ee1ffSAdrian Hunter device_init_wakeup(&pdev->dev, true); 2000d56ee1ffSAdrian Hunter 20018f743d03SDavid E. Box if (slot->cd_idx >= 0) { 2002cdcefe6bSRajat Jain ret = mmc_gpiod_request_cd(host->mmc, "cd", slot->cd_idx, 2003d0052ad9SMichał Mirosław slot->cd_override_level, 0); 2004cdcefe6bSRajat Jain if (ret && ret != -EPROBE_DEFER) 2005cdcefe6bSRajat Jain ret = mmc_gpiod_request_cd(host->mmc, NULL, 2006cdcefe6bSRajat Jain slot->cd_idx, 2007cdcefe6bSRajat Jain slot->cd_override_level, 2008d0052ad9SMichał Mirosław 0); 20098f743d03SDavid E. Box if (ret == -EPROBE_DEFER) 20108f743d03SDavid E. Box goto remove; 20118f743d03SDavid E. Box 20128f743d03SDavid E. Box if (ret) { 2013659c9bc1SBen Hutchings dev_warn(&pdev->dev, "failed to setup card detect gpio\n"); 2014659c9bc1SBen Hutchings slot->cd_idx = -1; 2015659c9bc1SBen Hutchings } 20168f743d03SDavid E. Box } 2017659c9bc1SBen Hutchings 201861c951deSAdrian Hunter if (chip->fixes && chip->fixes->add_host) 201961c951deSAdrian Hunter ret = chip->fixes->add_host(slot); 202061c951deSAdrian Hunter else 2021659c9bc1SBen Hutchings ret = sdhci_add_host(host); 2022659c9bc1SBen Hutchings if (ret) 2023659c9bc1SBen Hutchings goto remove; 2024659c9bc1SBen Hutchings 2025659c9bc1SBen Hutchings sdhci_pci_add_own_cd(slot); 2026659c9bc1SBen Hutchings 2027659c9bc1SBen Hutchings /* 2028659c9bc1SBen Hutchings * Check if the chip needs a separate GPIO for card detect to wake up 2029659c9bc1SBen Hutchings * from runtime suspend. If it is not there, don't allow runtime PM. 2030659c9bc1SBen Hutchings * Note sdhci_pci_add_own_cd() sets slot->cd_gpio to -EINVAL on failure. 2031659c9bc1SBen Hutchings */ 2032659c9bc1SBen Hutchings if (chip->fixes && chip->fixes->own_cd_for_runtime_pm && 2033659c9bc1SBen Hutchings !gpio_is_valid(slot->cd_gpio) && slot->cd_idx < 0) 2034659c9bc1SBen Hutchings chip->allow_runtime_pm = false; 2035659c9bc1SBen Hutchings 2036659c9bc1SBen Hutchings return slot; 2037659c9bc1SBen Hutchings 2038659c9bc1SBen Hutchings remove: 2039659c9bc1SBen Hutchings if (chip->fixes && chip->fixes->remove_slot) 2040659c9bc1SBen Hutchings chip->fixes->remove_slot(slot, 0); 2041659c9bc1SBen Hutchings 2042659c9bc1SBen Hutchings cleanup: 2043659c9bc1SBen Hutchings if (slot->data && slot->data->cleanup) 2044659c9bc1SBen Hutchings slot->data->cleanup(slot->data); 2045659c9bc1SBen Hutchings 2046659c9bc1SBen Hutchings free: 2047659c9bc1SBen Hutchings sdhci_free_host(host); 2048659c9bc1SBen Hutchings 2049659c9bc1SBen Hutchings return ERR_PTR(ret); 2050659c9bc1SBen Hutchings } 2051659c9bc1SBen Hutchings 2052659c9bc1SBen Hutchings static void sdhci_pci_remove_slot(struct sdhci_pci_slot *slot) 2053659c9bc1SBen Hutchings { 2054659c9bc1SBen Hutchings int dead; 2055659c9bc1SBen Hutchings u32 scratch; 2056659c9bc1SBen Hutchings 2057659c9bc1SBen Hutchings sdhci_pci_remove_own_cd(slot); 2058659c9bc1SBen Hutchings 2059659c9bc1SBen Hutchings dead = 0; 2060659c9bc1SBen Hutchings scratch = readl(slot->host->ioaddr + SDHCI_INT_STATUS); 2061659c9bc1SBen Hutchings if (scratch == (u32)-1) 2062659c9bc1SBen Hutchings dead = 1; 2063659c9bc1SBen Hutchings 2064659c9bc1SBen Hutchings sdhci_remove_host(slot->host, dead); 2065659c9bc1SBen Hutchings 2066659c9bc1SBen Hutchings if (slot->chip->fixes && slot->chip->fixes->remove_slot) 2067659c9bc1SBen Hutchings slot->chip->fixes->remove_slot(slot, dead); 2068659c9bc1SBen Hutchings 2069659c9bc1SBen Hutchings if (slot->data && slot->data->cleanup) 2070659c9bc1SBen Hutchings slot->data->cleanup(slot->data); 2071659c9bc1SBen Hutchings 2072659c9bc1SBen Hutchings sdhci_free_host(slot->host); 2073659c9bc1SBen Hutchings } 2074659c9bc1SBen Hutchings 2075659c9bc1SBen Hutchings static void sdhci_pci_runtime_pm_allow(struct device *dev) 2076659c9bc1SBen Hutchings { 207700884b61SAdrian Hunter pm_suspend_ignore_children(dev, 1); 2078659c9bc1SBen Hutchings pm_runtime_set_autosuspend_delay(dev, 50); 2079659c9bc1SBen Hutchings pm_runtime_use_autosuspend(dev); 208000884b61SAdrian Hunter pm_runtime_allow(dev); 208100884b61SAdrian Hunter /* Stay active until mmc core scans for a card */ 208200884b61SAdrian Hunter pm_runtime_put_noidle(dev); 2083659c9bc1SBen Hutchings } 2084659c9bc1SBen Hutchings 2085659c9bc1SBen Hutchings static void sdhci_pci_runtime_pm_forbid(struct device *dev) 2086659c9bc1SBen Hutchings { 2087659c9bc1SBen Hutchings pm_runtime_forbid(dev); 2088659c9bc1SBen Hutchings pm_runtime_get_noresume(dev); 2089659c9bc1SBen Hutchings } 2090659c9bc1SBen Hutchings 2091659c9bc1SBen Hutchings static int sdhci_pci_probe(struct pci_dev *pdev, 2092659c9bc1SBen Hutchings const struct pci_device_id *ent) 2093659c9bc1SBen Hutchings { 2094659c9bc1SBen Hutchings struct sdhci_pci_chip *chip; 2095659c9bc1SBen Hutchings struct sdhci_pci_slot *slot; 2096659c9bc1SBen Hutchings 2097659c9bc1SBen Hutchings u8 slots, first_bar; 2098659c9bc1SBen Hutchings int ret, i; 2099659c9bc1SBen Hutchings 2100659c9bc1SBen Hutchings BUG_ON(pdev == NULL); 2101659c9bc1SBen Hutchings BUG_ON(ent == NULL); 2102659c9bc1SBen Hutchings 2103659c9bc1SBen Hutchings dev_info(&pdev->dev, "SDHCI controller found [%04x:%04x] (rev %x)\n", 2104659c9bc1SBen Hutchings (int)pdev->vendor, (int)pdev->device, (int)pdev->revision); 2105659c9bc1SBen Hutchings 2106659c9bc1SBen Hutchings ret = pci_read_config_byte(pdev, PCI_SLOT_INFO, &slots); 2107659c9bc1SBen Hutchings if (ret) 2108659c9bc1SBen Hutchings return ret; 2109659c9bc1SBen Hutchings 2110659c9bc1SBen Hutchings slots = PCI_SLOT_INFO_SLOTS(slots) + 1; 2111659c9bc1SBen Hutchings dev_dbg(&pdev->dev, "found %d slot(s)\n", slots); 2112659c9bc1SBen Hutchings 2113659c9bc1SBen Hutchings BUG_ON(slots > MAX_SLOTS); 2114659c9bc1SBen Hutchings 2115659c9bc1SBen Hutchings ret = pci_read_config_byte(pdev, PCI_SLOT_INFO, &first_bar); 2116659c9bc1SBen Hutchings if (ret) 2117659c9bc1SBen Hutchings return ret; 2118659c9bc1SBen Hutchings 2119659c9bc1SBen Hutchings first_bar &= PCI_SLOT_INFO_FIRST_BAR_MASK; 2120659c9bc1SBen Hutchings 2121659c9bc1SBen Hutchings if (first_bar > 5) { 2122659c9bc1SBen Hutchings dev_err(&pdev->dev, "Invalid first BAR. Aborting.\n"); 2123659c9bc1SBen Hutchings return -ENODEV; 2124659c9bc1SBen Hutchings } 2125659c9bc1SBen Hutchings 212652ac7acfSAndy Shevchenko ret = pcim_enable_device(pdev); 2127659c9bc1SBen Hutchings if (ret) 2128659c9bc1SBen Hutchings return ret; 2129659c9bc1SBen Hutchings 213052ac7acfSAndy Shevchenko chip = devm_kzalloc(&pdev->dev, sizeof(*chip), GFP_KERNEL); 213152ac7acfSAndy Shevchenko if (!chip) 213252ac7acfSAndy Shevchenko return -ENOMEM; 2133659c9bc1SBen Hutchings 2134659c9bc1SBen Hutchings chip->pdev = pdev; 2135659c9bc1SBen Hutchings chip->fixes = (const struct sdhci_pci_fixes *)ent->driver_data; 2136659c9bc1SBen Hutchings if (chip->fixes) { 2137659c9bc1SBen Hutchings chip->quirks = chip->fixes->quirks; 2138659c9bc1SBen Hutchings chip->quirks2 = chip->fixes->quirks2; 2139659c9bc1SBen Hutchings chip->allow_runtime_pm = chip->fixes->allow_runtime_pm; 2140659c9bc1SBen Hutchings } 2141659c9bc1SBen Hutchings chip->num_slots = slots; 2142d38dcad4SAdrian Hunter chip->pm_retune = true; 2143d38dcad4SAdrian Hunter chip->rpm_retune = true; 2144659c9bc1SBen Hutchings 2145659c9bc1SBen Hutchings pci_set_drvdata(pdev, chip); 2146659c9bc1SBen Hutchings 2147659c9bc1SBen Hutchings if (chip->fixes && chip->fixes->probe) { 2148659c9bc1SBen Hutchings ret = chip->fixes->probe(chip); 2149659c9bc1SBen Hutchings if (ret) 215052ac7acfSAndy Shevchenko return ret; 2151659c9bc1SBen Hutchings } 2152659c9bc1SBen Hutchings 2153659c9bc1SBen Hutchings slots = chip->num_slots; /* Quirk may have changed this */ 2154659c9bc1SBen Hutchings 2155659c9bc1SBen Hutchings for (i = 0; i < slots; i++) { 2156659c9bc1SBen Hutchings slot = sdhci_pci_probe_slot(pdev, chip, first_bar, i); 2157659c9bc1SBen Hutchings if (IS_ERR(slot)) { 2158659c9bc1SBen Hutchings for (i--; i >= 0; i--) 2159659c9bc1SBen Hutchings sdhci_pci_remove_slot(chip->slots[i]); 216052ac7acfSAndy Shevchenko return PTR_ERR(slot); 2161659c9bc1SBen Hutchings } 2162659c9bc1SBen Hutchings 2163659c9bc1SBen Hutchings chip->slots[i] = slot; 2164659c9bc1SBen Hutchings } 2165659c9bc1SBen Hutchings 2166659c9bc1SBen Hutchings if (chip->allow_runtime_pm) 2167659c9bc1SBen Hutchings sdhci_pci_runtime_pm_allow(&pdev->dev); 2168659c9bc1SBen Hutchings 2169659c9bc1SBen Hutchings return 0; 2170659c9bc1SBen Hutchings } 2171659c9bc1SBen Hutchings 2172659c9bc1SBen Hutchings static void sdhci_pci_remove(struct pci_dev *pdev) 2173659c9bc1SBen Hutchings { 2174659c9bc1SBen Hutchings int i; 217552ac7acfSAndy Shevchenko struct sdhci_pci_chip *chip = pci_get_drvdata(pdev); 2176659c9bc1SBen Hutchings 2177659c9bc1SBen Hutchings if (chip->allow_runtime_pm) 2178659c9bc1SBen Hutchings sdhci_pci_runtime_pm_forbid(&pdev->dev); 2179659c9bc1SBen Hutchings 2180659c9bc1SBen Hutchings for (i = 0; i < chip->num_slots; i++) 2181659c9bc1SBen Hutchings sdhci_pci_remove_slot(chip->slots[i]); 2182659c9bc1SBen Hutchings } 2183659c9bc1SBen Hutchings 2184659c9bc1SBen Hutchings static struct pci_driver sdhci_driver = { 2185659c9bc1SBen Hutchings .name = "sdhci-pci", 2186659c9bc1SBen Hutchings .id_table = pci_ids, 2187659c9bc1SBen Hutchings .probe = sdhci_pci_probe, 2188659c9bc1SBen Hutchings .remove = sdhci_pci_remove, 2189659c9bc1SBen Hutchings .driver = { 2190659c9bc1SBen Hutchings .pm = &sdhci_pci_pm_ops 2191659c9bc1SBen Hutchings }, 2192659c9bc1SBen Hutchings }; 2193659c9bc1SBen Hutchings 2194659c9bc1SBen Hutchings module_pci_driver(sdhci_driver); 2195659c9bc1SBen Hutchings 2196659c9bc1SBen Hutchings MODULE_AUTHOR("Pierre Ossman <pierre@ossman.eu>"); 2197659c9bc1SBen Hutchings MODULE_DESCRIPTION("Secure Digital Host Controller Interface PCI driver"); 2198659c9bc1SBen Hutchings MODULE_LICENSE("GPL"); 2199