12874c5fdSThomas Gleixner // SPDX-License-Identifier: GPL-2.0-or-later 2659c9bc1SBen Hutchings /* linux/drivers/mmc/host/sdhci-pci.c - SDHCI on PCI bus interface 3659c9bc1SBen Hutchings * 4659c9bc1SBen Hutchings * Copyright (C) 2005-2008 Pierre Ossman, All Rights Reserved. 5659c9bc1SBen Hutchings * 6659c9bc1SBen Hutchings * Thanks to the following companies for their support: 7659c9bc1SBen Hutchings * 8659c9bc1SBen Hutchings * - JMicron (hardware and technical support) 9659c9bc1SBen Hutchings */ 10659c9bc1SBen Hutchings 115305ec6aSAdrian Hunter #include <linux/bitfield.h> 12a72016a4SAdrian Hunter #include <linux/string.h> 13659c9bc1SBen Hutchings #include <linux/delay.h> 14659c9bc1SBen Hutchings #include <linux/highmem.h> 15659c9bc1SBen Hutchings #include <linux/module.h> 16659c9bc1SBen Hutchings #include <linux/pci.h> 17659c9bc1SBen Hutchings #include <linux/dma-mapping.h> 18659c9bc1SBen Hutchings #include <linux/slab.h> 19659c9bc1SBen Hutchings #include <linux/device.h> 20659c9bc1SBen Hutchings #include <linux/mmc/host.h> 21659c9bc1SBen Hutchings #include <linux/mmc/mmc.h> 22659c9bc1SBen Hutchings #include <linux/scatterlist.h> 23659c9bc1SBen Hutchings #include <linux/io.h> 247a869f00SRaul E Rangel #include <linux/iopoll.h> 25659c9bc1SBen Hutchings #include <linux/gpio.h> 26659c9bc1SBen Hutchings #include <linux/pm_runtime.h> 2746f4a69eSAdrian Hunter #include <linux/pm_qos.h> 2846f4a69eSAdrian Hunter #include <linux/debugfs.h> 29659c9bc1SBen Hutchings #include <linux/mmc/slot-gpio.h> 30659c9bc1SBen Hutchings #include <linux/mmc/sdhci-pci-data.h> 313f23df72SZach Brown #include <linux/acpi.h> 32bedf9fc0SAdrian Hunter #include <linux/dmi.h> 33659c9bc1SBen Hutchings 340a49a619SAdrian Hunter #ifdef CONFIG_X86 350a49a619SAdrian Hunter #include <asm/iosf_mbi.h> 360a49a619SAdrian Hunter #endif 370a49a619SAdrian Hunter 388ee82bdaSAdrian Hunter #include "cqhci.h" 398ee82bdaSAdrian Hunter 40659c9bc1SBen Hutchings #include "sdhci.h" 41659c9bc1SBen Hutchings #include "sdhci-pci.h" 42659c9bc1SBen Hutchings 43fee686b7SAdrian Hunter static void sdhci_pci_hw_reset(struct sdhci_host *host); 44fee686b7SAdrian Hunter 4530cf2803SAdrian Hunter #ifdef CONFIG_PM_SLEEP 4630cf2803SAdrian Hunter static int sdhci_pci_init_wakeup(struct sdhci_pci_chip *chip) 4730cf2803SAdrian Hunter { 4830cf2803SAdrian Hunter mmc_pm_flag_t pm_flags = 0; 49d56ee1ffSAdrian Hunter bool cap_cd_wake = false; 5030cf2803SAdrian Hunter int i; 5130cf2803SAdrian Hunter 5230cf2803SAdrian Hunter for (i = 0; i < chip->num_slots; i++) { 5330cf2803SAdrian Hunter struct sdhci_pci_slot *slot = chip->slots[i]; 5430cf2803SAdrian Hunter 55d56ee1ffSAdrian Hunter if (slot) { 5630cf2803SAdrian Hunter pm_flags |= slot->host->mmc->pm_flags; 57d56ee1ffSAdrian Hunter if (slot->host->mmc->caps & MMC_CAP_CD_WAKE) 58d56ee1ffSAdrian Hunter cap_cd_wake = true; 59d56ee1ffSAdrian Hunter } 6030cf2803SAdrian Hunter } 6130cf2803SAdrian Hunter 62d56ee1ffSAdrian Hunter if ((pm_flags & MMC_PM_KEEP_POWER) && (pm_flags & MMC_PM_WAKE_SDIO_IRQ)) 63d56ee1ffSAdrian Hunter return device_wakeup_enable(&chip->pdev->dev); 64d56ee1ffSAdrian Hunter else if (!cap_cd_wake) 65d56ee1ffSAdrian Hunter return device_wakeup_disable(&chip->pdev->dev); 66d56ee1ffSAdrian Hunter 67d56ee1ffSAdrian Hunter return 0; 6830cf2803SAdrian Hunter } 6930cf2803SAdrian Hunter 7030cf2803SAdrian Hunter static int sdhci_pci_suspend_host(struct sdhci_pci_chip *chip) 7130cf2803SAdrian Hunter { 725c3c6126SAdrian Hunter int i, ret; 7330cf2803SAdrian Hunter 7430cf2803SAdrian Hunter sdhci_pci_init_wakeup(chip); 7530cf2803SAdrian Hunter 765c3c6126SAdrian Hunter for (i = 0; i < chip->num_slots; i++) { 775c3c6126SAdrian Hunter struct sdhci_pci_slot *slot = chip->slots[i]; 785c3c6126SAdrian Hunter struct sdhci_host *host; 795c3c6126SAdrian Hunter 805c3c6126SAdrian Hunter if (!slot) 815c3c6126SAdrian Hunter continue; 825c3c6126SAdrian Hunter 835c3c6126SAdrian Hunter host = slot->host; 845c3c6126SAdrian Hunter 855c3c6126SAdrian Hunter if (chip->pm_retune && host->tuning_mode != SDHCI_TUNING_MODE_3) 865c3c6126SAdrian Hunter mmc_retune_needed(host->mmc); 875c3c6126SAdrian Hunter 885c3c6126SAdrian Hunter ret = sdhci_suspend_host(host); 895c3c6126SAdrian Hunter if (ret) 905c3c6126SAdrian Hunter goto err_pci_suspend; 91d56ee1ffSAdrian Hunter 92d56ee1ffSAdrian Hunter if (device_may_wakeup(&chip->pdev->dev)) 93d56ee1ffSAdrian Hunter mmc_gpio_set_cd_wake(host->mmc, true); 945c3c6126SAdrian Hunter } 955c3c6126SAdrian Hunter 9630cf2803SAdrian Hunter return 0; 975c3c6126SAdrian Hunter 985c3c6126SAdrian Hunter err_pci_suspend: 995c3c6126SAdrian Hunter while (--i >= 0) 1005c3c6126SAdrian Hunter sdhci_resume_host(chip->slots[i]->host); 1015c3c6126SAdrian Hunter return ret; 10230cf2803SAdrian Hunter } 10330cf2803SAdrian Hunter 10430cf2803SAdrian Hunter int sdhci_pci_resume_host(struct sdhci_pci_chip *chip) 10530cf2803SAdrian Hunter { 10630cf2803SAdrian Hunter struct sdhci_pci_slot *slot; 10730cf2803SAdrian Hunter int i, ret; 10830cf2803SAdrian Hunter 10930cf2803SAdrian Hunter for (i = 0; i < chip->num_slots; i++) { 11030cf2803SAdrian Hunter slot = chip->slots[i]; 11130cf2803SAdrian Hunter if (!slot) 11230cf2803SAdrian Hunter continue; 11330cf2803SAdrian Hunter 11430cf2803SAdrian Hunter ret = sdhci_resume_host(slot->host); 11530cf2803SAdrian Hunter if (ret) 11630cf2803SAdrian Hunter return ret; 117d56ee1ffSAdrian Hunter 118d56ee1ffSAdrian Hunter mmc_gpio_set_cd_wake(slot->host->mmc, false); 11930cf2803SAdrian Hunter } 12030cf2803SAdrian Hunter 12130cf2803SAdrian Hunter return 0; 12230cf2803SAdrian Hunter } 1238ee82bdaSAdrian Hunter 1248ee82bdaSAdrian Hunter static int sdhci_cqhci_suspend(struct sdhci_pci_chip *chip) 1258ee82bdaSAdrian Hunter { 1268ee82bdaSAdrian Hunter int ret; 1278ee82bdaSAdrian Hunter 1288ee82bdaSAdrian Hunter ret = cqhci_suspend(chip->slots[0]->host->mmc); 1298ee82bdaSAdrian Hunter if (ret) 1308ee82bdaSAdrian Hunter return ret; 1318ee82bdaSAdrian Hunter 1328ee82bdaSAdrian Hunter return sdhci_pci_suspend_host(chip); 1338ee82bdaSAdrian Hunter } 1348ee82bdaSAdrian Hunter 1358ee82bdaSAdrian Hunter static int sdhci_cqhci_resume(struct sdhci_pci_chip *chip) 1368ee82bdaSAdrian Hunter { 1378ee82bdaSAdrian Hunter int ret; 1388ee82bdaSAdrian Hunter 1398ee82bdaSAdrian Hunter ret = sdhci_pci_resume_host(chip); 1408ee82bdaSAdrian Hunter if (ret) 1418ee82bdaSAdrian Hunter return ret; 1428ee82bdaSAdrian Hunter 1438ee82bdaSAdrian Hunter return cqhci_resume(chip->slots[0]->host->mmc); 1448ee82bdaSAdrian Hunter } 14530cf2803SAdrian Hunter #endif 14630cf2803SAdrian Hunter 147966d696aSAdrian Hunter #ifdef CONFIG_PM 148966d696aSAdrian Hunter static int sdhci_pci_runtime_suspend_host(struct sdhci_pci_chip *chip) 149966d696aSAdrian Hunter { 150966d696aSAdrian Hunter struct sdhci_pci_slot *slot; 151966d696aSAdrian Hunter struct sdhci_host *host; 152966d696aSAdrian Hunter int i, ret; 153966d696aSAdrian Hunter 154966d696aSAdrian Hunter for (i = 0; i < chip->num_slots; i++) { 155966d696aSAdrian Hunter slot = chip->slots[i]; 156966d696aSAdrian Hunter if (!slot) 157966d696aSAdrian Hunter continue; 158966d696aSAdrian Hunter 159966d696aSAdrian Hunter host = slot->host; 160966d696aSAdrian Hunter 161966d696aSAdrian Hunter ret = sdhci_runtime_suspend_host(host); 162966d696aSAdrian Hunter if (ret) 163966d696aSAdrian Hunter goto err_pci_runtime_suspend; 164966d696aSAdrian Hunter 165966d696aSAdrian Hunter if (chip->rpm_retune && 166966d696aSAdrian Hunter host->tuning_mode != SDHCI_TUNING_MODE_3) 167966d696aSAdrian Hunter mmc_retune_needed(host->mmc); 168966d696aSAdrian Hunter } 169966d696aSAdrian Hunter 170966d696aSAdrian Hunter return 0; 171966d696aSAdrian Hunter 172966d696aSAdrian Hunter err_pci_runtime_suspend: 173966d696aSAdrian Hunter while (--i >= 0) 174c6303c5dSBaolin Wang sdhci_runtime_resume_host(chip->slots[i]->host, 0); 175966d696aSAdrian Hunter return ret; 176966d696aSAdrian Hunter } 177966d696aSAdrian Hunter 178966d696aSAdrian Hunter static int sdhci_pci_runtime_resume_host(struct sdhci_pci_chip *chip) 179966d696aSAdrian Hunter { 180966d696aSAdrian Hunter struct sdhci_pci_slot *slot; 181966d696aSAdrian Hunter int i, ret; 182966d696aSAdrian Hunter 183966d696aSAdrian Hunter for (i = 0; i < chip->num_slots; i++) { 184966d696aSAdrian Hunter slot = chip->slots[i]; 185966d696aSAdrian Hunter if (!slot) 186966d696aSAdrian Hunter continue; 187966d696aSAdrian Hunter 188c6303c5dSBaolin Wang ret = sdhci_runtime_resume_host(slot->host, 0); 189966d696aSAdrian Hunter if (ret) 190966d696aSAdrian Hunter return ret; 191966d696aSAdrian Hunter } 192966d696aSAdrian Hunter 193966d696aSAdrian Hunter return 0; 194966d696aSAdrian Hunter } 1958ee82bdaSAdrian Hunter 1968ee82bdaSAdrian Hunter static int sdhci_cqhci_runtime_suspend(struct sdhci_pci_chip *chip) 1978ee82bdaSAdrian Hunter { 1988ee82bdaSAdrian Hunter int ret; 1998ee82bdaSAdrian Hunter 2008ee82bdaSAdrian Hunter ret = cqhci_suspend(chip->slots[0]->host->mmc); 2018ee82bdaSAdrian Hunter if (ret) 2028ee82bdaSAdrian Hunter return ret; 2038ee82bdaSAdrian Hunter 2048ee82bdaSAdrian Hunter return sdhci_pci_runtime_suspend_host(chip); 2058ee82bdaSAdrian Hunter } 2068ee82bdaSAdrian Hunter 2078ee82bdaSAdrian Hunter static int sdhci_cqhci_runtime_resume(struct sdhci_pci_chip *chip) 2088ee82bdaSAdrian Hunter { 2098ee82bdaSAdrian Hunter int ret; 2108ee82bdaSAdrian Hunter 2118ee82bdaSAdrian Hunter ret = sdhci_pci_runtime_resume_host(chip); 2128ee82bdaSAdrian Hunter if (ret) 2138ee82bdaSAdrian Hunter return ret; 2148ee82bdaSAdrian Hunter 2158ee82bdaSAdrian Hunter return cqhci_resume(chip->slots[0]->host->mmc); 2168ee82bdaSAdrian Hunter } 217966d696aSAdrian Hunter #endif 218966d696aSAdrian Hunter 2198ee82bdaSAdrian Hunter static u32 sdhci_cqhci_irq(struct sdhci_host *host, u32 intmask) 2208ee82bdaSAdrian Hunter { 2218ee82bdaSAdrian Hunter int cmd_error = 0; 2228ee82bdaSAdrian Hunter int data_error = 0; 2238ee82bdaSAdrian Hunter 2248ee82bdaSAdrian Hunter if (!sdhci_cqe_irq(host, intmask, &cmd_error, &data_error)) 2258ee82bdaSAdrian Hunter return intmask; 2268ee82bdaSAdrian Hunter 2278ee82bdaSAdrian Hunter cqhci_irq(host->mmc, intmask, cmd_error, data_error); 2288ee82bdaSAdrian Hunter 2298ee82bdaSAdrian Hunter return 0; 2308ee82bdaSAdrian Hunter } 2318ee82bdaSAdrian Hunter 2328ee82bdaSAdrian Hunter static void sdhci_pci_dumpregs(struct mmc_host *mmc) 2338ee82bdaSAdrian Hunter { 2348ee82bdaSAdrian Hunter sdhci_dumpregs(mmc_priv(mmc)); 2358ee82bdaSAdrian Hunter } 2368ee82bdaSAdrian Hunter 237df57d732SAdrian Hunter static void sdhci_cqhci_reset(struct sdhci_host *host, u8 mask) 238df57d732SAdrian Hunter { 239df57d732SAdrian Hunter if ((host->mmc->caps2 & MMC_CAP2_CQE) && (mask & SDHCI_RESET_ALL) && 240df57d732SAdrian Hunter host->mmc->cqe_private) 241df57d732SAdrian Hunter cqhci_deactivate(host->mmc); 242df57d732SAdrian Hunter sdhci_reset(host, mask); 243df57d732SAdrian Hunter } 244df57d732SAdrian Hunter 245659c9bc1SBen Hutchings /*****************************************************************************\ 246659c9bc1SBen Hutchings * * 247659c9bc1SBen Hutchings * Hardware specific quirk handling * 248659c9bc1SBen Hutchings * * 249659c9bc1SBen Hutchings \*****************************************************************************/ 250659c9bc1SBen Hutchings 251659c9bc1SBen Hutchings static int ricoh_probe(struct sdhci_pci_chip *chip) 252659c9bc1SBen Hutchings { 253659c9bc1SBen Hutchings if (chip->pdev->subsystem_vendor == PCI_VENDOR_ID_SAMSUNG || 254659c9bc1SBen Hutchings chip->pdev->subsystem_vendor == PCI_VENDOR_ID_SONY) 255659c9bc1SBen Hutchings chip->quirks |= SDHCI_QUIRK_NO_CARD_NO_RESET; 256659c9bc1SBen Hutchings return 0; 257659c9bc1SBen Hutchings } 258659c9bc1SBen Hutchings 259659c9bc1SBen Hutchings static int ricoh_mmc_probe_slot(struct sdhci_pci_slot *slot) 260659c9bc1SBen Hutchings { 261659c9bc1SBen Hutchings slot->host->caps = 262a8e809ecSMasahiro Yamada FIELD_PREP(SDHCI_TIMEOUT_CLK_MASK, 0x21) | 263a8e809ecSMasahiro Yamada FIELD_PREP(SDHCI_CLOCK_BASE_MASK, 0x21) | 264659c9bc1SBen Hutchings SDHCI_TIMEOUT_CLK_UNIT | 265659c9bc1SBen Hutchings SDHCI_CAN_VDD_330 | 266659c9bc1SBen Hutchings SDHCI_CAN_DO_HISPD | 267659c9bc1SBen Hutchings SDHCI_CAN_DO_SDMA; 268659c9bc1SBen Hutchings return 0; 269659c9bc1SBen Hutchings } 270659c9bc1SBen Hutchings 271b7813f0fSAdrian Hunter #ifdef CONFIG_PM_SLEEP 272659c9bc1SBen Hutchings static int ricoh_mmc_resume(struct sdhci_pci_chip *chip) 273659c9bc1SBen Hutchings { 274659c9bc1SBen Hutchings /* Apply a delay to allow controller to settle */ 275659c9bc1SBen Hutchings /* Otherwise it becomes confused if card state changed 276659c9bc1SBen Hutchings during suspend */ 277659c9bc1SBen Hutchings msleep(500); 27830cf2803SAdrian Hunter return sdhci_pci_resume_host(chip); 279659c9bc1SBen Hutchings } 280b7813f0fSAdrian Hunter #endif 281659c9bc1SBen Hutchings 282659c9bc1SBen Hutchings static const struct sdhci_pci_fixes sdhci_ricoh = { 283659c9bc1SBen Hutchings .probe = ricoh_probe, 284659c9bc1SBen Hutchings .quirks = SDHCI_QUIRK_32BIT_DMA_ADDR | 285659c9bc1SBen Hutchings SDHCI_QUIRK_FORCE_DMA | 286659c9bc1SBen Hutchings SDHCI_QUIRK_CLOCK_BEFORE_RESET, 287659c9bc1SBen Hutchings }; 288659c9bc1SBen Hutchings 289659c9bc1SBen Hutchings static const struct sdhci_pci_fixes sdhci_ricoh_mmc = { 290659c9bc1SBen Hutchings .probe_slot = ricoh_mmc_probe_slot, 291b7813f0fSAdrian Hunter #ifdef CONFIG_PM_SLEEP 292659c9bc1SBen Hutchings .resume = ricoh_mmc_resume, 293b7813f0fSAdrian Hunter #endif 294659c9bc1SBen Hutchings .quirks = SDHCI_QUIRK_32BIT_DMA_ADDR | 295659c9bc1SBen Hutchings SDHCI_QUIRK_CLOCK_BEFORE_RESET | 296659c9bc1SBen Hutchings SDHCI_QUIRK_NO_CARD_NO_RESET | 297659c9bc1SBen Hutchings SDHCI_QUIRK_MISSING_CAPS 298659c9bc1SBen Hutchings }; 299659c9bc1SBen Hutchings 300659c9bc1SBen Hutchings static const struct sdhci_pci_fixes sdhci_ene_712 = { 301659c9bc1SBen Hutchings .quirks = SDHCI_QUIRK_SINGLE_POWER_WRITE | 302659c9bc1SBen Hutchings SDHCI_QUIRK_BROKEN_DMA, 303659c9bc1SBen Hutchings }; 304659c9bc1SBen Hutchings 305659c9bc1SBen Hutchings static const struct sdhci_pci_fixes sdhci_ene_714 = { 306659c9bc1SBen Hutchings .quirks = SDHCI_QUIRK_SINGLE_POWER_WRITE | 307659c9bc1SBen Hutchings SDHCI_QUIRK_RESET_CMD_DATA_ON_IOS | 308659c9bc1SBen Hutchings SDHCI_QUIRK_BROKEN_DMA, 309659c9bc1SBen Hutchings }; 310659c9bc1SBen Hutchings 311659c9bc1SBen Hutchings static const struct sdhci_pci_fixes sdhci_cafe = { 312659c9bc1SBen Hutchings .quirks = SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER | 313659c9bc1SBen Hutchings SDHCI_QUIRK_NO_BUSY_IRQ | 314659c9bc1SBen Hutchings SDHCI_QUIRK_BROKEN_CARD_DETECTION | 315659c9bc1SBen Hutchings SDHCI_QUIRK_BROKEN_TIMEOUT_VAL, 316659c9bc1SBen Hutchings }; 317659c9bc1SBen Hutchings 318659c9bc1SBen Hutchings static const struct sdhci_pci_fixes sdhci_intel_qrk = { 319659c9bc1SBen Hutchings .quirks = SDHCI_QUIRK_NO_HISPD_BIT, 320659c9bc1SBen Hutchings }; 321659c9bc1SBen Hutchings 322659c9bc1SBen Hutchings static int mrst_hc_probe_slot(struct sdhci_pci_slot *slot) 323659c9bc1SBen Hutchings { 324659c9bc1SBen Hutchings slot->host->mmc->caps |= MMC_CAP_8_BIT_DATA; 325659c9bc1SBen Hutchings return 0; 326659c9bc1SBen Hutchings } 327659c9bc1SBen Hutchings 328659c9bc1SBen Hutchings /* 329659c9bc1SBen Hutchings * ADMA operation is disabled for Moorestown platform due to 330659c9bc1SBen Hutchings * hardware bugs. 331659c9bc1SBen Hutchings */ 332659c9bc1SBen Hutchings static int mrst_hc_probe(struct sdhci_pci_chip *chip) 333659c9bc1SBen Hutchings { 334659c9bc1SBen Hutchings /* 335659c9bc1SBen Hutchings * slots number is fixed here for MRST as SDIO3/5 are never used and 336659c9bc1SBen Hutchings * have hardware bugs. 337659c9bc1SBen Hutchings */ 338659c9bc1SBen Hutchings chip->num_slots = 1; 339659c9bc1SBen Hutchings return 0; 340659c9bc1SBen Hutchings } 341659c9bc1SBen Hutchings 342659c9bc1SBen Hutchings static int pch_hc_probe_slot(struct sdhci_pci_slot *slot) 343659c9bc1SBen Hutchings { 344659c9bc1SBen Hutchings slot->host->mmc->caps |= MMC_CAP_8_BIT_DATA; 345659c9bc1SBen Hutchings return 0; 346659c9bc1SBen Hutchings } 347659c9bc1SBen Hutchings 348659c9bc1SBen Hutchings #ifdef CONFIG_PM 349659c9bc1SBen Hutchings 350659c9bc1SBen Hutchings static irqreturn_t sdhci_pci_sd_cd(int irq, void *dev_id) 351659c9bc1SBen Hutchings { 352659c9bc1SBen Hutchings struct sdhci_pci_slot *slot = dev_id; 353659c9bc1SBen Hutchings struct sdhci_host *host = slot->host; 354659c9bc1SBen Hutchings 355659c9bc1SBen Hutchings mmc_detect_change(host->mmc, msecs_to_jiffies(200)); 356659c9bc1SBen Hutchings return IRQ_HANDLED; 357659c9bc1SBen Hutchings } 358659c9bc1SBen Hutchings 359659c9bc1SBen Hutchings static void sdhci_pci_add_own_cd(struct sdhci_pci_slot *slot) 360659c9bc1SBen Hutchings { 361659c9bc1SBen Hutchings int err, irq, gpio = slot->cd_gpio; 362659c9bc1SBen Hutchings 363659c9bc1SBen Hutchings slot->cd_gpio = -EINVAL; 364659c9bc1SBen Hutchings slot->cd_irq = -EINVAL; 365659c9bc1SBen Hutchings 366659c9bc1SBen Hutchings if (!gpio_is_valid(gpio)) 367659c9bc1SBen Hutchings return; 368659c9bc1SBen Hutchings 369c10bc372SAndy Shevchenko err = devm_gpio_request(&slot->chip->pdev->dev, gpio, "sd_cd"); 370659c9bc1SBen Hutchings if (err < 0) 371659c9bc1SBen Hutchings goto out; 372659c9bc1SBen Hutchings 373659c9bc1SBen Hutchings err = gpio_direction_input(gpio); 374659c9bc1SBen Hutchings if (err < 0) 375659c9bc1SBen Hutchings goto out_free; 376659c9bc1SBen Hutchings 377659c9bc1SBen Hutchings irq = gpio_to_irq(gpio); 378659c9bc1SBen Hutchings if (irq < 0) 379659c9bc1SBen Hutchings goto out_free; 380659c9bc1SBen Hutchings 381659c9bc1SBen Hutchings err = request_irq(irq, sdhci_pci_sd_cd, IRQF_TRIGGER_RISING | 382659c9bc1SBen Hutchings IRQF_TRIGGER_FALLING, "sd_cd", slot); 383659c9bc1SBen Hutchings if (err) 384659c9bc1SBen Hutchings goto out_free; 385659c9bc1SBen Hutchings 386659c9bc1SBen Hutchings slot->cd_gpio = gpio; 387659c9bc1SBen Hutchings slot->cd_irq = irq; 388659c9bc1SBen Hutchings 389659c9bc1SBen Hutchings return; 390659c9bc1SBen Hutchings 391659c9bc1SBen Hutchings out_free: 392c10bc372SAndy Shevchenko devm_gpio_free(&slot->chip->pdev->dev, gpio); 393659c9bc1SBen Hutchings out: 394659c9bc1SBen Hutchings dev_warn(&slot->chip->pdev->dev, "failed to setup card detect wake up\n"); 395659c9bc1SBen Hutchings } 396659c9bc1SBen Hutchings 397659c9bc1SBen Hutchings static void sdhci_pci_remove_own_cd(struct sdhci_pci_slot *slot) 398659c9bc1SBen Hutchings { 399659c9bc1SBen Hutchings if (slot->cd_irq >= 0) 400659c9bc1SBen Hutchings free_irq(slot->cd_irq, slot); 401659c9bc1SBen Hutchings } 402659c9bc1SBen Hutchings 403659c9bc1SBen Hutchings #else 404659c9bc1SBen Hutchings 405659c9bc1SBen Hutchings static inline void sdhci_pci_add_own_cd(struct sdhci_pci_slot *slot) 406659c9bc1SBen Hutchings { 407659c9bc1SBen Hutchings } 408659c9bc1SBen Hutchings 409659c9bc1SBen Hutchings static inline void sdhci_pci_remove_own_cd(struct sdhci_pci_slot *slot) 410659c9bc1SBen Hutchings { 411659c9bc1SBen Hutchings } 412659c9bc1SBen Hutchings 413659c9bc1SBen Hutchings #endif 414659c9bc1SBen Hutchings 415659c9bc1SBen Hutchings static int mfd_emmc_probe_slot(struct sdhci_pci_slot *slot) 416659c9bc1SBen Hutchings { 417659c9bc1SBen Hutchings slot->host->mmc->caps |= MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE; 418d2a47176SUlf Hansson slot->host->mmc->caps2 |= MMC_CAP2_BOOTPART_NOACC; 419659c9bc1SBen Hutchings return 0; 420659c9bc1SBen Hutchings } 421659c9bc1SBen Hutchings 422659c9bc1SBen Hutchings static int mfd_sdio_probe_slot(struct sdhci_pci_slot *slot) 423659c9bc1SBen Hutchings { 424659c9bc1SBen Hutchings slot->host->mmc->caps |= MMC_CAP_POWER_OFF_CARD | MMC_CAP_NONREMOVABLE; 425659c9bc1SBen Hutchings return 0; 426659c9bc1SBen Hutchings } 427659c9bc1SBen Hutchings 428659c9bc1SBen Hutchings static const struct sdhci_pci_fixes sdhci_intel_mrst_hc0 = { 429659c9bc1SBen Hutchings .quirks = SDHCI_QUIRK_BROKEN_ADMA | SDHCI_QUIRK_NO_HISPD_BIT, 430659c9bc1SBen Hutchings .probe_slot = mrst_hc_probe_slot, 431659c9bc1SBen Hutchings }; 432659c9bc1SBen Hutchings 433659c9bc1SBen Hutchings static const struct sdhci_pci_fixes sdhci_intel_mrst_hc1_hc2 = { 434659c9bc1SBen Hutchings .quirks = SDHCI_QUIRK_BROKEN_ADMA | SDHCI_QUIRK_NO_HISPD_BIT, 435659c9bc1SBen Hutchings .probe = mrst_hc_probe, 436659c9bc1SBen Hutchings }; 437659c9bc1SBen Hutchings 438659c9bc1SBen Hutchings static const struct sdhci_pci_fixes sdhci_intel_mfd_sd = { 439659c9bc1SBen Hutchings .quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC, 440659c9bc1SBen Hutchings .allow_runtime_pm = true, 441659c9bc1SBen Hutchings .own_cd_for_runtime_pm = true, 442659c9bc1SBen Hutchings }; 443659c9bc1SBen Hutchings 444659c9bc1SBen Hutchings static const struct sdhci_pci_fixes sdhci_intel_mfd_sdio = { 445659c9bc1SBen Hutchings .quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC, 446659c9bc1SBen Hutchings .quirks2 = SDHCI_QUIRK2_HOST_OFF_CARD_ON, 447659c9bc1SBen Hutchings .allow_runtime_pm = true, 448659c9bc1SBen Hutchings .probe_slot = mfd_sdio_probe_slot, 449659c9bc1SBen Hutchings }; 450659c9bc1SBen Hutchings 451659c9bc1SBen Hutchings static const struct sdhci_pci_fixes sdhci_intel_mfd_emmc = { 452659c9bc1SBen Hutchings .quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC, 453659c9bc1SBen Hutchings .allow_runtime_pm = true, 454659c9bc1SBen Hutchings .probe_slot = mfd_emmc_probe_slot, 455659c9bc1SBen Hutchings }; 456659c9bc1SBen Hutchings 457659c9bc1SBen Hutchings static const struct sdhci_pci_fixes sdhci_intel_pch_sdio = { 458659c9bc1SBen Hutchings .quirks = SDHCI_QUIRK_BROKEN_ADMA, 459659c9bc1SBen Hutchings .probe_slot = pch_hc_probe_slot, 460659c9bc1SBen Hutchings }; 461659c9bc1SBen Hutchings 4620a49a619SAdrian Hunter #ifdef CONFIG_X86 4630a49a619SAdrian Hunter 4640a49a619SAdrian Hunter #define BYT_IOSF_SCCEP 0x63 4650a49a619SAdrian Hunter #define BYT_IOSF_OCP_NETCTRL0 0x1078 4660a49a619SAdrian Hunter #define BYT_IOSF_OCP_TIMEOUT_BASE GENMASK(10, 8) 4670a49a619SAdrian Hunter 4680a49a619SAdrian Hunter static void byt_ocp_setting(struct pci_dev *pdev) 4690a49a619SAdrian Hunter { 4700a49a619SAdrian Hunter u32 val = 0; 4710a49a619SAdrian Hunter 4720a49a619SAdrian Hunter if (pdev->device != PCI_DEVICE_ID_INTEL_BYT_EMMC && 4730a49a619SAdrian Hunter pdev->device != PCI_DEVICE_ID_INTEL_BYT_SDIO && 4740a49a619SAdrian Hunter pdev->device != PCI_DEVICE_ID_INTEL_BYT_SD && 4750a49a619SAdrian Hunter pdev->device != PCI_DEVICE_ID_INTEL_BYT_EMMC2) 4760a49a619SAdrian Hunter return; 4770a49a619SAdrian Hunter 4780a49a619SAdrian Hunter if (iosf_mbi_read(BYT_IOSF_SCCEP, MBI_CR_READ, BYT_IOSF_OCP_NETCTRL0, 4790a49a619SAdrian Hunter &val)) { 4800a49a619SAdrian Hunter dev_err(&pdev->dev, "%s read error\n", __func__); 4810a49a619SAdrian Hunter return; 4820a49a619SAdrian Hunter } 4830a49a619SAdrian Hunter 4840a49a619SAdrian Hunter if (!(val & BYT_IOSF_OCP_TIMEOUT_BASE)) 4850a49a619SAdrian Hunter return; 4860a49a619SAdrian Hunter 4870a49a619SAdrian Hunter val &= ~BYT_IOSF_OCP_TIMEOUT_BASE; 4880a49a619SAdrian Hunter 4890a49a619SAdrian Hunter if (iosf_mbi_write(BYT_IOSF_SCCEP, MBI_CR_WRITE, BYT_IOSF_OCP_NETCTRL0, 4900a49a619SAdrian Hunter val)) { 4910a49a619SAdrian Hunter dev_err(&pdev->dev, "%s write error\n", __func__); 4920a49a619SAdrian Hunter return; 4930a49a619SAdrian Hunter } 4940a49a619SAdrian Hunter 4950a49a619SAdrian Hunter dev_dbg(&pdev->dev, "%s completed\n", __func__); 4960a49a619SAdrian Hunter } 4970a49a619SAdrian Hunter 4980a49a619SAdrian Hunter #else 4990a49a619SAdrian Hunter 5000a49a619SAdrian Hunter static inline void byt_ocp_setting(struct pci_dev *pdev) 5010a49a619SAdrian Hunter { 5020a49a619SAdrian Hunter } 5030a49a619SAdrian Hunter 5040a49a619SAdrian Hunter #endif 5050a49a619SAdrian Hunter 506c959a6b0SAdrian Hunter enum { 507c959a6b0SAdrian Hunter INTEL_DSM_FNS = 0, 5086ae03368SAdrian Hunter INTEL_DSM_V18_SWITCH = 3, 509be17355aSAdrian Hunter INTEL_DSM_V33_SWITCH = 4, 51051ced59cSAdrian Hunter INTEL_DSM_DRV_STRENGTH = 9, 511c959a6b0SAdrian Hunter INTEL_DSM_D3_RETUNE = 10, 512c959a6b0SAdrian Hunter }; 513c959a6b0SAdrian Hunter 514c959a6b0SAdrian Hunter struct intel_host { 515c959a6b0SAdrian Hunter u32 dsm_fns; 51651ced59cSAdrian Hunter int drv_strength; 517c959a6b0SAdrian Hunter bool d3_retune; 5185305ec6aSAdrian Hunter bool rpm_retune_ok; 5195305ec6aSAdrian Hunter u32 glk_rx_ctrl1; 5205305ec6aSAdrian Hunter u32 glk_tun_val; 52146f4a69eSAdrian Hunter u32 active_ltr; 52246f4a69eSAdrian Hunter u32 idle_ltr; 523c959a6b0SAdrian Hunter }; 524c959a6b0SAdrian Hunter 525c37f69ffSColin Ian King static const guid_t intel_dsm_guid = 52694116f81SAndy Shevchenko GUID_INIT(0xF6C13EA5, 0x65CD, 0x461F, 52794116f81SAndy Shevchenko 0xAB, 0x7A, 0x29, 0xF7, 0xE8, 0xD5, 0xBD, 0x61); 528c959a6b0SAdrian Hunter 529c959a6b0SAdrian Hunter static int __intel_dsm(struct intel_host *intel_host, struct device *dev, 530c959a6b0SAdrian Hunter unsigned int fn, u32 *result) 531c959a6b0SAdrian Hunter { 532c959a6b0SAdrian Hunter union acpi_object *obj; 533c959a6b0SAdrian Hunter int err = 0; 534a72016a4SAdrian Hunter size_t len; 535c959a6b0SAdrian Hunter 53694116f81SAndy Shevchenko obj = acpi_evaluate_dsm(ACPI_HANDLE(dev), &intel_dsm_guid, 0, fn, NULL); 537c959a6b0SAdrian Hunter if (!obj) 538c959a6b0SAdrian Hunter return -EOPNOTSUPP; 539c959a6b0SAdrian Hunter 540c959a6b0SAdrian Hunter if (obj->type != ACPI_TYPE_BUFFER || obj->buffer.length < 1) { 541c959a6b0SAdrian Hunter err = -EINVAL; 542c959a6b0SAdrian Hunter goto out; 543c959a6b0SAdrian Hunter } 544c959a6b0SAdrian Hunter 545a72016a4SAdrian Hunter len = min_t(size_t, obj->buffer.length, 4); 546a72016a4SAdrian Hunter 547a72016a4SAdrian Hunter *result = 0; 548a72016a4SAdrian Hunter memcpy(result, obj->buffer.pointer, len); 549c959a6b0SAdrian Hunter out: 550c959a6b0SAdrian Hunter ACPI_FREE(obj); 551c959a6b0SAdrian Hunter 552c959a6b0SAdrian Hunter return err; 553c959a6b0SAdrian Hunter } 554c959a6b0SAdrian Hunter 555c959a6b0SAdrian Hunter static int intel_dsm(struct intel_host *intel_host, struct device *dev, 556c959a6b0SAdrian Hunter unsigned int fn, u32 *result) 557c959a6b0SAdrian Hunter { 558c959a6b0SAdrian Hunter if (fn > 31 || !(intel_host->dsm_fns & (1 << fn))) 559c959a6b0SAdrian Hunter return -EOPNOTSUPP; 560c959a6b0SAdrian Hunter 561c959a6b0SAdrian Hunter return __intel_dsm(intel_host, dev, fn, result); 562c959a6b0SAdrian Hunter } 563c959a6b0SAdrian Hunter 564c959a6b0SAdrian Hunter static void intel_dsm_init(struct intel_host *intel_host, struct device *dev, 565c959a6b0SAdrian Hunter struct mmc_host *mmc) 566c959a6b0SAdrian Hunter { 567c959a6b0SAdrian Hunter int err; 568c959a6b0SAdrian Hunter u32 val; 569c959a6b0SAdrian Hunter 570eb701ce1SAdrian Hunter intel_host->d3_retune = true; 571eb701ce1SAdrian Hunter 572c959a6b0SAdrian Hunter err = __intel_dsm(intel_host, dev, INTEL_DSM_FNS, &intel_host->dsm_fns); 573c959a6b0SAdrian Hunter if (err) { 574c959a6b0SAdrian Hunter pr_debug("%s: DSM not supported, error %d\n", 575c959a6b0SAdrian Hunter mmc_hostname(mmc), err); 576c959a6b0SAdrian Hunter return; 577c959a6b0SAdrian Hunter } 578c959a6b0SAdrian Hunter 579c959a6b0SAdrian Hunter pr_debug("%s: DSM function mask %#x\n", 580c959a6b0SAdrian Hunter mmc_hostname(mmc), intel_host->dsm_fns); 581c959a6b0SAdrian Hunter 58251ced59cSAdrian Hunter err = intel_dsm(intel_host, dev, INTEL_DSM_DRV_STRENGTH, &val); 58351ced59cSAdrian Hunter intel_host->drv_strength = err ? 0 : val; 58451ced59cSAdrian Hunter 585c959a6b0SAdrian Hunter err = intel_dsm(intel_host, dev, INTEL_DSM_D3_RETUNE, &val); 586c959a6b0SAdrian Hunter intel_host->d3_retune = err ? true : !!val; 587c959a6b0SAdrian Hunter } 588c959a6b0SAdrian Hunter 589659c9bc1SBen Hutchings static void sdhci_pci_int_hw_reset(struct sdhci_host *host) 590659c9bc1SBen Hutchings { 591659c9bc1SBen Hutchings u8 reg; 592659c9bc1SBen Hutchings 593659c9bc1SBen Hutchings reg = sdhci_readb(host, SDHCI_POWER_CONTROL); 594659c9bc1SBen Hutchings reg |= 0x10; 595659c9bc1SBen Hutchings sdhci_writeb(host, reg, SDHCI_POWER_CONTROL); 596659c9bc1SBen Hutchings /* For eMMC, minimum is 1us but give it 9us for good measure */ 597659c9bc1SBen Hutchings udelay(9); 598659c9bc1SBen Hutchings reg &= ~0x10; 599659c9bc1SBen Hutchings sdhci_writeb(host, reg, SDHCI_POWER_CONTROL); 600659c9bc1SBen Hutchings /* For eMMC, minimum is 200us but give it 300us for good measure */ 601659c9bc1SBen Hutchings usleep_range(300, 1000); 602659c9bc1SBen Hutchings } 603659c9bc1SBen Hutchings 60451ced59cSAdrian Hunter static int intel_select_drive_strength(struct mmc_card *card, 60551ced59cSAdrian Hunter unsigned int max_dtr, int host_drv, 60651ced59cSAdrian Hunter int card_drv, int *drv_type) 607659c9bc1SBen Hutchings { 60851ced59cSAdrian Hunter struct sdhci_host *host = mmc_priv(card->host); 60951ced59cSAdrian Hunter struct sdhci_pci_slot *slot = sdhci_priv(host); 61051ced59cSAdrian Hunter struct intel_host *intel_host = sdhci_pci_priv(slot); 611659c9bc1SBen Hutchings 6121a8eb6b3SAdrian Hunter if (!(mmc_driver_type_mask(intel_host->drv_strength) & card_drv)) 6131a8eb6b3SAdrian Hunter return 0; 6141a8eb6b3SAdrian Hunter 61551ced59cSAdrian Hunter return intel_host->drv_strength; 616659c9bc1SBen Hutchings } 617659c9bc1SBen Hutchings 618163cbe31SAdrian Hunter static int bxt_get_cd(struct mmc_host *mmc) 619163cbe31SAdrian Hunter { 620163cbe31SAdrian Hunter int gpio_cd = mmc_gpio_get_cd(mmc); 621163cbe31SAdrian Hunter struct sdhci_host *host = mmc_priv(mmc); 622163cbe31SAdrian Hunter unsigned long flags; 623163cbe31SAdrian Hunter int ret = 0; 624163cbe31SAdrian Hunter 625163cbe31SAdrian Hunter if (!gpio_cd) 626163cbe31SAdrian Hunter return 0; 627163cbe31SAdrian Hunter 628163cbe31SAdrian Hunter spin_lock_irqsave(&host->lock, flags); 629163cbe31SAdrian Hunter 630163cbe31SAdrian Hunter if (host->flags & SDHCI_DEVICE_DEAD) 631163cbe31SAdrian Hunter goto out; 632163cbe31SAdrian Hunter 633163cbe31SAdrian Hunter ret = !!(sdhci_readl(host, SDHCI_PRESENT_STATE) & SDHCI_CARD_PRESENT); 634163cbe31SAdrian Hunter out: 635163cbe31SAdrian Hunter spin_unlock_irqrestore(&host->lock, flags); 636163cbe31SAdrian Hunter 637163cbe31SAdrian Hunter return ret; 638163cbe31SAdrian Hunter } 639163cbe31SAdrian Hunter 64048d685a2SAdrian Hunter #define SDHCI_INTEL_PWR_TIMEOUT_CNT 20 64148d685a2SAdrian Hunter #define SDHCI_INTEL_PWR_TIMEOUT_UDELAY 100 64248d685a2SAdrian Hunter 64348d685a2SAdrian Hunter static void sdhci_intel_set_power(struct sdhci_host *host, unsigned char mode, 64448d685a2SAdrian Hunter unsigned short vdd) 64548d685a2SAdrian Hunter { 64648d685a2SAdrian Hunter int cntr; 64748d685a2SAdrian Hunter u8 reg; 64848d685a2SAdrian Hunter 64948d685a2SAdrian Hunter sdhci_set_power(host, mode, vdd); 65048d685a2SAdrian Hunter 65148d685a2SAdrian Hunter if (mode == MMC_POWER_OFF) 65248d685a2SAdrian Hunter return; 65348d685a2SAdrian Hunter 65448d685a2SAdrian Hunter /* 65548d685a2SAdrian Hunter * Bus power might not enable after D3 -> D0 transition due to the 65648d685a2SAdrian Hunter * present state not yet having propagated. Retry for up to 2ms. 65748d685a2SAdrian Hunter */ 65848d685a2SAdrian Hunter for (cntr = 0; cntr < SDHCI_INTEL_PWR_TIMEOUT_CNT; cntr++) { 65948d685a2SAdrian Hunter reg = sdhci_readb(host, SDHCI_POWER_CONTROL); 66048d685a2SAdrian Hunter if (reg & SDHCI_POWER_ON) 66148d685a2SAdrian Hunter break; 66248d685a2SAdrian Hunter udelay(SDHCI_INTEL_PWR_TIMEOUT_UDELAY); 66348d685a2SAdrian Hunter reg |= SDHCI_POWER_ON; 66448d685a2SAdrian Hunter sdhci_writeb(host, reg, SDHCI_POWER_CONTROL); 66548d685a2SAdrian Hunter } 66648d685a2SAdrian Hunter } 66748d685a2SAdrian Hunter 668bc55dcd8SAdrian Hunter #define INTEL_HS400_ES_REG 0x78 669bc55dcd8SAdrian Hunter #define INTEL_HS400_ES_BIT BIT(0) 670bc55dcd8SAdrian Hunter 671bc55dcd8SAdrian Hunter static void intel_hs400_enhanced_strobe(struct mmc_host *mmc, 672bc55dcd8SAdrian Hunter struct mmc_ios *ios) 673bc55dcd8SAdrian Hunter { 674bc55dcd8SAdrian Hunter struct sdhci_host *host = mmc_priv(mmc); 675bc55dcd8SAdrian Hunter u32 val; 676bc55dcd8SAdrian Hunter 677bc55dcd8SAdrian Hunter val = sdhci_readl(host, INTEL_HS400_ES_REG); 678bc55dcd8SAdrian Hunter if (ios->enhanced_strobe) 679bc55dcd8SAdrian Hunter val |= INTEL_HS400_ES_BIT; 680bc55dcd8SAdrian Hunter else 681bc55dcd8SAdrian Hunter val &= ~INTEL_HS400_ES_BIT; 682bc55dcd8SAdrian Hunter sdhci_writel(host, val, INTEL_HS400_ES_REG); 683bc55dcd8SAdrian Hunter } 684bc55dcd8SAdrian Hunter 685be17355aSAdrian Hunter static int intel_start_signal_voltage_switch(struct mmc_host *mmc, 686be17355aSAdrian Hunter struct mmc_ios *ios) 6876ae03368SAdrian Hunter { 688be17355aSAdrian Hunter struct device *dev = mmc_dev(mmc); 689be17355aSAdrian Hunter struct sdhci_host *host = mmc_priv(mmc); 6906ae03368SAdrian Hunter struct sdhci_pci_slot *slot = sdhci_priv(host); 6916ae03368SAdrian Hunter struct intel_host *intel_host = sdhci_pci_priv(slot); 692be17355aSAdrian Hunter unsigned int fn; 6936ae03368SAdrian Hunter u32 result = 0; 6946ae03368SAdrian Hunter int err; 6956ae03368SAdrian Hunter 696be17355aSAdrian Hunter err = sdhci_start_signal_voltage_switch(mmc, ios); 697be17355aSAdrian Hunter if (err) 698be17355aSAdrian Hunter return err; 699be17355aSAdrian Hunter 700be17355aSAdrian Hunter switch (ios->signal_voltage) { 701be17355aSAdrian Hunter case MMC_SIGNAL_VOLTAGE_330: 702be17355aSAdrian Hunter fn = INTEL_DSM_V33_SWITCH; 703be17355aSAdrian Hunter break; 704be17355aSAdrian Hunter case MMC_SIGNAL_VOLTAGE_180: 705be17355aSAdrian Hunter fn = INTEL_DSM_V18_SWITCH; 706be17355aSAdrian Hunter break; 707be17355aSAdrian Hunter default: 708be17355aSAdrian Hunter return 0; 709be17355aSAdrian Hunter } 710be17355aSAdrian Hunter 711be17355aSAdrian Hunter err = intel_dsm(intel_host, dev, fn, &result); 712be17355aSAdrian Hunter pr_debug("%s: %s DSM fn %u error %d result %u\n", 713be17355aSAdrian Hunter mmc_hostname(mmc), __func__, fn, err, result); 714be17355aSAdrian Hunter 715be17355aSAdrian Hunter return 0; 7166ae03368SAdrian Hunter } 7176ae03368SAdrian Hunter 71848d685a2SAdrian Hunter static const struct sdhci_ops sdhci_intel_byt_ops = { 71948d685a2SAdrian Hunter .set_clock = sdhci_set_clock, 72048d685a2SAdrian Hunter .set_power = sdhci_intel_set_power, 72148d685a2SAdrian Hunter .enable_dma = sdhci_pci_enable_dma, 722adc16398SMichał Mirosław .set_bus_width = sdhci_set_bus_width, 72348d685a2SAdrian Hunter .reset = sdhci_reset, 72448d685a2SAdrian Hunter .set_uhs_signaling = sdhci_set_uhs_signaling, 72548d685a2SAdrian Hunter .hw_reset = sdhci_pci_hw_reset, 72648d685a2SAdrian Hunter }; 72748d685a2SAdrian Hunter 7288ee82bdaSAdrian Hunter static const struct sdhci_ops sdhci_intel_glk_ops = { 7298ee82bdaSAdrian Hunter .set_clock = sdhci_set_clock, 7308ee82bdaSAdrian Hunter .set_power = sdhci_intel_set_power, 7318ee82bdaSAdrian Hunter .enable_dma = sdhci_pci_enable_dma, 7328ee82bdaSAdrian Hunter .set_bus_width = sdhci_set_bus_width, 733df57d732SAdrian Hunter .reset = sdhci_cqhci_reset, 7348ee82bdaSAdrian Hunter .set_uhs_signaling = sdhci_set_uhs_signaling, 7358ee82bdaSAdrian Hunter .hw_reset = sdhci_pci_hw_reset, 7368ee82bdaSAdrian Hunter .irq = sdhci_cqhci_irq, 7378ee82bdaSAdrian Hunter }; 7388ee82bdaSAdrian Hunter 739c959a6b0SAdrian Hunter static void byt_read_dsm(struct sdhci_pci_slot *slot) 740c959a6b0SAdrian Hunter { 741c959a6b0SAdrian Hunter struct intel_host *intel_host = sdhci_pci_priv(slot); 742c959a6b0SAdrian Hunter struct device *dev = &slot->chip->pdev->dev; 743c959a6b0SAdrian Hunter struct mmc_host *mmc = slot->host->mmc; 744c959a6b0SAdrian Hunter 745c959a6b0SAdrian Hunter intel_dsm_init(intel_host, dev, mmc); 746c959a6b0SAdrian Hunter slot->chip->rpm_retune = intel_host->d3_retune; 747c959a6b0SAdrian Hunter } 748c959a6b0SAdrian Hunter 749f8870ae6SAdrian Hunter static int intel_execute_tuning(struct mmc_host *mmc, u32 opcode) 750f8870ae6SAdrian Hunter { 751f8870ae6SAdrian Hunter int err = sdhci_execute_tuning(mmc, opcode); 752f8870ae6SAdrian Hunter struct sdhci_host *host = mmc_priv(mmc); 753f8870ae6SAdrian Hunter 754f8870ae6SAdrian Hunter if (err) 755f8870ae6SAdrian Hunter return err; 756f8870ae6SAdrian Hunter 757f8870ae6SAdrian Hunter /* 758f8870ae6SAdrian Hunter * Tuning can leave the IP in an active state (Buffer Read Enable bit 759f8870ae6SAdrian Hunter * set) which prevents the entry to low power states (i.e. S0i3). Data 760f8870ae6SAdrian Hunter * reset will clear it. 761f8870ae6SAdrian Hunter */ 762f8870ae6SAdrian Hunter sdhci_reset(host, SDHCI_RESET_DATA); 763f8870ae6SAdrian Hunter 764f8870ae6SAdrian Hunter return 0; 765f8870ae6SAdrian Hunter } 766f8870ae6SAdrian Hunter 76746f4a69eSAdrian Hunter #define INTEL_ACTIVELTR 0x804 76846f4a69eSAdrian Hunter #define INTEL_IDLELTR 0x808 76946f4a69eSAdrian Hunter 77046f4a69eSAdrian Hunter #define INTEL_LTR_REQ BIT(15) 77146f4a69eSAdrian Hunter #define INTEL_LTR_SCALE_MASK GENMASK(11, 10) 77246f4a69eSAdrian Hunter #define INTEL_LTR_SCALE_1US (2 << 10) 77346f4a69eSAdrian Hunter #define INTEL_LTR_SCALE_32US (3 << 10) 77446f4a69eSAdrian Hunter #define INTEL_LTR_VALUE_MASK GENMASK(9, 0) 77546f4a69eSAdrian Hunter 77646f4a69eSAdrian Hunter static void intel_cache_ltr(struct sdhci_pci_slot *slot) 77746f4a69eSAdrian Hunter { 77846f4a69eSAdrian Hunter struct intel_host *intel_host = sdhci_pci_priv(slot); 77946f4a69eSAdrian Hunter struct sdhci_host *host = slot->host; 78046f4a69eSAdrian Hunter 78146f4a69eSAdrian Hunter intel_host->active_ltr = readl(host->ioaddr + INTEL_ACTIVELTR); 78246f4a69eSAdrian Hunter intel_host->idle_ltr = readl(host->ioaddr + INTEL_IDLELTR); 78346f4a69eSAdrian Hunter } 78446f4a69eSAdrian Hunter 78546f4a69eSAdrian Hunter static void intel_ltr_set(struct device *dev, s32 val) 78646f4a69eSAdrian Hunter { 78746f4a69eSAdrian Hunter struct sdhci_pci_chip *chip = dev_get_drvdata(dev); 78846f4a69eSAdrian Hunter struct sdhci_pci_slot *slot = chip->slots[0]; 78946f4a69eSAdrian Hunter struct intel_host *intel_host = sdhci_pci_priv(slot); 79046f4a69eSAdrian Hunter struct sdhci_host *host = slot->host; 79146f4a69eSAdrian Hunter u32 ltr; 79246f4a69eSAdrian Hunter 79346f4a69eSAdrian Hunter pm_runtime_get_sync(dev); 79446f4a69eSAdrian Hunter 79546f4a69eSAdrian Hunter /* 79646f4a69eSAdrian Hunter * Program latency tolerance (LTR) accordingly what has been asked 79746f4a69eSAdrian Hunter * by the PM QoS layer or disable it in case we were passed 79846f4a69eSAdrian Hunter * negative value or PM_QOS_LATENCY_ANY. 79946f4a69eSAdrian Hunter */ 80046f4a69eSAdrian Hunter ltr = readl(host->ioaddr + INTEL_ACTIVELTR); 80146f4a69eSAdrian Hunter 80246f4a69eSAdrian Hunter if (val == PM_QOS_LATENCY_ANY || val < 0) { 80346f4a69eSAdrian Hunter ltr &= ~INTEL_LTR_REQ; 80446f4a69eSAdrian Hunter } else { 80546f4a69eSAdrian Hunter ltr |= INTEL_LTR_REQ; 80646f4a69eSAdrian Hunter ltr &= ~INTEL_LTR_SCALE_MASK; 80746f4a69eSAdrian Hunter ltr &= ~INTEL_LTR_VALUE_MASK; 80846f4a69eSAdrian Hunter 80946f4a69eSAdrian Hunter if (val > INTEL_LTR_VALUE_MASK) { 81046f4a69eSAdrian Hunter val >>= 5; 81146f4a69eSAdrian Hunter if (val > INTEL_LTR_VALUE_MASK) 81246f4a69eSAdrian Hunter val = INTEL_LTR_VALUE_MASK; 81346f4a69eSAdrian Hunter ltr |= INTEL_LTR_SCALE_32US | val; 81446f4a69eSAdrian Hunter } else { 81546f4a69eSAdrian Hunter ltr |= INTEL_LTR_SCALE_1US | val; 81646f4a69eSAdrian Hunter } 81746f4a69eSAdrian Hunter } 81846f4a69eSAdrian Hunter 81946f4a69eSAdrian Hunter if (ltr == intel_host->active_ltr) 82046f4a69eSAdrian Hunter goto out; 82146f4a69eSAdrian Hunter 82246f4a69eSAdrian Hunter writel(ltr, host->ioaddr + INTEL_ACTIVELTR); 82346f4a69eSAdrian Hunter writel(ltr, host->ioaddr + INTEL_IDLELTR); 82446f4a69eSAdrian Hunter 82546f4a69eSAdrian Hunter /* Cache the values into lpss structure */ 82646f4a69eSAdrian Hunter intel_cache_ltr(slot); 82746f4a69eSAdrian Hunter out: 82846f4a69eSAdrian Hunter pm_runtime_put_autosuspend(dev); 82946f4a69eSAdrian Hunter } 83046f4a69eSAdrian Hunter 83146f4a69eSAdrian Hunter static bool intel_use_ltr(struct sdhci_pci_chip *chip) 83246f4a69eSAdrian Hunter { 83346f4a69eSAdrian Hunter switch (chip->pdev->device) { 83446f4a69eSAdrian Hunter case PCI_DEVICE_ID_INTEL_BYT_EMMC: 83546f4a69eSAdrian Hunter case PCI_DEVICE_ID_INTEL_BYT_EMMC2: 83646f4a69eSAdrian Hunter case PCI_DEVICE_ID_INTEL_BYT_SDIO: 83746f4a69eSAdrian Hunter case PCI_DEVICE_ID_INTEL_BYT_SD: 83846f4a69eSAdrian Hunter case PCI_DEVICE_ID_INTEL_BSW_EMMC: 83946f4a69eSAdrian Hunter case PCI_DEVICE_ID_INTEL_BSW_SDIO: 84046f4a69eSAdrian Hunter case PCI_DEVICE_ID_INTEL_BSW_SD: 84146f4a69eSAdrian Hunter return false; 84246f4a69eSAdrian Hunter default: 84346f4a69eSAdrian Hunter return true; 84446f4a69eSAdrian Hunter } 84546f4a69eSAdrian Hunter } 84646f4a69eSAdrian Hunter 84746f4a69eSAdrian Hunter static void intel_ltr_expose(struct sdhci_pci_chip *chip) 84846f4a69eSAdrian Hunter { 84946f4a69eSAdrian Hunter struct device *dev = &chip->pdev->dev; 85046f4a69eSAdrian Hunter 85146f4a69eSAdrian Hunter if (!intel_use_ltr(chip)) 85246f4a69eSAdrian Hunter return; 85346f4a69eSAdrian Hunter 85446f4a69eSAdrian Hunter dev->power.set_latency_tolerance = intel_ltr_set; 85546f4a69eSAdrian Hunter dev_pm_qos_expose_latency_tolerance(dev); 85646f4a69eSAdrian Hunter } 85746f4a69eSAdrian Hunter 85846f4a69eSAdrian Hunter static void intel_ltr_hide(struct sdhci_pci_chip *chip) 85946f4a69eSAdrian Hunter { 86046f4a69eSAdrian Hunter struct device *dev = &chip->pdev->dev; 86146f4a69eSAdrian Hunter 86246f4a69eSAdrian Hunter if (!intel_use_ltr(chip)) 86346f4a69eSAdrian Hunter return; 86446f4a69eSAdrian Hunter 86546f4a69eSAdrian Hunter dev_pm_qos_hide_latency_tolerance(dev); 86646f4a69eSAdrian Hunter dev->power.set_latency_tolerance = NULL; 86746f4a69eSAdrian Hunter } 86846f4a69eSAdrian Hunter 869f8870ae6SAdrian Hunter static void byt_probe_slot(struct sdhci_pci_slot *slot) 870f8870ae6SAdrian Hunter { 871f8870ae6SAdrian Hunter struct mmc_host_ops *ops = &slot->host->mmc_host_ops; 872809090e8SAdrian Hunter struct device *dev = &slot->chip->pdev->dev; 873809090e8SAdrian Hunter struct mmc_host *mmc = slot->host->mmc; 874f8870ae6SAdrian Hunter 875f8870ae6SAdrian Hunter byt_read_dsm(slot); 876f8870ae6SAdrian Hunter 8770a49a619SAdrian Hunter byt_ocp_setting(slot->chip->pdev); 8780a49a619SAdrian Hunter 879f8870ae6SAdrian Hunter ops->execute_tuning = intel_execute_tuning; 880be17355aSAdrian Hunter ops->start_signal_voltage_switch = intel_start_signal_voltage_switch; 881809090e8SAdrian Hunter 882809090e8SAdrian Hunter device_property_read_u32(dev, "max-frequency", &mmc->f_max); 88346f4a69eSAdrian Hunter 88446f4a69eSAdrian Hunter if (!mmc->slotno) { 88546f4a69eSAdrian Hunter slot->chip->slots[mmc->slotno] = slot; 88646f4a69eSAdrian Hunter intel_ltr_expose(slot->chip); 88746f4a69eSAdrian Hunter } 88846f4a69eSAdrian Hunter } 88946f4a69eSAdrian Hunter 89046f4a69eSAdrian Hunter static void byt_add_debugfs(struct sdhci_pci_slot *slot) 89146f4a69eSAdrian Hunter { 89246f4a69eSAdrian Hunter struct intel_host *intel_host = sdhci_pci_priv(slot); 89346f4a69eSAdrian Hunter struct mmc_host *mmc = slot->host->mmc; 89446f4a69eSAdrian Hunter struct dentry *dir = mmc->debugfs_root; 89546f4a69eSAdrian Hunter 89646f4a69eSAdrian Hunter if (!intel_use_ltr(slot->chip)) 89746f4a69eSAdrian Hunter return; 89846f4a69eSAdrian Hunter 89946f4a69eSAdrian Hunter debugfs_create_x32("active_ltr", 0444, dir, &intel_host->active_ltr); 90046f4a69eSAdrian Hunter debugfs_create_x32("idle_ltr", 0444, dir, &intel_host->idle_ltr); 90146f4a69eSAdrian Hunter 90246f4a69eSAdrian Hunter intel_cache_ltr(slot); 90346f4a69eSAdrian Hunter } 90446f4a69eSAdrian Hunter 90546f4a69eSAdrian Hunter static int byt_add_host(struct sdhci_pci_slot *slot) 90646f4a69eSAdrian Hunter { 90746f4a69eSAdrian Hunter int ret = sdhci_add_host(slot->host); 90846f4a69eSAdrian Hunter 90946f4a69eSAdrian Hunter if (!ret) 91046f4a69eSAdrian Hunter byt_add_debugfs(slot); 91146f4a69eSAdrian Hunter return ret; 91246f4a69eSAdrian Hunter } 91346f4a69eSAdrian Hunter 91446f4a69eSAdrian Hunter static void byt_remove_slot(struct sdhci_pci_slot *slot, int dead) 91546f4a69eSAdrian Hunter { 91646f4a69eSAdrian Hunter struct mmc_host *mmc = slot->host->mmc; 91746f4a69eSAdrian Hunter 91846f4a69eSAdrian Hunter if (!mmc->slotno) 91946f4a69eSAdrian Hunter intel_ltr_hide(slot->chip); 920f8870ae6SAdrian Hunter } 921f8870ae6SAdrian Hunter 922659c9bc1SBen Hutchings static int byt_emmc_probe_slot(struct sdhci_pci_slot *slot) 923659c9bc1SBen Hutchings { 924f8870ae6SAdrian Hunter byt_probe_slot(slot); 925659c9bc1SBen Hutchings slot->host->mmc->caps |= MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE | 926659c9bc1SBen Hutchings MMC_CAP_HW_RESET | MMC_CAP_1_8V_DDR | 92732828857SAdrian Hunter MMC_CAP_CMD_DURING_TFR | 928659c9bc1SBen Hutchings MMC_CAP_WAIT_WHILE_BUSY; 929659c9bc1SBen Hutchings slot->hw_reset = sdhci_pci_int_hw_reset; 930659c9bc1SBen Hutchings if (slot->chip->pdev->device == PCI_DEVICE_ID_INTEL_BSW_EMMC) 931659c9bc1SBen Hutchings slot->host->timeout_clk = 1000; /* 1000 kHz i.e. 1 MHz */ 93251ced59cSAdrian Hunter slot->host->mmc_host_ops.select_drive_strength = 93351ced59cSAdrian Hunter intel_select_drive_strength; 934659c9bc1SBen Hutchings return 0; 935659c9bc1SBen Hutchings } 936659c9bc1SBen Hutchings 937bedf9fc0SAdrian Hunter static bool glk_broken_cqhci(struct sdhci_pci_slot *slot) 938bedf9fc0SAdrian Hunter { 939bedf9fc0SAdrian Hunter return slot->chip->pdev->device == PCI_DEVICE_ID_INTEL_GLK_EMMC && 940bedf9fc0SAdrian Hunter dmi_match(DMI_BIOS_VENDOR, "LENOVO"); 941bedf9fc0SAdrian Hunter } 942bedf9fc0SAdrian Hunter 943bc55dcd8SAdrian Hunter static int glk_emmc_probe_slot(struct sdhci_pci_slot *slot) 944bc55dcd8SAdrian Hunter { 945bc55dcd8SAdrian Hunter int ret = byt_emmc_probe_slot(slot); 946bc55dcd8SAdrian Hunter 947bedf9fc0SAdrian Hunter if (!glk_broken_cqhci(slot)) 9488ee82bdaSAdrian Hunter slot->host->mmc->caps2 |= MMC_CAP2_CQE; 9498ee82bdaSAdrian Hunter 950bc55dcd8SAdrian Hunter if (slot->chip->pdev->device != PCI_DEVICE_ID_INTEL_GLK_EMMC) { 951bc55dcd8SAdrian Hunter slot->host->mmc->caps2 |= MMC_CAP2_HS400_ES, 952bc55dcd8SAdrian Hunter slot->host->mmc_host_ops.hs400_enhanced_strobe = 953bc55dcd8SAdrian Hunter intel_hs400_enhanced_strobe; 9548ee82bdaSAdrian Hunter slot->host->mmc->caps2 |= MMC_CAP2_CQE_DCMD; 955bc55dcd8SAdrian Hunter } 956bc55dcd8SAdrian Hunter 957bc55dcd8SAdrian Hunter return ret; 958bc55dcd8SAdrian Hunter } 959bc55dcd8SAdrian Hunter 9608ee82bdaSAdrian Hunter static const struct cqhci_host_ops glk_cqhci_ops = { 9617b7d57fdSAdrian Hunter .enable = sdhci_cqe_enable, 9628ee82bdaSAdrian Hunter .disable = sdhci_cqe_disable, 9638ee82bdaSAdrian Hunter .dumpregs = sdhci_pci_dumpregs, 9648ee82bdaSAdrian Hunter }; 9658ee82bdaSAdrian Hunter 9668ee82bdaSAdrian Hunter static int glk_emmc_add_host(struct sdhci_pci_slot *slot) 9678ee82bdaSAdrian Hunter { 9688ee82bdaSAdrian Hunter struct device *dev = &slot->chip->pdev->dev; 9698ee82bdaSAdrian Hunter struct sdhci_host *host = slot->host; 9708ee82bdaSAdrian Hunter struct cqhci_host *cq_host; 9718ee82bdaSAdrian Hunter bool dma64; 9728ee82bdaSAdrian Hunter int ret; 9738ee82bdaSAdrian Hunter 9748ee82bdaSAdrian Hunter ret = sdhci_setup_host(host); 9758ee82bdaSAdrian Hunter if (ret) 9768ee82bdaSAdrian Hunter return ret; 9778ee82bdaSAdrian Hunter 9788ee82bdaSAdrian Hunter cq_host = devm_kzalloc(dev, sizeof(*cq_host), GFP_KERNEL); 9798ee82bdaSAdrian Hunter if (!cq_host) { 9808ee82bdaSAdrian Hunter ret = -ENOMEM; 9818ee82bdaSAdrian Hunter goto cleanup; 9828ee82bdaSAdrian Hunter } 9838ee82bdaSAdrian Hunter 9848ee82bdaSAdrian Hunter cq_host->mmio = host->ioaddr + 0x200; 9858ee82bdaSAdrian Hunter cq_host->quirks |= CQHCI_QUIRK_SHORT_TXFR_DESC_SZ; 9868ee82bdaSAdrian Hunter cq_host->ops = &glk_cqhci_ops; 9878ee82bdaSAdrian Hunter 9888ee82bdaSAdrian Hunter dma64 = host->flags & SDHCI_USE_64_BIT_DMA; 9898ee82bdaSAdrian Hunter if (dma64) 9908ee82bdaSAdrian Hunter cq_host->caps |= CQHCI_TASK_DESC_SZ_128; 9918ee82bdaSAdrian Hunter 9928ee82bdaSAdrian Hunter ret = cqhci_init(cq_host, host->mmc, dma64); 9938ee82bdaSAdrian Hunter if (ret) 9948ee82bdaSAdrian Hunter goto cleanup; 9958ee82bdaSAdrian Hunter 9968ee82bdaSAdrian Hunter ret = __sdhci_add_host(host); 9978ee82bdaSAdrian Hunter if (ret) 9988ee82bdaSAdrian Hunter goto cleanup; 9998ee82bdaSAdrian Hunter 100046f4a69eSAdrian Hunter byt_add_debugfs(slot); 100146f4a69eSAdrian Hunter 10028ee82bdaSAdrian Hunter return 0; 10038ee82bdaSAdrian Hunter 10048ee82bdaSAdrian Hunter cleanup: 10058ee82bdaSAdrian Hunter sdhci_cleanup_host(host); 10068ee82bdaSAdrian Hunter return ret; 10078ee82bdaSAdrian Hunter } 10088ee82bdaSAdrian Hunter 10095305ec6aSAdrian Hunter #ifdef CONFIG_PM 10105305ec6aSAdrian Hunter #define GLK_RX_CTRL1 0x834 10115305ec6aSAdrian Hunter #define GLK_TUN_VAL 0x840 10125305ec6aSAdrian Hunter #define GLK_PATH_PLL GENMASK(13, 8) 10135305ec6aSAdrian Hunter #define GLK_DLY GENMASK(6, 0) 10145305ec6aSAdrian Hunter /* Workaround firmware failing to restore the tuning value */ 10155305ec6aSAdrian Hunter static void glk_rpm_retune_wa(struct sdhci_pci_chip *chip, bool susp) 10165305ec6aSAdrian Hunter { 10175305ec6aSAdrian Hunter struct sdhci_pci_slot *slot = chip->slots[0]; 10185305ec6aSAdrian Hunter struct intel_host *intel_host = sdhci_pci_priv(slot); 10195305ec6aSAdrian Hunter struct sdhci_host *host = slot->host; 10205305ec6aSAdrian Hunter u32 glk_rx_ctrl1; 10215305ec6aSAdrian Hunter u32 glk_tun_val; 10225305ec6aSAdrian Hunter u32 dly; 10235305ec6aSAdrian Hunter 10245305ec6aSAdrian Hunter if (intel_host->rpm_retune_ok || !mmc_can_retune(host->mmc)) 10255305ec6aSAdrian Hunter return; 10265305ec6aSAdrian Hunter 10275305ec6aSAdrian Hunter glk_rx_ctrl1 = sdhci_readl(host, GLK_RX_CTRL1); 10285305ec6aSAdrian Hunter glk_tun_val = sdhci_readl(host, GLK_TUN_VAL); 10295305ec6aSAdrian Hunter 10305305ec6aSAdrian Hunter if (susp) { 10315305ec6aSAdrian Hunter intel_host->glk_rx_ctrl1 = glk_rx_ctrl1; 10325305ec6aSAdrian Hunter intel_host->glk_tun_val = glk_tun_val; 10335305ec6aSAdrian Hunter return; 10345305ec6aSAdrian Hunter } 10355305ec6aSAdrian Hunter 10365305ec6aSAdrian Hunter if (!intel_host->glk_tun_val) 10375305ec6aSAdrian Hunter return; 10385305ec6aSAdrian Hunter 10395305ec6aSAdrian Hunter if (glk_rx_ctrl1 != intel_host->glk_rx_ctrl1) { 10405305ec6aSAdrian Hunter intel_host->rpm_retune_ok = true; 10415305ec6aSAdrian Hunter return; 10425305ec6aSAdrian Hunter } 10435305ec6aSAdrian Hunter 10445305ec6aSAdrian Hunter dly = FIELD_PREP(GLK_DLY, FIELD_GET(GLK_PATH_PLL, glk_rx_ctrl1) + 10455305ec6aSAdrian Hunter (intel_host->glk_tun_val << 1)); 10465305ec6aSAdrian Hunter if (dly == FIELD_GET(GLK_DLY, glk_rx_ctrl1)) 10475305ec6aSAdrian Hunter return; 10485305ec6aSAdrian Hunter 10495305ec6aSAdrian Hunter glk_rx_ctrl1 = (glk_rx_ctrl1 & ~GLK_DLY) | dly; 10505305ec6aSAdrian Hunter sdhci_writel(host, glk_rx_ctrl1, GLK_RX_CTRL1); 10515305ec6aSAdrian Hunter 10525305ec6aSAdrian Hunter intel_host->rpm_retune_ok = true; 10535305ec6aSAdrian Hunter chip->rpm_retune = true; 10545305ec6aSAdrian Hunter mmc_retune_needed(host->mmc); 10555305ec6aSAdrian Hunter pr_info("%s: Requiring re-tune after rpm resume", mmc_hostname(host->mmc)); 10565305ec6aSAdrian Hunter } 10575305ec6aSAdrian Hunter 10585305ec6aSAdrian Hunter static void glk_rpm_retune_chk(struct sdhci_pci_chip *chip, bool susp) 10595305ec6aSAdrian Hunter { 10605305ec6aSAdrian Hunter if (chip->pdev->device == PCI_DEVICE_ID_INTEL_GLK_EMMC && 10615305ec6aSAdrian Hunter !chip->rpm_retune) 10625305ec6aSAdrian Hunter glk_rpm_retune_wa(chip, susp); 10635305ec6aSAdrian Hunter } 10645305ec6aSAdrian Hunter 10655305ec6aSAdrian Hunter static int glk_runtime_suspend(struct sdhci_pci_chip *chip) 10665305ec6aSAdrian Hunter { 10675305ec6aSAdrian Hunter glk_rpm_retune_chk(chip, true); 10685305ec6aSAdrian Hunter 10695305ec6aSAdrian Hunter return sdhci_cqhci_runtime_suspend(chip); 10705305ec6aSAdrian Hunter } 10715305ec6aSAdrian Hunter 10725305ec6aSAdrian Hunter static int glk_runtime_resume(struct sdhci_pci_chip *chip) 10735305ec6aSAdrian Hunter { 10745305ec6aSAdrian Hunter glk_rpm_retune_chk(chip, false); 10755305ec6aSAdrian Hunter 10765305ec6aSAdrian Hunter return sdhci_cqhci_runtime_resume(chip); 10775305ec6aSAdrian Hunter } 10785305ec6aSAdrian Hunter #endif 10795305ec6aSAdrian Hunter 10803f23df72SZach Brown #ifdef CONFIG_ACPI 10813f23df72SZach Brown static int ni_set_max_freq(struct sdhci_pci_slot *slot) 10823f23df72SZach Brown { 10833f23df72SZach Brown acpi_status status; 10843f23df72SZach Brown unsigned long long max_freq; 10853f23df72SZach Brown 10863f23df72SZach Brown status = acpi_evaluate_integer(ACPI_HANDLE(&slot->chip->pdev->dev), 10873f23df72SZach Brown "MXFQ", NULL, &max_freq); 10883f23df72SZach Brown if (ACPI_FAILURE(status)) { 10893f23df72SZach Brown dev_err(&slot->chip->pdev->dev, 10903f23df72SZach Brown "MXFQ not found in acpi table\n"); 10913f23df72SZach Brown return -EINVAL; 10923f23df72SZach Brown } 10933f23df72SZach Brown 10943f23df72SZach Brown slot->host->mmc->f_max = max_freq * 1000000; 10953f23df72SZach Brown 10963f23df72SZach Brown return 0; 10973f23df72SZach Brown } 10983f23df72SZach Brown #else 10993f23df72SZach Brown static inline int ni_set_max_freq(struct sdhci_pci_slot *slot) 11003f23df72SZach Brown { 11013f23df72SZach Brown return 0; 11023f23df72SZach Brown } 11033f23df72SZach Brown #endif 11043f23df72SZach Brown 110542b06496SZach Brown static int ni_byt_sdio_probe_slot(struct sdhci_pci_slot *slot) 110642b06496SZach Brown { 11073f23df72SZach Brown int err; 11083f23df72SZach Brown 1109f8870ae6SAdrian Hunter byt_probe_slot(slot); 1110c959a6b0SAdrian Hunter 11113f23df72SZach Brown err = ni_set_max_freq(slot); 11123f23df72SZach Brown if (err) 11133f23df72SZach Brown return err; 11143f23df72SZach Brown 111542b06496SZach Brown slot->host->mmc->caps |= MMC_CAP_POWER_OFF_CARD | MMC_CAP_NONREMOVABLE | 111642b06496SZach Brown MMC_CAP_WAIT_WHILE_BUSY; 111742b06496SZach Brown return 0; 111842b06496SZach Brown } 111942b06496SZach Brown 1120659c9bc1SBen Hutchings static int byt_sdio_probe_slot(struct sdhci_pci_slot *slot) 1121659c9bc1SBen Hutchings { 1122f8870ae6SAdrian Hunter byt_probe_slot(slot); 1123659c9bc1SBen Hutchings slot->host->mmc->caps |= MMC_CAP_POWER_OFF_CARD | MMC_CAP_NONREMOVABLE | 1124659c9bc1SBen Hutchings MMC_CAP_WAIT_WHILE_BUSY; 1125659c9bc1SBen Hutchings return 0; 1126659c9bc1SBen Hutchings } 1127659c9bc1SBen Hutchings 1128659c9bc1SBen Hutchings static int byt_sd_probe_slot(struct sdhci_pci_slot *slot) 1129659c9bc1SBen Hutchings { 1130f8870ae6SAdrian Hunter byt_probe_slot(slot); 1131c2c49a2eSAzhar Shaikh slot->host->mmc->caps |= MMC_CAP_WAIT_WHILE_BUSY | 11326cf4156cSAdrian Hunter MMC_CAP_AGGRESSIVE_PM | MMC_CAP_CD_WAKE; 1133659c9bc1SBen Hutchings slot->cd_idx = 0; 1134659c9bc1SBen Hutchings slot->cd_override_level = true; 1135163cbe31SAdrian Hunter if (slot->chip->pdev->device == PCI_DEVICE_ID_INTEL_BXT_SD || 113601d6b2a4SAdrian Hunter slot->chip->pdev->device == PCI_DEVICE_ID_INTEL_BXTM_SD || 11372d1956d0SAdrian Hunter slot->chip->pdev->device == PCI_DEVICE_ID_INTEL_APL_SD || 1138c2c49a2eSAzhar Shaikh slot->chip->pdev->device == PCI_DEVICE_ID_INTEL_GLK_SD) 1139163cbe31SAdrian Hunter slot->host->mmc_host_ops.get_cd = bxt_get_cd; 1140163cbe31SAdrian Hunter 1141bb26b841SKyle Roeschley if (slot->chip->pdev->subsystem_vendor == PCI_VENDOR_ID_NI && 1142bb26b841SKyle Roeschley slot->chip->pdev->subsystem_device == PCI_SUBDEVICE_ID_NI_78E3) 1143bb26b841SKyle Roeschley slot->host->mmc->caps2 |= MMC_CAP2_AVOID_3_3V; 1144bb26b841SKyle Roeschley 1145659c9bc1SBen Hutchings return 0; 1146659c9bc1SBen Hutchings } 1147659c9bc1SBen Hutchings 11480a49a619SAdrian Hunter #ifdef CONFIG_PM_SLEEP 11490a49a619SAdrian Hunter 11500a49a619SAdrian Hunter static int byt_resume(struct sdhci_pci_chip *chip) 11510a49a619SAdrian Hunter { 11520a49a619SAdrian Hunter byt_ocp_setting(chip->pdev); 11530a49a619SAdrian Hunter 11540a49a619SAdrian Hunter return sdhci_pci_resume_host(chip); 11550a49a619SAdrian Hunter } 11560a49a619SAdrian Hunter 11570a49a619SAdrian Hunter #endif 11580a49a619SAdrian Hunter 11590a49a619SAdrian Hunter #ifdef CONFIG_PM 11600a49a619SAdrian Hunter 11610a49a619SAdrian Hunter static int byt_runtime_resume(struct sdhci_pci_chip *chip) 11620a49a619SAdrian Hunter { 11630a49a619SAdrian Hunter byt_ocp_setting(chip->pdev); 11640a49a619SAdrian Hunter 11650a49a619SAdrian Hunter return sdhci_pci_runtime_resume_host(chip); 11660a49a619SAdrian Hunter } 11670a49a619SAdrian Hunter 11680a49a619SAdrian Hunter #endif 11690a49a619SAdrian Hunter 1170659c9bc1SBen Hutchings static const struct sdhci_pci_fixes sdhci_intel_byt_emmc = { 11710a49a619SAdrian Hunter #ifdef CONFIG_PM_SLEEP 11720a49a619SAdrian Hunter .resume = byt_resume, 11730a49a619SAdrian Hunter #endif 11740a49a619SAdrian Hunter #ifdef CONFIG_PM 11750a49a619SAdrian Hunter .runtime_resume = byt_runtime_resume, 11760a49a619SAdrian Hunter #endif 1177659c9bc1SBen Hutchings .allow_runtime_pm = true, 1178659c9bc1SBen Hutchings .probe_slot = byt_emmc_probe_slot, 117946f4a69eSAdrian Hunter .add_host = byt_add_host, 118046f4a69eSAdrian Hunter .remove_slot = byt_remove_slot, 1181aeae6ad3SAdrian Hunter .quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC | 1182aeae6ad3SAdrian Hunter SDHCI_QUIRK_NO_LED, 1183659c9bc1SBen Hutchings .quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN | 1184659c9bc1SBen Hutchings SDHCI_QUIRK2_CAPS_BIT63_FOR_HS400 | 1185659c9bc1SBen Hutchings SDHCI_QUIRK2_STOP_WITH_TC, 1186fee686b7SAdrian Hunter .ops = &sdhci_intel_byt_ops, 1187c959a6b0SAdrian Hunter .priv_size = sizeof(struct intel_host), 1188659c9bc1SBen Hutchings }; 1189659c9bc1SBen Hutchings 1190bc55dcd8SAdrian Hunter static const struct sdhci_pci_fixes sdhci_intel_glk_emmc = { 1191bc55dcd8SAdrian Hunter .allow_runtime_pm = true, 1192bc55dcd8SAdrian Hunter .probe_slot = glk_emmc_probe_slot, 11938ee82bdaSAdrian Hunter .add_host = glk_emmc_add_host, 119446f4a69eSAdrian Hunter .remove_slot = byt_remove_slot, 11958ee82bdaSAdrian Hunter #ifdef CONFIG_PM_SLEEP 11968ee82bdaSAdrian Hunter .suspend = sdhci_cqhci_suspend, 11978ee82bdaSAdrian Hunter .resume = sdhci_cqhci_resume, 11988ee82bdaSAdrian Hunter #endif 11998ee82bdaSAdrian Hunter #ifdef CONFIG_PM 12005305ec6aSAdrian Hunter .runtime_suspend = glk_runtime_suspend, 12015305ec6aSAdrian Hunter .runtime_resume = glk_runtime_resume, 12028ee82bdaSAdrian Hunter #endif 1203aeae6ad3SAdrian Hunter .quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC | 1204aeae6ad3SAdrian Hunter SDHCI_QUIRK_NO_LED, 1205bc55dcd8SAdrian Hunter .quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN | 1206bc55dcd8SAdrian Hunter SDHCI_QUIRK2_CAPS_BIT63_FOR_HS400 | 1207bc55dcd8SAdrian Hunter SDHCI_QUIRK2_STOP_WITH_TC, 12088ee82bdaSAdrian Hunter .ops = &sdhci_intel_glk_ops, 1209bc55dcd8SAdrian Hunter .priv_size = sizeof(struct intel_host), 1210bc55dcd8SAdrian Hunter }; 1211bc55dcd8SAdrian Hunter 121242b06496SZach Brown static const struct sdhci_pci_fixes sdhci_ni_byt_sdio = { 12130a49a619SAdrian Hunter #ifdef CONFIG_PM_SLEEP 12140a49a619SAdrian Hunter .resume = byt_resume, 12150a49a619SAdrian Hunter #endif 12160a49a619SAdrian Hunter #ifdef CONFIG_PM 12170a49a619SAdrian Hunter .runtime_resume = byt_runtime_resume, 12180a49a619SAdrian Hunter #endif 1219aeae6ad3SAdrian Hunter .quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC | 1220aeae6ad3SAdrian Hunter SDHCI_QUIRK_NO_LED, 122142b06496SZach Brown .quirks2 = SDHCI_QUIRK2_HOST_OFF_CARD_ON | 122242b06496SZach Brown SDHCI_QUIRK2_PRESET_VALUE_BROKEN, 122342b06496SZach Brown .allow_runtime_pm = true, 122442b06496SZach Brown .probe_slot = ni_byt_sdio_probe_slot, 122546f4a69eSAdrian Hunter .add_host = byt_add_host, 122646f4a69eSAdrian Hunter .remove_slot = byt_remove_slot, 122742b06496SZach Brown .ops = &sdhci_intel_byt_ops, 1228c959a6b0SAdrian Hunter .priv_size = sizeof(struct intel_host), 122942b06496SZach Brown }; 123042b06496SZach Brown 1231659c9bc1SBen Hutchings static const struct sdhci_pci_fixes sdhci_intel_byt_sdio = { 12320a49a619SAdrian Hunter #ifdef CONFIG_PM_SLEEP 12330a49a619SAdrian Hunter .resume = byt_resume, 12340a49a619SAdrian Hunter #endif 12350a49a619SAdrian Hunter #ifdef CONFIG_PM 12360a49a619SAdrian Hunter .runtime_resume = byt_runtime_resume, 12370a49a619SAdrian Hunter #endif 1238aeae6ad3SAdrian Hunter .quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC | 1239aeae6ad3SAdrian Hunter SDHCI_QUIRK_NO_LED, 1240659c9bc1SBen Hutchings .quirks2 = SDHCI_QUIRK2_HOST_OFF_CARD_ON | 1241659c9bc1SBen Hutchings SDHCI_QUIRK2_PRESET_VALUE_BROKEN, 1242659c9bc1SBen Hutchings .allow_runtime_pm = true, 1243659c9bc1SBen Hutchings .probe_slot = byt_sdio_probe_slot, 124446f4a69eSAdrian Hunter .add_host = byt_add_host, 124546f4a69eSAdrian Hunter .remove_slot = byt_remove_slot, 1246fee686b7SAdrian Hunter .ops = &sdhci_intel_byt_ops, 1247c959a6b0SAdrian Hunter .priv_size = sizeof(struct intel_host), 1248659c9bc1SBen Hutchings }; 1249659c9bc1SBen Hutchings 1250659c9bc1SBen Hutchings static const struct sdhci_pci_fixes sdhci_intel_byt_sd = { 12510a49a619SAdrian Hunter #ifdef CONFIG_PM_SLEEP 12520a49a619SAdrian Hunter .resume = byt_resume, 12530a49a619SAdrian Hunter #endif 12540a49a619SAdrian Hunter #ifdef CONFIG_PM 12550a49a619SAdrian Hunter .runtime_resume = byt_runtime_resume, 12560a49a619SAdrian Hunter #endif 1257aeae6ad3SAdrian Hunter .quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC | 1258aeae6ad3SAdrian Hunter SDHCI_QUIRK_NO_LED, 1259659c9bc1SBen Hutchings .quirks2 = SDHCI_QUIRK2_CARD_ON_NEEDS_BUS_ON | 1260659c9bc1SBen Hutchings SDHCI_QUIRK2_PRESET_VALUE_BROKEN | 1261659c9bc1SBen Hutchings SDHCI_QUIRK2_STOP_WITH_TC, 1262659c9bc1SBen Hutchings .allow_runtime_pm = true, 1263659c9bc1SBen Hutchings .own_cd_for_runtime_pm = true, 1264659c9bc1SBen Hutchings .probe_slot = byt_sd_probe_slot, 126546f4a69eSAdrian Hunter .add_host = byt_add_host, 126646f4a69eSAdrian Hunter .remove_slot = byt_remove_slot, 1267fee686b7SAdrian Hunter .ops = &sdhci_intel_byt_ops, 1268c959a6b0SAdrian Hunter .priv_size = sizeof(struct intel_host), 1269659c9bc1SBen Hutchings }; 1270659c9bc1SBen Hutchings 1271659c9bc1SBen Hutchings /* Define Host controllers for Intel Merrifield platform */ 12721f64cec2SAndy Shevchenko #define INTEL_MRFLD_EMMC_0 0 12731f64cec2SAndy Shevchenko #define INTEL_MRFLD_EMMC_1 1 12744674b6c8SAndy Shevchenko #define INTEL_MRFLD_SD 2 1275d5565577SAndy Shevchenko #define INTEL_MRFLD_SDIO 3 1276659c9bc1SBen Hutchings 12770e39220eSAndy Shevchenko #ifdef CONFIG_ACPI 12780e39220eSAndy Shevchenko static void intel_mrfld_mmc_fix_up_power_slot(struct sdhci_pci_slot *slot) 12790e39220eSAndy Shevchenko { 12800e39220eSAndy Shevchenko struct acpi_device *device, *child; 12810e39220eSAndy Shevchenko 12820e39220eSAndy Shevchenko device = ACPI_COMPANION(&slot->chip->pdev->dev); 12830e39220eSAndy Shevchenko if (!device) 12840e39220eSAndy Shevchenko return; 12850e39220eSAndy Shevchenko 12860e39220eSAndy Shevchenko acpi_device_fix_up_power(device); 12870e39220eSAndy Shevchenko list_for_each_entry(child, &device->children, node) 12880e39220eSAndy Shevchenko if (child->status.present && child->status.enabled) 12890e39220eSAndy Shevchenko acpi_device_fix_up_power(child); 12900e39220eSAndy Shevchenko } 12910e39220eSAndy Shevchenko #else 12920e39220eSAndy Shevchenko static inline void intel_mrfld_mmc_fix_up_power_slot(struct sdhci_pci_slot *slot) {} 12930e39220eSAndy Shevchenko #endif 12940e39220eSAndy Shevchenko 12951f64cec2SAndy Shevchenko static int intel_mrfld_mmc_probe_slot(struct sdhci_pci_slot *slot) 1296659c9bc1SBen Hutchings { 12972e57bbe2SAndy Shevchenko unsigned int func = PCI_FUNC(slot->chip->pdev->devfn); 12982e57bbe2SAndy Shevchenko 12992e57bbe2SAndy Shevchenko switch (func) { 13002e57bbe2SAndy Shevchenko case INTEL_MRFLD_EMMC_0: 13012e57bbe2SAndy Shevchenko case INTEL_MRFLD_EMMC_1: 13022e57bbe2SAndy Shevchenko slot->host->mmc->caps |= MMC_CAP_NONREMOVABLE | 13032e57bbe2SAndy Shevchenko MMC_CAP_8_BIT_DATA | 13042e57bbe2SAndy Shevchenko MMC_CAP_1_8V_DDR; 13052e57bbe2SAndy Shevchenko break; 13064674b6c8SAndy Shevchenko case INTEL_MRFLD_SD: 13074674b6c8SAndy Shevchenko slot->host->quirks2 |= SDHCI_QUIRK2_NO_1_8_V; 13084674b6c8SAndy Shevchenko break; 1309d5565577SAndy Shevchenko case INTEL_MRFLD_SDIO: 13102a609abeSAndy Shevchenko /* Advertise 2.0v for compatibility with the SDIO card's OCR */ 13112a609abeSAndy Shevchenko slot->host->ocr_mask = MMC_VDD_20_21 | MMC_VDD_165_195; 1312d5565577SAndy Shevchenko slot->host->mmc->caps |= MMC_CAP_NONREMOVABLE | 1313d5565577SAndy Shevchenko MMC_CAP_POWER_OFF_CARD; 1314d5565577SAndy Shevchenko break; 13152e57bbe2SAndy Shevchenko default: 1316659c9bc1SBen Hutchings return -ENODEV; 13172e57bbe2SAndy Shevchenko } 13180e39220eSAndy Shevchenko 13190e39220eSAndy Shevchenko intel_mrfld_mmc_fix_up_power_slot(slot); 1320659c9bc1SBen Hutchings return 0; 1321659c9bc1SBen Hutchings } 1322659c9bc1SBen Hutchings 13231f64cec2SAndy Shevchenko static const struct sdhci_pci_fixes sdhci_intel_mrfld_mmc = { 1324659c9bc1SBen Hutchings .quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC, 1325659c9bc1SBen Hutchings .quirks2 = SDHCI_QUIRK2_BROKEN_HS200 | 1326659c9bc1SBen Hutchings SDHCI_QUIRK2_PRESET_VALUE_BROKEN, 1327659c9bc1SBen Hutchings .allow_runtime_pm = true, 13281f64cec2SAndy Shevchenko .probe_slot = intel_mrfld_mmc_probe_slot, 1329659c9bc1SBen Hutchings }; 1330659c9bc1SBen Hutchings 1331659c9bc1SBen Hutchings static int jmicron_pmos(struct sdhci_pci_chip *chip, int on) 1332659c9bc1SBen Hutchings { 1333659c9bc1SBen Hutchings u8 scratch; 1334659c9bc1SBen Hutchings int ret; 1335659c9bc1SBen Hutchings 1336659c9bc1SBen Hutchings ret = pci_read_config_byte(chip->pdev, 0xAE, &scratch); 1337659c9bc1SBen Hutchings if (ret) 1338659c9bc1SBen Hutchings return ret; 1339659c9bc1SBen Hutchings 1340659c9bc1SBen Hutchings /* 1341659c9bc1SBen Hutchings * Turn PMOS on [bit 0], set over current detection to 2.4 V 1342659c9bc1SBen Hutchings * [bit 1:2] and enable over current debouncing [bit 6]. 1343659c9bc1SBen Hutchings */ 1344659c9bc1SBen Hutchings if (on) 1345659c9bc1SBen Hutchings scratch |= 0x47; 1346659c9bc1SBen Hutchings else 1347659c9bc1SBen Hutchings scratch &= ~0x47; 1348659c9bc1SBen Hutchings 13497582041fSkbuild test robot return pci_write_config_byte(chip->pdev, 0xAE, scratch); 1350659c9bc1SBen Hutchings } 1351659c9bc1SBen Hutchings 1352659c9bc1SBen Hutchings static int jmicron_probe(struct sdhci_pci_chip *chip) 1353659c9bc1SBen Hutchings { 1354659c9bc1SBen Hutchings int ret; 1355659c9bc1SBen Hutchings u16 mmcdev = 0; 1356659c9bc1SBen Hutchings 1357659c9bc1SBen Hutchings if (chip->pdev->revision == 0) { 1358659c9bc1SBen Hutchings chip->quirks |= SDHCI_QUIRK_32BIT_DMA_ADDR | 1359659c9bc1SBen Hutchings SDHCI_QUIRK_32BIT_DMA_SIZE | 1360659c9bc1SBen Hutchings SDHCI_QUIRK_32BIT_ADMA_SIZE | 1361659c9bc1SBen Hutchings SDHCI_QUIRK_RESET_AFTER_REQUEST | 1362659c9bc1SBen Hutchings SDHCI_QUIRK_BROKEN_SMALL_PIO; 1363659c9bc1SBen Hutchings } 1364659c9bc1SBen Hutchings 1365659c9bc1SBen Hutchings /* 1366659c9bc1SBen Hutchings * JMicron chips can have two interfaces to the same hardware 1367659c9bc1SBen Hutchings * in order to work around limitations in Microsoft's driver. 1368659c9bc1SBen Hutchings * We need to make sure we only bind to one of them. 1369659c9bc1SBen Hutchings * 1370659c9bc1SBen Hutchings * This code assumes two things: 1371659c9bc1SBen Hutchings * 1372659c9bc1SBen Hutchings * 1. The PCI code adds subfunctions in order. 1373659c9bc1SBen Hutchings * 1374659c9bc1SBen Hutchings * 2. The MMC interface has a lower subfunction number 1375659c9bc1SBen Hutchings * than the SD interface. 1376659c9bc1SBen Hutchings */ 1377659c9bc1SBen Hutchings if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_SD) 1378659c9bc1SBen Hutchings mmcdev = PCI_DEVICE_ID_JMICRON_JMB38X_MMC; 1379659c9bc1SBen Hutchings else if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_SD) 1380659c9bc1SBen Hutchings mmcdev = PCI_DEVICE_ID_JMICRON_JMB388_ESD; 1381659c9bc1SBen Hutchings 1382659c9bc1SBen Hutchings if (mmcdev) { 1383659c9bc1SBen Hutchings struct pci_dev *sd_dev; 1384659c9bc1SBen Hutchings 1385659c9bc1SBen Hutchings sd_dev = NULL; 1386659c9bc1SBen Hutchings while ((sd_dev = pci_get_device(PCI_VENDOR_ID_JMICRON, 1387659c9bc1SBen Hutchings mmcdev, sd_dev)) != NULL) { 1388659c9bc1SBen Hutchings if ((PCI_SLOT(chip->pdev->devfn) == 1389659c9bc1SBen Hutchings PCI_SLOT(sd_dev->devfn)) && 1390659c9bc1SBen Hutchings (chip->pdev->bus == sd_dev->bus)) 1391659c9bc1SBen Hutchings break; 1392659c9bc1SBen Hutchings } 1393659c9bc1SBen Hutchings 1394659c9bc1SBen Hutchings if (sd_dev) { 1395659c9bc1SBen Hutchings pci_dev_put(sd_dev); 1396659c9bc1SBen Hutchings dev_info(&chip->pdev->dev, "Refusing to bind to " 1397659c9bc1SBen Hutchings "secondary interface.\n"); 1398659c9bc1SBen Hutchings return -ENODEV; 1399659c9bc1SBen Hutchings } 1400659c9bc1SBen Hutchings } 1401659c9bc1SBen Hutchings 1402659c9bc1SBen Hutchings /* 1403659c9bc1SBen Hutchings * JMicron chips need a bit of a nudge to enable the power 1404659c9bc1SBen Hutchings * output pins. 1405659c9bc1SBen Hutchings */ 1406659c9bc1SBen Hutchings ret = jmicron_pmos(chip, 1); 1407659c9bc1SBen Hutchings if (ret) { 1408659c9bc1SBen Hutchings dev_err(&chip->pdev->dev, "Failure enabling card power\n"); 1409659c9bc1SBen Hutchings return ret; 1410659c9bc1SBen Hutchings } 1411659c9bc1SBen Hutchings 1412659c9bc1SBen Hutchings /* quirk for unsable RO-detection on JM388 chips */ 1413659c9bc1SBen Hutchings if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_SD || 1414659c9bc1SBen Hutchings chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD) 1415659c9bc1SBen Hutchings chip->quirks |= SDHCI_QUIRK_UNSTABLE_RO_DETECT; 1416659c9bc1SBen Hutchings 1417659c9bc1SBen Hutchings return 0; 1418659c9bc1SBen Hutchings } 1419659c9bc1SBen Hutchings 1420659c9bc1SBen Hutchings static void jmicron_enable_mmc(struct sdhci_host *host, int on) 1421659c9bc1SBen Hutchings { 1422659c9bc1SBen Hutchings u8 scratch; 1423659c9bc1SBen Hutchings 1424659c9bc1SBen Hutchings scratch = readb(host->ioaddr + 0xC0); 1425659c9bc1SBen Hutchings 1426659c9bc1SBen Hutchings if (on) 1427659c9bc1SBen Hutchings scratch |= 0x01; 1428659c9bc1SBen Hutchings else 1429659c9bc1SBen Hutchings scratch &= ~0x01; 1430659c9bc1SBen Hutchings 1431659c9bc1SBen Hutchings writeb(scratch, host->ioaddr + 0xC0); 1432659c9bc1SBen Hutchings } 1433659c9bc1SBen Hutchings 1434659c9bc1SBen Hutchings static int jmicron_probe_slot(struct sdhci_pci_slot *slot) 1435659c9bc1SBen Hutchings { 1436659c9bc1SBen Hutchings if (slot->chip->pdev->revision == 0) { 1437659c9bc1SBen Hutchings u16 version; 1438659c9bc1SBen Hutchings 1439659c9bc1SBen Hutchings version = readl(slot->host->ioaddr + SDHCI_HOST_VERSION); 1440659c9bc1SBen Hutchings version = (version & SDHCI_VENDOR_VER_MASK) >> 1441659c9bc1SBen Hutchings SDHCI_VENDOR_VER_SHIFT; 1442659c9bc1SBen Hutchings 1443659c9bc1SBen Hutchings /* 1444659c9bc1SBen Hutchings * Older versions of the chip have lots of nasty glitches 1445659c9bc1SBen Hutchings * in the ADMA engine. It's best just to avoid it 1446659c9bc1SBen Hutchings * completely. 1447659c9bc1SBen Hutchings */ 1448659c9bc1SBen Hutchings if (version < 0xAC) 1449659c9bc1SBen Hutchings slot->host->quirks |= SDHCI_QUIRK_BROKEN_ADMA; 1450659c9bc1SBen Hutchings } 1451659c9bc1SBen Hutchings 1452659c9bc1SBen Hutchings /* JM388 MMC doesn't support 1.8V while SD supports it */ 1453659c9bc1SBen Hutchings if (slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD) { 1454659c9bc1SBen Hutchings slot->host->ocr_avail_sd = MMC_VDD_32_33 | MMC_VDD_33_34 | 1455659c9bc1SBen Hutchings MMC_VDD_29_30 | MMC_VDD_30_31 | 1456659c9bc1SBen Hutchings MMC_VDD_165_195; /* allow 1.8V */ 1457659c9bc1SBen Hutchings slot->host->ocr_avail_mmc = MMC_VDD_32_33 | MMC_VDD_33_34 | 1458659c9bc1SBen Hutchings MMC_VDD_29_30 | MMC_VDD_30_31; /* no 1.8V for MMC */ 1459659c9bc1SBen Hutchings } 1460659c9bc1SBen Hutchings 1461659c9bc1SBen Hutchings /* 1462659c9bc1SBen Hutchings * The secondary interface requires a bit set to get the 1463659c9bc1SBen Hutchings * interrupts. 1464659c9bc1SBen Hutchings */ 1465659c9bc1SBen Hutchings if (slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC || 1466659c9bc1SBen Hutchings slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD) 1467659c9bc1SBen Hutchings jmicron_enable_mmc(slot->host, 1); 1468659c9bc1SBen Hutchings 1469659c9bc1SBen Hutchings slot->host->mmc->caps |= MMC_CAP_BUS_WIDTH_TEST; 1470659c9bc1SBen Hutchings 1471659c9bc1SBen Hutchings return 0; 1472659c9bc1SBen Hutchings } 1473659c9bc1SBen Hutchings 1474659c9bc1SBen Hutchings static void jmicron_remove_slot(struct sdhci_pci_slot *slot, int dead) 1475659c9bc1SBen Hutchings { 1476659c9bc1SBen Hutchings if (dead) 1477659c9bc1SBen Hutchings return; 1478659c9bc1SBen Hutchings 1479659c9bc1SBen Hutchings if (slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC || 1480659c9bc1SBen Hutchings slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD) 1481659c9bc1SBen Hutchings jmicron_enable_mmc(slot->host, 0); 1482659c9bc1SBen Hutchings } 1483659c9bc1SBen Hutchings 1484b7813f0fSAdrian Hunter #ifdef CONFIG_PM_SLEEP 1485659c9bc1SBen Hutchings static int jmicron_suspend(struct sdhci_pci_chip *chip) 1486659c9bc1SBen Hutchings { 148730cf2803SAdrian Hunter int i, ret; 148830cf2803SAdrian Hunter 14895c3c6126SAdrian Hunter ret = sdhci_pci_suspend_host(chip); 149030cf2803SAdrian Hunter if (ret) 149130cf2803SAdrian Hunter return ret; 1492659c9bc1SBen Hutchings 1493659c9bc1SBen Hutchings if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC || 1494659c9bc1SBen Hutchings chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD) { 1495659c9bc1SBen Hutchings for (i = 0; i < chip->num_slots; i++) 1496659c9bc1SBen Hutchings jmicron_enable_mmc(chip->slots[i]->host, 0); 1497659c9bc1SBen Hutchings } 1498659c9bc1SBen Hutchings 1499659c9bc1SBen Hutchings return 0; 1500659c9bc1SBen Hutchings } 1501659c9bc1SBen Hutchings 1502659c9bc1SBen Hutchings static int jmicron_resume(struct sdhci_pci_chip *chip) 1503659c9bc1SBen Hutchings { 1504659c9bc1SBen Hutchings int ret, i; 1505659c9bc1SBen Hutchings 1506659c9bc1SBen Hutchings if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC || 1507659c9bc1SBen Hutchings chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD) { 1508659c9bc1SBen Hutchings for (i = 0; i < chip->num_slots; i++) 1509659c9bc1SBen Hutchings jmicron_enable_mmc(chip->slots[i]->host, 1); 1510659c9bc1SBen Hutchings } 1511659c9bc1SBen Hutchings 1512659c9bc1SBen Hutchings ret = jmicron_pmos(chip, 1); 1513659c9bc1SBen Hutchings if (ret) { 1514659c9bc1SBen Hutchings dev_err(&chip->pdev->dev, "Failure enabling card power\n"); 1515659c9bc1SBen Hutchings return ret; 1516659c9bc1SBen Hutchings } 1517659c9bc1SBen Hutchings 151830cf2803SAdrian Hunter return sdhci_pci_resume_host(chip); 1519659c9bc1SBen Hutchings } 1520b7813f0fSAdrian Hunter #endif 1521659c9bc1SBen Hutchings 1522659c9bc1SBen Hutchings static const struct sdhci_pci_fixes sdhci_jmicron = { 1523659c9bc1SBen Hutchings .probe = jmicron_probe, 1524659c9bc1SBen Hutchings 1525659c9bc1SBen Hutchings .probe_slot = jmicron_probe_slot, 1526659c9bc1SBen Hutchings .remove_slot = jmicron_remove_slot, 1527659c9bc1SBen Hutchings 1528b7813f0fSAdrian Hunter #ifdef CONFIG_PM_SLEEP 1529659c9bc1SBen Hutchings .suspend = jmicron_suspend, 1530659c9bc1SBen Hutchings .resume = jmicron_resume, 1531b7813f0fSAdrian Hunter #endif 1532659c9bc1SBen Hutchings }; 1533659c9bc1SBen Hutchings 1534659c9bc1SBen Hutchings /* SysKonnect CardBus2SDIO extra registers */ 1535659c9bc1SBen Hutchings #define SYSKT_CTRL 0x200 1536659c9bc1SBen Hutchings #define SYSKT_RDFIFO_STAT 0x204 1537659c9bc1SBen Hutchings #define SYSKT_WRFIFO_STAT 0x208 1538659c9bc1SBen Hutchings #define SYSKT_POWER_DATA 0x20c 1539659c9bc1SBen Hutchings #define SYSKT_POWER_330 0xef 1540659c9bc1SBen Hutchings #define SYSKT_POWER_300 0xf8 1541659c9bc1SBen Hutchings #define SYSKT_POWER_184 0xcc 1542659c9bc1SBen Hutchings #define SYSKT_POWER_CMD 0x20d 1543659c9bc1SBen Hutchings #define SYSKT_POWER_START (1 << 7) 1544659c9bc1SBen Hutchings #define SYSKT_POWER_STATUS 0x20e 1545659c9bc1SBen Hutchings #define SYSKT_POWER_STATUS_OK (1 << 0) 1546659c9bc1SBen Hutchings #define SYSKT_BOARD_REV 0x210 1547659c9bc1SBen Hutchings #define SYSKT_CHIP_REV 0x211 1548659c9bc1SBen Hutchings #define SYSKT_CONF_DATA 0x212 1549659c9bc1SBen Hutchings #define SYSKT_CONF_DATA_1V8 (1 << 2) 1550659c9bc1SBen Hutchings #define SYSKT_CONF_DATA_2V5 (1 << 1) 1551659c9bc1SBen Hutchings #define SYSKT_CONF_DATA_3V3 (1 << 0) 1552659c9bc1SBen Hutchings 1553659c9bc1SBen Hutchings static int syskt_probe(struct sdhci_pci_chip *chip) 1554659c9bc1SBen Hutchings { 1555659c9bc1SBen Hutchings if ((chip->pdev->class & 0x0000FF) == PCI_SDHCI_IFVENDOR) { 1556659c9bc1SBen Hutchings chip->pdev->class &= ~0x0000FF; 1557659c9bc1SBen Hutchings chip->pdev->class |= PCI_SDHCI_IFDMA; 1558659c9bc1SBen Hutchings } 1559659c9bc1SBen Hutchings return 0; 1560659c9bc1SBen Hutchings } 1561659c9bc1SBen Hutchings 1562659c9bc1SBen Hutchings static int syskt_probe_slot(struct sdhci_pci_slot *slot) 1563659c9bc1SBen Hutchings { 1564659c9bc1SBen Hutchings int tm, ps; 1565659c9bc1SBen Hutchings 1566659c9bc1SBen Hutchings u8 board_rev = readb(slot->host->ioaddr + SYSKT_BOARD_REV); 1567659c9bc1SBen Hutchings u8 chip_rev = readb(slot->host->ioaddr + SYSKT_CHIP_REV); 1568659c9bc1SBen Hutchings dev_info(&slot->chip->pdev->dev, "SysKonnect CardBus2SDIO, " 1569659c9bc1SBen Hutchings "board rev %d.%d, chip rev %d.%d\n", 1570659c9bc1SBen Hutchings board_rev >> 4, board_rev & 0xf, 1571659c9bc1SBen Hutchings chip_rev >> 4, chip_rev & 0xf); 1572659c9bc1SBen Hutchings if (chip_rev >= 0x20) 1573659c9bc1SBen Hutchings slot->host->quirks |= SDHCI_QUIRK_FORCE_DMA; 1574659c9bc1SBen Hutchings 1575659c9bc1SBen Hutchings writeb(SYSKT_POWER_330, slot->host->ioaddr + SYSKT_POWER_DATA); 1576659c9bc1SBen Hutchings writeb(SYSKT_POWER_START, slot->host->ioaddr + SYSKT_POWER_CMD); 1577659c9bc1SBen Hutchings udelay(50); 1578659c9bc1SBen Hutchings tm = 10; /* Wait max 1 ms */ 1579659c9bc1SBen Hutchings do { 1580659c9bc1SBen Hutchings ps = readw(slot->host->ioaddr + SYSKT_POWER_STATUS); 1581659c9bc1SBen Hutchings if (ps & SYSKT_POWER_STATUS_OK) 1582659c9bc1SBen Hutchings break; 1583659c9bc1SBen Hutchings udelay(100); 1584659c9bc1SBen Hutchings } while (--tm); 1585659c9bc1SBen Hutchings if (!tm) { 1586659c9bc1SBen Hutchings dev_err(&slot->chip->pdev->dev, 1587659c9bc1SBen Hutchings "power regulator never stabilized"); 1588659c9bc1SBen Hutchings writeb(0, slot->host->ioaddr + SYSKT_POWER_CMD); 1589659c9bc1SBen Hutchings return -ENODEV; 1590659c9bc1SBen Hutchings } 1591659c9bc1SBen Hutchings 1592659c9bc1SBen Hutchings return 0; 1593659c9bc1SBen Hutchings } 1594659c9bc1SBen Hutchings 1595659c9bc1SBen Hutchings static const struct sdhci_pci_fixes sdhci_syskt = { 1596659c9bc1SBen Hutchings .quirks = SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER, 1597659c9bc1SBen Hutchings .probe = syskt_probe, 1598659c9bc1SBen Hutchings .probe_slot = syskt_probe_slot, 1599659c9bc1SBen Hutchings }; 1600659c9bc1SBen Hutchings 1601659c9bc1SBen Hutchings static int via_probe(struct sdhci_pci_chip *chip) 1602659c9bc1SBen Hutchings { 1603659c9bc1SBen Hutchings if (chip->pdev->revision == 0x10) 1604659c9bc1SBen Hutchings chip->quirks |= SDHCI_QUIRK_DELAY_AFTER_POWER; 1605659c9bc1SBen Hutchings 1606659c9bc1SBen Hutchings return 0; 1607659c9bc1SBen Hutchings } 1608659c9bc1SBen Hutchings 1609659c9bc1SBen Hutchings static const struct sdhci_pci_fixes sdhci_via = { 1610659c9bc1SBen Hutchings .probe = via_probe, 1611659c9bc1SBen Hutchings }; 1612659c9bc1SBen Hutchings 1613659c9bc1SBen Hutchings static int rtsx_probe_slot(struct sdhci_pci_slot *slot) 1614659c9bc1SBen Hutchings { 1615659c9bc1SBen Hutchings slot->host->mmc->caps2 |= MMC_CAP2_HS200; 1616659c9bc1SBen Hutchings return 0; 1617659c9bc1SBen Hutchings } 1618659c9bc1SBen Hutchings 1619659c9bc1SBen Hutchings static const struct sdhci_pci_fixes sdhci_rtsx = { 1620659c9bc1SBen Hutchings .quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN | 1621659c9bc1SBen Hutchings SDHCI_QUIRK2_BROKEN_64_BIT_DMA | 1622659c9bc1SBen Hutchings SDHCI_QUIRK2_BROKEN_DDR50, 1623659c9bc1SBen Hutchings .probe_slot = rtsx_probe_slot, 1624659c9bc1SBen Hutchings }; 1625659c9bc1SBen Hutchings 1626659c9bc1SBen Hutchings /*AMD chipset generation*/ 1627659c9bc1SBen Hutchings enum amd_chipset_gen { 1628659c9bc1SBen Hutchings AMD_CHIPSET_BEFORE_ML, 1629659c9bc1SBen Hutchings AMD_CHIPSET_CZ, 1630659c9bc1SBen Hutchings AMD_CHIPSET_NL, 1631659c9bc1SBen Hutchings AMD_CHIPSET_UNKNOWN, 1632659c9bc1SBen Hutchings }; 1633659c9bc1SBen Hutchings 1634c31165d7SShyam Sundar S K /* AMD registers */ 1635c31165d7SShyam Sundar S K #define AMD_SD_AUTO_PATTERN 0xB8 1636c31165d7SShyam Sundar S K #define AMD_MSLEEP_DURATION 4 1637c31165d7SShyam Sundar S K #define AMD_SD_MISC_CONTROL 0xD0 1638c31165d7SShyam Sundar S K #define AMD_MAX_TUNE_VALUE 0x0B 1639c31165d7SShyam Sundar S K #define AMD_AUTO_TUNE_SEL 0x10800 1640c31165d7SShyam Sundar S K #define AMD_FIFO_PTR 0x30 1641c31165d7SShyam Sundar S K #define AMD_BIT_MASK 0x1F 1642c31165d7SShyam Sundar S K 1643c31165d7SShyam Sundar S K static void amd_tuning_reset(struct sdhci_host *host) 1644c31165d7SShyam Sundar S K { 1645c31165d7SShyam Sundar S K unsigned int val; 1646c31165d7SShyam Sundar S K 1647c31165d7SShyam Sundar S K val = sdhci_readw(host, SDHCI_HOST_CONTROL2); 1648c31165d7SShyam Sundar S K val |= SDHCI_CTRL_PRESET_VAL_ENABLE | SDHCI_CTRL_EXEC_TUNING; 1649c31165d7SShyam Sundar S K sdhci_writew(host, val, SDHCI_HOST_CONTROL2); 1650c31165d7SShyam Sundar S K 1651c31165d7SShyam Sundar S K val = sdhci_readw(host, SDHCI_HOST_CONTROL2); 1652c31165d7SShyam Sundar S K val &= ~SDHCI_CTRL_EXEC_TUNING; 1653c31165d7SShyam Sundar S K sdhci_writew(host, val, SDHCI_HOST_CONTROL2); 1654c31165d7SShyam Sundar S K } 1655c31165d7SShyam Sundar S K 1656c31165d7SShyam Sundar S K static void amd_config_tuning_phase(struct pci_dev *pdev, u8 phase) 1657c31165d7SShyam Sundar S K { 1658c31165d7SShyam Sundar S K unsigned int val; 1659c31165d7SShyam Sundar S K 1660c31165d7SShyam Sundar S K pci_read_config_dword(pdev, AMD_SD_AUTO_PATTERN, &val); 1661c31165d7SShyam Sundar S K val &= ~AMD_BIT_MASK; 1662c31165d7SShyam Sundar S K val |= (AMD_AUTO_TUNE_SEL | (phase << 1)); 1663c31165d7SShyam Sundar S K pci_write_config_dword(pdev, AMD_SD_AUTO_PATTERN, val); 1664c31165d7SShyam Sundar S K } 1665c31165d7SShyam Sundar S K 1666c31165d7SShyam Sundar S K static void amd_enable_manual_tuning(struct pci_dev *pdev) 1667c31165d7SShyam Sundar S K { 1668c31165d7SShyam Sundar S K unsigned int val; 1669c31165d7SShyam Sundar S K 1670c31165d7SShyam Sundar S K pci_read_config_dword(pdev, AMD_SD_MISC_CONTROL, &val); 1671c31165d7SShyam Sundar S K val |= AMD_FIFO_PTR; 1672c31165d7SShyam Sundar S K pci_write_config_dword(pdev, AMD_SD_MISC_CONTROL, val); 1673c31165d7SShyam Sundar S K } 1674c31165d7SShyam Sundar S K 1675300ad899SDaniel Kurtz static int amd_execute_tuning_hs200(struct sdhci_host *host, u32 opcode) 1676c31165d7SShyam Sundar S K { 1677c31165d7SShyam Sundar S K struct sdhci_pci_slot *slot = sdhci_priv(host); 1678c31165d7SShyam Sundar S K struct pci_dev *pdev = slot->chip->pdev; 1679c31165d7SShyam Sundar S K u8 valid_win = 0; 1680c31165d7SShyam Sundar S K u8 valid_win_max = 0; 1681c31165d7SShyam Sundar S K u8 valid_win_end = 0; 1682c31165d7SShyam Sundar S K u8 ctrl, tune_around; 1683c31165d7SShyam Sundar S K 1684c31165d7SShyam Sundar S K amd_tuning_reset(host); 1685c31165d7SShyam Sundar S K 1686c31165d7SShyam Sundar S K for (tune_around = 0; tune_around < 12; tune_around++) { 1687c31165d7SShyam Sundar S K amd_config_tuning_phase(pdev, tune_around); 1688c31165d7SShyam Sundar S K 1689c31165d7SShyam Sundar S K if (mmc_send_tuning(host->mmc, opcode, NULL)) { 1690c31165d7SShyam Sundar S K valid_win = 0; 1691c31165d7SShyam Sundar S K msleep(AMD_MSLEEP_DURATION); 1692c31165d7SShyam Sundar S K ctrl = SDHCI_RESET_CMD | SDHCI_RESET_DATA; 1693c31165d7SShyam Sundar S K sdhci_writeb(host, ctrl, SDHCI_SOFTWARE_RESET); 1694c31165d7SShyam Sundar S K } else if (++valid_win > valid_win_max) { 1695c31165d7SShyam Sundar S K valid_win_max = valid_win; 1696c31165d7SShyam Sundar S K valid_win_end = tune_around; 1697c31165d7SShyam Sundar S K } 1698c31165d7SShyam Sundar S K } 1699c31165d7SShyam Sundar S K 1700c31165d7SShyam Sundar S K if (!valid_win_max) { 1701c31165d7SShyam Sundar S K dev_err(&pdev->dev, "no tuning point found\n"); 1702c31165d7SShyam Sundar S K return -EIO; 1703c31165d7SShyam Sundar S K } 1704c31165d7SShyam Sundar S K 1705c31165d7SShyam Sundar S K amd_config_tuning_phase(pdev, valid_win_end - valid_win_max / 2); 1706c31165d7SShyam Sundar S K 1707c31165d7SShyam Sundar S K amd_enable_manual_tuning(pdev); 1708c31165d7SShyam Sundar S K 1709c31165d7SShyam Sundar S K host->mmc->retune_period = 0; 1710c31165d7SShyam Sundar S K 1711c31165d7SShyam Sundar S K return 0; 1712c31165d7SShyam Sundar S K } 1713c31165d7SShyam Sundar S K 1714300ad899SDaniel Kurtz static int amd_execute_tuning(struct mmc_host *mmc, u32 opcode) 1715300ad899SDaniel Kurtz { 1716300ad899SDaniel Kurtz struct sdhci_host *host = mmc_priv(mmc); 1717300ad899SDaniel Kurtz 1718300ad899SDaniel Kurtz /* AMD requires custom HS200 tuning */ 1719300ad899SDaniel Kurtz if (host->timing == MMC_TIMING_MMC_HS200) 1720300ad899SDaniel Kurtz return amd_execute_tuning_hs200(host, opcode); 1721300ad899SDaniel Kurtz 1722300ad899SDaniel Kurtz /* Otherwise perform standard SDHCI tuning */ 1723300ad899SDaniel Kurtz return sdhci_execute_tuning(mmc, opcode); 1724300ad899SDaniel Kurtz } 1725300ad899SDaniel Kurtz 1726300ad899SDaniel Kurtz static int amd_probe_slot(struct sdhci_pci_slot *slot) 1727300ad899SDaniel Kurtz { 1728300ad899SDaniel Kurtz struct mmc_host_ops *ops = &slot->host->mmc_host_ops; 1729300ad899SDaniel Kurtz 1730300ad899SDaniel Kurtz ops->execute_tuning = amd_execute_tuning; 1731300ad899SDaniel Kurtz 1732300ad899SDaniel Kurtz return 0; 1733300ad899SDaniel Kurtz } 1734300ad899SDaniel Kurtz 1735659c9bc1SBen Hutchings static int amd_probe(struct sdhci_pci_chip *chip) 1736659c9bc1SBen Hutchings { 1737659c9bc1SBen Hutchings struct pci_dev *smbus_dev; 1738659c9bc1SBen Hutchings enum amd_chipset_gen gen; 1739659c9bc1SBen Hutchings 1740659c9bc1SBen Hutchings smbus_dev = pci_get_device(PCI_VENDOR_ID_AMD, 1741659c9bc1SBen Hutchings PCI_DEVICE_ID_AMD_HUDSON2_SMBUS, NULL); 1742659c9bc1SBen Hutchings if (smbus_dev) { 1743659c9bc1SBen Hutchings gen = AMD_CHIPSET_BEFORE_ML; 1744659c9bc1SBen Hutchings } else { 1745659c9bc1SBen Hutchings smbus_dev = pci_get_device(PCI_VENDOR_ID_AMD, 1746659c9bc1SBen Hutchings PCI_DEVICE_ID_AMD_KERNCZ_SMBUS, NULL); 1747659c9bc1SBen Hutchings if (smbus_dev) { 1748659c9bc1SBen Hutchings if (smbus_dev->revision < 0x51) 1749659c9bc1SBen Hutchings gen = AMD_CHIPSET_CZ; 1750659c9bc1SBen Hutchings else 1751659c9bc1SBen Hutchings gen = AMD_CHIPSET_NL; 1752659c9bc1SBen Hutchings } else { 1753659c9bc1SBen Hutchings gen = AMD_CHIPSET_UNKNOWN; 1754659c9bc1SBen Hutchings } 1755659c9bc1SBen Hutchings } 1756659c9bc1SBen Hutchings 1757c31165d7SShyam Sundar S K if (gen == AMD_CHIPSET_BEFORE_ML || gen == AMD_CHIPSET_CZ) 1758659c9bc1SBen Hutchings chip->quirks2 |= SDHCI_QUIRK2_CLEAR_TRANSFERMODE_REG_BEFORE_CMD; 1759659c9bc1SBen Hutchings 1760659c9bc1SBen Hutchings return 0; 1761659c9bc1SBen Hutchings } 1762659c9bc1SBen Hutchings 17637a869f00SRaul E Rangel static u32 sdhci_read_present_state(struct sdhci_host *host) 17647a869f00SRaul E Rangel { 17657a869f00SRaul E Rangel return sdhci_readl(host, SDHCI_PRESENT_STATE); 17667a869f00SRaul E Rangel } 17677a869f00SRaul E Rangel 176838413ce3Szhengbin static void amd_sdhci_reset(struct sdhci_host *host, u8 mask) 17697a869f00SRaul E Rangel { 17707a869f00SRaul E Rangel struct sdhci_pci_slot *slot = sdhci_priv(host); 17717a869f00SRaul E Rangel struct pci_dev *pdev = slot->chip->pdev; 17727a869f00SRaul E Rangel u32 present_state; 17737a869f00SRaul E Rangel 17747a869f00SRaul E Rangel /* 17757a869f00SRaul E Rangel * SDHC 0x7906 requires a hard reset to clear all internal state. 17767a869f00SRaul E Rangel * Otherwise it can get into a bad state where the DATA lines are always 17777a869f00SRaul E Rangel * read as zeros. 17787a869f00SRaul E Rangel */ 17797a869f00SRaul E Rangel if (pdev->device == 0x7906 && (mask & SDHCI_RESET_ALL)) { 17807a869f00SRaul E Rangel pci_clear_master(pdev); 17817a869f00SRaul E Rangel 17827a869f00SRaul E Rangel pci_save_state(pdev); 17837a869f00SRaul E Rangel 17847a869f00SRaul E Rangel pci_set_power_state(pdev, PCI_D3cold); 17857a869f00SRaul E Rangel pr_debug("%s: power_state=%u\n", mmc_hostname(host->mmc), 17867a869f00SRaul E Rangel pdev->current_state); 17877a869f00SRaul E Rangel pci_set_power_state(pdev, PCI_D0); 17887a869f00SRaul E Rangel 17897a869f00SRaul E Rangel pci_restore_state(pdev); 17907a869f00SRaul E Rangel 17917a869f00SRaul E Rangel /* 17927a869f00SRaul E Rangel * SDHCI_RESET_ALL says the card detect logic should not be 17937a869f00SRaul E Rangel * reset, but since we need to reset the entire controller 17947a869f00SRaul E Rangel * we should wait until the card detect logic has stabilized. 17957a869f00SRaul E Rangel * 17967a869f00SRaul E Rangel * This normally takes about 40ms. 17977a869f00SRaul E Rangel */ 17987a869f00SRaul E Rangel readx_poll_timeout( 17997a869f00SRaul E Rangel sdhci_read_present_state, 18007a869f00SRaul E Rangel host, 18017a869f00SRaul E Rangel present_state, 18027a869f00SRaul E Rangel present_state & SDHCI_CD_STABLE, 18037a869f00SRaul E Rangel 10000, 18047a869f00SRaul E Rangel 100000 18057a869f00SRaul E Rangel ); 18067a869f00SRaul E Rangel } 18077a869f00SRaul E Rangel 18087a869f00SRaul E Rangel return sdhci_reset(host, mask); 18097a869f00SRaul E Rangel } 18107a869f00SRaul E Rangel 1811c31165d7SShyam Sundar S K static const struct sdhci_ops amd_sdhci_pci_ops = { 1812c31165d7SShyam Sundar S K .set_clock = sdhci_set_clock, 1813c31165d7SShyam Sundar S K .enable_dma = sdhci_pci_enable_dma, 1814adc16398SMichał Mirosław .set_bus_width = sdhci_set_bus_width, 18157a869f00SRaul E Rangel .reset = amd_sdhci_reset, 1816c31165d7SShyam Sundar S K .set_uhs_signaling = sdhci_set_uhs_signaling, 1817c31165d7SShyam Sundar S K }; 1818c31165d7SShyam Sundar S K 1819659c9bc1SBen Hutchings static const struct sdhci_pci_fixes sdhci_amd = { 1820659c9bc1SBen Hutchings .probe = amd_probe, 1821c31165d7SShyam Sundar S K .ops = &amd_sdhci_pci_ops, 1822300ad899SDaniel Kurtz .probe_slot = amd_probe_slot, 1823659c9bc1SBen Hutchings }; 1824659c9bc1SBen Hutchings 1825659c9bc1SBen Hutchings static const struct pci_device_id pci_ids[] = { 1826c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(RICOH, R5C822, ricoh), 1827c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(RICOH, R5C843, ricoh_mmc), 1828c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(RICOH, R5CE822, ricoh_mmc), 1829c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(RICOH, R5CE823, ricoh_mmc), 1830c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(ENE, CB712_SD, ene_712), 1831c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(ENE, CB712_SD_2, ene_712), 1832c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(ENE, CB714_SD, ene_714), 1833c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(ENE, CB714_SD_2, ene_714), 1834c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(MARVELL, 88ALP01_SD, cafe), 1835c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(JMICRON, JMB38X_SD, jmicron), 1836c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(JMICRON, JMB38X_MMC, jmicron), 1837c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(JMICRON, JMB388_SD, jmicron), 1838c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(JMICRON, JMB388_ESD, jmicron), 1839c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(SYSKONNECT, 8000, syskt), 1840c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(VIA, 95D0, via), 1841c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(REALTEK, 5250, rtsx), 1842c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, QRK_SD, intel_qrk), 1843c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, MRST_SD0, intel_mrst_hc0), 1844c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, MRST_SD1, intel_mrst_hc1_hc2), 1845c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, MRST_SD2, intel_mrst_hc1_hc2), 1846c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, MFD_SD, intel_mfd_sd), 1847c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, MFD_SDIO1, intel_mfd_sdio), 1848c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, MFD_SDIO2, intel_mfd_sdio), 1849c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, MFD_EMMC0, intel_mfd_emmc), 1850c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, MFD_EMMC1, intel_mfd_emmc), 1851c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, PCH_SDIO0, intel_pch_sdio), 1852c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, PCH_SDIO1, intel_pch_sdio), 1853c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, BYT_EMMC, intel_byt_emmc), 1854c949c907SMatthias Kraemer SDHCI_PCI_SUBDEVICE(INTEL, BYT_SDIO, NI, 7884, ni_byt_sdio), 1855c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, BYT_SDIO, intel_byt_sdio), 1856c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, BYT_SD, intel_byt_sd), 1857c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, BYT_EMMC2, intel_byt_emmc), 1858c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, BSW_EMMC, intel_byt_emmc), 1859c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, BSW_SDIO, intel_byt_sdio), 1860c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, BSW_SD, intel_byt_sd), 1861c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, CLV_SDIO0, intel_mfd_sd), 1862c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, CLV_SDIO1, intel_mfd_sdio), 1863c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, CLV_SDIO2, intel_mfd_sdio), 1864c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, CLV_EMMC0, intel_mfd_emmc), 1865c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, CLV_EMMC1, intel_mfd_emmc), 1866c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, MRFLD_MMC, intel_mrfld_mmc), 1867c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, SPT_EMMC, intel_byt_emmc), 1868c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, SPT_SDIO, intel_byt_sdio), 1869c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, SPT_SD, intel_byt_sd), 1870c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, DNV_EMMC, intel_byt_emmc), 1871cdaba732SAdrian Hunter SDHCI_PCI_DEVICE(INTEL, CDF_EMMC, intel_glk_emmc), 1872c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, BXT_EMMC, intel_byt_emmc), 1873c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, BXT_SDIO, intel_byt_sdio), 1874c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, BXT_SD, intel_byt_sd), 1875c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, BXTM_EMMC, intel_byt_emmc), 1876c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, BXTM_SDIO, intel_byt_sdio), 1877c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, BXTM_SD, intel_byt_sd), 1878c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, APL_EMMC, intel_byt_emmc), 1879c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, APL_SDIO, intel_byt_sdio), 1880c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, APL_SD, intel_byt_sd), 1881bc55dcd8SAdrian Hunter SDHCI_PCI_DEVICE(INTEL, GLK_EMMC, intel_glk_emmc), 1882c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, GLK_SDIO, intel_byt_sdio), 1883c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(INTEL, GLK_SD, intel_byt_sd), 1884bc55dcd8SAdrian Hunter SDHCI_PCI_DEVICE(INTEL, CNP_EMMC, intel_glk_emmc), 1885bc55dcd8SAdrian Hunter SDHCI_PCI_DEVICE(INTEL, CNP_SD, intel_byt_sd), 1886bc55dcd8SAdrian Hunter SDHCI_PCI_DEVICE(INTEL, CNPH_SD, intel_byt_sd), 18875637ffadSAdrian Hunter SDHCI_PCI_DEVICE(INTEL, ICP_EMMC, intel_glk_emmc), 18885637ffadSAdrian Hunter SDHCI_PCI_DEVICE(INTEL, ICP_SD, intel_byt_sd), 1889cb3a7d4aSAdrian Hunter SDHCI_PCI_DEVICE(INTEL, EHL_EMMC, intel_glk_emmc), 1890cb3a7d4aSAdrian Hunter SDHCI_PCI_DEVICE(INTEL, EHL_SD, intel_byt_sd), 1891765c5967SAdrian Hunter SDHCI_PCI_DEVICE(INTEL, CML_EMMC, intel_glk_emmc), 1892765c5967SAdrian Hunter SDHCI_PCI_DEVICE(INTEL, CML_SD, intel_byt_sd), 18938f05eee6SAdrian Hunter SDHCI_PCI_DEVICE(INTEL, CMLH_SD, intel_byt_sd), 1894315e3bd7SAdrian Hunter SDHCI_PCI_DEVICE(INTEL, JSL_EMMC, intel_glk_emmc), 1895315e3bd7SAdrian Hunter SDHCI_PCI_DEVICE(INTEL, JSL_SD, intel_byt_sd), 1896c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(O2, 8120, o2), 1897c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(O2, 8220, o2), 1898c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(O2, 8221, o2), 1899c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(O2, 8320, o2), 1900c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(O2, 8321, o2), 1901c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(O2, FUJIN2, o2), 1902c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(O2, SDS0, o2), 1903c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(O2, SDS1, o2), 1904c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(O2, SEABIRD0, o2), 1905c949c907SMatthias Kraemer SDHCI_PCI_DEVICE(O2, SEABIRD1, o2), 1906d72d72cdSAtul Garg SDHCI_PCI_DEVICE(ARASAN, PHY_EMMC, arasan), 1907152f8204SPrabu Thangamuthu SDHCI_PCI_DEVICE(SYNOPSYS, DWC_MSHC, snps), 1908e51df6ceSBen Chuang SDHCI_PCI_DEVICE(GLI, 9750, gl9750), 1909e51df6ceSBen Chuang SDHCI_PCI_DEVICE(GLI, 9755, gl9755), 19101ae1d2d6SBen Chuang SDHCI_PCI_DEVICE(GLI, 9763E, gl9763e), 1911c949c907SMatthias Kraemer SDHCI_PCI_DEVICE_CLASS(AMD, SYSTEM_SDHCI, PCI_CLASS_MASK, amd), 1912c949c907SMatthias Kraemer /* Generic SD host controller */ 1913c949c907SMatthias Kraemer {PCI_DEVICE_CLASS(SYSTEM_SDHCI, PCI_CLASS_MASK)}, 1914659c9bc1SBen Hutchings { /* end: all zeroes */ }, 1915659c9bc1SBen Hutchings }; 1916659c9bc1SBen Hutchings 1917659c9bc1SBen Hutchings MODULE_DEVICE_TABLE(pci, pci_ids); 1918659c9bc1SBen Hutchings 1919659c9bc1SBen Hutchings /*****************************************************************************\ 1920659c9bc1SBen Hutchings * * 1921659c9bc1SBen Hutchings * SDHCI core callbacks * 1922659c9bc1SBen Hutchings * * 1923659c9bc1SBen Hutchings \*****************************************************************************/ 1924659c9bc1SBen Hutchings 1925d72d72cdSAtul Garg int sdhci_pci_enable_dma(struct sdhci_host *host) 1926659c9bc1SBen Hutchings { 1927659c9bc1SBen Hutchings struct sdhci_pci_slot *slot; 1928659c9bc1SBen Hutchings struct pci_dev *pdev; 1929659c9bc1SBen Hutchings 1930659c9bc1SBen Hutchings slot = sdhci_priv(host); 1931659c9bc1SBen Hutchings pdev = slot->chip->pdev; 1932659c9bc1SBen Hutchings 1933659c9bc1SBen Hutchings if (((pdev->class & 0xFFFF00) == (PCI_CLASS_SYSTEM_SDHCI << 8)) && 1934659c9bc1SBen Hutchings ((pdev->class & 0x0000FF) != PCI_SDHCI_IFDMA) && 1935659c9bc1SBen Hutchings (host->flags & SDHCI_USE_SDMA)) { 1936659c9bc1SBen Hutchings dev_warn(&pdev->dev, "Will use DMA mode even though HW " 1937659c9bc1SBen Hutchings "doesn't fully claim to support it.\n"); 1938659c9bc1SBen Hutchings } 1939659c9bc1SBen Hutchings 1940659c9bc1SBen Hutchings pci_set_master(pdev); 1941659c9bc1SBen Hutchings 1942659c9bc1SBen Hutchings return 0; 1943659c9bc1SBen Hutchings } 1944659c9bc1SBen Hutchings 1945659c9bc1SBen Hutchings static void sdhci_pci_gpio_hw_reset(struct sdhci_host *host) 1946659c9bc1SBen Hutchings { 1947659c9bc1SBen Hutchings struct sdhci_pci_slot *slot = sdhci_priv(host); 1948659c9bc1SBen Hutchings int rst_n_gpio = slot->rst_n_gpio; 1949659c9bc1SBen Hutchings 1950659c9bc1SBen Hutchings if (!gpio_is_valid(rst_n_gpio)) 1951659c9bc1SBen Hutchings return; 1952659c9bc1SBen Hutchings gpio_set_value_cansleep(rst_n_gpio, 0); 1953659c9bc1SBen Hutchings /* For eMMC, minimum is 1us but give it 10us for good measure */ 1954659c9bc1SBen Hutchings udelay(10); 1955659c9bc1SBen Hutchings gpio_set_value_cansleep(rst_n_gpio, 1); 1956659c9bc1SBen Hutchings /* For eMMC, minimum is 200us but give it 300us for good measure */ 1957659c9bc1SBen Hutchings usleep_range(300, 1000); 1958659c9bc1SBen Hutchings } 1959659c9bc1SBen Hutchings 1960659c9bc1SBen Hutchings static void sdhci_pci_hw_reset(struct sdhci_host *host) 1961659c9bc1SBen Hutchings { 1962659c9bc1SBen Hutchings struct sdhci_pci_slot *slot = sdhci_priv(host); 1963659c9bc1SBen Hutchings 1964659c9bc1SBen Hutchings if (slot->hw_reset) 1965659c9bc1SBen Hutchings slot->hw_reset(host); 1966659c9bc1SBen Hutchings } 1967659c9bc1SBen Hutchings 1968659c9bc1SBen Hutchings static const struct sdhci_ops sdhci_pci_ops = { 1969659c9bc1SBen Hutchings .set_clock = sdhci_set_clock, 1970659c9bc1SBen Hutchings .enable_dma = sdhci_pci_enable_dma, 1971adc16398SMichał Mirosław .set_bus_width = sdhci_set_bus_width, 1972659c9bc1SBen Hutchings .reset = sdhci_reset, 1973659c9bc1SBen Hutchings .set_uhs_signaling = sdhci_set_uhs_signaling, 1974659c9bc1SBen Hutchings .hw_reset = sdhci_pci_hw_reset, 1975659c9bc1SBen Hutchings }; 1976659c9bc1SBen Hutchings 1977659c9bc1SBen Hutchings /*****************************************************************************\ 1978659c9bc1SBen Hutchings * * 1979659c9bc1SBen Hutchings * Suspend/resume * 1980659c9bc1SBen Hutchings * * 1981659c9bc1SBen Hutchings \*****************************************************************************/ 1982659c9bc1SBen Hutchings 1983f9900f15SUlf Hansson #ifdef CONFIG_PM_SLEEP 1984659c9bc1SBen Hutchings static int sdhci_pci_suspend(struct device *dev) 1985659c9bc1SBen Hutchings { 198690b51e3cSChuhong Yuan struct sdhci_pci_chip *chip = dev_get_drvdata(dev); 1987659c9bc1SBen Hutchings 1988659c9bc1SBen Hutchings if (!chip) 1989659c9bc1SBen Hutchings return 0; 1990659c9bc1SBen Hutchings 199130cf2803SAdrian Hunter if (chip->fixes && chip->fixes->suspend) 199230cf2803SAdrian Hunter return chip->fixes->suspend(chip); 1993659c9bc1SBen Hutchings 199430cf2803SAdrian Hunter return sdhci_pci_suspend_host(chip); 1995659c9bc1SBen Hutchings } 1996659c9bc1SBen Hutchings 1997659c9bc1SBen Hutchings static int sdhci_pci_resume(struct device *dev) 1998659c9bc1SBen Hutchings { 199990b51e3cSChuhong Yuan struct sdhci_pci_chip *chip = dev_get_drvdata(dev); 2000659c9bc1SBen Hutchings 2001659c9bc1SBen Hutchings if (!chip) 2002659c9bc1SBen Hutchings return 0; 2003659c9bc1SBen Hutchings 200430cf2803SAdrian Hunter if (chip->fixes && chip->fixes->resume) 200530cf2803SAdrian Hunter return chip->fixes->resume(chip); 2006659c9bc1SBen Hutchings 200730cf2803SAdrian Hunter return sdhci_pci_resume_host(chip); 2008659c9bc1SBen Hutchings } 2009f9900f15SUlf Hansson #endif 2010659c9bc1SBen Hutchings 2011f9900f15SUlf Hansson #ifdef CONFIG_PM 2012659c9bc1SBen Hutchings static int sdhci_pci_runtime_suspend(struct device *dev) 2013659c9bc1SBen Hutchings { 201490b51e3cSChuhong Yuan struct sdhci_pci_chip *chip = dev_get_drvdata(dev); 2015659c9bc1SBen Hutchings 2016659c9bc1SBen Hutchings if (!chip) 2017659c9bc1SBen Hutchings return 0; 2018659c9bc1SBen Hutchings 2019966d696aSAdrian Hunter if (chip->fixes && chip->fixes->runtime_suspend) 2020966d696aSAdrian Hunter return chip->fixes->runtime_suspend(chip); 2021659c9bc1SBen Hutchings 2022966d696aSAdrian Hunter return sdhci_pci_runtime_suspend_host(chip); 2023659c9bc1SBen Hutchings } 2024659c9bc1SBen Hutchings 2025659c9bc1SBen Hutchings static int sdhci_pci_runtime_resume(struct device *dev) 2026659c9bc1SBen Hutchings { 202790b51e3cSChuhong Yuan struct sdhci_pci_chip *chip = dev_get_drvdata(dev); 2028659c9bc1SBen Hutchings 2029659c9bc1SBen Hutchings if (!chip) 2030659c9bc1SBen Hutchings return 0; 2031659c9bc1SBen Hutchings 2032966d696aSAdrian Hunter if (chip->fixes && chip->fixes->runtime_resume) 2033966d696aSAdrian Hunter return chip->fixes->runtime_resume(chip); 2034659c9bc1SBen Hutchings 2035966d696aSAdrian Hunter return sdhci_pci_runtime_resume_host(chip); 2036659c9bc1SBen Hutchings } 2037f9900f15SUlf Hansson #endif 2038659c9bc1SBen Hutchings 2039659c9bc1SBen Hutchings static const struct dev_pm_ops sdhci_pci_pm_ops = { 2040f9900f15SUlf Hansson SET_SYSTEM_SLEEP_PM_OPS(sdhci_pci_suspend, sdhci_pci_resume) 2041659c9bc1SBen Hutchings SET_RUNTIME_PM_OPS(sdhci_pci_runtime_suspend, 2042659c9bc1SBen Hutchings sdhci_pci_runtime_resume, NULL) 2043659c9bc1SBen Hutchings }; 2044659c9bc1SBen Hutchings 2045659c9bc1SBen Hutchings /*****************************************************************************\ 2046659c9bc1SBen Hutchings * * 2047659c9bc1SBen Hutchings * Device probing/removal * 2048659c9bc1SBen Hutchings * * 2049659c9bc1SBen Hutchings \*****************************************************************************/ 2050659c9bc1SBen Hutchings 2051659c9bc1SBen Hutchings static struct sdhci_pci_slot *sdhci_pci_probe_slot( 2052659c9bc1SBen Hutchings struct pci_dev *pdev, struct sdhci_pci_chip *chip, int first_bar, 2053659c9bc1SBen Hutchings int slotno) 2054659c9bc1SBen Hutchings { 2055659c9bc1SBen Hutchings struct sdhci_pci_slot *slot; 2056659c9bc1SBen Hutchings struct sdhci_host *host; 2057659c9bc1SBen Hutchings int ret, bar = first_bar + slotno; 2058ac9f67b5SAdrian Hunter size_t priv_size = chip->fixes ? chip->fixes->priv_size : 0; 2059659c9bc1SBen Hutchings 2060659c9bc1SBen Hutchings if (!(pci_resource_flags(pdev, bar) & IORESOURCE_MEM)) { 2061659c9bc1SBen Hutchings dev_err(&pdev->dev, "BAR %d is not iomem. Aborting.\n", bar); 2062659c9bc1SBen Hutchings return ERR_PTR(-ENODEV); 2063659c9bc1SBen Hutchings } 2064659c9bc1SBen Hutchings 2065659c9bc1SBen Hutchings if (pci_resource_len(pdev, bar) < 0x100) { 2066659c9bc1SBen Hutchings dev_err(&pdev->dev, "Invalid iomem size. You may " 2067659c9bc1SBen Hutchings "experience problems.\n"); 2068659c9bc1SBen Hutchings } 2069659c9bc1SBen Hutchings 2070659c9bc1SBen Hutchings if ((pdev->class & 0x0000FF) == PCI_SDHCI_IFVENDOR) { 2071659c9bc1SBen Hutchings dev_err(&pdev->dev, "Vendor specific interface. Aborting.\n"); 2072659c9bc1SBen Hutchings return ERR_PTR(-ENODEV); 2073659c9bc1SBen Hutchings } 2074659c9bc1SBen Hutchings 2075659c9bc1SBen Hutchings if ((pdev->class & 0x0000FF) > PCI_SDHCI_IFVENDOR) { 2076659c9bc1SBen Hutchings dev_err(&pdev->dev, "Unknown interface. Aborting.\n"); 2077659c9bc1SBen Hutchings return ERR_PTR(-ENODEV); 2078659c9bc1SBen Hutchings } 2079659c9bc1SBen Hutchings 2080ac9f67b5SAdrian Hunter host = sdhci_alloc_host(&pdev->dev, sizeof(*slot) + priv_size); 2081659c9bc1SBen Hutchings if (IS_ERR(host)) { 2082659c9bc1SBen Hutchings dev_err(&pdev->dev, "cannot allocate host\n"); 2083659c9bc1SBen Hutchings return ERR_CAST(host); 2084659c9bc1SBen Hutchings } 2085659c9bc1SBen Hutchings 2086659c9bc1SBen Hutchings slot = sdhci_priv(host); 2087659c9bc1SBen Hutchings 2088659c9bc1SBen Hutchings slot->chip = chip; 2089659c9bc1SBen Hutchings slot->host = host; 2090659c9bc1SBen Hutchings slot->rst_n_gpio = -EINVAL; 2091659c9bc1SBen Hutchings slot->cd_gpio = -EINVAL; 2092659c9bc1SBen Hutchings slot->cd_idx = -1; 2093659c9bc1SBen Hutchings 2094659c9bc1SBen Hutchings /* Retrieve platform data if there is any */ 2095659c9bc1SBen Hutchings if (*sdhci_pci_get_data) 2096659c9bc1SBen Hutchings slot->data = sdhci_pci_get_data(pdev, slotno); 2097659c9bc1SBen Hutchings 2098659c9bc1SBen Hutchings if (slot->data) { 2099659c9bc1SBen Hutchings if (slot->data->setup) { 2100659c9bc1SBen Hutchings ret = slot->data->setup(slot->data); 2101659c9bc1SBen Hutchings if (ret) { 2102659c9bc1SBen Hutchings dev_err(&pdev->dev, "platform setup failed\n"); 2103659c9bc1SBen Hutchings goto free; 2104659c9bc1SBen Hutchings } 2105659c9bc1SBen Hutchings } 2106659c9bc1SBen Hutchings slot->rst_n_gpio = slot->data->rst_n_gpio; 2107659c9bc1SBen Hutchings slot->cd_gpio = slot->data->cd_gpio; 2108659c9bc1SBen Hutchings } 2109659c9bc1SBen Hutchings 2110659c9bc1SBen Hutchings host->hw_name = "PCI"; 21116bc09063SAdrian Hunter host->ops = chip->fixes && chip->fixes->ops ? 21126bc09063SAdrian Hunter chip->fixes->ops : 21136bc09063SAdrian Hunter &sdhci_pci_ops; 2114659c9bc1SBen Hutchings host->quirks = chip->quirks; 2115659c9bc1SBen Hutchings host->quirks2 = chip->quirks2; 2116659c9bc1SBen Hutchings 2117659c9bc1SBen Hutchings host->irq = pdev->irq; 2118659c9bc1SBen Hutchings 2119c10bc372SAndy Shevchenko ret = pcim_iomap_regions(pdev, BIT(bar), mmc_hostname(host->mmc)); 2120659c9bc1SBen Hutchings if (ret) { 2121659c9bc1SBen Hutchings dev_err(&pdev->dev, "cannot request region\n"); 2122659c9bc1SBen Hutchings goto cleanup; 2123659c9bc1SBen Hutchings } 2124659c9bc1SBen Hutchings 2125c10bc372SAndy Shevchenko host->ioaddr = pcim_iomap_table(pdev)[bar]; 2126659c9bc1SBen Hutchings 2127659c9bc1SBen Hutchings if (chip->fixes && chip->fixes->probe_slot) { 2128659c9bc1SBen Hutchings ret = chip->fixes->probe_slot(slot); 2129659c9bc1SBen Hutchings if (ret) 2130c10bc372SAndy Shevchenko goto cleanup; 2131659c9bc1SBen Hutchings } 2132659c9bc1SBen Hutchings 2133659c9bc1SBen Hutchings if (gpio_is_valid(slot->rst_n_gpio)) { 2134c10bc372SAndy Shevchenko if (!devm_gpio_request(&pdev->dev, slot->rst_n_gpio, "eMMC_reset")) { 2135659c9bc1SBen Hutchings gpio_direction_output(slot->rst_n_gpio, 1); 2136659c9bc1SBen Hutchings slot->host->mmc->caps |= MMC_CAP_HW_RESET; 2137659c9bc1SBen Hutchings slot->hw_reset = sdhci_pci_gpio_hw_reset; 2138659c9bc1SBen Hutchings } else { 2139659c9bc1SBen Hutchings dev_warn(&pdev->dev, "failed to request rst_n_gpio\n"); 2140659c9bc1SBen Hutchings slot->rst_n_gpio = -EINVAL; 2141659c9bc1SBen Hutchings } 2142659c9bc1SBen Hutchings } 2143659c9bc1SBen Hutchings 2144e92cc35dSAdrian Hunter host->mmc->pm_caps = MMC_PM_KEEP_POWER; 2145659c9bc1SBen Hutchings host->mmc->slotno = slotno; 2146659c9bc1SBen Hutchings host->mmc->caps2 |= MMC_CAP2_NO_PRESCAN_POWERUP; 2147659c9bc1SBen Hutchings 2148e92cc35dSAdrian Hunter if (device_can_wakeup(&pdev->dev)) 2149e92cc35dSAdrian Hunter host->mmc->pm_caps |= MMC_PM_WAKE_SDIO_IRQ; 2150e92cc35dSAdrian Hunter 2151d56ee1ffSAdrian Hunter if (host->mmc->caps & MMC_CAP_CD_WAKE) 2152d56ee1ffSAdrian Hunter device_init_wakeup(&pdev->dev, true); 2153d56ee1ffSAdrian Hunter 21548f743d03SDavid E. Box if (slot->cd_idx >= 0) { 2155cdcefe6bSRajat Jain ret = mmc_gpiod_request_cd(host->mmc, "cd", slot->cd_idx, 2156d0052ad9SMichał Mirosław slot->cd_override_level, 0); 2157cdcefe6bSRajat Jain if (ret && ret != -EPROBE_DEFER) 2158cdcefe6bSRajat Jain ret = mmc_gpiod_request_cd(host->mmc, NULL, 2159cdcefe6bSRajat Jain slot->cd_idx, 2160cdcefe6bSRajat Jain slot->cd_override_level, 2161d0052ad9SMichał Mirosław 0); 21628f743d03SDavid E. Box if (ret == -EPROBE_DEFER) 21638f743d03SDavid E. Box goto remove; 21648f743d03SDavid E. Box 21658f743d03SDavid E. Box if (ret) { 2166659c9bc1SBen Hutchings dev_warn(&pdev->dev, "failed to setup card detect gpio\n"); 2167659c9bc1SBen Hutchings slot->cd_idx = -1; 2168659c9bc1SBen Hutchings } 21698f743d03SDavid E. Box } 2170659c9bc1SBen Hutchings 217161c951deSAdrian Hunter if (chip->fixes && chip->fixes->add_host) 217261c951deSAdrian Hunter ret = chip->fixes->add_host(slot); 217361c951deSAdrian Hunter else 2174659c9bc1SBen Hutchings ret = sdhci_add_host(host); 2175659c9bc1SBen Hutchings if (ret) 2176659c9bc1SBen Hutchings goto remove; 2177659c9bc1SBen Hutchings 2178659c9bc1SBen Hutchings sdhci_pci_add_own_cd(slot); 2179659c9bc1SBen Hutchings 2180659c9bc1SBen Hutchings /* 2181659c9bc1SBen Hutchings * Check if the chip needs a separate GPIO for card detect to wake up 2182659c9bc1SBen Hutchings * from runtime suspend. If it is not there, don't allow runtime PM. 2183659c9bc1SBen Hutchings * Note sdhci_pci_add_own_cd() sets slot->cd_gpio to -EINVAL on failure. 2184659c9bc1SBen Hutchings */ 2185659c9bc1SBen Hutchings if (chip->fixes && chip->fixes->own_cd_for_runtime_pm && 2186659c9bc1SBen Hutchings !gpio_is_valid(slot->cd_gpio) && slot->cd_idx < 0) 2187659c9bc1SBen Hutchings chip->allow_runtime_pm = false; 2188659c9bc1SBen Hutchings 2189659c9bc1SBen Hutchings return slot; 2190659c9bc1SBen Hutchings 2191659c9bc1SBen Hutchings remove: 2192659c9bc1SBen Hutchings if (chip->fixes && chip->fixes->remove_slot) 2193659c9bc1SBen Hutchings chip->fixes->remove_slot(slot, 0); 2194659c9bc1SBen Hutchings 2195659c9bc1SBen Hutchings cleanup: 2196659c9bc1SBen Hutchings if (slot->data && slot->data->cleanup) 2197659c9bc1SBen Hutchings slot->data->cleanup(slot->data); 2198659c9bc1SBen Hutchings 2199659c9bc1SBen Hutchings free: 2200659c9bc1SBen Hutchings sdhci_free_host(host); 2201659c9bc1SBen Hutchings 2202659c9bc1SBen Hutchings return ERR_PTR(ret); 2203659c9bc1SBen Hutchings } 2204659c9bc1SBen Hutchings 2205659c9bc1SBen Hutchings static void sdhci_pci_remove_slot(struct sdhci_pci_slot *slot) 2206659c9bc1SBen Hutchings { 2207659c9bc1SBen Hutchings int dead; 2208659c9bc1SBen Hutchings u32 scratch; 2209659c9bc1SBen Hutchings 2210659c9bc1SBen Hutchings sdhci_pci_remove_own_cd(slot); 2211659c9bc1SBen Hutchings 2212659c9bc1SBen Hutchings dead = 0; 2213659c9bc1SBen Hutchings scratch = readl(slot->host->ioaddr + SDHCI_INT_STATUS); 2214659c9bc1SBen Hutchings if (scratch == (u32)-1) 2215659c9bc1SBen Hutchings dead = 1; 2216659c9bc1SBen Hutchings 2217659c9bc1SBen Hutchings sdhci_remove_host(slot->host, dead); 2218659c9bc1SBen Hutchings 2219659c9bc1SBen Hutchings if (slot->chip->fixes && slot->chip->fixes->remove_slot) 2220659c9bc1SBen Hutchings slot->chip->fixes->remove_slot(slot, dead); 2221659c9bc1SBen Hutchings 2222659c9bc1SBen Hutchings if (slot->data && slot->data->cleanup) 2223659c9bc1SBen Hutchings slot->data->cleanup(slot->data); 2224659c9bc1SBen Hutchings 2225659c9bc1SBen Hutchings sdhci_free_host(slot->host); 2226659c9bc1SBen Hutchings } 2227659c9bc1SBen Hutchings 2228659c9bc1SBen Hutchings static void sdhci_pci_runtime_pm_allow(struct device *dev) 2229659c9bc1SBen Hutchings { 223000884b61SAdrian Hunter pm_suspend_ignore_children(dev, 1); 2231659c9bc1SBen Hutchings pm_runtime_set_autosuspend_delay(dev, 50); 2232659c9bc1SBen Hutchings pm_runtime_use_autosuspend(dev); 223300884b61SAdrian Hunter pm_runtime_allow(dev); 223400884b61SAdrian Hunter /* Stay active until mmc core scans for a card */ 223500884b61SAdrian Hunter pm_runtime_put_noidle(dev); 2236659c9bc1SBen Hutchings } 2237659c9bc1SBen Hutchings 2238659c9bc1SBen Hutchings static void sdhci_pci_runtime_pm_forbid(struct device *dev) 2239659c9bc1SBen Hutchings { 2240659c9bc1SBen Hutchings pm_runtime_forbid(dev); 2241659c9bc1SBen Hutchings pm_runtime_get_noresume(dev); 2242659c9bc1SBen Hutchings } 2243659c9bc1SBen Hutchings 2244659c9bc1SBen Hutchings static int sdhci_pci_probe(struct pci_dev *pdev, 2245659c9bc1SBen Hutchings const struct pci_device_id *ent) 2246659c9bc1SBen Hutchings { 2247659c9bc1SBen Hutchings struct sdhci_pci_chip *chip; 2248659c9bc1SBen Hutchings struct sdhci_pci_slot *slot; 2249659c9bc1SBen Hutchings 2250659c9bc1SBen Hutchings u8 slots, first_bar; 2251659c9bc1SBen Hutchings int ret, i; 2252659c9bc1SBen Hutchings 2253659c9bc1SBen Hutchings BUG_ON(pdev == NULL); 2254659c9bc1SBen Hutchings BUG_ON(ent == NULL); 2255659c9bc1SBen Hutchings 2256659c9bc1SBen Hutchings dev_info(&pdev->dev, "SDHCI controller found [%04x:%04x] (rev %x)\n", 2257659c9bc1SBen Hutchings (int)pdev->vendor, (int)pdev->device, (int)pdev->revision); 2258659c9bc1SBen Hutchings 2259659c9bc1SBen Hutchings ret = pci_read_config_byte(pdev, PCI_SLOT_INFO, &slots); 2260659c9bc1SBen Hutchings if (ret) 2261659c9bc1SBen Hutchings return ret; 2262659c9bc1SBen Hutchings 2263659c9bc1SBen Hutchings slots = PCI_SLOT_INFO_SLOTS(slots) + 1; 2264659c9bc1SBen Hutchings dev_dbg(&pdev->dev, "found %d slot(s)\n", slots); 2265659c9bc1SBen Hutchings 2266659c9bc1SBen Hutchings BUG_ON(slots > MAX_SLOTS); 2267659c9bc1SBen Hutchings 2268659c9bc1SBen Hutchings ret = pci_read_config_byte(pdev, PCI_SLOT_INFO, &first_bar); 2269659c9bc1SBen Hutchings if (ret) 2270659c9bc1SBen Hutchings return ret; 2271659c9bc1SBen Hutchings 2272659c9bc1SBen Hutchings first_bar &= PCI_SLOT_INFO_FIRST_BAR_MASK; 2273659c9bc1SBen Hutchings 2274659c9bc1SBen Hutchings if (first_bar > 5) { 2275659c9bc1SBen Hutchings dev_err(&pdev->dev, "Invalid first BAR. Aborting.\n"); 2276659c9bc1SBen Hutchings return -ENODEV; 2277659c9bc1SBen Hutchings } 2278659c9bc1SBen Hutchings 227952ac7acfSAndy Shevchenko ret = pcim_enable_device(pdev); 2280659c9bc1SBen Hutchings if (ret) 2281659c9bc1SBen Hutchings return ret; 2282659c9bc1SBen Hutchings 228352ac7acfSAndy Shevchenko chip = devm_kzalloc(&pdev->dev, sizeof(*chip), GFP_KERNEL); 228452ac7acfSAndy Shevchenko if (!chip) 228552ac7acfSAndy Shevchenko return -ENOMEM; 2286659c9bc1SBen Hutchings 2287659c9bc1SBen Hutchings chip->pdev = pdev; 2288659c9bc1SBen Hutchings chip->fixes = (const struct sdhci_pci_fixes *)ent->driver_data; 2289659c9bc1SBen Hutchings if (chip->fixes) { 2290659c9bc1SBen Hutchings chip->quirks = chip->fixes->quirks; 2291659c9bc1SBen Hutchings chip->quirks2 = chip->fixes->quirks2; 2292659c9bc1SBen Hutchings chip->allow_runtime_pm = chip->fixes->allow_runtime_pm; 2293659c9bc1SBen Hutchings } 2294659c9bc1SBen Hutchings chip->num_slots = slots; 2295d38dcad4SAdrian Hunter chip->pm_retune = true; 2296d38dcad4SAdrian Hunter chip->rpm_retune = true; 2297659c9bc1SBen Hutchings 2298659c9bc1SBen Hutchings pci_set_drvdata(pdev, chip); 2299659c9bc1SBen Hutchings 2300659c9bc1SBen Hutchings if (chip->fixes && chip->fixes->probe) { 2301659c9bc1SBen Hutchings ret = chip->fixes->probe(chip); 2302659c9bc1SBen Hutchings if (ret) 230352ac7acfSAndy Shevchenko return ret; 2304659c9bc1SBen Hutchings } 2305659c9bc1SBen Hutchings 2306659c9bc1SBen Hutchings slots = chip->num_slots; /* Quirk may have changed this */ 2307659c9bc1SBen Hutchings 2308659c9bc1SBen Hutchings for (i = 0; i < slots; i++) { 2309659c9bc1SBen Hutchings slot = sdhci_pci_probe_slot(pdev, chip, first_bar, i); 2310659c9bc1SBen Hutchings if (IS_ERR(slot)) { 2311659c9bc1SBen Hutchings for (i--; i >= 0; i--) 2312659c9bc1SBen Hutchings sdhci_pci_remove_slot(chip->slots[i]); 231352ac7acfSAndy Shevchenko return PTR_ERR(slot); 2314659c9bc1SBen Hutchings } 2315659c9bc1SBen Hutchings 2316659c9bc1SBen Hutchings chip->slots[i] = slot; 2317659c9bc1SBen Hutchings } 2318659c9bc1SBen Hutchings 2319659c9bc1SBen Hutchings if (chip->allow_runtime_pm) 2320659c9bc1SBen Hutchings sdhci_pci_runtime_pm_allow(&pdev->dev); 2321659c9bc1SBen Hutchings 2322659c9bc1SBen Hutchings return 0; 2323659c9bc1SBen Hutchings } 2324659c9bc1SBen Hutchings 2325659c9bc1SBen Hutchings static void sdhci_pci_remove(struct pci_dev *pdev) 2326659c9bc1SBen Hutchings { 2327659c9bc1SBen Hutchings int i; 232852ac7acfSAndy Shevchenko struct sdhci_pci_chip *chip = pci_get_drvdata(pdev); 2329659c9bc1SBen Hutchings 2330659c9bc1SBen Hutchings if (chip->allow_runtime_pm) 2331659c9bc1SBen Hutchings sdhci_pci_runtime_pm_forbid(&pdev->dev); 2332659c9bc1SBen Hutchings 2333659c9bc1SBen Hutchings for (i = 0; i < chip->num_slots; i++) 2334659c9bc1SBen Hutchings sdhci_pci_remove_slot(chip->slots[i]); 2335659c9bc1SBen Hutchings } 2336659c9bc1SBen Hutchings 2337659c9bc1SBen Hutchings static struct pci_driver sdhci_driver = { 2338659c9bc1SBen Hutchings .name = "sdhci-pci", 2339659c9bc1SBen Hutchings .id_table = pci_ids, 2340659c9bc1SBen Hutchings .probe = sdhci_pci_probe, 2341659c9bc1SBen Hutchings .remove = sdhci_pci_remove, 2342659c9bc1SBen Hutchings .driver = { 2343659c9bc1SBen Hutchings .pm = &sdhci_pci_pm_ops 2344659c9bc1SBen Hutchings }, 2345659c9bc1SBen Hutchings }; 2346659c9bc1SBen Hutchings 2347659c9bc1SBen Hutchings module_pci_driver(sdhci_driver); 2348659c9bc1SBen Hutchings 2349659c9bc1SBen Hutchings MODULE_AUTHOR("Pierre Ossman <pierre@ossman.eu>"); 2350659c9bc1SBen Hutchings MODULE_DESCRIPTION("Secure Digital Host Controller Interface PCI driver"); 2351659c9bc1SBen Hutchings MODULE_LICENSE("GPL"); 2352