16b1baefeSThomas Gleixner // SPDX-License-Identifier: GPL-2.0-only 27d326930SKishon Vijay Abraham I /** 37d326930SKishon Vijay Abraham I * SDHCI Controller driver for TI's OMAP SoCs 47d326930SKishon Vijay Abraham I * 57d326930SKishon Vijay Abraham I * Copyright (C) 2017 Texas Instruments 67d326930SKishon Vijay Abraham I * Author: Kishon Vijay Abraham I <kishon@ti.com> 77d326930SKishon Vijay Abraham I */ 87d326930SKishon Vijay Abraham I 97d326930SKishon Vijay Abraham I #include <linux/delay.h> 105da5e494SFaiz Abbas #include <linux/mmc/mmc.h> 117d326930SKishon Vijay Abraham I #include <linux/mmc/slot-gpio.h> 127d326930SKishon Vijay Abraham I #include <linux/module.h> 137d326930SKishon Vijay Abraham I #include <linux/of.h> 147d326930SKishon Vijay Abraham I #include <linux/of_device.h> 157d326930SKishon Vijay Abraham I #include <linux/platform_device.h> 167d326930SKishon Vijay Abraham I #include <linux/pm_runtime.h> 177d326930SKishon Vijay Abraham I #include <linux/regulator/consumer.h> 188d20b2eaSKishon Vijay Abraham I #include <linux/pinctrl/consumer.h> 19212f4f8aSKishon Vijay Abraham I #include <linux/sys_soc.h> 20961de0a8SFaiz Abbas #include <linux/thermal.h> 217d326930SKishon Vijay Abraham I 227d326930SKishon Vijay Abraham I #include "sdhci-pltfm.h" 237d326930SKishon Vijay Abraham I 2442b380b6STony Lindgren /* 2542b380b6STony Lindgren * Note that the register offsets used here are from omap_regs 2642b380b6STony Lindgren * base which is 0x100 for omap4 and later, and 0 for omap3 and 2742b380b6STony Lindgren * earlier. 2842b380b6STony Lindgren */ 2942b380b6STony Lindgren #define SDHCI_OMAP_SYSCONFIG 0x10 3053f9460eSTony Lindgren 3142b380b6STony Lindgren #define SDHCI_OMAP_CON 0x2c 327d326930SKishon Vijay Abraham I #define CON_DW8 BIT(5) 337d326930SKishon Vijay Abraham I #define CON_DMA_MASTER BIT(20) 3427ceb7e0SKishon Vijay Abraham I #define CON_DDR BIT(19) 3520ea26a1SKishon Vijay Abraham I #define CON_CLKEXTFREE BIT(16) 3620ea26a1SKishon Vijay Abraham I #define CON_PADEN BIT(15) 37efde12b2SKishon Vijay Abraham I #define CON_CTPL BIT(11) 387d326930SKishon Vijay Abraham I #define CON_INIT BIT(1) 397d326930SKishon Vijay Abraham I #define CON_OD BIT(0) 407d326930SKishon Vijay Abraham I 4142b380b6STony Lindgren #define SDHCI_OMAP_DLL 0x34 429fc2cd76SKishon Vijay Abraham I #define DLL_SWT BIT(20) 439fc2cd76SKishon Vijay Abraham I #define DLL_FORCE_SR_C_SHIFT 13 449fc2cd76SKishon Vijay Abraham I #define DLL_FORCE_SR_C_MASK (0x7f << DLL_FORCE_SR_C_SHIFT) 459fc2cd76SKishon Vijay Abraham I #define DLL_FORCE_VALUE BIT(12) 469fc2cd76SKishon Vijay Abraham I #define DLL_CALIB BIT(1) 479fc2cd76SKishon Vijay Abraham I 4842b380b6STony Lindgren #define SDHCI_OMAP_CMD 0x10c 497d326930SKishon Vijay Abraham I 5042b380b6STony Lindgren #define SDHCI_OMAP_PSTATE 0x124 5120ea26a1SKishon Vijay Abraham I #define PSTATE_DLEV_DAT0 BIT(20) 5220ea26a1SKishon Vijay Abraham I #define PSTATE_DATI BIT(1) 5320ea26a1SKishon Vijay Abraham I 5442b380b6STony Lindgren #define SDHCI_OMAP_HCTL 0x128 557d326930SKishon Vijay Abraham I #define HCTL_SDBP BIT(8) 567d326930SKishon Vijay Abraham I #define HCTL_SDVS_SHIFT 9 577d326930SKishon Vijay Abraham I #define HCTL_SDVS_MASK (0x7 << HCTL_SDVS_SHIFT) 587d326930SKishon Vijay Abraham I #define HCTL_SDVS_33 (0x7 << HCTL_SDVS_SHIFT) 597d326930SKishon Vijay Abraham I #define HCTL_SDVS_30 (0x6 << HCTL_SDVS_SHIFT) 607d326930SKishon Vijay Abraham I #define HCTL_SDVS_18 (0x5 << HCTL_SDVS_SHIFT) 617d326930SKishon Vijay Abraham I 6242b380b6STony Lindgren #define SDHCI_OMAP_SYSCTL 0x12c 637d326930SKishon Vijay Abraham I #define SYSCTL_CEN BIT(2) 647d326930SKishon Vijay Abraham I #define SYSCTL_CLKD_SHIFT 6 657d326930SKishon Vijay Abraham I #define SYSCTL_CLKD_MASK 0x3ff 667d326930SKishon Vijay Abraham I 6742b380b6STony Lindgren #define SDHCI_OMAP_STAT 0x130 687d326930SKishon Vijay Abraham I 6942b380b6STony Lindgren #define SDHCI_OMAP_IE 0x134 707d326930SKishon Vijay Abraham I #define INT_CC_EN BIT(0) 717d326930SKishon Vijay Abraham I 7242b380b6STony Lindgren #define SDHCI_OMAP_ISE 0x138 73d806e334STony Lindgren 7442b380b6STony Lindgren #define SDHCI_OMAP_AC12 0x13c 757d326930SKishon Vijay Abraham I #define AC12_V1V8_SIGEN BIT(19) 769fc2cd76SKishon Vijay Abraham I #define AC12_SCLK_SEL BIT(23) 777d326930SKishon Vijay Abraham I 7842b380b6STony Lindgren #define SDHCI_OMAP_CAPA 0x140 797d326930SKishon Vijay Abraham I #define CAPA_VS33 BIT(24) 807d326930SKishon Vijay Abraham I #define CAPA_VS30 BIT(25) 817d326930SKishon Vijay Abraham I #define CAPA_VS18 BIT(26) 827d326930SKishon Vijay Abraham I 8342b380b6STony Lindgren #define SDHCI_OMAP_CAPA2 0x144 849fc2cd76SKishon Vijay Abraham I #define CAPA2_TSDR50 BIT(13) 859fc2cd76SKishon Vijay Abraham I 867d326930SKishon Vijay Abraham I #define SDHCI_OMAP_TIMEOUT 1 /* 1 msec */ 877d326930SKishon Vijay Abraham I 887d326930SKishon Vijay Abraham I #define SYSCTL_CLKD_MAX 0x3FF 897d326930SKishon Vijay Abraham I 907d326930SKishon Vijay Abraham I #define IOV_1V8 1800000 /* 180000 uV */ 917d326930SKishon Vijay Abraham I #define IOV_3V0 3000000 /* 300000 uV */ 927d326930SKishon Vijay Abraham I #define IOV_3V3 3300000 /* 330000 uV */ 937d326930SKishon Vijay Abraham I 949fc2cd76SKishon Vijay Abraham I #define MAX_PHASE_DELAY 0x7C 959fc2cd76SKishon Vijay Abraham I 968d20b2eaSKishon Vijay Abraham I /* sdhci-omap controller flags */ 978d20b2eaSKishon Vijay Abraham I #define SDHCI_OMAP_REQUIRE_IODELAY BIT(0) 989e84a2e6SFaiz Abbas #define SDHCI_OMAP_SPECIAL_RESET BIT(1) 998d20b2eaSKishon Vijay Abraham I 1007d326930SKishon Vijay Abraham I struct sdhci_omap_data { 10142b380b6STony Lindgren int omap_offset; /* Offset for omap regs from base */ 10242b380b6STony Lindgren u32 offset; /* Offset for SDHCI regs from base */ 1038d20b2eaSKishon Vijay Abraham I u8 flags; 1047d326930SKishon Vijay Abraham I }; 1057d326930SKishon Vijay Abraham I 1067d326930SKishon Vijay Abraham I struct sdhci_omap_host { 107212f4f8aSKishon Vijay Abraham I char *version; 1087d326930SKishon Vijay Abraham I void __iomem *base; 1097d326930SKishon Vijay Abraham I struct device *dev; 1107d326930SKishon Vijay Abraham I struct regulator *pbias; 1117d326930SKishon Vijay Abraham I bool pbias_enabled; 1127d326930SKishon Vijay Abraham I struct sdhci_host *host; 1137d326930SKishon Vijay Abraham I u8 bus_mode; 1147d326930SKishon Vijay Abraham I u8 power_mode; 1158d20b2eaSKishon Vijay Abraham I u8 timing; 1168d20b2eaSKishon Vijay Abraham I u8 flags; 1178d20b2eaSKishon Vijay Abraham I 1188d20b2eaSKishon Vijay Abraham I struct pinctrl *pinctrl; 1198d20b2eaSKishon Vijay Abraham I struct pinctrl_state **pinctrl_state; 1205b0d6210SFaiz Abbas bool is_tuning; 12142b380b6STony Lindgren 12242b380b6STony Lindgren /* Offset for omap specific registers from base */ 12342b380b6STony Lindgren int omap_offset; 12442b380b6STony Lindgren 125ee0f3092SFaiz Abbas /* Omap specific context save */ 126ee0f3092SFaiz Abbas u32 con; 127ee0f3092SFaiz Abbas u32 hctl; 128ee0f3092SFaiz Abbas u32 sysctl; 129ee0f3092SFaiz Abbas u32 capa; 130d806e334STony Lindgren u32 ie; 131d806e334STony Lindgren u32 ise; 1327d326930SKishon Vijay Abraham I }; 1337d326930SKishon Vijay Abraham I 1348d20b2eaSKishon Vijay Abraham I static void sdhci_omap_start_clock(struct sdhci_omap_host *omap_host); 1358d20b2eaSKishon Vijay Abraham I static void sdhci_omap_stop_clock(struct sdhci_omap_host *omap_host); 1368d20b2eaSKishon Vijay Abraham I 1377d326930SKishon Vijay Abraham I static inline u32 sdhci_omap_readl(struct sdhci_omap_host *host, 1387d326930SKishon Vijay Abraham I unsigned int offset) 1397d326930SKishon Vijay Abraham I { 14042b380b6STony Lindgren return readl(host->base + host->omap_offset + offset); 1417d326930SKishon Vijay Abraham I } 1427d326930SKishon Vijay Abraham I 1437d326930SKishon Vijay Abraham I static inline void sdhci_omap_writel(struct sdhci_omap_host *host, 1447d326930SKishon Vijay Abraham I unsigned int offset, u32 data) 1457d326930SKishon Vijay Abraham I { 14642b380b6STony Lindgren writel(data, host->base + host->omap_offset + offset); 1477d326930SKishon Vijay Abraham I } 1487d326930SKishon Vijay Abraham I 1497d326930SKishon Vijay Abraham I static int sdhci_omap_set_pbias(struct sdhci_omap_host *omap_host, 1507d326930SKishon Vijay Abraham I bool power_on, unsigned int iov) 1517d326930SKishon Vijay Abraham I { 1527d326930SKishon Vijay Abraham I int ret; 1537d326930SKishon Vijay Abraham I struct device *dev = omap_host->dev; 1547d326930SKishon Vijay Abraham I 1557d326930SKishon Vijay Abraham I if (IS_ERR(omap_host->pbias)) 1567d326930SKishon Vijay Abraham I return 0; 1577d326930SKishon Vijay Abraham I 1587d326930SKishon Vijay Abraham I if (power_on) { 1597d326930SKishon Vijay Abraham I ret = regulator_set_voltage(omap_host->pbias, iov, iov); 1607d326930SKishon Vijay Abraham I if (ret) { 1617d326930SKishon Vijay Abraham I dev_err(dev, "pbias set voltage failed\n"); 1627d326930SKishon Vijay Abraham I return ret; 1637d326930SKishon Vijay Abraham I } 1647d326930SKishon Vijay Abraham I 1657d326930SKishon Vijay Abraham I if (omap_host->pbias_enabled) 1667d326930SKishon Vijay Abraham I return 0; 1677d326930SKishon Vijay Abraham I 1687d326930SKishon Vijay Abraham I ret = regulator_enable(omap_host->pbias); 1697d326930SKishon Vijay Abraham I if (ret) { 1707d326930SKishon Vijay Abraham I dev_err(dev, "pbias reg enable fail\n"); 1717d326930SKishon Vijay Abraham I return ret; 1727d326930SKishon Vijay Abraham I } 1737d326930SKishon Vijay Abraham I 1747d326930SKishon Vijay Abraham I omap_host->pbias_enabled = true; 1757d326930SKishon Vijay Abraham I } else { 1767d326930SKishon Vijay Abraham I if (!omap_host->pbias_enabled) 1777d326930SKishon Vijay Abraham I return 0; 1787d326930SKishon Vijay Abraham I 1797d326930SKishon Vijay Abraham I ret = regulator_disable(omap_host->pbias); 1807d326930SKishon Vijay Abraham I if (ret) { 1817d326930SKishon Vijay Abraham I dev_err(dev, "pbias reg disable fail\n"); 1827d326930SKishon Vijay Abraham I return ret; 1837d326930SKishon Vijay Abraham I } 1847d326930SKishon Vijay Abraham I omap_host->pbias_enabled = false; 1857d326930SKishon Vijay Abraham I } 1867d326930SKishon Vijay Abraham I 1877d326930SKishon Vijay Abraham I return 0; 1887d326930SKishon Vijay Abraham I } 1897d326930SKishon Vijay Abraham I 1907d326930SKishon Vijay Abraham I static int sdhci_omap_enable_iov(struct sdhci_omap_host *omap_host, 191de5ccd2aSTony Lindgren unsigned int iov_pbias) 1927d326930SKishon Vijay Abraham I { 1937d326930SKishon Vijay Abraham I int ret; 1947d326930SKishon Vijay Abraham I struct sdhci_host *host = omap_host->host; 1957d326930SKishon Vijay Abraham I struct mmc_host *mmc = host->mmc; 1967d326930SKishon Vijay Abraham I 1977d326930SKishon Vijay Abraham I ret = sdhci_omap_set_pbias(omap_host, false, 0); 1987d326930SKishon Vijay Abraham I if (ret) 1997d326930SKishon Vijay Abraham I return ret; 2007d326930SKishon Vijay Abraham I 2017d326930SKishon Vijay Abraham I if (!IS_ERR(mmc->supply.vqmmc)) { 202de5ccd2aSTony Lindgren /* Pick the right voltage to allow 3.0V for 3.3V nominal PBIAS */ 203de5ccd2aSTony Lindgren ret = mmc_regulator_set_vqmmc(mmc, &mmc->ios); 204de5ccd2aSTony Lindgren if (ret < 0) { 2057d326930SKishon Vijay Abraham I dev_err(mmc_dev(mmc), "vqmmc set voltage failed\n"); 2067d326930SKishon Vijay Abraham I return ret; 2077d326930SKishon Vijay Abraham I } 2087d326930SKishon Vijay Abraham I } 2097d326930SKishon Vijay Abraham I 210de5ccd2aSTony Lindgren ret = sdhci_omap_set_pbias(omap_host, true, iov_pbias); 2117d326930SKishon Vijay Abraham I if (ret) 2127d326930SKishon Vijay Abraham I return ret; 2137d326930SKishon Vijay Abraham I 2147d326930SKishon Vijay Abraham I return 0; 2157d326930SKishon Vijay Abraham I } 2167d326930SKishon Vijay Abraham I 2177d326930SKishon Vijay Abraham I static void sdhci_omap_conf_bus_power(struct sdhci_omap_host *omap_host, 2187d326930SKishon Vijay Abraham I unsigned char signal_voltage) 2197d326930SKishon Vijay Abraham I { 220de5ccd2aSTony Lindgren u32 reg, capa; 2217d326930SKishon Vijay Abraham I ktime_t timeout; 2227d326930SKishon Vijay Abraham I 2237d326930SKishon Vijay Abraham I reg = sdhci_omap_readl(omap_host, SDHCI_OMAP_HCTL); 2247d326930SKishon Vijay Abraham I reg &= ~HCTL_SDVS_MASK; 2257d326930SKishon Vijay Abraham I 226de5ccd2aSTony Lindgren switch (signal_voltage) { 227de5ccd2aSTony Lindgren case MMC_SIGNAL_VOLTAGE_330: 228de5ccd2aSTony Lindgren capa = sdhci_omap_readl(omap_host, SDHCI_OMAP_CAPA); 229de5ccd2aSTony Lindgren if (capa & CAPA_VS33) 2307d326930SKishon Vijay Abraham I reg |= HCTL_SDVS_33; 231de5ccd2aSTony Lindgren else if (capa & CAPA_VS30) 232de5ccd2aSTony Lindgren reg |= HCTL_SDVS_30; 2337d326930SKishon Vijay Abraham I else 234de5ccd2aSTony Lindgren dev_warn(omap_host->dev, "misconfigured CAPA: %08x\n", 235de5ccd2aSTony Lindgren capa); 236de5ccd2aSTony Lindgren break; 237de5ccd2aSTony Lindgren case MMC_SIGNAL_VOLTAGE_180: 238de5ccd2aSTony Lindgren default: 2397d326930SKishon Vijay Abraham I reg |= HCTL_SDVS_18; 240de5ccd2aSTony Lindgren break; 241de5ccd2aSTony Lindgren } 2427d326930SKishon Vijay Abraham I 2437d326930SKishon Vijay Abraham I sdhci_omap_writel(omap_host, SDHCI_OMAP_HCTL, reg); 2447d326930SKishon Vijay Abraham I 2457d326930SKishon Vijay Abraham I reg |= HCTL_SDBP; 2467d326930SKishon Vijay Abraham I sdhci_omap_writel(omap_host, SDHCI_OMAP_HCTL, reg); 2477d326930SKishon Vijay Abraham I 2487d326930SKishon Vijay Abraham I /* wait 1ms */ 2497d326930SKishon Vijay Abraham I timeout = ktime_add_ms(ktime_get(), SDHCI_OMAP_TIMEOUT); 2509f0ea0bdSAdrian Hunter while (1) { 2519f0ea0bdSAdrian Hunter bool timedout = ktime_after(ktime_get(), timeout); 2529f0ea0bdSAdrian Hunter 2539f0ea0bdSAdrian Hunter if (sdhci_omap_readl(omap_host, SDHCI_OMAP_HCTL) & HCTL_SDBP) 2549f0ea0bdSAdrian Hunter break; 2559f0ea0bdSAdrian Hunter if (WARN_ON(timedout)) 2567d326930SKishon Vijay Abraham I return; 2577d326930SKishon Vijay Abraham I usleep_range(5, 10); 2587d326930SKishon Vijay Abraham I } 2597d326930SKishon Vijay Abraham I } 2607d326930SKishon Vijay Abraham I 261efde12b2SKishon Vijay Abraham I static void sdhci_omap_enable_sdio_irq(struct mmc_host *mmc, int enable) 262efde12b2SKishon Vijay Abraham I { 263efde12b2SKishon Vijay Abraham I struct sdhci_host *host = mmc_priv(mmc); 264efde12b2SKishon Vijay Abraham I struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); 265efde12b2SKishon Vijay Abraham I struct sdhci_omap_host *omap_host = sdhci_pltfm_priv(pltfm_host); 266efde12b2SKishon Vijay Abraham I u32 reg; 267efde12b2SKishon Vijay Abraham I 268efde12b2SKishon Vijay Abraham I reg = sdhci_omap_readl(omap_host, SDHCI_OMAP_CON); 269efde12b2SKishon Vijay Abraham I if (enable) 270efde12b2SKishon Vijay Abraham I reg |= (CON_CTPL | CON_CLKEXTFREE); 271efde12b2SKishon Vijay Abraham I else 272efde12b2SKishon Vijay Abraham I reg &= ~(CON_CTPL | CON_CLKEXTFREE); 273efde12b2SKishon Vijay Abraham I sdhci_omap_writel(omap_host, SDHCI_OMAP_CON, reg); 274efde12b2SKishon Vijay Abraham I 275efde12b2SKishon Vijay Abraham I sdhci_enable_sdio_irq(mmc, enable); 276efde12b2SKishon Vijay Abraham I } 277efde12b2SKishon Vijay Abraham I 2789fc2cd76SKishon Vijay Abraham I static inline void sdhci_omap_set_dll(struct sdhci_omap_host *omap_host, 2799fc2cd76SKishon Vijay Abraham I int count) 2809fc2cd76SKishon Vijay Abraham I { 2819fc2cd76SKishon Vijay Abraham I int i; 2829fc2cd76SKishon Vijay Abraham I u32 reg; 2839fc2cd76SKishon Vijay Abraham I 2849fc2cd76SKishon Vijay Abraham I reg = sdhci_omap_readl(omap_host, SDHCI_OMAP_DLL); 2859fc2cd76SKishon Vijay Abraham I reg |= DLL_FORCE_VALUE; 2869fc2cd76SKishon Vijay Abraham I reg &= ~DLL_FORCE_SR_C_MASK; 2879fc2cd76SKishon Vijay Abraham I reg |= (count << DLL_FORCE_SR_C_SHIFT); 2889fc2cd76SKishon Vijay Abraham I sdhci_omap_writel(omap_host, SDHCI_OMAP_DLL, reg); 2899fc2cd76SKishon Vijay Abraham I 2909fc2cd76SKishon Vijay Abraham I reg |= DLL_CALIB; 2919fc2cd76SKishon Vijay Abraham I sdhci_omap_writel(omap_host, SDHCI_OMAP_DLL, reg); 2929fc2cd76SKishon Vijay Abraham I for (i = 0; i < 1000; i++) { 2939fc2cd76SKishon Vijay Abraham I reg = sdhci_omap_readl(omap_host, SDHCI_OMAP_DLL); 2949fc2cd76SKishon Vijay Abraham I if (reg & DLL_CALIB) 2959fc2cd76SKishon Vijay Abraham I break; 2969fc2cd76SKishon Vijay Abraham I } 2979fc2cd76SKishon Vijay Abraham I reg &= ~DLL_CALIB; 2989fc2cd76SKishon Vijay Abraham I sdhci_omap_writel(omap_host, SDHCI_OMAP_DLL, reg); 2999fc2cd76SKishon Vijay Abraham I } 3009fc2cd76SKishon Vijay Abraham I 3019fc2cd76SKishon Vijay Abraham I static void sdhci_omap_disable_tuning(struct sdhci_omap_host *omap_host) 3029fc2cd76SKishon Vijay Abraham I { 3039fc2cd76SKishon Vijay Abraham I u32 reg; 3049fc2cd76SKishon Vijay Abraham I 3059fc2cd76SKishon Vijay Abraham I reg = sdhci_omap_readl(omap_host, SDHCI_OMAP_AC12); 3069fc2cd76SKishon Vijay Abraham I reg &= ~AC12_SCLK_SEL; 3079fc2cd76SKishon Vijay Abraham I sdhci_omap_writel(omap_host, SDHCI_OMAP_AC12, reg); 3089fc2cd76SKishon Vijay Abraham I 3099fc2cd76SKishon Vijay Abraham I reg = sdhci_omap_readl(omap_host, SDHCI_OMAP_DLL); 3109fc2cd76SKishon Vijay Abraham I reg &= ~(DLL_FORCE_VALUE | DLL_SWT); 3119fc2cd76SKishon Vijay Abraham I sdhci_omap_writel(omap_host, SDHCI_OMAP_DLL, reg); 3129fc2cd76SKishon Vijay Abraham I } 3139fc2cd76SKishon Vijay Abraham I 3149fc2cd76SKishon Vijay Abraham I static int sdhci_omap_execute_tuning(struct mmc_host *mmc, u32 opcode) 3159fc2cd76SKishon Vijay Abraham I { 3169fc2cd76SKishon Vijay Abraham I struct sdhci_host *host = mmc_priv(mmc); 3179fc2cd76SKishon Vijay Abraham I struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); 3189fc2cd76SKishon Vijay Abraham I struct sdhci_omap_host *omap_host = sdhci_pltfm_priv(pltfm_host); 319961de0a8SFaiz Abbas struct thermal_zone_device *thermal_dev; 3209fc2cd76SKishon Vijay Abraham I struct device *dev = omap_host->dev; 3219fc2cd76SKishon Vijay Abraham I struct mmc_ios *ios = &mmc->ios; 3229fc2cd76SKishon Vijay Abraham I u32 start_window = 0, max_window = 0; 323961de0a8SFaiz Abbas bool single_point_failure = false; 324db2039fcSFaiz Abbas bool dcrc_was_enabled = false; 3259fc2cd76SKishon Vijay Abraham I u8 cur_match, prev_match = 0; 3269fc2cd76SKishon Vijay Abraham I u32 length = 0, max_len = 0; 3279fc2cd76SKishon Vijay Abraham I u32 phase_delay = 0; 328961de0a8SFaiz Abbas int temperature; 3299fc2cd76SKishon Vijay Abraham I int ret = 0; 3309fc2cd76SKishon Vijay Abraham I u32 reg; 331961de0a8SFaiz Abbas int i; 3329fc2cd76SKishon Vijay Abraham I 3339fc2cd76SKishon Vijay Abraham I /* clock tuning is not needed for upto 52MHz */ 3349fc2cd76SKishon Vijay Abraham I if (ios->clock <= 52000000) 3359fc2cd76SKishon Vijay Abraham I return 0; 3369fc2cd76SKishon Vijay Abraham I 3379fc2cd76SKishon Vijay Abraham I reg = sdhci_omap_readl(omap_host, SDHCI_OMAP_CAPA2); 3389fc2cd76SKishon Vijay Abraham I if (ios->timing == MMC_TIMING_UHS_SDR50 && !(reg & CAPA2_TSDR50)) 3399fc2cd76SKishon Vijay Abraham I return 0; 3409fc2cd76SKishon Vijay Abraham I 341961de0a8SFaiz Abbas thermal_dev = thermal_zone_get_zone_by_name("cpu_thermal"); 342961de0a8SFaiz Abbas if (IS_ERR(thermal_dev)) { 343961de0a8SFaiz Abbas dev_err(dev, "Unable to get thermal zone for tuning\n"); 344961de0a8SFaiz Abbas return PTR_ERR(thermal_dev); 345961de0a8SFaiz Abbas } 346961de0a8SFaiz Abbas 347961de0a8SFaiz Abbas ret = thermal_zone_get_temp(thermal_dev, &temperature); 348961de0a8SFaiz Abbas if (ret) 349961de0a8SFaiz Abbas return ret; 350961de0a8SFaiz Abbas 3519fc2cd76SKishon Vijay Abraham I reg = sdhci_omap_readl(omap_host, SDHCI_OMAP_DLL); 3529fc2cd76SKishon Vijay Abraham I reg |= DLL_SWT; 3539fc2cd76SKishon Vijay Abraham I sdhci_omap_writel(omap_host, SDHCI_OMAP_DLL, reg); 3549fc2cd76SKishon Vijay Abraham I 3557d33c358SKishon Vijay Abraham I /* 3567d33c358SKishon Vijay Abraham I * OMAP5/DRA74X/DRA72x Errata i802: 3577d33c358SKishon Vijay Abraham I * DCRC error interrupts (MMCHS_STAT[21] DCRC=0x1) can occur 3587d33c358SKishon Vijay Abraham I * during the tuning procedure. So disable it during the 3597d33c358SKishon Vijay Abraham I * tuning procedure. 3607d33c358SKishon Vijay Abraham I */ 361db2039fcSFaiz Abbas if (host->ier & SDHCI_INT_DATA_CRC) { 362db2039fcSFaiz Abbas host->ier &= ~SDHCI_INT_DATA_CRC; 363db2039fcSFaiz Abbas dcrc_was_enabled = true; 364db2039fcSFaiz Abbas } 3657d33c358SKishon Vijay Abraham I 3665b0d6210SFaiz Abbas omap_host->is_tuning = true; 3675b0d6210SFaiz Abbas 368961de0a8SFaiz Abbas /* 369961de0a8SFaiz Abbas * Stage 1: Search for a maximum pass window ignoring any 370961de0a8SFaiz Abbas * any single point failures. If the tuning value ends up 371961de0a8SFaiz Abbas * near it, move away from it in stage 2 below 372961de0a8SFaiz Abbas */ 3739fc2cd76SKishon Vijay Abraham I while (phase_delay <= MAX_PHASE_DELAY) { 3749fc2cd76SKishon Vijay Abraham I sdhci_omap_set_dll(omap_host, phase_delay); 3759fc2cd76SKishon Vijay Abraham I 3769fc2cd76SKishon Vijay Abraham I cur_match = !mmc_send_tuning(mmc, opcode, NULL); 3779fc2cd76SKishon Vijay Abraham I if (cur_match) { 3789fc2cd76SKishon Vijay Abraham I if (prev_match) { 3799fc2cd76SKishon Vijay Abraham I length++; 380961de0a8SFaiz Abbas } else if (single_point_failure) { 381961de0a8SFaiz Abbas /* ignore single point failure */ 382961de0a8SFaiz Abbas length++; 3839fc2cd76SKishon Vijay Abraham I } else { 3849fc2cd76SKishon Vijay Abraham I start_window = phase_delay; 3859fc2cd76SKishon Vijay Abraham I length = 1; 3869fc2cd76SKishon Vijay Abraham I } 387961de0a8SFaiz Abbas } else { 388961de0a8SFaiz Abbas single_point_failure = prev_match; 3899fc2cd76SKishon Vijay Abraham I } 3909fc2cd76SKishon Vijay Abraham I 3919fc2cd76SKishon Vijay Abraham I if (length > max_len) { 3929fc2cd76SKishon Vijay Abraham I max_window = start_window; 3939fc2cd76SKishon Vijay Abraham I max_len = length; 3949fc2cd76SKishon Vijay Abraham I } 3959fc2cd76SKishon Vijay Abraham I 3969fc2cd76SKishon Vijay Abraham I prev_match = cur_match; 3979fc2cd76SKishon Vijay Abraham I phase_delay += 4; 3989fc2cd76SKishon Vijay Abraham I } 3999fc2cd76SKishon Vijay Abraham I 4009fc2cd76SKishon Vijay Abraham I if (!max_len) { 4019fc2cd76SKishon Vijay Abraham I dev_err(dev, "Unable to find match\n"); 4029fc2cd76SKishon Vijay Abraham I ret = -EIO; 4039fc2cd76SKishon Vijay Abraham I goto tuning_error; 4049fc2cd76SKishon Vijay Abraham I } 4059fc2cd76SKishon Vijay Abraham I 406961de0a8SFaiz Abbas /* 407961de0a8SFaiz Abbas * Assign tuning value as a ratio of maximum pass window based 408961de0a8SFaiz Abbas * on temperature 409961de0a8SFaiz Abbas */ 410961de0a8SFaiz Abbas if (temperature < -20000) 411feb40824SFaiz Abbas phase_delay = min(max_window + 4 * (max_len - 1) - 24, 412961de0a8SFaiz Abbas max_window + 413961de0a8SFaiz Abbas DIV_ROUND_UP(13 * max_len, 16) * 4); 414961de0a8SFaiz Abbas else if (temperature < 20000) 415961de0a8SFaiz Abbas phase_delay = max_window + DIV_ROUND_UP(9 * max_len, 16) * 4; 416961de0a8SFaiz Abbas else if (temperature < 40000) 417961de0a8SFaiz Abbas phase_delay = max_window + DIV_ROUND_UP(8 * max_len, 16) * 4; 418961de0a8SFaiz Abbas else if (temperature < 70000) 419961de0a8SFaiz Abbas phase_delay = max_window + DIV_ROUND_UP(7 * max_len, 16) * 4; 420961de0a8SFaiz Abbas else if (temperature < 90000) 421961de0a8SFaiz Abbas phase_delay = max_window + DIV_ROUND_UP(5 * max_len, 16) * 4; 422961de0a8SFaiz Abbas else if (temperature < 120000) 423961de0a8SFaiz Abbas phase_delay = max_window + DIV_ROUND_UP(4 * max_len, 16) * 4; 424961de0a8SFaiz Abbas else 425961de0a8SFaiz Abbas phase_delay = max_window + DIV_ROUND_UP(3 * max_len, 16) * 4; 426961de0a8SFaiz Abbas 427961de0a8SFaiz Abbas /* 428961de0a8SFaiz Abbas * Stage 2: Search for a single point failure near the chosen tuning 429961de0a8SFaiz Abbas * value in two steps. First in the +3 to +10 range and then in the 430961de0a8SFaiz Abbas * +2 to -10 range. If found, move away from it in the appropriate 431961de0a8SFaiz Abbas * direction by the appropriate amount depending on the temperature. 432961de0a8SFaiz Abbas */ 433961de0a8SFaiz Abbas for (i = 3; i <= 10; i++) { 434961de0a8SFaiz Abbas sdhci_omap_set_dll(omap_host, phase_delay + i); 435961de0a8SFaiz Abbas 436961de0a8SFaiz Abbas if (mmc_send_tuning(mmc, opcode, NULL)) { 437961de0a8SFaiz Abbas if (temperature < 10000) 438961de0a8SFaiz Abbas phase_delay += i + 6; 439961de0a8SFaiz Abbas else if (temperature < 20000) 440961de0a8SFaiz Abbas phase_delay += i - 12; 441961de0a8SFaiz Abbas else if (temperature < 70000) 442961de0a8SFaiz Abbas phase_delay += i - 8; 443961de0a8SFaiz Abbas else 444961de0a8SFaiz Abbas phase_delay += i - 6; 445961de0a8SFaiz Abbas 446961de0a8SFaiz Abbas goto single_failure_found; 447961de0a8SFaiz Abbas } 448961de0a8SFaiz Abbas } 449961de0a8SFaiz Abbas 450961de0a8SFaiz Abbas for (i = 2; i >= -10; i--) { 451961de0a8SFaiz Abbas sdhci_omap_set_dll(omap_host, phase_delay + i); 452961de0a8SFaiz Abbas 453961de0a8SFaiz Abbas if (mmc_send_tuning(mmc, opcode, NULL)) { 454961de0a8SFaiz Abbas if (temperature < 10000) 455961de0a8SFaiz Abbas phase_delay += i + 12; 456961de0a8SFaiz Abbas else if (temperature < 20000) 457961de0a8SFaiz Abbas phase_delay += i + 8; 458961de0a8SFaiz Abbas else if (temperature < 70000) 459961de0a8SFaiz Abbas phase_delay += i + 8; 460961de0a8SFaiz Abbas else if (temperature < 90000) 461961de0a8SFaiz Abbas phase_delay += i + 10; 462961de0a8SFaiz Abbas else 463961de0a8SFaiz Abbas phase_delay += i + 12; 464961de0a8SFaiz Abbas 465961de0a8SFaiz Abbas goto single_failure_found; 466961de0a8SFaiz Abbas } 467961de0a8SFaiz Abbas } 468961de0a8SFaiz Abbas 469961de0a8SFaiz Abbas single_failure_found: 4709fc2cd76SKishon Vijay Abraham I reg = sdhci_omap_readl(omap_host, SDHCI_OMAP_AC12); 4719fc2cd76SKishon Vijay Abraham I if (!(reg & AC12_SCLK_SEL)) { 4729fc2cd76SKishon Vijay Abraham I ret = -EIO; 4739fc2cd76SKishon Vijay Abraham I goto tuning_error; 4749fc2cd76SKishon Vijay Abraham I } 4759fc2cd76SKishon Vijay Abraham I 4769fc2cd76SKishon Vijay Abraham I sdhci_omap_set_dll(omap_host, phase_delay); 4779fc2cd76SKishon Vijay Abraham I 4785b0d6210SFaiz Abbas omap_host->is_tuning = false; 4795b0d6210SFaiz Abbas 4809fc2cd76SKishon Vijay Abraham I goto ret; 4819fc2cd76SKishon Vijay Abraham I 4829fc2cd76SKishon Vijay Abraham I tuning_error: 4835b0d6210SFaiz Abbas omap_host->is_tuning = false; 4849fc2cd76SKishon Vijay Abraham I dev_err(dev, "Tuning failed\n"); 4859fc2cd76SKishon Vijay Abraham I sdhci_omap_disable_tuning(omap_host); 4869fc2cd76SKishon Vijay Abraham I 4879fc2cd76SKishon Vijay Abraham I ret: 4889fc2cd76SKishon Vijay Abraham I sdhci_reset(host, SDHCI_RESET_CMD | SDHCI_RESET_DATA); 489db2039fcSFaiz Abbas /* Reenable forbidden interrupt */ 490db2039fcSFaiz Abbas if (dcrc_was_enabled) 491db2039fcSFaiz Abbas host->ier |= SDHCI_INT_DATA_CRC; 4927d33c358SKishon Vijay Abraham I sdhci_writel(host, host->ier, SDHCI_INT_ENABLE); 4937d33c358SKishon Vijay Abraham I sdhci_writel(host, host->ier, SDHCI_SIGNAL_ENABLE); 4949fc2cd76SKishon Vijay Abraham I return ret; 4959fc2cd76SKishon Vijay Abraham I } 4969fc2cd76SKishon Vijay Abraham I 49720ea26a1SKishon Vijay Abraham I static int sdhci_omap_card_busy(struct mmc_host *mmc) 49820ea26a1SKishon Vijay Abraham I { 49920ea26a1SKishon Vijay Abraham I u32 reg, ac12; 50020ea26a1SKishon Vijay Abraham I int ret = false; 50120ea26a1SKishon Vijay Abraham I struct sdhci_host *host = mmc_priv(mmc); 50220ea26a1SKishon Vijay Abraham I struct sdhci_pltfm_host *pltfm_host; 50320ea26a1SKishon Vijay Abraham I struct sdhci_omap_host *omap_host; 50420ea26a1SKishon Vijay Abraham I u32 ier = host->ier; 50520ea26a1SKishon Vijay Abraham I 50620ea26a1SKishon Vijay Abraham I pltfm_host = sdhci_priv(host); 50720ea26a1SKishon Vijay Abraham I omap_host = sdhci_pltfm_priv(pltfm_host); 50820ea26a1SKishon Vijay Abraham I 50920ea26a1SKishon Vijay Abraham I reg = sdhci_omap_readl(omap_host, SDHCI_OMAP_CON); 51020ea26a1SKishon Vijay Abraham I ac12 = sdhci_omap_readl(omap_host, SDHCI_OMAP_AC12); 51120ea26a1SKishon Vijay Abraham I reg &= ~CON_CLKEXTFREE; 51220ea26a1SKishon Vijay Abraham I if (ac12 & AC12_V1V8_SIGEN) 51320ea26a1SKishon Vijay Abraham I reg |= CON_CLKEXTFREE; 51420ea26a1SKishon Vijay Abraham I reg |= CON_PADEN; 51520ea26a1SKishon Vijay Abraham I sdhci_omap_writel(omap_host, SDHCI_OMAP_CON, reg); 51620ea26a1SKishon Vijay Abraham I 51720ea26a1SKishon Vijay Abraham I disable_irq(host->irq); 51820ea26a1SKishon Vijay Abraham I ier |= SDHCI_INT_CARD_INT; 51920ea26a1SKishon Vijay Abraham I sdhci_writel(host, ier, SDHCI_INT_ENABLE); 52020ea26a1SKishon Vijay Abraham I sdhci_writel(host, ier, SDHCI_SIGNAL_ENABLE); 52120ea26a1SKishon Vijay Abraham I 52220ea26a1SKishon Vijay Abraham I /* 52320ea26a1SKishon Vijay Abraham I * Delay is required for PSTATE to correctly reflect 52420ea26a1SKishon Vijay Abraham I * DLEV/CLEV values after PADEN is set. 52520ea26a1SKishon Vijay Abraham I */ 52620ea26a1SKishon Vijay Abraham I usleep_range(50, 100); 52720ea26a1SKishon Vijay Abraham I reg = sdhci_omap_readl(omap_host, SDHCI_OMAP_PSTATE); 52820ea26a1SKishon Vijay Abraham I if ((reg & PSTATE_DATI) || !(reg & PSTATE_DLEV_DAT0)) 52920ea26a1SKishon Vijay Abraham I ret = true; 53020ea26a1SKishon Vijay Abraham I 53120ea26a1SKishon Vijay Abraham I reg = sdhci_omap_readl(omap_host, SDHCI_OMAP_CON); 53220ea26a1SKishon Vijay Abraham I reg &= ~(CON_CLKEXTFREE | CON_PADEN); 53320ea26a1SKishon Vijay Abraham I sdhci_omap_writel(omap_host, SDHCI_OMAP_CON, reg); 53420ea26a1SKishon Vijay Abraham I 53520ea26a1SKishon Vijay Abraham I sdhci_writel(host, host->ier, SDHCI_INT_ENABLE); 53620ea26a1SKishon Vijay Abraham I sdhci_writel(host, host->ier, SDHCI_SIGNAL_ENABLE); 53720ea26a1SKishon Vijay Abraham I enable_irq(host->irq); 53820ea26a1SKishon Vijay Abraham I 53920ea26a1SKishon Vijay Abraham I return ret; 54020ea26a1SKishon Vijay Abraham I } 54120ea26a1SKishon Vijay Abraham I 5427d326930SKishon Vijay Abraham I static int sdhci_omap_start_signal_voltage_switch(struct mmc_host *mmc, 5437d326930SKishon Vijay Abraham I struct mmc_ios *ios) 5447d326930SKishon Vijay Abraham I { 5457d326930SKishon Vijay Abraham I u32 reg; 5467d326930SKishon Vijay Abraham I int ret; 5477d326930SKishon Vijay Abraham I unsigned int iov; 5487d326930SKishon Vijay Abraham I struct sdhci_host *host = mmc_priv(mmc); 5497d326930SKishon Vijay Abraham I struct sdhci_pltfm_host *pltfm_host; 5507d326930SKishon Vijay Abraham I struct sdhci_omap_host *omap_host; 5517d326930SKishon Vijay Abraham I struct device *dev; 5527d326930SKishon Vijay Abraham I 5537d326930SKishon Vijay Abraham I pltfm_host = sdhci_priv(host); 5547d326930SKishon Vijay Abraham I omap_host = sdhci_pltfm_priv(pltfm_host); 5557d326930SKishon Vijay Abraham I dev = omap_host->dev; 5567d326930SKishon Vijay Abraham I 5577d326930SKishon Vijay Abraham I if (ios->signal_voltage == MMC_SIGNAL_VOLTAGE_330) { 5587d326930SKishon Vijay Abraham I reg = sdhci_omap_readl(omap_host, SDHCI_OMAP_CAPA); 559de5ccd2aSTony Lindgren if (!(reg & (CAPA_VS30 | CAPA_VS33))) 5607d326930SKishon Vijay Abraham I return -EOPNOTSUPP; 5617d326930SKishon Vijay Abraham I 562de5ccd2aSTony Lindgren if (reg & CAPA_VS30) 563de5ccd2aSTony Lindgren iov = IOV_3V0; 564de5ccd2aSTony Lindgren else 565de5ccd2aSTony Lindgren iov = IOV_3V3; 566de5ccd2aSTony Lindgren 5677d326930SKishon Vijay Abraham I sdhci_omap_conf_bus_power(omap_host, ios->signal_voltage); 5687d326930SKishon Vijay Abraham I 5697d326930SKishon Vijay Abraham I reg = sdhci_omap_readl(omap_host, SDHCI_OMAP_AC12); 5707d326930SKishon Vijay Abraham I reg &= ~AC12_V1V8_SIGEN; 5717d326930SKishon Vijay Abraham I sdhci_omap_writel(omap_host, SDHCI_OMAP_AC12, reg); 5727d326930SKishon Vijay Abraham I 5737d326930SKishon Vijay Abraham I } else if (ios->signal_voltage == MMC_SIGNAL_VOLTAGE_180) { 5747d326930SKishon Vijay Abraham I reg = sdhci_omap_readl(omap_host, SDHCI_OMAP_CAPA); 5757d326930SKishon Vijay Abraham I if (!(reg & CAPA_VS18)) 5767d326930SKishon Vijay Abraham I return -EOPNOTSUPP; 5777d326930SKishon Vijay Abraham I 578de5ccd2aSTony Lindgren iov = IOV_1V8; 579de5ccd2aSTony Lindgren 5807d326930SKishon Vijay Abraham I sdhci_omap_conf_bus_power(omap_host, ios->signal_voltage); 5817d326930SKishon Vijay Abraham I 5827d326930SKishon Vijay Abraham I reg = sdhci_omap_readl(omap_host, SDHCI_OMAP_AC12); 5837d326930SKishon Vijay Abraham I reg |= AC12_V1V8_SIGEN; 5847d326930SKishon Vijay Abraham I sdhci_omap_writel(omap_host, SDHCI_OMAP_AC12, reg); 5857d326930SKishon Vijay Abraham I } else { 5867d326930SKishon Vijay Abraham I return -EOPNOTSUPP; 5877d326930SKishon Vijay Abraham I } 5887d326930SKishon Vijay Abraham I 5897d326930SKishon Vijay Abraham I ret = sdhci_omap_enable_iov(omap_host, iov); 5907d326930SKishon Vijay Abraham I if (ret) { 5917d326930SKishon Vijay Abraham I dev_err(dev, "failed to switch IO voltage to %dmV\n", iov); 5927d326930SKishon Vijay Abraham I return ret; 5937d326930SKishon Vijay Abraham I } 5947d326930SKishon Vijay Abraham I 5957d326930SKishon Vijay Abraham I dev_dbg(dev, "IO voltage switched to %dmV\n", iov); 5967d326930SKishon Vijay Abraham I return 0; 5977d326930SKishon Vijay Abraham I } 5987d326930SKishon Vijay Abraham I 5998d20b2eaSKishon Vijay Abraham I static void sdhci_omap_set_timing(struct sdhci_omap_host *omap_host, u8 timing) 6008d20b2eaSKishon Vijay Abraham I { 6018d20b2eaSKishon Vijay Abraham I int ret; 6028d20b2eaSKishon Vijay Abraham I struct pinctrl_state *pinctrl_state; 6038d20b2eaSKishon Vijay Abraham I struct device *dev = omap_host->dev; 6048d20b2eaSKishon Vijay Abraham I 6058d20b2eaSKishon Vijay Abraham I if (!(omap_host->flags & SDHCI_OMAP_REQUIRE_IODELAY)) 6068d20b2eaSKishon Vijay Abraham I return; 6078d20b2eaSKishon Vijay Abraham I 6088d20b2eaSKishon Vijay Abraham I if (omap_host->timing == timing) 6098d20b2eaSKishon Vijay Abraham I return; 6108d20b2eaSKishon Vijay Abraham I 6118d20b2eaSKishon Vijay Abraham I sdhci_omap_stop_clock(omap_host); 6128d20b2eaSKishon Vijay Abraham I 6138d20b2eaSKishon Vijay Abraham I pinctrl_state = omap_host->pinctrl_state[timing]; 6148d20b2eaSKishon Vijay Abraham I ret = pinctrl_select_state(omap_host->pinctrl, pinctrl_state); 6158d20b2eaSKishon Vijay Abraham I if (ret) { 6168d20b2eaSKishon Vijay Abraham I dev_err(dev, "failed to select pinctrl state\n"); 6178d20b2eaSKishon Vijay Abraham I return; 6188d20b2eaSKishon Vijay Abraham I } 6198d20b2eaSKishon Vijay Abraham I 6208d20b2eaSKishon Vijay Abraham I sdhci_omap_start_clock(omap_host); 6218d20b2eaSKishon Vijay Abraham I omap_host->timing = timing; 6228d20b2eaSKishon Vijay Abraham I } 6238d20b2eaSKishon Vijay Abraham I 624300df508SKishon Vijay Abraham I static void sdhci_omap_set_power_mode(struct sdhci_omap_host *omap_host, 625300df508SKishon Vijay Abraham I u8 power_mode) 626300df508SKishon Vijay Abraham I { 6279fc2cd76SKishon Vijay Abraham I if (omap_host->bus_mode == MMC_POWER_OFF) 6289fc2cd76SKishon Vijay Abraham I sdhci_omap_disable_tuning(omap_host); 629300df508SKishon Vijay Abraham I omap_host->power_mode = power_mode; 630300df508SKishon Vijay Abraham I } 631300df508SKishon Vijay Abraham I 6327d326930SKishon Vijay Abraham I static void sdhci_omap_set_bus_mode(struct sdhci_omap_host *omap_host, 6337d326930SKishon Vijay Abraham I unsigned int mode) 6347d326930SKishon Vijay Abraham I { 6357d326930SKishon Vijay Abraham I u32 reg; 6367d326930SKishon Vijay Abraham I 6377d326930SKishon Vijay Abraham I if (omap_host->bus_mode == mode) 6387d326930SKishon Vijay Abraham I return; 6397d326930SKishon Vijay Abraham I 6407d326930SKishon Vijay Abraham I reg = sdhci_omap_readl(omap_host, SDHCI_OMAP_CON); 6417d326930SKishon Vijay Abraham I if (mode == MMC_BUSMODE_OPENDRAIN) 6427d326930SKishon Vijay Abraham I reg |= CON_OD; 6437d326930SKishon Vijay Abraham I else 6447d326930SKishon Vijay Abraham I reg &= ~CON_OD; 6457d326930SKishon Vijay Abraham I sdhci_omap_writel(omap_host, SDHCI_OMAP_CON, reg); 6467d326930SKishon Vijay Abraham I 6477d326930SKishon Vijay Abraham I omap_host->bus_mode = mode; 6487d326930SKishon Vijay Abraham I } 6497d326930SKishon Vijay Abraham I 650ddde0e7dSColin Ian King static void sdhci_omap_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) 6517d326930SKishon Vijay Abraham I { 6527d326930SKishon Vijay Abraham I struct sdhci_host *host = mmc_priv(mmc); 6537d326930SKishon Vijay Abraham I struct sdhci_pltfm_host *pltfm_host; 6547d326930SKishon Vijay Abraham I struct sdhci_omap_host *omap_host; 6557d326930SKishon Vijay Abraham I 6567d326930SKishon Vijay Abraham I pltfm_host = sdhci_priv(host); 6577d326930SKishon Vijay Abraham I omap_host = sdhci_pltfm_priv(pltfm_host); 6587d326930SKishon Vijay Abraham I 6597d326930SKishon Vijay Abraham I sdhci_omap_set_bus_mode(omap_host, ios->bus_mode); 6608d20b2eaSKishon Vijay Abraham I sdhci_omap_set_timing(omap_host, ios->timing); 6617d326930SKishon Vijay Abraham I sdhci_set_ios(mmc, ios); 662300df508SKishon Vijay Abraham I sdhci_omap_set_power_mode(omap_host, ios->power_mode); 6637d326930SKishon Vijay Abraham I } 6647d326930SKishon Vijay Abraham I 6657d326930SKishon Vijay Abraham I static u16 sdhci_omap_calc_divisor(struct sdhci_pltfm_host *host, 6667d326930SKishon Vijay Abraham I unsigned int clock) 6677d326930SKishon Vijay Abraham I { 6687d326930SKishon Vijay Abraham I u16 dsor; 6697d326930SKishon Vijay Abraham I 6707d326930SKishon Vijay Abraham I dsor = DIV_ROUND_UP(clk_get_rate(host->clk), clock); 6717d326930SKishon Vijay Abraham I if (dsor > SYSCTL_CLKD_MAX) 6727d326930SKishon Vijay Abraham I dsor = SYSCTL_CLKD_MAX; 6737d326930SKishon Vijay Abraham I 6747d326930SKishon Vijay Abraham I return dsor; 6757d326930SKishon Vijay Abraham I } 6767d326930SKishon Vijay Abraham I 6777d326930SKishon Vijay Abraham I static void sdhci_omap_start_clock(struct sdhci_omap_host *omap_host) 6787d326930SKishon Vijay Abraham I { 6797d326930SKishon Vijay Abraham I u32 reg; 6807d326930SKishon Vijay Abraham I 6817d326930SKishon Vijay Abraham I reg = sdhci_omap_readl(omap_host, SDHCI_OMAP_SYSCTL); 6827d326930SKishon Vijay Abraham I reg |= SYSCTL_CEN; 6837d326930SKishon Vijay Abraham I sdhci_omap_writel(omap_host, SDHCI_OMAP_SYSCTL, reg); 6847d326930SKishon Vijay Abraham I } 6857d326930SKishon Vijay Abraham I 6867d326930SKishon Vijay Abraham I static void sdhci_omap_stop_clock(struct sdhci_omap_host *omap_host) 6877d326930SKishon Vijay Abraham I { 6887d326930SKishon Vijay Abraham I u32 reg; 6897d326930SKishon Vijay Abraham I 6907d326930SKishon Vijay Abraham I reg = sdhci_omap_readl(omap_host, SDHCI_OMAP_SYSCTL); 6917d326930SKishon Vijay Abraham I reg &= ~SYSCTL_CEN; 6927d326930SKishon Vijay Abraham I sdhci_omap_writel(omap_host, SDHCI_OMAP_SYSCTL, reg); 6937d326930SKishon Vijay Abraham I } 6947d326930SKishon Vijay Abraham I 6957d326930SKishon Vijay Abraham I static void sdhci_omap_set_clock(struct sdhci_host *host, unsigned int clock) 6967d326930SKishon Vijay Abraham I { 6977d326930SKishon Vijay Abraham I struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); 6987d326930SKishon Vijay Abraham I struct sdhci_omap_host *omap_host = sdhci_pltfm_priv(pltfm_host); 6997d326930SKishon Vijay Abraham I unsigned long clkdiv; 7007d326930SKishon Vijay Abraham I 7017d326930SKishon Vijay Abraham I sdhci_omap_stop_clock(omap_host); 7027d326930SKishon Vijay Abraham I 7037d326930SKishon Vijay Abraham I if (!clock) 7047d326930SKishon Vijay Abraham I return; 7057d326930SKishon Vijay Abraham I 7067d326930SKishon Vijay Abraham I clkdiv = sdhci_omap_calc_divisor(pltfm_host, clock); 7077d326930SKishon Vijay Abraham I clkdiv = (clkdiv & SYSCTL_CLKD_MASK) << SYSCTL_CLKD_SHIFT; 7087d326930SKishon Vijay Abraham I sdhci_enable_clk(host, clkdiv); 7097d326930SKishon Vijay Abraham I 7107d326930SKishon Vijay Abraham I sdhci_omap_start_clock(omap_host); 7117d326930SKishon Vijay Abraham I } 7127d326930SKishon Vijay Abraham I 713ddde0e7dSColin Ian King static void sdhci_omap_set_power(struct sdhci_host *host, unsigned char mode, 7147d326930SKishon Vijay Abraham I unsigned short vdd) 7157d326930SKishon Vijay Abraham I { 7167d326930SKishon Vijay Abraham I struct mmc_host *mmc = host->mmc; 7177d326930SKishon Vijay Abraham I 7188e0e7bd3STony Lindgren if (!IS_ERR(mmc->supply.vmmc)) 7197d326930SKishon Vijay Abraham I mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, vdd); 7207d326930SKishon Vijay Abraham I } 7217d326930SKishon Vijay Abraham I 722c66e21fdSTony Lindgren /* 723c66e21fdSTony Lindgren * MMCHS_HL_HWINFO has the MADMA_EN bit set if the controller instance 724c66e21fdSTony Lindgren * is connected to L3 interconnect and is bus master capable. Note that 725c66e21fdSTony Lindgren * the MMCHS_HL_HWINFO register is in the module registers before the 726c66e21fdSTony Lindgren * omap registers and sdhci registers. The offset can vary for omap 727c66e21fdSTony Lindgren * registers depending on the SoC. Do not use sdhci_omap_readl() here. 728c66e21fdSTony Lindgren */ 729c66e21fdSTony Lindgren static bool sdhci_omap_has_adma(struct sdhci_omap_host *omap_host, int offset) 730c66e21fdSTony Lindgren { 731c66e21fdSTony Lindgren /* MMCHS_HL_HWINFO register is only available on omap4 and later */ 732c66e21fdSTony Lindgren if (offset < 0x200) 733c66e21fdSTony Lindgren return false; 734c66e21fdSTony Lindgren 735c66e21fdSTony Lindgren return readl(omap_host->base + 4) & 1; 736c66e21fdSTony Lindgren } 737c66e21fdSTony Lindgren 7387d326930SKishon Vijay Abraham I static int sdhci_omap_enable_dma(struct sdhci_host *host) 7397d326930SKishon Vijay Abraham I { 7407d326930SKishon Vijay Abraham I u32 reg; 7417d326930SKishon Vijay Abraham I struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); 7427d326930SKishon Vijay Abraham I struct sdhci_omap_host *omap_host = sdhci_pltfm_priv(pltfm_host); 7437d326930SKishon Vijay Abraham I 7447d326930SKishon Vijay Abraham I reg = sdhci_omap_readl(omap_host, SDHCI_OMAP_CON); 745195fadb7SChunyan Zhang reg &= ~CON_DMA_MASTER; 746195fadb7SChunyan Zhang /* Switch to DMA slave mode when using external DMA */ 747195fadb7SChunyan Zhang if (!host->use_external_dma) 7487d326930SKishon Vijay Abraham I reg |= CON_DMA_MASTER; 749195fadb7SChunyan Zhang 7507d326930SKishon Vijay Abraham I sdhci_omap_writel(omap_host, SDHCI_OMAP_CON, reg); 7517d326930SKishon Vijay Abraham I 7527d326930SKishon Vijay Abraham I return 0; 7537d326930SKishon Vijay Abraham I } 7547d326930SKishon Vijay Abraham I 755ddde0e7dSColin Ian King static unsigned int sdhci_omap_get_min_clock(struct sdhci_host *host) 7567d326930SKishon Vijay Abraham I { 7577d326930SKishon Vijay Abraham I struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); 7587d326930SKishon Vijay Abraham I 7597d326930SKishon Vijay Abraham I return clk_get_rate(pltfm_host->clk) / SYSCTL_CLKD_MAX; 7607d326930SKishon Vijay Abraham I } 7617d326930SKishon Vijay Abraham I 7627d326930SKishon Vijay Abraham I static void sdhci_omap_set_bus_width(struct sdhci_host *host, int width) 7637d326930SKishon Vijay Abraham I { 7647d326930SKishon Vijay Abraham I struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); 7657d326930SKishon Vijay Abraham I struct sdhci_omap_host *omap_host = sdhci_pltfm_priv(pltfm_host); 7667d326930SKishon Vijay Abraham I u32 reg; 7677d326930SKishon Vijay Abraham I 7687d326930SKishon Vijay Abraham I reg = sdhci_omap_readl(omap_host, SDHCI_OMAP_CON); 7697d326930SKishon Vijay Abraham I if (width == MMC_BUS_WIDTH_8) 7707d326930SKishon Vijay Abraham I reg |= CON_DW8; 7717d326930SKishon Vijay Abraham I else 7727d326930SKishon Vijay Abraham I reg &= ~CON_DW8; 7737d326930SKishon Vijay Abraham I sdhci_omap_writel(omap_host, SDHCI_OMAP_CON, reg); 7747d326930SKishon Vijay Abraham I 7757d326930SKishon Vijay Abraham I sdhci_set_bus_width(host, width); 7767d326930SKishon Vijay Abraham I } 7777d326930SKishon Vijay Abraham I 7787d326930SKishon Vijay Abraham I static void sdhci_omap_init_74_clocks(struct sdhci_host *host, u8 power_mode) 7797d326930SKishon Vijay Abraham I { 7807d326930SKishon Vijay Abraham I u32 reg; 7817d326930SKishon Vijay Abraham I ktime_t timeout; 7827d326930SKishon Vijay Abraham I struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); 7837d326930SKishon Vijay Abraham I struct sdhci_omap_host *omap_host = sdhci_pltfm_priv(pltfm_host); 7847d326930SKishon Vijay Abraham I 7857d326930SKishon Vijay Abraham I if (omap_host->power_mode == power_mode) 7867d326930SKishon Vijay Abraham I return; 7877d326930SKishon Vijay Abraham I 7887d326930SKishon Vijay Abraham I if (power_mode != MMC_POWER_ON) 7897d326930SKishon Vijay Abraham I return; 7907d326930SKishon Vijay Abraham I 7917d326930SKishon Vijay Abraham I disable_irq(host->irq); 7927d326930SKishon Vijay Abraham I 7937d326930SKishon Vijay Abraham I reg = sdhci_omap_readl(omap_host, SDHCI_OMAP_CON); 7947d326930SKishon Vijay Abraham I reg |= CON_INIT; 7957d326930SKishon Vijay Abraham I sdhci_omap_writel(omap_host, SDHCI_OMAP_CON, reg); 7967d326930SKishon Vijay Abraham I sdhci_omap_writel(omap_host, SDHCI_OMAP_CMD, 0x0); 7977d326930SKishon Vijay Abraham I 7987d326930SKishon Vijay Abraham I /* wait 1ms */ 7997d326930SKishon Vijay Abraham I timeout = ktime_add_ms(ktime_get(), SDHCI_OMAP_TIMEOUT); 8009f0ea0bdSAdrian Hunter while (1) { 8019f0ea0bdSAdrian Hunter bool timedout = ktime_after(ktime_get(), timeout); 8029f0ea0bdSAdrian Hunter 8039f0ea0bdSAdrian Hunter if (sdhci_omap_readl(omap_host, SDHCI_OMAP_STAT) & INT_CC_EN) 8049f0ea0bdSAdrian Hunter break; 8059f0ea0bdSAdrian Hunter if (WARN_ON(timedout)) 8067d326930SKishon Vijay Abraham I return; 8077d326930SKishon Vijay Abraham I usleep_range(5, 10); 8087d326930SKishon Vijay Abraham I } 8097d326930SKishon Vijay Abraham I 8107d326930SKishon Vijay Abraham I reg = sdhci_omap_readl(omap_host, SDHCI_OMAP_CON); 8117d326930SKishon Vijay Abraham I reg &= ~CON_INIT; 8127d326930SKishon Vijay Abraham I sdhci_omap_writel(omap_host, SDHCI_OMAP_CON, reg); 8137d326930SKishon Vijay Abraham I sdhci_omap_writel(omap_host, SDHCI_OMAP_STAT, INT_CC_EN); 8147d326930SKishon Vijay Abraham I 8157d326930SKishon Vijay Abraham I enable_irq(host->irq); 8167d326930SKishon Vijay Abraham I } 8177d326930SKishon Vijay Abraham I 81827ceb7e0SKishon Vijay Abraham I static void sdhci_omap_set_uhs_signaling(struct sdhci_host *host, 81927ceb7e0SKishon Vijay Abraham I unsigned int timing) 82027ceb7e0SKishon Vijay Abraham I { 82127ceb7e0SKishon Vijay Abraham I u32 reg; 82227ceb7e0SKishon Vijay Abraham I struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); 82327ceb7e0SKishon Vijay Abraham I struct sdhci_omap_host *omap_host = sdhci_pltfm_priv(pltfm_host); 82427ceb7e0SKishon Vijay Abraham I 82527ceb7e0SKishon Vijay Abraham I sdhci_omap_stop_clock(omap_host); 82627ceb7e0SKishon Vijay Abraham I 82727ceb7e0SKishon Vijay Abraham I reg = sdhci_omap_readl(omap_host, SDHCI_OMAP_CON); 82827ceb7e0SKishon Vijay Abraham I if (timing == MMC_TIMING_UHS_DDR50 || timing == MMC_TIMING_MMC_DDR52) 82927ceb7e0SKishon Vijay Abraham I reg |= CON_DDR; 83027ceb7e0SKishon Vijay Abraham I else 83127ceb7e0SKishon Vijay Abraham I reg &= ~CON_DDR; 83227ceb7e0SKishon Vijay Abraham I sdhci_omap_writel(omap_host, SDHCI_OMAP_CON, reg); 83327ceb7e0SKishon Vijay Abraham I 83427ceb7e0SKishon Vijay Abraham I sdhci_set_uhs_signaling(host, timing); 83527ceb7e0SKishon Vijay Abraham I sdhci_omap_start_clock(omap_host); 83627ceb7e0SKishon Vijay Abraham I } 83727ceb7e0SKishon Vijay Abraham I 8389e84a2e6SFaiz Abbas #define MMC_TIMEOUT_US 20000 /* 20000 micro Sec */ 8392198eeffSYueHaibing static void sdhci_omap_reset(struct sdhci_host *host, u8 mask) 8405b0d6210SFaiz Abbas { 8415b0d6210SFaiz Abbas struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); 8425b0d6210SFaiz Abbas struct sdhci_omap_host *omap_host = sdhci_pltfm_priv(pltfm_host); 8439e84a2e6SFaiz Abbas unsigned long limit = MMC_TIMEOUT_US; 8449e84a2e6SFaiz Abbas unsigned long i = 0; 84553f9460eSTony Lindgren u32 sysc; 84653f9460eSTony Lindgren 84753f9460eSTony Lindgren /* Save target module sysconfig configured by SoC PM layer */ 84853f9460eSTony Lindgren if (mask & SDHCI_RESET_ALL) 84953f9460eSTony Lindgren sysc = sdhci_omap_readl(omap_host, SDHCI_OMAP_SYSCONFIG); 8505b0d6210SFaiz Abbas 8515b0d6210SFaiz Abbas /* Don't reset data lines during tuning operation */ 8525b0d6210SFaiz Abbas if (omap_host->is_tuning) 8535b0d6210SFaiz Abbas mask &= ~SDHCI_RESET_DATA; 8545b0d6210SFaiz Abbas 8559e84a2e6SFaiz Abbas if (omap_host->flags & SDHCI_OMAP_SPECIAL_RESET) { 8569e84a2e6SFaiz Abbas sdhci_writeb(host, mask, SDHCI_SOFTWARE_RESET); 8579e84a2e6SFaiz Abbas while ((!(sdhci_readb(host, SDHCI_SOFTWARE_RESET) & mask)) && 8589e84a2e6SFaiz Abbas (i++ < limit)) 8599e84a2e6SFaiz Abbas udelay(1); 8609e84a2e6SFaiz Abbas i = 0; 8619e84a2e6SFaiz Abbas while ((sdhci_readb(host, SDHCI_SOFTWARE_RESET) & mask) && 8629e84a2e6SFaiz Abbas (i++ < limit)) 8639e84a2e6SFaiz Abbas udelay(1); 8649e84a2e6SFaiz Abbas 8659e84a2e6SFaiz Abbas if (sdhci_readb(host, SDHCI_SOFTWARE_RESET) & mask) 8669e84a2e6SFaiz Abbas dev_err(mmc_dev(host->mmc), 8679e84a2e6SFaiz Abbas "Timeout waiting on controller reset in %s\n", 8689e84a2e6SFaiz Abbas __func__); 86953f9460eSTony Lindgren 87053f9460eSTony Lindgren goto restore_sysc; 8719e84a2e6SFaiz Abbas } 8729e84a2e6SFaiz Abbas 8735b0d6210SFaiz Abbas sdhci_reset(host, mask); 87453f9460eSTony Lindgren 87553f9460eSTony Lindgren restore_sysc: 87653f9460eSTony Lindgren if (mask & SDHCI_RESET_ALL) 87753f9460eSTony Lindgren sdhci_omap_writel(omap_host, SDHCI_OMAP_SYSCONFIG, sysc); 8785b0d6210SFaiz Abbas } 8795b0d6210SFaiz Abbas 8805c41ea6dSFaiz Abbas #define CMD_ERR_MASK (SDHCI_INT_CRC | SDHCI_INT_END_BIT | SDHCI_INT_INDEX |\ 8815c41ea6dSFaiz Abbas SDHCI_INT_TIMEOUT) 8825c41ea6dSFaiz Abbas #define CMD_MASK (CMD_ERR_MASK | SDHCI_INT_RESPONSE) 8835c41ea6dSFaiz Abbas 8845c41ea6dSFaiz Abbas static u32 sdhci_omap_irq(struct sdhci_host *host, u32 intmask) 8855c41ea6dSFaiz Abbas { 8865c41ea6dSFaiz Abbas struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); 8875c41ea6dSFaiz Abbas struct sdhci_omap_host *omap_host = sdhci_pltfm_priv(pltfm_host); 8885c41ea6dSFaiz Abbas 8895c41ea6dSFaiz Abbas if (omap_host->is_tuning && host->cmd && !host->data_early && 8905c41ea6dSFaiz Abbas (intmask & CMD_ERR_MASK)) { 8915c41ea6dSFaiz Abbas 8925c41ea6dSFaiz Abbas /* 8935c41ea6dSFaiz Abbas * Since we are not resetting data lines during tuning 8945c41ea6dSFaiz Abbas * operation, data error or data complete interrupts 8955c41ea6dSFaiz Abbas * might still arrive. Mark this request as a failure 8965c41ea6dSFaiz Abbas * but still wait for the data interrupt 8975c41ea6dSFaiz Abbas */ 8985c41ea6dSFaiz Abbas if (intmask & SDHCI_INT_TIMEOUT) 8995c41ea6dSFaiz Abbas host->cmd->error = -ETIMEDOUT; 9005c41ea6dSFaiz Abbas else 9015c41ea6dSFaiz Abbas host->cmd->error = -EILSEQ; 9025c41ea6dSFaiz Abbas 9035c41ea6dSFaiz Abbas host->cmd = NULL; 9045c41ea6dSFaiz Abbas 9055c41ea6dSFaiz Abbas /* 9065c41ea6dSFaiz Abbas * Sometimes command error interrupts and command complete 9075c41ea6dSFaiz Abbas * interrupt will arrive together. Clear all command related 9085c41ea6dSFaiz Abbas * interrupts here. 9095c41ea6dSFaiz Abbas */ 9105c41ea6dSFaiz Abbas sdhci_writel(host, intmask & CMD_MASK, SDHCI_INT_STATUS); 9115c41ea6dSFaiz Abbas intmask &= ~CMD_MASK; 9125c41ea6dSFaiz Abbas } 9135c41ea6dSFaiz Abbas 9145c41ea6dSFaiz Abbas return intmask; 9155c41ea6dSFaiz Abbas } 9165c41ea6dSFaiz Abbas 9175da5e494SFaiz Abbas static void sdhci_omap_set_timeout(struct sdhci_host *host, 9185da5e494SFaiz Abbas struct mmc_command *cmd) 9195da5e494SFaiz Abbas { 9205da5e494SFaiz Abbas if (cmd->opcode == MMC_ERASE) 9215da5e494SFaiz Abbas sdhci_set_data_timeout_irq(host, false); 9225da5e494SFaiz Abbas 9235da5e494SFaiz Abbas __sdhci_set_timeout(host, cmd); 9245da5e494SFaiz Abbas } 9255da5e494SFaiz Abbas 9267d326930SKishon Vijay Abraham I static struct sdhci_ops sdhci_omap_ops = { 9277d326930SKishon Vijay Abraham I .set_clock = sdhci_omap_set_clock, 9287d326930SKishon Vijay Abraham I .set_power = sdhci_omap_set_power, 9297d326930SKishon Vijay Abraham I .enable_dma = sdhci_omap_enable_dma, 9307d326930SKishon Vijay Abraham I .get_max_clock = sdhci_pltfm_clk_get_max_clock, 9317d326930SKishon Vijay Abraham I .get_min_clock = sdhci_omap_get_min_clock, 9327d326930SKishon Vijay Abraham I .set_bus_width = sdhci_omap_set_bus_width, 9337d326930SKishon Vijay Abraham I .platform_send_init_74_clocks = sdhci_omap_init_74_clocks, 9345b0d6210SFaiz Abbas .reset = sdhci_omap_reset, 93527ceb7e0SKishon Vijay Abraham I .set_uhs_signaling = sdhci_omap_set_uhs_signaling, 9365c41ea6dSFaiz Abbas .irq = sdhci_omap_irq, 9375da5e494SFaiz Abbas .set_timeout = sdhci_omap_set_timeout, 9387d326930SKishon Vijay Abraham I }; 9397d326930SKishon Vijay Abraham I 940de5ccd2aSTony Lindgren static unsigned int sdhci_omap_regulator_get_caps(struct device *dev, 941de5ccd2aSTony Lindgren const char *name) 9427d326930SKishon Vijay Abraham I { 943de5ccd2aSTony Lindgren struct regulator *reg; 944de5ccd2aSTony Lindgren unsigned int caps = 0; 9457d326930SKishon Vijay Abraham I 946de5ccd2aSTony Lindgren reg = regulator_get(dev, name); 947de5ccd2aSTony Lindgren if (IS_ERR(reg)) 948de5ccd2aSTony Lindgren return ~0U; 949de5ccd2aSTony Lindgren 950de5ccd2aSTony Lindgren if (regulator_is_supported_voltage(reg, 1700000, 1950000)) 951de5ccd2aSTony Lindgren caps |= SDHCI_CAN_VDD_180; 952de5ccd2aSTony Lindgren if (regulator_is_supported_voltage(reg, 2700000, 3150000)) 953de5ccd2aSTony Lindgren caps |= SDHCI_CAN_VDD_300; 954de5ccd2aSTony Lindgren if (regulator_is_supported_voltage(reg, 3150000, 3600000)) 955de5ccd2aSTony Lindgren caps |= SDHCI_CAN_VDD_330; 956de5ccd2aSTony Lindgren 957de5ccd2aSTony Lindgren regulator_put(reg); 958de5ccd2aSTony Lindgren 959de5ccd2aSTony Lindgren return caps; 9607d326930SKishon Vijay Abraham I } 9617d326930SKishon Vijay Abraham I 962de5ccd2aSTony Lindgren static int sdhci_omap_set_capabilities(struct sdhci_host *host) 963de5ccd2aSTony Lindgren { 964de5ccd2aSTony Lindgren struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); 965de5ccd2aSTony Lindgren struct sdhci_omap_host *omap_host = sdhci_pltfm_priv(pltfm_host); 966de5ccd2aSTony Lindgren struct device *dev = omap_host->dev; 967de5ccd2aSTony Lindgren const u32 mask = SDHCI_CAN_VDD_180 | SDHCI_CAN_VDD_300 | SDHCI_CAN_VDD_330; 968de5ccd2aSTony Lindgren unsigned int pbias, vqmmc, caps = 0; 969de5ccd2aSTony Lindgren u32 reg; 970de5ccd2aSTony Lindgren 971de5ccd2aSTony Lindgren pbias = sdhci_omap_regulator_get_caps(dev, "pbias"); 972de5ccd2aSTony Lindgren vqmmc = sdhci_omap_regulator_get_caps(dev, "vqmmc"); 973de5ccd2aSTony Lindgren caps = pbias & vqmmc; 974de5ccd2aSTony Lindgren 975de5ccd2aSTony Lindgren if (pbias != ~0U && vqmmc == ~0U) 976de5ccd2aSTony Lindgren dev_warn(dev, "vqmmc regulator missing for pbias\n"); 977de5ccd2aSTony Lindgren else if (caps == ~0U) 978de5ccd2aSTony Lindgren return 0; 979de5ccd2aSTony Lindgren 980de5ccd2aSTony Lindgren /* 981de5ccd2aSTony Lindgren * Quirk handling to allow 3.0V vqmmc with a valid 3.3V PBIAS. This is 982de5ccd2aSTony Lindgren * needed for 3.0V ldo9_reg on omap5 at least. 983de5ccd2aSTony Lindgren */ 984de5ccd2aSTony Lindgren if (pbias != ~0U && (pbias & SDHCI_CAN_VDD_330) && 985de5ccd2aSTony Lindgren (vqmmc & SDHCI_CAN_VDD_300)) 986de5ccd2aSTony Lindgren caps |= SDHCI_CAN_VDD_330; 987de5ccd2aSTony Lindgren 9887d326930SKishon Vijay Abraham I /* voltage capabilities might be set by boot loader, clear it */ 9897d326930SKishon Vijay Abraham I reg = sdhci_omap_readl(omap_host, SDHCI_OMAP_CAPA); 9907d326930SKishon Vijay Abraham I reg &= ~(CAPA_VS18 | CAPA_VS30 | CAPA_VS33); 9917d326930SKishon Vijay Abraham I 992de5ccd2aSTony Lindgren if (caps & SDHCI_CAN_VDD_180) 9937d326930SKishon Vijay Abraham I reg |= CAPA_VS18; 9947d326930SKishon Vijay Abraham I 995de5ccd2aSTony Lindgren if (caps & SDHCI_CAN_VDD_300) 996de5ccd2aSTony Lindgren reg |= CAPA_VS30; 997de5ccd2aSTony Lindgren 998de5ccd2aSTony Lindgren if (caps & SDHCI_CAN_VDD_330) 999de5ccd2aSTony Lindgren reg |= CAPA_VS33; 1000de5ccd2aSTony Lindgren 10017d326930SKishon Vijay Abraham I sdhci_omap_writel(omap_host, SDHCI_OMAP_CAPA, reg); 10027d326930SKishon Vijay Abraham I 1003de5ccd2aSTony Lindgren host->caps &= ~mask; 1004de5ccd2aSTony Lindgren host->caps |= caps; 10057d326930SKishon Vijay Abraham I 1006de5ccd2aSTony Lindgren return 0; 10077d326930SKishon Vijay Abraham I } 10087d326930SKishon Vijay Abraham I 10097d326930SKishon Vijay Abraham I static const struct sdhci_pltfm_data sdhci_omap_pdata = { 10107d326930SKishon Vijay Abraham I .quirks = SDHCI_QUIRK_BROKEN_CARD_DETECTION | 10117d326930SKishon Vijay Abraham I SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK | 10127d326930SKishon Vijay Abraham I SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN | 10137d326930SKishon Vijay Abraham I SDHCI_QUIRK_NO_HISPD_BIT | 10147d326930SKishon Vijay Abraham I SDHCI_QUIRK_BROKEN_ADMA_ZEROLEN_DESC, 1015e0b2dbcfSKishon Vijay Abraham I .quirks2 = SDHCI_QUIRK2_ACMD23_BROKEN | 1016e0b2dbcfSKishon Vijay Abraham I SDHCI_QUIRK2_PRESET_VALUE_BROKEN | 101725f80d86SKishon Vijay Abraham I SDHCI_QUIRK2_RSP_136_HAS_CRC | 101825f80d86SKishon Vijay Abraham I SDHCI_QUIRK2_DISABLE_HW_TIMEOUT, 10197d326930SKishon Vijay Abraham I .ops = &sdhci_omap_ops, 10207d326930SKishon Vijay Abraham I }; 10217d326930SKishon Vijay Abraham I 102242b380b6STony Lindgren static const struct sdhci_omap_data omap2430_data = { 102342b380b6STony Lindgren .omap_offset = 0, 102442b380b6STony Lindgren .offset = 0x100, 102542b380b6STony Lindgren }; 102642b380b6STony Lindgren 102742b380b6STony Lindgren static const struct sdhci_omap_data omap3_data = { 102842b380b6STony Lindgren .omap_offset = 0, 102942b380b6STony Lindgren .offset = 0x100, 103042b380b6STony Lindgren }; 103142b380b6STony Lindgren 1032de5ccd2aSTony Lindgren static const struct sdhci_omap_data omap4_data = { 103342b380b6STony Lindgren .omap_offset = 0x100, 1034de5ccd2aSTony Lindgren .offset = 0x200, 1035de5ccd2aSTony Lindgren .flags = SDHCI_OMAP_SPECIAL_RESET, 1036de5ccd2aSTony Lindgren }; 1037de5ccd2aSTony Lindgren 1038de5ccd2aSTony Lindgren static const struct sdhci_omap_data omap5_data = { 103942b380b6STony Lindgren .omap_offset = 0x100, 1040de5ccd2aSTony Lindgren .offset = 0x200, 1041de5ccd2aSTony Lindgren .flags = SDHCI_OMAP_SPECIAL_RESET, 1042de5ccd2aSTony Lindgren }; 1043de5ccd2aSTony Lindgren 10446d75df75SKishon Vijay Abraham I static const struct sdhci_omap_data k2g_data = { 104542b380b6STony Lindgren .omap_offset = 0x100, 10466d75df75SKishon Vijay Abraham I .offset = 0x200, 10476d75df75SKishon Vijay Abraham I }; 10486d75df75SKishon Vijay Abraham I 1049d6fe4928SFaiz Abbas static const struct sdhci_omap_data am335_data = { 105042b380b6STony Lindgren .omap_offset = 0x100, 1051d6fe4928SFaiz Abbas .offset = 0x200, 10529e84a2e6SFaiz Abbas .flags = SDHCI_OMAP_SPECIAL_RESET, 1053d6fe4928SFaiz Abbas }; 1054d6fe4928SFaiz Abbas 1055d6fe4928SFaiz Abbas static const struct sdhci_omap_data am437_data = { 105642b380b6STony Lindgren .omap_offset = 0x100, 1057d6fe4928SFaiz Abbas .offset = 0x200, 10589e84a2e6SFaiz Abbas .flags = SDHCI_OMAP_SPECIAL_RESET, 1059d6fe4928SFaiz Abbas }; 1060d6fe4928SFaiz Abbas 10617d326930SKishon Vijay Abraham I static const struct sdhci_omap_data dra7_data = { 106242b380b6STony Lindgren .omap_offset = 0x100, 10637d326930SKishon Vijay Abraham I .offset = 0x200, 10648d20b2eaSKishon Vijay Abraham I .flags = SDHCI_OMAP_REQUIRE_IODELAY, 10657d326930SKishon Vijay Abraham I }; 10667d326930SKishon Vijay Abraham I 10677d326930SKishon Vijay Abraham I static const struct of_device_id omap_sdhci_match[] = { 106842b380b6STony Lindgren { .compatible = "ti,omap2430-sdhci", .data = &omap2430_data }, 106942b380b6STony Lindgren { .compatible = "ti,omap3-sdhci", .data = &omap3_data }, 1070de5ccd2aSTony Lindgren { .compatible = "ti,omap4-sdhci", .data = &omap4_data }, 1071de5ccd2aSTony Lindgren { .compatible = "ti,omap5-sdhci", .data = &omap5_data }, 10727d326930SKishon Vijay Abraham I { .compatible = "ti,dra7-sdhci", .data = &dra7_data }, 10736d75df75SKishon Vijay Abraham I { .compatible = "ti,k2g-sdhci", .data = &k2g_data }, 1074d6fe4928SFaiz Abbas { .compatible = "ti,am335-sdhci", .data = &am335_data }, 1075d6fe4928SFaiz Abbas { .compatible = "ti,am437-sdhci", .data = &am437_data }, 10767d326930SKishon Vijay Abraham I {}, 10777d326930SKishon Vijay Abraham I }; 10787d326930SKishon Vijay Abraham I MODULE_DEVICE_TABLE(of, omap_sdhci_match); 10797d326930SKishon Vijay Abraham I 10808d20b2eaSKishon Vijay Abraham I static struct pinctrl_state 10818d20b2eaSKishon Vijay Abraham I *sdhci_omap_iodelay_pinctrl_state(struct sdhci_omap_host *omap_host, char *mode, 10828d20b2eaSKishon Vijay Abraham I u32 *caps, u32 capmask) 10838d20b2eaSKishon Vijay Abraham I { 10848d20b2eaSKishon Vijay Abraham I struct device *dev = omap_host->dev; 1085212f4f8aSKishon Vijay Abraham I char *version = omap_host->version; 10868d20b2eaSKishon Vijay Abraham I struct pinctrl_state *pinctrl_state = ERR_PTR(-ENODEV); 1087212f4f8aSKishon Vijay Abraham I char str[20]; 10888d20b2eaSKishon Vijay Abraham I 10898d20b2eaSKishon Vijay Abraham I if (!(*caps & capmask)) 10908d20b2eaSKishon Vijay Abraham I goto ret; 10918d20b2eaSKishon Vijay Abraham I 1092212f4f8aSKishon Vijay Abraham I if (version) { 1093212f4f8aSKishon Vijay Abraham I snprintf(str, 20, "%s-%s", mode, version); 1094212f4f8aSKishon Vijay Abraham I pinctrl_state = pinctrl_lookup_state(omap_host->pinctrl, str); 1095212f4f8aSKishon Vijay Abraham I } 1096212f4f8aSKishon Vijay Abraham I 1097212f4f8aSKishon Vijay Abraham I if (IS_ERR(pinctrl_state)) 10988d20b2eaSKishon Vijay Abraham I pinctrl_state = pinctrl_lookup_state(omap_host->pinctrl, mode); 1099212f4f8aSKishon Vijay Abraham I 11008d20b2eaSKishon Vijay Abraham I if (IS_ERR(pinctrl_state)) { 11018d20b2eaSKishon Vijay Abraham I dev_err(dev, "no pinctrl state for %s mode", mode); 11028d20b2eaSKishon Vijay Abraham I *caps &= ~capmask; 11038d20b2eaSKishon Vijay Abraham I } 11048d20b2eaSKishon Vijay Abraham I 11058d20b2eaSKishon Vijay Abraham I ret: 11068d20b2eaSKishon Vijay Abraham I return pinctrl_state; 11078d20b2eaSKishon Vijay Abraham I } 11088d20b2eaSKishon Vijay Abraham I 11098d20b2eaSKishon Vijay Abraham I static int sdhci_omap_config_iodelay_pinctrl_state(struct sdhci_omap_host 11108d20b2eaSKishon Vijay Abraham I *omap_host) 11118d20b2eaSKishon Vijay Abraham I { 11128d20b2eaSKishon Vijay Abraham I struct device *dev = omap_host->dev; 11138d20b2eaSKishon Vijay Abraham I struct sdhci_host *host = omap_host->host; 11148d20b2eaSKishon Vijay Abraham I struct mmc_host *mmc = host->mmc; 11158d20b2eaSKishon Vijay Abraham I u32 *caps = &mmc->caps; 11168d20b2eaSKishon Vijay Abraham I u32 *caps2 = &mmc->caps2; 11178d20b2eaSKishon Vijay Abraham I struct pinctrl_state *state; 11188d20b2eaSKishon Vijay Abraham I struct pinctrl_state **pinctrl_state; 11198d20b2eaSKishon Vijay Abraham I 11208d20b2eaSKishon Vijay Abraham I if (!(omap_host->flags & SDHCI_OMAP_REQUIRE_IODELAY)) 11218d20b2eaSKishon Vijay Abraham I return 0; 11228d20b2eaSKishon Vijay Abraham I 1123a86854d0SKees Cook pinctrl_state = devm_kcalloc(dev, 1124a86854d0SKees Cook MMC_TIMING_MMC_HS200 + 1, 1125a86854d0SKees Cook sizeof(*pinctrl_state), 1126a86854d0SKees Cook GFP_KERNEL); 11278d20b2eaSKishon Vijay Abraham I if (!pinctrl_state) 11288d20b2eaSKishon Vijay Abraham I return -ENOMEM; 11298d20b2eaSKishon Vijay Abraham I 11308d20b2eaSKishon Vijay Abraham I omap_host->pinctrl = devm_pinctrl_get(omap_host->dev); 11318d20b2eaSKishon Vijay Abraham I if (IS_ERR(omap_host->pinctrl)) { 11328d20b2eaSKishon Vijay Abraham I dev_err(dev, "Cannot get pinctrl\n"); 11338d20b2eaSKishon Vijay Abraham I return PTR_ERR(omap_host->pinctrl); 11348d20b2eaSKishon Vijay Abraham I } 11358d20b2eaSKishon Vijay Abraham I 11368d20b2eaSKishon Vijay Abraham I state = pinctrl_lookup_state(omap_host->pinctrl, "default"); 11378d20b2eaSKishon Vijay Abraham I if (IS_ERR(state)) { 11388d20b2eaSKishon Vijay Abraham I dev_err(dev, "no pinctrl state for default mode\n"); 11398d20b2eaSKishon Vijay Abraham I return PTR_ERR(state); 11408d20b2eaSKishon Vijay Abraham I } 11418d20b2eaSKishon Vijay Abraham I pinctrl_state[MMC_TIMING_LEGACY] = state; 11428d20b2eaSKishon Vijay Abraham I 11438d20b2eaSKishon Vijay Abraham I state = sdhci_omap_iodelay_pinctrl_state(omap_host, "sdr104", caps, 11448d20b2eaSKishon Vijay Abraham I MMC_CAP_UHS_SDR104); 11458d20b2eaSKishon Vijay Abraham I if (!IS_ERR(state)) 11468d20b2eaSKishon Vijay Abraham I pinctrl_state[MMC_TIMING_UHS_SDR104] = state; 11478d20b2eaSKishon Vijay Abraham I 11488d20b2eaSKishon Vijay Abraham I state = sdhci_omap_iodelay_pinctrl_state(omap_host, "ddr50", caps, 11498d20b2eaSKishon Vijay Abraham I MMC_CAP_UHS_DDR50); 11508d20b2eaSKishon Vijay Abraham I if (!IS_ERR(state)) 11518d20b2eaSKishon Vijay Abraham I pinctrl_state[MMC_TIMING_UHS_DDR50] = state; 11528d20b2eaSKishon Vijay Abraham I 11538d20b2eaSKishon Vijay Abraham I state = sdhci_omap_iodelay_pinctrl_state(omap_host, "sdr50", caps, 11548d20b2eaSKishon Vijay Abraham I MMC_CAP_UHS_SDR50); 11558d20b2eaSKishon Vijay Abraham I if (!IS_ERR(state)) 11568d20b2eaSKishon Vijay Abraham I pinctrl_state[MMC_TIMING_UHS_SDR50] = state; 11578d20b2eaSKishon Vijay Abraham I 11588d20b2eaSKishon Vijay Abraham I state = sdhci_omap_iodelay_pinctrl_state(omap_host, "sdr25", caps, 11598d20b2eaSKishon Vijay Abraham I MMC_CAP_UHS_SDR25); 11608d20b2eaSKishon Vijay Abraham I if (!IS_ERR(state)) 11618d20b2eaSKishon Vijay Abraham I pinctrl_state[MMC_TIMING_UHS_SDR25] = state; 11628d20b2eaSKishon Vijay Abraham I 11638d20b2eaSKishon Vijay Abraham I state = sdhci_omap_iodelay_pinctrl_state(omap_host, "sdr12", caps, 11648d20b2eaSKishon Vijay Abraham I MMC_CAP_UHS_SDR12); 11658d20b2eaSKishon Vijay Abraham I if (!IS_ERR(state)) 11668d20b2eaSKishon Vijay Abraham I pinctrl_state[MMC_TIMING_UHS_SDR12] = state; 11678d20b2eaSKishon Vijay Abraham I 11688d20b2eaSKishon Vijay Abraham I state = sdhci_omap_iodelay_pinctrl_state(omap_host, "ddr_1_8v", caps, 11698d20b2eaSKishon Vijay Abraham I MMC_CAP_1_8V_DDR); 11703f402878SKishon Vijay Abraham I if (!IS_ERR(state)) { 11713f402878SKishon Vijay Abraham I pinctrl_state[MMC_TIMING_MMC_DDR52] = state; 11723f402878SKishon Vijay Abraham I } else { 11733f402878SKishon Vijay Abraham I state = sdhci_omap_iodelay_pinctrl_state(omap_host, "ddr_3_3v", 11743f402878SKishon Vijay Abraham I caps, 11753f402878SKishon Vijay Abraham I MMC_CAP_3_3V_DDR); 11768d20b2eaSKishon Vijay Abraham I if (!IS_ERR(state)) 11778d20b2eaSKishon Vijay Abraham I pinctrl_state[MMC_TIMING_MMC_DDR52] = state; 11783f402878SKishon Vijay Abraham I } 11798d20b2eaSKishon Vijay Abraham I 11808d20b2eaSKishon Vijay Abraham I state = sdhci_omap_iodelay_pinctrl_state(omap_host, "hs", caps, 11818d20b2eaSKishon Vijay Abraham I MMC_CAP_SD_HIGHSPEED); 11828d20b2eaSKishon Vijay Abraham I if (!IS_ERR(state)) 11838d20b2eaSKishon Vijay Abraham I pinctrl_state[MMC_TIMING_SD_HS] = state; 11848d20b2eaSKishon Vijay Abraham I 11858d20b2eaSKishon Vijay Abraham I state = sdhci_omap_iodelay_pinctrl_state(omap_host, "hs", caps, 11868d20b2eaSKishon Vijay Abraham I MMC_CAP_MMC_HIGHSPEED); 11878d20b2eaSKishon Vijay Abraham I if (!IS_ERR(state)) 11888d20b2eaSKishon Vijay Abraham I pinctrl_state[MMC_TIMING_MMC_HS] = state; 11898d20b2eaSKishon Vijay Abraham I 11908d20b2eaSKishon Vijay Abraham I state = sdhci_omap_iodelay_pinctrl_state(omap_host, "hs200_1_8v", caps2, 11918d20b2eaSKishon Vijay Abraham I MMC_CAP2_HS200_1_8V_SDR); 11928d20b2eaSKishon Vijay Abraham I if (!IS_ERR(state)) 11938d20b2eaSKishon Vijay Abraham I pinctrl_state[MMC_TIMING_MMC_HS200] = state; 11948d20b2eaSKishon Vijay Abraham I 11958d20b2eaSKishon Vijay Abraham I omap_host->pinctrl_state = pinctrl_state; 11968d20b2eaSKishon Vijay Abraham I 11978d20b2eaSKishon Vijay Abraham I return 0; 11988d20b2eaSKishon Vijay Abraham I } 11998d20b2eaSKishon Vijay Abraham I 1200212f4f8aSKishon Vijay Abraham I static const struct soc_device_attribute sdhci_omap_soc_devices[] = { 1201212f4f8aSKishon Vijay Abraham I { 1202212f4f8aSKishon Vijay Abraham I .machine = "DRA7[45]*", 1203212f4f8aSKishon Vijay Abraham I .revision = "ES1.[01]", 1204212f4f8aSKishon Vijay Abraham I }, 1205212f4f8aSKishon Vijay Abraham I { 1206212f4f8aSKishon Vijay Abraham I /* sentinel */ 1207212f4f8aSKishon Vijay Abraham I } 1208212f4f8aSKishon Vijay Abraham I }; 1209212f4f8aSKishon Vijay Abraham I 1210*f433e8aaSTony Lindgren static void sdhci_omap_context_save(struct sdhci_omap_host *omap_host); 1211*f433e8aaSTony Lindgren 12127d326930SKishon Vijay Abraham I static int sdhci_omap_probe(struct platform_device *pdev) 12137d326930SKishon Vijay Abraham I { 12147d326930SKishon Vijay Abraham I int ret; 12157d326930SKishon Vijay Abraham I u32 offset; 12167d326930SKishon Vijay Abraham I struct device *dev = &pdev->dev; 12177d326930SKishon Vijay Abraham I struct sdhci_host *host; 12187d326930SKishon Vijay Abraham I struct sdhci_pltfm_host *pltfm_host; 12197d326930SKishon Vijay Abraham I struct sdhci_omap_host *omap_host; 12207d326930SKishon Vijay Abraham I struct mmc_host *mmc; 12217d326930SKishon Vijay Abraham I const struct of_device_id *match; 12227d326930SKishon Vijay Abraham I struct sdhci_omap_data *data; 1223212f4f8aSKishon Vijay Abraham I const struct soc_device_attribute *soc; 1224195fadb7SChunyan Zhang struct resource *regs; 12257d326930SKishon Vijay Abraham I 12267d326930SKishon Vijay Abraham I match = of_match_device(omap_sdhci_match, dev); 12277d326930SKishon Vijay Abraham I if (!match) 12287d326930SKishon Vijay Abraham I return -EINVAL; 12297d326930SKishon Vijay Abraham I 12307d326930SKishon Vijay Abraham I data = (struct sdhci_omap_data *)match->data; 12317d326930SKishon Vijay Abraham I if (!data) { 12327d326930SKishon Vijay Abraham I dev_err(dev, "no sdhci omap data\n"); 12337d326930SKishon Vijay Abraham I return -EINVAL; 12347d326930SKishon Vijay Abraham I } 12357d326930SKishon Vijay Abraham I offset = data->offset; 12367d326930SKishon Vijay Abraham I 1237195fadb7SChunyan Zhang regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); 1238195fadb7SChunyan Zhang if (!regs) 1239195fadb7SChunyan Zhang return -ENXIO; 1240195fadb7SChunyan Zhang 12417d326930SKishon Vijay Abraham I host = sdhci_pltfm_init(pdev, &sdhci_omap_pdata, 12427d326930SKishon Vijay Abraham I sizeof(*omap_host)); 12437d326930SKishon Vijay Abraham I if (IS_ERR(host)) { 12447d326930SKishon Vijay Abraham I dev_err(dev, "Failed sdhci_pltfm_init\n"); 12457d326930SKishon Vijay Abraham I return PTR_ERR(host); 12467d326930SKishon Vijay Abraham I } 12477d326930SKishon Vijay Abraham I 12487d326930SKishon Vijay Abraham I pltfm_host = sdhci_priv(host); 12497d326930SKishon Vijay Abraham I omap_host = sdhci_pltfm_priv(pltfm_host); 12507d326930SKishon Vijay Abraham I omap_host->host = host; 12517d326930SKishon Vijay Abraham I omap_host->base = host->ioaddr; 12527d326930SKishon Vijay Abraham I omap_host->dev = dev; 1253300df508SKishon Vijay Abraham I omap_host->power_mode = MMC_POWER_UNDEFINED; 12548d20b2eaSKishon Vijay Abraham I omap_host->timing = MMC_TIMING_LEGACY; 12558d20b2eaSKishon Vijay Abraham I omap_host->flags = data->flags; 125642b380b6STony Lindgren omap_host->omap_offset = data->omap_offset; 1257*f433e8aaSTony Lindgren omap_host->con = -EINVAL; /* Prevent invalid restore on first resume */ 12587d326930SKishon Vijay Abraham I host->ioaddr += offset; 1259195fadb7SChunyan Zhang host->mapbase = regs->start + offset; 12607d326930SKishon Vijay Abraham I 12617d326930SKishon Vijay Abraham I mmc = host->mmc; 12621d3a2220SKishon Vijay Abraham I sdhci_get_of_property(pdev); 12637d326930SKishon Vijay Abraham I ret = mmc_of_parse(mmc); 12647d326930SKishon Vijay Abraham I if (ret) 12657d326930SKishon Vijay Abraham I goto err_pltfm_free; 12667d326930SKishon Vijay Abraham I 1267212f4f8aSKishon Vijay Abraham I soc = soc_device_match(sdhci_omap_soc_devices); 1268212f4f8aSKishon Vijay Abraham I if (soc) { 1269212f4f8aSKishon Vijay Abraham I omap_host->version = "rev11"; 1270212f4f8aSKishon Vijay Abraham I if (!strcmp(dev_name(dev), "4809c000.mmc")) 1271212f4f8aSKishon Vijay Abraham I mmc->f_max = 96000000; 1272212f4f8aSKishon Vijay Abraham I if (!strcmp(dev_name(dev), "480b4000.mmc")) 1273212f4f8aSKishon Vijay Abraham I mmc->f_max = 48000000; 1274212f4f8aSKishon Vijay Abraham I if (!strcmp(dev_name(dev), "480ad000.mmc")) 1275212f4f8aSKishon Vijay Abraham I mmc->f_max = 48000000; 1276212f4f8aSKishon Vijay Abraham I } 1277212f4f8aSKishon Vijay Abraham I 1278031d2cccSKishon Vijay Abraham I if (!mmc_can_gpio_ro(mmc)) 1279031d2cccSKishon Vijay Abraham I mmc->caps2 |= MMC_CAP2_NO_WRITE_PROTECT; 1280031d2cccSKishon Vijay Abraham I 12817d326930SKishon Vijay Abraham I pltfm_host->clk = devm_clk_get(dev, "fck"); 12827d326930SKishon Vijay Abraham I if (IS_ERR(pltfm_host->clk)) { 12837d326930SKishon Vijay Abraham I ret = PTR_ERR(pltfm_host->clk); 12847d326930SKishon Vijay Abraham I goto err_pltfm_free; 12857d326930SKishon Vijay Abraham I } 12867d326930SKishon Vijay Abraham I 12877d326930SKishon Vijay Abraham I ret = clk_set_rate(pltfm_host->clk, mmc->f_max); 12887d326930SKishon Vijay Abraham I if (ret) { 12897d326930SKishon Vijay Abraham I dev_err(dev, "failed to set clock to %d\n", mmc->f_max); 12907d326930SKishon Vijay Abraham I goto err_pltfm_free; 12917d326930SKishon Vijay Abraham I } 12927d326930SKishon Vijay Abraham I 12937d326930SKishon Vijay Abraham I omap_host->pbias = devm_regulator_get_optional(dev, "pbias"); 12947d326930SKishon Vijay Abraham I if (IS_ERR(omap_host->pbias)) { 12957d326930SKishon Vijay Abraham I ret = PTR_ERR(omap_host->pbias); 12967d326930SKishon Vijay Abraham I if (ret != -ENODEV) 12977d326930SKishon Vijay Abraham I goto err_pltfm_free; 12987d326930SKishon Vijay Abraham I dev_dbg(dev, "unable to get pbias regulator %d\n", ret); 12997d326930SKishon Vijay Abraham I } 13007d326930SKishon Vijay Abraham I omap_host->pbias_enabled = false; 13017d326930SKishon Vijay Abraham I 13027d326930SKishon Vijay Abraham I /* 13037d326930SKishon Vijay Abraham I * omap_device_pm_domain has callbacks to enable the main 13047d326930SKishon Vijay Abraham I * functional clock, interface clock and also configure the 13057d326930SKishon Vijay Abraham I * SYSCONFIG register of omap devices. The callback will be invoked 13067d326930SKishon Vijay Abraham I * as part of pm_runtime_get_sync. 13077d326930SKishon Vijay Abraham I */ 1308*f433e8aaSTony Lindgren pm_runtime_use_autosuspend(dev); 1309*f433e8aaSTony Lindgren pm_runtime_set_autosuspend_delay(dev, 50); 13107d326930SKishon Vijay Abraham I pm_runtime_enable(dev); 1311809ae4e1STian Tao ret = pm_runtime_resume_and_get(dev); 1312809ae4e1STian Tao if (ret) { 13137d326930SKishon Vijay Abraham I dev_err(dev, "pm_runtime_get_sync failed\n"); 13147d326930SKishon Vijay Abraham I goto err_rpm_disable; 13157d326930SKishon Vijay Abraham I } 13167d326930SKishon Vijay Abraham I 1317de5ccd2aSTony Lindgren ret = sdhci_omap_set_capabilities(host); 13187d326930SKishon Vijay Abraham I if (ret) { 13197d326930SKishon Vijay Abraham I dev_err(dev, "failed to set system capabilities\n"); 1320*f433e8aaSTony Lindgren goto err_rpm_put; 13217d326930SKishon Vijay Abraham I } 13227d326930SKishon Vijay Abraham I 13237d326930SKishon Vijay Abraham I host->mmc_host_ops.start_signal_voltage_switch = 13247d326930SKishon Vijay Abraham I sdhci_omap_start_signal_voltage_switch; 13257d326930SKishon Vijay Abraham I host->mmc_host_ops.set_ios = sdhci_omap_set_ios; 132620ea26a1SKishon Vijay Abraham I host->mmc_host_ops.card_busy = sdhci_omap_card_busy; 13279fc2cd76SKishon Vijay Abraham I host->mmc_host_ops.execute_tuning = sdhci_omap_execute_tuning; 1328efde12b2SKishon Vijay Abraham I host->mmc_host_ops.enable_sdio_irq = sdhci_omap_enable_sdio_irq; 13297d326930SKishon Vijay Abraham I 1330c66e21fdSTony Lindgren /* 1331c66e21fdSTony Lindgren * Switch to external DMA only if there is the "dmas" property and 1332c66e21fdSTony Lindgren * ADMA is not available on the controller instance. 1333c66e21fdSTony Lindgren */ 1334c66e21fdSTony Lindgren if (device_property_present(dev, "dmas") && 1335c66e21fdSTony Lindgren !sdhci_omap_has_adma(omap_host, offset)) 1336195fadb7SChunyan Zhang sdhci_switch_external_dma(host, true); 1337195fadb7SChunyan Zhang 13383781d288STony Lindgren if (device_property_read_bool(dev, "ti,non-removable")) { 13393781d288STony Lindgren dev_warn_once(dev, "using old ti,non-removable property\n"); 13403781d288STony Lindgren mmc->caps |= MMC_CAP_NONREMOVABLE; 13413781d288STony Lindgren } 13423781d288STony Lindgren 1343055e0483SUlf Hansson /* R1B responses is required to properly manage HW busy detection. */ 1344055e0483SUlf Hansson mmc->caps |= MMC_CAP_NEED_RSP_BUSY; 1345055e0483SUlf Hansson 13460ec4ee3cSKishon Vijay Abraham I ret = sdhci_setup_host(host); 13477d326930SKishon Vijay Abraham I if (ret) 1348*f433e8aaSTony Lindgren goto err_rpm_put; 13497d326930SKishon Vijay Abraham I 13500ec4ee3cSKishon Vijay Abraham I ret = sdhci_omap_config_iodelay_pinctrl_state(omap_host); 13510ec4ee3cSKishon Vijay Abraham I if (ret) 13520ec4ee3cSKishon Vijay Abraham I goto err_cleanup_host; 13530ec4ee3cSKishon Vijay Abraham I 13540ec4ee3cSKishon Vijay Abraham I ret = __sdhci_add_host(host); 13550ec4ee3cSKishon Vijay Abraham I if (ret) 13560ec4ee3cSKishon Vijay Abraham I goto err_cleanup_host; 13570ec4ee3cSKishon Vijay Abraham I 1358*f433e8aaSTony Lindgren pm_runtime_mark_last_busy(dev); 1359*f433e8aaSTony Lindgren pm_runtime_put_autosuspend(dev); 1360*f433e8aaSTony Lindgren 13617d326930SKishon Vijay Abraham I return 0; 13627d326930SKishon Vijay Abraham I 13630ec4ee3cSKishon Vijay Abraham I err_cleanup_host: 13640ec4ee3cSKishon Vijay Abraham I sdhci_cleanup_host(host); 13650ec4ee3cSKishon Vijay Abraham I 1366*f433e8aaSTony Lindgren err_rpm_put: 1367*f433e8aaSTony Lindgren pm_runtime_mark_last_busy(dev); 1368*f433e8aaSTony Lindgren pm_runtime_put_autosuspend(dev); 13697d326930SKishon Vijay Abraham I err_rpm_disable: 1370*f433e8aaSTony Lindgren pm_runtime_dont_use_autosuspend(dev); 13717d326930SKishon Vijay Abraham I pm_runtime_disable(dev); 13727d326930SKishon Vijay Abraham I 13737d326930SKishon Vijay Abraham I err_pltfm_free: 13747d326930SKishon Vijay Abraham I sdhci_pltfm_free(pdev); 13757d326930SKishon Vijay Abraham I return ret; 13767d326930SKishon Vijay Abraham I } 13777d326930SKishon Vijay Abraham I 13787d326930SKishon Vijay Abraham I static int sdhci_omap_remove(struct platform_device *pdev) 13797d326930SKishon Vijay Abraham I { 13807d326930SKishon Vijay Abraham I struct device *dev = &pdev->dev; 13817d326930SKishon Vijay Abraham I struct sdhci_host *host = platform_get_drvdata(pdev); 13827d326930SKishon Vijay Abraham I 1383*f433e8aaSTony Lindgren pm_runtime_get_sync(dev); 13847d326930SKishon Vijay Abraham I sdhci_remove_host(host, true); 1385*f433e8aaSTony Lindgren pm_runtime_dont_use_autosuspend(dev); 13867d326930SKishon Vijay Abraham I pm_runtime_put_sync(dev); 1387*f433e8aaSTony Lindgren /* Ensure device gets disabled despite userspace sysfs config */ 1388*f433e8aaSTony Lindgren pm_runtime_force_suspend(dev); 13897d326930SKishon Vijay Abraham I sdhci_pltfm_free(pdev); 13907d326930SKishon Vijay Abraham I 13917d326930SKishon Vijay Abraham I return 0; 13927d326930SKishon Vijay Abraham I } 1393ee0f3092SFaiz Abbas #ifdef CONFIG_PM_SLEEP 1394ee0f3092SFaiz Abbas static void sdhci_omap_context_save(struct sdhci_omap_host *omap_host) 1395ee0f3092SFaiz Abbas { 1396ee0f3092SFaiz Abbas omap_host->con = sdhci_omap_readl(omap_host, SDHCI_OMAP_CON); 1397ee0f3092SFaiz Abbas omap_host->hctl = sdhci_omap_readl(omap_host, SDHCI_OMAP_HCTL); 1398d806e334STony Lindgren omap_host->sysctl = sdhci_omap_readl(omap_host, SDHCI_OMAP_SYSCTL); 1399ee0f3092SFaiz Abbas omap_host->capa = sdhci_omap_readl(omap_host, SDHCI_OMAP_CAPA); 1400d806e334STony Lindgren omap_host->ie = sdhci_omap_readl(omap_host, SDHCI_OMAP_IE); 1401d806e334STony Lindgren omap_host->ise = sdhci_omap_readl(omap_host, SDHCI_OMAP_ISE); 1402ee0f3092SFaiz Abbas } 1403ee0f3092SFaiz Abbas 1404d806e334STony Lindgren /* Order matters here, HCTL must be restored in two phases */ 1405ee0f3092SFaiz Abbas static void sdhci_omap_context_restore(struct sdhci_omap_host *omap_host) 1406ee0f3092SFaiz Abbas { 1407ee0f3092SFaiz Abbas sdhci_omap_writel(omap_host, SDHCI_OMAP_HCTL, omap_host->hctl); 1408ee0f3092SFaiz Abbas sdhci_omap_writel(omap_host, SDHCI_OMAP_CAPA, omap_host->capa); 1409d806e334STony Lindgren sdhci_omap_writel(omap_host, SDHCI_OMAP_HCTL, omap_host->hctl); 1410d806e334STony Lindgren 1411d806e334STony Lindgren sdhci_omap_writel(omap_host, SDHCI_OMAP_SYSCTL, omap_host->sysctl); 1412d806e334STony Lindgren sdhci_omap_writel(omap_host, SDHCI_OMAP_CON, omap_host->con); 1413d806e334STony Lindgren sdhci_omap_writel(omap_host, SDHCI_OMAP_IE, omap_host->ie); 1414d806e334STony Lindgren sdhci_omap_writel(omap_host, SDHCI_OMAP_ISE, omap_host->ise); 1415ee0f3092SFaiz Abbas } 1416ee0f3092SFaiz Abbas 1417*f433e8aaSTony Lindgren static int __maybe_unused sdhci_omap_runtime_suspend(struct device *dev) 1418ee0f3092SFaiz Abbas { 1419ee0f3092SFaiz Abbas struct sdhci_host *host = dev_get_drvdata(dev); 1420ee0f3092SFaiz Abbas struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); 1421ee0f3092SFaiz Abbas struct sdhci_omap_host *omap_host = sdhci_pltfm_priv(pltfm_host); 1422ee0f3092SFaiz Abbas 1423*f433e8aaSTony Lindgren sdhci_runtime_suspend_host(host); 1424ee0f3092SFaiz Abbas 1425ee0f3092SFaiz Abbas sdhci_omap_context_save(omap_host); 1426ee0f3092SFaiz Abbas 1427ee0f3092SFaiz Abbas pinctrl_pm_select_idle_state(dev); 1428ee0f3092SFaiz Abbas 1429ee0f3092SFaiz Abbas return 0; 1430ee0f3092SFaiz Abbas } 1431ee0f3092SFaiz Abbas 1432*f433e8aaSTony Lindgren static int __maybe_unused sdhci_omap_runtime_resume(struct device *dev) 1433ee0f3092SFaiz Abbas { 1434ee0f3092SFaiz Abbas struct sdhci_host *host = dev_get_drvdata(dev); 1435ee0f3092SFaiz Abbas struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); 1436ee0f3092SFaiz Abbas struct sdhci_omap_host *omap_host = sdhci_pltfm_priv(pltfm_host); 1437ee0f3092SFaiz Abbas 1438ee0f3092SFaiz Abbas pinctrl_pm_select_default_state(dev); 1439ee0f3092SFaiz Abbas 1440*f433e8aaSTony Lindgren if (omap_host->con != -EINVAL) 1441ee0f3092SFaiz Abbas sdhci_omap_context_restore(omap_host); 1442ee0f3092SFaiz Abbas 1443*f433e8aaSTony Lindgren sdhci_runtime_resume_host(host, 0); 1444ee0f3092SFaiz Abbas 1445ee0f3092SFaiz Abbas return 0; 1446ee0f3092SFaiz Abbas } 1447ee0f3092SFaiz Abbas #endif 1448*f433e8aaSTony Lindgren 1449*f433e8aaSTony Lindgren static const struct dev_pm_ops sdhci_omap_dev_pm_ops = { 1450*f433e8aaSTony Lindgren SET_RUNTIME_PM_OPS(sdhci_omap_runtime_suspend, 1451*f433e8aaSTony Lindgren sdhci_omap_runtime_resume, NULL) 1452*f433e8aaSTony Lindgren SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend, 1453*f433e8aaSTony Lindgren pm_runtime_force_resume) 1454*f433e8aaSTony Lindgren }; 14557d326930SKishon Vijay Abraham I 14567d326930SKishon Vijay Abraham I static struct platform_driver sdhci_omap_driver = { 14577d326930SKishon Vijay Abraham I .probe = sdhci_omap_probe, 14587d326930SKishon Vijay Abraham I .remove = sdhci_omap_remove, 14597d326930SKishon Vijay Abraham I .driver = { 14607d326930SKishon Vijay Abraham I .name = "sdhci-omap", 1461a1a48919SDouglas Anderson .probe_type = PROBE_PREFER_ASYNCHRONOUS, 1462ee0f3092SFaiz Abbas .pm = &sdhci_omap_dev_pm_ops, 14637d326930SKishon Vijay Abraham I .of_match_table = omap_sdhci_match, 14647d326930SKishon Vijay Abraham I }, 14657d326930SKishon Vijay Abraham I }; 14667d326930SKishon Vijay Abraham I 14677d326930SKishon Vijay Abraham I module_platform_driver(sdhci_omap_driver); 14687d326930SKishon Vijay Abraham I 14697d326930SKishon Vijay Abraham I MODULE_DESCRIPTION("SDHCI driver for OMAP SoCs"); 14707d326930SKishon Vijay Abraham I MODULE_AUTHOR("Texas Instruments Inc."); 14717d326930SKishon Vijay Abraham I MODULE_LICENSE("GPL v2"); 14727d326930SKishon Vijay Abraham I MODULE_ALIAS("platform:sdhci_omap"); 1473