16b1baefeSThomas Gleixner // SPDX-License-Identifier: GPL-2.0-only 27d326930SKishon Vijay Abraham I /** 37d326930SKishon Vijay Abraham I * SDHCI Controller driver for TI's OMAP SoCs 47d326930SKishon Vijay Abraham I * 57d326930SKishon Vijay Abraham I * Copyright (C) 2017 Texas Instruments 67d326930SKishon Vijay Abraham I * Author: Kishon Vijay Abraham I <kishon@ti.com> 77d326930SKishon Vijay Abraham I */ 87d326930SKishon Vijay Abraham I 97d326930SKishon Vijay Abraham I #include <linux/delay.h> 105da5e494SFaiz Abbas #include <linux/mmc/mmc.h> 117d326930SKishon Vijay Abraham I #include <linux/mmc/slot-gpio.h> 127d326930SKishon Vijay Abraham I #include <linux/module.h> 137d326930SKishon Vijay Abraham I #include <linux/of.h> 147d326930SKishon Vijay Abraham I #include <linux/of_device.h> 157d326930SKishon Vijay Abraham I #include <linux/platform_device.h> 167d326930SKishon Vijay Abraham I #include <linux/pm_runtime.h> 177d326930SKishon Vijay Abraham I #include <linux/regulator/consumer.h> 188d20b2eaSKishon Vijay Abraham I #include <linux/pinctrl/consumer.h> 19212f4f8aSKishon Vijay Abraham I #include <linux/sys_soc.h> 20961de0a8SFaiz Abbas #include <linux/thermal.h> 217d326930SKishon Vijay Abraham I 227d326930SKishon Vijay Abraham I #include "sdhci-pltfm.h" 237d326930SKishon Vijay Abraham I 2453f9460eSTony Lindgren #define SDHCI_OMAP_SYSCONFIG 0x110 2553f9460eSTony Lindgren 267d326930SKishon Vijay Abraham I #define SDHCI_OMAP_CON 0x12c 277d326930SKishon Vijay Abraham I #define CON_DW8 BIT(5) 287d326930SKishon Vijay Abraham I #define CON_DMA_MASTER BIT(20) 2927ceb7e0SKishon Vijay Abraham I #define CON_DDR BIT(19) 3020ea26a1SKishon Vijay Abraham I #define CON_CLKEXTFREE BIT(16) 3120ea26a1SKishon Vijay Abraham I #define CON_PADEN BIT(15) 32efde12b2SKishon Vijay Abraham I #define CON_CTPL BIT(11) 337d326930SKishon Vijay Abraham I #define CON_INIT BIT(1) 347d326930SKishon Vijay Abraham I #define CON_OD BIT(0) 357d326930SKishon Vijay Abraham I 369fc2cd76SKishon Vijay Abraham I #define SDHCI_OMAP_DLL 0x0134 379fc2cd76SKishon Vijay Abraham I #define DLL_SWT BIT(20) 389fc2cd76SKishon Vijay Abraham I #define DLL_FORCE_SR_C_SHIFT 13 399fc2cd76SKishon Vijay Abraham I #define DLL_FORCE_SR_C_MASK (0x7f << DLL_FORCE_SR_C_SHIFT) 409fc2cd76SKishon Vijay Abraham I #define DLL_FORCE_VALUE BIT(12) 419fc2cd76SKishon Vijay Abraham I #define DLL_CALIB BIT(1) 429fc2cd76SKishon Vijay Abraham I 437d326930SKishon Vijay Abraham I #define SDHCI_OMAP_CMD 0x20c 447d326930SKishon Vijay Abraham I 4520ea26a1SKishon Vijay Abraham I #define SDHCI_OMAP_PSTATE 0x0224 4620ea26a1SKishon Vijay Abraham I #define PSTATE_DLEV_DAT0 BIT(20) 4720ea26a1SKishon Vijay Abraham I #define PSTATE_DATI BIT(1) 4820ea26a1SKishon Vijay Abraham I 497d326930SKishon Vijay Abraham I #define SDHCI_OMAP_HCTL 0x228 507d326930SKishon Vijay Abraham I #define HCTL_SDBP BIT(8) 517d326930SKishon Vijay Abraham I #define HCTL_SDVS_SHIFT 9 527d326930SKishon Vijay Abraham I #define HCTL_SDVS_MASK (0x7 << HCTL_SDVS_SHIFT) 537d326930SKishon Vijay Abraham I #define HCTL_SDVS_33 (0x7 << HCTL_SDVS_SHIFT) 547d326930SKishon Vijay Abraham I #define HCTL_SDVS_30 (0x6 << HCTL_SDVS_SHIFT) 557d326930SKishon Vijay Abraham I #define HCTL_SDVS_18 (0x5 << HCTL_SDVS_SHIFT) 567d326930SKishon Vijay Abraham I 577d326930SKishon Vijay Abraham I #define SDHCI_OMAP_SYSCTL 0x22c 587d326930SKishon Vijay Abraham I #define SYSCTL_CEN BIT(2) 597d326930SKishon Vijay Abraham I #define SYSCTL_CLKD_SHIFT 6 607d326930SKishon Vijay Abraham I #define SYSCTL_CLKD_MASK 0x3ff 617d326930SKishon Vijay Abraham I 627d326930SKishon Vijay Abraham I #define SDHCI_OMAP_STAT 0x230 637d326930SKishon Vijay Abraham I 647d326930SKishon Vijay Abraham I #define SDHCI_OMAP_IE 0x234 657d326930SKishon Vijay Abraham I #define INT_CC_EN BIT(0) 667d326930SKishon Vijay Abraham I 67d806e334STony Lindgren #define SDHCI_OMAP_ISE 0x238 68d806e334STony Lindgren 697d326930SKishon Vijay Abraham I #define SDHCI_OMAP_AC12 0x23c 707d326930SKishon Vijay Abraham I #define AC12_V1V8_SIGEN BIT(19) 719fc2cd76SKishon Vijay Abraham I #define AC12_SCLK_SEL BIT(23) 727d326930SKishon Vijay Abraham I 737d326930SKishon Vijay Abraham I #define SDHCI_OMAP_CAPA 0x240 747d326930SKishon Vijay Abraham I #define CAPA_VS33 BIT(24) 757d326930SKishon Vijay Abraham I #define CAPA_VS30 BIT(25) 767d326930SKishon Vijay Abraham I #define CAPA_VS18 BIT(26) 777d326930SKishon Vijay Abraham I 789fc2cd76SKishon Vijay Abraham I #define SDHCI_OMAP_CAPA2 0x0244 799fc2cd76SKishon Vijay Abraham I #define CAPA2_TSDR50 BIT(13) 809fc2cd76SKishon Vijay Abraham I 817d326930SKishon Vijay Abraham I #define SDHCI_OMAP_TIMEOUT 1 /* 1 msec */ 827d326930SKishon Vijay Abraham I 837d326930SKishon Vijay Abraham I #define SYSCTL_CLKD_MAX 0x3FF 847d326930SKishon Vijay Abraham I 857d326930SKishon Vijay Abraham I #define IOV_1V8 1800000 /* 180000 uV */ 867d326930SKishon Vijay Abraham I #define IOV_3V0 3000000 /* 300000 uV */ 877d326930SKishon Vijay Abraham I #define IOV_3V3 3300000 /* 330000 uV */ 887d326930SKishon Vijay Abraham I 899fc2cd76SKishon Vijay Abraham I #define MAX_PHASE_DELAY 0x7C 909fc2cd76SKishon Vijay Abraham I 918d20b2eaSKishon Vijay Abraham I /* sdhci-omap controller flags */ 928d20b2eaSKishon Vijay Abraham I #define SDHCI_OMAP_REQUIRE_IODELAY BIT(0) 939e84a2e6SFaiz Abbas #define SDHCI_OMAP_SPECIAL_RESET BIT(1) 948d20b2eaSKishon Vijay Abraham I 957d326930SKishon Vijay Abraham I struct sdhci_omap_data { 967d326930SKishon Vijay Abraham I u32 offset; 978d20b2eaSKishon Vijay Abraham I u8 flags; 987d326930SKishon Vijay Abraham I }; 997d326930SKishon Vijay Abraham I 1007d326930SKishon Vijay Abraham I struct sdhci_omap_host { 101212f4f8aSKishon Vijay Abraham I char *version; 1027d326930SKishon Vijay Abraham I void __iomem *base; 1037d326930SKishon Vijay Abraham I struct device *dev; 1047d326930SKishon Vijay Abraham I struct regulator *pbias; 1057d326930SKishon Vijay Abraham I bool pbias_enabled; 1067d326930SKishon Vijay Abraham I struct sdhci_host *host; 1077d326930SKishon Vijay Abraham I u8 bus_mode; 1087d326930SKishon Vijay Abraham I u8 power_mode; 1098d20b2eaSKishon Vijay Abraham I u8 timing; 1108d20b2eaSKishon Vijay Abraham I u8 flags; 1118d20b2eaSKishon Vijay Abraham I 1128d20b2eaSKishon Vijay Abraham I struct pinctrl *pinctrl; 1138d20b2eaSKishon Vijay Abraham I struct pinctrl_state **pinctrl_state; 1145b0d6210SFaiz Abbas bool is_tuning; 115ee0f3092SFaiz Abbas /* Omap specific context save */ 116ee0f3092SFaiz Abbas u32 con; 117ee0f3092SFaiz Abbas u32 hctl; 118ee0f3092SFaiz Abbas u32 sysctl; 119ee0f3092SFaiz Abbas u32 capa; 120d806e334STony Lindgren u32 ie; 121d806e334STony Lindgren u32 ise; 1227d326930SKishon Vijay Abraham I }; 1237d326930SKishon Vijay Abraham I 1248d20b2eaSKishon Vijay Abraham I static void sdhci_omap_start_clock(struct sdhci_omap_host *omap_host); 1258d20b2eaSKishon Vijay Abraham I static void sdhci_omap_stop_clock(struct sdhci_omap_host *omap_host); 1268d20b2eaSKishon Vijay Abraham I 1277d326930SKishon Vijay Abraham I static inline u32 sdhci_omap_readl(struct sdhci_omap_host *host, 1287d326930SKishon Vijay Abraham I unsigned int offset) 1297d326930SKishon Vijay Abraham I { 1307d326930SKishon Vijay Abraham I return readl(host->base + offset); 1317d326930SKishon Vijay Abraham I } 1327d326930SKishon Vijay Abraham I 1337d326930SKishon Vijay Abraham I static inline void sdhci_omap_writel(struct sdhci_omap_host *host, 1347d326930SKishon Vijay Abraham I unsigned int offset, u32 data) 1357d326930SKishon Vijay Abraham I { 1367d326930SKishon Vijay Abraham I writel(data, host->base + offset); 1377d326930SKishon Vijay Abraham I } 1387d326930SKishon Vijay Abraham I 1397d326930SKishon Vijay Abraham I static int sdhci_omap_set_pbias(struct sdhci_omap_host *omap_host, 1407d326930SKishon Vijay Abraham I bool power_on, unsigned int iov) 1417d326930SKishon Vijay Abraham I { 1427d326930SKishon Vijay Abraham I int ret; 1437d326930SKishon Vijay Abraham I struct device *dev = omap_host->dev; 1447d326930SKishon Vijay Abraham I 1457d326930SKishon Vijay Abraham I if (IS_ERR(omap_host->pbias)) 1467d326930SKishon Vijay Abraham I return 0; 1477d326930SKishon Vijay Abraham I 1487d326930SKishon Vijay Abraham I if (power_on) { 1497d326930SKishon Vijay Abraham I ret = regulator_set_voltage(omap_host->pbias, iov, iov); 1507d326930SKishon Vijay Abraham I if (ret) { 1517d326930SKishon Vijay Abraham I dev_err(dev, "pbias set voltage failed\n"); 1527d326930SKishon Vijay Abraham I return ret; 1537d326930SKishon Vijay Abraham I } 1547d326930SKishon Vijay Abraham I 1557d326930SKishon Vijay Abraham I if (omap_host->pbias_enabled) 1567d326930SKishon Vijay Abraham I return 0; 1577d326930SKishon Vijay Abraham I 1587d326930SKishon Vijay Abraham I ret = regulator_enable(omap_host->pbias); 1597d326930SKishon Vijay Abraham I if (ret) { 1607d326930SKishon Vijay Abraham I dev_err(dev, "pbias reg enable fail\n"); 1617d326930SKishon Vijay Abraham I return ret; 1627d326930SKishon Vijay Abraham I } 1637d326930SKishon Vijay Abraham I 1647d326930SKishon Vijay Abraham I omap_host->pbias_enabled = true; 1657d326930SKishon Vijay Abraham I } else { 1667d326930SKishon Vijay Abraham I if (!omap_host->pbias_enabled) 1677d326930SKishon Vijay Abraham I return 0; 1687d326930SKishon Vijay Abraham I 1697d326930SKishon Vijay Abraham I ret = regulator_disable(omap_host->pbias); 1707d326930SKishon Vijay Abraham I if (ret) { 1717d326930SKishon Vijay Abraham I dev_err(dev, "pbias reg disable fail\n"); 1727d326930SKishon Vijay Abraham I return ret; 1737d326930SKishon Vijay Abraham I } 1747d326930SKishon Vijay Abraham I omap_host->pbias_enabled = false; 1757d326930SKishon Vijay Abraham I } 1767d326930SKishon Vijay Abraham I 1777d326930SKishon Vijay Abraham I return 0; 1787d326930SKishon Vijay Abraham I } 1797d326930SKishon Vijay Abraham I 1807d326930SKishon Vijay Abraham I static int sdhci_omap_enable_iov(struct sdhci_omap_host *omap_host, 181*de5ccd2aSTony Lindgren unsigned int iov_pbias) 1827d326930SKishon Vijay Abraham I { 1837d326930SKishon Vijay Abraham I int ret; 1847d326930SKishon Vijay Abraham I struct sdhci_host *host = omap_host->host; 1857d326930SKishon Vijay Abraham I struct mmc_host *mmc = host->mmc; 1867d326930SKishon Vijay Abraham I 1877d326930SKishon Vijay Abraham I ret = sdhci_omap_set_pbias(omap_host, false, 0); 1887d326930SKishon Vijay Abraham I if (ret) 1897d326930SKishon Vijay Abraham I return ret; 1907d326930SKishon Vijay Abraham I 1917d326930SKishon Vijay Abraham I if (!IS_ERR(mmc->supply.vqmmc)) { 192*de5ccd2aSTony Lindgren /* Pick the right voltage to allow 3.0V for 3.3V nominal PBIAS */ 193*de5ccd2aSTony Lindgren ret = mmc_regulator_set_vqmmc(mmc, &mmc->ios); 194*de5ccd2aSTony Lindgren if (ret < 0) { 1957d326930SKishon Vijay Abraham I dev_err(mmc_dev(mmc), "vqmmc set voltage failed\n"); 1967d326930SKishon Vijay Abraham I return ret; 1977d326930SKishon Vijay Abraham I } 1987d326930SKishon Vijay Abraham I } 1997d326930SKishon Vijay Abraham I 200*de5ccd2aSTony Lindgren ret = sdhci_omap_set_pbias(omap_host, true, iov_pbias); 2017d326930SKishon Vijay Abraham I if (ret) 2027d326930SKishon Vijay Abraham I return ret; 2037d326930SKishon Vijay Abraham I 2047d326930SKishon Vijay Abraham I return 0; 2057d326930SKishon Vijay Abraham I } 2067d326930SKishon Vijay Abraham I 2077d326930SKishon Vijay Abraham I static void sdhci_omap_conf_bus_power(struct sdhci_omap_host *omap_host, 2087d326930SKishon Vijay Abraham I unsigned char signal_voltage) 2097d326930SKishon Vijay Abraham I { 210*de5ccd2aSTony Lindgren u32 reg, capa; 2117d326930SKishon Vijay Abraham I ktime_t timeout; 2127d326930SKishon Vijay Abraham I 2137d326930SKishon Vijay Abraham I reg = sdhci_omap_readl(omap_host, SDHCI_OMAP_HCTL); 2147d326930SKishon Vijay Abraham I reg &= ~HCTL_SDVS_MASK; 2157d326930SKishon Vijay Abraham I 216*de5ccd2aSTony Lindgren switch (signal_voltage) { 217*de5ccd2aSTony Lindgren case MMC_SIGNAL_VOLTAGE_330: 218*de5ccd2aSTony Lindgren capa = sdhci_omap_readl(omap_host, SDHCI_OMAP_CAPA); 219*de5ccd2aSTony Lindgren if (capa & CAPA_VS33) 2207d326930SKishon Vijay Abraham I reg |= HCTL_SDVS_33; 221*de5ccd2aSTony Lindgren else if (capa & CAPA_VS30) 222*de5ccd2aSTony Lindgren reg |= HCTL_SDVS_30; 2237d326930SKishon Vijay Abraham I else 224*de5ccd2aSTony Lindgren dev_warn(omap_host->dev, "misconfigured CAPA: %08x\n", 225*de5ccd2aSTony Lindgren capa); 226*de5ccd2aSTony Lindgren break; 227*de5ccd2aSTony Lindgren case MMC_SIGNAL_VOLTAGE_180: 228*de5ccd2aSTony Lindgren default: 2297d326930SKishon Vijay Abraham I reg |= HCTL_SDVS_18; 230*de5ccd2aSTony Lindgren break; 231*de5ccd2aSTony Lindgren } 2327d326930SKishon Vijay Abraham I 2337d326930SKishon Vijay Abraham I sdhci_omap_writel(omap_host, SDHCI_OMAP_HCTL, reg); 2347d326930SKishon Vijay Abraham I 2357d326930SKishon Vijay Abraham I reg |= HCTL_SDBP; 2367d326930SKishon Vijay Abraham I sdhci_omap_writel(omap_host, SDHCI_OMAP_HCTL, reg); 2377d326930SKishon Vijay Abraham I 2387d326930SKishon Vijay Abraham I /* wait 1ms */ 2397d326930SKishon Vijay Abraham I timeout = ktime_add_ms(ktime_get(), SDHCI_OMAP_TIMEOUT); 2409f0ea0bdSAdrian Hunter while (1) { 2419f0ea0bdSAdrian Hunter bool timedout = ktime_after(ktime_get(), timeout); 2429f0ea0bdSAdrian Hunter 2439f0ea0bdSAdrian Hunter if (sdhci_omap_readl(omap_host, SDHCI_OMAP_HCTL) & HCTL_SDBP) 2449f0ea0bdSAdrian Hunter break; 2459f0ea0bdSAdrian Hunter if (WARN_ON(timedout)) 2467d326930SKishon Vijay Abraham I return; 2477d326930SKishon Vijay Abraham I usleep_range(5, 10); 2487d326930SKishon Vijay Abraham I } 2497d326930SKishon Vijay Abraham I } 2507d326930SKishon Vijay Abraham I 251efde12b2SKishon Vijay Abraham I static void sdhci_omap_enable_sdio_irq(struct mmc_host *mmc, int enable) 252efde12b2SKishon Vijay Abraham I { 253efde12b2SKishon Vijay Abraham I struct sdhci_host *host = mmc_priv(mmc); 254efde12b2SKishon Vijay Abraham I struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); 255efde12b2SKishon Vijay Abraham I struct sdhci_omap_host *omap_host = sdhci_pltfm_priv(pltfm_host); 256efde12b2SKishon Vijay Abraham I u32 reg; 257efde12b2SKishon Vijay Abraham I 258efde12b2SKishon Vijay Abraham I reg = sdhci_omap_readl(omap_host, SDHCI_OMAP_CON); 259efde12b2SKishon Vijay Abraham I if (enable) 260efde12b2SKishon Vijay Abraham I reg |= (CON_CTPL | CON_CLKEXTFREE); 261efde12b2SKishon Vijay Abraham I else 262efde12b2SKishon Vijay Abraham I reg &= ~(CON_CTPL | CON_CLKEXTFREE); 263efde12b2SKishon Vijay Abraham I sdhci_omap_writel(omap_host, SDHCI_OMAP_CON, reg); 264efde12b2SKishon Vijay Abraham I 265efde12b2SKishon Vijay Abraham I sdhci_enable_sdio_irq(mmc, enable); 266efde12b2SKishon Vijay Abraham I } 267efde12b2SKishon Vijay Abraham I 2689fc2cd76SKishon Vijay Abraham I static inline void sdhci_omap_set_dll(struct sdhci_omap_host *omap_host, 2699fc2cd76SKishon Vijay Abraham I int count) 2709fc2cd76SKishon Vijay Abraham I { 2719fc2cd76SKishon Vijay Abraham I int i; 2729fc2cd76SKishon Vijay Abraham I u32 reg; 2739fc2cd76SKishon Vijay Abraham I 2749fc2cd76SKishon Vijay Abraham I reg = sdhci_omap_readl(omap_host, SDHCI_OMAP_DLL); 2759fc2cd76SKishon Vijay Abraham I reg |= DLL_FORCE_VALUE; 2769fc2cd76SKishon Vijay Abraham I reg &= ~DLL_FORCE_SR_C_MASK; 2779fc2cd76SKishon Vijay Abraham I reg |= (count << DLL_FORCE_SR_C_SHIFT); 2789fc2cd76SKishon Vijay Abraham I sdhci_omap_writel(omap_host, SDHCI_OMAP_DLL, reg); 2799fc2cd76SKishon Vijay Abraham I 2809fc2cd76SKishon Vijay Abraham I reg |= DLL_CALIB; 2819fc2cd76SKishon Vijay Abraham I sdhci_omap_writel(omap_host, SDHCI_OMAP_DLL, reg); 2829fc2cd76SKishon Vijay Abraham I for (i = 0; i < 1000; i++) { 2839fc2cd76SKishon Vijay Abraham I reg = sdhci_omap_readl(omap_host, SDHCI_OMAP_DLL); 2849fc2cd76SKishon Vijay Abraham I if (reg & DLL_CALIB) 2859fc2cd76SKishon Vijay Abraham I break; 2869fc2cd76SKishon Vijay Abraham I } 2879fc2cd76SKishon Vijay Abraham I reg &= ~DLL_CALIB; 2889fc2cd76SKishon Vijay Abraham I sdhci_omap_writel(omap_host, SDHCI_OMAP_DLL, reg); 2899fc2cd76SKishon Vijay Abraham I } 2909fc2cd76SKishon Vijay Abraham I 2919fc2cd76SKishon Vijay Abraham I static void sdhci_omap_disable_tuning(struct sdhci_omap_host *omap_host) 2929fc2cd76SKishon Vijay Abraham I { 2939fc2cd76SKishon Vijay Abraham I u32 reg; 2949fc2cd76SKishon Vijay Abraham I 2959fc2cd76SKishon Vijay Abraham I reg = sdhci_omap_readl(omap_host, SDHCI_OMAP_AC12); 2969fc2cd76SKishon Vijay Abraham I reg &= ~AC12_SCLK_SEL; 2979fc2cd76SKishon Vijay Abraham I sdhci_omap_writel(omap_host, SDHCI_OMAP_AC12, reg); 2989fc2cd76SKishon Vijay Abraham I 2999fc2cd76SKishon Vijay Abraham I reg = sdhci_omap_readl(omap_host, SDHCI_OMAP_DLL); 3009fc2cd76SKishon Vijay Abraham I reg &= ~(DLL_FORCE_VALUE | DLL_SWT); 3019fc2cd76SKishon Vijay Abraham I sdhci_omap_writel(omap_host, SDHCI_OMAP_DLL, reg); 3029fc2cd76SKishon Vijay Abraham I } 3039fc2cd76SKishon Vijay Abraham I 3049fc2cd76SKishon Vijay Abraham I static int sdhci_omap_execute_tuning(struct mmc_host *mmc, u32 opcode) 3059fc2cd76SKishon Vijay Abraham I { 3069fc2cd76SKishon Vijay Abraham I struct sdhci_host *host = mmc_priv(mmc); 3079fc2cd76SKishon Vijay Abraham I struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); 3089fc2cd76SKishon Vijay Abraham I struct sdhci_omap_host *omap_host = sdhci_pltfm_priv(pltfm_host); 309961de0a8SFaiz Abbas struct thermal_zone_device *thermal_dev; 3109fc2cd76SKishon Vijay Abraham I struct device *dev = omap_host->dev; 3119fc2cd76SKishon Vijay Abraham I struct mmc_ios *ios = &mmc->ios; 3129fc2cd76SKishon Vijay Abraham I u32 start_window = 0, max_window = 0; 313961de0a8SFaiz Abbas bool single_point_failure = false; 314db2039fcSFaiz Abbas bool dcrc_was_enabled = false; 3159fc2cd76SKishon Vijay Abraham I u8 cur_match, prev_match = 0; 3169fc2cd76SKishon Vijay Abraham I u32 length = 0, max_len = 0; 3179fc2cd76SKishon Vijay Abraham I u32 phase_delay = 0; 318961de0a8SFaiz Abbas int temperature; 3199fc2cd76SKishon Vijay Abraham I int ret = 0; 3209fc2cd76SKishon Vijay Abraham I u32 reg; 321961de0a8SFaiz Abbas int i; 3229fc2cd76SKishon Vijay Abraham I 3239fc2cd76SKishon Vijay Abraham I /* clock tuning is not needed for upto 52MHz */ 3249fc2cd76SKishon Vijay Abraham I if (ios->clock <= 52000000) 3259fc2cd76SKishon Vijay Abraham I return 0; 3269fc2cd76SKishon Vijay Abraham I 3279fc2cd76SKishon Vijay Abraham I reg = sdhci_omap_readl(omap_host, SDHCI_OMAP_CAPA2); 3289fc2cd76SKishon Vijay Abraham I if (ios->timing == MMC_TIMING_UHS_SDR50 && !(reg & CAPA2_TSDR50)) 3299fc2cd76SKishon Vijay Abraham I return 0; 3309fc2cd76SKishon Vijay Abraham I 331961de0a8SFaiz Abbas thermal_dev = thermal_zone_get_zone_by_name("cpu_thermal"); 332961de0a8SFaiz Abbas if (IS_ERR(thermal_dev)) { 333961de0a8SFaiz Abbas dev_err(dev, "Unable to get thermal zone for tuning\n"); 334961de0a8SFaiz Abbas return PTR_ERR(thermal_dev); 335961de0a8SFaiz Abbas } 336961de0a8SFaiz Abbas 337961de0a8SFaiz Abbas ret = thermal_zone_get_temp(thermal_dev, &temperature); 338961de0a8SFaiz Abbas if (ret) 339961de0a8SFaiz Abbas return ret; 340961de0a8SFaiz Abbas 3419fc2cd76SKishon Vijay Abraham I reg = sdhci_omap_readl(omap_host, SDHCI_OMAP_DLL); 3429fc2cd76SKishon Vijay Abraham I reg |= DLL_SWT; 3439fc2cd76SKishon Vijay Abraham I sdhci_omap_writel(omap_host, SDHCI_OMAP_DLL, reg); 3449fc2cd76SKishon Vijay Abraham I 3457d33c358SKishon Vijay Abraham I /* 3467d33c358SKishon Vijay Abraham I * OMAP5/DRA74X/DRA72x Errata i802: 3477d33c358SKishon Vijay Abraham I * DCRC error interrupts (MMCHS_STAT[21] DCRC=0x1) can occur 3487d33c358SKishon Vijay Abraham I * during the tuning procedure. So disable it during the 3497d33c358SKishon Vijay Abraham I * tuning procedure. 3507d33c358SKishon Vijay Abraham I */ 351db2039fcSFaiz Abbas if (host->ier & SDHCI_INT_DATA_CRC) { 352db2039fcSFaiz Abbas host->ier &= ~SDHCI_INT_DATA_CRC; 353db2039fcSFaiz Abbas dcrc_was_enabled = true; 354db2039fcSFaiz Abbas } 3557d33c358SKishon Vijay Abraham I 3565b0d6210SFaiz Abbas omap_host->is_tuning = true; 3575b0d6210SFaiz Abbas 358961de0a8SFaiz Abbas /* 359961de0a8SFaiz Abbas * Stage 1: Search for a maximum pass window ignoring any 360961de0a8SFaiz Abbas * any single point failures. If the tuning value ends up 361961de0a8SFaiz Abbas * near it, move away from it in stage 2 below 362961de0a8SFaiz Abbas */ 3639fc2cd76SKishon Vijay Abraham I while (phase_delay <= MAX_PHASE_DELAY) { 3649fc2cd76SKishon Vijay Abraham I sdhci_omap_set_dll(omap_host, phase_delay); 3659fc2cd76SKishon Vijay Abraham I 3669fc2cd76SKishon Vijay Abraham I cur_match = !mmc_send_tuning(mmc, opcode, NULL); 3679fc2cd76SKishon Vijay Abraham I if (cur_match) { 3689fc2cd76SKishon Vijay Abraham I if (prev_match) { 3699fc2cd76SKishon Vijay Abraham I length++; 370961de0a8SFaiz Abbas } else if (single_point_failure) { 371961de0a8SFaiz Abbas /* ignore single point failure */ 372961de0a8SFaiz Abbas length++; 3739fc2cd76SKishon Vijay Abraham I } else { 3749fc2cd76SKishon Vijay Abraham I start_window = phase_delay; 3759fc2cd76SKishon Vijay Abraham I length = 1; 3769fc2cd76SKishon Vijay Abraham I } 377961de0a8SFaiz Abbas } else { 378961de0a8SFaiz Abbas single_point_failure = prev_match; 3799fc2cd76SKishon Vijay Abraham I } 3809fc2cd76SKishon Vijay Abraham I 3819fc2cd76SKishon Vijay Abraham I if (length > max_len) { 3829fc2cd76SKishon Vijay Abraham I max_window = start_window; 3839fc2cd76SKishon Vijay Abraham I max_len = length; 3849fc2cd76SKishon Vijay Abraham I } 3859fc2cd76SKishon Vijay Abraham I 3869fc2cd76SKishon Vijay Abraham I prev_match = cur_match; 3879fc2cd76SKishon Vijay Abraham I phase_delay += 4; 3889fc2cd76SKishon Vijay Abraham I } 3899fc2cd76SKishon Vijay Abraham I 3909fc2cd76SKishon Vijay Abraham I if (!max_len) { 3919fc2cd76SKishon Vijay Abraham I dev_err(dev, "Unable to find match\n"); 3929fc2cd76SKishon Vijay Abraham I ret = -EIO; 3939fc2cd76SKishon Vijay Abraham I goto tuning_error; 3949fc2cd76SKishon Vijay Abraham I } 3959fc2cd76SKishon Vijay Abraham I 396961de0a8SFaiz Abbas /* 397961de0a8SFaiz Abbas * Assign tuning value as a ratio of maximum pass window based 398961de0a8SFaiz Abbas * on temperature 399961de0a8SFaiz Abbas */ 400961de0a8SFaiz Abbas if (temperature < -20000) 401feb40824SFaiz Abbas phase_delay = min(max_window + 4 * (max_len - 1) - 24, 402961de0a8SFaiz Abbas max_window + 403961de0a8SFaiz Abbas DIV_ROUND_UP(13 * max_len, 16) * 4); 404961de0a8SFaiz Abbas else if (temperature < 20000) 405961de0a8SFaiz Abbas phase_delay = max_window + DIV_ROUND_UP(9 * max_len, 16) * 4; 406961de0a8SFaiz Abbas else if (temperature < 40000) 407961de0a8SFaiz Abbas phase_delay = max_window + DIV_ROUND_UP(8 * max_len, 16) * 4; 408961de0a8SFaiz Abbas else if (temperature < 70000) 409961de0a8SFaiz Abbas phase_delay = max_window + DIV_ROUND_UP(7 * max_len, 16) * 4; 410961de0a8SFaiz Abbas else if (temperature < 90000) 411961de0a8SFaiz Abbas phase_delay = max_window + DIV_ROUND_UP(5 * max_len, 16) * 4; 412961de0a8SFaiz Abbas else if (temperature < 120000) 413961de0a8SFaiz Abbas phase_delay = max_window + DIV_ROUND_UP(4 * max_len, 16) * 4; 414961de0a8SFaiz Abbas else 415961de0a8SFaiz Abbas phase_delay = max_window + DIV_ROUND_UP(3 * max_len, 16) * 4; 416961de0a8SFaiz Abbas 417961de0a8SFaiz Abbas /* 418961de0a8SFaiz Abbas * Stage 2: Search for a single point failure near the chosen tuning 419961de0a8SFaiz Abbas * value in two steps. First in the +3 to +10 range and then in the 420961de0a8SFaiz Abbas * +2 to -10 range. If found, move away from it in the appropriate 421961de0a8SFaiz Abbas * direction by the appropriate amount depending on the temperature. 422961de0a8SFaiz Abbas */ 423961de0a8SFaiz Abbas for (i = 3; i <= 10; i++) { 424961de0a8SFaiz Abbas sdhci_omap_set_dll(omap_host, phase_delay + i); 425961de0a8SFaiz Abbas 426961de0a8SFaiz Abbas if (mmc_send_tuning(mmc, opcode, NULL)) { 427961de0a8SFaiz Abbas if (temperature < 10000) 428961de0a8SFaiz Abbas phase_delay += i + 6; 429961de0a8SFaiz Abbas else if (temperature < 20000) 430961de0a8SFaiz Abbas phase_delay += i - 12; 431961de0a8SFaiz Abbas else if (temperature < 70000) 432961de0a8SFaiz Abbas phase_delay += i - 8; 433961de0a8SFaiz Abbas else 434961de0a8SFaiz Abbas phase_delay += i - 6; 435961de0a8SFaiz Abbas 436961de0a8SFaiz Abbas goto single_failure_found; 437961de0a8SFaiz Abbas } 438961de0a8SFaiz Abbas } 439961de0a8SFaiz Abbas 440961de0a8SFaiz Abbas for (i = 2; i >= -10; i--) { 441961de0a8SFaiz Abbas sdhci_omap_set_dll(omap_host, phase_delay + i); 442961de0a8SFaiz Abbas 443961de0a8SFaiz Abbas if (mmc_send_tuning(mmc, opcode, NULL)) { 444961de0a8SFaiz Abbas if (temperature < 10000) 445961de0a8SFaiz Abbas phase_delay += i + 12; 446961de0a8SFaiz Abbas else if (temperature < 20000) 447961de0a8SFaiz Abbas phase_delay += i + 8; 448961de0a8SFaiz Abbas else if (temperature < 70000) 449961de0a8SFaiz Abbas phase_delay += i + 8; 450961de0a8SFaiz Abbas else if (temperature < 90000) 451961de0a8SFaiz Abbas phase_delay += i + 10; 452961de0a8SFaiz Abbas else 453961de0a8SFaiz Abbas phase_delay += i + 12; 454961de0a8SFaiz Abbas 455961de0a8SFaiz Abbas goto single_failure_found; 456961de0a8SFaiz Abbas } 457961de0a8SFaiz Abbas } 458961de0a8SFaiz Abbas 459961de0a8SFaiz Abbas single_failure_found: 4609fc2cd76SKishon Vijay Abraham I reg = sdhci_omap_readl(omap_host, SDHCI_OMAP_AC12); 4619fc2cd76SKishon Vijay Abraham I if (!(reg & AC12_SCLK_SEL)) { 4629fc2cd76SKishon Vijay Abraham I ret = -EIO; 4639fc2cd76SKishon Vijay Abraham I goto tuning_error; 4649fc2cd76SKishon Vijay Abraham I } 4659fc2cd76SKishon Vijay Abraham I 4669fc2cd76SKishon Vijay Abraham I sdhci_omap_set_dll(omap_host, phase_delay); 4679fc2cd76SKishon Vijay Abraham I 4685b0d6210SFaiz Abbas omap_host->is_tuning = false; 4695b0d6210SFaiz Abbas 4709fc2cd76SKishon Vijay Abraham I goto ret; 4719fc2cd76SKishon Vijay Abraham I 4729fc2cd76SKishon Vijay Abraham I tuning_error: 4735b0d6210SFaiz Abbas omap_host->is_tuning = false; 4749fc2cd76SKishon Vijay Abraham I dev_err(dev, "Tuning failed\n"); 4759fc2cd76SKishon Vijay Abraham I sdhci_omap_disable_tuning(omap_host); 4769fc2cd76SKishon Vijay Abraham I 4779fc2cd76SKishon Vijay Abraham I ret: 4789fc2cd76SKishon Vijay Abraham I sdhci_reset(host, SDHCI_RESET_CMD | SDHCI_RESET_DATA); 479db2039fcSFaiz Abbas /* Reenable forbidden interrupt */ 480db2039fcSFaiz Abbas if (dcrc_was_enabled) 481db2039fcSFaiz Abbas host->ier |= SDHCI_INT_DATA_CRC; 4827d33c358SKishon Vijay Abraham I sdhci_writel(host, host->ier, SDHCI_INT_ENABLE); 4837d33c358SKishon Vijay Abraham I sdhci_writel(host, host->ier, SDHCI_SIGNAL_ENABLE); 4849fc2cd76SKishon Vijay Abraham I return ret; 4859fc2cd76SKishon Vijay Abraham I } 4869fc2cd76SKishon Vijay Abraham I 48720ea26a1SKishon Vijay Abraham I static int sdhci_omap_card_busy(struct mmc_host *mmc) 48820ea26a1SKishon Vijay Abraham I { 48920ea26a1SKishon Vijay Abraham I u32 reg, ac12; 49020ea26a1SKishon Vijay Abraham I int ret = false; 49120ea26a1SKishon Vijay Abraham I struct sdhci_host *host = mmc_priv(mmc); 49220ea26a1SKishon Vijay Abraham I struct sdhci_pltfm_host *pltfm_host; 49320ea26a1SKishon Vijay Abraham I struct sdhci_omap_host *omap_host; 49420ea26a1SKishon Vijay Abraham I u32 ier = host->ier; 49520ea26a1SKishon Vijay Abraham I 49620ea26a1SKishon Vijay Abraham I pltfm_host = sdhci_priv(host); 49720ea26a1SKishon Vijay Abraham I omap_host = sdhci_pltfm_priv(pltfm_host); 49820ea26a1SKishon Vijay Abraham I 49920ea26a1SKishon Vijay Abraham I reg = sdhci_omap_readl(omap_host, SDHCI_OMAP_CON); 50020ea26a1SKishon Vijay Abraham I ac12 = sdhci_omap_readl(omap_host, SDHCI_OMAP_AC12); 50120ea26a1SKishon Vijay Abraham I reg &= ~CON_CLKEXTFREE; 50220ea26a1SKishon Vijay Abraham I if (ac12 & AC12_V1V8_SIGEN) 50320ea26a1SKishon Vijay Abraham I reg |= CON_CLKEXTFREE; 50420ea26a1SKishon Vijay Abraham I reg |= CON_PADEN; 50520ea26a1SKishon Vijay Abraham I sdhci_omap_writel(omap_host, SDHCI_OMAP_CON, reg); 50620ea26a1SKishon Vijay Abraham I 50720ea26a1SKishon Vijay Abraham I disable_irq(host->irq); 50820ea26a1SKishon Vijay Abraham I ier |= SDHCI_INT_CARD_INT; 50920ea26a1SKishon Vijay Abraham I sdhci_writel(host, ier, SDHCI_INT_ENABLE); 51020ea26a1SKishon Vijay Abraham I sdhci_writel(host, ier, SDHCI_SIGNAL_ENABLE); 51120ea26a1SKishon Vijay Abraham I 51220ea26a1SKishon Vijay Abraham I /* 51320ea26a1SKishon Vijay Abraham I * Delay is required for PSTATE to correctly reflect 51420ea26a1SKishon Vijay Abraham I * DLEV/CLEV values after PADEN is set. 51520ea26a1SKishon Vijay Abraham I */ 51620ea26a1SKishon Vijay Abraham I usleep_range(50, 100); 51720ea26a1SKishon Vijay Abraham I reg = sdhci_omap_readl(omap_host, SDHCI_OMAP_PSTATE); 51820ea26a1SKishon Vijay Abraham I if ((reg & PSTATE_DATI) || !(reg & PSTATE_DLEV_DAT0)) 51920ea26a1SKishon Vijay Abraham I ret = true; 52020ea26a1SKishon Vijay Abraham I 52120ea26a1SKishon Vijay Abraham I reg = sdhci_omap_readl(omap_host, SDHCI_OMAP_CON); 52220ea26a1SKishon Vijay Abraham I reg &= ~(CON_CLKEXTFREE | CON_PADEN); 52320ea26a1SKishon Vijay Abraham I sdhci_omap_writel(omap_host, SDHCI_OMAP_CON, reg); 52420ea26a1SKishon Vijay Abraham I 52520ea26a1SKishon Vijay Abraham I sdhci_writel(host, host->ier, SDHCI_INT_ENABLE); 52620ea26a1SKishon Vijay Abraham I sdhci_writel(host, host->ier, SDHCI_SIGNAL_ENABLE); 52720ea26a1SKishon Vijay Abraham I enable_irq(host->irq); 52820ea26a1SKishon Vijay Abraham I 52920ea26a1SKishon Vijay Abraham I return ret; 53020ea26a1SKishon Vijay Abraham I } 53120ea26a1SKishon Vijay Abraham I 5327d326930SKishon Vijay Abraham I static int sdhci_omap_start_signal_voltage_switch(struct mmc_host *mmc, 5337d326930SKishon Vijay Abraham I struct mmc_ios *ios) 5347d326930SKishon Vijay Abraham I { 5357d326930SKishon Vijay Abraham I u32 reg; 5367d326930SKishon Vijay Abraham I int ret; 5377d326930SKishon Vijay Abraham I unsigned int iov; 5387d326930SKishon Vijay Abraham I struct sdhci_host *host = mmc_priv(mmc); 5397d326930SKishon Vijay Abraham I struct sdhci_pltfm_host *pltfm_host; 5407d326930SKishon Vijay Abraham I struct sdhci_omap_host *omap_host; 5417d326930SKishon Vijay Abraham I struct device *dev; 5427d326930SKishon Vijay Abraham I 5437d326930SKishon Vijay Abraham I pltfm_host = sdhci_priv(host); 5447d326930SKishon Vijay Abraham I omap_host = sdhci_pltfm_priv(pltfm_host); 5457d326930SKishon Vijay Abraham I dev = omap_host->dev; 5467d326930SKishon Vijay Abraham I 5477d326930SKishon Vijay Abraham I if (ios->signal_voltage == MMC_SIGNAL_VOLTAGE_330) { 5487d326930SKishon Vijay Abraham I reg = sdhci_omap_readl(omap_host, SDHCI_OMAP_CAPA); 549*de5ccd2aSTony Lindgren if (!(reg & (CAPA_VS30 | CAPA_VS33))) 5507d326930SKishon Vijay Abraham I return -EOPNOTSUPP; 5517d326930SKishon Vijay Abraham I 552*de5ccd2aSTony Lindgren if (reg & CAPA_VS30) 553*de5ccd2aSTony Lindgren iov = IOV_3V0; 554*de5ccd2aSTony Lindgren else 555*de5ccd2aSTony Lindgren iov = IOV_3V3; 556*de5ccd2aSTony Lindgren 5577d326930SKishon Vijay Abraham I sdhci_omap_conf_bus_power(omap_host, ios->signal_voltage); 5587d326930SKishon Vijay Abraham I 5597d326930SKishon Vijay Abraham I reg = sdhci_omap_readl(omap_host, SDHCI_OMAP_AC12); 5607d326930SKishon Vijay Abraham I reg &= ~AC12_V1V8_SIGEN; 5617d326930SKishon Vijay Abraham I sdhci_omap_writel(omap_host, SDHCI_OMAP_AC12, reg); 5627d326930SKishon Vijay Abraham I 5637d326930SKishon Vijay Abraham I } else if (ios->signal_voltage == MMC_SIGNAL_VOLTAGE_180) { 5647d326930SKishon Vijay Abraham I reg = sdhci_omap_readl(omap_host, SDHCI_OMAP_CAPA); 5657d326930SKishon Vijay Abraham I if (!(reg & CAPA_VS18)) 5667d326930SKishon Vijay Abraham I return -EOPNOTSUPP; 5677d326930SKishon Vijay Abraham I 568*de5ccd2aSTony Lindgren iov = IOV_1V8; 569*de5ccd2aSTony Lindgren 5707d326930SKishon Vijay Abraham I sdhci_omap_conf_bus_power(omap_host, ios->signal_voltage); 5717d326930SKishon Vijay Abraham I 5727d326930SKishon Vijay Abraham I reg = sdhci_omap_readl(omap_host, SDHCI_OMAP_AC12); 5737d326930SKishon Vijay Abraham I reg |= AC12_V1V8_SIGEN; 5747d326930SKishon Vijay Abraham I sdhci_omap_writel(omap_host, SDHCI_OMAP_AC12, reg); 5757d326930SKishon Vijay Abraham I } else { 5767d326930SKishon Vijay Abraham I return -EOPNOTSUPP; 5777d326930SKishon Vijay Abraham I } 5787d326930SKishon Vijay Abraham I 5797d326930SKishon Vijay Abraham I ret = sdhci_omap_enable_iov(omap_host, iov); 5807d326930SKishon Vijay Abraham I if (ret) { 5817d326930SKishon Vijay Abraham I dev_err(dev, "failed to switch IO voltage to %dmV\n", iov); 5827d326930SKishon Vijay Abraham I return ret; 5837d326930SKishon Vijay Abraham I } 5847d326930SKishon Vijay Abraham I 5857d326930SKishon Vijay Abraham I dev_dbg(dev, "IO voltage switched to %dmV\n", iov); 5867d326930SKishon Vijay Abraham I return 0; 5877d326930SKishon Vijay Abraham I } 5887d326930SKishon Vijay Abraham I 5898d20b2eaSKishon Vijay Abraham I static void sdhci_omap_set_timing(struct sdhci_omap_host *omap_host, u8 timing) 5908d20b2eaSKishon Vijay Abraham I { 5918d20b2eaSKishon Vijay Abraham I int ret; 5928d20b2eaSKishon Vijay Abraham I struct pinctrl_state *pinctrl_state; 5938d20b2eaSKishon Vijay Abraham I struct device *dev = omap_host->dev; 5948d20b2eaSKishon Vijay Abraham I 5958d20b2eaSKishon Vijay Abraham I if (!(omap_host->flags & SDHCI_OMAP_REQUIRE_IODELAY)) 5968d20b2eaSKishon Vijay Abraham I return; 5978d20b2eaSKishon Vijay Abraham I 5988d20b2eaSKishon Vijay Abraham I if (omap_host->timing == timing) 5998d20b2eaSKishon Vijay Abraham I return; 6008d20b2eaSKishon Vijay Abraham I 6018d20b2eaSKishon Vijay Abraham I sdhci_omap_stop_clock(omap_host); 6028d20b2eaSKishon Vijay Abraham I 6038d20b2eaSKishon Vijay Abraham I pinctrl_state = omap_host->pinctrl_state[timing]; 6048d20b2eaSKishon Vijay Abraham I ret = pinctrl_select_state(omap_host->pinctrl, pinctrl_state); 6058d20b2eaSKishon Vijay Abraham I if (ret) { 6068d20b2eaSKishon Vijay Abraham I dev_err(dev, "failed to select pinctrl state\n"); 6078d20b2eaSKishon Vijay Abraham I return; 6088d20b2eaSKishon Vijay Abraham I } 6098d20b2eaSKishon Vijay Abraham I 6108d20b2eaSKishon Vijay Abraham I sdhci_omap_start_clock(omap_host); 6118d20b2eaSKishon Vijay Abraham I omap_host->timing = timing; 6128d20b2eaSKishon Vijay Abraham I } 6138d20b2eaSKishon Vijay Abraham I 614300df508SKishon Vijay Abraham I static void sdhci_omap_set_power_mode(struct sdhci_omap_host *omap_host, 615300df508SKishon Vijay Abraham I u8 power_mode) 616300df508SKishon Vijay Abraham I { 6179fc2cd76SKishon Vijay Abraham I if (omap_host->bus_mode == MMC_POWER_OFF) 6189fc2cd76SKishon Vijay Abraham I sdhci_omap_disable_tuning(omap_host); 619300df508SKishon Vijay Abraham I omap_host->power_mode = power_mode; 620300df508SKishon Vijay Abraham I } 621300df508SKishon Vijay Abraham I 6227d326930SKishon Vijay Abraham I static void sdhci_omap_set_bus_mode(struct sdhci_omap_host *omap_host, 6237d326930SKishon Vijay Abraham I unsigned int mode) 6247d326930SKishon Vijay Abraham I { 6257d326930SKishon Vijay Abraham I u32 reg; 6267d326930SKishon Vijay Abraham I 6277d326930SKishon Vijay Abraham I if (omap_host->bus_mode == mode) 6287d326930SKishon Vijay Abraham I return; 6297d326930SKishon Vijay Abraham I 6307d326930SKishon Vijay Abraham I reg = sdhci_omap_readl(omap_host, SDHCI_OMAP_CON); 6317d326930SKishon Vijay Abraham I if (mode == MMC_BUSMODE_OPENDRAIN) 6327d326930SKishon Vijay Abraham I reg |= CON_OD; 6337d326930SKishon Vijay Abraham I else 6347d326930SKishon Vijay Abraham I reg &= ~CON_OD; 6357d326930SKishon Vijay Abraham I sdhci_omap_writel(omap_host, SDHCI_OMAP_CON, reg); 6367d326930SKishon Vijay Abraham I 6377d326930SKishon Vijay Abraham I omap_host->bus_mode = mode; 6387d326930SKishon Vijay Abraham I } 6397d326930SKishon Vijay Abraham I 640ddde0e7dSColin Ian King static void sdhci_omap_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) 6417d326930SKishon Vijay Abraham I { 6427d326930SKishon Vijay Abraham I struct sdhci_host *host = mmc_priv(mmc); 6437d326930SKishon Vijay Abraham I struct sdhci_pltfm_host *pltfm_host; 6447d326930SKishon Vijay Abraham I struct sdhci_omap_host *omap_host; 6457d326930SKishon Vijay Abraham I 6467d326930SKishon Vijay Abraham I pltfm_host = sdhci_priv(host); 6477d326930SKishon Vijay Abraham I omap_host = sdhci_pltfm_priv(pltfm_host); 6487d326930SKishon Vijay Abraham I 6497d326930SKishon Vijay Abraham I sdhci_omap_set_bus_mode(omap_host, ios->bus_mode); 6508d20b2eaSKishon Vijay Abraham I sdhci_omap_set_timing(omap_host, ios->timing); 6517d326930SKishon Vijay Abraham I sdhci_set_ios(mmc, ios); 652300df508SKishon Vijay Abraham I sdhci_omap_set_power_mode(omap_host, ios->power_mode); 6537d326930SKishon Vijay Abraham I } 6547d326930SKishon Vijay Abraham I 6557d326930SKishon Vijay Abraham I static u16 sdhci_omap_calc_divisor(struct sdhci_pltfm_host *host, 6567d326930SKishon Vijay Abraham I unsigned int clock) 6577d326930SKishon Vijay Abraham I { 6587d326930SKishon Vijay Abraham I u16 dsor; 6597d326930SKishon Vijay Abraham I 6607d326930SKishon Vijay Abraham I dsor = DIV_ROUND_UP(clk_get_rate(host->clk), clock); 6617d326930SKishon Vijay Abraham I if (dsor > SYSCTL_CLKD_MAX) 6627d326930SKishon Vijay Abraham I dsor = SYSCTL_CLKD_MAX; 6637d326930SKishon Vijay Abraham I 6647d326930SKishon Vijay Abraham I return dsor; 6657d326930SKishon Vijay Abraham I } 6667d326930SKishon Vijay Abraham I 6677d326930SKishon Vijay Abraham I static void sdhci_omap_start_clock(struct sdhci_omap_host *omap_host) 6687d326930SKishon Vijay Abraham I { 6697d326930SKishon Vijay Abraham I u32 reg; 6707d326930SKishon Vijay Abraham I 6717d326930SKishon Vijay Abraham I reg = sdhci_omap_readl(omap_host, SDHCI_OMAP_SYSCTL); 6727d326930SKishon Vijay Abraham I reg |= SYSCTL_CEN; 6737d326930SKishon Vijay Abraham I sdhci_omap_writel(omap_host, SDHCI_OMAP_SYSCTL, reg); 6747d326930SKishon Vijay Abraham I } 6757d326930SKishon Vijay Abraham I 6767d326930SKishon Vijay Abraham I static void sdhci_omap_stop_clock(struct sdhci_omap_host *omap_host) 6777d326930SKishon Vijay Abraham I { 6787d326930SKishon Vijay Abraham I u32 reg; 6797d326930SKishon Vijay Abraham I 6807d326930SKishon Vijay Abraham I reg = sdhci_omap_readl(omap_host, SDHCI_OMAP_SYSCTL); 6817d326930SKishon Vijay Abraham I reg &= ~SYSCTL_CEN; 6827d326930SKishon Vijay Abraham I sdhci_omap_writel(omap_host, SDHCI_OMAP_SYSCTL, reg); 6837d326930SKishon Vijay Abraham I } 6847d326930SKishon Vijay Abraham I 6857d326930SKishon Vijay Abraham I static void sdhci_omap_set_clock(struct sdhci_host *host, unsigned int clock) 6867d326930SKishon Vijay Abraham I { 6877d326930SKishon Vijay Abraham I struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); 6887d326930SKishon Vijay Abraham I struct sdhci_omap_host *omap_host = sdhci_pltfm_priv(pltfm_host); 6897d326930SKishon Vijay Abraham I unsigned long clkdiv; 6907d326930SKishon Vijay Abraham I 6917d326930SKishon Vijay Abraham I sdhci_omap_stop_clock(omap_host); 6927d326930SKishon Vijay Abraham I 6937d326930SKishon Vijay Abraham I if (!clock) 6947d326930SKishon Vijay Abraham I return; 6957d326930SKishon Vijay Abraham I 6967d326930SKishon Vijay Abraham I clkdiv = sdhci_omap_calc_divisor(pltfm_host, clock); 6977d326930SKishon Vijay Abraham I clkdiv = (clkdiv & SYSCTL_CLKD_MASK) << SYSCTL_CLKD_SHIFT; 6987d326930SKishon Vijay Abraham I sdhci_enable_clk(host, clkdiv); 6997d326930SKishon Vijay Abraham I 7007d326930SKishon Vijay Abraham I sdhci_omap_start_clock(omap_host); 7017d326930SKishon Vijay Abraham I } 7027d326930SKishon Vijay Abraham I 703ddde0e7dSColin Ian King static void sdhci_omap_set_power(struct sdhci_host *host, unsigned char mode, 7047d326930SKishon Vijay Abraham I unsigned short vdd) 7057d326930SKishon Vijay Abraham I { 7067d326930SKishon Vijay Abraham I struct mmc_host *mmc = host->mmc; 7077d326930SKishon Vijay Abraham I 7088e0e7bd3STony Lindgren if (!IS_ERR(mmc->supply.vmmc)) 7097d326930SKishon Vijay Abraham I mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, vdd); 7107d326930SKishon Vijay Abraham I } 7117d326930SKishon Vijay Abraham I 712c66e21fdSTony Lindgren /* 713c66e21fdSTony Lindgren * MMCHS_HL_HWINFO has the MADMA_EN bit set if the controller instance 714c66e21fdSTony Lindgren * is connected to L3 interconnect and is bus master capable. Note that 715c66e21fdSTony Lindgren * the MMCHS_HL_HWINFO register is in the module registers before the 716c66e21fdSTony Lindgren * omap registers and sdhci registers. The offset can vary for omap 717c66e21fdSTony Lindgren * registers depending on the SoC. Do not use sdhci_omap_readl() here. 718c66e21fdSTony Lindgren */ 719c66e21fdSTony Lindgren static bool sdhci_omap_has_adma(struct sdhci_omap_host *omap_host, int offset) 720c66e21fdSTony Lindgren { 721c66e21fdSTony Lindgren /* MMCHS_HL_HWINFO register is only available on omap4 and later */ 722c66e21fdSTony Lindgren if (offset < 0x200) 723c66e21fdSTony Lindgren return false; 724c66e21fdSTony Lindgren 725c66e21fdSTony Lindgren return readl(omap_host->base + 4) & 1; 726c66e21fdSTony Lindgren } 727c66e21fdSTony Lindgren 7287d326930SKishon Vijay Abraham I static int sdhci_omap_enable_dma(struct sdhci_host *host) 7297d326930SKishon Vijay Abraham I { 7307d326930SKishon Vijay Abraham I u32 reg; 7317d326930SKishon Vijay Abraham I struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); 7327d326930SKishon Vijay Abraham I struct sdhci_omap_host *omap_host = sdhci_pltfm_priv(pltfm_host); 7337d326930SKishon Vijay Abraham I 7347d326930SKishon Vijay Abraham I reg = sdhci_omap_readl(omap_host, SDHCI_OMAP_CON); 735195fadb7SChunyan Zhang reg &= ~CON_DMA_MASTER; 736195fadb7SChunyan Zhang /* Switch to DMA slave mode when using external DMA */ 737195fadb7SChunyan Zhang if (!host->use_external_dma) 7387d326930SKishon Vijay Abraham I reg |= CON_DMA_MASTER; 739195fadb7SChunyan Zhang 7407d326930SKishon Vijay Abraham I sdhci_omap_writel(omap_host, SDHCI_OMAP_CON, reg); 7417d326930SKishon Vijay Abraham I 7427d326930SKishon Vijay Abraham I return 0; 7437d326930SKishon Vijay Abraham I } 7447d326930SKishon Vijay Abraham I 745ddde0e7dSColin Ian King static unsigned int sdhci_omap_get_min_clock(struct sdhci_host *host) 7467d326930SKishon Vijay Abraham I { 7477d326930SKishon Vijay Abraham I struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); 7487d326930SKishon Vijay Abraham I 7497d326930SKishon Vijay Abraham I return clk_get_rate(pltfm_host->clk) / SYSCTL_CLKD_MAX; 7507d326930SKishon Vijay Abraham I } 7517d326930SKishon Vijay Abraham I 7527d326930SKishon Vijay Abraham I static void sdhci_omap_set_bus_width(struct sdhci_host *host, int width) 7537d326930SKishon Vijay Abraham I { 7547d326930SKishon Vijay Abraham I struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); 7557d326930SKishon Vijay Abraham I struct sdhci_omap_host *omap_host = sdhci_pltfm_priv(pltfm_host); 7567d326930SKishon Vijay Abraham I u32 reg; 7577d326930SKishon Vijay Abraham I 7587d326930SKishon Vijay Abraham I reg = sdhci_omap_readl(omap_host, SDHCI_OMAP_CON); 7597d326930SKishon Vijay Abraham I if (width == MMC_BUS_WIDTH_8) 7607d326930SKishon Vijay Abraham I reg |= CON_DW8; 7617d326930SKishon Vijay Abraham I else 7627d326930SKishon Vijay Abraham I reg &= ~CON_DW8; 7637d326930SKishon Vijay Abraham I sdhci_omap_writel(omap_host, SDHCI_OMAP_CON, reg); 7647d326930SKishon Vijay Abraham I 7657d326930SKishon Vijay Abraham I sdhci_set_bus_width(host, width); 7667d326930SKishon Vijay Abraham I } 7677d326930SKishon Vijay Abraham I 7687d326930SKishon Vijay Abraham I static void sdhci_omap_init_74_clocks(struct sdhci_host *host, u8 power_mode) 7697d326930SKishon Vijay Abraham I { 7707d326930SKishon Vijay Abraham I u32 reg; 7717d326930SKishon Vijay Abraham I ktime_t timeout; 7727d326930SKishon Vijay Abraham I struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); 7737d326930SKishon Vijay Abraham I struct sdhci_omap_host *omap_host = sdhci_pltfm_priv(pltfm_host); 7747d326930SKishon Vijay Abraham I 7757d326930SKishon Vijay Abraham I if (omap_host->power_mode == power_mode) 7767d326930SKishon Vijay Abraham I return; 7777d326930SKishon Vijay Abraham I 7787d326930SKishon Vijay Abraham I if (power_mode != MMC_POWER_ON) 7797d326930SKishon Vijay Abraham I return; 7807d326930SKishon Vijay Abraham I 7817d326930SKishon Vijay Abraham I disable_irq(host->irq); 7827d326930SKishon Vijay Abraham I 7837d326930SKishon Vijay Abraham I reg = sdhci_omap_readl(omap_host, SDHCI_OMAP_CON); 7847d326930SKishon Vijay Abraham I reg |= CON_INIT; 7857d326930SKishon Vijay Abraham I sdhci_omap_writel(omap_host, SDHCI_OMAP_CON, reg); 7867d326930SKishon Vijay Abraham I sdhci_omap_writel(omap_host, SDHCI_OMAP_CMD, 0x0); 7877d326930SKishon Vijay Abraham I 7887d326930SKishon Vijay Abraham I /* wait 1ms */ 7897d326930SKishon Vijay Abraham I timeout = ktime_add_ms(ktime_get(), SDHCI_OMAP_TIMEOUT); 7909f0ea0bdSAdrian Hunter while (1) { 7919f0ea0bdSAdrian Hunter bool timedout = ktime_after(ktime_get(), timeout); 7929f0ea0bdSAdrian Hunter 7939f0ea0bdSAdrian Hunter if (sdhci_omap_readl(omap_host, SDHCI_OMAP_STAT) & INT_CC_EN) 7949f0ea0bdSAdrian Hunter break; 7959f0ea0bdSAdrian Hunter if (WARN_ON(timedout)) 7967d326930SKishon Vijay Abraham I return; 7977d326930SKishon Vijay Abraham I usleep_range(5, 10); 7987d326930SKishon Vijay Abraham I } 7997d326930SKishon Vijay Abraham I 8007d326930SKishon Vijay Abraham I reg = sdhci_omap_readl(omap_host, SDHCI_OMAP_CON); 8017d326930SKishon Vijay Abraham I reg &= ~CON_INIT; 8027d326930SKishon Vijay Abraham I sdhci_omap_writel(omap_host, SDHCI_OMAP_CON, reg); 8037d326930SKishon Vijay Abraham I sdhci_omap_writel(omap_host, SDHCI_OMAP_STAT, INT_CC_EN); 8047d326930SKishon Vijay Abraham I 8057d326930SKishon Vijay Abraham I enable_irq(host->irq); 8067d326930SKishon Vijay Abraham I } 8077d326930SKishon Vijay Abraham I 80827ceb7e0SKishon Vijay Abraham I static void sdhci_omap_set_uhs_signaling(struct sdhci_host *host, 80927ceb7e0SKishon Vijay Abraham I unsigned int timing) 81027ceb7e0SKishon Vijay Abraham I { 81127ceb7e0SKishon Vijay Abraham I u32 reg; 81227ceb7e0SKishon Vijay Abraham I struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); 81327ceb7e0SKishon Vijay Abraham I struct sdhci_omap_host *omap_host = sdhci_pltfm_priv(pltfm_host); 81427ceb7e0SKishon Vijay Abraham I 81527ceb7e0SKishon Vijay Abraham I sdhci_omap_stop_clock(omap_host); 81627ceb7e0SKishon Vijay Abraham I 81727ceb7e0SKishon Vijay Abraham I reg = sdhci_omap_readl(omap_host, SDHCI_OMAP_CON); 81827ceb7e0SKishon Vijay Abraham I if (timing == MMC_TIMING_UHS_DDR50 || timing == MMC_TIMING_MMC_DDR52) 81927ceb7e0SKishon Vijay Abraham I reg |= CON_DDR; 82027ceb7e0SKishon Vijay Abraham I else 82127ceb7e0SKishon Vijay Abraham I reg &= ~CON_DDR; 82227ceb7e0SKishon Vijay Abraham I sdhci_omap_writel(omap_host, SDHCI_OMAP_CON, reg); 82327ceb7e0SKishon Vijay Abraham I 82427ceb7e0SKishon Vijay Abraham I sdhci_set_uhs_signaling(host, timing); 82527ceb7e0SKishon Vijay Abraham I sdhci_omap_start_clock(omap_host); 82627ceb7e0SKishon Vijay Abraham I } 82727ceb7e0SKishon Vijay Abraham I 8289e84a2e6SFaiz Abbas #define MMC_TIMEOUT_US 20000 /* 20000 micro Sec */ 8292198eeffSYueHaibing static void sdhci_omap_reset(struct sdhci_host *host, u8 mask) 8305b0d6210SFaiz Abbas { 8315b0d6210SFaiz Abbas struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); 8325b0d6210SFaiz Abbas struct sdhci_omap_host *omap_host = sdhci_pltfm_priv(pltfm_host); 8339e84a2e6SFaiz Abbas unsigned long limit = MMC_TIMEOUT_US; 8349e84a2e6SFaiz Abbas unsigned long i = 0; 83553f9460eSTony Lindgren u32 sysc; 83653f9460eSTony Lindgren 83753f9460eSTony Lindgren /* Save target module sysconfig configured by SoC PM layer */ 83853f9460eSTony Lindgren if (mask & SDHCI_RESET_ALL) 83953f9460eSTony Lindgren sysc = sdhci_omap_readl(omap_host, SDHCI_OMAP_SYSCONFIG); 8405b0d6210SFaiz Abbas 8415b0d6210SFaiz Abbas /* Don't reset data lines during tuning operation */ 8425b0d6210SFaiz Abbas if (omap_host->is_tuning) 8435b0d6210SFaiz Abbas mask &= ~SDHCI_RESET_DATA; 8445b0d6210SFaiz Abbas 8459e84a2e6SFaiz Abbas if (omap_host->flags & SDHCI_OMAP_SPECIAL_RESET) { 8469e84a2e6SFaiz Abbas sdhci_writeb(host, mask, SDHCI_SOFTWARE_RESET); 8479e84a2e6SFaiz Abbas while ((!(sdhci_readb(host, SDHCI_SOFTWARE_RESET) & mask)) && 8489e84a2e6SFaiz Abbas (i++ < limit)) 8499e84a2e6SFaiz Abbas udelay(1); 8509e84a2e6SFaiz Abbas i = 0; 8519e84a2e6SFaiz Abbas while ((sdhci_readb(host, SDHCI_SOFTWARE_RESET) & mask) && 8529e84a2e6SFaiz Abbas (i++ < limit)) 8539e84a2e6SFaiz Abbas udelay(1); 8549e84a2e6SFaiz Abbas 8559e84a2e6SFaiz Abbas if (sdhci_readb(host, SDHCI_SOFTWARE_RESET) & mask) 8569e84a2e6SFaiz Abbas dev_err(mmc_dev(host->mmc), 8579e84a2e6SFaiz Abbas "Timeout waiting on controller reset in %s\n", 8589e84a2e6SFaiz Abbas __func__); 85953f9460eSTony Lindgren 86053f9460eSTony Lindgren goto restore_sysc; 8619e84a2e6SFaiz Abbas } 8629e84a2e6SFaiz Abbas 8635b0d6210SFaiz Abbas sdhci_reset(host, mask); 86453f9460eSTony Lindgren 86553f9460eSTony Lindgren restore_sysc: 86653f9460eSTony Lindgren if (mask & SDHCI_RESET_ALL) 86753f9460eSTony Lindgren sdhci_omap_writel(omap_host, SDHCI_OMAP_SYSCONFIG, sysc); 8685b0d6210SFaiz Abbas } 8695b0d6210SFaiz Abbas 8705c41ea6dSFaiz Abbas #define CMD_ERR_MASK (SDHCI_INT_CRC | SDHCI_INT_END_BIT | SDHCI_INT_INDEX |\ 8715c41ea6dSFaiz Abbas SDHCI_INT_TIMEOUT) 8725c41ea6dSFaiz Abbas #define CMD_MASK (CMD_ERR_MASK | SDHCI_INT_RESPONSE) 8735c41ea6dSFaiz Abbas 8745c41ea6dSFaiz Abbas static u32 sdhci_omap_irq(struct sdhci_host *host, u32 intmask) 8755c41ea6dSFaiz Abbas { 8765c41ea6dSFaiz Abbas struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); 8775c41ea6dSFaiz Abbas struct sdhci_omap_host *omap_host = sdhci_pltfm_priv(pltfm_host); 8785c41ea6dSFaiz Abbas 8795c41ea6dSFaiz Abbas if (omap_host->is_tuning && host->cmd && !host->data_early && 8805c41ea6dSFaiz Abbas (intmask & CMD_ERR_MASK)) { 8815c41ea6dSFaiz Abbas 8825c41ea6dSFaiz Abbas /* 8835c41ea6dSFaiz Abbas * Since we are not resetting data lines during tuning 8845c41ea6dSFaiz Abbas * operation, data error or data complete interrupts 8855c41ea6dSFaiz Abbas * might still arrive. Mark this request as a failure 8865c41ea6dSFaiz Abbas * but still wait for the data interrupt 8875c41ea6dSFaiz Abbas */ 8885c41ea6dSFaiz Abbas if (intmask & SDHCI_INT_TIMEOUT) 8895c41ea6dSFaiz Abbas host->cmd->error = -ETIMEDOUT; 8905c41ea6dSFaiz Abbas else 8915c41ea6dSFaiz Abbas host->cmd->error = -EILSEQ; 8925c41ea6dSFaiz Abbas 8935c41ea6dSFaiz Abbas host->cmd = NULL; 8945c41ea6dSFaiz Abbas 8955c41ea6dSFaiz Abbas /* 8965c41ea6dSFaiz Abbas * Sometimes command error interrupts and command complete 8975c41ea6dSFaiz Abbas * interrupt will arrive together. Clear all command related 8985c41ea6dSFaiz Abbas * interrupts here. 8995c41ea6dSFaiz Abbas */ 9005c41ea6dSFaiz Abbas sdhci_writel(host, intmask & CMD_MASK, SDHCI_INT_STATUS); 9015c41ea6dSFaiz Abbas intmask &= ~CMD_MASK; 9025c41ea6dSFaiz Abbas } 9035c41ea6dSFaiz Abbas 9045c41ea6dSFaiz Abbas return intmask; 9055c41ea6dSFaiz Abbas } 9065c41ea6dSFaiz Abbas 9075da5e494SFaiz Abbas static void sdhci_omap_set_timeout(struct sdhci_host *host, 9085da5e494SFaiz Abbas struct mmc_command *cmd) 9095da5e494SFaiz Abbas { 9105da5e494SFaiz Abbas if (cmd->opcode == MMC_ERASE) 9115da5e494SFaiz Abbas sdhci_set_data_timeout_irq(host, false); 9125da5e494SFaiz Abbas 9135da5e494SFaiz Abbas __sdhci_set_timeout(host, cmd); 9145da5e494SFaiz Abbas } 9155da5e494SFaiz Abbas 9167d326930SKishon Vijay Abraham I static struct sdhci_ops sdhci_omap_ops = { 9177d326930SKishon Vijay Abraham I .set_clock = sdhci_omap_set_clock, 9187d326930SKishon Vijay Abraham I .set_power = sdhci_omap_set_power, 9197d326930SKishon Vijay Abraham I .enable_dma = sdhci_omap_enable_dma, 9207d326930SKishon Vijay Abraham I .get_max_clock = sdhci_pltfm_clk_get_max_clock, 9217d326930SKishon Vijay Abraham I .get_min_clock = sdhci_omap_get_min_clock, 9227d326930SKishon Vijay Abraham I .set_bus_width = sdhci_omap_set_bus_width, 9237d326930SKishon Vijay Abraham I .platform_send_init_74_clocks = sdhci_omap_init_74_clocks, 9245b0d6210SFaiz Abbas .reset = sdhci_omap_reset, 92527ceb7e0SKishon Vijay Abraham I .set_uhs_signaling = sdhci_omap_set_uhs_signaling, 9265c41ea6dSFaiz Abbas .irq = sdhci_omap_irq, 9275da5e494SFaiz Abbas .set_timeout = sdhci_omap_set_timeout, 9287d326930SKishon Vijay Abraham I }; 9297d326930SKishon Vijay Abraham I 930*de5ccd2aSTony Lindgren static unsigned int sdhci_omap_regulator_get_caps(struct device *dev, 931*de5ccd2aSTony Lindgren const char *name) 9327d326930SKishon Vijay Abraham I { 933*de5ccd2aSTony Lindgren struct regulator *reg; 934*de5ccd2aSTony Lindgren unsigned int caps = 0; 9357d326930SKishon Vijay Abraham I 936*de5ccd2aSTony Lindgren reg = regulator_get(dev, name); 937*de5ccd2aSTony Lindgren if (IS_ERR(reg)) 938*de5ccd2aSTony Lindgren return ~0U; 939*de5ccd2aSTony Lindgren 940*de5ccd2aSTony Lindgren if (regulator_is_supported_voltage(reg, 1700000, 1950000)) 941*de5ccd2aSTony Lindgren caps |= SDHCI_CAN_VDD_180; 942*de5ccd2aSTony Lindgren if (regulator_is_supported_voltage(reg, 2700000, 3150000)) 943*de5ccd2aSTony Lindgren caps |= SDHCI_CAN_VDD_300; 944*de5ccd2aSTony Lindgren if (regulator_is_supported_voltage(reg, 3150000, 3600000)) 945*de5ccd2aSTony Lindgren caps |= SDHCI_CAN_VDD_330; 946*de5ccd2aSTony Lindgren 947*de5ccd2aSTony Lindgren regulator_put(reg); 948*de5ccd2aSTony Lindgren 949*de5ccd2aSTony Lindgren return caps; 9507d326930SKishon Vijay Abraham I } 9517d326930SKishon Vijay Abraham I 952*de5ccd2aSTony Lindgren static int sdhci_omap_set_capabilities(struct sdhci_host *host) 953*de5ccd2aSTony Lindgren { 954*de5ccd2aSTony Lindgren struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); 955*de5ccd2aSTony Lindgren struct sdhci_omap_host *omap_host = sdhci_pltfm_priv(pltfm_host); 956*de5ccd2aSTony Lindgren struct device *dev = omap_host->dev; 957*de5ccd2aSTony Lindgren const u32 mask = SDHCI_CAN_VDD_180 | SDHCI_CAN_VDD_300 | SDHCI_CAN_VDD_330; 958*de5ccd2aSTony Lindgren unsigned int pbias, vqmmc, caps = 0; 959*de5ccd2aSTony Lindgren u32 reg; 960*de5ccd2aSTony Lindgren 961*de5ccd2aSTony Lindgren pbias = sdhci_omap_regulator_get_caps(dev, "pbias"); 962*de5ccd2aSTony Lindgren vqmmc = sdhci_omap_regulator_get_caps(dev, "vqmmc"); 963*de5ccd2aSTony Lindgren caps = pbias & vqmmc; 964*de5ccd2aSTony Lindgren 965*de5ccd2aSTony Lindgren if (pbias != ~0U && vqmmc == ~0U) 966*de5ccd2aSTony Lindgren dev_warn(dev, "vqmmc regulator missing for pbias\n"); 967*de5ccd2aSTony Lindgren else if (caps == ~0U) 968*de5ccd2aSTony Lindgren return 0; 969*de5ccd2aSTony Lindgren 970*de5ccd2aSTony Lindgren /* 971*de5ccd2aSTony Lindgren * Quirk handling to allow 3.0V vqmmc with a valid 3.3V PBIAS. This is 972*de5ccd2aSTony Lindgren * needed for 3.0V ldo9_reg on omap5 at least. 973*de5ccd2aSTony Lindgren */ 974*de5ccd2aSTony Lindgren if (pbias != ~0U && (pbias & SDHCI_CAN_VDD_330) && 975*de5ccd2aSTony Lindgren (vqmmc & SDHCI_CAN_VDD_300)) 976*de5ccd2aSTony Lindgren caps |= SDHCI_CAN_VDD_330; 977*de5ccd2aSTony Lindgren 9787d326930SKishon Vijay Abraham I /* voltage capabilities might be set by boot loader, clear it */ 9797d326930SKishon Vijay Abraham I reg = sdhci_omap_readl(omap_host, SDHCI_OMAP_CAPA); 9807d326930SKishon Vijay Abraham I reg &= ~(CAPA_VS18 | CAPA_VS30 | CAPA_VS33); 9817d326930SKishon Vijay Abraham I 982*de5ccd2aSTony Lindgren if (caps & SDHCI_CAN_VDD_180) 9837d326930SKishon Vijay Abraham I reg |= CAPA_VS18; 9847d326930SKishon Vijay Abraham I 985*de5ccd2aSTony Lindgren if (caps & SDHCI_CAN_VDD_300) 986*de5ccd2aSTony Lindgren reg |= CAPA_VS30; 987*de5ccd2aSTony Lindgren 988*de5ccd2aSTony Lindgren if (caps & SDHCI_CAN_VDD_330) 989*de5ccd2aSTony Lindgren reg |= CAPA_VS33; 990*de5ccd2aSTony Lindgren 9917d326930SKishon Vijay Abraham I sdhci_omap_writel(omap_host, SDHCI_OMAP_CAPA, reg); 9927d326930SKishon Vijay Abraham I 993*de5ccd2aSTony Lindgren host->caps &= ~mask; 994*de5ccd2aSTony Lindgren host->caps |= caps; 9957d326930SKishon Vijay Abraham I 996*de5ccd2aSTony Lindgren return 0; 9977d326930SKishon Vijay Abraham I } 9987d326930SKishon Vijay Abraham I 9997d326930SKishon Vijay Abraham I static const struct sdhci_pltfm_data sdhci_omap_pdata = { 10007d326930SKishon Vijay Abraham I .quirks = SDHCI_QUIRK_BROKEN_CARD_DETECTION | 10017d326930SKishon Vijay Abraham I SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK | 10027d326930SKishon Vijay Abraham I SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN | 10037d326930SKishon Vijay Abraham I SDHCI_QUIRK_NO_HISPD_BIT | 10047d326930SKishon Vijay Abraham I SDHCI_QUIRK_BROKEN_ADMA_ZEROLEN_DESC, 1005e0b2dbcfSKishon Vijay Abraham I .quirks2 = SDHCI_QUIRK2_ACMD23_BROKEN | 1006e0b2dbcfSKishon Vijay Abraham I SDHCI_QUIRK2_PRESET_VALUE_BROKEN | 100725f80d86SKishon Vijay Abraham I SDHCI_QUIRK2_RSP_136_HAS_CRC | 100825f80d86SKishon Vijay Abraham I SDHCI_QUIRK2_DISABLE_HW_TIMEOUT, 10097d326930SKishon Vijay Abraham I .ops = &sdhci_omap_ops, 10107d326930SKishon Vijay Abraham I }; 10117d326930SKishon Vijay Abraham I 1012*de5ccd2aSTony Lindgren static const struct sdhci_omap_data omap4_data = { 1013*de5ccd2aSTony Lindgren .offset = 0x200, 1014*de5ccd2aSTony Lindgren .flags = SDHCI_OMAP_SPECIAL_RESET, 1015*de5ccd2aSTony Lindgren }; 1016*de5ccd2aSTony Lindgren 1017*de5ccd2aSTony Lindgren static const struct sdhci_omap_data omap5_data = { 1018*de5ccd2aSTony Lindgren .offset = 0x200, 1019*de5ccd2aSTony Lindgren .flags = SDHCI_OMAP_SPECIAL_RESET, 1020*de5ccd2aSTony Lindgren }; 1021*de5ccd2aSTony Lindgren 10226d75df75SKishon Vijay Abraham I static const struct sdhci_omap_data k2g_data = { 10236d75df75SKishon Vijay Abraham I .offset = 0x200, 10246d75df75SKishon Vijay Abraham I }; 10256d75df75SKishon Vijay Abraham I 1026d6fe4928SFaiz Abbas static const struct sdhci_omap_data am335_data = { 1027d6fe4928SFaiz Abbas .offset = 0x200, 10289e84a2e6SFaiz Abbas .flags = SDHCI_OMAP_SPECIAL_RESET, 1029d6fe4928SFaiz Abbas }; 1030d6fe4928SFaiz Abbas 1031d6fe4928SFaiz Abbas static const struct sdhci_omap_data am437_data = { 1032d6fe4928SFaiz Abbas .offset = 0x200, 10339e84a2e6SFaiz Abbas .flags = SDHCI_OMAP_SPECIAL_RESET, 1034d6fe4928SFaiz Abbas }; 1035d6fe4928SFaiz Abbas 10367d326930SKishon Vijay Abraham I static const struct sdhci_omap_data dra7_data = { 10377d326930SKishon Vijay Abraham I .offset = 0x200, 10388d20b2eaSKishon Vijay Abraham I .flags = SDHCI_OMAP_REQUIRE_IODELAY, 10397d326930SKishon Vijay Abraham I }; 10407d326930SKishon Vijay Abraham I 10417d326930SKishon Vijay Abraham I static const struct of_device_id omap_sdhci_match[] = { 1042*de5ccd2aSTony Lindgren { .compatible = "ti,omap4-sdhci", .data = &omap4_data }, 1043*de5ccd2aSTony Lindgren { .compatible = "ti,omap5-sdhci", .data = &omap5_data }, 10447d326930SKishon Vijay Abraham I { .compatible = "ti,dra7-sdhci", .data = &dra7_data }, 10456d75df75SKishon Vijay Abraham I { .compatible = "ti,k2g-sdhci", .data = &k2g_data }, 1046d6fe4928SFaiz Abbas { .compatible = "ti,am335-sdhci", .data = &am335_data }, 1047d6fe4928SFaiz Abbas { .compatible = "ti,am437-sdhci", .data = &am437_data }, 10487d326930SKishon Vijay Abraham I {}, 10497d326930SKishon Vijay Abraham I }; 10507d326930SKishon Vijay Abraham I MODULE_DEVICE_TABLE(of, omap_sdhci_match); 10517d326930SKishon Vijay Abraham I 10528d20b2eaSKishon Vijay Abraham I static struct pinctrl_state 10538d20b2eaSKishon Vijay Abraham I *sdhci_omap_iodelay_pinctrl_state(struct sdhci_omap_host *omap_host, char *mode, 10548d20b2eaSKishon Vijay Abraham I u32 *caps, u32 capmask) 10558d20b2eaSKishon Vijay Abraham I { 10568d20b2eaSKishon Vijay Abraham I struct device *dev = omap_host->dev; 1057212f4f8aSKishon Vijay Abraham I char *version = omap_host->version; 10588d20b2eaSKishon Vijay Abraham I struct pinctrl_state *pinctrl_state = ERR_PTR(-ENODEV); 1059212f4f8aSKishon Vijay Abraham I char str[20]; 10608d20b2eaSKishon Vijay Abraham I 10618d20b2eaSKishon Vijay Abraham I if (!(*caps & capmask)) 10628d20b2eaSKishon Vijay Abraham I goto ret; 10638d20b2eaSKishon Vijay Abraham I 1064212f4f8aSKishon Vijay Abraham I if (version) { 1065212f4f8aSKishon Vijay Abraham I snprintf(str, 20, "%s-%s", mode, version); 1066212f4f8aSKishon Vijay Abraham I pinctrl_state = pinctrl_lookup_state(omap_host->pinctrl, str); 1067212f4f8aSKishon Vijay Abraham I } 1068212f4f8aSKishon Vijay Abraham I 1069212f4f8aSKishon Vijay Abraham I if (IS_ERR(pinctrl_state)) 10708d20b2eaSKishon Vijay Abraham I pinctrl_state = pinctrl_lookup_state(omap_host->pinctrl, mode); 1071212f4f8aSKishon Vijay Abraham I 10728d20b2eaSKishon Vijay Abraham I if (IS_ERR(pinctrl_state)) { 10738d20b2eaSKishon Vijay Abraham I dev_err(dev, "no pinctrl state for %s mode", mode); 10748d20b2eaSKishon Vijay Abraham I *caps &= ~capmask; 10758d20b2eaSKishon Vijay Abraham I } 10768d20b2eaSKishon Vijay Abraham I 10778d20b2eaSKishon Vijay Abraham I ret: 10788d20b2eaSKishon Vijay Abraham I return pinctrl_state; 10798d20b2eaSKishon Vijay Abraham I } 10808d20b2eaSKishon Vijay Abraham I 10818d20b2eaSKishon Vijay Abraham I static int sdhci_omap_config_iodelay_pinctrl_state(struct sdhci_omap_host 10828d20b2eaSKishon Vijay Abraham I *omap_host) 10838d20b2eaSKishon Vijay Abraham I { 10848d20b2eaSKishon Vijay Abraham I struct device *dev = omap_host->dev; 10858d20b2eaSKishon Vijay Abraham I struct sdhci_host *host = omap_host->host; 10868d20b2eaSKishon Vijay Abraham I struct mmc_host *mmc = host->mmc; 10878d20b2eaSKishon Vijay Abraham I u32 *caps = &mmc->caps; 10888d20b2eaSKishon Vijay Abraham I u32 *caps2 = &mmc->caps2; 10898d20b2eaSKishon Vijay Abraham I struct pinctrl_state *state; 10908d20b2eaSKishon Vijay Abraham I struct pinctrl_state **pinctrl_state; 10918d20b2eaSKishon Vijay Abraham I 10928d20b2eaSKishon Vijay Abraham I if (!(omap_host->flags & SDHCI_OMAP_REQUIRE_IODELAY)) 10938d20b2eaSKishon Vijay Abraham I return 0; 10948d20b2eaSKishon Vijay Abraham I 1095a86854d0SKees Cook pinctrl_state = devm_kcalloc(dev, 1096a86854d0SKees Cook MMC_TIMING_MMC_HS200 + 1, 1097a86854d0SKees Cook sizeof(*pinctrl_state), 1098a86854d0SKees Cook GFP_KERNEL); 10998d20b2eaSKishon Vijay Abraham I if (!pinctrl_state) 11008d20b2eaSKishon Vijay Abraham I return -ENOMEM; 11018d20b2eaSKishon Vijay Abraham I 11028d20b2eaSKishon Vijay Abraham I omap_host->pinctrl = devm_pinctrl_get(omap_host->dev); 11038d20b2eaSKishon Vijay Abraham I if (IS_ERR(omap_host->pinctrl)) { 11048d20b2eaSKishon Vijay Abraham I dev_err(dev, "Cannot get pinctrl\n"); 11058d20b2eaSKishon Vijay Abraham I return PTR_ERR(omap_host->pinctrl); 11068d20b2eaSKishon Vijay Abraham I } 11078d20b2eaSKishon Vijay Abraham I 11088d20b2eaSKishon Vijay Abraham I state = pinctrl_lookup_state(omap_host->pinctrl, "default"); 11098d20b2eaSKishon Vijay Abraham I if (IS_ERR(state)) { 11108d20b2eaSKishon Vijay Abraham I dev_err(dev, "no pinctrl state for default mode\n"); 11118d20b2eaSKishon Vijay Abraham I return PTR_ERR(state); 11128d20b2eaSKishon Vijay Abraham I } 11138d20b2eaSKishon Vijay Abraham I pinctrl_state[MMC_TIMING_LEGACY] = state; 11148d20b2eaSKishon Vijay Abraham I 11158d20b2eaSKishon Vijay Abraham I state = sdhci_omap_iodelay_pinctrl_state(omap_host, "sdr104", caps, 11168d20b2eaSKishon Vijay Abraham I MMC_CAP_UHS_SDR104); 11178d20b2eaSKishon Vijay Abraham I if (!IS_ERR(state)) 11188d20b2eaSKishon Vijay Abraham I pinctrl_state[MMC_TIMING_UHS_SDR104] = state; 11198d20b2eaSKishon Vijay Abraham I 11208d20b2eaSKishon Vijay Abraham I state = sdhci_omap_iodelay_pinctrl_state(omap_host, "ddr50", caps, 11218d20b2eaSKishon Vijay Abraham I MMC_CAP_UHS_DDR50); 11228d20b2eaSKishon Vijay Abraham I if (!IS_ERR(state)) 11238d20b2eaSKishon Vijay Abraham I pinctrl_state[MMC_TIMING_UHS_DDR50] = state; 11248d20b2eaSKishon Vijay Abraham I 11258d20b2eaSKishon Vijay Abraham I state = sdhci_omap_iodelay_pinctrl_state(omap_host, "sdr50", caps, 11268d20b2eaSKishon Vijay Abraham I MMC_CAP_UHS_SDR50); 11278d20b2eaSKishon Vijay Abraham I if (!IS_ERR(state)) 11288d20b2eaSKishon Vijay Abraham I pinctrl_state[MMC_TIMING_UHS_SDR50] = state; 11298d20b2eaSKishon Vijay Abraham I 11308d20b2eaSKishon Vijay Abraham I state = sdhci_omap_iodelay_pinctrl_state(omap_host, "sdr25", caps, 11318d20b2eaSKishon Vijay Abraham I MMC_CAP_UHS_SDR25); 11328d20b2eaSKishon Vijay Abraham I if (!IS_ERR(state)) 11338d20b2eaSKishon Vijay Abraham I pinctrl_state[MMC_TIMING_UHS_SDR25] = state; 11348d20b2eaSKishon Vijay Abraham I 11358d20b2eaSKishon Vijay Abraham I state = sdhci_omap_iodelay_pinctrl_state(omap_host, "sdr12", caps, 11368d20b2eaSKishon Vijay Abraham I MMC_CAP_UHS_SDR12); 11378d20b2eaSKishon Vijay Abraham I if (!IS_ERR(state)) 11388d20b2eaSKishon Vijay Abraham I pinctrl_state[MMC_TIMING_UHS_SDR12] = state; 11398d20b2eaSKishon Vijay Abraham I 11408d20b2eaSKishon Vijay Abraham I state = sdhci_omap_iodelay_pinctrl_state(omap_host, "ddr_1_8v", caps, 11418d20b2eaSKishon Vijay Abraham I MMC_CAP_1_8V_DDR); 11423f402878SKishon Vijay Abraham I if (!IS_ERR(state)) { 11433f402878SKishon Vijay Abraham I pinctrl_state[MMC_TIMING_MMC_DDR52] = state; 11443f402878SKishon Vijay Abraham I } else { 11453f402878SKishon Vijay Abraham I state = sdhci_omap_iodelay_pinctrl_state(omap_host, "ddr_3_3v", 11463f402878SKishon Vijay Abraham I caps, 11473f402878SKishon Vijay Abraham I MMC_CAP_3_3V_DDR); 11488d20b2eaSKishon Vijay Abraham I if (!IS_ERR(state)) 11498d20b2eaSKishon Vijay Abraham I pinctrl_state[MMC_TIMING_MMC_DDR52] = state; 11503f402878SKishon Vijay Abraham I } 11518d20b2eaSKishon Vijay Abraham I 11528d20b2eaSKishon Vijay Abraham I state = sdhci_omap_iodelay_pinctrl_state(omap_host, "hs", caps, 11538d20b2eaSKishon Vijay Abraham I MMC_CAP_SD_HIGHSPEED); 11548d20b2eaSKishon Vijay Abraham I if (!IS_ERR(state)) 11558d20b2eaSKishon Vijay Abraham I pinctrl_state[MMC_TIMING_SD_HS] = state; 11568d20b2eaSKishon Vijay Abraham I 11578d20b2eaSKishon Vijay Abraham I state = sdhci_omap_iodelay_pinctrl_state(omap_host, "hs", caps, 11588d20b2eaSKishon Vijay Abraham I MMC_CAP_MMC_HIGHSPEED); 11598d20b2eaSKishon Vijay Abraham I if (!IS_ERR(state)) 11608d20b2eaSKishon Vijay Abraham I pinctrl_state[MMC_TIMING_MMC_HS] = state; 11618d20b2eaSKishon Vijay Abraham I 11628d20b2eaSKishon Vijay Abraham I state = sdhci_omap_iodelay_pinctrl_state(omap_host, "hs200_1_8v", caps2, 11638d20b2eaSKishon Vijay Abraham I MMC_CAP2_HS200_1_8V_SDR); 11648d20b2eaSKishon Vijay Abraham I if (!IS_ERR(state)) 11658d20b2eaSKishon Vijay Abraham I pinctrl_state[MMC_TIMING_MMC_HS200] = state; 11668d20b2eaSKishon Vijay Abraham I 11678d20b2eaSKishon Vijay Abraham I omap_host->pinctrl_state = pinctrl_state; 11688d20b2eaSKishon Vijay Abraham I 11698d20b2eaSKishon Vijay Abraham I return 0; 11708d20b2eaSKishon Vijay Abraham I } 11718d20b2eaSKishon Vijay Abraham I 1172212f4f8aSKishon Vijay Abraham I static const struct soc_device_attribute sdhci_omap_soc_devices[] = { 1173212f4f8aSKishon Vijay Abraham I { 1174212f4f8aSKishon Vijay Abraham I .machine = "DRA7[45]*", 1175212f4f8aSKishon Vijay Abraham I .revision = "ES1.[01]", 1176212f4f8aSKishon Vijay Abraham I }, 1177212f4f8aSKishon Vijay Abraham I { 1178212f4f8aSKishon Vijay Abraham I /* sentinel */ 1179212f4f8aSKishon Vijay Abraham I } 1180212f4f8aSKishon Vijay Abraham I }; 1181212f4f8aSKishon Vijay Abraham I 11827d326930SKishon Vijay Abraham I static int sdhci_omap_probe(struct platform_device *pdev) 11837d326930SKishon Vijay Abraham I { 11847d326930SKishon Vijay Abraham I int ret; 11857d326930SKishon Vijay Abraham I u32 offset; 11867d326930SKishon Vijay Abraham I struct device *dev = &pdev->dev; 11877d326930SKishon Vijay Abraham I struct sdhci_host *host; 11887d326930SKishon Vijay Abraham I struct sdhci_pltfm_host *pltfm_host; 11897d326930SKishon Vijay Abraham I struct sdhci_omap_host *omap_host; 11907d326930SKishon Vijay Abraham I struct mmc_host *mmc; 11917d326930SKishon Vijay Abraham I const struct of_device_id *match; 11927d326930SKishon Vijay Abraham I struct sdhci_omap_data *data; 1193212f4f8aSKishon Vijay Abraham I const struct soc_device_attribute *soc; 1194195fadb7SChunyan Zhang struct resource *regs; 11957d326930SKishon Vijay Abraham I 11967d326930SKishon Vijay Abraham I match = of_match_device(omap_sdhci_match, dev); 11977d326930SKishon Vijay Abraham I if (!match) 11987d326930SKishon Vijay Abraham I return -EINVAL; 11997d326930SKishon Vijay Abraham I 12007d326930SKishon Vijay Abraham I data = (struct sdhci_omap_data *)match->data; 12017d326930SKishon Vijay Abraham I if (!data) { 12027d326930SKishon Vijay Abraham I dev_err(dev, "no sdhci omap data\n"); 12037d326930SKishon Vijay Abraham I return -EINVAL; 12047d326930SKishon Vijay Abraham I } 12057d326930SKishon Vijay Abraham I offset = data->offset; 12067d326930SKishon Vijay Abraham I 1207195fadb7SChunyan Zhang regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); 1208195fadb7SChunyan Zhang if (!regs) 1209195fadb7SChunyan Zhang return -ENXIO; 1210195fadb7SChunyan Zhang 12117d326930SKishon Vijay Abraham I host = sdhci_pltfm_init(pdev, &sdhci_omap_pdata, 12127d326930SKishon Vijay Abraham I sizeof(*omap_host)); 12137d326930SKishon Vijay Abraham I if (IS_ERR(host)) { 12147d326930SKishon Vijay Abraham I dev_err(dev, "Failed sdhci_pltfm_init\n"); 12157d326930SKishon Vijay Abraham I return PTR_ERR(host); 12167d326930SKishon Vijay Abraham I } 12177d326930SKishon Vijay Abraham I 12187d326930SKishon Vijay Abraham I pltfm_host = sdhci_priv(host); 12197d326930SKishon Vijay Abraham I omap_host = sdhci_pltfm_priv(pltfm_host); 12207d326930SKishon Vijay Abraham I omap_host->host = host; 12217d326930SKishon Vijay Abraham I omap_host->base = host->ioaddr; 12227d326930SKishon Vijay Abraham I omap_host->dev = dev; 1223300df508SKishon Vijay Abraham I omap_host->power_mode = MMC_POWER_UNDEFINED; 12248d20b2eaSKishon Vijay Abraham I omap_host->timing = MMC_TIMING_LEGACY; 12258d20b2eaSKishon Vijay Abraham I omap_host->flags = data->flags; 12267d326930SKishon Vijay Abraham I host->ioaddr += offset; 1227195fadb7SChunyan Zhang host->mapbase = regs->start + offset; 12287d326930SKishon Vijay Abraham I 12297d326930SKishon Vijay Abraham I mmc = host->mmc; 12301d3a2220SKishon Vijay Abraham I sdhci_get_of_property(pdev); 12317d326930SKishon Vijay Abraham I ret = mmc_of_parse(mmc); 12327d326930SKishon Vijay Abraham I if (ret) 12337d326930SKishon Vijay Abraham I goto err_pltfm_free; 12347d326930SKishon Vijay Abraham I 1235212f4f8aSKishon Vijay Abraham I soc = soc_device_match(sdhci_omap_soc_devices); 1236212f4f8aSKishon Vijay Abraham I if (soc) { 1237212f4f8aSKishon Vijay Abraham I omap_host->version = "rev11"; 1238212f4f8aSKishon Vijay Abraham I if (!strcmp(dev_name(dev), "4809c000.mmc")) 1239212f4f8aSKishon Vijay Abraham I mmc->f_max = 96000000; 1240212f4f8aSKishon Vijay Abraham I if (!strcmp(dev_name(dev), "480b4000.mmc")) 1241212f4f8aSKishon Vijay Abraham I mmc->f_max = 48000000; 1242212f4f8aSKishon Vijay Abraham I if (!strcmp(dev_name(dev), "480ad000.mmc")) 1243212f4f8aSKishon Vijay Abraham I mmc->f_max = 48000000; 1244212f4f8aSKishon Vijay Abraham I } 1245212f4f8aSKishon Vijay Abraham I 1246031d2cccSKishon Vijay Abraham I if (!mmc_can_gpio_ro(mmc)) 1247031d2cccSKishon Vijay Abraham I mmc->caps2 |= MMC_CAP2_NO_WRITE_PROTECT; 1248031d2cccSKishon Vijay Abraham I 12497d326930SKishon Vijay Abraham I pltfm_host->clk = devm_clk_get(dev, "fck"); 12507d326930SKishon Vijay Abraham I if (IS_ERR(pltfm_host->clk)) { 12517d326930SKishon Vijay Abraham I ret = PTR_ERR(pltfm_host->clk); 12527d326930SKishon Vijay Abraham I goto err_pltfm_free; 12537d326930SKishon Vijay Abraham I } 12547d326930SKishon Vijay Abraham I 12557d326930SKishon Vijay Abraham I ret = clk_set_rate(pltfm_host->clk, mmc->f_max); 12567d326930SKishon Vijay Abraham I if (ret) { 12577d326930SKishon Vijay Abraham I dev_err(dev, "failed to set clock to %d\n", mmc->f_max); 12587d326930SKishon Vijay Abraham I goto err_pltfm_free; 12597d326930SKishon Vijay Abraham I } 12607d326930SKishon Vijay Abraham I 12617d326930SKishon Vijay Abraham I omap_host->pbias = devm_regulator_get_optional(dev, "pbias"); 12627d326930SKishon Vijay Abraham I if (IS_ERR(omap_host->pbias)) { 12637d326930SKishon Vijay Abraham I ret = PTR_ERR(omap_host->pbias); 12647d326930SKishon Vijay Abraham I if (ret != -ENODEV) 12657d326930SKishon Vijay Abraham I goto err_pltfm_free; 12667d326930SKishon Vijay Abraham I dev_dbg(dev, "unable to get pbias regulator %d\n", ret); 12677d326930SKishon Vijay Abraham I } 12687d326930SKishon Vijay Abraham I omap_host->pbias_enabled = false; 12697d326930SKishon Vijay Abraham I 12707d326930SKishon Vijay Abraham I /* 12717d326930SKishon Vijay Abraham I * omap_device_pm_domain has callbacks to enable the main 12727d326930SKishon Vijay Abraham I * functional clock, interface clock and also configure the 12737d326930SKishon Vijay Abraham I * SYSCONFIG register of omap devices. The callback will be invoked 12747d326930SKishon Vijay Abraham I * as part of pm_runtime_get_sync. 12757d326930SKishon Vijay Abraham I */ 12767d326930SKishon Vijay Abraham I pm_runtime_enable(dev); 1277809ae4e1STian Tao ret = pm_runtime_resume_and_get(dev); 1278809ae4e1STian Tao if (ret) { 12797d326930SKishon Vijay Abraham I dev_err(dev, "pm_runtime_get_sync failed\n"); 12807d326930SKishon Vijay Abraham I goto err_rpm_disable; 12817d326930SKishon Vijay Abraham I } 12827d326930SKishon Vijay Abraham I 1283*de5ccd2aSTony Lindgren ret = sdhci_omap_set_capabilities(host); 12847d326930SKishon Vijay Abraham I if (ret) { 12857d326930SKishon Vijay Abraham I dev_err(dev, "failed to set system capabilities\n"); 12867d326930SKishon Vijay Abraham I goto err_put_sync; 12877d326930SKishon Vijay Abraham I } 12887d326930SKishon Vijay Abraham I 12897d326930SKishon Vijay Abraham I host->mmc_host_ops.start_signal_voltage_switch = 12907d326930SKishon Vijay Abraham I sdhci_omap_start_signal_voltage_switch; 12917d326930SKishon Vijay Abraham I host->mmc_host_ops.set_ios = sdhci_omap_set_ios; 129220ea26a1SKishon Vijay Abraham I host->mmc_host_ops.card_busy = sdhci_omap_card_busy; 12939fc2cd76SKishon Vijay Abraham I host->mmc_host_ops.execute_tuning = sdhci_omap_execute_tuning; 1294efde12b2SKishon Vijay Abraham I host->mmc_host_ops.enable_sdio_irq = sdhci_omap_enable_sdio_irq; 12957d326930SKishon Vijay Abraham I 1296c66e21fdSTony Lindgren /* 1297c66e21fdSTony Lindgren * Switch to external DMA only if there is the "dmas" property and 1298c66e21fdSTony Lindgren * ADMA is not available on the controller instance. 1299c66e21fdSTony Lindgren */ 1300c66e21fdSTony Lindgren if (device_property_present(dev, "dmas") && 1301c66e21fdSTony Lindgren !sdhci_omap_has_adma(omap_host, offset)) 1302195fadb7SChunyan Zhang sdhci_switch_external_dma(host, true); 1303195fadb7SChunyan Zhang 13043781d288STony Lindgren if (device_property_read_bool(dev, "ti,non-removable")) { 13053781d288STony Lindgren dev_warn_once(dev, "using old ti,non-removable property\n"); 13063781d288STony Lindgren mmc->caps |= MMC_CAP_NONREMOVABLE; 13073781d288STony Lindgren } 13083781d288STony Lindgren 1309055e0483SUlf Hansson /* R1B responses is required to properly manage HW busy detection. */ 1310055e0483SUlf Hansson mmc->caps |= MMC_CAP_NEED_RSP_BUSY; 1311055e0483SUlf Hansson 13120ec4ee3cSKishon Vijay Abraham I ret = sdhci_setup_host(host); 13137d326930SKishon Vijay Abraham I if (ret) 13147d326930SKishon Vijay Abraham I goto err_put_sync; 13157d326930SKishon Vijay Abraham I 13160ec4ee3cSKishon Vijay Abraham I ret = sdhci_omap_config_iodelay_pinctrl_state(omap_host); 13170ec4ee3cSKishon Vijay Abraham I if (ret) 13180ec4ee3cSKishon Vijay Abraham I goto err_cleanup_host; 13190ec4ee3cSKishon Vijay Abraham I 13200ec4ee3cSKishon Vijay Abraham I ret = __sdhci_add_host(host); 13210ec4ee3cSKishon Vijay Abraham I if (ret) 13220ec4ee3cSKishon Vijay Abraham I goto err_cleanup_host; 13230ec4ee3cSKishon Vijay Abraham I 13247d326930SKishon Vijay Abraham I return 0; 13257d326930SKishon Vijay Abraham I 13260ec4ee3cSKishon Vijay Abraham I err_cleanup_host: 13270ec4ee3cSKishon Vijay Abraham I sdhci_cleanup_host(host); 13280ec4ee3cSKishon Vijay Abraham I 13297d326930SKishon Vijay Abraham I err_put_sync: 13307d326930SKishon Vijay Abraham I pm_runtime_put_sync(dev); 13317d326930SKishon Vijay Abraham I 13327d326930SKishon Vijay Abraham I err_rpm_disable: 13337d326930SKishon Vijay Abraham I pm_runtime_disable(dev); 13347d326930SKishon Vijay Abraham I 13357d326930SKishon Vijay Abraham I err_pltfm_free: 13367d326930SKishon Vijay Abraham I sdhci_pltfm_free(pdev); 13377d326930SKishon Vijay Abraham I return ret; 13387d326930SKishon Vijay Abraham I } 13397d326930SKishon Vijay Abraham I 13407d326930SKishon Vijay Abraham I static int sdhci_omap_remove(struct platform_device *pdev) 13417d326930SKishon Vijay Abraham I { 13427d326930SKishon Vijay Abraham I struct device *dev = &pdev->dev; 13437d326930SKishon Vijay Abraham I struct sdhci_host *host = platform_get_drvdata(pdev); 13447d326930SKishon Vijay Abraham I 13457d326930SKishon Vijay Abraham I sdhci_remove_host(host, true); 13467d326930SKishon Vijay Abraham I pm_runtime_put_sync(dev); 13477d326930SKishon Vijay Abraham I pm_runtime_disable(dev); 13487d326930SKishon Vijay Abraham I sdhci_pltfm_free(pdev); 13497d326930SKishon Vijay Abraham I 13507d326930SKishon Vijay Abraham I return 0; 13517d326930SKishon Vijay Abraham I } 1352ee0f3092SFaiz Abbas #ifdef CONFIG_PM_SLEEP 1353ee0f3092SFaiz Abbas static void sdhci_omap_context_save(struct sdhci_omap_host *omap_host) 1354ee0f3092SFaiz Abbas { 1355ee0f3092SFaiz Abbas omap_host->con = sdhci_omap_readl(omap_host, SDHCI_OMAP_CON); 1356ee0f3092SFaiz Abbas omap_host->hctl = sdhci_omap_readl(omap_host, SDHCI_OMAP_HCTL); 1357d806e334STony Lindgren omap_host->sysctl = sdhci_omap_readl(omap_host, SDHCI_OMAP_SYSCTL); 1358ee0f3092SFaiz Abbas omap_host->capa = sdhci_omap_readl(omap_host, SDHCI_OMAP_CAPA); 1359d806e334STony Lindgren omap_host->ie = sdhci_omap_readl(omap_host, SDHCI_OMAP_IE); 1360d806e334STony Lindgren omap_host->ise = sdhci_omap_readl(omap_host, SDHCI_OMAP_ISE); 1361ee0f3092SFaiz Abbas } 1362ee0f3092SFaiz Abbas 1363d806e334STony Lindgren /* Order matters here, HCTL must be restored in two phases */ 1364ee0f3092SFaiz Abbas static void sdhci_omap_context_restore(struct sdhci_omap_host *omap_host) 1365ee0f3092SFaiz Abbas { 1366ee0f3092SFaiz Abbas sdhci_omap_writel(omap_host, SDHCI_OMAP_HCTL, omap_host->hctl); 1367ee0f3092SFaiz Abbas sdhci_omap_writel(omap_host, SDHCI_OMAP_CAPA, omap_host->capa); 1368d806e334STony Lindgren sdhci_omap_writel(omap_host, SDHCI_OMAP_HCTL, omap_host->hctl); 1369d806e334STony Lindgren 1370d806e334STony Lindgren sdhci_omap_writel(omap_host, SDHCI_OMAP_SYSCTL, omap_host->sysctl); 1371d806e334STony Lindgren sdhci_omap_writel(omap_host, SDHCI_OMAP_CON, omap_host->con); 1372d806e334STony Lindgren sdhci_omap_writel(omap_host, SDHCI_OMAP_IE, omap_host->ie); 1373d806e334STony Lindgren sdhci_omap_writel(omap_host, SDHCI_OMAP_ISE, omap_host->ise); 1374ee0f3092SFaiz Abbas } 1375ee0f3092SFaiz Abbas 1376ee0f3092SFaiz Abbas static int __maybe_unused sdhci_omap_suspend(struct device *dev) 1377ee0f3092SFaiz Abbas { 1378ee0f3092SFaiz Abbas struct sdhci_host *host = dev_get_drvdata(dev); 1379ee0f3092SFaiz Abbas struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); 1380ee0f3092SFaiz Abbas struct sdhci_omap_host *omap_host = sdhci_pltfm_priv(pltfm_host); 1381ee0f3092SFaiz Abbas 1382ee0f3092SFaiz Abbas sdhci_suspend_host(host); 1383ee0f3092SFaiz Abbas 1384ee0f3092SFaiz Abbas sdhci_omap_context_save(omap_host); 1385ee0f3092SFaiz Abbas 1386ee0f3092SFaiz Abbas pinctrl_pm_select_idle_state(dev); 1387ee0f3092SFaiz Abbas 1388ee0f3092SFaiz Abbas pm_runtime_force_suspend(dev); 1389ee0f3092SFaiz Abbas 1390ee0f3092SFaiz Abbas return 0; 1391ee0f3092SFaiz Abbas } 1392ee0f3092SFaiz Abbas 1393ee0f3092SFaiz Abbas static int __maybe_unused sdhci_omap_resume(struct device *dev) 1394ee0f3092SFaiz Abbas { 1395ee0f3092SFaiz Abbas struct sdhci_host *host = dev_get_drvdata(dev); 1396ee0f3092SFaiz Abbas struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); 1397ee0f3092SFaiz Abbas struct sdhci_omap_host *omap_host = sdhci_pltfm_priv(pltfm_host); 1398ee0f3092SFaiz Abbas 1399ee0f3092SFaiz Abbas pm_runtime_force_resume(dev); 1400ee0f3092SFaiz Abbas 1401ee0f3092SFaiz Abbas pinctrl_pm_select_default_state(dev); 1402ee0f3092SFaiz Abbas 1403ee0f3092SFaiz Abbas sdhci_omap_context_restore(omap_host); 1404ee0f3092SFaiz Abbas 1405ee0f3092SFaiz Abbas sdhci_resume_host(host); 1406ee0f3092SFaiz Abbas 1407ee0f3092SFaiz Abbas return 0; 1408ee0f3092SFaiz Abbas } 1409ee0f3092SFaiz Abbas #endif 1410ee0f3092SFaiz Abbas static SIMPLE_DEV_PM_OPS(sdhci_omap_dev_pm_ops, sdhci_omap_suspend, 1411ee0f3092SFaiz Abbas sdhci_omap_resume); 14127d326930SKishon Vijay Abraham I 14137d326930SKishon Vijay Abraham I static struct platform_driver sdhci_omap_driver = { 14147d326930SKishon Vijay Abraham I .probe = sdhci_omap_probe, 14157d326930SKishon Vijay Abraham I .remove = sdhci_omap_remove, 14167d326930SKishon Vijay Abraham I .driver = { 14177d326930SKishon Vijay Abraham I .name = "sdhci-omap", 1418a1a48919SDouglas Anderson .probe_type = PROBE_PREFER_ASYNCHRONOUS, 1419ee0f3092SFaiz Abbas .pm = &sdhci_omap_dev_pm_ops, 14207d326930SKishon Vijay Abraham I .of_match_table = omap_sdhci_match, 14217d326930SKishon Vijay Abraham I }, 14227d326930SKishon Vijay Abraham I }; 14237d326930SKishon Vijay Abraham I 14247d326930SKishon Vijay Abraham I module_platform_driver(sdhci_omap_driver); 14257d326930SKishon Vijay Abraham I 14267d326930SKishon Vijay Abraham I MODULE_DESCRIPTION("SDHCI driver for OMAP SoCs"); 14277d326930SKishon Vijay Abraham I MODULE_AUTHOR("Texas Instruments Inc."); 14287d326930SKishon Vijay Abraham I MODULE_LICENSE("GPL v2"); 14297d326930SKishon Vijay Abraham I MODULE_ALIAS("platform:sdhci_omap"); 1430