16b1baefeSThomas Gleixner // SPDX-License-Identifier: GPL-2.0-only 27d326930SKishon Vijay Abraham I /** 37d326930SKishon Vijay Abraham I * SDHCI Controller driver for TI's OMAP SoCs 47d326930SKishon Vijay Abraham I * 57d326930SKishon Vijay Abraham I * Copyright (C) 2017 Texas Instruments 67d326930SKishon Vijay Abraham I * Author: Kishon Vijay Abraham I <kishon@ti.com> 77d326930SKishon Vijay Abraham I */ 87d326930SKishon Vijay Abraham I 97d326930SKishon Vijay Abraham I #include <linux/delay.h> 105da5e494SFaiz Abbas #include <linux/mmc/mmc.h> 117d326930SKishon Vijay Abraham I #include <linux/mmc/slot-gpio.h> 127d326930SKishon Vijay Abraham I #include <linux/module.h> 137d326930SKishon Vijay Abraham I #include <linux/of.h> 147d326930SKishon Vijay Abraham I #include <linux/of_device.h> 157d326930SKishon Vijay Abraham I #include <linux/platform_device.h> 167d326930SKishon Vijay Abraham I #include <linux/pm_runtime.h> 177d326930SKishon Vijay Abraham I #include <linux/regulator/consumer.h> 188d20b2eaSKishon Vijay Abraham I #include <linux/pinctrl/consumer.h> 19212f4f8aSKishon Vijay Abraham I #include <linux/sys_soc.h> 20961de0a8SFaiz Abbas #include <linux/thermal.h> 217d326930SKishon Vijay Abraham I 227d326930SKishon Vijay Abraham I #include "sdhci-pltfm.h" 237d326930SKishon Vijay Abraham I 2453f9460eSTony Lindgren #define SDHCI_OMAP_SYSCONFIG 0x110 2553f9460eSTony Lindgren 267d326930SKishon Vijay Abraham I #define SDHCI_OMAP_CON 0x12c 277d326930SKishon Vijay Abraham I #define CON_DW8 BIT(5) 287d326930SKishon Vijay Abraham I #define CON_DMA_MASTER BIT(20) 2927ceb7e0SKishon Vijay Abraham I #define CON_DDR BIT(19) 3020ea26a1SKishon Vijay Abraham I #define CON_CLKEXTFREE BIT(16) 3120ea26a1SKishon Vijay Abraham I #define CON_PADEN BIT(15) 32efde12b2SKishon Vijay Abraham I #define CON_CTPL BIT(11) 337d326930SKishon Vijay Abraham I #define CON_INIT BIT(1) 347d326930SKishon Vijay Abraham I #define CON_OD BIT(0) 357d326930SKishon Vijay Abraham I 369fc2cd76SKishon Vijay Abraham I #define SDHCI_OMAP_DLL 0x0134 379fc2cd76SKishon Vijay Abraham I #define DLL_SWT BIT(20) 389fc2cd76SKishon Vijay Abraham I #define DLL_FORCE_SR_C_SHIFT 13 399fc2cd76SKishon Vijay Abraham I #define DLL_FORCE_SR_C_MASK (0x7f << DLL_FORCE_SR_C_SHIFT) 409fc2cd76SKishon Vijay Abraham I #define DLL_FORCE_VALUE BIT(12) 419fc2cd76SKishon Vijay Abraham I #define DLL_CALIB BIT(1) 429fc2cd76SKishon Vijay Abraham I 437d326930SKishon Vijay Abraham I #define SDHCI_OMAP_CMD 0x20c 447d326930SKishon Vijay Abraham I 4520ea26a1SKishon Vijay Abraham I #define SDHCI_OMAP_PSTATE 0x0224 4620ea26a1SKishon Vijay Abraham I #define PSTATE_DLEV_DAT0 BIT(20) 4720ea26a1SKishon Vijay Abraham I #define PSTATE_DATI BIT(1) 4820ea26a1SKishon Vijay Abraham I 497d326930SKishon Vijay Abraham I #define SDHCI_OMAP_HCTL 0x228 507d326930SKishon Vijay Abraham I #define HCTL_SDBP BIT(8) 517d326930SKishon Vijay Abraham I #define HCTL_SDVS_SHIFT 9 527d326930SKishon Vijay Abraham I #define HCTL_SDVS_MASK (0x7 << HCTL_SDVS_SHIFT) 537d326930SKishon Vijay Abraham I #define HCTL_SDVS_33 (0x7 << HCTL_SDVS_SHIFT) 547d326930SKishon Vijay Abraham I #define HCTL_SDVS_30 (0x6 << HCTL_SDVS_SHIFT) 557d326930SKishon Vijay Abraham I #define HCTL_SDVS_18 (0x5 << HCTL_SDVS_SHIFT) 567d326930SKishon Vijay Abraham I 577d326930SKishon Vijay Abraham I #define SDHCI_OMAP_SYSCTL 0x22c 587d326930SKishon Vijay Abraham I #define SYSCTL_CEN BIT(2) 597d326930SKishon Vijay Abraham I #define SYSCTL_CLKD_SHIFT 6 607d326930SKishon Vijay Abraham I #define SYSCTL_CLKD_MASK 0x3ff 617d326930SKishon Vijay Abraham I 627d326930SKishon Vijay Abraham I #define SDHCI_OMAP_STAT 0x230 637d326930SKishon Vijay Abraham I 647d326930SKishon Vijay Abraham I #define SDHCI_OMAP_IE 0x234 657d326930SKishon Vijay Abraham I #define INT_CC_EN BIT(0) 667d326930SKishon Vijay Abraham I 67d806e334STony Lindgren #define SDHCI_OMAP_ISE 0x238 68d806e334STony Lindgren 697d326930SKishon Vijay Abraham I #define SDHCI_OMAP_AC12 0x23c 707d326930SKishon Vijay Abraham I #define AC12_V1V8_SIGEN BIT(19) 719fc2cd76SKishon Vijay Abraham I #define AC12_SCLK_SEL BIT(23) 727d326930SKishon Vijay Abraham I 737d326930SKishon Vijay Abraham I #define SDHCI_OMAP_CAPA 0x240 747d326930SKishon Vijay Abraham I #define CAPA_VS33 BIT(24) 757d326930SKishon Vijay Abraham I #define CAPA_VS30 BIT(25) 767d326930SKishon Vijay Abraham I #define CAPA_VS18 BIT(26) 777d326930SKishon Vijay Abraham I 789fc2cd76SKishon Vijay Abraham I #define SDHCI_OMAP_CAPA2 0x0244 799fc2cd76SKishon Vijay Abraham I #define CAPA2_TSDR50 BIT(13) 809fc2cd76SKishon Vijay Abraham I 817d326930SKishon Vijay Abraham I #define SDHCI_OMAP_TIMEOUT 1 /* 1 msec */ 827d326930SKishon Vijay Abraham I 837d326930SKishon Vijay Abraham I #define SYSCTL_CLKD_MAX 0x3FF 847d326930SKishon Vijay Abraham I 857d326930SKishon Vijay Abraham I #define IOV_1V8 1800000 /* 180000 uV */ 867d326930SKishon Vijay Abraham I #define IOV_3V0 3000000 /* 300000 uV */ 877d326930SKishon Vijay Abraham I #define IOV_3V3 3300000 /* 330000 uV */ 887d326930SKishon Vijay Abraham I 899fc2cd76SKishon Vijay Abraham I #define MAX_PHASE_DELAY 0x7C 909fc2cd76SKishon Vijay Abraham I 918d20b2eaSKishon Vijay Abraham I /* sdhci-omap controller flags */ 928d20b2eaSKishon Vijay Abraham I #define SDHCI_OMAP_REQUIRE_IODELAY BIT(0) 939e84a2e6SFaiz Abbas #define SDHCI_OMAP_SPECIAL_RESET BIT(1) 948d20b2eaSKishon Vijay Abraham I 957d326930SKishon Vijay Abraham I struct sdhci_omap_data { 967d326930SKishon Vijay Abraham I u32 offset; 978d20b2eaSKishon Vijay Abraham I u8 flags; 987d326930SKishon Vijay Abraham I }; 997d326930SKishon Vijay Abraham I 1007d326930SKishon Vijay Abraham I struct sdhci_omap_host { 101212f4f8aSKishon Vijay Abraham I char *version; 1027d326930SKishon Vijay Abraham I void __iomem *base; 1037d326930SKishon Vijay Abraham I struct device *dev; 1047d326930SKishon Vijay Abraham I struct regulator *pbias; 1057d326930SKishon Vijay Abraham I bool pbias_enabled; 1067d326930SKishon Vijay Abraham I struct sdhci_host *host; 1077d326930SKishon Vijay Abraham I u8 bus_mode; 1087d326930SKishon Vijay Abraham I u8 power_mode; 1098d20b2eaSKishon Vijay Abraham I u8 timing; 1108d20b2eaSKishon Vijay Abraham I u8 flags; 1118d20b2eaSKishon Vijay Abraham I 1128d20b2eaSKishon Vijay Abraham I struct pinctrl *pinctrl; 1138d20b2eaSKishon Vijay Abraham I struct pinctrl_state **pinctrl_state; 1145b0d6210SFaiz Abbas bool is_tuning; 115ee0f3092SFaiz Abbas /* Omap specific context save */ 116ee0f3092SFaiz Abbas u32 con; 117ee0f3092SFaiz Abbas u32 hctl; 118ee0f3092SFaiz Abbas u32 sysctl; 119ee0f3092SFaiz Abbas u32 capa; 120d806e334STony Lindgren u32 ie; 121d806e334STony Lindgren u32 ise; 1227d326930SKishon Vijay Abraham I }; 1237d326930SKishon Vijay Abraham I 1248d20b2eaSKishon Vijay Abraham I static void sdhci_omap_start_clock(struct sdhci_omap_host *omap_host); 1258d20b2eaSKishon Vijay Abraham I static void sdhci_omap_stop_clock(struct sdhci_omap_host *omap_host); 1268d20b2eaSKishon Vijay Abraham I 1277d326930SKishon Vijay Abraham I static inline u32 sdhci_omap_readl(struct sdhci_omap_host *host, 1287d326930SKishon Vijay Abraham I unsigned int offset) 1297d326930SKishon Vijay Abraham I { 1307d326930SKishon Vijay Abraham I return readl(host->base + offset); 1317d326930SKishon Vijay Abraham I } 1327d326930SKishon Vijay Abraham I 1337d326930SKishon Vijay Abraham I static inline void sdhci_omap_writel(struct sdhci_omap_host *host, 1347d326930SKishon Vijay Abraham I unsigned int offset, u32 data) 1357d326930SKishon Vijay Abraham I { 1367d326930SKishon Vijay Abraham I writel(data, host->base + offset); 1377d326930SKishon Vijay Abraham I } 1387d326930SKishon Vijay Abraham I 1397d326930SKishon Vijay Abraham I static int sdhci_omap_set_pbias(struct sdhci_omap_host *omap_host, 1407d326930SKishon Vijay Abraham I bool power_on, unsigned int iov) 1417d326930SKishon Vijay Abraham I { 1427d326930SKishon Vijay Abraham I int ret; 1437d326930SKishon Vijay Abraham I struct device *dev = omap_host->dev; 1447d326930SKishon Vijay Abraham I 1457d326930SKishon Vijay Abraham I if (IS_ERR(omap_host->pbias)) 1467d326930SKishon Vijay Abraham I return 0; 1477d326930SKishon Vijay Abraham I 1487d326930SKishon Vijay Abraham I if (power_on) { 1497d326930SKishon Vijay Abraham I ret = regulator_set_voltage(omap_host->pbias, iov, iov); 1507d326930SKishon Vijay Abraham I if (ret) { 1517d326930SKishon Vijay Abraham I dev_err(dev, "pbias set voltage failed\n"); 1527d326930SKishon Vijay Abraham I return ret; 1537d326930SKishon Vijay Abraham I } 1547d326930SKishon Vijay Abraham I 1557d326930SKishon Vijay Abraham I if (omap_host->pbias_enabled) 1567d326930SKishon Vijay Abraham I return 0; 1577d326930SKishon Vijay Abraham I 1587d326930SKishon Vijay Abraham I ret = regulator_enable(omap_host->pbias); 1597d326930SKishon Vijay Abraham I if (ret) { 1607d326930SKishon Vijay Abraham I dev_err(dev, "pbias reg enable fail\n"); 1617d326930SKishon Vijay Abraham I return ret; 1627d326930SKishon Vijay Abraham I } 1637d326930SKishon Vijay Abraham I 1647d326930SKishon Vijay Abraham I omap_host->pbias_enabled = true; 1657d326930SKishon Vijay Abraham I } else { 1667d326930SKishon Vijay Abraham I if (!omap_host->pbias_enabled) 1677d326930SKishon Vijay Abraham I return 0; 1687d326930SKishon Vijay Abraham I 1697d326930SKishon Vijay Abraham I ret = regulator_disable(omap_host->pbias); 1707d326930SKishon Vijay Abraham I if (ret) { 1717d326930SKishon Vijay Abraham I dev_err(dev, "pbias reg disable fail\n"); 1727d326930SKishon Vijay Abraham I return ret; 1737d326930SKishon Vijay Abraham I } 1747d326930SKishon Vijay Abraham I omap_host->pbias_enabled = false; 1757d326930SKishon Vijay Abraham I } 1767d326930SKishon Vijay Abraham I 1777d326930SKishon Vijay Abraham I return 0; 1787d326930SKishon Vijay Abraham I } 1797d326930SKishon Vijay Abraham I 1807d326930SKishon Vijay Abraham I static int sdhci_omap_enable_iov(struct sdhci_omap_host *omap_host, 1817d326930SKishon Vijay Abraham I unsigned int iov) 1827d326930SKishon Vijay Abraham I { 1837d326930SKishon Vijay Abraham I int ret; 1847d326930SKishon Vijay Abraham I struct sdhci_host *host = omap_host->host; 1857d326930SKishon Vijay Abraham I struct mmc_host *mmc = host->mmc; 1867d326930SKishon Vijay Abraham I 1877d326930SKishon Vijay Abraham I ret = sdhci_omap_set_pbias(omap_host, false, 0); 1887d326930SKishon Vijay Abraham I if (ret) 1897d326930SKishon Vijay Abraham I return ret; 1907d326930SKishon Vijay Abraham I 1917d326930SKishon Vijay Abraham I if (!IS_ERR(mmc->supply.vqmmc)) { 1927d326930SKishon Vijay Abraham I ret = regulator_set_voltage(mmc->supply.vqmmc, iov, iov); 1937d326930SKishon Vijay Abraham I if (ret) { 1947d326930SKishon Vijay Abraham I dev_err(mmc_dev(mmc), "vqmmc set voltage failed\n"); 1957d326930SKishon Vijay Abraham I return ret; 1967d326930SKishon Vijay Abraham I } 1977d326930SKishon Vijay Abraham I } 1987d326930SKishon Vijay Abraham I 1997d326930SKishon Vijay Abraham I ret = sdhci_omap_set_pbias(omap_host, true, iov); 2007d326930SKishon Vijay Abraham I if (ret) 2017d326930SKishon Vijay Abraham I return ret; 2027d326930SKishon Vijay Abraham I 2037d326930SKishon Vijay Abraham I return 0; 2047d326930SKishon Vijay Abraham I } 2057d326930SKishon Vijay Abraham I 2067d326930SKishon Vijay Abraham I static void sdhci_omap_conf_bus_power(struct sdhci_omap_host *omap_host, 2077d326930SKishon Vijay Abraham I unsigned char signal_voltage) 2087d326930SKishon Vijay Abraham I { 2097d326930SKishon Vijay Abraham I u32 reg; 2107d326930SKishon Vijay Abraham I ktime_t timeout; 2117d326930SKishon Vijay Abraham I 2127d326930SKishon Vijay Abraham I reg = sdhci_omap_readl(omap_host, SDHCI_OMAP_HCTL); 2137d326930SKishon Vijay Abraham I reg &= ~HCTL_SDVS_MASK; 2147d326930SKishon Vijay Abraham I 2157d326930SKishon Vijay Abraham I if (signal_voltage == MMC_SIGNAL_VOLTAGE_330) 2167d326930SKishon Vijay Abraham I reg |= HCTL_SDVS_33; 2177d326930SKishon Vijay Abraham I else 2187d326930SKishon Vijay Abraham I reg |= HCTL_SDVS_18; 2197d326930SKishon Vijay Abraham I 2207d326930SKishon Vijay Abraham I sdhci_omap_writel(omap_host, SDHCI_OMAP_HCTL, reg); 2217d326930SKishon Vijay Abraham I 2227d326930SKishon Vijay Abraham I reg |= HCTL_SDBP; 2237d326930SKishon Vijay Abraham I sdhci_omap_writel(omap_host, SDHCI_OMAP_HCTL, reg); 2247d326930SKishon Vijay Abraham I 2257d326930SKishon Vijay Abraham I /* wait 1ms */ 2267d326930SKishon Vijay Abraham I timeout = ktime_add_ms(ktime_get(), SDHCI_OMAP_TIMEOUT); 2279f0ea0bdSAdrian Hunter while (1) { 2289f0ea0bdSAdrian Hunter bool timedout = ktime_after(ktime_get(), timeout); 2299f0ea0bdSAdrian Hunter 2309f0ea0bdSAdrian Hunter if (sdhci_omap_readl(omap_host, SDHCI_OMAP_HCTL) & HCTL_SDBP) 2319f0ea0bdSAdrian Hunter break; 2329f0ea0bdSAdrian Hunter if (WARN_ON(timedout)) 2337d326930SKishon Vijay Abraham I return; 2347d326930SKishon Vijay Abraham I usleep_range(5, 10); 2357d326930SKishon Vijay Abraham I } 2367d326930SKishon Vijay Abraham I } 2377d326930SKishon Vijay Abraham I 238efde12b2SKishon Vijay Abraham I static void sdhci_omap_enable_sdio_irq(struct mmc_host *mmc, int enable) 239efde12b2SKishon Vijay Abraham I { 240efde12b2SKishon Vijay Abraham I struct sdhci_host *host = mmc_priv(mmc); 241efde12b2SKishon Vijay Abraham I struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); 242efde12b2SKishon Vijay Abraham I struct sdhci_omap_host *omap_host = sdhci_pltfm_priv(pltfm_host); 243efde12b2SKishon Vijay Abraham I u32 reg; 244efde12b2SKishon Vijay Abraham I 245efde12b2SKishon Vijay Abraham I reg = sdhci_omap_readl(omap_host, SDHCI_OMAP_CON); 246efde12b2SKishon Vijay Abraham I if (enable) 247efde12b2SKishon Vijay Abraham I reg |= (CON_CTPL | CON_CLKEXTFREE); 248efde12b2SKishon Vijay Abraham I else 249efde12b2SKishon Vijay Abraham I reg &= ~(CON_CTPL | CON_CLKEXTFREE); 250efde12b2SKishon Vijay Abraham I sdhci_omap_writel(omap_host, SDHCI_OMAP_CON, reg); 251efde12b2SKishon Vijay Abraham I 252efde12b2SKishon Vijay Abraham I sdhci_enable_sdio_irq(mmc, enable); 253efde12b2SKishon Vijay Abraham I } 254efde12b2SKishon Vijay Abraham I 2559fc2cd76SKishon Vijay Abraham I static inline void sdhci_omap_set_dll(struct sdhci_omap_host *omap_host, 2569fc2cd76SKishon Vijay Abraham I int count) 2579fc2cd76SKishon Vijay Abraham I { 2589fc2cd76SKishon Vijay Abraham I int i; 2599fc2cd76SKishon Vijay Abraham I u32 reg; 2609fc2cd76SKishon Vijay Abraham I 2619fc2cd76SKishon Vijay Abraham I reg = sdhci_omap_readl(omap_host, SDHCI_OMAP_DLL); 2629fc2cd76SKishon Vijay Abraham I reg |= DLL_FORCE_VALUE; 2639fc2cd76SKishon Vijay Abraham I reg &= ~DLL_FORCE_SR_C_MASK; 2649fc2cd76SKishon Vijay Abraham I reg |= (count << DLL_FORCE_SR_C_SHIFT); 2659fc2cd76SKishon Vijay Abraham I sdhci_omap_writel(omap_host, SDHCI_OMAP_DLL, reg); 2669fc2cd76SKishon Vijay Abraham I 2679fc2cd76SKishon Vijay Abraham I reg |= DLL_CALIB; 2689fc2cd76SKishon Vijay Abraham I sdhci_omap_writel(omap_host, SDHCI_OMAP_DLL, reg); 2699fc2cd76SKishon Vijay Abraham I for (i = 0; i < 1000; i++) { 2709fc2cd76SKishon Vijay Abraham I reg = sdhci_omap_readl(omap_host, SDHCI_OMAP_DLL); 2719fc2cd76SKishon Vijay Abraham I if (reg & DLL_CALIB) 2729fc2cd76SKishon Vijay Abraham I break; 2739fc2cd76SKishon Vijay Abraham I } 2749fc2cd76SKishon Vijay Abraham I reg &= ~DLL_CALIB; 2759fc2cd76SKishon Vijay Abraham I sdhci_omap_writel(omap_host, SDHCI_OMAP_DLL, reg); 2769fc2cd76SKishon Vijay Abraham I } 2779fc2cd76SKishon Vijay Abraham I 2789fc2cd76SKishon Vijay Abraham I static void sdhci_omap_disable_tuning(struct sdhci_omap_host *omap_host) 2799fc2cd76SKishon Vijay Abraham I { 2809fc2cd76SKishon Vijay Abraham I u32 reg; 2819fc2cd76SKishon Vijay Abraham I 2829fc2cd76SKishon Vijay Abraham I reg = sdhci_omap_readl(omap_host, SDHCI_OMAP_AC12); 2839fc2cd76SKishon Vijay Abraham I reg &= ~AC12_SCLK_SEL; 2849fc2cd76SKishon Vijay Abraham I sdhci_omap_writel(omap_host, SDHCI_OMAP_AC12, reg); 2859fc2cd76SKishon Vijay Abraham I 2869fc2cd76SKishon Vijay Abraham I reg = sdhci_omap_readl(omap_host, SDHCI_OMAP_DLL); 2879fc2cd76SKishon Vijay Abraham I reg &= ~(DLL_FORCE_VALUE | DLL_SWT); 2889fc2cd76SKishon Vijay Abraham I sdhci_omap_writel(omap_host, SDHCI_OMAP_DLL, reg); 2899fc2cd76SKishon Vijay Abraham I } 2909fc2cd76SKishon Vijay Abraham I 2919fc2cd76SKishon Vijay Abraham I static int sdhci_omap_execute_tuning(struct mmc_host *mmc, u32 opcode) 2929fc2cd76SKishon Vijay Abraham I { 2939fc2cd76SKishon Vijay Abraham I struct sdhci_host *host = mmc_priv(mmc); 2949fc2cd76SKishon Vijay Abraham I struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); 2959fc2cd76SKishon Vijay Abraham I struct sdhci_omap_host *omap_host = sdhci_pltfm_priv(pltfm_host); 296961de0a8SFaiz Abbas struct thermal_zone_device *thermal_dev; 2979fc2cd76SKishon Vijay Abraham I struct device *dev = omap_host->dev; 2989fc2cd76SKishon Vijay Abraham I struct mmc_ios *ios = &mmc->ios; 2999fc2cd76SKishon Vijay Abraham I u32 start_window = 0, max_window = 0; 300961de0a8SFaiz Abbas bool single_point_failure = false; 301db2039fcSFaiz Abbas bool dcrc_was_enabled = false; 3029fc2cd76SKishon Vijay Abraham I u8 cur_match, prev_match = 0; 3039fc2cd76SKishon Vijay Abraham I u32 length = 0, max_len = 0; 3049fc2cd76SKishon Vijay Abraham I u32 phase_delay = 0; 305961de0a8SFaiz Abbas int temperature; 3069fc2cd76SKishon Vijay Abraham I int ret = 0; 3079fc2cd76SKishon Vijay Abraham I u32 reg; 308961de0a8SFaiz Abbas int i; 3099fc2cd76SKishon Vijay Abraham I 3109fc2cd76SKishon Vijay Abraham I /* clock tuning is not needed for upto 52MHz */ 3119fc2cd76SKishon Vijay Abraham I if (ios->clock <= 52000000) 3129fc2cd76SKishon Vijay Abraham I return 0; 3139fc2cd76SKishon Vijay Abraham I 3149fc2cd76SKishon Vijay Abraham I reg = sdhci_omap_readl(omap_host, SDHCI_OMAP_CAPA2); 3159fc2cd76SKishon Vijay Abraham I if (ios->timing == MMC_TIMING_UHS_SDR50 && !(reg & CAPA2_TSDR50)) 3169fc2cd76SKishon Vijay Abraham I return 0; 3179fc2cd76SKishon Vijay Abraham I 318961de0a8SFaiz Abbas thermal_dev = thermal_zone_get_zone_by_name("cpu_thermal"); 319961de0a8SFaiz Abbas if (IS_ERR(thermal_dev)) { 320961de0a8SFaiz Abbas dev_err(dev, "Unable to get thermal zone for tuning\n"); 321961de0a8SFaiz Abbas return PTR_ERR(thermal_dev); 322961de0a8SFaiz Abbas } 323961de0a8SFaiz Abbas 324961de0a8SFaiz Abbas ret = thermal_zone_get_temp(thermal_dev, &temperature); 325961de0a8SFaiz Abbas if (ret) 326961de0a8SFaiz Abbas return ret; 327961de0a8SFaiz Abbas 3289fc2cd76SKishon Vijay Abraham I reg = sdhci_omap_readl(omap_host, SDHCI_OMAP_DLL); 3299fc2cd76SKishon Vijay Abraham I reg |= DLL_SWT; 3309fc2cd76SKishon Vijay Abraham I sdhci_omap_writel(omap_host, SDHCI_OMAP_DLL, reg); 3319fc2cd76SKishon Vijay Abraham I 3327d33c358SKishon Vijay Abraham I /* 3337d33c358SKishon Vijay Abraham I * OMAP5/DRA74X/DRA72x Errata i802: 3347d33c358SKishon Vijay Abraham I * DCRC error interrupts (MMCHS_STAT[21] DCRC=0x1) can occur 3357d33c358SKishon Vijay Abraham I * during the tuning procedure. So disable it during the 3367d33c358SKishon Vijay Abraham I * tuning procedure. 3377d33c358SKishon Vijay Abraham I */ 338db2039fcSFaiz Abbas if (host->ier & SDHCI_INT_DATA_CRC) { 339db2039fcSFaiz Abbas host->ier &= ~SDHCI_INT_DATA_CRC; 340db2039fcSFaiz Abbas dcrc_was_enabled = true; 341db2039fcSFaiz Abbas } 3427d33c358SKishon Vijay Abraham I 3435b0d6210SFaiz Abbas omap_host->is_tuning = true; 3445b0d6210SFaiz Abbas 345961de0a8SFaiz Abbas /* 346961de0a8SFaiz Abbas * Stage 1: Search for a maximum pass window ignoring any 347961de0a8SFaiz Abbas * any single point failures. If the tuning value ends up 348961de0a8SFaiz Abbas * near it, move away from it in stage 2 below 349961de0a8SFaiz Abbas */ 3509fc2cd76SKishon Vijay Abraham I while (phase_delay <= MAX_PHASE_DELAY) { 3519fc2cd76SKishon Vijay Abraham I sdhci_omap_set_dll(omap_host, phase_delay); 3529fc2cd76SKishon Vijay Abraham I 3539fc2cd76SKishon Vijay Abraham I cur_match = !mmc_send_tuning(mmc, opcode, NULL); 3549fc2cd76SKishon Vijay Abraham I if (cur_match) { 3559fc2cd76SKishon Vijay Abraham I if (prev_match) { 3569fc2cd76SKishon Vijay Abraham I length++; 357961de0a8SFaiz Abbas } else if (single_point_failure) { 358961de0a8SFaiz Abbas /* ignore single point failure */ 359961de0a8SFaiz Abbas length++; 3609fc2cd76SKishon Vijay Abraham I } else { 3619fc2cd76SKishon Vijay Abraham I start_window = phase_delay; 3629fc2cd76SKishon Vijay Abraham I length = 1; 3639fc2cd76SKishon Vijay Abraham I } 364961de0a8SFaiz Abbas } else { 365961de0a8SFaiz Abbas single_point_failure = prev_match; 3669fc2cd76SKishon Vijay Abraham I } 3679fc2cd76SKishon Vijay Abraham I 3689fc2cd76SKishon Vijay Abraham I if (length > max_len) { 3699fc2cd76SKishon Vijay Abraham I max_window = start_window; 3709fc2cd76SKishon Vijay Abraham I max_len = length; 3719fc2cd76SKishon Vijay Abraham I } 3729fc2cd76SKishon Vijay Abraham I 3739fc2cd76SKishon Vijay Abraham I prev_match = cur_match; 3749fc2cd76SKishon Vijay Abraham I phase_delay += 4; 3759fc2cd76SKishon Vijay Abraham I } 3769fc2cd76SKishon Vijay Abraham I 3779fc2cd76SKishon Vijay Abraham I if (!max_len) { 3789fc2cd76SKishon Vijay Abraham I dev_err(dev, "Unable to find match\n"); 3799fc2cd76SKishon Vijay Abraham I ret = -EIO; 3809fc2cd76SKishon Vijay Abraham I goto tuning_error; 3819fc2cd76SKishon Vijay Abraham I } 3829fc2cd76SKishon Vijay Abraham I 383961de0a8SFaiz Abbas /* 384961de0a8SFaiz Abbas * Assign tuning value as a ratio of maximum pass window based 385961de0a8SFaiz Abbas * on temperature 386961de0a8SFaiz Abbas */ 387961de0a8SFaiz Abbas if (temperature < -20000) 388feb40824SFaiz Abbas phase_delay = min(max_window + 4 * (max_len - 1) - 24, 389961de0a8SFaiz Abbas max_window + 390961de0a8SFaiz Abbas DIV_ROUND_UP(13 * max_len, 16) * 4); 391961de0a8SFaiz Abbas else if (temperature < 20000) 392961de0a8SFaiz Abbas phase_delay = max_window + DIV_ROUND_UP(9 * max_len, 16) * 4; 393961de0a8SFaiz Abbas else if (temperature < 40000) 394961de0a8SFaiz Abbas phase_delay = max_window + DIV_ROUND_UP(8 * max_len, 16) * 4; 395961de0a8SFaiz Abbas else if (temperature < 70000) 396961de0a8SFaiz Abbas phase_delay = max_window + DIV_ROUND_UP(7 * max_len, 16) * 4; 397961de0a8SFaiz Abbas else if (temperature < 90000) 398961de0a8SFaiz Abbas phase_delay = max_window + DIV_ROUND_UP(5 * max_len, 16) * 4; 399961de0a8SFaiz Abbas else if (temperature < 120000) 400961de0a8SFaiz Abbas phase_delay = max_window + DIV_ROUND_UP(4 * max_len, 16) * 4; 401961de0a8SFaiz Abbas else 402961de0a8SFaiz Abbas phase_delay = max_window + DIV_ROUND_UP(3 * max_len, 16) * 4; 403961de0a8SFaiz Abbas 404961de0a8SFaiz Abbas /* 405961de0a8SFaiz Abbas * Stage 2: Search for a single point failure near the chosen tuning 406961de0a8SFaiz Abbas * value in two steps. First in the +3 to +10 range and then in the 407961de0a8SFaiz Abbas * +2 to -10 range. If found, move away from it in the appropriate 408961de0a8SFaiz Abbas * direction by the appropriate amount depending on the temperature. 409961de0a8SFaiz Abbas */ 410961de0a8SFaiz Abbas for (i = 3; i <= 10; i++) { 411961de0a8SFaiz Abbas sdhci_omap_set_dll(omap_host, phase_delay + i); 412961de0a8SFaiz Abbas 413961de0a8SFaiz Abbas if (mmc_send_tuning(mmc, opcode, NULL)) { 414961de0a8SFaiz Abbas if (temperature < 10000) 415961de0a8SFaiz Abbas phase_delay += i + 6; 416961de0a8SFaiz Abbas else if (temperature < 20000) 417961de0a8SFaiz Abbas phase_delay += i - 12; 418961de0a8SFaiz Abbas else if (temperature < 70000) 419961de0a8SFaiz Abbas phase_delay += i - 8; 420961de0a8SFaiz Abbas else 421961de0a8SFaiz Abbas phase_delay += i - 6; 422961de0a8SFaiz Abbas 423961de0a8SFaiz Abbas goto single_failure_found; 424961de0a8SFaiz Abbas } 425961de0a8SFaiz Abbas } 426961de0a8SFaiz Abbas 427961de0a8SFaiz Abbas for (i = 2; i >= -10; i--) { 428961de0a8SFaiz Abbas sdhci_omap_set_dll(omap_host, phase_delay + i); 429961de0a8SFaiz Abbas 430961de0a8SFaiz Abbas if (mmc_send_tuning(mmc, opcode, NULL)) { 431961de0a8SFaiz Abbas if (temperature < 10000) 432961de0a8SFaiz Abbas phase_delay += i + 12; 433961de0a8SFaiz Abbas else if (temperature < 20000) 434961de0a8SFaiz Abbas phase_delay += i + 8; 435961de0a8SFaiz Abbas else if (temperature < 70000) 436961de0a8SFaiz Abbas phase_delay += i + 8; 437961de0a8SFaiz Abbas else if (temperature < 90000) 438961de0a8SFaiz Abbas phase_delay += i + 10; 439961de0a8SFaiz Abbas else 440961de0a8SFaiz Abbas phase_delay += i + 12; 441961de0a8SFaiz Abbas 442961de0a8SFaiz Abbas goto single_failure_found; 443961de0a8SFaiz Abbas } 444961de0a8SFaiz Abbas } 445961de0a8SFaiz Abbas 446961de0a8SFaiz Abbas single_failure_found: 4479fc2cd76SKishon Vijay Abraham I reg = sdhci_omap_readl(omap_host, SDHCI_OMAP_AC12); 4489fc2cd76SKishon Vijay Abraham I if (!(reg & AC12_SCLK_SEL)) { 4499fc2cd76SKishon Vijay Abraham I ret = -EIO; 4509fc2cd76SKishon Vijay Abraham I goto tuning_error; 4519fc2cd76SKishon Vijay Abraham I } 4529fc2cd76SKishon Vijay Abraham I 4539fc2cd76SKishon Vijay Abraham I sdhci_omap_set_dll(omap_host, phase_delay); 4549fc2cd76SKishon Vijay Abraham I 4555b0d6210SFaiz Abbas omap_host->is_tuning = false; 4565b0d6210SFaiz Abbas 4579fc2cd76SKishon Vijay Abraham I goto ret; 4589fc2cd76SKishon Vijay Abraham I 4599fc2cd76SKishon Vijay Abraham I tuning_error: 4605b0d6210SFaiz Abbas omap_host->is_tuning = false; 4619fc2cd76SKishon Vijay Abraham I dev_err(dev, "Tuning failed\n"); 4629fc2cd76SKishon Vijay Abraham I sdhci_omap_disable_tuning(omap_host); 4639fc2cd76SKishon Vijay Abraham I 4649fc2cd76SKishon Vijay Abraham I ret: 4659fc2cd76SKishon Vijay Abraham I sdhci_reset(host, SDHCI_RESET_CMD | SDHCI_RESET_DATA); 466db2039fcSFaiz Abbas /* Reenable forbidden interrupt */ 467db2039fcSFaiz Abbas if (dcrc_was_enabled) 468db2039fcSFaiz Abbas host->ier |= SDHCI_INT_DATA_CRC; 4697d33c358SKishon Vijay Abraham I sdhci_writel(host, host->ier, SDHCI_INT_ENABLE); 4707d33c358SKishon Vijay Abraham I sdhci_writel(host, host->ier, SDHCI_SIGNAL_ENABLE); 4719fc2cd76SKishon Vijay Abraham I return ret; 4729fc2cd76SKishon Vijay Abraham I } 4739fc2cd76SKishon Vijay Abraham I 47420ea26a1SKishon Vijay Abraham I static int sdhci_omap_card_busy(struct mmc_host *mmc) 47520ea26a1SKishon Vijay Abraham I { 47620ea26a1SKishon Vijay Abraham I u32 reg, ac12; 47720ea26a1SKishon Vijay Abraham I int ret = false; 47820ea26a1SKishon Vijay Abraham I struct sdhci_host *host = mmc_priv(mmc); 47920ea26a1SKishon Vijay Abraham I struct sdhci_pltfm_host *pltfm_host; 48020ea26a1SKishon Vijay Abraham I struct sdhci_omap_host *omap_host; 48120ea26a1SKishon Vijay Abraham I u32 ier = host->ier; 48220ea26a1SKishon Vijay Abraham I 48320ea26a1SKishon Vijay Abraham I pltfm_host = sdhci_priv(host); 48420ea26a1SKishon Vijay Abraham I omap_host = sdhci_pltfm_priv(pltfm_host); 48520ea26a1SKishon Vijay Abraham I 48620ea26a1SKishon Vijay Abraham I reg = sdhci_omap_readl(omap_host, SDHCI_OMAP_CON); 48720ea26a1SKishon Vijay Abraham I ac12 = sdhci_omap_readl(omap_host, SDHCI_OMAP_AC12); 48820ea26a1SKishon Vijay Abraham I reg &= ~CON_CLKEXTFREE; 48920ea26a1SKishon Vijay Abraham I if (ac12 & AC12_V1V8_SIGEN) 49020ea26a1SKishon Vijay Abraham I reg |= CON_CLKEXTFREE; 49120ea26a1SKishon Vijay Abraham I reg |= CON_PADEN; 49220ea26a1SKishon Vijay Abraham I sdhci_omap_writel(omap_host, SDHCI_OMAP_CON, reg); 49320ea26a1SKishon Vijay Abraham I 49420ea26a1SKishon Vijay Abraham I disable_irq(host->irq); 49520ea26a1SKishon Vijay Abraham I ier |= SDHCI_INT_CARD_INT; 49620ea26a1SKishon Vijay Abraham I sdhci_writel(host, ier, SDHCI_INT_ENABLE); 49720ea26a1SKishon Vijay Abraham I sdhci_writel(host, ier, SDHCI_SIGNAL_ENABLE); 49820ea26a1SKishon Vijay Abraham I 49920ea26a1SKishon Vijay Abraham I /* 50020ea26a1SKishon Vijay Abraham I * Delay is required for PSTATE to correctly reflect 50120ea26a1SKishon Vijay Abraham I * DLEV/CLEV values after PADEN is set. 50220ea26a1SKishon Vijay Abraham I */ 50320ea26a1SKishon Vijay Abraham I usleep_range(50, 100); 50420ea26a1SKishon Vijay Abraham I reg = sdhci_omap_readl(omap_host, SDHCI_OMAP_PSTATE); 50520ea26a1SKishon Vijay Abraham I if ((reg & PSTATE_DATI) || !(reg & PSTATE_DLEV_DAT0)) 50620ea26a1SKishon Vijay Abraham I ret = true; 50720ea26a1SKishon Vijay Abraham I 50820ea26a1SKishon Vijay Abraham I reg = sdhci_omap_readl(omap_host, SDHCI_OMAP_CON); 50920ea26a1SKishon Vijay Abraham I reg &= ~(CON_CLKEXTFREE | CON_PADEN); 51020ea26a1SKishon Vijay Abraham I sdhci_omap_writel(omap_host, SDHCI_OMAP_CON, reg); 51120ea26a1SKishon Vijay Abraham I 51220ea26a1SKishon Vijay Abraham I sdhci_writel(host, host->ier, SDHCI_INT_ENABLE); 51320ea26a1SKishon Vijay Abraham I sdhci_writel(host, host->ier, SDHCI_SIGNAL_ENABLE); 51420ea26a1SKishon Vijay Abraham I enable_irq(host->irq); 51520ea26a1SKishon Vijay Abraham I 51620ea26a1SKishon Vijay Abraham I return ret; 51720ea26a1SKishon Vijay Abraham I } 51820ea26a1SKishon Vijay Abraham I 5197d326930SKishon Vijay Abraham I static int sdhci_omap_start_signal_voltage_switch(struct mmc_host *mmc, 5207d326930SKishon Vijay Abraham I struct mmc_ios *ios) 5217d326930SKishon Vijay Abraham I { 5227d326930SKishon Vijay Abraham I u32 reg; 5237d326930SKishon Vijay Abraham I int ret; 5247d326930SKishon Vijay Abraham I unsigned int iov; 5257d326930SKishon Vijay Abraham I struct sdhci_host *host = mmc_priv(mmc); 5267d326930SKishon Vijay Abraham I struct sdhci_pltfm_host *pltfm_host; 5277d326930SKishon Vijay Abraham I struct sdhci_omap_host *omap_host; 5287d326930SKishon Vijay Abraham I struct device *dev; 5297d326930SKishon Vijay Abraham I 5307d326930SKishon Vijay Abraham I pltfm_host = sdhci_priv(host); 5317d326930SKishon Vijay Abraham I omap_host = sdhci_pltfm_priv(pltfm_host); 5327d326930SKishon Vijay Abraham I dev = omap_host->dev; 5337d326930SKishon Vijay Abraham I 5347d326930SKishon Vijay Abraham I if (ios->signal_voltage == MMC_SIGNAL_VOLTAGE_330) { 5357d326930SKishon Vijay Abraham I reg = sdhci_omap_readl(omap_host, SDHCI_OMAP_CAPA); 5367d326930SKishon Vijay Abraham I if (!(reg & CAPA_VS33)) 5377d326930SKishon Vijay Abraham I return -EOPNOTSUPP; 5387d326930SKishon Vijay Abraham I 5397d326930SKishon Vijay Abraham I sdhci_omap_conf_bus_power(omap_host, ios->signal_voltage); 5407d326930SKishon Vijay Abraham I 5417d326930SKishon Vijay Abraham I reg = sdhci_omap_readl(omap_host, SDHCI_OMAP_AC12); 5427d326930SKishon Vijay Abraham I reg &= ~AC12_V1V8_SIGEN; 5437d326930SKishon Vijay Abraham I sdhci_omap_writel(omap_host, SDHCI_OMAP_AC12, reg); 5447d326930SKishon Vijay Abraham I 5457d326930SKishon Vijay Abraham I iov = IOV_3V3; 5467d326930SKishon Vijay Abraham I } else if (ios->signal_voltage == MMC_SIGNAL_VOLTAGE_180) { 5477d326930SKishon Vijay Abraham I reg = sdhci_omap_readl(omap_host, SDHCI_OMAP_CAPA); 5487d326930SKishon Vijay Abraham I if (!(reg & CAPA_VS18)) 5497d326930SKishon Vijay Abraham I return -EOPNOTSUPP; 5507d326930SKishon Vijay Abraham I 5517d326930SKishon Vijay Abraham I sdhci_omap_conf_bus_power(omap_host, ios->signal_voltage); 5527d326930SKishon Vijay Abraham I 5537d326930SKishon Vijay Abraham I reg = sdhci_omap_readl(omap_host, SDHCI_OMAP_AC12); 5547d326930SKishon Vijay Abraham I reg |= AC12_V1V8_SIGEN; 5557d326930SKishon Vijay Abraham I sdhci_omap_writel(omap_host, SDHCI_OMAP_AC12, reg); 5567d326930SKishon Vijay Abraham I 5577d326930SKishon Vijay Abraham I iov = IOV_1V8; 5587d326930SKishon Vijay Abraham I } else { 5597d326930SKishon Vijay Abraham I return -EOPNOTSUPP; 5607d326930SKishon Vijay Abraham I } 5617d326930SKishon Vijay Abraham I 5627d326930SKishon Vijay Abraham I ret = sdhci_omap_enable_iov(omap_host, iov); 5637d326930SKishon Vijay Abraham I if (ret) { 5647d326930SKishon Vijay Abraham I dev_err(dev, "failed to switch IO voltage to %dmV\n", iov); 5657d326930SKishon Vijay Abraham I return ret; 5667d326930SKishon Vijay Abraham I } 5677d326930SKishon Vijay Abraham I 5687d326930SKishon Vijay Abraham I dev_dbg(dev, "IO voltage switched to %dmV\n", iov); 5697d326930SKishon Vijay Abraham I return 0; 5707d326930SKishon Vijay Abraham I } 5717d326930SKishon Vijay Abraham I 5728d20b2eaSKishon Vijay Abraham I static void sdhci_omap_set_timing(struct sdhci_omap_host *omap_host, u8 timing) 5738d20b2eaSKishon Vijay Abraham I { 5748d20b2eaSKishon Vijay Abraham I int ret; 5758d20b2eaSKishon Vijay Abraham I struct pinctrl_state *pinctrl_state; 5768d20b2eaSKishon Vijay Abraham I struct device *dev = omap_host->dev; 5778d20b2eaSKishon Vijay Abraham I 5788d20b2eaSKishon Vijay Abraham I if (!(omap_host->flags & SDHCI_OMAP_REQUIRE_IODELAY)) 5798d20b2eaSKishon Vijay Abraham I return; 5808d20b2eaSKishon Vijay Abraham I 5818d20b2eaSKishon Vijay Abraham I if (omap_host->timing == timing) 5828d20b2eaSKishon Vijay Abraham I return; 5838d20b2eaSKishon Vijay Abraham I 5848d20b2eaSKishon Vijay Abraham I sdhci_omap_stop_clock(omap_host); 5858d20b2eaSKishon Vijay Abraham I 5868d20b2eaSKishon Vijay Abraham I pinctrl_state = omap_host->pinctrl_state[timing]; 5878d20b2eaSKishon Vijay Abraham I ret = pinctrl_select_state(omap_host->pinctrl, pinctrl_state); 5888d20b2eaSKishon Vijay Abraham I if (ret) { 5898d20b2eaSKishon Vijay Abraham I dev_err(dev, "failed to select pinctrl state\n"); 5908d20b2eaSKishon Vijay Abraham I return; 5918d20b2eaSKishon Vijay Abraham I } 5928d20b2eaSKishon Vijay Abraham I 5938d20b2eaSKishon Vijay Abraham I sdhci_omap_start_clock(omap_host); 5948d20b2eaSKishon Vijay Abraham I omap_host->timing = timing; 5958d20b2eaSKishon Vijay Abraham I } 5968d20b2eaSKishon Vijay Abraham I 597300df508SKishon Vijay Abraham I static void sdhci_omap_set_power_mode(struct sdhci_omap_host *omap_host, 598300df508SKishon Vijay Abraham I u8 power_mode) 599300df508SKishon Vijay Abraham I { 6009fc2cd76SKishon Vijay Abraham I if (omap_host->bus_mode == MMC_POWER_OFF) 6019fc2cd76SKishon Vijay Abraham I sdhci_omap_disable_tuning(omap_host); 602300df508SKishon Vijay Abraham I omap_host->power_mode = power_mode; 603300df508SKishon Vijay Abraham I } 604300df508SKishon Vijay Abraham I 6057d326930SKishon Vijay Abraham I static void sdhci_omap_set_bus_mode(struct sdhci_omap_host *omap_host, 6067d326930SKishon Vijay Abraham I unsigned int mode) 6077d326930SKishon Vijay Abraham I { 6087d326930SKishon Vijay Abraham I u32 reg; 6097d326930SKishon Vijay Abraham I 6107d326930SKishon Vijay Abraham I if (omap_host->bus_mode == mode) 6117d326930SKishon Vijay Abraham I return; 6127d326930SKishon Vijay Abraham I 6137d326930SKishon Vijay Abraham I reg = sdhci_omap_readl(omap_host, SDHCI_OMAP_CON); 6147d326930SKishon Vijay Abraham I if (mode == MMC_BUSMODE_OPENDRAIN) 6157d326930SKishon Vijay Abraham I reg |= CON_OD; 6167d326930SKishon Vijay Abraham I else 6177d326930SKishon Vijay Abraham I reg &= ~CON_OD; 6187d326930SKishon Vijay Abraham I sdhci_omap_writel(omap_host, SDHCI_OMAP_CON, reg); 6197d326930SKishon Vijay Abraham I 6207d326930SKishon Vijay Abraham I omap_host->bus_mode = mode; 6217d326930SKishon Vijay Abraham I } 6227d326930SKishon Vijay Abraham I 623ddde0e7dSColin Ian King static void sdhci_omap_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) 6247d326930SKishon Vijay Abraham I { 6257d326930SKishon Vijay Abraham I struct sdhci_host *host = mmc_priv(mmc); 6267d326930SKishon Vijay Abraham I struct sdhci_pltfm_host *pltfm_host; 6277d326930SKishon Vijay Abraham I struct sdhci_omap_host *omap_host; 6287d326930SKishon Vijay Abraham I 6297d326930SKishon Vijay Abraham I pltfm_host = sdhci_priv(host); 6307d326930SKishon Vijay Abraham I omap_host = sdhci_pltfm_priv(pltfm_host); 6317d326930SKishon Vijay Abraham I 6327d326930SKishon Vijay Abraham I sdhci_omap_set_bus_mode(omap_host, ios->bus_mode); 6338d20b2eaSKishon Vijay Abraham I sdhci_omap_set_timing(omap_host, ios->timing); 6347d326930SKishon Vijay Abraham I sdhci_set_ios(mmc, ios); 635300df508SKishon Vijay Abraham I sdhci_omap_set_power_mode(omap_host, ios->power_mode); 6367d326930SKishon Vijay Abraham I } 6377d326930SKishon Vijay Abraham I 6387d326930SKishon Vijay Abraham I static u16 sdhci_omap_calc_divisor(struct sdhci_pltfm_host *host, 6397d326930SKishon Vijay Abraham I unsigned int clock) 6407d326930SKishon Vijay Abraham I { 6417d326930SKishon Vijay Abraham I u16 dsor; 6427d326930SKishon Vijay Abraham I 6437d326930SKishon Vijay Abraham I dsor = DIV_ROUND_UP(clk_get_rate(host->clk), clock); 6447d326930SKishon Vijay Abraham I if (dsor > SYSCTL_CLKD_MAX) 6457d326930SKishon Vijay Abraham I dsor = SYSCTL_CLKD_MAX; 6467d326930SKishon Vijay Abraham I 6477d326930SKishon Vijay Abraham I return dsor; 6487d326930SKishon Vijay Abraham I } 6497d326930SKishon Vijay Abraham I 6507d326930SKishon Vijay Abraham I static void sdhci_omap_start_clock(struct sdhci_omap_host *omap_host) 6517d326930SKishon Vijay Abraham I { 6527d326930SKishon Vijay Abraham I u32 reg; 6537d326930SKishon Vijay Abraham I 6547d326930SKishon Vijay Abraham I reg = sdhci_omap_readl(omap_host, SDHCI_OMAP_SYSCTL); 6557d326930SKishon Vijay Abraham I reg |= SYSCTL_CEN; 6567d326930SKishon Vijay Abraham I sdhci_omap_writel(omap_host, SDHCI_OMAP_SYSCTL, reg); 6577d326930SKishon Vijay Abraham I } 6587d326930SKishon Vijay Abraham I 6597d326930SKishon Vijay Abraham I static void sdhci_omap_stop_clock(struct sdhci_omap_host *omap_host) 6607d326930SKishon Vijay Abraham I { 6617d326930SKishon Vijay Abraham I u32 reg; 6627d326930SKishon Vijay Abraham I 6637d326930SKishon Vijay Abraham I reg = sdhci_omap_readl(omap_host, SDHCI_OMAP_SYSCTL); 6647d326930SKishon Vijay Abraham I reg &= ~SYSCTL_CEN; 6657d326930SKishon Vijay Abraham I sdhci_omap_writel(omap_host, SDHCI_OMAP_SYSCTL, reg); 6667d326930SKishon Vijay Abraham I } 6677d326930SKishon Vijay Abraham I 6687d326930SKishon Vijay Abraham I static void sdhci_omap_set_clock(struct sdhci_host *host, unsigned int clock) 6697d326930SKishon Vijay Abraham I { 6707d326930SKishon Vijay Abraham I struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); 6717d326930SKishon Vijay Abraham I struct sdhci_omap_host *omap_host = sdhci_pltfm_priv(pltfm_host); 6727d326930SKishon Vijay Abraham I unsigned long clkdiv; 6737d326930SKishon Vijay Abraham I 6747d326930SKishon Vijay Abraham I sdhci_omap_stop_clock(omap_host); 6757d326930SKishon Vijay Abraham I 6767d326930SKishon Vijay Abraham I if (!clock) 6777d326930SKishon Vijay Abraham I return; 6787d326930SKishon Vijay Abraham I 6797d326930SKishon Vijay Abraham I clkdiv = sdhci_omap_calc_divisor(pltfm_host, clock); 6807d326930SKishon Vijay Abraham I clkdiv = (clkdiv & SYSCTL_CLKD_MASK) << SYSCTL_CLKD_SHIFT; 6817d326930SKishon Vijay Abraham I sdhci_enable_clk(host, clkdiv); 6827d326930SKishon Vijay Abraham I 6837d326930SKishon Vijay Abraham I sdhci_omap_start_clock(omap_host); 6847d326930SKishon Vijay Abraham I } 6857d326930SKishon Vijay Abraham I 686ddde0e7dSColin Ian King static void sdhci_omap_set_power(struct sdhci_host *host, unsigned char mode, 6877d326930SKishon Vijay Abraham I unsigned short vdd) 6887d326930SKishon Vijay Abraham I { 6897d326930SKishon Vijay Abraham I struct mmc_host *mmc = host->mmc; 6907d326930SKishon Vijay Abraham I 6918e0e7bd3STony Lindgren if (!IS_ERR(mmc->supply.vmmc)) 6927d326930SKishon Vijay Abraham I mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, vdd); 6937d326930SKishon Vijay Abraham I } 6947d326930SKishon Vijay Abraham I 695*c66e21fdSTony Lindgren /* 696*c66e21fdSTony Lindgren * MMCHS_HL_HWINFO has the MADMA_EN bit set if the controller instance 697*c66e21fdSTony Lindgren * is connected to L3 interconnect and is bus master capable. Note that 698*c66e21fdSTony Lindgren * the MMCHS_HL_HWINFO register is in the module registers before the 699*c66e21fdSTony Lindgren * omap registers and sdhci registers. The offset can vary for omap 700*c66e21fdSTony Lindgren * registers depending on the SoC. Do not use sdhci_omap_readl() here. 701*c66e21fdSTony Lindgren */ 702*c66e21fdSTony Lindgren static bool sdhci_omap_has_adma(struct sdhci_omap_host *omap_host, int offset) 703*c66e21fdSTony Lindgren { 704*c66e21fdSTony Lindgren /* MMCHS_HL_HWINFO register is only available on omap4 and later */ 705*c66e21fdSTony Lindgren if (offset < 0x200) 706*c66e21fdSTony Lindgren return false; 707*c66e21fdSTony Lindgren 708*c66e21fdSTony Lindgren return readl(omap_host->base + 4) & 1; 709*c66e21fdSTony Lindgren } 710*c66e21fdSTony Lindgren 7117d326930SKishon Vijay Abraham I static int sdhci_omap_enable_dma(struct sdhci_host *host) 7127d326930SKishon Vijay Abraham I { 7137d326930SKishon Vijay Abraham I u32 reg; 7147d326930SKishon Vijay Abraham I struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); 7157d326930SKishon Vijay Abraham I struct sdhci_omap_host *omap_host = sdhci_pltfm_priv(pltfm_host); 7167d326930SKishon Vijay Abraham I 7177d326930SKishon Vijay Abraham I reg = sdhci_omap_readl(omap_host, SDHCI_OMAP_CON); 718195fadb7SChunyan Zhang reg &= ~CON_DMA_MASTER; 719195fadb7SChunyan Zhang /* Switch to DMA slave mode when using external DMA */ 720195fadb7SChunyan Zhang if (!host->use_external_dma) 7217d326930SKishon Vijay Abraham I reg |= CON_DMA_MASTER; 722195fadb7SChunyan Zhang 7237d326930SKishon Vijay Abraham I sdhci_omap_writel(omap_host, SDHCI_OMAP_CON, reg); 7247d326930SKishon Vijay Abraham I 7257d326930SKishon Vijay Abraham I return 0; 7267d326930SKishon Vijay Abraham I } 7277d326930SKishon Vijay Abraham I 728ddde0e7dSColin Ian King static unsigned int sdhci_omap_get_min_clock(struct sdhci_host *host) 7297d326930SKishon Vijay Abraham I { 7307d326930SKishon Vijay Abraham I struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); 7317d326930SKishon Vijay Abraham I 7327d326930SKishon Vijay Abraham I return clk_get_rate(pltfm_host->clk) / SYSCTL_CLKD_MAX; 7337d326930SKishon Vijay Abraham I } 7347d326930SKishon Vijay Abraham I 7357d326930SKishon Vijay Abraham I static void sdhci_omap_set_bus_width(struct sdhci_host *host, int width) 7367d326930SKishon Vijay Abraham I { 7377d326930SKishon Vijay Abraham I struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); 7387d326930SKishon Vijay Abraham I struct sdhci_omap_host *omap_host = sdhci_pltfm_priv(pltfm_host); 7397d326930SKishon Vijay Abraham I u32 reg; 7407d326930SKishon Vijay Abraham I 7417d326930SKishon Vijay Abraham I reg = sdhci_omap_readl(omap_host, SDHCI_OMAP_CON); 7427d326930SKishon Vijay Abraham I if (width == MMC_BUS_WIDTH_8) 7437d326930SKishon Vijay Abraham I reg |= CON_DW8; 7447d326930SKishon Vijay Abraham I else 7457d326930SKishon Vijay Abraham I reg &= ~CON_DW8; 7467d326930SKishon Vijay Abraham I sdhci_omap_writel(omap_host, SDHCI_OMAP_CON, reg); 7477d326930SKishon Vijay Abraham I 7487d326930SKishon Vijay Abraham I sdhci_set_bus_width(host, width); 7497d326930SKishon Vijay Abraham I } 7507d326930SKishon Vijay Abraham I 7517d326930SKishon Vijay Abraham I static void sdhci_omap_init_74_clocks(struct sdhci_host *host, u8 power_mode) 7527d326930SKishon Vijay Abraham I { 7537d326930SKishon Vijay Abraham I u32 reg; 7547d326930SKishon Vijay Abraham I ktime_t timeout; 7557d326930SKishon Vijay Abraham I struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); 7567d326930SKishon Vijay Abraham I struct sdhci_omap_host *omap_host = sdhci_pltfm_priv(pltfm_host); 7577d326930SKishon Vijay Abraham I 7587d326930SKishon Vijay Abraham I if (omap_host->power_mode == power_mode) 7597d326930SKishon Vijay Abraham I return; 7607d326930SKishon Vijay Abraham I 7617d326930SKishon Vijay Abraham I if (power_mode != MMC_POWER_ON) 7627d326930SKishon Vijay Abraham I return; 7637d326930SKishon Vijay Abraham I 7647d326930SKishon Vijay Abraham I disable_irq(host->irq); 7657d326930SKishon Vijay Abraham I 7667d326930SKishon Vijay Abraham I reg = sdhci_omap_readl(omap_host, SDHCI_OMAP_CON); 7677d326930SKishon Vijay Abraham I reg |= CON_INIT; 7687d326930SKishon Vijay Abraham I sdhci_omap_writel(omap_host, SDHCI_OMAP_CON, reg); 7697d326930SKishon Vijay Abraham I sdhci_omap_writel(omap_host, SDHCI_OMAP_CMD, 0x0); 7707d326930SKishon Vijay Abraham I 7717d326930SKishon Vijay Abraham I /* wait 1ms */ 7727d326930SKishon Vijay Abraham I timeout = ktime_add_ms(ktime_get(), SDHCI_OMAP_TIMEOUT); 7739f0ea0bdSAdrian Hunter while (1) { 7749f0ea0bdSAdrian Hunter bool timedout = ktime_after(ktime_get(), timeout); 7759f0ea0bdSAdrian Hunter 7769f0ea0bdSAdrian Hunter if (sdhci_omap_readl(omap_host, SDHCI_OMAP_STAT) & INT_CC_EN) 7779f0ea0bdSAdrian Hunter break; 7789f0ea0bdSAdrian Hunter if (WARN_ON(timedout)) 7797d326930SKishon Vijay Abraham I return; 7807d326930SKishon Vijay Abraham I usleep_range(5, 10); 7817d326930SKishon Vijay Abraham I } 7827d326930SKishon Vijay Abraham I 7837d326930SKishon Vijay Abraham I reg = sdhci_omap_readl(omap_host, SDHCI_OMAP_CON); 7847d326930SKishon Vijay Abraham I reg &= ~CON_INIT; 7857d326930SKishon Vijay Abraham I sdhci_omap_writel(omap_host, SDHCI_OMAP_CON, reg); 7867d326930SKishon Vijay Abraham I sdhci_omap_writel(omap_host, SDHCI_OMAP_STAT, INT_CC_EN); 7877d326930SKishon Vijay Abraham I 7887d326930SKishon Vijay Abraham I enable_irq(host->irq); 7897d326930SKishon Vijay Abraham I } 7907d326930SKishon Vijay Abraham I 79127ceb7e0SKishon Vijay Abraham I static void sdhci_omap_set_uhs_signaling(struct sdhci_host *host, 79227ceb7e0SKishon Vijay Abraham I unsigned int timing) 79327ceb7e0SKishon Vijay Abraham I { 79427ceb7e0SKishon Vijay Abraham I u32 reg; 79527ceb7e0SKishon Vijay Abraham I struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); 79627ceb7e0SKishon Vijay Abraham I struct sdhci_omap_host *omap_host = sdhci_pltfm_priv(pltfm_host); 79727ceb7e0SKishon Vijay Abraham I 79827ceb7e0SKishon Vijay Abraham I sdhci_omap_stop_clock(omap_host); 79927ceb7e0SKishon Vijay Abraham I 80027ceb7e0SKishon Vijay Abraham I reg = sdhci_omap_readl(omap_host, SDHCI_OMAP_CON); 80127ceb7e0SKishon Vijay Abraham I if (timing == MMC_TIMING_UHS_DDR50 || timing == MMC_TIMING_MMC_DDR52) 80227ceb7e0SKishon Vijay Abraham I reg |= CON_DDR; 80327ceb7e0SKishon Vijay Abraham I else 80427ceb7e0SKishon Vijay Abraham I reg &= ~CON_DDR; 80527ceb7e0SKishon Vijay Abraham I sdhci_omap_writel(omap_host, SDHCI_OMAP_CON, reg); 80627ceb7e0SKishon Vijay Abraham I 80727ceb7e0SKishon Vijay Abraham I sdhci_set_uhs_signaling(host, timing); 80827ceb7e0SKishon Vijay Abraham I sdhci_omap_start_clock(omap_host); 80927ceb7e0SKishon Vijay Abraham I } 81027ceb7e0SKishon Vijay Abraham I 8119e84a2e6SFaiz Abbas #define MMC_TIMEOUT_US 20000 /* 20000 micro Sec */ 8122198eeffSYueHaibing static void sdhci_omap_reset(struct sdhci_host *host, u8 mask) 8135b0d6210SFaiz Abbas { 8145b0d6210SFaiz Abbas struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); 8155b0d6210SFaiz Abbas struct sdhci_omap_host *omap_host = sdhci_pltfm_priv(pltfm_host); 8169e84a2e6SFaiz Abbas unsigned long limit = MMC_TIMEOUT_US; 8179e84a2e6SFaiz Abbas unsigned long i = 0; 81853f9460eSTony Lindgren u32 sysc; 81953f9460eSTony Lindgren 82053f9460eSTony Lindgren /* Save target module sysconfig configured by SoC PM layer */ 82153f9460eSTony Lindgren if (mask & SDHCI_RESET_ALL) 82253f9460eSTony Lindgren sysc = sdhci_omap_readl(omap_host, SDHCI_OMAP_SYSCONFIG); 8235b0d6210SFaiz Abbas 8245b0d6210SFaiz Abbas /* Don't reset data lines during tuning operation */ 8255b0d6210SFaiz Abbas if (omap_host->is_tuning) 8265b0d6210SFaiz Abbas mask &= ~SDHCI_RESET_DATA; 8275b0d6210SFaiz Abbas 8289e84a2e6SFaiz Abbas if (omap_host->flags & SDHCI_OMAP_SPECIAL_RESET) { 8299e84a2e6SFaiz Abbas sdhci_writeb(host, mask, SDHCI_SOFTWARE_RESET); 8309e84a2e6SFaiz Abbas while ((!(sdhci_readb(host, SDHCI_SOFTWARE_RESET) & mask)) && 8319e84a2e6SFaiz Abbas (i++ < limit)) 8329e84a2e6SFaiz Abbas udelay(1); 8339e84a2e6SFaiz Abbas i = 0; 8349e84a2e6SFaiz Abbas while ((sdhci_readb(host, SDHCI_SOFTWARE_RESET) & mask) && 8359e84a2e6SFaiz Abbas (i++ < limit)) 8369e84a2e6SFaiz Abbas udelay(1); 8379e84a2e6SFaiz Abbas 8389e84a2e6SFaiz Abbas if (sdhci_readb(host, SDHCI_SOFTWARE_RESET) & mask) 8399e84a2e6SFaiz Abbas dev_err(mmc_dev(host->mmc), 8409e84a2e6SFaiz Abbas "Timeout waiting on controller reset in %s\n", 8419e84a2e6SFaiz Abbas __func__); 84253f9460eSTony Lindgren 84353f9460eSTony Lindgren goto restore_sysc; 8449e84a2e6SFaiz Abbas } 8459e84a2e6SFaiz Abbas 8465b0d6210SFaiz Abbas sdhci_reset(host, mask); 84753f9460eSTony Lindgren 84853f9460eSTony Lindgren restore_sysc: 84953f9460eSTony Lindgren if (mask & SDHCI_RESET_ALL) 85053f9460eSTony Lindgren sdhci_omap_writel(omap_host, SDHCI_OMAP_SYSCONFIG, sysc); 8515b0d6210SFaiz Abbas } 8525b0d6210SFaiz Abbas 8535c41ea6dSFaiz Abbas #define CMD_ERR_MASK (SDHCI_INT_CRC | SDHCI_INT_END_BIT | SDHCI_INT_INDEX |\ 8545c41ea6dSFaiz Abbas SDHCI_INT_TIMEOUT) 8555c41ea6dSFaiz Abbas #define CMD_MASK (CMD_ERR_MASK | SDHCI_INT_RESPONSE) 8565c41ea6dSFaiz Abbas 8575c41ea6dSFaiz Abbas static u32 sdhci_omap_irq(struct sdhci_host *host, u32 intmask) 8585c41ea6dSFaiz Abbas { 8595c41ea6dSFaiz Abbas struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); 8605c41ea6dSFaiz Abbas struct sdhci_omap_host *omap_host = sdhci_pltfm_priv(pltfm_host); 8615c41ea6dSFaiz Abbas 8625c41ea6dSFaiz Abbas if (omap_host->is_tuning && host->cmd && !host->data_early && 8635c41ea6dSFaiz Abbas (intmask & CMD_ERR_MASK)) { 8645c41ea6dSFaiz Abbas 8655c41ea6dSFaiz Abbas /* 8665c41ea6dSFaiz Abbas * Since we are not resetting data lines during tuning 8675c41ea6dSFaiz Abbas * operation, data error or data complete interrupts 8685c41ea6dSFaiz Abbas * might still arrive. Mark this request as a failure 8695c41ea6dSFaiz Abbas * but still wait for the data interrupt 8705c41ea6dSFaiz Abbas */ 8715c41ea6dSFaiz Abbas if (intmask & SDHCI_INT_TIMEOUT) 8725c41ea6dSFaiz Abbas host->cmd->error = -ETIMEDOUT; 8735c41ea6dSFaiz Abbas else 8745c41ea6dSFaiz Abbas host->cmd->error = -EILSEQ; 8755c41ea6dSFaiz Abbas 8765c41ea6dSFaiz Abbas host->cmd = NULL; 8775c41ea6dSFaiz Abbas 8785c41ea6dSFaiz Abbas /* 8795c41ea6dSFaiz Abbas * Sometimes command error interrupts and command complete 8805c41ea6dSFaiz Abbas * interrupt will arrive together. Clear all command related 8815c41ea6dSFaiz Abbas * interrupts here. 8825c41ea6dSFaiz Abbas */ 8835c41ea6dSFaiz Abbas sdhci_writel(host, intmask & CMD_MASK, SDHCI_INT_STATUS); 8845c41ea6dSFaiz Abbas intmask &= ~CMD_MASK; 8855c41ea6dSFaiz Abbas } 8865c41ea6dSFaiz Abbas 8875c41ea6dSFaiz Abbas return intmask; 8885c41ea6dSFaiz Abbas } 8895c41ea6dSFaiz Abbas 8905da5e494SFaiz Abbas static void sdhci_omap_set_timeout(struct sdhci_host *host, 8915da5e494SFaiz Abbas struct mmc_command *cmd) 8925da5e494SFaiz Abbas { 8935da5e494SFaiz Abbas if (cmd->opcode == MMC_ERASE) 8945da5e494SFaiz Abbas sdhci_set_data_timeout_irq(host, false); 8955da5e494SFaiz Abbas 8965da5e494SFaiz Abbas __sdhci_set_timeout(host, cmd); 8975da5e494SFaiz Abbas } 8985da5e494SFaiz Abbas 8997d326930SKishon Vijay Abraham I static struct sdhci_ops sdhci_omap_ops = { 9007d326930SKishon Vijay Abraham I .set_clock = sdhci_omap_set_clock, 9017d326930SKishon Vijay Abraham I .set_power = sdhci_omap_set_power, 9027d326930SKishon Vijay Abraham I .enable_dma = sdhci_omap_enable_dma, 9037d326930SKishon Vijay Abraham I .get_max_clock = sdhci_pltfm_clk_get_max_clock, 9047d326930SKishon Vijay Abraham I .get_min_clock = sdhci_omap_get_min_clock, 9057d326930SKishon Vijay Abraham I .set_bus_width = sdhci_omap_set_bus_width, 9067d326930SKishon Vijay Abraham I .platform_send_init_74_clocks = sdhci_omap_init_74_clocks, 9075b0d6210SFaiz Abbas .reset = sdhci_omap_reset, 90827ceb7e0SKishon Vijay Abraham I .set_uhs_signaling = sdhci_omap_set_uhs_signaling, 9095c41ea6dSFaiz Abbas .irq = sdhci_omap_irq, 9105da5e494SFaiz Abbas .set_timeout = sdhci_omap_set_timeout, 9117d326930SKishon Vijay Abraham I }; 9127d326930SKishon Vijay Abraham I 9137d326930SKishon Vijay Abraham I static int sdhci_omap_set_capabilities(struct sdhci_omap_host *omap_host) 9147d326930SKishon Vijay Abraham I { 9157d326930SKishon Vijay Abraham I u32 reg; 9167d326930SKishon Vijay Abraham I int ret = 0; 9177d326930SKishon Vijay Abraham I struct device *dev = omap_host->dev; 9187d326930SKishon Vijay Abraham I struct regulator *vqmmc; 9197d326930SKishon Vijay Abraham I 9207d326930SKishon Vijay Abraham I vqmmc = regulator_get(dev, "vqmmc"); 9217d326930SKishon Vijay Abraham I if (IS_ERR(vqmmc)) { 9227d326930SKishon Vijay Abraham I ret = PTR_ERR(vqmmc); 9237d326930SKishon Vijay Abraham I goto reg_put; 9247d326930SKishon Vijay Abraham I } 9257d326930SKishon Vijay Abraham I 9267d326930SKishon Vijay Abraham I /* voltage capabilities might be set by boot loader, clear it */ 9277d326930SKishon Vijay Abraham I reg = sdhci_omap_readl(omap_host, SDHCI_OMAP_CAPA); 9287d326930SKishon Vijay Abraham I reg &= ~(CAPA_VS18 | CAPA_VS30 | CAPA_VS33); 9297d326930SKishon Vijay Abraham I 9307d326930SKishon Vijay Abraham I if (regulator_is_supported_voltage(vqmmc, IOV_3V3, IOV_3V3)) 9317d326930SKishon Vijay Abraham I reg |= CAPA_VS33; 9327d326930SKishon Vijay Abraham I if (regulator_is_supported_voltage(vqmmc, IOV_1V8, IOV_1V8)) 9337d326930SKishon Vijay Abraham I reg |= CAPA_VS18; 9347d326930SKishon Vijay Abraham I 9357d326930SKishon Vijay Abraham I sdhci_omap_writel(omap_host, SDHCI_OMAP_CAPA, reg); 9367d326930SKishon Vijay Abraham I 9377d326930SKishon Vijay Abraham I reg_put: 9387d326930SKishon Vijay Abraham I regulator_put(vqmmc); 9397d326930SKishon Vijay Abraham I 9407d326930SKishon Vijay Abraham I return ret; 9417d326930SKishon Vijay Abraham I } 9427d326930SKishon Vijay Abraham I 9437d326930SKishon Vijay Abraham I static const struct sdhci_pltfm_data sdhci_omap_pdata = { 9447d326930SKishon Vijay Abraham I .quirks = SDHCI_QUIRK_BROKEN_CARD_DETECTION | 9457d326930SKishon Vijay Abraham I SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK | 9467d326930SKishon Vijay Abraham I SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN | 9477d326930SKishon Vijay Abraham I SDHCI_QUIRK_NO_HISPD_BIT | 9487d326930SKishon Vijay Abraham I SDHCI_QUIRK_BROKEN_ADMA_ZEROLEN_DESC, 949e0b2dbcfSKishon Vijay Abraham I .quirks2 = SDHCI_QUIRK2_ACMD23_BROKEN | 950e0b2dbcfSKishon Vijay Abraham I SDHCI_QUIRK2_PRESET_VALUE_BROKEN | 95125f80d86SKishon Vijay Abraham I SDHCI_QUIRK2_RSP_136_HAS_CRC | 95225f80d86SKishon Vijay Abraham I SDHCI_QUIRK2_DISABLE_HW_TIMEOUT, 9537d326930SKishon Vijay Abraham I .ops = &sdhci_omap_ops, 9547d326930SKishon Vijay Abraham I }; 9557d326930SKishon Vijay Abraham I 9566d75df75SKishon Vijay Abraham I static const struct sdhci_omap_data k2g_data = { 9576d75df75SKishon Vijay Abraham I .offset = 0x200, 9586d75df75SKishon Vijay Abraham I }; 9596d75df75SKishon Vijay Abraham I 960d6fe4928SFaiz Abbas static const struct sdhci_omap_data am335_data = { 961d6fe4928SFaiz Abbas .offset = 0x200, 9629e84a2e6SFaiz Abbas .flags = SDHCI_OMAP_SPECIAL_RESET, 963d6fe4928SFaiz Abbas }; 964d6fe4928SFaiz Abbas 965d6fe4928SFaiz Abbas static const struct sdhci_omap_data am437_data = { 966d6fe4928SFaiz Abbas .offset = 0x200, 9679e84a2e6SFaiz Abbas .flags = SDHCI_OMAP_SPECIAL_RESET, 968d6fe4928SFaiz Abbas }; 969d6fe4928SFaiz Abbas 9707d326930SKishon Vijay Abraham I static const struct sdhci_omap_data dra7_data = { 9717d326930SKishon Vijay Abraham I .offset = 0x200, 9728d20b2eaSKishon Vijay Abraham I .flags = SDHCI_OMAP_REQUIRE_IODELAY, 9737d326930SKishon Vijay Abraham I }; 9747d326930SKishon Vijay Abraham I 9757d326930SKishon Vijay Abraham I static const struct of_device_id omap_sdhci_match[] = { 9767d326930SKishon Vijay Abraham I { .compatible = "ti,dra7-sdhci", .data = &dra7_data }, 9776d75df75SKishon Vijay Abraham I { .compatible = "ti,k2g-sdhci", .data = &k2g_data }, 978d6fe4928SFaiz Abbas { .compatible = "ti,am335-sdhci", .data = &am335_data }, 979d6fe4928SFaiz Abbas { .compatible = "ti,am437-sdhci", .data = &am437_data }, 9807d326930SKishon Vijay Abraham I {}, 9817d326930SKishon Vijay Abraham I }; 9827d326930SKishon Vijay Abraham I MODULE_DEVICE_TABLE(of, omap_sdhci_match); 9837d326930SKishon Vijay Abraham I 9848d20b2eaSKishon Vijay Abraham I static struct pinctrl_state 9858d20b2eaSKishon Vijay Abraham I *sdhci_omap_iodelay_pinctrl_state(struct sdhci_omap_host *omap_host, char *mode, 9868d20b2eaSKishon Vijay Abraham I u32 *caps, u32 capmask) 9878d20b2eaSKishon Vijay Abraham I { 9888d20b2eaSKishon Vijay Abraham I struct device *dev = omap_host->dev; 989212f4f8aSKishon Vijay Abraham I char *version = omap_host->version; 9908d20b2eaSKishon Vijay Abraham I struct pinctrl_state *pinctrl_state = ERR_PTR(-ENODEV); 991212f4f8aSKishon Vijay Abraham I char str[20]; 9928d20b2eaSKishon Vijay Abraham I 9938d20b2eaSKishon Vijay Abraham I if (!(*caps & capmask)) 9948d20b2eaSKishon Vijay Abraham I goto ret; 9958d20b2eaSKishon Vijay Abraham I 996212f4f8aSKishon Vijay Abraham I if (version) { 997212f4f8aSKishon Vijay Abraham I snprintf(str, 20, "%s-%s", mode, version); 998212f4f8aSKishon Vijay Abraham I pinctrl_state = pinctrl_lookup_state(omap_host->pinctrl, str); 999212f4f8aSKishon Vijay Abraham I } 1000212f4f8aSKishon Vijay Abraham I 1001212f4f8aSKishon Vijay Abraham I if (IS_ERR(pinctrl_state)) 10028d20b2eaSKishon Vijay Abraham I pinctrl_state = pinctrl_lookup_state(omap_host->pinctrl, mode); 1003212f4f8aSKishon Vijay Abraham I 10048d20b2eaSKishon Vijay Abraham I if (IS_ERR(pinctrl_state)) { 10058d20b2eaSKishon Vijay Abraham I dev_err(dev, "no pinctrl state for %s mode", mode); 10068d20b2eaSKishon Vijay Abraham I *caps &= ~capmask; 10078d20b2eaSKishon Vijay Abraham I } 10088d20b2eaSKishon Vijay Abraham I 10098d20b2eaSKishon Vijay Abraham I ret: 10108d20b2eaSKishon Vijay Abraham I return pinctrl_state; 10118d20b2eaSKishon Vijay Abraham I } 10128d20b2eaSKishon Vijay Abraham I 10138d20b2eaSKishon Vijay Abraham I static int sdhci_omap_config_iodelay_pinctrl_state(struct sdhci_omap_host 10148d20b2eaSKishon Vijay Abraham I *omap_host) 10158d20b2eaSKishon Vijay Abraham I { 10168d20b2eaSKishon Vijay Abraham I struct device *dev = omap_host->dev; 10178d20b2eaSKishon Vijay Abraham I struct sdhci_host *host = omap_host->host; 10188d20b2eaSKishon Vijay Abraham I struct mmc_host *mmc = host->mmc; 10198d20b2eaSKishon Vijay Abraham I u32 *caps = &mmc->caps; 10208d20b2eaSKishon Vijay Abraham I u32 *caps2 = &mmc->caps2; 10218d20b2eaSKishon Vijay Abraham I struct pinctrl_state *state; 10228d20b2eaSKishon Vijay Abraham I struct pinctrl_state **pinctrl_state; 10238d20b2eaSKishon Vijay Abraham I 10248d20b2eaSKishon Vijay Abraham I if (!(omap_host->flags & SDHCI_OMAP_REQUIRE_IODELAY)) 10258d20b2eaSKishon Vijay Abraham I return 0; 10268d20b2eaSKishon Vijay Abraham I 1027a86854d0SKees Cook pinctrl_state = devm_kcalloc(dev, 1028a86854d0SKees Cook MMC_TIMING_MMC_HS200 + 1, 1029a86854d0SKees Cook sizeof(*pinctrl_state), 1030a86854d0SKees Cook GFP_KERNEL); 10318d20b2eaSKishon Vijay Abraham I if (!pinctrl_state) 10328d20b2eaSKishon Vijay Abraham I return -ENOMEM; 10338d20b2eaSKishon Vijay Abraham I 10348d20b2eaSKishon Vijay Abraham I omap_host->pinctrl = devm_pinctrl_get(omap_host->dev); 10358d20b2eaSKishon Vijay Abraham I if (IS_ERR(omap_host->pinctrl)) { 10368d20b2eaSKishon Vijay Abraham I dev_err(dev, "Cannot get pinctrl\n"); 10378d20b2eaSKishon Vijay Abraham I return PTR_ERR(omap_host->pinctrl); 10388d20b2eaSKishon Vijay Abraham I } 10398d20b2eaSKishon Vijay Abraham I 10408d20b2eaSKishon Vijay Abraham I state = pinctrl_lookup_state(omap_host->pinctrl, "default"); 10418d20b2eaSKishon Vijay Abraham I if (IS_ERR(state)) { 10428d20b2eaSKishon Vijay Abraham I dev_err(dev, "no pinctrl state for default mode\n"); 10438d20b2eaSKishon Vijay Abraham I return PTR_ERR(state); 10448d20b2eaSKishon Vijay Abraham I } 10458d20b2eaSKishon Vijay Abraham I pinctrl_state[MMC_TIMING_LEGACY] = state; 10468d20b2eaSKishon Vijay Abraham I 10478d20b2eaSKishon Vijay Abraham I state = sdhci_omap_iodelay_pinctrl_state(omap_host, "sdr104", caps, 10488d20b2eaSKishon Vijay Abraham I MMC_CAP_UHS_SDR104); 10498d20b2eaSKishon Vijay Abraham I if (!IS_ERR(state)) 10508d20b2eaSKishon Vijay Abraham I pinctrl_state[MMC_TIMING_UHS_SDR104] = state; 10518d20b2eaSKishon Vijay Abraham I 10528d20b2eaSKishon Vijay Abraham I state = sdhci_omap_iodelay_pinctrl_state(omap_host, "ddr50", caps, 10538d20b2eaSKishon Vijay Abraham I MMC_CAP_UHS_DDR50); 10548d20b2eaSKishon Vijay Abraham I if (!IS_ERR(state)) 10558d20b2eaSKishon Vijay Abraham I pinctrl_state[MMC_TIMING_UHS_DDR50] = state; 10568d20b2eaSKishon Vijay Abraham I 10578d20b2eaSKishon Vijay Abraham I state = sdhci_omap_iodelay_pinctrl_state(omap_host, "sdr50", caps, 10588d20b2eaSKishon Vijay Abraham I MMC_CAP_UHS_SDR50); 10598d20b2eaSKishon Vijay Abraham I if (!IS_ERR(state)) 10608d20b2eaSKishon Vijay Abraham I pinctrl_state[MMC_TIMING_UHS_SDR50] = state; 10618d20b2eaSKishon Vijay Abraham I 10628d20b2eaSKishon Vijay Abraham I state = sdhci_omap_iodelay_pinctrl_state(omap_host, "sdr25", caps, 10638d20b2eaSKishon Vijay Abraham I MMC_CAP_UHS_SDR25); 10648d20b2eaSKishon Vijay Abraham I if (!IS_ERR(state)) 10658d20b2eaSKishon Vijay Abraham I pinctrl_state[MMC_TIMING_UHS_SDR25] = state; 10668d20b2eaSKishon Vijay Abraham I 10678d20b2eaSKishon Vijay Abraham I state = sdhci_omap_iodelay_pinctrl_state(omap_host, "sdr12", caps, 10688d20b2eaSKishon Vijay Abraham I MMC_CAP_UHS_SDR12); 10698d20b2eaSKishon Vijay Abraham I if (!IS_ERR(state)) 10708d20b2eaSKishon Vijay Abraham I pinctrl_state[MMC_TIMING_UHS_SDR12] = state; 10718d20b2eaSKishon Vijay Abraham I 10728d20b2eaSKishon Vijay Abraham I state = sdhci_omap_iodelay_pinctrl_state(omap_host, "ddr_1_8v", caps, 10738d20b2eaSKishon Vijay Abraham I MMC_CAP_1_8V_DDR); 10743f402878SKishon Vijay Abraham I if (!IS_ERR(state)) { 10753f402878SKishon Vijay Abraham I pinctrl_state[MMC_TIMING_MMC_DDR52] = state; 10763f402878SKishon Vijay Abraham I } else { 10773f402878SKishon Vijay Abraham I state = sdhci_omap_iodelay_pinctrl_state(omap_host, "ddr_3_3v", 10783f402878SKishon Vijay Abraham I caps, 10793f402878SKishon Vijay Abraham I MMC_CAP_3_3V_DDR); 10808d20b2eaSKishon Vijay Abraham I if (!IS_ERR(state)) 10818d20b2eaSKishon Vijay Abraham I pinctrl_state[MMC_TIMING_MMC_DDR52] = state; 10823f402878SKishon Vijay Abraham I } 10838d20b2eaSKishon Vijay Abraham I 10848d20b2eaSKishon Vijay Abraham I state = sdhci_omap_iodelay_pinctrl_state(omap_host, "hs", caps, 10858d20b2eaSKishon Vijay Abraham I MMC_CAP_SD_HIGHSPEED); 10868d20b2eaSKishon Vijay Abraham I if (!IS_ERR(state)) 10878d20b2eaSKishon Vijay Abraham I pinctrl_state[MMC_TIMING_SD_HS] = state; 10888d20b2eaSKishon Vijay Abraham I 10898d20b2eaSKishon Vijay Abraham I state = sdhci_omap_iodelay_pinctrl_state(omap_host, "hs", caps, 10908d20b2eaSKishon Vijay Abraham I MMC_CAP_MMC_HIGHSPEED); 10918d20b2eaSKishon Vijay Abraham I if (!IS_ERR(state)) 10928d20b2eaSKishon Vijay Abraham I pinctrl_state[MMC_TIMING_MMC_HS] = state; 10938d20b2eaSKishon Vijay Abraham I 10948d20b2eaSKishon Vijay Abraham I state = sdhci_omap_iodelay_pinctrl_state(omap_host, "hs200_1_8v", caps2, 10958d20b2eaSKishon Vijay Abraham I MMC_CAP2_HS200_1_8V_SDR); 10968d20b2eaSKishon Vijay Abraham I if (!IS_ERR(state)) 10978d20b2eaSKishon Vijay Abraham I pinctrl_state[MMC_TIMING_MMC_HS200] = state; 10988d20b2eaSKishon Vijay Abraham I 10998d20b2eaSKishon Vijay Abraham I omap_host->pinctrl_state = pinctrl_state; 11008d20b2eaSKishon Vijay Abraham I 11018d20b2eaSKishon Vijay Abraham I return 0; 11028d20b2eaSKishon Vijay Abraham I } 11038d20b2eaSKishon Vijay Abraham I 1104212f4f8aSKishon Vijay Abraham I static const struct soc_device_attribute sdhci_omap_soc_devices[] = { 1105212f4f8aSKishon Vijay Abraham I { 1106212f4f8aSKishon Vijay Abraham I .machine = "DRA7[45]*", 1107212f4f8aSKishon Vijay Abraham I .revision = "ES1.[01]", 1108212f4f8aSKishon Vijay Abraham I }, 1109212f4f8aSKishon Vijay Abraham I { 1110212f4f8aSKishon Vijay Abraham I /* sentinel */ 1111212f4f8aSKishon Vijay Abraham I } 1112212f4f8aSKishon Vijay Abraham I }; 1113212f4f8aSKishon Vijay Abraham I 11147d326930SKishon Vijay Abraham I static int sdhci_omap_probe(struct platform_device *pdev) 11157d326930SKishon Vijay Abraham I { 11167d326930SKishon Vijay Abraham I int ret; 11177d326930SKishon Vijay Abraham I u32 offset; 11187d326930SKishon Vijay Abraham I struct device *dev = &pdev->dev; 11197d326930SKishon Vijay Abraham I struct sdhci_host *host; 11207d326930SKishon Vijay Abraham I struct sdhci_pltfm_host *pltfm_host; 11217d326930SKishon Vijay Abraham I struct sdhci_omap_host *omap_host; 11227d326930SKishon Vijay Abraham I struct mmc_host *mmc; 11237d326930SKishon Vijay Abraham I const struct of_device_id *match; 11247d326930SKishon Vijay Abraham I struct sdhci_omap_data *data; 1125212f4f8aSKishon Vijay Abraham I const struct soc_device_attribute *soc; 1126195fadb7SChunyan Zhang struct resource *regs; 11277d326930SKishon Vijay Abraham I 11287d326930SKishon Vijay Abraham I match = of_match_device(omap_sdhci_match, dev); 11297d326930SKishon Vijay Abraham I if (!match) 11307d326930SKishon Vijay Abraham I return -EINVAL; 11317d326930SKishon Vijay Abraham I 11327d326930SKishon Vijay Abraham I data = (struct sdhci_omap_data *)match->data; 11337d326930SKishon Vijay Abraham I if (!data) { 11347d326930SKishon Vijay Abraham I dev_err(dev, "no sdhci omap data\n"); 11357d326930SKishon Vijay Abraham I return -EINVAL; 11367d326930SKishon Vijay Abraham I } 11377d326930SKishon Vijay Abraham I offset = data->offset; 11387d326930SKishon Vijay Abraham I 1139195fadb7SChunyan Zhang regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); 1140195fadb7SChunyan Zhang if (!regs) 1141195fadb7SChunyan Zhang return -ENXIO; 1142195fadb7SChunyan Zhang 11437d326930SKishon Vijay Abraham I host = sdhci_pltfm_init(pdev, &sdhci_omap_pdata, 11447d326930SKishon Vijay Abraham I sizeof(*omap_host)); 11457d326930SKishon Vijay Abraham I if (IS_ERR(host)) { 11467d326930SKishon Vijay Abraham I dev_err(dev, "Failed sdhci_pltfm_init\n"); 11477d326930SKishon Vijay Abraham I return PTR_ERR(host); 11487d326930SKishon Vijay Abraham I } 11497d326930SKishon Vijay Abraham I 11507d326930SKishon Vijay Abraham I pltfm_host = sdhci_priv(host); 11517d326930SKishon Vijay Abraham I omap_host = sdhci_pltfm_priv(pltfm_host); 11527d326930SKishon Vijay Abraham I omap_host->host = host; 11537d326930SKishon Vijay Abraham I omap_host->base = host->ioaddr; 11547d326930SKishon Vijay Abraham I omap_host->dev = dev; 1155300df508SKishon Vijay Abraham I omap_host->power_mode = MMC_POWER_UNDEFINED; 11568d20b2eaSKishon Vijay Abraham I omap_host->timing = MMC_TIMING_LEGACY; 11578d20b2eaSKishon Vijay Abraham I omap_host->flags = data->flags; 11587d326930SKishon Vijay Abraham I host->ioaddr += offset; 1159195fadb7SChunyan Zhang host->mapbase = regs->start + offset; 11607d326930SKishon Vijay Abraham I 11617d326930SKishon Vijay Abraham I mmc = host->mmc; 11621d3a2220SKishon Vijay Abraham I sdhci_get_of_property(pdev); 11637d326930SKishon Vijay Abraham I ret = mmc_of_parse(mmc); 11647d326930SKishon Vijay Abraham I if (ret) 11657d326930SKishon Vijay Abraham I goto err_pltfm_free; 11667d326930SKishon Vijay Abraham I 1167212f4f8aSKishon Vijay Abraham I soc = soc_device_match(sdhci_omap_soc_devices); 1168212f4f8aSKishon Vijay Abraham I if (soc) { 1169212f4f8aSKishon Vijay Abraham I omap_host->version = "rev11"; 1170212f4f8aSKishon Vijay Abraham I if (!strcmp(dev_name(dev), "4809c000.mmc")) 1171212f4f8aSKishon Vijay Abraham I mmc->f_max = 96000000; 1172212f4f8aSKishon Vijay Abraham I if (!strcmp(dev_name(dev), "480b4000.mmc")) 1173212f4f8aSKishon Vijay Abraham I mmc->f_max = 48000000; 1174212f4f8aSKishon Vijay Abraham I if (!strcmp(dev_name(dev), "480ad000.mmc")) 1175212f4f8aSKishon Vijay Abraham I mmc->f_max = 48000000; 1176212f4f8aSKishon Vijay Abraham I } 1177212f4f8aSKishon Vijay Abraham I 1178031d2cccSKishon Vijay Abraham I if (!mmc_can_gpio_ro(mmc)) 1179031d2cccSKishon Vijay Abraham I mmc->caps2 |= MMC_CAP2_NO_WRITE_PROTECT; 1180031d2cccSKishon Vijay Abraham I 11817d326930SKishon Vijay Abraham I pltfm_host->clk = devm_clk_get(dev, "fck"); 11827d326930SKishon Vijay Abraham I if (IS_ERR(pltfm_host->clk)) { 11837d326930SKishon Vijay Abraham I ret = PTR_ERR(pltfm_host->clk); 11847d326930SKishon Vijay Abraham I goto err_pltfm_free; 11857d326930SKishon Vijay Abraham I } 11867d326930SKishon Vijay Abraham I 11877d326930SKishon Vijay Abraham I ret = clk_set_rate(pltfm_host->clk, mmc->f_max); 11887d326930SKishon Vijay Abraham I if (ret) { 11897d326930SKishon Vijay Abraham I dev_err(dev, "failed to set clock to %d\n", mmc->f_max); 11907d326930SKishon Vijay Abraham I goto err_pltfm_free; 11917d326930SKishon Vijay Abraham I } 11927d326930SKishon Vijay Abraham I 11937d326930SKishon Vijay Abraham I omap_host->pbias = devm_regulator_get_optional(dev, "pbias"); 11947d326930SKishon Vijay Abraham I if (IS_ERR(omap_host->pbias)) { 11957d326930SKishon Vijay Abraham I ret = PTR_ERR(omap_host->pbias); 11967d326930SKishon Vijay Abraham I if (ret != -ENODEV) 11977d326930SKishon Vijay Abraham I goto err_pltfm_free; 11987d326930SKishon Vijay Abraham I dev_dbg(dev, "unable to get pbias regulator %d\n", ret); 11997d326930SKishon Vijay Abraham I } 12007d326930SKishon Vijay Abraham I omap_host->pbias_enabled = false; 12017d326930SKishon Vijay Abraham I 12027d326930SKishon Vijay Abraham I /* 12037d326930SKishon Vijay Abraham I * omap_device_pm_domain has callbacks to enable the main 12047d326930SKishon Vijay Abraham I * functional clock, interface clock and also configure the 12057d326930SKishon Vijay Abraham I * SYSCONFIG register of omap devices. The callback will be invoked 12067d326930SKishon Vijay Abraham I * as part of pm_runtime_get_sync. 12077d326930SKishon Vijay Abraham I */ 12087d326930SKishon Vijay Abraham I pm_runtime_enable(dev); 1209809ae4e1STian Tao ret = pm_runtime_resume_and_get(dev); 1210809ae4e1STian Tao if (ret) { 12117d326930SKishon Vijay Abraham I dev_err(dev, "pm_runtime_get_sync failed\n"); 12127d326930SKishon Vijay Abraham I goto err_rpm_disable; 12137d326930SKishon Vijay Abraham I } 12147d326930SKishon Vijay Abraham I 12157d326930SKishon Vijay Abraham I ret = sdhci_omap_set_capabilities(omap_host); 12167d326930SKishon Vijay Abraham I if (ret) { 12177d326930SKishon Vijay Abraham I dev_err(dev, "failed to set system capabilities\n"); 12187d326930SKishon Vijay Abraham I goto err_put_sync; 12197d326930SKishon Vijay Abraham I } 12207d326930SKishon Vijay Abraham I 12217d326930SKishon Vijay Abraham I host->mmc_host_ops.start_signal_voltage_switch = 12227d326930SKishon Vijay Abraham I sdhci_omap_start_signal_voltage_switch; 12237d326930SKishon Vijay Abraham I host->mmc_host_ops.set_ios = sdhci_omap_set_ios; 122420ea26a1SKishon Vijay Abraham I host->mmc_host_ops.card_busy = sdhci_omap_card_busy; 12259fc2cd76SKishon Vijay Abraham I host->mmc_host_ops.execute_tuning = sdhci_omap_execute_tuning; 1226efde12b2SKishon Vijay Abraham I host->mmc_host_ops.enable_sdio_irq = sdhci_omap_enable_sdio_irq; 12277d326930SKishon Vijay Abraham I 1228*c66e21fdSTony Lindgren /* 1229*c66e21fdSTony Lindgren * Switch to external DMA only if there is the "dmas" property and 1230*c66e21fdSTony Lindgren * ADMA is not available on the controller instance. 1231*c66e21fdSTony Lindgren */ 1232*c66e21fdSTony Lindgren if (device_property_present(dev, "dmas") && 1233*c66e21fdSTony Lindgren !sdhci_omap_has_adma(omap_host, offset)) 1234195fadb7SChunyan Zhang sdhci_switch_external_dma(host, true); 1235195fadb7SChunyan Zhang 12363781d288STony Lindgren if (device_property_read_bool(dev, "ti,non-removable")) { 12373781d288STony Lindgren dev_warn_once(dev, "using old ti,non-removable property\n"); 12383781d288STony Lindgren mmc->caps |= MMC_CAP_NONREMOVABLE; 12393781d288STony Lindgren } 12403781d288STony Lindgren 1241055e0483SUlf Hansson /* R1B responses is required to properly manage HW busy detection. */ 1242055e0483SUlf Hansson mmc->caps |= MMC_CAP_NEED_RSP_BUSY; 1243055e0483SUlf Hansson 12440ec4ee3cSKishon Vijay Abraham I ret = sdhci_setup_host(host); 12457d326930SKishon Vijay Abraham I if (ret) 12467d326930SKishon Vijay Abraham I goto err_put_sync; 12477d326930SKishon Vijay Abraham I 12480ec4ee3cSKishon Vijay Abraham I ret = sdhci_omap_config_iodelay_pinctrl_state(omap_host); 12490ec4ee3cSKishon Vijay Abraham I if (ret) 12500ec4ee3cSKishon Vijay Abraham I goto err_cleanup_host; 12510ec4ee3cSKishon Vijay Abraham I 12520ec4ee3cSKishon Vijay Abraham I ret = __sdhci_add_host(host); 12530ec4ee3cSKishon Vijay Abraham I if (ret) 12540ec4ee3cSKishon Vijay Abraham I goto err_cleanup_host; 12550ec4ee3cSKishon Vijay Abraham I 12567d326930SKishon Vijay Abraham I return 0; 12577d326930SKishon Vijay Abraham I 12580ec4ee3cSKishon Vijay Abraham I err_cleanup_host: 12590ec4ee3cSKishon Vijay Abraham I sdhci_cleanup_host(host); 12600ec4ee3cSKishon Vijay Abraham I 12617d326930SKishon Vijay Abraham I err_put_sync: 12627d326930SKishon Vijay Abraham I pm_runtime_put_sync(dev); 12637d326930SKishon Vijay Abraham I 12647d326930SKishon Vijay Abraham I err_rpm_disable: 12657d326930SKishon Vijay Abraham I pm_runtime_disable(dev); 12667d326930SKishon Vijay Abraham I 12677d326930SKishon Vijay Abraham I err_pltfm_free: 12687d326930SKishon Vijay Abraham I sdhci_pltfm_free(pdev); 12697d326930SKishon Vijay Abraham I return ret; 12707d326930SKishon Vijay Abraham I } 12717d326930SKishon Vijay Abraham I 12727d326930SKishon Vijay Abraham I static int sdhci_omap_remove(struct platform_device *pdev) 12737d326930SKishon Vijay Abraham I { 12747d326930SKishon Vijay Abraham I struct device *dev = &pdev->dev; 12757d326930SKishon Vijay Abraham I struct sdhci_host *host = platform_get_drvdata(pdev); 12767d326930SKishon Vijay Abraham I 12777d326930SKishon Vijay Abraham I sdhci_remove_host(host, true); 12787d326930SKishon Vijay Abraham I pm_runtime_put_sync(dev); 12797d326930SKishon Vijay Abraham I pm_runtime_disable(dev); 12807d326930SKishon Vijay Abraham I sdhci_pltfm_free(pdev); 12817d326930SKishon Vijay Abraham I 12827d326930SKishon Vijay Abraham I return 0; 12837d326930SKishon Vijay Abraham I } 1284ee0f3092SFaiz Abbas #ifdef CONFIG_PM_SLEEP 1285ee0f3092SFaiz Abbas static void sdhci_omap_context_save(struct sdhci_omap_host *omap_host) 1286ee0f3092SFaiz Abbas { 1287ee0f3092SFaiz Abbas omap_host->con = sdhci_omap_readl(omap_host, SDHCI_OMAP_CON); 1288ee0f3092SFaiz Abbas omap_host->hctl = sdhci_omap_readl(omap_host, SDHCI_OMAP_HCTL); 1289d806e334STony Lindgren omap_host->sysctl = sdhci_omap_readl(omap_host, SDHCI_OMAP_SYSCTL); 1290ee0f3092SFaiz Abbas omap_host->capa = sdhci_omap_readl(omap_host, SDHCI_OMAP_CAPA); 1291d806e334STony Lindgren omap_host->ie = sdhci_omap_readl(omap_host, SDHCI_OMAP_IE); 1292d806e334STony Lindgren omap_host->ise = sdhci_omap_readl(omap_host, SDHCI_OMAP_ISE); 1293ee0f3092SFaiz Abbas } 1294ee0f3092SFaiz Abbas 1295d806e334STony Lindgren /* Order matters here, HCTL must be restored in two phases */ 1296ee0f3092SFaiz Abbas static void sdhci_omap_context_restore(struct sdhci_omap_host *omap_host) 1297ee0f3092SFaiz Abbas { 1298ee0f3092SFaiz Abbas sdhci_omap_writel(omap_host, SDHCI_OMAP_HCTL, omap_host->hctl); 1299ee0f3092SFaiz Abbas sdhci_omap_writel(omap_host, SDHCI_OMAP_CAPA, omap_host->capa); 1300d806e334STony Lindgren sdhci_omap_writel(omap_host, SDHCI_OMAP_HCTL, omap_host->hctl); 1301d806e334STony Lindgren 1302d806e334STony Lindgren sdhci_omap_writel(omap_host, SDHCI_OMAP_SYSCTL, omap_host->sysctl); 1303d806e334STony Lindgren sdhci_omap_writel(omap_host, SDHCI_OMAP_CON, omap_host->con); 1304d806e334STony Lindgren sdhci_omap_writel(omap_host, SDHCI_OMAP_IE, omap_host->ie); 1305d806e334STony Lindgren sdhci_omap_writel(omap_host, SDHCI_OMAP_ISE, omap_host->ise); 1306ee0f3092SFaiz Abbas } 1307ee0f3092SFaiz Abbas 1308ee0f3092SFaiz Abbas static int __maybe_unused sdhci_omap_suspend(struct device *dev) 1309ee0f3092SFaiz Abbas { 1310ee0f3092SFaiz Abbas struct sdhci_host *host = dev_get_drvdata(dev); 1311ee0f3092SFaiz Abbas struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); 1312ee0f3092SFaiz Abbas struct sdhci_omap_host *omap_host = sdhci_pltfm_priv(pltfm_host); 1313ee0f3092SFaiz Abbas 1314ee0f3092SFaiz Abbas sdhci_suspend_host(host); 1315ee0f3092SFaiz Abbas 1316ee0f3092SFaiz Abbas sdhci_omap_context_save(omap_host); 1317ee0f3092SFaiz Abbas 1318ee0f3092SFaiz Abbas pinctrl_pm_select_idle_state(dev); 1319ee0f3092SFaiz Abbas 1320ee0f3092SFaiz Abbas pm_runtime_force_suspend(dev); 1321ee0f3092SFaiz Abbas 1322ee0f3092SFaiz Abbas return 0; 1323ee0f3092SFaiz Abbas } 1324ee0f3092SFaiz Abbas 1325ee0f3092SFaiz Abbas static int __maybe_unused sdhci_omap_resume(struct device *dev) 1326ee0f3092SFaiz Abbas { 1327ee0f3092SFaiz Abbas struct sdhci_host *host = dev_get_drvdata(dev); 1328ee0f3092SFaiz Abbas struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); 1329ee0f3092SFaiz Abbas struct sdhci_omap_host *omap_host = sdhci_pltfm_priv(pltfm_host); 1330ee0f3092SFaiz Abbas 1331ee0f3092SFaiz Abbas pm_runtime_force_resume(dev); 1332ee0f3092SFaiz Abbas 1333ee0f3092SFaiz Abbas pinctrl_pm_select_default_state(dev); 1334ee0f3092SFaiz Abbas 1335ee0f3092SFaiz Abbas sdhci_omap_context_restore(omap_host); 1336ee0f3092SFaiz Abbas 1337ee0f3092SFaiz Abbas sdhci_resume_host(host); 1338ee0f3092SFaiz Abbas 1339ee0f3092SFaiz Abbas return 0; 1340ee0f3092SFaiz Abbas } 1341ee0f3092SFaiz Abbas #endif 1342ee0f3092SFaiz Abbas static SIMPLE_DEV_PM_OPS(sdhci_omap_dev_pm_ops, sdhci_omap_suspend, 1343ee0f3092SFaiz Abbas sdhci_omap_resume); 13447d326930SKishon Vijay Abraham I 13457d326930SKishon Vijay Abraham I static struct platform_driver sdhci_omap_driver = { 13467d326930SKishon Vijay Abraham I .probe = sdhci_omap_probe, 13477d326930SKishon Vijay Abraham I .remove = sdhci_omap_remove, 13487d326930SKishon Vijay Abraham I .driver = { 13497d326930SKishon Vijay Abraham I .name = "sdhci-omap", 1350a1a48919SDouglas Anderson .probe_type = PROBE_PREFER_ASYNCHRONOUS, 1351ee0f3092SFaiz Abbas .pm = &sdhci_omap_dev_pm_ops, 13527d326930SKishon Vijay Abraham I .of_match_table = omap_sdhci_match, 13537d326930SKishon Vijay Abraham I }, 13547d326930SKishon Vijay Abraham I }; 13557d326930SKishon Vijay Abraham I 13567d326930SKishon Vijay Abraham I module_platform_driver(sdhci_omap_driver); 13577d326930SKishon Vijay Abraham I 13587d326930SKishon Vijay Abraham I MODULE_DESCRIPTION("SDHCI driver for OMAP SoCs"); 13597d326930SKishon Vijay Abraham I MODULE_AUTHOR("Texas Instruments Inc."); 13607d326930SKishon Vijay Abraham I MODULE_LICENSE("GPL v2"); 13617d326930SKishon Vijay Abraham I MODULE_ALIAS("platform:sdhci_omap"); 1362