16b1baefeSThomas Gleixner // SPDX-License-Identifier: GPL-2.0-only 27d326930SKishon Vijay Abraham I /** 37d326930SKishon Vijay Abraham I * SDHCI Controller driver for TI's OMAP SoCs 47d326930SKishon Vijay Abraham I * 57d326930SKishon Vijay Abraham I * Copyright (C) 2017 Texas Instruments 67d326930SKishon Vijay Abraham I * Author: Kishon Vijay Abraham I <kishon@ti.com> 77d326930SKishon Vijay Abraham I */ 87d326930SKishon Vijay Abraham I 97d326930SKishon Vijay Abraham I #include <linux/delay.h> 105da5e494SFaiz Abbas #include <linux/mmc/mmc.h> 117d326930SKishon Vijay Abraham I #include <linux/mmc/slot-gpio.h> 127d326930SKishon Vijay Abraham I #include <linux/module.h> 137d326930SKishon Vijay Abraham I #include <linux/of.h> 14a1e97bd2STony Lindgren #include <linux/of_irq.h> 157d326930SKishon Vijay Abraham I #include <linux/platform_device.h> 167d326930SKishon Vijay Abraham I #include <linux/pm_runtime.h> 17a1e97bd2STony Lindgren #include <linux/pm_wakeirq.h> 187d326930SKishon Vijay Abraham I #include <linux/regulator/consumer.h> 198d20b2eaSKishon Vijay Abraham I #include <linux/pinctrl/consumer.h> 20212f4f8aSKishon Vijay Abraham I #include <linux/sys_soc.h> 21961de0a8SFaiz Abbas #include <linux/thermal.h> 227d326930SKishon Vijay Abraham I 237d326930SKishon Vijay Abraham I #include "sdhci-pltfm.h" 247d326930SKishon Vijay Abraham I 2542b380b6STony Lindgren /* 2642b380b6STony Lindgren * Note that the register offsets used here are from omap_regs 2742b380b6STony Lindgren * base which is 0x100 for omap4 and later, and 0 for omap3 and 2842b380b6STony Lindgren * earlier. 2942b380b6STony Lindgren */ 3042b380b6STony Lindgren #define SDHCI_OMAP_SYSCONFIG 0x10 3153f9460eSTony Lindgren 3242b380b6STony Lindgren #define SDHCI_OMAP_CON 0x2c 337d326930SKishon Vijay Abraham I #define CON_DW8 BIT(5) 347d326930SKishon Vijay Abraham I #define CON_DMA_MASTER BIT(20) 3527ceb7e0SKishon Vijay Abraham I #define CON_DDR BIT(19) 3620ea26a1SKishon Vijay Abraham I #define CON_CLKEXTFREE BIT(16) 3720ea26a1SKishon Vijay Abraham I #define CON_PADEN BIT(15) 38efde12b2SKishon Vijay Abraham I #define CON_CTPL BIT(11) 397d326930SKishon Vijay Abraham I #define CON_INIT BIT(1) 407d326930SKishon Vijay Abraham I #define CON_OD BIT(0) 417d326930SKishon Vijay Abraham I 4242b380b6STony Lindgren #define SDHCI_OMAP_DLL 0x34 439fc2cd76SKishon Vijay Abraham I #define DLL_SWT BIT(20) 449fc2cd76SKishon Vijay Abraham I #define DLL_FORCE_SR_C_SHIFT 13 459fc2cd76SKishon Vijay Abraham I #define DLL_FORCE_SR_C_MASK (0x7f << DLL_FORCE_SR_C_SHIFT) 469fc2cd76SKishon Vijay Abraham I #define DLL_FORCE_VALUE BIT(12) 479fc2cd76SKishon Vijay Abraham I #define DLL_CALIB BIT(1) 489fc2cd76SKishon Vijay Abraham I 4942b380b6STony Lindgren #define SDHCI_OMAP_CMD 0x10c 507d326930SKishon Vijay Abraham I 5142b380b6STony Lindgren #define SDHCI_OMAP_PSTATE 0x124 5220ea26a1SKishon Vijay Abraham I #define PSTATE_DLEV_DAT0 BIT(20) 5320ea26a1SKishon Vijay Abraham I #define PSTATE_DATI BIT(1) 5420ea26a1SKishon Vijay Abraham I 5542b380b6STony Lindgren #define SDHCI_OMAP_HCTL 0x128 567d326930SKishon Vijay Abraham I #define HCTL_SDBP BIT(8) 577d326930SKishon Vijay Abraham I #define HCTL_SDVS_SHIFT 9 587d326930SKishon Vijay Abraham I #define HCTL_SDVS_MASK (0x7 << HCTL_SDVS_SHIFT) 597d326930SKishon Vijay Abraham I #define HCTL_SDVS_33 (0x7 << HCTL_SDVS_SHIFT) 607d326930SKishon Vijay Abraham I #define HCTL_SDVS_30 (0x6 << HCTL_SDVS_SHIFT) 617d326930SKishon Vijay Abraham I #define HCTL_SDVS_18 (0x5 << HCTL_SDVS_SHIFT) 627d326930SKishon Vijay Abraham I 6342b380b6STony Lindgren #define SDHCI_OMAP_SYSCTL 0x12c 647d326930SKishon Vijay Abraham I #define SYSCTL_CEN BIT(2) 657d326930SKishon Vijay Abraham I #define SYSCTL_CLKD_SHIFT 6 667d326930SKishon Vijay Abraham I #define SYSCTL_CLKD_MASK 0x3ff 677d326930SKishon Vijay Abraham I 6842b380b6STony Lindgren #define SDHCI_OMAP_STAT 0x130 697d326930SKishon Vijay Abraham I 7042b380b6STony Lindgren #define SDHCI_OMAP_IE 0x134 717d326930SKishon Vijay Abraham I #define INT_CC_EN BIT(0) 727d326930SKishon Vijay Abraham I 7342b380b6STony Lindgren #define SDHCI_OMAP_ISE 0x138 74d806e334STony Lindgren 7542b380b6STony Lindgren #define SDHCI_OMAP_AC12 0x13c 767d326930SKishon Vijay Abraham I #define AC12_V1V8_SIGEN BIT(19) 779fc2cd76SKishon Vijay Abraham I #define AC12_SCLK_SEL BIT(23) 787d326930SKishon Vijay Abraham I 7942b380b6STony Lindgren #define SDHCI_OMAP_CAPA 0x140 807d326930SKishon Vijay Abraham I #define CAPA_VS33 BIT(24) 817d326930SKishon Vijay Abraham I #define CAPA_VS30 BIT(25) 827d326930SKishon Vijay Abraham I #define CAPA_VS18 BIT(26) 837d326930SKishon Vijay Abraham I 8442b380b6STony Lindgren #define SDHCI_OMAP_CAPA2 0x144 859fc2cd76SKishon Vijay Abraham I #define CAPA2_TSDR50 BIT(13) 869fc2cd76SKishon Vijay Abraham I 877d326930SKishon Vijay Abraham I #define SDHCI_OMAP_TIMEOUT 1 /* 1 msec */ 887d326930SKishon Vijay Abraham I 897d326930SKishon Vijay Abraham I #define SYSCTL_CLKD_MAX 0x3FF 907d326930SKishon Vijay Abraham I 917d326930SKishon Vijay Abraham I #define IOV_1V8 1800000 /* 180000 uV */ 927d326930SKishon Vijay Abraham I #define IOV_3V0 3000000 /* 300000 uV */ 937d326930SKishon Vijay Abraham I #define IOV_3V3 3300000 /* 330000 uV */ 947d326930SKishon Vijay Abraham I 959fc2cd76SKishon Vijay Abraham I #define MAX_PHASE_DELAY 0x7C 969fc2cd76SKishon Vijay Abraham I 978d20b2eaSKishon Vijay Abraham I /* sdhci-omap controller flags */ 988d20b2eaSKishon Vijay Abraham I #define SDHCI_OMAP_REQUIRE_IODELAY BIT(0) 999e84a2e6SFaiz Abbas #define SDHCI_OMAP_SPECIAL_RESET BIT(1) 1008d20b2eaSKishon Vijay Abraham I 1017d326930SKishon Vijay Abraham I struct sdhci_omap_data { 10242b380b6STony Lindgren int omap_offset; /* Offset for omap regs from base */ 10342b380b6STony Lindgren u32 offset; /* Offset for SDHCI regs from base */ 1048d20b2eaSKishon Vijay Abraham I u8 flags; 1057d326930SKishon Vijay Abraham I }; 1067d326930SKishon Vijay Abraham I 1077d326930SKishon Vijay Abraham I struct sdhci_omap_host { 108212f4f8aSKishon Vijay Abraham I char *version; 1097d326930SKishon Vijay Abraham I void __iomem *base; 1107d326930SKishon Vijay Abraham I struct device *dev; 1117d326930SKishon Vijay Abraham I struct regulator *pbias; 1127d326930SKishon Vijay Abraham I bool pbias_enabled; 1137d326930SKishon Vijay Abraham I struct sdhci_host *host; 1147d326930SKishon Vijay Abraham I u8 bus_mode; 1157d326930SKishon Vijay Abraham I u8 power_mode; 1168d20b2eaSKishon Vijay Abraham I u8 timing; 1178d20b2eaSKishon Vijay Abraham I u8 flags; 1188d20b2eaSKishon Vijay Abraham I 1198d20b2eaSKishon Vijay Abraham I struct pinctrl *pinctrl; 1208d20b2eaSKishon Vijay Abraham I struct pinctrl_state **pinctrl_state; 121a1e97bd2STony Lindgren int wakeirq; 1225b0d6210SFaiz Abbas bool is_tuning; 12342b380b6STony Lindgren 12442b380b6STony Lindgren /* Offset for omap specific registers from base */ 12542b380b6STony Lindgren int omap_offset; 12642b380b6STony Lindgren 127ee0f3092SFaiz Abbas /* Omap specific context save */ 128ee0f3092SFaiz Abbas u32 con; 129ee0f3092SFaiz Abbas u32 hctl; 130ee0f3092SFaiz Abbas u32 sysctl; 131ee0f3092SFaiz Abbas u32 capa; 132d806e334STony Lindgren u32 ie; 133d806e334STony Lindgren u32 ise; 1347d326930SKishon Vijay Abraham I }; 1357d326930SKishon Vijay Abraham I 1368d20b2eaSKishon Vijay Abraham I static void sdhci_omap_start_clock(struct sdhci_omap_host *omap_host); 1378d20b2eaSKishon Vijay Abraham I static void sdhci_omap_stop_clock(struct sdhci_omap_host *omap_host); 1388d20b2eaSKishon Vijay Abraham I 1397d326930SKishon Vijay Abraham I static inline u32 sdhci_omap_readl(struct sdhci_omap_host *host, 1407d326930SKishon Vijay Abraham I unsigned int offset) 1417d326930SKishon Vijay Abraham I { 14242b380b6STony Lindgren return readl(host->base + host->omap_offset + offset); 1437d326930SKishon Vijay Abraham I } 1447d326930SKishon Vijay Abraham I 1457d326930SKishon Vijay Abraham I static inline void sdhci_omap_writel(struct sdhci_omap_host *host, 1467d326930SKishon Vijay Abraham I unsigned int offset, u32 data) 1477d326930SKishon Vijay Abraham I { 14842b380b6STony Lindgren writel(data, host->base + host->omap_offset + offset); 1497d326930SKishon Vijay Abraham I } 1507d326930SKishon Vijay Abraham I 1517d326930SKishon Vijay Abraham I static int sdhci_omap_set_pbias(struct sdhci_omap_host *omap_host, 1527d326930SKishon Vijay Abraham I bool power_on, unsigned int iov) 1537d326930SKishon Vijay Abraham I { 1547d326930SKishon Vijay Abraham I int ret; 1557d326930SKishon Vijay Abraham I struct device *dev = omap_host->dev; 1567d326930SKishon Vijay Abraham I 1577d326930SKishon Vijay Abraham I if (IS_ERR(omap_host->pbias)) 1587d326930SKishon Vijay Abraham I return 0; 1597d326930SKishon Vijay Abraham I 1607d326930SKishon Vijay Abraham I if (power_on) { 1617d326930SKishon Vijay Abraham I ret = regulator_set_voltage(omap_host->pbias, iov, iov); 1627d326930SKishon Vijay Abraham I if (ret) { 1637d326930SKishon Vijay Abraham I dev_err(dev, "pbias set voltage failed\n"); 1647d326930SKishon Vijay Abraham I return ret; 1657d326930SKishon Vijay Abraham I } 1667d326930SKishon Vijay Abraham I 1677d326930SKishon Vijay Abraham I if (omap_host->pbias_enabled) 1687d326930SKishon Vijay Abraham I return 0; 1697d326930SKishon Vijay Abraham I 1707d326930SKishon Vijay Abraham I ret = regulator_enable(omap_host->pbias); 1717d326930SKishon Vijay Abraham I if (ret) { 1727d326930SKishon Vijay Abraham I dev_err(dev, "pbias reg enable fail\n"); 1737d326930SKishon Vijay Abraham I return ret; 1747d326930SKishon Vijay Abraham I } 1757d326930SKishon Vijay Abraham I 1767d326930SKishon Vijay Abraham I omap_host->pbias_enabled = true; 1777d326930SKishon Vijay Abraham I } else { 1787d326930SKishon Vijay Abraham I if (!omap_host->pbias_enabled) 1797d326930SKishon Vijay Abraham I return 0; 1807d326930SKishon Vijay Abraham I 1817d326930SKishon Vijay Abraham I ret = regulator_disable(omap_host->pbias); 1827d326930SKishon Vijay Abraham I if (ret) { 1837d326930SKishon Vijay Abraham I dev_err(dev, "pbias reg disable fail\n"); 1847d326930SKishon Vijay Abraham I return ret; 1857d326930SKishon Vijay Abraham I } 1867d326930SKishon Vijay Abraham I omap_host->pbias_enabled = false; 1877d326930SKishon Vijay Abraham I } 1887d326930SKishon Vijay Abraham I 1897d326930SKishon Vijay Abraham I return 0; 1907d326930SKishon Vijay Abraham I } 1917d326930SKishon Vijay Abraham I 1927d326930SKishon Vijay Abraham I static int sdhci_omap_enable_iov(struct sdhci_omap_host *omap_host, 193de5ccd2aSTony Lindgren unsigned int iov_pbias) 1947d326930SKishon Vijay Abraham I { 1957d326930SKishon Vijay Abraham I int ret; 1967d326930SKishon Vijay Abraham I struct sdhci_host *host = omap_host->host; 1977d326930SKishon Vijay Abraham I struct mmc_host *mmc = host->mmc; 1987d326930SKishon Vijay Abraham I 1997d326930SKishon Vijay Abraham I ret = sdhci_omap_set_pbias(omap_host, false, 0); 2007d326930SKishon Vijay Abraham I if (ret) 2017d326930SKishon Vijay Abraham I return ret; 2027d326930SKishon Vijay Abraham I 2037d326930SKishon Vijay Abraham I if (!IS_ERR(mmc->supply.vqmmc)) { 204de5ccd2aSTony Lindgren /* Pick the right voltage to allow 3.0V for 3.3V nominal PBIAS */ 205de5ccd2aSTony Lindgren ret = mmc_regulator_set_vqmmc(mmc, &mmc->ios); 206de5ccd2aSTony Lindgren if (ret < 0) { 2077d326930SKishon Vijay Abraham I dev_err(mmc_dev(mmc), "vqmmc set voltage failed\n"); 2087d326930SKishon Vijay Abraham I return ret; 2097d326930SKishon Vijay Abraham I } 2107d326930SKishon Vijay Abraham I } 2117d326930SKishon Vijay Abraham I 212de5ccd2aSTony Lindgren ret = sdhci_omap_set_pbias(omap_host, true, iov_pbias); 2137d326930SKishon Vijay Abraham I if (ret) 2147d326930SKishon Vijay Abraham I return ret; 2157d326930SKishon Vijay Abraham I 2167d326930SKishon Vijay Abraham I return 0; 2177d326930SKishon Vijay Abraham I } 2187d326930SKishon Vijay Abraham I 2197d326930SKishon Vijay Abraham I static void sdhci_omap_conf_bus_power(struct sdhci_omap_host *omap_host, 2207d326930SKishon Vijay Abraham I unsigned char signal_voltage) 2217d326930SKishon Vijay Abraham I { 222de5ccd2aSTony Lindgren u32 reg, capa; 2237d326930SKishon Vijay Abraham I ktime_t timeout; 2247d326930SKishon Vijay Abraham I 2257d326930SKishon Vijay Abraham I reg = sdhci_omap_readl(omap_host, SDHCI_OMAP_HCTL); 2267d326930SKishon Vijay Abraham I reg &= ~HCTL_SDVS_MASK; 2277d326930SKishon Vijay Abraham I 228de5ccd2aSTony Lindgren switch (signal_voltage) { 229de5ccd2aSTony Lindgren case MMC_SIGNAL_VOLTAGE_330: 230de5ccd2aSTony Lindgren capa = sdhci_omap_readl(omap_host, SDHCI_OMAP_CAPA); 231de5ccd2aSTony Lindgren if (capa & CAPA_VS33) 2327d326930SKishon Vijay Abraham I reg |= HCTL_SDVS_33; 233de5ccd2aSTony Lindgren else if (capa & CAPA_VS30) 234de5ccd2aSTony Lindgren reg |= HCTL_SDVS_30; 2357d326930SKishon Vijay Abraham I else 236de5ccd2aSTony Lindgren dev_warn(omap_host->dev, "misconfigured CAPA: %08x\n", 237de5ccd2aSTony Lindgren capa); 238de5ccd2aSTony Lindgren break; 239de5ccd2aSTony Lindgren case MMC_SIGNAL_VOLTAGE_180: 240de5ccd2aSTony Lindgren default: 2417d326930SKishon Vijay Abraham I reg |= HCTL_SDVS_18; 242de5ccd2aSTony Lindgren break; 243de5ccd2aSTony Lindgren } 2447d326930SKishon Vijay Abraham I 2457d326930SKishon Vijay Abraham I sdhci_omap_writel(omap_host, SDHCI_OMAP_HCTL, reg); 2467d326930SKishon Vijay Abraham I 2477d326930SKishon Vijay Abraham I reg |= HCTL_SDBP; 2487d326930SKishon Vijay Abraham I sdhci_omap_writel(omap_host, SDHCI_OMAP_HCTL, reg); 2497d326930SKishon Vijay Abraham I 2507d326930SKishon Vijay Abraham I /* wait 1ms */ 2517d326930SKishon Vijay Abraham I timeout = ktime_add_ms(ktime_get(), SDHCI_OMAP_TIMEOUT); 2529f0ea0bdSAdrian Hunter while (1) { 2539f0ea0bdSAdrian Hunter bool timedout = ktime_after(ktime_get(), timeout); 2549f0ea0bdSAdrian Hunter 2559f0ea0bdSAdrian Hunter if (sdhci_omap_readl(omap_host, SDHCI_OMAP_HCTL) & HCTL_SDBP) 2569f0ea0bdSAdrian Hunter break; 2579f0ea0bdSAdrian Hunter if (WARN_ON(timedout)) 2587d326930SKishon Vijay Abraham I return; 2597d326930SKishon Vijay Abraham I usleep_range(5, 10); 2607d326930SKishon Vijay Abraham I } 2617d326930SKishon Vijay Abraham I } 2627d326930SKishon Vijay Abraham I 263efde12b2SKishon Vijay Abraham I static void sdhci_omap_enable_sdio_irq(struct mmc_host *mmc, int enable) 264efde12b2SKishon Vijay Abraham I { 265efde12b2SKishon Vijay Abraham I struct sdhci_host *host = mmc_priv(mmc); 266efde12b2SKishon Vijay Abraham I struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); 267efde12b2SKishon Vijay Abraham I struct sdhci_omap_host *omap_host = sdhci_pltfm_priv(pltfm_host); 268efde12b2SKishon Vijay Abraham I u32 reg; 269efde12b2SKishon Vijay Abraham I 270efde12b2SKishon Vijay Abraham I reg = sdhci_omap_readl(omap_host, SDHCI_OMAP_CON); 271efde12b2SKishon Vijay Abraham I if (enable) 272efde12b2SKishon Vijay Abraham I reg |= (CON_CTPL | CON_CLKEXTFREE); 273efde12b2SKishon Vijay Abraham I else 274efde12b2SKishon Vijay Abraham I reg &= ~(CON_CTPL | CON_CLKEXTFREE); 275efde12b2SKishon Vijay Abraham I sdhci_omap_writel(omap_host, SDHCI_OMAP_CON, reg); 276efde12b2SKishon Vijay Abraham I 277efde12b2SKishon Vijay Abraham I sdhci_enable_sdio_irq(mmc, enable); 278efde12b2SKishon Vijay Abraham I } 279efde12b2SKishon Vijay Abraham I 2809fc2cd76SKishon Vijay Abraham I static inline void sdhci_omap_set_dll(struct sdhci_omap_host *omap_host, 2819fc2cd76SKishon Vijay Abraham I int count) 2829fc2cd76SKishon Vijay Abraham I { 2839fc2cd76SKishon Vijay Abraham I int i; 2849fc2cd76SKishon Vijay Abraham I u32 reg; 2859fc2cd76SKishon Vijay Abraham I 2869fc2cd76SKishon Vijay Abraham I reg = sdhci_omap_readl(omap_host, SDHCI_OMAP_DLL); 2879fc2cd76SKishon Vijay Abraham I reg |= DLL_FORCE_VALUE; 2889fc2cd76SKishon Vijay Abraham I reg &= ~DLL_FORCE_SR_C_MASK; 2899fc2cd76SKishon Vijay Abraham I reg |= (count << DLL_FORCE_SR_C_SHIFT); 2909fc2cd76SKishon Vijay Abraham I sdhci_omap_writel(omap_host, SDHCI_OMAP_DLL, reg); 2919fc2cd76SKishon Vijay Abraham I 2929fc2cd76SKishon Vijay Abraham I reg |= DLL_CALIB; 2939fc2cd76SKishon Vijay Abraham I sdhci_omap_writel(omap_host, SDHCI_OMAP_DLL, reg); 2949fc2cd76SKishon Vijay Abraham I for (i = 0; i < 1000; i++) { 2959fc2cd76SKishon Vijay Abraham I reg = sdhci_omap_readl(omap_host, SDHCI_OMAP_DLL); 2969fc2cd76SKishon Vijay Abraham I if (reg & DLL_CALIB) 2979fc2cd76SKishon Vijay Abraham I break; 2989fc2cd76SKishon Vijay Abraham I } 2999fc2cd76SKishon Vijay Abraham I reg &= ~DLL_CALIB; 3009fc2cd76SKishon Vijay Abraham I sdhci_omap_writel(omap_host, SDHCI_OMAP_DLL, reg); 3019fc2cd76SKishon Vijay Abraham I } 3029fc2cd76SKishon Vijay Abraham I 3039fc2cd76SKishon Vijay Abraham I static void sdhci_omap_disable_tuning(struct sdhci_omap_host *omap_host) 3049fc2cd76SKishon Vijay Abraham I { 3059fc2cd76SKishon Vijay Abraham I u32 reg; 3069fc2cd76SKishon Vijay Abraham I 3079fc2cd76SKishon Vijay Abraham I reg = sdhci_omap_readl(omap_host, SDHCI_OMAP_AC12); 3089fc2cd76SKishon Vijay Abraham I reg &= ~AC12_SCLK_SEL; 3099fc2cd76SKishon Vijay Abraham I sdhci_omap_writel(omap_host, SDHCI_OMAP_AC12, reg); 3109fc2cd76SKishon Vijay Abraham I 3119fc2cd76SKishon Vijay Abraham I reg = sdhci_omap_readl(omap_host, SDHCI_OMAP_DLL); 3129fc2cd76SKishon Vijay Abraham I reg &= ~(DLL_FORCE_VALUE | DLL_SWT); 3139fc2cd76SKishon Vijay Abraham I sdhci_omap_writel(omap_host, SDHCI_OMAP_DLL, reg); 3149fc2cd76SKishon Vijay Abraham I } 3159fc2cd76SKishon Vijay Abraham I 3169fc2cd76SKishon Vijay Abraham I static int sdhci_omap_execute_tuning(struct mmc_host *mmc, u32 opcode) 3179fc2cd76SKishon Vijay Abraham I { 3189fc2cd76SKishon Vijay Abraham I struct sdhci_host *host = mmc_priv(mmc); 3199fc2cd76SKishon Vijay Abraham I struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); 3209fc2cd76SKishon Vijay Abraham I struct sdhci_omap_host *omap_host = sdhci_pltfm_priv(pltfm_host); 321961de0a8SFaiz Abbas struct thermal_zone_device *thermal_dev; 3229fc2cd76SKishon Vijay Abraham I struct device *dev = omap_host->dev; 3239fc2cd76SKishon Vijay Abraham I struct mmc_ios *ios = &mmc->ios; 3249fc2cd76SKishon Vijay Abraham I u32 start_window = 0, max_window = 0; 325961de0a8SFaiz Abbas bool single_point_failure = false; 326db2039fcSFaiz Abbas bool dcrc_was_enabled = false; 3279fc2cd76SKishon Vijay Abraham I u8 cur_match, prev_match = 0; 3289fc2cd76SKishon Vijay Abraham I u32 length = 0, max_len = 0; 3299fc2cd76SKishon Vijay Abraham I u32 phase_delay = 0; 330961de0a8SFaiz Abbas int temperature; 3319fc2cd76SKishon Vijay Abraham I int ret = 0; 3329fc2cd76SKishon Vijay Abraham I u32 reg; 333961de0a8SFaiz Abbas int i; 3349fc2cd76SKishon Vijay Abraham I 3359fc2cd76SKishon Vijay Abraham I /* clock tuning is not needed for upto 52MHz */ 3369fc2cd76SKishon Vijay Abraham I if (ios->clock <= 52000000) 3379fc2cd76SKishon Vijay Abraham I return 0; 3389fc2cd76SKishon Vijay Abraham I 3399fc2cd76SKishon Vijay Abraham I reg = sdhci_omap_readl(omap_host, SDHCI_OMAP_CAPA2); 3409fc2cd76SKishon Vijay Abraham I if (ios->timing == MMC_TIMING_UHS_SDR50 && !(reg & CAPA2_TSDR50)) 3419fc2cd76SKishon Vijay Abraham I return 0; 3429fc2cd76SKishon Vijay Abraham I 343961de0a8SFaiz Abbas thermal_dev = thermal_zone_get_zone_by_name("cpu_thermal"); 344961de0a8SFaiz Abbas if (IS_ERR(thermal_dev)) { 345961de0a8SFaiz Abbas dev_err(dev, "Unable to get thermal zone for tuning\n"); 346961de0a8SFaiz Abbas return PTR_ERR(thermal_dev); 347961de0a8SFaiz Abbas } 348961de0a8SFaiz Abbas 349961de0a8SFaiz Abbas ret = thermal_zone_get_temp(thermal_dev, &temperature); 350961de0a8SFaiz Abbas if (ret) 351961de0a8SFaiz Abbas return ret; 352961de0a8SFaiz Abbas 3539fc2cd76SKishon Vijay Abraham I reg = sdhci_omap_readl(omap_host, SDHCI_OMAP_DLL); 3549fc2cd76SKishon Vijay Abraham I reg |= DLL_SWT; 3559fc2cd76SKishon Vijay Abraham I sdhci_omap_writel(omap_host, SDHCI_OMAP_DLL, reg); 3569fc2cd76SKishon Vijay Abraham I 3577d33c358SKishon Vijay Abraham I /* 3587d33c358SKishon Vijay Abraham I * OMAP5/DRA74X/DRA72x Errata i802: 3597d33c358SKishon Vijay Abraham I * DCRC error interrupts (MMCHS_STAT[21] DCRC=0x1) can occur 3607d33c358SKishon Vijay Abraham I * during the tuning procedure. So disable it during the 3617d33c358SKishon Vijay Abraham I * tuning procedure. 3627d33c358SKishon Vijay Abraham I */ 363db2039fcSFaiz Abbas if (host->ier & SDHCI_INT_DATA_CRC) { 364db2039fcSFaiz Abbas host->ier &= ~SDHCI_INT_DATA_CRC; 365db2039fcSFaiz Abbas dcrc_was_enabled = true; 366db2039fcSFaiz Abbas } 3677d33c358SKishon Vijay Abraham I 3685b0d6210SFaiz Abbas omap_host->is_tuning = true; 3695b0d6210SFaiz Abbas 370961de0a8SFaiz Abbas /* 371961de0a8SFaiz Abbas * Stage 1: Search for a maximum pass window ignoring any 372ff50df9aSAdrian Hunter * single point failures. If the tuning value ends up 373961de0a8SFaiz Abbas * near it, move away from it in stage 2 below 374961de0a8SFaiz Abbas */ 3759fc2cd76SKishon Vijay Abraham I while (phase_delay <= MAX_PHASE_DELAY) { 3769fc2cd76SKishon Vijay Abraham I sdhci_omap_set_dll(omap_host, phase_delay); 3779fc2cd76SKishon Vijay Abraham I 3789fc2cd76SKishon Vijay Abraham I cur_match = !mmc_send_tuning(mmc, opcode, NULL); 3799fc2cd76SKishon Vijay Abraham I if (cur_match) { 3809fc2cd76SKishon Vijay Abraham I if (prev_match) { 3819fc2cd76SKishon Vijay Abraham I length++; 382961de0a8SFaiz Abbas } else if (single_point_failure) { 383961de0a8SFaiz Abbas /* ignore single point failure */ 384961de0a8SFaiz Abbas length++; 3859fc2cd76SKishon Vijay Abraham I } else { 3869fc2cd76SKishon Vijay Abraham I start_window = phase_delay; 3879fc2cd76SKishon Vijay Abraham I length = 1; 3889fc2cd76SKishon Vijay Abraham I } 389961de0a8SFaiz Abbas } else { 390961de0a8SFaiz Abbas single_point_failure = prev_match; 3919fc2cd76SKishon Vijay Abraham I } 3929fc2cd76SKishon Vijay Abraham I 3939fc2cd76SKishon Vijay Abraham I if (length > max_len) { 3949fc2cd76SKishon Vijay Abraham I max_window = start_window; 3959fc2cd76SKishon Vijay Abraham I max_len = length; 3969fc2cd76SKishon Vijay Abraham I } 3979fc2cd76SKishon Vijay Abraham I 3989fc2cd76SKishon Vijay Abraham I prev_match = cur_match; 3999fc2cd76SKishon Vijay Abraham I phase_delay += 4; 4009fc2cd76SKishon Vijay Abraham I } 4019fc2cd76SKishon Vijay Abraham I 4029fc2cd76SKishon Vijay Abraham I if (!max_len) { 4039fc2cd76SKishon Vijay Abraham I dev_err(dev, "Unable to find match\n"); 4049fc2cd76SKishon Vijay Abraham I ret = -EIO; 4059fc2cd76SKishon Vijay Abraham I goto tuning_error; 4069fc2cd76SKishon Vijay Abraham I } 4079fc2cd76SKishon Vijay Abraham I 408961de0a8SFaiz Abbas /* 409961de0a8SFaiz Abbas * Assign tuning value as a ratio of maximum pass window based 410961de0a8SFaiz Abbas * on temperature 411961de0a8SFaiz Abbas */ 412961de0a8SFaiz Abbas if (temperature < -20000) 413feb40824SFaiz Abbas phase_delay = min(max_window + 4 * (max_len - 1) - 24, 414961de0a8SFaiz Abbas max_window + 415961de0a8SFaiz Abbas DIV_ROUND_UP(13 * max_len, 16) * 4); 416961de0a8SFaiz Abbas else if (temperature < 20000) 417961de0a8SFaiz Abbas phase_delay = max_window + DIV_ROUND_UP(9 * max_len, 16) * 4; 418961de0a8SFaiz Abbas else if (temperature < 40000) 419961de0a8SFaiz Abbas phase_delay = max_window + DIV_ROUND_UP(8 * max_len, 16) * 4; 420961de0a8SFaiz Abbas else if (temperature < 70000) 421961de0a8SFaiz Abbas phase_delay = max_window + DIV_ROUND_UP(7 * max_len, 16) * 4; 422961de0a8SFaiz Abbas else if (temperature < 90000) 423961de0a8SFaiz Abbas phase_delay = max_window + DIV_ROUND_UP(5 * max_len, 16) * 4; 424961de0a8SFaiz Abbas else if (temperature < 120000) 425961de0a8SFaiz Abbas phase_delay = max_window + DIV_ROUND_UP(4 * max_len, 16) * 4; 426961de0a8SFaiz Abbas else 427961de0a8SFaiz Abbas phase_delay = max_window + DIV_ROUND_UP(3 * max_len, 16) * 4; 428961de0a8SFaiz Abbas 429961de0a8SFaiz Abbas /* 430961de0a8SFaiz Abbas * Stage 2: Search for a single point failure near the chosen tuning 431961de0a8SFaiz Abbas * value in two steps. First in the +3 to +10 range and then in the 432961de0a8SFaiz Abbas * +2 to -10 range. If found, move away from it in the appropriate 433961de0a8SFaiz Abbas * direction by the appropriate amount depending on the temperature. 434961de0a8SFaiz Abbas */ 435961de0a8SFaiz Abbas for (i = 3; i <= 10; i++) { 436961de0a8SFaiz Abbas sdhci_omap_set_dll(omap_host, phase_delay + i); 437961de0a8SFaiz Abbas 438961de0a8SFaiz Abbas if (mmc_send_tuning(mmc, opcode, NULL)) { 439961de0a8SFaiz Abbas if (temperature < 10000) 440961de0a8SFaiz Abbas phase_delay += i + 6; 441961de0a8SFaiz Abbas else if (temperature < 20000) 442961de0a8SFaiz Abbas phase_delay += i - 12; 443961de0a8SFaiz Abbas else if (temperature < 70000) 444961de0a8SFaiz Abbas phase_delay += i - 8; 445961de0a8SFaiz Abbas else 446961de0a8SFaiz Abbas phase_delay += i - 6; 447961de0a8SFaiz Abbas 448961de0a8SFaiz Abbas goto single_failure_found; 449961de0a8SFaiz Abbas } 450961de0a8SFaiz Abbas } 451961de0a8SFaiz Abbas 452961de0a8SFaiz Abbas for (i = 2; i >= -10; i--) { 453961de0a8SFaiz Abbas sdhci_omap_set_dll(omap_host, phase_delay + i); 454961de0a8SFaiz Abbas 455961de0a8SFaiz Abbas if (mmc_send_tuning(mmc, opcode, NULL)) { 456961de0a8SFaiz Abbas if (temperature < 10000) 457961de0a8SFaiz Abbas phase_delay += i + 12; 458961de0a8SFaiz Abbas else if (temperature < 20000) 459961de0a8SFaiz Abbas phase_delay += i + 8; 460961de0a8SFaiz Abbas else if (temperature < 70000) 461961de0a8SFaiz Abbas phase_delay += i + 8; 462961de0a8SFaiz Abbas else if (temperature < 90000) 463961de0a8SFaiz Abbas phase_delay += i + 10; 464961de0a8SFaiz Abbas else 465961de0a8SFaiz Abbas phase_delay += i + 12; 466961de0a8SFaiz Abbas 467961de0a8SFaiz Abbas goto single_failure_found; 468961de0a8SFaiz Abbas } 469961de0a8SFaiz Abbas } 470961de0a8SFaiz Abbas 471961de0a8SFaiz Abbas single_failure_found: 4729fc2cd76SKishon Vijay Abraham I reg = sdhci_omap_readl(omap_host, SDHCI_OMAP_AC12); 4739fc2cd76SKishon Vijay Abraham I if (!(reg & AC12_SCLK_SEL)) { 4749fc2cd76SKishon Vijay Abraham I ret = -EIO; 4759fc2cd76SKishon Vijay Abraham I goto tuning_error; 4769fc2cd76SKishon Vijay Abraham I } 4779fc2cd76SKishon Vijay Abraham I 4789fc2cd76SKishon Vijay Abraham I sdhci_omap_set_dll(omap_host, phase_delay); 4799fc2cd76SKishon Vijay Abraham I 4805b0d6210SFaiz Abbas omap_host->is_tuning = false; 4815b0d6210SFaiz Abbas 4829fc2cd76SKishon Vijay Abraham I goto ret; 4839fc2cd76SKishon Vijay Abraham I 4849fc2cd76SKishon Vijay Abraham I tuning_error: 4855b0d6210SFaiz Abbas omap_host->is_tuning = false; 4869fc2cd76SKishon Vijay Abraham I dev_err(dev, "Tuning failed\n"); 4879fc2cd76SKishon Vijay Abraham I sdhci_omap_disable_tuning(omap_host); 4889fc2cd76SKishon Vijay Abraham I 4899fc2cd76SKishon Vijay Abraham I ret: 4909fc2cd76SKishon Vijay Abraham I sdhci_reset(host, SDHCI_RESET_CMD | SDHCI_RESET_DATA); 491db2039fcSFaiz Abbas /* Reenable forbidden interrupt */ 492db2039fcSFaiz Abbas if (dcrc_was_enabled) 493db2039fcSFaiz Abbas host->ier |= SDHCI_INT_DATA_CRC; 4947d33c358SKishon Vijay Abraham I sdhci_writel(host, host->ier, SDHCI_INT_ENABLE); 4957d33c358SKishon Vijay Abraham I sdhci_writel(host, host->ier, SDHCI_SIGNAL_ENABLE); 4969fc2cd76SKishon Vijay Abraham I return ret; 4979fc2cd76SKishon Vijay Abraham I } 4989fc2cd76SKishon Vijay Abraham I 49920ea26a1SKishon Vijay Abraham I static int sdhci_omap_card_busy(struct mmc_host *mmc) 50020ea26a1SKishon Vijay Abraham I { 50120ea26a1SKishon Vijay Abraham I u32 reg, ac12; 50220ea26a1SKishon Vijay Abraham I int ret = false; 50320ea26a1SKishon Vijay Abraham I struct sdhci_host *host = mmc_priv(mmc); 50420ea26a1SKishon Vijay Abraham I struct sdhci_pltfm_host *pltfm_host; 50520ea26a1SKishon Vijay Abraham I struct sdhci_omap_host *omap_host; 50620ea26a1SKishon Vijay Abraham I u32 ier = host->ier; 50720ea26a1SKishon Vijay Abraham I 50820ea26a1SKishon Vijay Abraham I pltfm_host = sdhci_priv(host); 50920ea26a1SKishon Vijay Abraham I omap_host = sdhci_pltfm_priv(pltfm_host); 51020ea26a1SKishon Vijay Abraham I 51120ea26a1SKishon Vijay Abraham I reg = sdhci_omap_readl(omap_host, SDHCI_OMAP_CON); 51220ea26a1SKishon Vijay Abraham I ac12 = sdhci_omap_readl(omap_host, SDHCI_OMAP_AC12); 51320ea26a1SKishon Vijay Abraham I reg &= ~CON_CLKEXTFREE; 51420ea26a1SKishon Vijay Abraham I if (ac12 & AC12_V1V8_SIGEN) 51520ea26a1SKishon Vijay Abraham I reg |= CON_CLKEXTFREE; 51620ea26a1SKishon Vijay Abraham I reg |= CON_PADEN; 51720ea26a1SKishon Vijay Abraham I sdhci_omap_writel(omap_host, SDHCI_OMAP_CON, reg); 51820ea26a1SKishon Vijay Abraham I 51920ea26a1SKishon Vijay Abraham I disable_irq(host->irq); 52020ea26a1SKishon Vijay Abraham I ier |= SDHCI_INT_CARD_INT; 52120ea26a1SKishon Vijay Abraham I sdhci_writel(host, ier, SDHCI_INT_ENABLE); 52220ea26a1SKishon Vijay Abraham I sdhci_writel(host, ier, SDHCI_SIGNAL_ENABLE); 52320ea26a1SKishon Vijay Abraham I 52420ea26a1SKishon Vijay Abraham I /* 52520ea26a1SKishon Vijay Abraham I * Delay is required for PSTATE to correctly reflect 52620ea26a1SKishon Vijay Abraham I * DLEV/CLEV values after PADEN is set. 52720ea26a1SKishon Vijay Abraham I */ 52820ea26a1SKishon Vijay Abraham I usleep_range(50, 100); 52920ea26a1SKishon Vijay Abraham I reg = sdhci_omap_readl(omap_host, SDHCI_OMAP_PSTATE); 53020ea26a1SKishon Vijay Abraham I if ((reg & PSTATE_DATI) || !(reg & PSTATE_DLEV_DAT0)) 53120ea26a1SKishon Vijay Abraham I ret = true; 53220ea26a1SKishon Vijay Abraham I 53320ea26a1SKishon Vijay Abraham I reg = sdhci_omap_readl(omap_host, SDHCI_OMAP_CON); 53420ea26a1SKishon Vijay Abraham I reg &= ~(CON_CLKEXTFREE | CON_PADEN); 53520ea26a1SKishon Vijay Abraham I sdhci_omap_writel(omap_host, SDHCI_OMAP_CON, reg); 53620ea26a1SKishon Vijay Abraham I 53720ea26a1SKishon Vijay Abraham I sdhci_writel(host, host->ier, SDHCI_INT_ENABLE); 53820ea26a1SKishon Vijay Abraham I sdhci_writel(host, host->ier, SDHCI_SIGNAL_ENABLE); 53920ea26a1SKishon Vijay Abraham I enable_irq(host->irq); 54020ea26a1SKishon Vijay Abraham I 54120ea26a1SKishon Vijay Abraham I return ret; 54220ea26a1SKishon Vijay Abraham I } 54320ea26a1SKishon Vijay Abraham I 5447d326930SKishon Vijay Abraham I static int sdhci_omap_start_signal_voltage_switch(struct mmc_host *mmc, 5457d326930SKishon Vijay Abraham I struct mmc_ios *ios) 5467d326930SKishon Vijay Abraham I { 5477d326930SKishon Vijay Abraham I u32 reg; 5487d326930SKishon Vijay Abraham I int ret; 5497d326930SKishon Vijay Abraham I unsigned int iov; 5507d326930SKishon Vijay Abraham I struct sdhci_host *host = mmc_priv(mmc); 5517d326930SKishon Vijay Abraham I struct sdhci_pltfm_host *pltfm_host; 5527d326930SKishon Vijay Abraham I struct sdhci_omap_host *omap_host; 5537d326930SKishon Vijay Abraham I struct device *dev; 5547d326930SKishon Vijay Abraham I 5557d326930SKishon Vijay Abraham I pltfm_host = sdhci_priv(host); 5567d326930SKishon Vijay Abraham I omap_host = sdhci_pltfm_priv(pltfm_host); 5577d326930SKishon Vijay Abraham I dev = omap_host->dev; 5587d326930SKishon Vijay Abraham I 5597d326930SKishon Vijay Abraham I if (ios->signal_voltage == MMC_SIGNAL_VOLTAGE_330) { 5607d326930SKishon Vijay Abraham I reg = sdhci_omap_readl(omap_host, SDHCI_OMAP_CAPA); 561de5ccd2aSTony Lindgren if (!(reg & (CAPA_VS30 | CAPA_VS33))) 5627d326930SKishon Vijay Abraham I return -EOPNOTSUPP; 5637d326930SKishon Vijay Abraham I 564de5ccd2aSTony Lindgren if (reg & CAPA_VS30) 565de5ccd2aSTony Lindgren iov = IOV_3V0; 566de5ccd2aSTony Lindgren else 567de5ccd2aSTony Lindgren iov = IOV_3V3; 568de5ccd2aSTony Lindgren 5697d326930SKishon Vijay Abraham I sdhci_omap_conf_bus_power(omap_host, ios->signal_voltage); 5707d326930SKishon Vijay Abraham I 5717d326930SKishon Vijay Abraham I reg = sdhci_omap_readl(omap_host, SDHCI_OMAP_AC12); 5727d326930SKishon Vijay Abraham I reg &= ~AC12_V1V8_SIGEN; 5737d326930SKishon Vijay Abraham I sdhci_omap_writel(omap_host, SDHCI_OMAP_AC12, reg); 5747d326930SKishon Vijay Abraham I 5757d326930SKishon Vijay Abraham I } else if (ios->signal_voltage == MMC_SIGNAL_VOLTAGE_180) { 5767d326930SKishon Vijay Abraham I reg = sdhci_omap_readl(omap_host, SDHCI_OMAP_CAPA); 5777d326930SKishon Vijay Abraham I if (!(reg & CAPA_VS18)) 5787d326930SKishon Vijay Abraham I return -EOPNOTSUPP; 5797d326930SKishon Vijay Abraham I 580de5ccd2aSTony Lindgren iov = IOV_1V8; 581de5ccd2aSTony Lindgren 5827d326930SKishon Vijay Abraham I sdhci_omap_conf_bus_power(omap_host, ios->signal_voltage); 5837d326930SKishon Vijay Abraham I 5847d326930SKishon Vijay Abraham I reg = sdhci_omap_readl(omap_host, SDHCI_OMAP_AC12); 5857d326930SKishon Vijay Abraham I reg |= AC12_V1V8_SIGEN; 5867d326930SKishon Vijay Abraham I sdhci_omap_writel(omap_host, SDHCI_OMAP_AC12, reg); 5877d326930SKishon Vijay Abraham I } else { 5887d326930SKishon Vijay Abraham I return -EOPNOTSUPP; 5897d326930SKishon Vijay Abraham I } 5907d326930SKishon Vijay Abraham I 5917d326930SKishon Vijay Abraham I ret = sdhci_omap_enable_iov(omap_host, iov); 5927d326930SKishon Vijay Abraham I if (ret) { 5937d326930SKishon Vijay Abraham I dev_err(dev, "failed to switch IO voltage to %dmV\n", iov); 5947d326930SKishon Vijay Abraham I return ret; 5957d326930SKishon Vijay Abraham I } 5967d326930SKishon Vijay Abraham I 5977d326930SKishon Vijay Abraham I dev_dbg(dev, "IO voltage switched to %dmV\n", iov); 5987d326930SKishon Vijay Abraham I return 0; 5997d326930SKishon Vijay Abraham I } 6007d326930SKishon Vijay Abraham I 6018d20b2eaSKishon Vijay Abraham I static void sdhci_omap_set_timing(struct sdhci_omap_host *omap_host, u8 timing) 6028d20b2eaSKishon Vijay Abraham I { 6038d20b2eaSKishon Vijay Abraham I int ret; 6048d20b2eaSKishon Vijay Abraham I struct pinctrl_state *pinctrl_state; 6058d20b2eaSKishon Vijay Abraham I struct device *dev = omap_host->dev; 6068d20b2eaSKishon Vijay Abraham I 6078d20b2eaSKishon Vijay Abraham I if (!(omap_host->flags & SDHCI_OMAP_REQUIRE_IODELAY)) 6088d20b2eaSKishon Vijay Abraham I return; 6098d20b2eaSKishon Vijay Abraham I 6108d20b2eaSKishon Vijay Abraham I if (omap_host->timing == timing) 6118d20b2eaSKishon Vijay Abraham I return; 6128d20b2eaSKishon Vijay Abraham I 6138d20b2eaSKishon Vijay Abraham I sdhci_omap_stop_clock(omap_host); 6148d20b2eaSKishon Vijay Abraham I 6158d20b2eaSKishon Vijay Abraham I pinctrl_state = omap_host->pinctrl_state[timing]; 6168d20b2eaSKishon Vijay Abraham I ret = pinctrl_select_state(omap_host->pinctrl, pinctrl_state); 6178d20b2eaSKishon Vijay Abraham I if (ret) { 6188d20b2eaSKishon Vijay Abraham I dev_err(dev, "failed to select pinctrl state\n"); 6198d20b2eaSKishon Vijay Abraham I return; 6208d20b2eaSKishon Vijay Abraham I } 6218d20b2eaSKishon Vijay Abraham I 6228d20b2eaSKishon Vijay Abraham I sdhci_omap_start_clock(omap_host); 6238d20b2eaSKishon Vijay Abraham I omap_host->timing = timing; 6248d20b2eaSKishon Vijay Abraham I } 6258d20b2eaSKishon Vijay Abraham I 626300df508SKishon Vijay Abraham I static void sdhci_omap_set_power_mode(struct sdhci_omap_host *omap_host, 627300df508SKishon Vijay Abraham I u8 power_mode) 628300df508SKishon Vijay Abraham I { 6299fc2cd76SKishon Vijay Abraham I if (omap_host->bus_mode == MMC_POWER_OFF) 6309fc2cd76SKishon Vijay Abraham I sdhci_omap_disable_tuning(omap_host); 631300df508SKishon Vijay Abraham I omap_host->power_mode = power_mode; 632300df508SKishon Vijay Abraham I } 633300df508SKishon Vijay Abraham I 6347d326930SKishon Vijay Abraham I static void sdhci_omap_set_bus_mode(struct sdhci_omap_host *omap_host, 6357d326930SKishon Vijay Abraham I unsigned int mode) 6367d326930SKishon Vijay Abraham I { 6377d326930SKishon Vijay Abraham I u32 reg; 6387d326930SKishon Vijay Abraham I 6397d326930SKishon Vijay Abraham I if (omap_host->bus_mode == mode) 6407d326930SKishon Vijay Abraham I return; 6417d326930SKishon Vijay Abraham I 6427d326930SKishon Vijay Abraham I reg = sdhci_omap_readl(omap_host, SDHCI_OMAP_CON); 6437d326930SKishon Vijay Abraham I if (mode == MMC_BUSMODE_OPENDRAIN) 6447d326930SKishon Vijay Abraham I reg |= CON_OD; 6457d326930SKishon Vijay Abraham I else 6467d326930SKishon Vijay Abraham I reg &= ~CON_OD; 6477d326930SKishon Vijay Abraham I sdhci_omap_writel(omap_host, SDHCI_OMAP_CON, reg); 6487d326930SKishon Vijay Abraham I 6497d326930SKishon Vijay Abraham I omap_host->bus_mode = mode; 6507d326930SKishon Vijay Abraham I } 6517d326930SKishon Vijay Abraham I 652ddde0e7dSColin Ian King static void sdhci_omap_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) 6537d326930SKishon Vijay Abraham I { 6547d326930SKishon Vijay Abraham I struct sdhci_host *host = mmc_priv(mmc); 6557d326930SKishon Vijay Abraham I struct sdhci_pltfm_host *pltfm_host; 6567d326930SKishon Vijay Abraham I struct sdhci_omap_host *omap_host; 6577d326930SKishon Vijay Abraham I 6587d326930SKishon Vijay Abraham I pltfm_host = sdhci_priv(host); 6597d326930SKishon Vijay Abraham I omap_host = sdhci_pltfm_priv(pltfm_host); 6607d326930SKishon Vijay Abraham I 6617d326930SKishon Vijay Abraham I sdhci_omap_set_bus_mode(omap_host, ios->bus_mode); 6628d20b2eaSKishon Vijay Abraham I sdhci_omap_set_timing(omap_host, ios->timing); 6637d326930SKishon Vijay Abraham I sdhci_set_ios(mmc, ios); 664300df508SKishon Vijay Abraham I sdhci_omap_set_power_mode(omap_host, ios->power_mode); 6657d326930SKishon Vijay Abraham I } 6667d326930SKishon Vijay Abraham I 6677d326930SKishon Vijay Abraham I static u16 sdhci_omap_calc_divisor(struct sdhci_pltfm_host *host, 6687d326930SKishon Vijay Abraham I unsigned int clock) 6697d326930SKishon Vijay Abraham I { 6707d326930SKishon Vijay Abraham I u16 dsor; 6717d326930SKishon Vijay Abraham I 6727d326930SKishon Vijay Abraham I dsor = DIV_ROUND_UP(clk_get_rate(host->clk), clock); 6737d326930SKishon Vijay Abraham I if (dsor > SYSCTL_CLKD_MAX) 6747d326930SKishon Vijay Abraham I dsor = SYSCTL_CLKD_MAX; 6757d326930SKishon Vijay Abraham I 6767d326930SKishon Vijay Abraham I return dsor; 6777d326930SKishon Vijay Abraham I } 6787d326930SKishon Vijay Abraham I 6797d326930SKishon Vijay Abraham I static void sdhci_omap_start_clock(struct sdhci_omap_host *omap_host) 6807d326930SKishon Vijay Abraham I { 6817d326930SKishon Vijay Abraham I u32 reg; 6827d326930SKishon Vijay Abraham I 6837d326930SKishon Vijay Abraham I reg = sdhci_omap_readl(omap_host, SDHCI_OMAP_SYSCTL); 6847d326930SKishon Vijay Abraham I reg |= SYSCTL_CEN; 6857d326930SKishon Vijay Abraham I sdhci_omap_writel(omap_host, SDHCI_OMAP_SYSCTL, reg); 6867d326930SKishon Vijay Abraham I } 6877d326930SKishon Vijay Abraham I 6887d326930SKishon Vijay Abraham I static void sdhci_omap_stop_clock(struct sdhci_omap_host *omap_host) 6897d326930SKishon Vijay Abraham I { 6907d326930SKishon Vijay Abraham I u32 reg; 6917d326930SKishon Vijay Abraham I 6927d326930SKishon Vijay Abraham I reg = sdhci_omap_readl(omap_host, SDHCI_OMAP_SYSCTL); 6937d326930SKishon Vijay Abraham I reg &= ~SYSCTL_CEN; 6947d326930SKishon Vijay Abraham I sdhci_omap_writel(omap_host, SDHCI_OMAP_SYSCTL, reg); 6957d326930SKishon Vijay Abraham I } 6967d326930SKishon Vijay Abraham I 6977d326930SKishon Vijay Abraham I static void sdhci_omap_set_clock(struct sdhci_host *host, unsigned int clock) 6987d326930SKishon Vijay Abraham I { 6997d326930SKishon Vijay Abraham I struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); 7007d326930SKishon Vijay Abraham I struct sdhci_omap_host *omap_host = sdhci_pltfm_priv(pltfm_host); 7017d326930SKishon Vijay Abraham I unsigned long clkdiv; 7027d326930SKishon Vijay Abraham I 7037d326930SKishon Vijay Abraham I sdhci_omap_stop_clock(omap_host); 7047d326930SKishon Vijay Abraham I 7057d326930SKishon Vijay Abraham I if (!clock) 7067d326930SKishon Vijay Abraham I return; 7077d326930SKishon Vijay Abraham I 7087d326930SKishon Vijay Abraham I clkdiv = sdhci_omap_calc_divisor(pltfm_host, clock); 7097d326930SKishon Vijay Abraham I clkdiv = (clkdiv & SYSCTL_CLKD_MASK) << SYSCTL_CLKD_SHIFT; 7107d326930SKishon Vijay Abraham I sdhci_enable_clk(host, clkdiv); 7117d326930SKishon Vijay Abraham I 7127d326930SKishon Vijay Abraham I sdhci_omap_start_clock(omap_host); 7137d326930SKishon Vijay Abraham I } 7147d326930SKishon Vijay Abraham I 715ddde0e7dSColin Ian King static void sdhci_omap_set_power(struct sdhci_host *host, unsigned char mode, 7167d326930SKishon Vijay Abraham I unsigned short vdd) 7177d326930SKishon Vijay Abraham I { 7187d326930SKishon Vijay Abraham I struct mmc_host *mmc = host->mmc; 7197d326930SKishon Vijay Abraham I 7208e0e7bd3STony Lindgren if (!IS_ERR(mmc->supply.vmmc)) 7217d326930SKishon Vijay Abraham I mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, vdd); 7227d326930SKishon Vijay Abraham I } 7237d326930SKishon Vijay Abraham I 724c66e21fdSTony Lindgren /* 725c66e21fdSTony Lindgren * MMCHS_HL_HWINFO has the MADMA_EN bit set if the controller instance 726c66e21fdSTony Lindgren * is connected to L3 interconnect and is bus master capable. Note that 727c66e21fdSTony Lindgren * the MMCHS_HL_HWINFO register is in the module registers before the 728c66e21fdSTony Lindgren * omap registers and sdhci registers. The offset can vary for omap 729c66e21fdSTony Lindgren * registers depending on the SoC. Do not use sdhci_omap_readl() here. 730c66e21fdSTony Lindgren */ 731c66e21fdSTony Lindgren static bool sdhci_omap_has_adma(struct sdhci_omap_host *omap_host, int offset) 732c66e21fdSTony Lindgren { 733c66e21fdSTony Lindgren /* MMCHS_HL_HWINFO register is only available on omap4 and later */ 734c66e21fdSTony Lindgren if (offset < 0x200) 735c66e21fdSTony Lindgren return false; 736c66e21fdSTony Lindgren 737c66e21fdSTony Lindgren return readl(omap_host->base + 4) & 1; 738c66e21fdSTony Lindgren } 739c66e21fdSTony Lindgren 7407d326930SKishon Vijay Abraham I static int sdhci_omap_enable_dma(struct sdhci_host *host) 7417d326930SKishon Vijay Abraham I { 7427d326930SKishon Vijay Abraham I u32 reg; 7437d326930SKishon Vijay Abraham I struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); 7447d326930SKishon Vijay Abraham I struct sdhci_omap_host *omap_host = sdhci_pltfm_priv(pltfm_host); 7457d326930SKishon Vijay Abraham I 7467d326930SKishon Vijay Abraham I reg = sdhci_omap_readl(omap_host, SDHCI_OMAP_CON); 747195fadb7SChunyan Zhang reg &= ~CON_DMA_MASTER; 748195fadb7SChunyan Zhang /* Switch to DMA slave mode when using external DMA */ 749195fadb7SChunyan Zhang if (!host->use_external_dma) 7507d326930SKishon Vijay Abraham I reg |= CON_DMA_MASTER; 751195fadb7SChunyan Zhang 7527d326930SKishon Vijay Abraham I sdhci_omap_writel(omap_host, SDHCI_OMAP_CON, reg); 7537d326930SKishon Vijay Abraham I 7547d326930SKishon Vijay Abraham I return 0; 7557d326930SKishon Vijay Abraham I } 7567d326930SKishon Vijay Abraham I 757ddde0e7dSColin Ian King static unsigned int sdhci_omap_get_min_clock(struct sdhci_host *host) 7587d326930SKishon Vijay Abraham I { 7597d326930SKishon Vijay Abraham I struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); 7607d326930SKishon Vijay Abraham I 7617d326930SKishon Vijay Abraham I return clk_get_rate(pltfm_host->clk) / SYSCTL_CLKD_MAX; 7627d326930SKishon Vijay Abraham I } 7637d326930SKishon Vijay Abraham I 7647d326930SKishon Vijay Abraham I static void sdhci_omap_set_bus_width(struct sdhci_host *host, int width) 7657d326930SKishon Vijay Abraham I { 7667d326930SKishon Vijay Abraham I struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); 7677d326930SKishon Vijay Abraham I struct sdhci_omap_host *omap_host = sdhci_pltfm_priv(pltfm_host); 7687d326930SKishon Vijay Abraham I u32 reg; 7697d326930SKishon Vijay Abraham I 7707d326930SKishon Vijay Abraham I reg = sdhci_omap_readl(omap_host, SDHCI_OMAP_CON); 7717d326930SKishon Vijay Abraham I if (width == MMC_BUS_WIDTH_8) 7727d326930SKishon Vijay Abraham I reg |= CON_DW8; 7737d326930SKishon Vijay Abraham I else 7747d326930SKishon Vijay Abraham I reg &= ~CON_DW8; 7757d326930SKishon Vijay Abraham I sdhci_omap_writel(omap_host, SDHCI_OMAP_CON, reg); 7767d326930SKishon Vijay Abraham I 7777d326930SKishon Vijay Abraham I sdhci_set_bus_width(host, width); 7787d326930SKishon Vijay Abraham I } 7797d326930SKishon Vijay Abraham I 7807d326930SKishon Vijay Abraham I static void sdhci_omap_init_74_clocks(struct sdhci_host *host, u8 power_mode) 7817d326930SKishon Vijay Abraham I { 7827d326930SKishon Vijay Abraham I u32 reg; 7837d326930SKishon Vijay Abraham I ktime_t timeout; 7847d326930SKishon Vijay Abraham I struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); 7857d326930SKishon Vijay Abraham I struct sdhci_omap_host *omap_host = sdhci_pltfm_priv(pltfm_host); 7867d326930SKishon Vijay Abraham I 7877d326930SKishon Vijay Abraham I if (omap_host->power_mode == power_mode) 7887d326930SKishon Vijay Abraham I return; 7897d326930SKishon Vijay Abraham I 7907d326930SKishon Vijay Abraham I if (power_mode != MMC_POWER_ON) 7917d326930SKishon Vijay Abraham I return; 7927d326930SKishon Vijay Abraham I 7937d326930SKishon Vijay Abraham I disable_irq(host->irq); 7947d326930SKishon Vijay Abraham I 7957d326930SKishon Vijay Abraham I reg = sdhci_omap_readl(omap_host, SDHCI_OMAP_CON); 7967d326930SKishon Vijay Abraham I reg |= CON_INIT; 7977d326930SKishon Vijay Abraham I sdhci_omap_writel(omap_host, SDHCI_OMAP_CON, reg); 7987d326930SKishon Vijay Abraham I sdhci_omap_writel(omap_host, SDHCI_OMAP_CMD, 0x0); 7997d326930SKishon Vijay Abraham I 8007d326930SKishon Vijay Abraham I /* wait 1ms */ 8017d326930SKishon Vijay Abraham I timeout = ktime_add_ms(ktime_get(), SDHCI_OMAP_TIMEOUT); 8029f0ea0bdSAdrian Hunter while (1) { 8039f0ea0bdSAdrian Hunter bool timedout = ktime_after(ktime_get(), timeout); 8049f0ea0bdSAdrian Hunter 8059f0ea0bdSAdrian Hunter if (sdhci_omap_readl(omap_host, SDHCI_OMAP_STAT) & INT_CC_EN) 8069f0ea0bdSAdrian Hunter break; 8079f0ea0bdSAdrian Hunter if (WARN_ON(timedout)) 8087d326930SKishon Vijay Abraham I return; 8097d326930SKishon Vijay Abraham I usleep_range(5, 10); 8107d326930SKishon Vijay Abraham I } 8117d326930SKishon Vijay Abraham I 8127d326930SKishon Vijay Abraham I reg = sdhci_omap_readl(omap_host, SDHCI_OMAP_CON); 8137d326930SKishon Vijay Abraham I reg &= ~CON_INIT; 8147d326930SKishon Vijay Abraham I sdhci_omap_writel(omap_host, SDHCI_OMAP_CON, reg); 8157d326930SKishon Vijay Abraham I sdhci_omap_writel(omap_host, SDHCI_OMAP_STAT, INT_CC_EN); 8167d326930SKishon Vijay Abraham I 8177d326930SKishon Vijay Abraham I enable_irq(host->irq); 8187d326930SKishon Vijay Abraham I } 8197d326930SKishon Vijay Abraham I 82027ceb7e0SKishon Vijay Abraham I static void sdhci_omap_set_uhs_signaling(struct sdhci_host *host, 82127ceb7e0SKishon Vijay Abraham I unsigned int timing) 82227ceb7e0SKishon Vijay Abraham I { 82327ceb7e0SKishon Vijay Abraham I u32 reg; 82427ceb7e0SKishon Vijay Abraham I struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); 82527ceb7e0SKishon Vijay Abraham I struct sdhci_omap_host *omap_host = sdhci_pltfm_priv(pltfm_host); 82627ceb7e0SKishon Vijay Abraham I 82727ceb7e0SKishon Vijay Abraham I sdhci_omap_stop_clock(omap_host); 82827ceb7e0SKishon Vijay Abraham I 82927ceb7e0SKishon Vijay Abraham I reg = sdhci_omap_readl(omap_host, SDHCI_OMAP_CON); 83027ceb7e0SKishon Vijay Abraham I if (timing == MMC_TIMING_UHS_DDR50 || timing == MMC_TIMING_MMC_DDR52) 83127ceb7e0SKishon Vijay Abraham I reg |= CON_DDR; 83227ceb7e0SKishon Vijay Abraham I else 83327ceb7e0SKishon Vijay Abraham I reg &= ~CON_DDR; 83427ceb7e0SKishon Vijay Abraham I sdhci_omap_writel(omap_host, SDHCI_OMAP_CON, reg); 83527ceb7e0SKishon Vijay Abraham I 83627ceb7e0SKishon Vijay Abraham I sdhci_set_uhs_signaling(host, timing); 83727ceb7e0SKishon Vijay Abraham I sdhci_omap_start_clock(omap_host); 83827ceb7e0SKishon Vijay Abraham I } 83927ceb7e0SKishon Vijay Abraham I 8409e84a2e6SFaiz Abbas #define MMC_TIMEOUT_US 20000 /* 20000 micro Sec */ 8412198eeffSYueHaibing static void sdhci_omap_reset(struct sdhci_host *host, u8 mask) 8425b0d6210SFaiz Abbas { 8435b0d6210SFaiz Abbas struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); 8445b0d6210SFaiz Abbas struct sdhci_omap_host *omap_host = sdhci_pltfm_priv(pltfm_host); 8459e84a2e6SFaiz Abbas unsigned long limit = MMC_TIMEOUT_US; 8469e84a2e6SFaiz Abbas unsigned long i = 0; 84753f9460eSTony Lindgren u32 sysc; 84853f9460eSTony Lindgren 84953f9460eSTony Lindgren /* Save target module sysconfig configured by SoC PM layer */ 85053f9460eSTony Lindgren if (mask & SDHCI_RESET_ALL) 85153f9460eSTony Lindgren sysc = sdhci_omap_readl(omap_host, SDHCI_OMAP_SYSCONFIG); 8525b0d6210SFaiz Abbas 8535b0d6210SFaiz Abbas /* Don't reset data lines during tuning operation */ 8545b0d6210SFaiz Abbas if (omap_host->is_tuning) 8555b0d6210SFaiz Abbas mask &= ~SDHCI_RESET_DATA; 8565b0d6210SFaiz Abbas 8579e84a2e6SFaiz Abbas if (omap_host->flags & SDHCI_OMAP_SPECIAL_RESET) { 8589e84a2e6SFaiz Abbas sdhci_writeb(host, mask, SDHCI_SOFTWARE_RESET); 8599e84a2e6SFaiz Abbas while ((!(sdhci_readb(host, SDHCI_SOFTWARE_RESET) & mask)) && 8609e84a2e6SFaiz Abbas (i++ < limit)) 8619e84a2e6SFaiz Abbas udelay(1); 8629e84a2e6SFaiz Abbas i = 0; 8639e84a2e6SFaiz Abbas while ((sdhci_readb(host, SDHCI_SOFTWARE_RESET) & mask) && 8649e84a2e6SFaiz Abbas (i++ < limit)) 8659e84a2e6SFaiz Abbas udelay(1); 8669e84a2e6SFaiz Abbas 8679e84a2e6SFaiz Abbas if (sdhci_readb(host, SDHCI_SOFTWARE_RESET) & mask) 8689e84a2e6SFaiz Abbas dev_err(mmc_dev(host->mmc), 8699e84a2e6SFaiz Abbas "Timeout waiting on controller reset in %s\n", 8709e84a2e6SFaiz Abbas __func__); 87153f9460eSTony Lindgren 87253f9460eSTony Lindgren goto restore_sysc; 8739e84a2e6SFaiz Abbas } 8749e84a2e6SFaiz Abbas 8755b0d6210SFaiz Abbas sdhci_reset(host, mask); 87653f9460eSTony Lindgren 87753f9460eSTony Lindgren restore_sysc: 87853f9460eSTony Lindgren if (mask & SDHCI_RESET_ALL) 87953f9460eSTony Lindgren sdhci_omap_writel(omap_host, SDHCI_OMAP_SYSCONFIG, sysc); 8805b0d6210SFaiz Abbas } 8815b0d6210SFaiz Abbas 8825c41ea6dSFaiz Abbas #define CMD_ERR_MASK (SDHCI_INT_CRC | SDHCI_INT_END_BIT | SDHCI_INT_INDEX |\ 8835c41ea6dSFaiz Abbas SDHCI_INT_TIMEOUT) 8845c41ea6dSFaiz Abbas #define CMD_MASK (CMD_ERR_MASK | SDHCI_INT_RESPONSE) 8855c41ea6dSFaiz Abbas 8865c41ea6dSFaiz Abbas static u32 sdhci_omap_irq(struct sdhci_host *host, u32 intmask) 8875c41ea6dSFaiz Abbas { 8885c41ea6dSFaiz Abbas struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); 8895c41ea6dSFaiz Abbas struct sdhci_omap_host *omap_host = sdhci_pltfm_priv(pltfm_host); 8905c41ea6dSFaiz Abbas 8915c41ea6dSFaiz Abbas if (omap_host->is_tuning && host->cmd && !host->data_early && 8925c41ea6dSFaiz Abbas (intmask & CMD_ERR_MASK)) { 8935c41ea6dSFaiz Abbas 8945c41ea6dSFaiz Abbas /* 8955c41ea6dSFaiz Abbas * Since we are not resetting data lines during tuning 8965c41ea6dSFaiz Abbas * operation, data error or data complete interrupts 8975c41ea6dSFaiz Abbas * might still arrive. Mark this request as a failure 8985c41ea6dSFaiz Abbas * but still wait for the data interrupt 8995c41ea6dSFaiz Abbas */ 9005c41ea6dSFaiz Abbas if (intmask & SDHCI_INT_TIMEOUT) 9015c41ea6dSFaiz Abbas host->cmd->error = -ETIMEDOUT; 9025c41ea6dSFaiz Abbas else 9035c41ea6dSFaiz Abbas host->cmd->error = -EILSEQ; 9045c41ea6dSFaiz Abbas 9055c41ea6dSFaiz Abbas host->cmd = NULL; 9065c41ea6dSFaiz Abbas 9075c41ea6dSFaiz Abbas /* 9085c41ea6dSFaiz Abbas * Sometimes command error interrupts and command complete 9095c41ea6dSFaiz Abbas * interrupt will arrive together. Clear all command related 9105c41ea6dSFaiz Abbas * interrupts here. 9115c41ea6dSFaiz Abbas */ 9125c41ea6dSFaiz Abbas sdhci_writel(host, intmask & CMD_MASK, SDHCI_INT_STATUS); 9135c41ea6dSFaiz Abbas intmask &= ~CMD_MASK; 9145c41ea6dSFaiz Abbas } 9155c41ea6dSFaiz Abbas 9165c41ea6dSFaiz Abbas return intmask; 9175c41ea6dSFaiz Abbas } 9185c41ea6dSFaiz Abbas 9195da5e494SFaiz Abbas static void sdhci_omap_set_timeout(struct sdhci_host *host, 9205da5e494SFaiz Abbas struct mmc_command *cmd) 9215da5e494SFaiz Abbas { 9225da5e494SFaiz Abbas if (cmd->opcode == MMC_ERASE) 9235da5e494SFaiz Abbas sdhci_set_data_timeout_irq(host, false); 9245da5e494SFaiz Abbas 9255da5e494SFaiz Abbas __sdhci_set_timeout(host, cmd); 9265da5e494SFaiz Abbas } 9275da5e494SFaiz Abbas 9287d326930SKishon Vijay Abraham I static struct sdhci_ops sdhci_omap_ops = { 9297d326930SKishon Vijay Abraham I .set_clock = sdhci_omap_set_clock, 9307d326930SKishon Vijay Abraham I .set_power = sdhci_omap_set_power, 9317d326930SKishon Vijay Abraham I .enable_dma = sdhci_omap_enable_dma, 9327d326930SKishon Vijay Abraham I .get_max_clock = sdhci_pltfm_clk_get_max_clock, 9337d326930SKishon Vijay Abraham I .get_min_clock = sdhci_omap_get_min_clock, 9347d326930SKishon Vijay Abraham I .set_bus_width = sdhci_omap_set_bus_width, 9357d326930SKishon Vijay Abraham I .platform_send_init_74_clocks = sdhci_omap_init_74_clocks, 9365b0d6210SFaiz Abbas .reset = sdhci_omap_reset, 93727ceb7e0SKishon Vijay Abraham I .set_uhs_signaling = sdhci_omap_set_uhs_signaling, 9385c41ea6dSFaiz Abbas .irq = sdhci_omap_irq, 9395da5e494SFaiz Abbas .set_timeout = sdhci_omap_set_timeout, 9407d326930SKishon Vijay Abraham I }; 9417d326930SKishon Vijay Abraham I 942de5ccd2aSTony Lindgren static unsigned int sdhci_omap_regulator_get_caps(struct device *dev, 943de5ccd2aSTony Lindgren const char *name) 9447d326930SKishon Vijay Abraham I { 945de5ccd2aSTony Lindgren struct regulator *reg; 946de5ccd2aSTony Lindgren unsigned int caps = 0; 9477d326930SKishon Vijay Abraham I 948de5ccd2aSTony Lindgren reg = regulator_get(dev, name); 949de5ccd2aSTony Lindgren if (IS_ERR(reg)) 950de5ccd2aSTony Lindgren return ~0U; 951de5ccd2aSTony Lindgren 952de5ccd2aSTony Lindgren if (regulator_is_supported_voltage(reg, 1700000, 1950000)) 953de5ccd2aSTony Lindgren caps |= SDHCI_CAN_VDD_180; 954de5ccd2aSTony Lindgren if (regulator_is_supported_voltage(reg, 2700000, 3150000)) 955de5ccd2aSTony Lindgren caps |= SDHCI_CAN_VDD_300; 956de5ccd2aSTony Lindgren if (regulator_is_supported_voltage(reg, 3150000, 3600000)) 957de5ccd2aSTony Lindgren caps |= SDHCI_CAN_VDD_330; 958de5ccd2aSTony Lindgren 959de5ccd2aSTony Lindgren regulator_put(reg); 960de5ccd2aSTony Lindgren 961de5ccd2aSTony Lindgren return caps; 9627d326930SKishon Vijay Abraham I } 9637d326930SKishon Vijay Abraham I 964de5ccd2aSTony Lindgren static int sdhci_omap_set_capabilities(struct sdhci_host *host) 965de5ccd2aSTony Lindgren { 966de5ccd2aSTony Lindgren struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); 967de5ccd2aSTony Lindgren struct sdhci_omap_host *omap_host = sdhci_pltfm_priv(pltfm_host); 968de5ccd2aSTony Lindgren struct device *dev = omap_host->dev; 969de5ccd2aSTony Lindgren const u32 mask = SDHCI_CAN_VDD_180 | SDHCI_CAN_VDD_300 | SDHCI_CAN_VDD_330; 970de5ccd2aSTony Lindgren unsigned int pbias, vqmmc, caps = 0; 971de5ccd2aSTony Lindgren u32 reg; 972de5ccd2aSTony Lindgren 973de5ccd2aSTony Lindgren pbias = sdhci_omap_regulator_get_caps(dev, "pbias"); 974de5ccd2aSTony Lindgren vqmmc = sdhci_omap_regulator_get_caps(dev, "vqmmc"); 975de5ccd2aSTony Lindgren caps = pbias & vqmmc; 976de5ccd2aSTony Lindgren 977de5ccd2aSTony Lindgren if (pbias != ~0U && vqmmc == ~0U) 978de5ccd2aSTony Lindgren dev_warn(dev, "vqmmc regulator missing for pbias\n"); 979de5ccd2aSTony Lindgren else if (caps == ~0U) 980de5ccd2aSTony Lindgren return 0; 981de5ccd2aSTony Lindgren 982de5ccd2aSTony Lindgren /* 983de5ccd2aSTony Lindgren * Quirk handling to allow 3.0V vqmmc with a valid 3.3V PBIAS. This is 984de5ccd2aSTony Lindgren * needed for 3.0V ldo9_reg on omap5 at least. 985de5ccd2aSTony Lindgren */ 986de5ccd2aSTony Lindgren if (pbias != ~0U && (pbias & SDHCI_CAN_VDD_330) && 987de5ccd2aSTony Lindgren (vqmmc & SDHCI_CAN_VDD_300)) 988de5ccd2aSTony Lindgren caps |= SDHCI_CAN_VDD_330; 989de5ccd2aSTony Lindgren 9907d326930SKishon Vijay Abraham I /* voltage capabilities might be set by boot loader, clear it */ 9917d326930SKishon Vijay Abraham I reg = sdhci_omap_readl(omap_host, SDHCI_OMAP_CAPA); 9927d326930SKishon Vijay Abraham I reg &= ~(CAPA_VS18 | CAPA_VS30 | CAPA_VS33); 9937d326930SKishon Vijay Abraham I 994de5ccd2aSTony Lindgren if (caps & SDHCI_CAN_VDD_180) 9957d326930SKishon Vijay Abraham I reg |= CAPA_VS18; 9967d326930SKishon Vijay Abraham I 997de5ccd2aSTony Lindgren if (caps & SDHCI_CAN_VDD_300) 998de5ccd2aSTony Lindgren reg |= CAPA_VS30; 999de5ccd2aSTony Lindgren 1000de5ccd2aSTony Lindgren if (caps & SDHCI_CAN_VDD_330) 1001de5ccd2aSTony Lindgren reg |= CAPA_VS33; 1002de5ccd2aSTony Lindgren 10037d326930SKishon Vijay Abraham I sdhci_omap_writel(omap_host, SDHCI_OMAP_CAPA, reg); 10047d326930SKishon Vijay Abraham I 1005de5ccd2aSTony Lindgren host->caps &= ~mask; 1006de5ccd2aSTony Lindgren host->caps |= caps; 10077d326930SKishon Vijay Abraham I 1008de5ccd2aSTony Lindgren return 0; 10097d326930SKishon Vijay Abraham I } 10107d326930SKishon Vijay Abraham I 10117d326930SKishon Vijay Abraham I static const struct sdhci_pltfm_data sdhci_omap_pdata = { 10127d326930SKishon Vijay Abraham I .quirks = SDHCI_QUIRK_BROKEN_CARD_DETECTION | 10137d326930SKishon Vijay Abraham I SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK | 10147d326930SKishon Vijay Abraham I SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN | 10157d326930SKishon Vijay Abraham I SDHCI_QUIRK_NO_HISPD_BIT | 10167d326930SKishon Vijay Abraham I SDHCI_QUIRK_BROKEN_ADMA_ZEROLEN_DESC, 1017e0b2dbcfSKishon Vijay Abraham I .quirks2 = SDHCI_QUIRK2_ACMD23_BROKEN | 1018e0b2dbcfSKishon Vijay Abraham I SDHCI_QUIRK2_PRESET_VALUE_BROKEN | 101925f80d86SKishon Vijay Abraham I SDHCI_QUIRK2_RSP_136_HAS_CRC | 102025f80d86SKishon Vijay Abraham I SDHCI_QUIRK2_DISABLE_HW_TIMEOUT, 10217d326930SKishon Vijay Abraham I .ops = &sdhci_omap_ops, 10227d326930SKishon Vijay Abraham I }; 10237d326930SKishon Vijay Abraham I 102442b380b6STony Lindgren static const struct sdhci_omap_data omap2430_data = { 102542b380b6STony Lindgren .omap_offset = 0, 102642b380b6STony Lindgren .offset = 0x100, 102742b380b6STony Lindgren }; 102842b380b6STony Lindgren 102942b380b6STony Lindgren static const struct sdhci_omap_data omap3_data = { 103042b380b6STony Lindgren .omap_offset = 0, 103142b380b6STony Lindgren .offset = 0x100, 103242b380b6STony Lindgren }; 103342b380b6STony Lindgren 1034de5ccd2aSTony Lindgren static const struct sdhci_omap_data omap4_data = { 103542b380b6STony Lindgren .omap_offset = 0x100, 1036de5ccd2aSTony Lindgren .offset = 0x200, 1037de5ccd2aSTony Lindgren .flags = SDHCI_OMAP_SPECIAL_RESET, 1038de5ccd2aSTony Lindgren }; 1039de5ccd2aSTony Lindgren 1040de5ccd2aSTony Lindgren static const struct sdhci_omap_data omap5_data = { 104142b380b6STony Lindgren .omap_offset = 0x100, 1042de5ccd2aSTony Lindgren .offset = 0x200, 1043de5ccd2aSTony Lindgren .flags = SDHCI_OMAP_SPECIAL_RESET, 1044de5ccd2aSTony Lindgren }; 1045de5ccd2aSTony Lindgren 10466d75df75SKishon Vijay Abraham I static const struct sdhci_omap_data k2g_data = { 104742b380b6STony Lindgren .omap_offset = 0x100, 10486d75df75SKishon Vijay Abraham I .offset = 0x200, 10496d75df75SKishon Vijay Abraham I }; 10506d75df75SKishon Vijay Abraham I 1051d6fe4928SFaiz Abbas static const struct sdhci_omap_data am335_data = { 105242b380b6STony Lindgren .omap_offset = 0x100, 1053d6fe4928SFaiz Abbas .offset = 0x200, 10549e84a2e6SFaiz Abbas .flags = SDHCI_OMAP_SPECIAL_RESET, 1055d6fe4928SFaiz Abbas }; 1056d6fe4928SFaiz Abbas 1057d6fe4928SFaiz Abbas static const struct sdhci_omap_data am437_data = { 105842b380b6STony Lindgren .omap_offset = 0x100, 1059d6fe4928SFaiz Abbas .offset = 0x200, 10609e84a2e6SFaiz Abbas .flags = SDHCI_OMAP_SPECIAL_RESET, 1061d6fe4928SFaiz Abbas }; 1062d6fe4928SFaiz Abbas 10637d326930SKishon Vijay Abraham I static const struct sdhci_omap_data dra7_data = { 106442b380b6STony Lindgren .omap_offset = 0x100, 10657d326930SKishon Vijay Abraham I .offset = 0x200, 10668d20b2eaSKishon Vijay Abraham I .flags = SDHCI_OMAP_REQUIRE_IODELAY, 10677d326930SKishon Vijay Abraham I }; 10687d326930SKishon Vijay Abraham I 10697d326930SKishon Vijay Abraham I static const struct of_device_id omap_sdhci_match[] = { 107042b380b6STony Lindgren { .compatible = "ti,omap2430-sdhci", .data = &omap2430_data }, 107142b380b6STony Lindgren { .compatible = "ti,omap3-sdhci", .data = &omap3_data }, 1072de5ccd2aSTony Lindgren { .compatible = "ti,omap4-sdhci", .data = &omap4_data }, 1073de5ccd2aSTony Lindgren { .compatible = "ti,omap5-sdhci", .data = &omap5_data }, 10747d326930SKishon Vijay Abraham I { .compatible = "ti,dra7-sdhci", .data = &dra7_data }, 10756d75df75SKishon Vijay Abraham I { .compatible = "ti,k2g-sdhci", .data = &k2g_data }, 1076d6fe4928SFaiz Abbas { .compatible = "ti,am335-sdhci", .data = &am335_data }, 1077d6fe4928SFaiz Abbas { .compatible = "ti,am437-sdhci", .data = &am437_data }, 10787d326930SKishon Vijay Abraham I {}, 10797d326930SKishon Vijay Abraham I }; 10807d326930SKishon Vijay Abraham I MODULE_DEVICE_TABLE(of, omap_sdhci_match); 10817d326930SKishon Vijay Abraham I 10828d20b2eaSKishon Vijay Abraham I static struct pinctrl_state 10838d20b2eaSKishon Vijay Abraham I *sdhci_omap_iodelay_pinctrl_state(struct sdhci_omap_host *omap_host, char *mode, 10848d20b2eaSKishon Vijay Abraham I u32 *caps, u32 capmask) 10858d20b2eaSKishon Vijay Abraham I { 10868d20b2eaSKishon Vijay Abraham I struct device *dev = omap_host->dev; 1087212f4f8aSKishon Vijay Abraham I char *version = omap_host->version; 10888d20b2eaSKishon Vijay Abraham I struct pinctrl_state *pinctrl_state = ERR_PTR(-ENODEV); 1089212f4f8aSKishon Vijay Abraham I char str[20]; 10908d20b2eaSKishon Vijay Abraham I 10918d20b2eaSKishon Vijay Abraham I if (!(*caps & capmask)) 10928d20b2eaSKishon Vijay Abraham I goto ret; 10938d20b2eaSKishon Vijay Abraham I 1094212f4f8aSKishon Vijay Abraham I if (version) { 1095212f4f8aSKishon Vijay Abraham I snprintf(str, 20, "%s-%s", mode, version); 1096212f4f8aSKishon Vijay Abraham I pinctrl_state = pinctrl_lookup_state(omap_host->pinctrl, str); 1097212f4f8aSKishon Vijay Abraham I } 1098212f4f8aSKishon Vijay Abraham I 1099212f4f8aSKishon Vijay Abraham I if (IS_ERR(pinctrl_state)) 11008d20b2eaSKishon Vijay Abraham I pinctrl_state = pinctrl_lookup_state(omap_host->pinctrl, mode); 1101212f4f8aSKishon Vijay Abraham I 11028d20b2eaSKishon Vijay Abraham I if (IS_ERR(pinctrl_state)) { 11038d20b2eaSKishon Vijay Abraham I dev_err(dev, "no pinctrl state for %s mode", mode); 11048d20b2eaSKishon Vijay Abraham I *caps &= ~capmask; 11058d20b2eaSKishon Vijay Abraham I } 11068d20b2eaSKishon Vijay Abraham I 11078d20b2eaSKishon Vijay Abraham I ret: 11088d20b2eaSKishon Vijay Abraham I return pinctrl_state; 11098d20b2eaSKishon Vijay Abraham I } 11108d20b2eaSKishon Vijay Abraham I 11118d20b2eaSKishon Vijay Abraham I static int sdhci_omap_config_iodelay_pinctrl_state(struct sdhci_omap_host 11128d20b2eaSKishon Vijay Abraham I *omap_host) 11138d20b2eaSKishon Vijay Abraham I { 11148d20b2eaSKishon Vijay Abraham I struct device *dev = omap_host->dev; 11158d20b2eaSKishon Vijay Abraham I struct sdhci_host *host = omap_host->host; 11168d20b2eaSKishon Vijay Abraham I struct mmc_host *mmc = host->mmc; 11178d20b2eaSKishon Vijay Abraham I u32 *caps = &mmc->caps; 11188d20b2eaSKishon Vijay Abraham I u32 *caps2 = &mmc->caps2; 11198d20b2eaSKishon Vijay Abraham I struct pinctrl_state *state; 11208d20b2eaSKishon Vijay Abraham I struct pinctrl_state **pinctrl_state; 11218d20b2eaSKishon Vijay Abraham I 11228d20b2eaSKishon Vijay Abraham I if (!(omap_host->flags & SDHCI_OMAP_REQUIRE_IODELAY)) 11238d20b2eaSKishon Vijay Abraham I return 0; 11248d20b2eaSKishon Vijay Abraham I 1125a86854d0SKees Cook pinctrl_state = devm_kcalloc(dev, 1126a86854d0SKees Cook MMC_TIMING_MMC_HS200 + 1, 1127a86854d0SKees Cook sizeof(*pinctrl_state), 1128a86854d0SKees Cook GFP_KERNEL); 11298d20b2eaSKishon Vijay Abraham I if (!pinctrl_state) 11308d20b2eaSKishon Vijay Abraham I return -ENOMEM; 11318d20b2eaSKishon Vijay Abraham I 11328d20b2eaSKishon Vijay Abraham I omap_host->pinctrl = devm_pinctrl_get(omap_host->dev); 11338d20b2eaSKishon Vijay Abraham I if (IS_ERR(omap_host->pinctrl)) { 11348d20b2eaSKishon Vijay Abraham I dev_err(dev, "Cannot get pinctrl\n"); 11358d20b2eaSKishon Vijay Abraham I return PTR_ERR(omap_host->pinctrl); 11368d20b2eaSKishon Vijay Abraham I } 11378d20b2eaSKishon Vijay Abraham I 11388d20b2eaSKishon Vijay Abraham I state = pinctrl_lookup_state(omap_host->pinctrl, "default"); 11398d20b2eaSKishon Vijay Abraham I if (IS_ERR(state)) { 11408d20b2eaSKishon Vijay Abraham I dev_err(dev, "no pinctrl state for default mode\n"); 11418d20b2eaSKishon Vijay Abraham I return PTR_ERR(state); 11428d20b2eaSKishon Vijay Abraham I } 11438d20b2eaSKishon Vijay Abraham I pinctrl_state[MMC_TIMING_LEGACY] = state; 11448d20b2eaSKishon Vijay Abraham I 11458d20b2eaSKishon Vijay Abraham I state = sdhci_omap_iodelay_pinctrl_state(omap_host, "sdr104", caps, 11468d20b2eaSKishon Vijay Abraham I MMC_CAP_UHS_SDR104); 11478d20b2eaSKishon Vijay Abraham I if (!IS_ERR(state)) 11488d20b2eaSKishon Vijay Abraham I pinctrl_state[MMC_TIMING_UHS_SDR104] = state; 11498d20b2eaSKishon Vijay Abraham I 11508d20b2eaSKishon Vijay Abraham I state = sdhci_omap_iodelay_pinctrl_state(omap_host, "ddr50", caps, 11518d20b2eaSKishon Vijay Abraham I MMC_CAP_UHS_DDR50); 11528d20b2eaSKishon Vijay Abraham I if (!IS_ERR(state)) 11538d20b2eaSKishon Vijay Abraham I pinctrl_state[MMC_TIMING_UHS_DDR50] = state; 11548d20b2eaSKishon Vijay Abraham I 11558d20b2eaSKishon Vijay Abraham I state = sdhci_omap_iodelay_pinctrl_state(omap_host, "sdr50", caps, 11568d20b2eaSKishon Vijay Abraham I MMC_CAP_UHS_SDR50); 11578d20b2eaSKishon Vijay Abraham I if (!IS_ERR(state)) 11588d20b2eaSKishon Vijay Abraham I pinctrl_state[MMC_TIMING_UHS_SDR50] = state; 11598d20b2eaSKishon Vijay Abraham I 11608d20b2eaSKishon Vijay Abraham I state = sdhci_omap_iodelay_pinctrl_state(omap_host, "sdr25", caps, 11618d20b2eaSKishon Vijay Abraham I MMC_CAP_UHS_SDR25); 11628d20b2eaSKishon Vijay Abraham I if (!IS_ERR(state)) 11638d20b2eaSKishon Vijay Abraham I pinctrl_state[MMC_TIMING_UHS_SDR25] = state; 11648d20b2eaSKishon Vijay Abraham I 11658d20b2eaSKishon Vijay Abraham I state = sdhci_omap_iodelay_pinctrl_state(omap_host, "sdr12", caps, 11668d20b2eaSKishon Vijay Abraham I MMC_CAP_UHS_SDR12); 11678d20b2eaSKishon Vijay Abraham I if (!IS_ERR(state)) 11688d20b2eaSKishon Vijay Abraham I pinctrl_state[MMC_TIMING_UHS_SDR12] = state; 11698d20b2eaSKishon Vijay Abraham I 11708d20b2eaSKishon Vijay Abraham I state = sdhci_omap_iodelay_pinctrl_state(omap_host, "ddr_1_8v", caps, 11718d20b2eaSKishon Vijay Abraham I MMC_CAP_1_8V_DDR); 11723f402878SKishon Vijay Abraham I if (!IS_ERR(state)) { 11733f402878SKishon Vijay Abraham I pinctrl_state[MMC_TIMING_MMC_DDR52] = state; 11743f402878SKishon Vijay Abraham I } else { 11753f402878SKishon Vijay Abraham I state = sdhci_omap_iodelay_pinctrl_state(omap_host, "ddr_3_3v", 11763f402878SKishon Vijay Abraham I caps, 11773f402878SKishon Vijay Abraham I MMC_CAP_3_3V_DDR); 11788d20b2eaSKishon Vijay Abraham I if (!IS_ERR(state)) 11798d20b2eaSKishon Vijay Abraham I pinctrl_state[MMC_TIMING_MMC_DDR52] = state; 11803f402878SKishon Vijay Abraham I } 11818d20b2eaSKishon Vijay Abraham I 11828d20b2eaSKishon Vijay Abraham I state = sdhci_omap_iodelay_pinctrl_state(omap_host, "hs", caps, 11838d20b2eaSKishon Vijay Abraham I MMC_CAP_SD_HIGHSPEED); 11848d20b2eaSKishon Vijay Abraham I if (!IS_ERR(state)) 11858d20b2eaSKishon Vijay Abraham I pinctrl_state[MMC_TIMING_SD_HS] = state; 11868d20b2eaSKishon Vijay Abraham I 11878d20b2eaSKishon Vijay Abraham I state = sdhci_omap_iodelay_pinctrl_state(omap_host, "hs", caps, 11888d20b2eaSKishon Vijay Abraham I MMC_CAP_MMC_HIGHSPEED); 11898d20b2eaSKishon Vijay Abraham I if (!IS_ERR(state)) 11908d20b2eaSKishon Vijay Abraham I pinctrl_state[MMC_TIMING_MMC_HS] = state; 11918d20b2eaSKishon Vijay Abraham I 11928d20b2eaSKishon Vijay Abraham I state = sdhci_omap_iodelay_pinctrl_state(omap_host, "hs200_1_8v", caps2, 11938d20b2eaSKishon Vijay Abraham I MMC_CAP2_HS200_1_8V_SDR); 11948d20b2eaSKishon Vijay Abraham I if (!IS_ERR(state)) 11958d20b2eaSKishon Vijay Abraham I pinctrl_state[MMC_TIMING_MMC_HS200] = state; 11968d20b2eaSKishon Vijay Abraham I 11978d20b2eaSKishon Vijay Abraham I omap_host->pinctrl_state = pinctrl_state; 11988d20b2eaSKishon Vijay Abraham I 11998d20b2eaSKishon Vijay Abraham I return 0; 12008d20b2eaSKishon Vijay Abraham I } 12018d20b2eaSKishon Vijay Abraham I 1202212f4f8aSKishon Vijay Abraham I static const struct soc_device_attribute sdhci_omap_soc_devices[] = { 1203212f4f8aSKishon Vijay Abraham I { 1204212f4f8aSKishon Vijay Abraham I .machine = "DRA7[45]*", 1205212f4f8aSKishon Vijay Abraham I .revision = "ES1.[01]", 1206212f4f8aSKishon Vijay Abraham I }, 1207212f4f8aSKishon Vijay Abraham I { 1208212f4f8aSKishon Vijay Abraham I /* sentinel */ 1209212f4f8aSKishon Vijay Abraham I } 1210212f4f8aSKishon Vijay Abraham I }; 1211212f4f8aSKishon Vijay Abraham I 12127d326930SKishon Vijay Abraham I static int sdhci_omap_probe(struct platform_device *pdev) 12137d326930SKishon Vijay Abraham I { 12147d326930SKishon Vijay Abraham I int ret; 12157d326930SKishon Vijay Abraham I u32 offset; 12167d326930SKishon Vijay Abraham I struct device *dev = &pdev->dev; 12177d326930SKishon Vijay Abraham I struct sdhci_host *host; 12187d326930SKishon Vijay Abraham I struct sdhci_pltfm_host *pltfm_host; 12197d326930SKishon Vijay Abraham I struct sdhci_omap_host *omap_host; 12207d326930SKishon Vijay Abraham I struct mmc_host *mmc; 1221897ae3feSBean Huo const struct sdhci_omap_data *data; 1222212f4f8aSKishon Vijay Abraham I const struct soc_device_attribute *soc; 1223195fadb7SChunyan Zhang struct resource *regs; 12247d326930SKishon Vijay Abraham I 1225897ae3feSBean Huo data = of_device_get_match_data(&pdev->dev); 12267d326930SKishon Vijay Abraham I if (!data) { 12277d326930SKishon Vijay Abraham I dev_err(dev, "no sdhci omap data\n"); 12287d326930SKishon Vijay Abraham I return -EINVAL; 12297d326930SKishon Vijay Abraham I } 12307d326930SKishon Vijay Abraham I offset = data->offset; 12317d326930SKishon Vijay Abraham I 1232195fadb7SChunyan Zhang regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); 1233195fadb7SChunyan Zhang if (!regs) 1234195fadb7SChunyan Zhang return -ENXIO; 1235195fadb7SChunyan Zhang 12367d326930SKishon Vijay Abraham I host = sdhci_pltfm_init(pdev, &sdhci_omap_pdata, 12377d326930SKishon Vijay Abraham I sizeof(*omap_host)); 12387d326930SKishon Vijay Abraham I if (IS_ERR(host)) { 12397d326930SKishon Vijay Abraham I dev_err(dev, "Failed sdhci_pltfm_init\n"); 12407d326930SKishon Vijay Abraham I return PTR_ERR(host); 12417d326930SKishon Vijay Abraham I } 12427d326930SKishon Vijay Abraham I 12437d326930SKishon Vijay Abraham I pltfm_host = sdhci_priv(host); 12447d326930SKishon Vijay Abraham I omap_host = sdhci_pltfm_priv(pltfm_host); 12457d326930SKishon Vijay Abraham I omap_host->host = host; 12467d326930SKishon Vijay Abraham I omap_host->base = host->ioaddr; 12477d326930SKishon Vijay Abraham I omap_host->dev = dev; 1248300df508SKishon Vijay Abraham I omap_host->power_mode = MMC_POWER_UNDEFINED; 12498d20b2eaSKishon Vijay Abraham I omap_host->timing = MMC_TIMING_LEGACY; 12508d20b2eaSKishon Vijay Abraham I omap_host->flags = data->flags; 125142b380b6STony Lindgren omap_host->omap_offset = data->omap_offset; 1252f433e8aaSTony Lindgren omap_host->con = -EINVAL; /* Prevent invalid restore on first resume */ 12537d326930SKishon Vijay Abraham I host->ioaddr += offset; 1254195fadb7SChunyan Zhang host->mapbase = regs->start + offset; 12557d326930SKishon Vijay Abraham I 12567d326930SKishon Vijay Abraham I mmc = host->mmc; 12571d3a2220SKishon Vijay Abraham I sdhci_get_of_property(pdev); 12587d326930SKishon Vijay Abraham I ret = mmc_of_parse(mmc); 12597d326930SKishon Vijay Abraham I if (ret) 12607d326930SKishon Vijay Abraham I goto err_pltfm_free; 12617d326930SKishon Vijay Abraham I 1262212f4f8aSKishon Vijay Abraham I soc = soc_device_match(sdhci_omap_soc_devices); 1263212f4f8aSKishon Vijay Abraham I if (soc) { 1264212f4f8aSKishon Vijay Abraham I omap_host->version = "rev11"; 1265212f4f8aSKishon Vijay Abraham I if (!strcmp(dev_name(dev), "4809c000.mmc")) 1266212f4f8aSKishon Vijay Abraham I mmc->f_max = 96000000; 1267212f4f8aSKishon Vijay Abraham I if (!strcmp(dev_name(dev), "480b4000.mmc")) 1268212f4f8aSKishon Vijay Abraham I mmc->f_max = 48000000; 1269212f4f8aSKishon Vijay Abraham I if (!strcmp(dev_name(dev), "480ad000.mmc")) 1270212f4f8aSKishon Vijay Abraham I mmc->f_max = 48000000; 1271212f4f8aSKishon Vijay Abraham I } 1272212f4f8aSKishon Vijay Abraham I 1273031d2cccSKishon Vijay Abraham I if (!mmc_can_gpio_ro(mmc)) 1274031d2cccSKishon Vijay Abraham I mmc->caps2 |= MMC_CAP2_NO_WRITE_PROTECT; 1275031d2cccSKishon Vijay Abraham I 12767d326930SKishon Vijay Abraham I pltfm_host->clk = devm_clk_get(dev, "fck"); 12777d326930SKishon Vijay Abraham I if (IS_ERR(pltfm_host->clk)) { 12787d326930SKishon Vijay Abraham I ret = PTR_ERR(pltfm_host->clk); 12797d326930SKishon Vijay Abraham I goto err_pltfm_free; 12807d326930SKishon Vijay Abraham I } 12817d326930SKishon Vijay Abraham I 12827d326930SKishon Vijay Abraham I ret = clk_set_rate(pltfm_host->clk, mmc->f_max); 12837d326930SKishon Vijay Abraham I if (ret) { 12847d326930SKishon Vijay Abraham I dev_err(dev, "failed to set clock to %d\n", mmc->f_max); 12857d326930SKishon Vijay Abraham I goto err_pltfm_free; 12867d326930SKishon Vijay Abraham I } 12877d326930SKishon Vijay Abraham I 12887d326930SKishon Vijay Abraham I omap_host->pbias = devm_regulator_get_optional(dev, "pbias"); 12897d326930SKishon Vijay Abraham I if (IS_ERR(omap_host->pbias)) { 12907d326930SKishon Vijay Abraham I ret = PTR_ERR(omap_host->pbias); 12917d326930SKishon Vijay Abraham I if (ret != -ENODEV) 12927d326930SKishon Vijay Abraham I goto err_pltfm_free; 12937d326930SKishon Vijay Abraham I dev_dbg(dev, "unable to get pbias regulator %d\n", ret); 12947d326930SKishon Vijay Abraham I } 12957d326930SKishon Vijay Abraham I omap_host->pbias_enabled = false; 12967d326930SKishon Vijay Abraham I 12977d326930SKishon Vijay Abraham I /* 12987d326930SKishon Vijay Abraham I * omap_device_pm_domain has callbacks to enable the main 12997d326930SKishon Vijay Abraham I * functional clock, interface clock and also configure the 130051189eb9STony Lindgren * SYSCONFIG register to clear any boot loader set voltage 130151189eb9STony Lindgren * capabilities before calling sdhci_setup_host(). The 130251189eb9STony Lindgren * callback will be invoked as part of pm_runtime_get_sync. 13037d326930SKishon Vijay Abraham I */ 1304f433e8aaSTony Lindgren pm_runtime_use_autosuspend(dev); 1305f433e8aaSTony Lindgren pm_runtime_set_autosuspend_delay(dev, 50); 13067d326930SKishon Vijay Abraham I pm_runtime_enable(dev); 1307809ae4e1STian Tao ret = pm_runtime_resume_and_get(dev); 1308809ae4e1STian Tao if (ret) { 13097d326930SKishon Vijay Abraham I dev_err(dev, "pm_runtime_get_sync failed\n"); 13107d326930SKishon Vijay Abraham I goto err_rpm_disable; 13117d326930SKishon Vijay Abraham I } 13127d326930SKishon Vijay Abraham I 1313de5ccd2aSTony Lindgren ret = sdhci_omap_set_capabilities(host); 13147d326930SKishon Vijay Abraham I if (ret) { 13157d326930SKishon Vijay Abraham I dev_err(dev, "failed to set system capabilities\n"); 1316f433e8aaSTony Lindgren goto err_rpm_put; 13177d326930SKishon Vijay Abraham I } 13187d326930SKishon Vijay Abraham I 13197d326930SKishon Vijay Abraham I host->mmc_host_ops.start_signal_voltage_switch = 13207d326930SKishon Vijay Abraham I sdhci_omap_start_signal_voltage_switch; 13217d326930SKishon Vijay Abraham I host->mmc_host_ops.set_ios = sdhci_omap_set_ios; 132220ea26a1SKishon Vijay Abraham I host->mmc_host_ops.card_busy = sdhci_omap_card_busy; 13239fc2cd76SKishon Vijay Abraham I host->mmc_host_ops.execute_tuning = sdhci_omap_execute_tuning; 1324efde12b2SKishon Vijay Abraham I host->mmc_host_ops.enable_sdio_irq = sdhci_omap_enable_sdio_irq; 13257d326930SKishon Vijay Abraham I 1326c66e21fdSTony Lindgren /* 1327c66e21fdSTony Lindgren * Switch to external DMA only if there is the "dmas" property and 1328c66e21fdSTony Lindgren * ADMA is not available on the controller instance. 1329c66e21fdSTony Lindgren */ 1330c66e21fdSTony Lindgren if (device_property_present(dev, "dmas") && 1331c66e21fdSTony Lindgren !sdhci_omap_has_adma(omap_host, offset)) 1332195fadb7SChunyan Zhang sdhci_switch_external_dma(host, true); 1333195fadb7SChunyan Zhang 13343781d288STony Lindgren if (device_property_read_bool(dev, "ti,non-removable")) { 13353781d288STony Lindgren dev_warn_once(dev, "using old ti,non-removable property\n"); 13363781d288STony Lindgren mmc->caps |= MMC_CAP_NONREMOVABLE; 13373781d288STony Lindgren } 13383781d288STony Lindgren 1339055e0483SUlf Hansson /* R1B responses is required to properly manage HW busy detection. */ 1340055e0483SUlf Hansson mmc->caps |= MMC_CAP_NEED_RSP_BUSY; 1341055e0483SUlf Hansson 13423edf588eSTony Lindgren /* Allow card power off and runtime PM for eMMC/SD card devices */ 13433edf588eSTony Lindgren mmc->caps |= MMC_CAP_POWER_OFF_CARD | MMC_CAP_AGGRESSIVE_PM; 13443edf588eSTony Lindgren 13450ec4ee3cSKishon Vijay Abraham I ret = sdhci_setup_host(host); 13467d326930SKishon Vijay Abraham I if (ret) 1347f433e8aaSTony Lindgren goto err_rpm_put; 13487d326930SKishon Vijay Abraham I 13490ec4ee3cSKishon Vijay Abraham I ret = sdhci_omap_config_iodelay_pinctrl_state(omap_host); 13500ec4ee3cSKishon Vijay Abraham I if (ret) 13510ec4ee3cSKishon Vijay Abraham I goto err_cleanup_host; 13520ec4ee3cSKishon Vijay Abraham I 13530ec4ee3cSKishon Vijay Abraham I ret = __sdhci_add_host(host); 13540ec4ee3cSKishon Vijay Abraham I if (ret) 13550ec4ee3cSKishon Vijay Abraham I goto err_cleanup_host; 13560ec4ee3cSKishon Vijay Abraham I 1357a1e97bd2STony Lindgren /* 1358a1e97bd2STony Lindgren * SDIO devices can use the dat1 pin as a wake-up interrupt. Some 1359a1e97bd2STony Lindgren * devices like wl1xxx, use an out-of-band GPIO interrupt instead. 1360a1e97bd2STony Lindgren */ 1361a1e97bd2STony Lindgren omap_host->wakeirq = of_irq_get_byname(dev->of_node, "wakeup"); 1362a1e97bd2STony Lindgren if (omap_host->wakeirq == -EPROBE_DEFER) { 1363a1e97bd2STony Lindgren ret = -EPROBE_DEFER; 1364a1e97bd2STony Lindgren goto err_cleanup_host; 1365a1e97bd2STony Lindgren } 1366a1e97bd2STony Lindgren if (omap_host->wakeirq > 0) { 1367a1e97bd2STony Lindgren device_init_wakeup(dev, true); 1368a1e97bd2STony Lindgren ret = dev_pm_set_dedicated_wake_irq(dev, omap_host->wakeirq); 1369a1e97bd2STony Lindgren if (ret) { 1370a1e97bd2STony Lindgren device_init_wakeup(dev, false); 1371a1e97bd2STony Lindgren goto err_cleanup_host; 1372a1e97bd2STony Lindgren } 1373a1e97bd2STony Lindgren host->mmc->pm_caps |= MMC_PM_KEEP_POWER | MMC_PM_WAKE_SDIO_IRQ; 1374a1e97bd2STony Lindgren } 1375a1e97bd2STony Lindgren 1376f433e8aaSTony Lindgren pm_runtime_mark_last_busy(dev); 1377f433e8aaSTony Lindgren pm_runtime_put_autosuspend(dev); 1378f433e8aaSTony Lindgren 13797d326930SKishon Vijay Abraham I return 0; 13807d326930SKishon Vijay Abraham I 13810ec4ee3cSKishon Vijay Abraham I err_cleanup_host: 13820ec4ee3cSKishon Vijay Abraham I sdhci_cleanup_host(host); 13830ec4ee3cSKishon Vijay Abraham I 1384f433e8aaSTony Lindgren err_rpm_put: 1385f433e8aaSTony Lindgren pm_runtime_mark_last_busy(dev); 1386f433e8aaSTony Lindgren pm_runtime_put_autosuspend(dev); 13877d326930SKishon Vijay Abraham I err_rpm_disable: 1388f433e8aaSTony Lindgren pm_runtime_dont_use_autosuspend(dev); 13897d326930SKishon Vijay Abraham I pm_runtime_disable(dev); 13907d326930SKishon Vijay Abraham I 13917d326930SKishon Vijay Abraham I err_pltfm_free: 13927d326930SKishon Vijay Abraham I sdhci_pltfm_free(pdev); 13937d326930SKishon Vijay Abraham I return ret; 13947d326930SKishon Vijay Abraham I } 13957d326930SKishon Vijay Abraham I 1396*b9c3ea46SYangtao Li static void sdhci_omap_remove(struct platform_device *pdev) 13977d326930SKishon Vijay Abraham I { 13987d326930SKishon Vijay Abraham I struct device *dev = &pdev->dev; 13997d326930SKishon Vijay Abraham I struct sdhci_host *host = platform_get_drvdata(pdev); 14007d326930SKishon Vijay Abraham I 1401f433e8aaSTony Lindgren pm_runtime_get_sync(dev); 14027d326930SKishon Vijay Abraham I sdhci_remove_host(host, true); 1403a1e97bd2STony Lindgren device_init_wakeup(dev, false); 1404a1e97bd2STony Lindgren dev_pm_clear_wake_irq(dev); 1405f433e8aaSTony Lindgren pm_runtime_dont_use_autosuspend(dev); 14067d326930SKishon Vijay Abraham I pm_runtime_put_sync(dev); 1407f433e8aaSTony Lindgren /* Ensure device gets disabled despite userspace sysfs config */ 1408f433e8aaSTony Lindgren pm_runtime_force_suspend(dev); 14097d326930SKishon Vijay Abraham I sdhci_pltfm_free(pdev); 14107d326930SKishon Vijay Abraham I } 1411f85a15c5STony Lindgren 1412f85a15c5STony Lindgren #ifdef CONFIG_PM 1413f85a15c5STony Lindgren static void __maybe_unused sdhci_omap_context_save(struct sdhci_omap_host *omap_host) 1414ee0f3092SFaiz Abbas { 1415ee0f3092SFaiz Abbas omap_host->con = sdhci_omap_readl(omap_host, SDHCI_OMAP_CON); 1416ee0f3092SFaiz Abbas omap_host->hctl = sdhci_omap_readl(omap_host, SDHCI_OMAP_HCTL); 1417d806e334STony Lindgren omap_host->sysctl = sdhci_omap_readl(omap_host, SDHCI_OMAP_SYSCTL); 1418ee0f3092SFaiz Abbas omap_host->capa = sdhci_omap_readl(omap_host, SDHCI_OMAP_CAPA); 1419d806e334STony Lindgren omap_host->ie = sdhci_omap_readl(omap_host, SDHCI_OMAP_IE); 1420d806e334STony Lindgren omap_host->ise = sdhci_omap_readl(omap_host, SDHCI_OMAP_ISE); 1421ee0f3092SFaiz Abbas } 1422ee0f3092SFaiz Abbas 1423d806e334STony Lindgren /* Order matters here, HCTL must be restored in two phases */ 1424f85a15c5STony Lindgren static void __maybe_unused sdhci_omap_context_restore(struct sdhci_omap_host *omap_host) 1425ee0f3092SFaiz Abbas { 1426ee0f3092SFaiz Abbas sdhci_omap_writel(omap_host, SDHCI_OMAP_HCTL, omap_host->hctl); 1427ee0f3092SFaiz Abbas sdhci_omap_writel(omap_host, SDHCI_OMAP_CAPA, omap_host->capa); 1428d806e334STony Lindgren sdhci_omap_writel(omap_host, SDHCI_OMAP_HCTL, omap_host->hctl); 1429d806e334STony Lindgren 1430d806e334STony Lindgren sdhci_omap_writel(omap_host, SDHCI_OMAP_SYSCTL, omap_host->sysctl); 1431d806e334STony Lindgren sdhci_omap_writel(omap_host, SDHCI_OMAP_CON, omap_host->con); 1432d806e334STony Lindgren sdhci_omap_writel(omap_host, SDHCI_OMAP_IE, omap_host->ie); 1433d806e334STony Lindgren sdhci_omap_writel(omap_host, SDHCI_OMAP_ISE, omap_host->ise); 1434ee0f3092SFaiz Abbas } 1435ee0f3092SFaiz Abbas 1436f433e8aaSTony Lindgren static int __maybe_unused sdhci_omap_runtime_suspend(struct device *dev) 1437ee0f3092SFaiz Abbas { 1438ee0f3092SFaiz Abbas struct sdhci_host *host = dev_get_drvdata(dev); 1439ee0f3092SFaiz Abbas struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); 1440ee0f3092SFaiz Abbas struct sdhci_omap_host *omap_host = sdhci_pltfm_priv(pltfm_host); 1441ee0f3092SFaiz Abbas 144251189eb9STony Lindgren if (omap_host->con != -EINVAL) 1443f433e8aaSTony Lindgren sdhci_runtime_suspend_host(host); 1444ee0f3092SFaiz Abbas 1445ee0f3092SFaiz Abbas sdhci_omap_context_save(omap_host); 1446ee0f3092SFaiz Abbas 1447ee0f3092SFaiz Abbas pinctrl_pm_select_idle_state(dev); 1448ee0f3092SFaiz Abbas 1449ee0f3092SFaiz Abbas return 0; 1450ee0f3092SFaiz Abbas } 1451ee0f3092SFaiz Abbas 1452f433e8aaSTony Lindgren static int __maybe_unused sdhci_omap_runtime_resume(struct device *dev) 1453ee0f3092SFaiz Abbas { 1454ee0f3092SFaiz Abbas struct sdhci_host *host = dev_get_drvdata(dev); 1455ee0f3092SFaiz Abbas struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); 1456ee0f3092SFaiz Abbas struct sdhci_omap_host *omap_host = sdhci_pltfm_priv(pltfm_host); 1457ee0f3092SFaiz Abbas 1458ee0f3092SFaiz Abbas pinctrl_pm_select_default_state(dev); 1459ee0f3092SFaiz Abbas 146051189eb9STony Lindgren if (omap_host->con != -EINVAL) { 1461ee0f3092SFaiz Abbas sdhci_omap_context_restore(omap_host); 1462f433e8aaSTony Lindgren sdhci_runtime_resume_host(host, 0); 146351189eb9STony Lindgren } 1464ee0f3092SFaiz Abbas 1465ee0f3092SFaiz Abbas return 0; 1466ee0f3092SFaiz Abbas } 1467ee0f3092SFaiz Abbas #endif 1468f433e8aaSTony Lindgren 1469f433e8aaSTony Lindgren static const struct dev_pm_ops sdhci_omap_dev_pm_ops = { 1470f433e8aaSTony Lindgren SET_RUNTIME_PM_OPS(sdhci_omap_runtime_suspend, 1471f433e8aaSTony Lindgren sdhci_omap_runtime_resume, NULL) 1472f433e8aaSTony Lindgren SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend, 1473f433e8aaSTony Lindgren pm_runtime_force_resume) 1474f433e8aaSTony Lindgren }; 14757d326930SKishon Vijay Abraham I 14767d326930SKishon Vijay Abraham I static struct platform_driver sdhci_omap_driver = { 14777d326930SKishon Vijay Abraham I .probe = sdhci_omap_probe, 1478*b9c3ea46SYangtao Li .remove_new = sdhci_omap_remove, 14797d326930SKishon Vijay Abraham I .driver = { 14807d326930SKishon Vijay Abraham I .name = "sdhci-omap", 1481a1a48919SDouglas Anderson .probe_type = PROBE_PREFER_ASYNCHRONOUS, 1482ee0f3092SFaiz Abbas .pm = &sdhci_omap_dev_pm_ops, 14837d326930SKishon Vijay Abraham I .of_match_table = omap_sdhci_match, 14847d326930SKishon Vijay Abraham I }, 14857d326930SKishon Vijay Abraham I }; 14867d326930SKishon Vijay Abraham I 14877d326930SKishon Vijay Abraham I module_platform_driver(sdhci_omap_driver); 14887d326930SKishon Vijay Abraham I 14897d326930SKishon Vijay Abraham I MODULE_DESCRIPTION("SDHCI driver for OMAP SoCs"); 14907d326930SKishon Vijay Abraham I MODULE_AUTHOR("Texas Instruments Inc."); 14917d326930SKishon Vijay Abraham I MODULE_LICENSE("GPL v2"); 14927d326930SKishon Vijay Abraham I MODULE_ALIAS("platform:sdhci_omap"); 1493