16b1baefeSThomas Gleixner // SPDX-License-Identifier: GPL-2.0-only 27d326930SKishon Vijay Abraham I /** 37d326930SKishon Vijay Abraham I * SDHCI Controller driver for TI's OMAP SoCs 47d326930SKishon Vijay Abraham I * 57d326930SKishon Vijay Abraham I * Copyright (C) 2017 Texas Instruments 67d326930SKishon Vijay Abraham I * Author: Kishon Vijay Abraham I <kishon@ti.com> 77d326930SKishon Vijay Abraham I */ 87d326930SKishon Vijay Abraham I 97d326930SKishon Vijay Abraham I #include <linux/delay.h> 105da5e494SFaiz Abbas #include <linux/mmc/mmc.h> 117d326930SKishon Vijay Abraham I #include <linux/mmc/slot-gpio.h> 127d326930SKishon Vijay Abraham I #include <linux/module.h> 137d326930SKishon Vijay Abraham I #include <linux/of.h> 147d326930SKishon Vijay Abraham I #include <linux/of_device.h> 157d326930SKishon Vijay Abraham I #include <linux/platform_device.h> 167d326930SKishon Vijay Abraham I #include <linux/pm_runtime.h> 177d326930SKishon Vijay Abraham I #include <linux/regulator/consumer.h> 188d20b2eaSKishon Vijay Abraham I #include <linux/pinctrl/consumer.h> 19212f4f8aSKishon Vijay Abraham I #include <linux/sys_soc.h> 20961de0a8SFaiz Abbas #include <linux/thermal.h> 217d326930SKishon Vijay Abraham I 227d326930SKishon Vijay Abraham I #include "sdhci-pltfm.h" 237d326930SKishon Vijay Abraham I 247d326930SKishon Vijay Abraham I #define SDHCI_OMAP_CON 0x12c 257d326930SKishon Vijay Abraham I #define CON_DW8 BIT(5) 267d326930SKishon Vijay Abraham I #define CON_DMA_MASTER BIT(20) 2727ceb7e0SKishon Vijay Abraham I #define CON_DDR BIT(19) 2820ea26a1SKishon Vijay Abraham I #define CON_CLKEXTFREE BIT(16) 2920ea26a1SKishon Vijay Abraham I #define CON_PADEN BIT(15) 30efde12b2SKishon Vijay Abraham I #define CON_CTPL BIT(11) 317d326930SKishon Vijay Abraham I #define CON_INIT BIT(1) 327d326930SKishon Vijay Abraham I #define CON_OD BIT(0) 337d326930SKishon Vijay Abraham I 349fc2cd76SKishon Vijay Abraham I #define SDHCI_OMAP_DLL 0x0134 359fc2cd76SKishon Vijay Abraham I #define DLL_SWT BIT(20) 369fc2cd76SKishon Vijay Abraham I #define DLL_FORCE_SR_C_SHIFT 13 379fc2cd76SKishon Vijay Abraham I #define DLL_FORCE_SR_C_MASK (0x7f << DLL_FORCE_SR_C_SHIFT) 389fc2cd76SKishon Vijay Abraham I #define DLL_FORCE_VALUE BIT(12) 399fc2cd76SKishon Vijay Abraham I #define DLL_CALIB BIT(1) 409fc2cd76SKishon Vijay Abraham I 417d326930SKishon Vijay Abraham I #define SDHCI_OMAP_CMD 0x20c 427d326930SKishon Vijay Abraham I 4320ea26a1SKishon Vijay Abraham I #define SDHCI_OMAP_PSTATE 0x0224 4420ea26a1SKishon Vijay Abraham I #define PSTATE_DLEV_DAT0 BIT(20) 4520ea26a1SKishon Vijay Abraham I #define PSTATE_DATI BIT(1) 4620ea26a1SKishon Vijay Abraham I 477d326930SKishon Vijay Abraham I #define SDHCI_OMAP_HCTL 0x228 487d326930SKishon Vijay Abraham I #define HCTL_SDBP BIT(8) 497d326930SKishon Vijay Abraham I #define HCTL_SDVS_SHIFT 9 507d326930SKishon Vijay Abraham I #define HCTL_SDVS_MASK (0x7 << HCTL_SDVS_SHIFT) 517d326930SKishon Vijay Abraham I #define HCTL_SDVS_33 (0x7 << HCTL_SDVS_SHIFT) 527d326930SKishon Vijay Abraham I #define HCTL_SDVS_30 (0x6 << HCTL_SDVS_SHIFT) 537d326930SKishon Vijay Abraham I #define HCTL_SDVS_18 (0x5 << HCTL_SDVS_SHIFT) 547d326930SKishon Vijay Abraham I 557d326930SKishon Vijay Abraham I #define SDHCI_OMAP_SYSCTL 0x22c 567d326930SKishon Vijay Abraham I #define SYSCTL_CEN BIT(2) 577d326930SKishon Vijay Abraham I #define SYSCTL_CLKD_SHIFT 6 587d326930SKishon Vijay Abraham I #define SYSCTL_CLKD_MASK 0x3ff 597d326930SKishon Vijay Abraham I 607d326930SKishon Vijay Abraham I #define SDHCI_OMAP_STAT 0x230 617d326930SKishon Vijay Abraham I 627d326930SKishon Vijay Abraham I #define SDHCI_OMAP_IE 0x234 637d326930SKishon Vijay Abraham I #define INT_CC_EN BIT(0) 647d326930SKishon Vijay Abraham I 657d326930SKishon Vijay Abraham I #define SDHCI_OMAP_AC12 0x23c 667d326930SKishon Vijay Abraham I #define AC12_V1V8_SIGEN BIT(19) 679fc2cd76SKishon Vijay Abraham I #define AC12_SCLK_SEL BIT(23) 687d326930SKishon Vijay Abraham I 697d326930SKishon Vijay Abraham I #define SDHCI_OMAP_CAPA 0x240 707d326930SKishon Vijay Abraham I #define CAPA_VS33 BIT(24) 717d326930SKishon Vijay Abraham I #define CAPA_VS30 BIT(25) 727d326930SKishon Vijay Abraham I #define CAPA_VS18 BIT(26) 737d326930SKishon Vijay Abraham I 749fc2cd76SKishon Vijay Abraham I #define SDHCI_OMAP_CAPA2 0x0244 759fc2cd76SKishon Vijay Abraham I #define CAPA2_TSDR50 BIT(13) 769fc2cd76SKishon Vijay Abraham I 777d326930SKishon Vijay Abraham I #define SDHCI_OMAP_TIMEOUT 1 /* 1 msec */ 787d326930SKishon Vijay Abraham I 797d326930SKishon Vijay Abraham I #define SYSCTL_CLKD_MAX 0x3FF 807d326930SKishon Vijay Abraham I 817d326930SKishon Vijay Abraham I #define IOV_1V8 1800000 /* 180000 uV */ 827d326930SKishon Vijay Abraham I #define IOV_3V0 3000000 /* 300000 uV */ 837d326930SKishon Vijay Abraham I #define IOV_3V3 3300000 /* 330000 uV */ 847d326930SKishon Vijay Abraham I 859fc2cd76SKishon Vijay Abraham I #define MAX_PHASE_DELAY 0x7C 869fc2cd76SKishon Vijay Abraham I 878d20b2eaSKishon Vijay Abraham I /* sdhci-omap controller flags */ 888d20b2eaSKishon Vijay Abraham I #define SDHCI_OMAP_REQUIRE_IODELAY BIT(0) 899e84a2e6SFaiz Abbas #define SDHCI_OMAP_SPECIAL_RESET BIT(1) 908d20b2eaSKishon Vijay Abraham I 917d326930SKishon Vijay Abraham I struct sdhci_omap_data { 927d326930SKishon Vijay Abraham I u32 offset; 938d20b2eaSKishon Vijay Abraham I u8 flags; 947d326930SKishon Vijay Abraham I }; 957d326930SKishon Vijay Abraham I 967d326930SKishon Vijay Abraham I struct sdhci_omap_host { 97212f4f8aSKishon Vijay Abraham I char *version; 987d326930SKishon Vijay Abraham I void __iomem *base; 997d326930SKishon Vijay Abraham I struct device *dev; 1007d326930SKishon Vijay Abraham I struct regulator *pbias; 1017d326930SKishon Vijay Abraham I bool pbias_enabled; 1027d326930SKishon Vijay Abraham I struct sdhci_host *host; 1037d326930SKishon Vijay Abraham I u8 bus_mode; 1047d326930SKishon Vijay Abraham I u8 power_mode; 1058d20b2eaSKishon Vijay Abraham I u8 timing; 1068d20b2eaSKishon Vijay Abraham I u8 flags; 1078d20b2eaSKishon Vijay Abraham I 1088d20b2eaSKishon Vijay Abraham I struct pinctrl *pinctrl; 1098d20b2eaSKishon Vijay Abraham I struct pinctrl_state **pinctrl_state; 1105b0d6210SFaiz Abbas bool is_tuning; 111ee0f3092SFaiz Abbas /* Omap specific context save */ 112ee0f3092SFaiz Abbas u32 con; 113ee0f3092SFaiz Abbas u32 hctl; 114ee0f3092SFaiz Abbas u32 sysctl; 115ee0f3092SFaiz Abbas u32 capa; 1167d326930SKishon Vijay Abraham I }; 1177d326930SKishon Vijay Abraham I 1188d20b2eaSKishon Vijay Abraham I static void sdhci_omap_start_clock(struct sdhci_omap_host *omap_host); 1198d20b2eaSKishon Vijay Abraham I static void sdhci_omap_stop_clock(struct sdhci_omap_host *omap_host); 1208d20b2eaSKishon Vijay Abraham I 1217d326930SKishon Vijay Abraham I static inline u32 sdhci_omap_readl(struct sdhci_omap_host *host, 1227d326930SKishon Vijay Abraham I unsigned int offset) 1237d326930SKishon Vijay Abraham I { 1247d326930SKishon Vijay Abraham I return readl(host->base + offset); 1257d326930SKishon Vijay Abraham I } 1267d326930SKishon Vijay Abraham I 1277d326930SKishon Vijay Abraham I static inline void sdhci_omap_writel(struct sdhci_omap_host *host, 1287d326930SKishon Vijay Abraham I unsigned int offset, u32 data) 1297d326930SKishon Vijay Abraham I { 1307d326930SKishon Vijay Abraham I writel(data, host->base + offset); 1317d326930SKishon Vijay Abraham I } 1327d326930SKishon Vijay Abraham I 1337d326930SKishon Vijay Abraham I static int sdhci_omap_set_pbias(struct sdhci_omap_host *omap_host, 1347d326930SKishon Vijay Abraham I bool power_on, unsigned int iov) 1357d326930SKishon Vijay Abraham I { 1367d326930SKishon Vijay Abraham I int ret; 1377d326930SKishon Vijay Abraham I struct device *dev = omap_host->dev; 1387d326930SKishon Vijay Abraham I 1397d326930SKishon Vijay Abraham I if (IS_ERR(omap_host->pbias)) 1407d326930SKishon Vijay Abraham I return 0; 1417d326930SKishon Vijay Abraham I 1427d326930SKishon Vijay Abraham I if (power_on) { 1437d326930SKishon Vijay Abraham I ret = regulator_set_voltage(omap_host->pbias, iov, iov); 1447d326930SKishon Vijay Abraham I if (ret) { 1457d326930SKishon Vijay Abraham I dev_err(dev, "pbias set voltage failed\n"); 1467d326930SKishon Vijay Abraham I return ret; 1477d326930SKishon Vijay Abraham I } 1487d326930SKishon Vijay Abraham I 1497d326930SKishon Vijay Abraham I if (omap_host->pbias_enabled) 1507d326930SKishon Vijay Abraham I return 0; 1517d326930SKishon Vijay Abraham I 1527d326930SKishon Vijay Abraham I ret = regulator_enable(omap_host->pbias); 1537d326930SKishon Vijay Abraham I if (ret) { 1547d326930SKishon Vijay Abraham I dev_err(dev, "pbias reg enable fail\n"); 1557d326930SKishon Vijay Abraham I return ret; 1567d326930SKishon Vijay Abraham I } 1577d326930SKishon Vijay Abraham I 1587d326930SKishon Vijay Abraham I omap_host->pbias_enabled = true; 1597d326930SKishon Vijay Abraham I } else { 1607d326930SKishon Vijay Abraham I if (!omap_host->pbias_enabled) 1617d326930SKishon Vijay Abraham I return 0; 1627d326930SKishon Vijay Abraham I 1637d326930SKishon Vijay Abraham I ret = regulator_disable(omap_host->pbias); 1647d326930SKishon Vijay Abraham I if (ret) { 1657d326930SKishon Vijay Abraham I dev_err(dev, "pbias reg disable fail\n"); 1667d326930SKishon Vijay Abraham I return ret; 1677d326930SKishon Vijay Abraham I } 1687d326930SKishon Vijay Abraham I omap_host->pbias_enabled = false; 1697d326930SKishon Vijay Abraham I } 1707d326930SKishon Vijay Abraham I 1717d326930SKishon Vijay Abraham I return 0; 1727d326930SKishon Vijay Abraham I } 1737d326930SKishon Vijay Abraham I 1747d326930SKishon Vijay Abraham I static int sdhci_omap_enable_iov(struct sdhci_omap_host *omap_host, 1757d326930SKishon Vijay Abraham I unsigned int iov) 1767d326930SKishon Vijay Abraham I { 1777d326930SKishon Vijay Abraham I int ret; 1787d326930SKishon Vijay Abraham I struct sdhci_host *host = omap_host->host; 1797d326930SKishon Vijay Abraham I struct mmc_host *mmc = host->mmc; 1807d326930SKishon Vijay Abraham I 1817d326930SKishon Vijay Abraham I ret = sdhci_omap_set_pbias(omap_host, false, 0); 1827d326930SKishon Vijay Abraham I if (ret) 1837d326930SKishon Vijay Abraham I return ret; 1847d326930SKishon Vijay Abraham I 1857d326930SKishon Vijay Abraham I if (!IS_ERR(mmc->supply.vqmmc)) { 1867d326930SKishon Vijay Abraham I ret = regulator_set_voltage(mmc->supply.vqmmc, iov, iov); 1877d326930SKishon Vijay Abraham I if (ret) { 1887d326930SKishon Vijay Abraham I dev_err(mmc_dev(mmc), "vqmmc set voltage failed\n"); 1897d326930SKishon Vijay Abraham I return ret; 1907d326930SKishon Vijay Abraham I } 1917d326930SKishon Vijay Abraham I } 1927d326930SKishon Vijay Abraham I 1937d326930SKishon Vijay Abraham I ret = sdhci_omap_set_pbias(omap_host, true, iov); 1947d326930SKishon Vijay Abraham I if (ret) 1957d326930SKishon Vijay Abraham I return ret; 1967d326930SKishon Vijay Abraham I 1977d326930SKishon Vijay Abraham I return 0; 1987d326930SKishon Vijay Abraham I } 1997d326930SKishon Vijay Abraham I 2007d326930SKishon Vijay Abraham I static void sdhci_omap_conf_bus_power(struct sdhci_omap_host *omap_host, 2017d326930SKishon Vijay Abraham I unsigned char signal_voltage) 2027d326930SKishon Vijay Abraham I { 2037d326930SKishon Vijay Abraham I u32 reg; 2047d326930SKishon Vijay Abraham I ktime_t timeout; 2057d326930SKishon Vijay Abraham I 2067d326930SKishon Vijay Abraham I reg = sdhci_omap_readl(omap_host, SDHCI_OMAP_HCTL); 2077d326930SKishon Vijay Abraham I reg &= ~HCTL_SDVS_MASK; 2087d326930SKishon Vijay Abraham I 2097d326930SKishon Vijay Abraham I if (signal_voltage == MMC_SIGNAL_VOLTAGE_330) 2107d326930SKishon Vijay Abraham I reg |= HCTL_SDVS_33; 2117d326930SKishon Vijay Abraham I else 2127d326930SKishon Vijay Abraham I reg |= HCTL_SDVS_18; 2137d326930SKishon Vijay Abraham I 2147d326930SKishon Vijay Abraham I sdhci_omap_writel(omap_host, SDHCI_OMAP_HCTL, reg); 2157d326930SKishon Vijay Abraham I 2167d326930SKishon Vijay Abraham I reg |= HCTL_SDBP; 2177d326930SKishon Vijay Abraham I sdhci_omap_writel(omap_host, SDHCI_OMAP_HCTL, reg); 2187d326930SKishon Vijay Abraham I 2197d326930SKishon Vijay Abraham I /* wait 1ms */ 2207d326930SKishon Vijay Abraham I timeout = ktime_add_ms(ktime_get(), SDHCI_OMAP_TIMEOUT); 2219f0ea0bdSAdrian Hunter while (1) { 2229f0ea0bdSAdrian Hunter bool timedout = ktime_after(ktime_get(), timeout); 2239f0ea0bdSAdrian Hunter 2249f0ea0bdSAdrian Hunter if (sdhci_omap_readl(omap_host, SDHCI_OMAP_HCTL) & HCTL_SDBP) 2259f0ea0bdSAdrian Hunter break; 2269f0ea0bdSAdrian Hunter if (WARN_ON(timedout)) 2277d326930SKishon Vijay Abraham I return; 2287d326930SKishon Vijay Abraham I usleep_range(5, 10); 2297d326930SKishon Vijay Abraham I } 2307d326930SKishon Vijay Abraham I } 2317d326930SKishon Vijay Abraham I 232efde12b2SKishon Vijay Abraham I static void sdhci_omap_enable_sdio_irq(struct mmc_host *mmc, int enable) 233efde12b2SKishon Vijay Abraham I { 234efde12b2SKishon Vijay Abraham I struct sdhci_host *host = mmc_priv(mmc); 235efde12b2SKishon Vijay Abraham I struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); 236efde12b2SKishon Vijay Abraham I struct sdhci_omap_host *omap_host = sdhci_pltfm_priv(pltfm_host); 237efde12b2SKishon Vijay Abraham I u32 reg; 238efde12b2SKishon Vijay Abraham I 239efde12b2SKishon Vijay Abraham I reg = sdhci_omap_readl(omap_host, SDHCI_OMAP_CON); 240efde12b2SKishon Vijay Abraham I if (enable) 241efde12b2SKishon Vijay Abraham I reg |= (CON_CTPL | CON_CLKEXTFREE); 242efde12b2SKishon Vijay Abraham I else 243efde12b2SKishon Vijay Abraham I reg &= ~(CON_CTPL | CON_CLKEXTFREE); 244efde12b2SKishon Vijay Abraham I sdhci_omap_writel(omap_host, SDHCI_OMAP_CON, reg); 245efde12b2SKishon Vijay Abraham I 246efde12b2SKishon Vijay Abraham I sdhci_enable_sdio_irq(mmc, enable); 247efde12b2SKishon Vijay Abraham I } 248efde12b2SKishon Vijay Abraham I 2499fc2cd76SKishon Vijay Abraham I static inline void sdhci_omap_set_dll(struct sdhci_omap_host *omap_host, 2509fc2cd76SKishon Vijay Abraham I int count) 2519fc2cd76SKishon Vijay Abraham I { 2529fc2cd76SKishon Vijay Abraham I int i; 2539fc2cd76SKishon Vijay Abraham I u32 reg; 2549fc2cd76SKishon Vijay Abraham I 2559fc2cd76SKishon Vijay Abraham I reg = sdhci_omap_readl(omap_host, SDHCI_OMAP_DLL); 2569fc2cd76SKishon Vijay Abraham I reg |= DLL_FORCE_VALUE; 2579fc2cd76SKishon Vijay Abraham I reg &= ~DLL_FORCE_SR_C_MASK; 2589fc2cd76SKishon Vijay Abraham I reg |= (count << DLL_FORCE_SR_C_SHIFT); 2599fc2cd76SKishon Vijay Abraham I sdhci_omap_writel(omap_host, SDHCI_OMAP_DLL, reg); 2609fc2cd76SKishon Vijay Abraham I 2619fc2cd76SKishon Vijay Abraham I reg |= DLL_CALIB; 2629fc2cd76SKishon Vijay Abraham I sdhci_omap_writel(omap_host, SDHCI_OMAP_DLL, reg); 2639fc2cd76SKishon Vijay Abraham I for (i = 0; i < 1000; i++) { 2649fc2cd76SKishon Vijay Abraham I reg = sdhci_omap_readl(omap_host, SDHCI_OMAP_DLL); 2659fc2cd76SKishon Vijay Abraham I if (reg & DLL_CALIB) 2669fc2cd76SKishon Vijay Abraham I break; 2679fc2cd76SKishon Vijay Abraham I } 2689fc2cd76SKishon Vijay Abraham I reg &= ~DLL_CALIB; 2699fc2cd76SKishon Vijay Abraham I sdhci_omap_writel(omap_host, SDHCI_OMAP_DLL, reg); 2709fc2cd76SKishon Vijay Abraham I } 2719fc2cd76SKishon Vijay Abraham I 2729fc2cd76SKishon Vijay Abraham I static void sdhci_omap_disable_tuning(struct sdhci_omap_host *omap_host) 2739fc2cd76SKishon Vijay Abraham I { 2749fc2cd76SKishon Vijay Abraham I u32 reg; 2759fc2cd76SKishon Vijay Abraham I 2769fc2cd76SKishon Vijay Abraham I reg = sdhci_omap_readl(omap_host, SDHCI_OMAP_AC12); 2779fc2cd76SKishon Vijay Abraham I reg &= ~AC12_SCLK_SEL; 2789fc2cd76SKishon Vijay Abraham I sdhci_omap_writel(omap_host, SDHCI_OMAP_AC12, reg); 2799fc2cd76SKishon Vijay Abraham I 2809fc2cd76SKishon Vijay Abraham I reg = sdhci_omap_readl(omap_host, SDHCI_OMAP_DLL); 2819fc2cd76SKishon Vijay Abraham I reg &= ~(DLL_FORCE_VALUE | DLL_SWT); 2829fc2cd76SKishon Vijay Abraham I sdhci_omap_writel(omap_host, SDHCI_OMAP_DLL, reg); 2839fc2cd76SKishon Vijay Abraham I } 2849fc2cd76SKishon Vijay Abraham I 2859fc2cd76SKishon Vijay Abraham I static int sdhci_omap_execute_tuning(struct mmc_host *mmc, u32 opcode) 2869fc2cd76SKishon Vijay Abraham I { 2879fc2cd76SKishon Vijay Abraham I struct sdhci_host *host = mmc_priv(mmc); 2889fc2cd76SKishon Vijay Abraham I struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); 2899fc2cd76SKishon Vijay Abraham I struct sdhci_omap_host *omap_host = sdhci_pltfm_priv(pltfm_host); 290961de0a8SFaiz Abbas struct thermal_zone_device *thermal_dev; 2919fc2cd76SKishon Vijay Abraham I struct device *dev = omap_host->dev; 2929fc2cd76SKishon Vijay Abraham I struct mmc_ios *ios = &mmc->ios; 2939fc2cd76SKishon Vijay Abraham I u32 start_window = 0, max_window = 0; 294961de0a8SFaiz Abbas bool single_point_failure = false; 295db2039fcSFaiz Abbas bool dcrc_was_enabled = false; 2969fc2cd76SKishon Vijay Abraham I u8 cur_match, prev_match = 0; 2979fc2cd76SKishon Vijay Abraham I u32 length = 0, max_len = 0; 2989fc2cd76SKishon Vijay Abraham I u32 phase_delay = 0; 299961de0a8SFaiz Abbas int temperature; 3009fc2cd76SKishon Vijay Abraham I int ret = 0; 3019fc2cd76SKishon Vijay Abraham I u32 reg; 302961de0a8SFaiz Abbas int i; 3039fc2cd76SKishon Vijay Abraham I 3049fc2cd76SKishon Vijay Abraham I /* clock tuning is not needed for upto 52MHz */ 3059fc2cd76SKishon Vijay Abraham I if (ios->clock <= 52000000) 3069fc2cd76SKishon Vijay Abraham I return 0; 3079fc2cd76SKishon Vijay Abraham I 3089fc2cd76SKishon Vijay Abraham I reg = sdhci_omap_readl(omap_host, SDHCI_OMAP_CAPA2); 3099fc2cd76SKishon Vijay Abraham I if (ios->timing == MMC_TIMING_UHS_SDR50 && !(reg & CAPA2_TSDR50)) 3109fc2cd76SKishon Vijay Abraham I return 0; 3119fc2cd76SKishon Vijay Abraham I 312961de0a8SFaiz Abbas thermal_dev = thermal_zone_get_zone_by_name("cpu_thermal"); 313961de0a8SFaiz Abbas if (IS_ERR(thermal_dev)) { 314961de0a8SFaiz Abbas dev_err(dev, "Unable to get thermal zone for tuning\n"); 315961de0a8SFaiz Abbas return PTR_ERR(thermal_dev); 316961de0a8SFaiz Abbas } 317961de0a8SFaiz Abbas 318961de0a8SFaiz Abbas ret = thermal_zone_get_temp(thermal_dev, &temperature); 319961de0a8SFaiz Abbas if (ret) 320961de0a8SFaiz Abbas return ret; 321961de0a8SFaiz Abbas 3229fc2cd76SKishon Vijay Abraham I reg = sdhci_omap_readl(omap_host, SDHCI_OMAP_DLL); 3239fc2cd76SKishon Vijay Abraham I reg |= DLL_SWT; 3249fc2cd76SKishon Vijay Abraham I sdhci_omap_writel(omap_host, SDHCI_OMAP_DLL, reg); 3259fc2cd76SKishon Vijay Abraham I 3267d33c358SKishon Vijay Abraham I /* 3277d33c358SKishon Vijay Abraham I * OMAP5/DRA74X/DRA72x Errata i802: 3287d33c358SKishon Vijay Abraham I * DCRC error interrupts (MMCHS_STAT[21] DCRC=0x1) can occur 3297d33c358SKishon Vijay Abraham I * during the tuning procedure. So disable it during the 3307d33c358SKishon Vijay Abraham I * tuning procedure. 3317d33c358SKishon Vijay Abraham I */ 332db2039fcSFaiz Abbas if (host->ier & SDHCI_INT_DATA_CRC) { 333db2039fcSFaiz Abbas host->ier &= ~SDHCI_INT_DATA_CRC; 334db2039fcSFaiz Abbas dcrc_was_enabled = true; 335db2039fcSFaiz Abbas } 3367d33c358SKishon Vijay Abraham I 3375b0d6210SFaiz Abbas omap_host->is_tuning = true; 3385b0d6210SFaiz Abbas 339961de0a8SFaiz Abbas /* 340961de0a8SFaiz Abbas * Stage 1: Search for a maximum pass window ignoring any 341961de0a8SFaiz Abbas * any single point failures. If the tuning value ends up 342961de0a8SFaiz Abbas * near it, move away from it in stage 2 below 343961de0a8SFaiz Abbas */ 3449fc2cd76SKishon Vijay Abraham I while (phase_delay <= MAX_PHASE_DELAY) { 3459fc2cd76SKishon Vijay Abraham I sdhci_omap_set_dll(omap_host, phase_delay); 3469fc2cd76SKishon Vijay Abraham I 3479fc2cd76SKishon Vijay Abraham I cur_match = !mmc_send_tuning(mmc, opcode, NULL); 3489fc2cd76SKishon Vijay Abraham I if (cur_match) { 3499fc2cd76SKishon Vijay Abraham I if (prev_match) { 3509fc2cd76SKishon Vijay Abraham I length++; 351961de0a8SFaiz Abbas } else if (single_point_failure) { 352961de0a8SFaiz Abbas /* ignore single point failure */ 353961de0a8SFaiz Abbas length++; 3549fc2cd76SKishon Vijay Abraham I } else { 3559fc2cd76SKishon Vijay Abraham I start_window = phase_delay; 3569fc2cd76SKishon Vijay Abraham I length = 1; 3579fc2cd76SKishon Vijay Abraham I } 358961de0a8SFaiz Abbas } else { 359961de0a8SFaiz Abbas single_point_failure = prev_match; 3609fc2cd76SKishon Vijay Abraham I } 3619fc2cd76SKishon Vijay Abraham I 3629fc2cd76SKishon Vijay Abraham I if (length > max_len) { 3639fc2cd76SKishon Vijay Abraham I max_window = start_window; 3649fc2cd76SKishon Vijay Abraham I max_len = length; 3659fc2cd76SKishon Vijay Abraham I } 3669fc2cd76SKishon Vijay Abraham I 3679fc2cd76SKishon Vijay Abraham I prev_match = cur_match; 3689fc2cd76SKishon Vijay Abraham I phase_delay += 4; 3699fc2cd76SKishon Vijay Abraham I } 3709fc2cd76SKishon Vijay Abraham I 3719fc2cd76SKishon Vijay Abraham I if (!max_len) { 3729fc2cd76SKishon Vijay Abraham I dev_err(dev, "Unable to find match\n"); 3739fc2cd76SKishon Vijay Abraham I ret = -EIO; 3749fc2cd76SKishon Vijay Abraham I goto tuning_error; 3759fc2cd76SKishon Vijay Abraham I } 3769fc2cd76SKishon Vijay Abraham I 377961de0a8SFaiz Abbas /* 378961de0a8SFaiz Abbas * Assign tuning value as a ratio of maximum pass window based 379961de0a8SFaiz Abbas * on temperature 380961de0a8SFaiz Abbas */ 381961de0a8SFaiz Abbas if (temperature < -20000) 382feb40824SFaiz Abbas phase_delay = min(max_window + 4 * (max_len - 1) - 24, 383961de0a8SFaiz Abbas max_window + 384961de0a8SFaiz Abbas DIV_ROUND_UP(13 * max_len, 16) * 4); 385961de0a8SFaiz Abbas else if (temperature < 20000) 386961de0a8SFaiz Abbas phase_delay = max_window + DIV_ROUND_UP(9 * max_len, 16) * 4; 387961de0a8SFaiz Abbas else if (temperature < 40000) 388961de0a8SFaiz Abbas phase_delay = max_window + DIV_ROUND_UP(8 * max_len, 16) * 4; 389961de0a8SFaiz Abbas else if (temperature < 70000) 390961de0a8SFaiz Abbas phase_delay = max_window + DIV_ROUND_UP(7 * max_len, 16) * 4; 391961de0a8SFaiz Abbas else if (temperature < 90000) 392961de0a8SFaiz Abbas phase_delay = max_window + DIV_ROUND_UP(5 * max_len, 16) * 4; 393961de0a8SFaiz Abbas else if (temperature < 120000) 394961de0a8SFaiz Abbas phase_delay = max_window + DIV_ROUND_UP(4 * max_len, 16) * 4; 395961de0a8SFaiz Abbas else 396961de0a8SFaiz Abbas phase_delay = max_window + DIV_ROUND_UP(3 * max_len, 16) * 4; 397961de0a8SFaiz Abbas 398961de0a8SFaiz Abbas /* 399961de0a8SFaiz Abbas * Stage 2: Search for a single point failure near the chosen tuning 400961de0a8SFaiz Abbas * value in two steps. First in the +3 to +10 range and then in the 401961de0a8SFaiz Abbas * +2 to -10 range. If found, move away from it in the appropriate 402961de0a8SFaiz Abbas * direction by the appropriate amount depending on the temperature. 403961de0a8SFaiz Abbas */ 404961de0a8SFaiz Abbas for (i = 3; i <= 10; i++) { 405961de0a8SFaiz Abbas sdhci_omap_set_dll(omap_host, phase_delay + i); 406961de0a8SFaiz Abbas 407961de0a8SFaiz Abbas if (mmc_send_tuning(mmc, opcode, NULL)) { 408961de0a8SFaiz Abbas if (temperature < 10000) 409961de0a8SFaiz Abbas phase_delay += i + 6; 410961de0a8SFaiz Abbas else if (temperature < 20000) 411961de0a8SFaiz Abbas phase_delay += i - 12; 412961de0a8SFaiz Abbas else if (temperature < 70000) 413961de0a8SFaiz Abbas phase_delay += i - 8; 414961de0a8SFaiz Abbas else 415961de0a8SFaiz Abbas phase_delay += i - 6; 416961de0a8SFaiz Abbas 417961de0a8SFaiz Abbas goto single_failure_found; 418961de0a8SFaiz Abbas } 419961de0a8SFaiz Abbas } 420961de0a8SFaiz Abbas 421961de0a8SFaiz Abbas for (i = 2; i >= -10; i--) { 422961de0a8SFaiz Abbas sdhci_omap_set_dll(omap_host, phase_delay + i); 423961de0a8SFaiz Abbas 424961de0a8SFaiz Abbas if (mmc_send_tuning(mmc, opcode, NULL)) { 425961de0a8SFaiz Abbas if (temperature < 10000) 426961de0a8SFaiz Abbas phase_delay += i + 12; 427961de0a8SFaiz Abbas else if (temperature < 20000) 428961de0a8SFaiz Abbas phase_delay += i + 8; 429961de0a8SFaiz Abbas else if (temperature < 70000) 430961de0a8SFaiz Abbas phase_delay += i + 8; 431961de0a8SFaiz Abbas else if (temperature < 90000) 432961de0a8SFaiz Abbas phase_delay += i + 10; 433961de0a8SFaiz Abbas else 434961de0a8SFaiz Abbas phase_delay += i + 12; 435961de0a8SFaiz Abbas 436961de0a8SFaiz Abbas goto single_failure_found; 437961de0a8SFaiz Abbas } 438961de0a8SFaiz Abbas } 439961de0a8SFaiz Abbas 440961de0a8SFaiz Abbas single_failure_found: 4419fc2cd76SKishon Vijay Abraham I reg = sdhci_omap_readl(omap_host, SDHCI_OMAP_AC12); 4429fc2cd76SKishon Vijay Abraham I if (!(reg & AC12_SCLK_SEL)) { 4439fc2cd76SKishon Vijay Abraham I ret = -EIO; 4449fc2cd76SKishon Vijay Abraham I goto tuning_error; 4459fc2cd76SKishon Vijay Abraham I } 4469fc2cd76SKishon Vijay Abraham I 4479fc2cd76SKishon Vijay Abraham I sdhci_omap_set_dll(omap_host, phase_delay); 4489fc2cd76SKishon Vijay Abraham I 4495b0d6210SFaiz Abbas omap_host->is_tuning = false; 4505b0d6210SFaiz Abbas 4519fc2cd76SKishon Vijay Abraham I goto ret; 4529fc2cd76SKishon Vijay Abraham I 4539fc2cd76SKishon Vijay Abraham I tuning_error: 4545b0d6210SFaiz Abbas omap_host->is_tuning = false; 4559fc2cd76SKishon Vijay Abraham I dev_err(dev, "Tuning failed\n"); 4569fc2cd76SKishon Vijay Abraham I sdhci_omap_disable_tuning(omap_host); 4579fc2cd76SKishon Vijay Abraham I 4589fc2cd76SKishon Vijay Abraham I ret: 4599fc2cd76SKishon Vijay Abraham I sdhci_reset(host, SDHCI_RESET_CMD | SDHCI_RESET_DATA); 460db2039fcSFaiz Abbas /* Reenable forbidden interrupt */ 461db2039fcSFaiz Abbas if (dcrc_was_enabled) 462db2039fcSFaiz Abbas host->ier |= SDHCI_INT_DATA_CRC; 4637d33c358SKishon Vijay Abraham I sdhci_writel(host, host->ier, SDHCI_INT_ENABLE); 4647d33c358SKishon Vijay Abraham I sdhci_writel(host, host->ier, SDHCI_SIGNAL_ENABLE); 4659fc2cd76SKishon Vijay Abraham I return ret; 4669fc2cd76SKishon Vijay Abraham I } 4679fc2cd76SKishon Vijay Abraham I 46820ea26a1SKishon Vijay Abraham I static int sdhci_omap_card_busy(struct mmc_host *mmc) 46920ea26a1SKishon Vijay Abraham I { 47020ea26a1SKishon Vijay Abraham I u32 reg, ac12; 47120ea26a1SKishon Vijay Abraham I int ret = false; 47220ea26a1SKishon Vijay Abraham I struct sdhci_host *host = mmc_priv(mmc); 47320ea26a1SKishon Vijay Abraham I struct sdhci_pltfm_host *pltfm_host; 47420ea26a1SKishon Vijay Abraham I struct sdhci_omap_host *omap_host; 47520ea26a1SKishon Vijay Abraham I u32 ier = host->ier; 47620ea26a1SKishon Vijay Abraham I 47720ea26a1SKishon Vijay Abraham I pltfm_host = sdhci_priv(host); 47820ea26a1SKishon Vijay Abraham I omap_host = sdhci_pltfm_priv(pltfm_host); 47920ea26a1SKishon Vijay Abraham I 48020ea26a1SKishon Vijay Abraham I reg = sdhci_omap_readl(omap_host, SDHCI_OMAP_CON); 48120ea26a1SKishon Vijay Abraham I ac12 = sdhci_omap_readl(omap_host, SDHCI_OMAP_AC12); 48220ea26a1SKishon Vijay Abraham I reg &= ~CON_CLKEXTFREE; 48320ea26a1SKishon Vijay Abraham I if (ac12 & AC12_V1V8_SIGEN) 48420ea26a1SKishon Vijay Abraham I reg |= CON_CLKEXTFREE; 48520ea26a1SKishon Vijay Abraham I reg |= CON_PADEN; 48620ea26a1SKishon Vijay Abraham I sdhci_omap_writel(omap_host, SDHCI_OMAP_CON, reg); 48720ea26a1SKishon Vijay Abraham I 48820ea26a1SKishon Vijay Abraham I disable_irq(host->irq); 48920ea26a1SKishon Vijay Abraham I ier |= SDHCI_INT_CARD_INT; 49020ea26a1SKishon Vijay Abraham I sdhci_writel(host, ier, SDHCI_INT_ENABLE); 49120ea26a1SKishon Vijay Abraham I sdhci_writel(host, ier, SDHCI_SIGNAL_ENABLE); 49220ea26a1SKishon Vijay Abraham I 49320ea26a1SKishon Vijay Abraham I /* 49420ea26a1SKishon Vijay Abraham I * Delay is required for PSTATE to correctly reflect 49520ea26a1SKishon Vijay Abraham I * DLEV/CLEV values after PADEN is set. 49620ea26a1SKishon Vijay Abraham I */ 49720ea26a1SKishon Vijay Abraham I usleep_range(50, 100); 49820ea26a1SKishon Vijay Abraham I reg = sdhci_omap_readl(omap_host, SDHCI_OMAP_PSTATE); 49920ea26a1SKishon Vijay Abraham I if ((reg & PSTATE_DATI) || !(reg & PSTATE_DLEV_DAT0)) 50020ea26a1SKishon Vijay Abraham I ret = true; 50120ea26a1SKishon Vijay Abraham I 50220ea26a1SKishon Vijay Abraham I reg = sdhci_omap_readl(omap_host, SDHCI_OMAP_CON); 50320ea26a1SKishon Vijay Abraham I reg &= ~(CON_CLKEXTFREE | CON_PADEN); 50420ea26a1SKishon Vijay Abraham I sdhci_omap_writel(omap_host, SDHCI_OMAP_CON, reg); 50520ea26a1SKishon Vijay Abraham I 50620ea26a1SKishon Vijay Abraham I sdhci_writel(host, host->ier, SDHCI_INT_ENABLE); 50720ea26a1SKishon Vijay Abraham I sdhci_writel(host, host->ier, SDHCI_SIGNAL_ENABLE); 50820ea26a1SKishon Vijay Abraham I enable_irq(host->irq); 50920ea26a1SKishon Vijay Abraham I 51020ea26a1SKishon Vijay Abraham I return ret; 51120ea26a1SKishon Vijay Abraham I } 51220ea26a1SKishon Vijay Abraham I 5137d326930SKishon Vijay Abraham I static int sdhci_omap_start_signal_voltage_switch(struct mmc_host *mmc, 5147d326930SKishon Vijay Abraham I struct mmc_ios *ios) 5157d326930SKishon Vijay Abraham I { 5167d326930SKishon Vijay Abraham I u32 reg; 5177d326930SKishon Vijay Abraham I int ret; 5187d326930SKishon Vijay Abraham I unsigned int iov; 5197d326930SKishon Vijay Abraham I struct sdhci_host *host = mmc_priv(mmc); 5207d326930SKishon Vijay Abraham I struct sdhci_pltfm_host *pltfm_host; 5217d326930SKishon Vijay Abraham I struct sdhci_omap_host *omap_host; 5227d326930SKishon Vijay Abraham I struct device *dev; 5237d326930SKishon Vijay Abraham I 5247d326930SKishon Vijay Abraham I pltfm_host = sdhci_priv(host); 5257d326930SKishon Vijay Abraham I omap_host = sdhci_pltfm_priv(pltfm_host); 5267d326930SKishon Vijay Abraham I dev = omap_host->dev; 5277d326930SKishon Vijay Abraham I 5287d326930SKishon Vijay Abraham I if (ios->signal_voltage == MMC_SIGNAL_VOLTAGE_330) { 5297d326930SKishon Vijay Abraham I reg = sdhci_omap_readl(omap_host, SDHCI_OMAP_CAPA); 5307d326930SKishon Vijay Abraham I if (!(reg & CAPA_VS33)) 5317d326930SKishon Vijay Abraham I return -EOPNOTSUPP; 5327d326930SKishon Vijay Abraham I 5337d326930SKishon Vijay Abraham I sdhci_omap_conf_bus_power(omap_host, ios->signal_voltage); 5347d326930SKishon Vijay Abraham I 5357d326930SKishon Vijay Abraham I reg = sdhci_omap_readl(omap_host, SDHCI_OMAP_AC12); 5367d326930SKishon Vijay Abraham I reg &= ~AC12_V1V8_SIGEN; 5377d326930SKishon Vijay Abraham I sdhci_omap_writel(omap_host, SDHCI_OMAP_AC12, reg); 5387d326930SKishon Vijay Abraham I 5397d326930SKishon Vijay Abraham I iov = IOV_3V3; 5407d326930SKishon Vijay Abraham I } else if (ios->signal_voltage == MMC_SIGNAL_VOLTAGE_180) { 5417d326930SKishon Vijay Abraham I reg = sdhci_omap_readl(omap_host, SDHCI_OMAP_CAPA); 5427d326930SKishon Vijay Abraham I if (!(reg & CAPA_VS18)) 5437d326930SKishon Vijay Abraham I return -EOPNOTSUPP; 5447d326930SKishon Vijay Abraham I 5457d326930SKishon Vijay Abraham I sdhci_omap_conf_bus_power(omap_host, ios->signal_voltage); 5467d326930SKishon Vijay Abraham I 5477d326930SKishon Vijay Abraham I reg = sdhci_omap_readl(omap_host, SDHCI_OMAP_AC12); 5487d326930SKishon Vijay Abraham I reg |= AC12_V1V8_SIGEN; 5497d326930SKishon Vijay Abraham I sdhci_omap_writel(omap_host, SDHCI_OMAP_AC12, reg); 5507d326930SKishon Vijay Abraham I 5517d326930SKishon Vijay Abraham I iov = IOV_1V8; 5527d326930SKishon Vijay Abraham I } else { 5537d326930SKishon Vijay Abraham I return -EOPNOTSUPP; 5547d326930SKishon Vijay Abraham I } 5557d326930SKishon Vijay Abraham I 5567d326930SKishon Vijay Abraham I ret = sdhci_omap_enable_iov(omap_host, iov); 5577d326930SKishon Vijay Abraham I if (ret) { 5587d326930SKishon Vijay Abraham I dev_err(dev, "failed to switch IO voltage to %dmV\n", iov); 5597d326930SKishon Vijay Abraham I return ret; 5607d326930SKishon Vijay Abraham I } 5617d326930SKishon Vijay Abraham I 5627d326930SKishon Vijay Abraham I dev_dbg(dev, "IO voltage switched to %dmV\n", iov); 5637d326930SKishon Vijay Abraham I return 0; 5647d326930SKishon Vijay Abraham I } 5657d326930SKishon Vijay Abraham I 5668d20b2eaSKishon Vijay Abraham I static void sdhci_omap_set_timing(struct sdhci_omap_host *omap_host, u8 timing) 5678d20b2eaSKishon Vijay Abraham I { 5688d20b2eaSKishon Vijay Abraham I int ret; 5698d20b2eaSKishon Vijay Abraham I struct pinctrl_state *pinctrl_state; 5708d20b2eaSKishon Vijay Abraham I struct device *dev = omap_host->dev; 5718d20b2eaSKishon Vijay Abraham I 5728d20b2eaSKishon Vijay Abraham I if (!(omap_host->flags & SDHCI_OMAP_REQUIRE_IODELAY)) 5738d20b2eaSKishon Vijay Abraham I return; 5748d20b2eaSKishon Vijay Abraham I 5758d20b2eaSKishon Vijay Abraham I if (omap_host->timing == timing) 5768d20b2eaSKishon Vijay Abraham I return; 5778d20b2eaSKishon Vijay Abraham I 5788d20b2eaSKishon Vijay Abraham I sdhci_omap_stop_clock(omap_host); 5798d20b2eaSKishon Vijay Abraham I 5808d20b2eaSKishon Vijay Abraham I pinctrl_state = omap_host->pinctrl_state[timing]; 5818d20b2eaSKishon Vijay Abraham I ret = pinctrl_select_state(omap_host->pinctrl, pinctrl_state); 5828d20b2eaSKishon Vijay Abraham I if (ret) { 5838d20b2eaSKishon Vijay Abraham I dev_err(dev, "failed to select pinctrl state\n"); 5848d20b2eaSKishon Vijay Abraham I return; 5858d20b2eaSKishon Vijay Abraham I } 5868d20b2eaSKishon Vijay Abraham I 5878d20b2eaSKishon Vijay Abraham I sdhci_omap_start_clock(omap_host); 5888d20b2eaSKishon Vijay Abraham I omap_host->timing = timing; 5898d20b2eaSKishon Vijay Abraham I } 5908d20b2eaSKishon Vijay Abraham I 591300df508SKishon Vijay Abraham I static void sdhci_omap_set_power_mode(struct sdhci_omap_host *omap_host, 592300df508SKishon Vijay Abraham I u8 power_mode) 593300df508SKishon Vijay Abraham I { 5949fc2cd76SKishon Vijay Abraham I if (omap_host->bus_mode == MMC_POWER_OFF) 5959fc2cd76SKishon Vijay Abraham I sdhci_omap_disable_tuning(omap_host); 596300df508SKishon Vijay Abraham I omap_host->power_mode = power_mode; 597300df508SKishon Vijay Abraham I } 598300df508SKishon Vijay Abraham I 5997d326930SKishon Vijay Abraham I static void sdhci_omap_set_bus_mode(struct sdhci_omap_host *omap_host, 6007d326930SKishon Vijay Abraham I unsigned int mode) 6017d326930SKishon Vijay Abraham I { 6027d326930SKishon Vijay Abraham I u32 reg; 6037d326930SKishon Vijay Abraham I 6047d326930SKishon Vijay Abraham I if (omap_host->bus_mode == mode) 6057d326930SKishon Vijay Abraham I return; 6067d326930SKishon Vijay Abraham I 6077d326930SKishon Vijay Abraham I reg = sdhci_omap_readl(omap_host, SDHCI_OMAP_CON); 6087d326930SKishon Vijay Abraham I if (mode == MMC_BUSMODE_OPENDRAIN) 6097d326930SKishon Vijay Abraham I reg |= CON_OD; 6107d326930SKishon Vijay Abraham I else 6117d326930SKishon Vijay Abraham I reg &= ~CON_OD; 6127d326930SKishon Vijay Abraham I sdhci_omap_writel(omap_host, SDHCI_OMAP_CON, reg); 6137d326930SKishon Vijay Abraham I 6147d326930SKishon Vijay Abraham I omap_host->bus_mode = mode; 6157d326930SKishon Vijay Abraham I } 6167d326930SKishon Vijay Abraham I 617ddde0e7dSColin Ian King static void sdhci_omap_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) 6187d326930SKishon Vijay Abraham I { 6197d326930SKishon Vijay Abraham I struct sdhci_host *host = mmc_priv(mmc); 6207d326930SKishon Vijay Abraham I struct sdhci_pltfm_host *pltfm_host; 6217d326930SKishon Vijay Abraham I struct sdhci_omap_host *omap_host; 6227d326930SKishon Vijay Abraham I 6237d326930SKishon Vijay Abraham I pltfm_host = sdhci_priv(host); 6247d326930SKishon Vijay Abraham I omap_host = sdhci_pltfm_priv(pltfm_host); 6257d326930SKishon Vijay Abraham I 6267d326930SKishon Vijay Abraham I sdhci_omap_set_bus_mode(omap_host, ios->bus_mode); 6278d20b2eaSKishon Vijay Abraham I sdhci_omap_set_timing(omap_host, ios->timing); 6287d326930SKishon Vijay Abraham I sdhci_set_ios(mmc, ios); 629300df508SKishon Vijay Abraham I sdhci_omap_set_power_mode(omap_host, ios->power_mode); 6307d326930SKishon Vijay Abraham I } 6317d326930SKishon Vijay Abraham I 6327d326930SKishon Vijay Abraham I static u16 sdhci_omap_calc_divisor(struct sdhci_pltfm_host *host, 6337d326930SKishon Vijay Abraham I unsigned int clock) 6347d326930SKishon Vijay Abraham I { 6357d326930SKishon Vijay Abraham I u16 dsor; 6367d326930SKishon Vijay Abraham I 6377d326930SKishon Vijay Abraham I dsor = DIV_ROUND_UP(clk_get_rate(host->clk), clock); 6387d326930SKishon Vijay Abraham I if (dsor > SYSCTL_CLKD_MAX) 6397d326930SKishon Vijay Abraham I dsor = SYSCTL_CLKD_MAX; 6407d326930SKishon Vijay Abraham I 6417d326930SKishon Vijay Abraham I return dsor; 6427d326930SKishon Vijay Abraham I } 6437d326930SKishon Vijay Abraham I 6447d326930SKishon Vijay Abraham I static void sdhci_omap_start_clock(struct sdhci_omap_host *omap_host) 6457d326930SKishon Vijay Abraham I { 6467d326930SKishon Vijay Abraham I u32 reg; 6477d326930SKishon Vijay Abraham I 6487d326930SKishon Vijay Abraham I reg = sdhci_omap_readl(omap_host, SDHCI_OMAP_SYSCTL); 6497d326930SKishon Vijay Abraham I reg |= SYSCTL_CEN; 6507d326930SKishon Vijay Abraham I sdhci_omap_writel(omap_host, SDHCI_OMAP_SYSCTL, reg); 6517d326930SKishon Vijay Abraham I } 6527d326930SKishon Vijay Abraham I 6537d326930SKishon Vijay Abraham I static void sdhci_omap_stop_clock(struct sdhci_omap_host *omap_host) 6547d326930SKishon Vijay Abraham I { 6557d326930SKishon Vijay Abraham I u32 reg; 6567d326930SKishon Vijay Abraham I 6577d326930SKishon Vijay Abraham I reg = sdhci_omap_readl(omap_host, SDHCI_OMAP_SYSCTL); 6587d326930SKishon Vijay Abraham I reg &= ~SYSCTL_CEN; 6597d326930SKishon Vijay Abraham I sdhci_omap_writel(omap_host, SDHCI_OMAP_SYSCTL, reg); 6607d326930SKishon Vijay Abraham I } 6617d326930SKishon Vijay Abraham I 6627d326930SKishon Vijay Abraham I static void sdhci_omap_set_clock(struct sdhci_host *host, unsigned int clock) 6637d326930SKishon Vijay Abraham I { 6647d326930SKishon Vijay Abraham I struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); 6657d326930SKishon Vijay Abraham I struct sdhci_omap_host *omap_host = sdhci_pltfm_priv(pltfm_host); 6667d326930SKishon Vijay Abraham I unsigned long clkdiv; 6677d326930SKishon Vijay Abraham I 6687d326930SKishon Vijay Abraham I sdhci_omap_stop_clock(omap_host); 6697d326930SKishon Vijay Abraham I 6707d326930SKishon Vijay Abraham I if (!clock) 6717d326930SKishon Vijay Abraham I return; 6727d326930SKishon Vijay Abraham I 6737d326930SKishon Vijay Abraham I clkdiv = sdhci_omap_calc_divisor(pltfm_host, clock); 6747d326930SKishon Vijay Abraham I clkdiv = (clkdiv & SYSCTL_CLKD_MASK) << SYSCTL_CLKD_SHIFT; 6757d326930SKishon Vijay Abraham I sdhci_enable_clk(host, clkdiv); 6767d326930SKishon Vijay Abraham I 6777d326930SKishon Vijay Abraham I sdhci_omap_start_clock(omap_host); 6787d326930SKishon Vijay Abraham I } 6797d326930SKishon Vijay Abraham I 680ddde0e7dSColin Ian King static void sdhci_omap_set_power(struct sdhci_host *host, unsigned char mode, 6817d326930SKishon Vijay Abraham I unsigned short vdd) 6827d326930SKishon Vijay Abraham I { 6837d326930SKishon Vijay Abraham I struct mmc_host *mmc = host->mmc; 6847d326930SKishon Vijay Abraham I 6857d326930SKishon Vijay Abraham I mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, vdd); 6867d326930SKishon Vijay Abraham I } 6877d326930SKishon Vijay Abraham I 6887d326930SKishon Vijay Abraham I static int sdhci_omap_enable_dma(struct sdhci_host *host) 6897d326930SKishon Vijay Abraham I { 6907d326930SKishon Vijay Abraham I u32 reg; 6917d326930SKishon Vijay Abraham I struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); 6927d326930SKishon Vijay Abraham I struct sdhci_omap_host *omap_host = sdhci_pltfm_priv(pltfm_host); 6937d326930SKishon Vijay Abraham I 6947d326930SKishon Vijay Abraham I reg = sdhci_omap_readl(omap_host, SDHCI_OMAP_CON); 695195fadb7SChunyan Zhang reg &= ~CON_DMA_MASTER; 696195fadb7SChunyan Zhang /* Switch to DMA slave mode when using external DMA */ 697195fadb7SChunyan Zhang if (!host->use_external_dma) 6987d326930SKishon Vijay Abraham I reg |= CON_DMA_MASTER; 699195fadb7SChunyan Zhang 7007d326930SKishon Vijay Abraham I sdhci_omap_writel(omap_host, SDHCI_OMAP_CON, reg); 7017d326930SKishon Vijay Abraham I 7027d326930SKishon Vijay Abraham I return 0; 7037d326930SKishon Vijay Abraham I } 7047d326930SKishon Vijay Abraham I 705ddde0e7dSColin Ian King static unsigned int sdhci_omap_get_min_clock(struct sdhci_host *host) 7067d326930SKishon Vijay Abraham I { 7077d326930SKishon Vijay Abraham I struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); 7087d326930SKishon Vijay Abraham I 7097d326930SKishon Vijay Abraham I return clk_get_rate(pltfm_host->clk) / SYSCTL_CLKD_MAX; 7107d326930SKishon Vijay Abraham I } 7117d326930SKishon Vijay Abraham I 7127d326930SKishon Vijay Abraham I static void sdhci_omap_set_bus_width(struct sdhci_host *host, int width) 7137d326930SKishon Vijay Abraham I { 7147d326930SKishon Vijay Abraham I struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); 7157d326930SKishon Vijay Abraham I struct sdhci_omap_host *omap_host = sdhci_pltfm_priv(pltfm_host); 7167d326930SKishon Vijay Abraham I u32 reg; 7177d326930SKishon Vijay Abraham I 7187d326930SKishon Vijay Abraham I reg = sdhci_omap_readl(omap_host, SDHCI_OMAP_CON); 7197d326930SKishon Vijay Abraham I if (width == MMC_BUS_WIDTH_8) 7207d326930SKishon Vijay Abraham I reg |= CON_DW8; 7217d326930SKishon Vijay Abraham I else 7227d326930SKishon Vijay Abraham I reg &= ~CON_DW8; 7237d326930SKishon Vijay Abraham I sdhci_omap_writel(omap_host, SDHCI_OMAP_CON, reg); 7247d326930SKishon Vijay Abraham I 7257d326930SKishon Vijay Abraham I sdhci_set_bus_width(host, width); 7267d326930SKishon Vijay Abraham I } 7277d326930SKishon Vijay Abraham I 7287d326930SKishon Vijay Abraham I static void sdhci_omap_init_74_clocks(struct sdhci_host *host, u8 power_mode) 7297d326930SKishon Vijay Abraham I { 7307d326930SKishon Vijay Abraham I u32 reg; 7317d326930SKishon Vijay Abraham I ktime_t timeout; 7327d326930SKishon Vijay Abraham I struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); 7337d326930SKishon Vijay Abraham I struct sdhci_omap_host *omap_host = sdhci_pltfm_priv(pltfm_host); 7347d326930SKishon Vijay Abraham I 7357d326930SKishon Vijay Abraham I if (omap_host->power_mode == power_mode) 7367d326930SKishon Vijay Abraham I return; 7377d326930SKishon Vijay Abraham I 7387d326930SKishon Vijay Abraham I if (power_mode != MMC_POWER_ON) 7397d326930SKishon Vijay Abraham I return; 7407d326930SKishon Vijay Abraham I 7417d326930SKishon Vijay Abraham I disable_irq(host->irq); 7427d326930SKishon Vijay Abraham I 7437d326930SKishon Vijay Abraham I reg = sdhci_omap_readl(omap_host, SDHCI_OMAP_CON); 7447d326930SKishon Vijay Abraham I reg |= CON_INIT; 7457d326930SKishon Vijay Abraham I sdhci_omap_writel(omap_host, SDHCI_OMAP_CON, reg); 7467d326930SKishon Vijay Abraham I sdhci_omap_writel(omap_host, SDHCI_OMAP_CMD, 0x0); 7477d326930SKishon Vijay Abraham I 7487d326930SKishon Vijay Abraham I /* wait 1ms */ 7497d326930SKishon Vijay Abraham I timeout = ktime_add_ms(ktime_get(), SDHCI_OMAP_TIMEOUT); 7509f0ea0bdSAdrian Hunter while (1) { 7519f0ea0bdSAdrian Hunter bool timedout = ktime_after(ktime_get(), timeout); 7529f0ea0bdSAdrian Hunter 7539f0ea0bdSAdrian Hunter if (sdhci_omap_readl(omap_host, SDHCI_OMAP_STAT) & INT_CC_EN) 7549f0ea0bdSAdrian Hunter break; 7559f0ea0bdSAdrian Hunter if (WARN_ON(timedout)) 7567d326930SKishon Vijay Abraham I return; 7577d326930SKishon Vijay Abraham I usleep_range(5, 10); 7587d326930SKishon Vijay Abraham I } 7597d326930SKishon Vijay Abraham I 7607d326930SKishon Vijay Abraham I reg = sdhci_omap_readl(omap_host, SDHCI_OMAP_CON); 7617d326930SKishon Vijay Abraham I reg &= ~CON_INIT; 7627d326930SKishon Vijay Abraham I sdhci_omap_writel(omap_host, SDHCI_OMAP_CON, reg); 7637d326930SKishon Vijay Abraham I sdhci_omap_writel(omap_host, SDHCI_OMAP_STAT, INT_CC_EN); 7647d326930SKishon Vijay Abraham I 7657d326930SKishon Vijay Abraham I enable_irq(host->irq); 7667d326930SKishon Vijay Abraham I } 7677d326930SKishon Vijay Abraham I 76827ceb7e0SKishon Vijay Abraham I static void sdhci_omap_set_uhs_signaling(struct sdhci_host *host, 76927ceb7e0SKishon Vijay Abraham I unsigned int timing) 77027ceb7e0SKishon Vijay Abraham I { 77127ceb7e0SKishon Vijay Abraham I u32 reg; 77227ceb7e0SKishon Vijay Abraham I struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); 77327ceb7e0SKishon Vijay Abraham I struct sdhci_omap_host *omap_host = sdhci_pltfm_priv(pltfm_host); 77427ceb7e0SKishon Vijay Abraham I 77527ceb7e0SKishon Vijay Abraham I sdhci_omap_stop_clock(omap_host); 77627ceb7e0SKishon Vijay Abraham I 77727ceb7e0SKishon Vijay Abraham I reg = sdhci_omap_readl(omap_host, SDHCI_OMAP_CON); 77827ceb7e0SKishon Vijay Abraham I if (timing == MMC_TIMING_UHS_DDR50 || timing == MMC_TIMING_MMC_DDR52) 77927ceb7e0SKishon Vijay Abraham I reg |= CON_DDR; 78027ceb7e0SKishon Vijay Abraham I else 78127ceb7e0SKishon Vijay Abraham I reg &= ~CON_DDR; 78227ceb7e0SKishon Vijay Abraham I sdhci_omap_writel(omap_host, SDHCI_OMAP_CON, reg); 78327ceb7e0SKishon Vijay Abraham I 78427ceb7e0SKishon Vijay Abraham I sdhci_set_uhs_signaling(host, timing); 78527ceb7e0SKishon Vijay Abraham I sdhci_omap_start_clock(omap_host); 78627ceb7e0SKishon Vijay Abraham I } 78727ceb7e0SKishon Vijay Abraham I 7889e84a2e6SFaiz Abbas #define MMC_TIMEOUT_US 20000 /* 20000 micro Sec */ 7892198eeffSYueHaibing static void sdhci_omap_reset(struct sdhci_host *host, u8 mask) 7905b0d6210SFaiz Abbas { 7915b0d6210SFaiz Abbas struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); 7925b0d6210SFaiz Abbas struct sdhci_omap_host *omap_host = sdhci_pltfm_priv(pltfm_host); 7939e84a2e6SFaiz Abbas unsigned long limit = MMC_TIMEOUT_US; 7949e84a2e6SFaiz Abbas unsigned long i = 0; 7955b0d6210SFaiz Abbas 7965b0d6210SFaiz Abbas /* Don't reset data lines during tuning operation */ 7975b0d6210SFaiz Abbas if (omap_host->is_tuning) 7985b0d6210SFaiz Abbas mask &= ~SDHCI_RESET_DATA; 7995b0d6210SFaiz Abbas 8009e84a2e6SFaiz Abbas if (omap_host->flags & SDHCI_OMAP_SPECIAL_RESET) { 8019e84a2e6SFaiz Abbas sdhci_writeb(host, mask, SDHCI_SOFTWARE_RESET); 8029e84a2e6SFaiz Abbas while ((!(sdhci_readb(host, SDHCI_SOFTWARE_RESET) & mask)) && 8039e84a2e6SFaiz Abbas (i++ < limit)) 8049e84a2e6SFaiz Abbas udelay(1); 8059e84a2e6SFaiz Abbas i = 0; 8069e84a2e6SFaiz Abbas while ((sdhci_readb(host, SDHCI_SOFTWARE_RESET) & mask) && 8079e84a2e6SFaiz Abbas (i++ < limit)) 8089e84a2e6SFaiz Abbas udelay(1); 8099e84a2e6SFaiz Abbas 8109e84a2e6SFaiz Abbas if (sdhci_readb(host, SDHCI_SOFTWARE_RESET) & mask) 8119e84a2e6SFaiz Abbas dev_err(mmc_dev(host->mmc), 8129e84a2e6SFaiz Abbas "Timeout waiting on controller reset in %s\n", 8139e84a2e6SFaiz Abbas __func__); 8149e84a2e6SFaiz Abbas return; 8159e84a2e6SFaiz Abbas } 8169e84a2e6SFaiz Abbas 8175b0d6210SFaiz Abbas sdhci_reset(host, mask); 8185b0d6210SFaiz Abbas } 8195b0d6210SFaiz Abbas 8205c41ea6dSFaiz Abbas #define CMD_ERR_MASK (SDHCI_INT_CRC | SDHCI_INT_END_BIT | SDHCI_INT_INDEX |\ 8215c41ea6dSFaiz Abbas SDHCI_INT_TIMEOUT) 8225c41ea6dSFaiz Abbas #define CMD_MASK (CMD_ERR_MASK | SDHCI_INT_RESPONSE) 8235c41ea6dSFaiz Abbas 8245c41ea6dSFaiz Abbas static u32 sdhci_omap_irq(struct sdhci_host *host, u32 intmask) 8255c41ea6dSFaiz Abbas { 8265c41ea6dSFaiz Abbas struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); 8275c41ea6dSFaiz Abbas struct sdhci_omap_host *omap_host = sdhci_pltfm_priv(pltfm_host); 8285c41ea6dSFaiz Abbas 8295c41ea6dSFaiz Abbas if (omap_host->is_tuning && host->cmd && !host->data_early && 8305c41ea6dSFaiz Abbas (intmask & CMD_ERR_MASK)) { 8315c41ea6dSFaiz Abbas 8325c41ea6dSFaiz Abbas /* 8335c41ea6dSFaiz Abbas * Since we are not resetting data lines during tuning 8345c41ea6dSFaiz Abbas * operation, data error or data complete interrupts 8355c41ea6dSFaiz Abbas * might still arrive. Mark this request as a failure 8365c41ea6dSFaiz Abbas * but still wait for the data interrupt 8375c41ea6dSFaiz Abbas */ 8385c41ea6dSFaiz Abbas if (intmask & SDHCI_INT_TIMEOUT) 8395c41ea6dSFaiz Abbas host->cmd->error = -ETIMEDOUT; 8405c41ea6dSFaiz Abbas else 8415c41ea6dSFaiz Abbas host->cmd->error = -EILSEQ; 8425c41ea6dSFaiz Abbas 8435c41ea6dSFaiz Abbas host->cmd = NULL; 8445c41ea6dSFaiz Abbas 8455c41ea6dSFaiz Abbas /* 8465c41ea6dSFaiz Abbas * Sometimes command error interrupts and command complete 8475c41ea6dSFaiz Abbas * interrupt will arrive together. Clear all command related 8485c41ea6dSFaiz Abbas * interrupts here. 8495c41ea6dSFaiz Abbas */ 8505c41ea6dSFaiz Abbas sdhci_writel(host, intmask & CMD_MASK, SDHCI_INT_STATUS); 8515c41ea6dSFaiz Abbas intmask &= ~CMD_MASK; 8525c41ea6dSFaiz Abbas } 8535c41ea6dSFaiz Abbas 8545c41ea6dSFaiz Abbas return intmask; 8555c41ea6dSFaiz Abbas } 8565c41ea6dSFaiz Abbas 8575da5e494SFaiz Abbas static void sdhci_omap_set_timeout(struct sdhci_host *host, 8585da5e494SFaiz Abbas struct mmc_command *cmd) 8595da5e494SFaiz Abbas { 8605da5e494SFaiz Abbas if (cmd->opcode == MMC_ERASE) 8615da5e494SFaiz Abbas sdhci_set_data_timeout_irq(host, false); 8625da5e494SFaiz Abbas 8635da5e494SFaiz Abbas __sdhci_set_timeout(host, cmd); 8645da5e494SFaiz Abbas } 8655da5e494SFaiz Abbas 8667d326930SKishon Vijay Abraham I static struct sdhci_ops sdhci_omap_ops = { 8677d326930SKishon Vijay Abraham I .set_clock = sdhci_omap_set_clock, 8687d326930SKishon Vijay Abraham I .set_power = sdhci_omap_set_power, 8697d326930SKishon Vijay Abraham I .enable_dma = sdhci_omap_enable_dma, 8707d326930SKishon Vijay Abraham I .get_max_clock = sdhci_pltfm_clk_get_max_clock, 8717d326930SKishon Vijay Abraham I .get_min_clock = sdhci_omap_get_min_clock, 8727d326930SKishon Vijay Abraham I .set_bus_width = sdhci_omap_set_bus_width, 8737d326930SKishon Vijay Abraham I .platform_send_init_74_clocks = sdhci_omap_init_74_clocks, 8745b0d6210SFaiz Abbas .reset = sdhci_omap_reset, 87527ceb7e0SKishon Vijay Abraham I .set_uhs_signaling = sdhci_omap_set_uhs_signaling, 8765c41ea6dSFaiz Abbas .irq = sdhci_omap_irq, 8775da5e494SFaiz Abbas .set_timeout = sdhci_omap_set_timeout, 8787d326930SKishon Vijay Abraham I }; 8797d326930SKishon Vijay Abraham I 8807d326930SKishon Vijay Abraham I static int sdhci_omap_set_capabilities(struct sdhci_omap_host *omap_host) 8817d326930SKishon Vijay Abraham I { 8827d326930SKishon Vijay Abraham I u32 reg; 8837d326930SKishon Vijay Abraham I int ret = 0; 8847d326930SKishon Vijay Abraham I struct device *dev = omap_host->dev; 8857d326930SKishon Vijay Abraham I struct regulator *vqmmc; 8867d326930SKishon Vijay Abraham I 8877d326930SKishon Vijay Abraham I vqmmc = regulator_get(dev, "vqmmc"); 8887d326930SKishon Vijay Abraham I if (IS_ERR(vqmmc)) { 8897d326930SKishon Vijay Abraham I ret = PTR_ERR(vqmmc); 8907d326930SKishon Vijay Abraham I goto reg_put; 8917d326930SKishon Vijay Abraham I } 8927d326930SKishon Vijay Abraham I 8937d326930SKishon Vijay Abraham I /* voltage capabilities might be set by boot loader, clear it */ 8947d326930SKishon Vijay Abraham I reg = sdhci_omap_readl(omap_host, SDHCI_OMAP_CAPA); 8957d326930SKishon Vijay Abraham I reg &= ~(CAPA_VS18 | CAPA_VS30 | CAPA_VS33); 8967d326930SKishon Vijay Abraham I 8977d326930SKishon Vijay Abraham I if (regulator_is_supported_voltage(vqmmc, IOV_3V3, IOV_3V3)) 8987d326930SKishon Vijay Abraham I reg |= CAPA_VS33; 8997d326930SKishon Vijay Abraham I if (regulator_is_supported_voltage(vqmmc, IOV_1V8, IOV_1V8)) 9007d326930SKishon Vijay Abraham I reg |= CAPA_VS18; 9017d326930SKishon Vijay Abraham I 9027d326930SKishon Vijay Abraham I sdhci_omap_writel(omap_host, SDHCI_OMAP_CAPA, reg); 9037d326930SKishon Vijay Abraham I 9047d326930SKishon Vijay Abraham I reg_put: 9057d326930SKishon Vijay Abraham I regulator_put(vqmmc); 9067d326930SKishon Vijay Abraham I 9077d326930SKishon Vijay Abraham I return ret; 9087d326930SKishon Vijay Abraham I } 9097d326930SKishon Vijay Abraham I 9107d326930SKishon Vijay Abraham I static const struct sdhci_pltfm_data sdhci_omap_pdata = { 9117d326930SKishon Vijay Abraham I .quirks = SDHCI_QUIRK_BROKEN_CARD_DETECTION | 9127d326930SKishon Vijay Abraham I SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK | 9137d326930SKishon Vijay Abraham I SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN | 9147d326930SKishon Vijay Abraham I SDHCI_QUIRK_NO_HISPD_BIT | 9157d326930SKishon Vijay Abraham I SDHCI_QUIRK_BROKEN_ADMA_ZEROLEN_DESC, 916e0b2dbcfSKishon Vijay Abraham I .quirks2 = SDHCI_QUIRK2_ACMD23_BROKEN | 917e0b2dbcfSKishon Vijay Abraham I SDHCI_QUIRK2_PRESET_VALUE_BROKEN | 91825f80d86SKishon Vijay Abraham I SDHCI_QUIRK2_RSP_136_HAS_CRC | 91925f80d86SKishon Vijay Abraham I SDHCI_QUIRK2_DISABLE_HW_TIMEOUT, 9207d326930SKishon Vijay Abraham I .ops = &sdhci_omap_ops, 9217d326930SKishon Vijay Abraham I }; 9227d326930SKishon Vijay Abraham I 9236d75df75SKishon Vijay Abraham I static const struct sdhci_omap_data k2g_data = { 9246d75df75SKishon Vijay Abraham I .offset = 0x200, 9256d75df75SKishon Vijay Abraham I }; 9266d75df75SKishon Vijay Abraham I 927d6fe4928SFaiz Abbas static const struct sdhci_omap_data am335_data = { 928d6fe4928SFaiz Abbas .offset = 0x200, 9299e84a2e6SFaiz Abbas .flags = SDHCI_OMAP_SPECIAL_RESET, 930d6fe4928SFaiz Abbas }; 931d6fe4928SFaiz Abbas 932d6fe4928SFaiz Abbas static const struct sdhci_omap_data am437_data = { 933d6fe4928SFaiz Abbas .offset = 0x200, 9349e84a2e6SFaiz Abbas .flags = SDHCI_OMAP_SPECIAL_RESET, 935d6fe4928SFaiz Abbas }; 936d6fe4928SFaiz Abbas 9377d326930SKishon Vijay Abraham I static const struct sdhci_omap_data dra7_data = { 9387d326930SKishon Vijay Abraham I .offset = 0x200, 9398d20b2eaSKishon Vijay Abraham I .flags = SDHCI_OMAP_REQUIRE_IODELAY, 9407d326930SKishon Vijay Abraham I }; 9417d326930SKishon Vijay Abraham I 9427d326930SKishon Vijay Abraham I static const struct of_device_id omap_sdhci_match[] = { 9437d326930SKishon Vijay Abraham I { .compatible = "ti,dra7-sdhci", .data = &dra7_data }, 9446d75df75SKishon Vijay Abraham I { .compatible = "ti,k2g-sdhci", .data = &k2g_data }, 945d6fe4928SFaiz Abbas { .compatible = "ti,am335-sdhci", .data = &am335_data }, 946d6fe4928SFaiz Abbas { .compatible = "ti,am437-sdhci", .data = &am437_data }, 9477d326930SKishon Vijay Abraham I {}, 9487d326930SKishon Vijay Abraham I }; 9497d326930SKishon Vijay Abraham I MODULE_DEVICE_TABLE(of, omap_sdhci_match); 9507d326930SKishon Vijay Abraham I 9518d20b2eaSKishon Vijay Abraham I static struct pinctrl_state 9528d20b2eaSKishon Vijay Abraham I *sdhci_omap_iodelay_pinctrl_state(struct sdhci_omap_host *omap_host, char *mode, 9538d20b2eaSKishon Vijay Abraham I u32 *caps, u32 capmask) 9548d20b2eaSKishon Vijay Abraham I { 9558d20b2eaSKishon Vijay Abraham I struct device *dev = omap_host->dev; 956212f4f8aSKishon Vijay Abraham I char *version = omap_host->version; 9578d20b2eaSKishon Vijay Abraham I struct pinctrl_state *pinctrl_state = ERR_PTR(-ENODEV); 958212f4f8aSKishon Vijay Abraham I char str[20]; 9598d20b2eaSKishon Vijay Abraham I 9608d20b2eaSKishon Vijay Abraham I if (!(*caps & capmask)) 9618d20b2eaSKishon Vijay Abraham I goto ret; 9628d20b2eaSKishon Vijay Abraham I 963212f4f8aSKishon Vijay Abraham I if (version) { 964212f4f8aSKishon Vijay Abraham I snprintf(str, 20, "%s-%s", mode, version); 965212f4f8aSKishon Vijay Abraham I pinctrl_state = pinctrl_lookup_state(omap_host->pinctrl, str); 966212f4f8aSKishon Vijay Abraham I } 967212f4f8aSKishon Vijay Abraham I 968212f4f8aSKishon Vijay Abraham I if (IS_ERR(pinctrl_state)) 9698d20b2eaSKishon Vijay Abraham I pinctrl_state = pinctrl_lookup_state(omap_host->pinctrl, mode); 970212f4f8aSKishon Vijay Abraham I 9718d20b2eaSKishon Vijay Abraham I if (IS_ERR(pinctrl_state)) { 9728d20b2eaSKishon Vijay Abraham I dev_err(dev, "no pinctrl state for %s mode", mode); 9738d20b2eaSKishon Vijay Abraham I *caps &= ~capmask; 9748d20b2eaSKishon Vijay Abraham I } 9758d20b2eaSKishon Vijay Abraham I 9768d20b2eaSKishon Vijay Abraham I ret: 9778d20b2eaSKishon Vijay Abraham I return pinctrl_state; 9788d20b2eaSKishon Vijay Abraham I } 9798d20b2eaSKishon Vijay Abraham I 9808d20b2eaSKishon Vijay Abraham I static int sdhci_omap_config_iodelay_pinctrl_state(struct sdhci_omap_host 9818d20b2eaSKishon Vijay Abraham I *omap_host) 9828d20b2eaSKishon Vijay Abraham I { 9838d20b2eaSKishon Vijay Abraham I struct device *dev = omap_host->dev; 9848d20b2eaSKishon Vijay Abraham I struct sdhci_host *host = omap_host->host; 9858d20b2eaSKishon Vijay Abraham I struct mmc_host *mmc = host->mmc; 9868d20b2eaSKishon Vijay Abraham I u32 *caps = &mmc->caps; 9878d20b2eaSKishon Vijay Abraham I u32 *caps2 = &mmc->caps2; 9888d20b2eaSKishon Vijay Abraham I struct pinctrl_state *state; 9898d20b2eaSKishon Vijay Abraham I struct pinctrl_state **pinctrl_state; 9908d20b2eaSKishon Vijay Abraham I 9918d20b2eaSKishon Vijay Abraham I if (!(omap_host->flags & SDHCI_OMAP_REQUIRE_IODELAY)) 9928d20b2eaSKishon Vijay Abraham I return 0; 9938d20b2eaSKishon Vijay Abraham I 994a86854d0SKees Cook pinctrl_state = devm_kcalloc(dev, 995a86854d0SKees Cook MMC_TIMING_MMC_HS200 + 1, 996a86854d0SKees Cook sizeof(*pinctrl_state), 997a86854d0SKees Cook GFP_KERNEL); 9988d20b2eaSKishon Vijay Abraham I if (!pinctrl_state) 9998d20b2eaSKishon Vijay Abraham I return -ENOMEM; 10008d20b2eaSKishon Vijay Abraham I 10018d20b2eaSKishon Vijay Abraham I omap_host->pinctrl = devm_pinctrl_get(omap_host->dev); 10028d20b2eaSKishon Vijay Abraham I if (IS_ERR(omap_host->pinctrl)) { 10038d20b2eaSKishon Vijay Abraham I dev_err(dev, "Cannot get pinctrl\n"); 10048d20b2eaSKishon Vijay Abraham I return PTR_ERR(omap_host->pinctrl); 10058d20b2eaSKishon Vijay Abraham I } 10068d20b2eaSKishon Vijay Abraham I 10078d20b2eaSKishon Vijay Abraham I state = pinctrl_lookup_state(omap_host->pinctrl, "default"); 10088d20b2eaSKishon Vijay Abraham I if (IS_ERR(state)) { 10098d20b2eaSKishon Vijay Abraham I dev_err(dev, "no pinctrl state for default mode\n"); 10108d20b2eaSKishon Vijay Abraham I return PTR_ERR(state); 10118d20b2eaSKishon Vijay Abraham I } 10128d20b2eaSKishon Vijay Abraham I pinctrl_state[MMC_TIMING_LEGACY] = state; 10138d20b2eaSKishon Vijay Abraham I 10148d20b2eaSKishon Vijay Abraham I state = sdhci_omap_iodelay_pinctrl_state(omap_host, "sdr104", caps, 10158d20b2eaSKishon Vijay Abraham I MMC_CAP_UHS_SDR104); 10168d20b2eaSKishon Vijay Abraham I if (!IS_ERR(state)) 10178d20b2eaSKishon Vijay Abraham I pinctrl_state[MMC_TIMING_UHS_SDR104] = state; 10188d20b2eaSKishon Vijay Abraham I 10198d20b2eaSKishon Vijay Abraham I state = sdhci_omap_iodelay_pinctrl_state(omap_host, "ddr50", caps, 10208d20b2eaSKishon Vijay Abraham I MMC_CAP_UHS_DDR50); 10218d20b2eaSKishon Vijay Abraham I if (!IS_ERR(state)) 10228d20b2eaSKishon Vijay Abraham I pinctrl_state[MMC_TIMING_UHS_DDR50] = state; 10238d20b2eaSKishon Vijay Abraham I 10248d20b2eaSKishon Vijay Abraham I state = sdhci_omap_iodelay_pinctrl_state(omap_host, "sdr50", caps, 10258d20b2eaSKishon Vijay Abraham I MMC_CAP_UHS_SDR50); 10268d20b2eaSKishon Vijay Abraham I if (!IS_ERR(state)) 10278d20b2eaSKishon Vijay Abraham I pinctrl_state[MMC_TIMING_UHS_SDR50] = state; 10288d20b2eaSKishon Vijay Abraham I 10298d20b2eaSKishon Vijay Abraham I state = sdhci_omap_iodelay_pinctrl_state(omap_host, "sdr25", caps, 10308d20b2eaSKishon Vijay Abraham I MMC_CAP_UHS_SDR25); 10318d20b2eaSKishon Vijay Abraham I if (!IS_ERR(state)) 10328d20b2eaSKishon Vijay Abraham I pinctrl_state[MMC_TIMING_UHS_SDR25] = state; 10338d20b2eaSKishon Vijay Abraham I 10348d20b2eaSKishon Vijay Abraham I state = sdhci_omap_iodelay_pinctrl_state(omap_host, "sdr12", caps, 10358d20b2eaSKishon Vijay Abraham I MMC_CAP_UHS_SDR12); 10368d20b2eaSKishon Vijay Abraham I if (!IS_ERR(state)) 10378d20b2eaSKishon Vijay Abraham I pinctrl_state[MMC_TIMING_UHS_SDR12] = state; 10388d20b2eaSKishon Vijay Abraham I 10398d20b2eaSKishon Vijay Abraham I state = sdhci_omap_iodelay_pinctrl_state(omap_host, "ddr_1_8v", caps, 10408d20b2eaSKishon Vijay Abraham I MMC_CAP_1_8V_DDR); 10413f402878SKishon Vijay Abraham I if (!IS_ERR(state)) { 10423f402878SKishon Vijay Abraham I pinctrl_state[MMC_TIMING_MMC_DDR52] = state; 10433f402878SKishon Vijay Abraham I } else { 10443f402878SKishon Vijay Abraham I state = sdhci_omap_iodelay_pinctrl_state(omap_host, "ddr_3_3v", 10453f402878SKishon Vijay Abraham I caps, 10463f402878SKishon Vijay Abraham I MMC_CAP_3_3V_DDR); 10478d20b2eaSKishon Vijay Abraham I if (!IS_ERR(state)) 10488d20b2eaSKishon Vijay Abraham I pinctrl_state[MMC_TIMING_MMC_DDR52] = state; 10493f402878SKishon Vijay Abraham I } 10508d20b2eaSKishon Vijay Abraham I 10518d20b2eaSKishon Vijay Abraham I state = sdhci_omap_iodelay_pinctrl_state(omap_host, "hs", caps, 10528d20b2eaSKishon Vijay Abraham I MMC_CAP_SD_HIGHSPEED); 10538d20b2eaSKishon Vijay Abraham I if (!IS_ERR(state)) 10548d20b2eaSKishon Vijay Abraham I pinctrl_state[MMC_TIMING_SD_HS] = state; 10558d20b2eaSKishon Vijay Abraham I 10568d20b2eaSKishon Vijay Abraham I state = sdhci_omap_iodelay_pinctrl_state(omap_host, "hs", caps, 10578d20b2eaSKishon Vijay Abraham I MMC_CAP_MMC_HIGHSPEED); 10588d20b2eaSKishon Vijay Abraham I if (!IS_ERR(state)) 10598d20b2eaSKishon Vijay Abraham I pinctrl_state[MMC_TIMING_MMC_HS] = state; 10608d20b2eaSKishon Vijay Abraham I 10618d20b2eaSKishon Vijay Abraham I state = sdhci_omap_iodelay_pinctrl_state(omap_host, "hs200_1_8v", caps2, 10628d20b2eaSKishon Vijay Abraham I MMC_CAP2_HS200_1_8V_SDR); 10638d20b2eaSKishon Vijay Abraham I if (!IS_ERR(state)) 10648d20b2eaSKishon Vijay Abraham I pinctrl_state[MMC_TIMING_MMC_HS200] = state; 10658d20b2eaSKishon Vijay Abraham I 10668d20b2eaSKishon Vijay Abraham I omap_host->pinctrl_state = pinctrl_state; 10678d20b2eaSKishon Vijay Abraham I 10688d20b2eaSKishon Vijay Abraham I return 0; 10698d20b2eaSKishon Vijay Abraham I } 10708d20b2eaSKishon Vijay Abraham I 1071212f4f8aSKishon Vijay Abraham I static const struct soc_device_attribute sdhci_omap_soc_devices[] = { 1072212f4f8aSKishon Vijay Abraham I { 1073212f4f8aSKishon Vijay Abraham I .machine = "DRA7[45]*", 1074212f4f8aSKishon Vijay Abraham I .revision = "ES1.[01]", 1075212f4f8aSKishon Vijay Abraham I }, 1076212f4f8aSKishon Vijay Abraham I { 1077212f4f8aSKishon Vijay Abraham I /* sentinel */ 1078212f4f8aSKishon Vijay Abraham I } 1079212f4f8aSKishon Vijay Abraham I }; 1080212f4f8aSKishon Vijay Abraham I 10817d326930SKishon Vijay Abraham I static int sdhci_omap_probe(struct platform_device *pdev) 10827d326930SKishon Vijay Abraham I { 10837d326930SKishon Vijay Abraham I int ret; 10847d326930SKishon Vijay Abraham I u32 offset; 10857d326930SKishon Vijay Abraham I struct device *dev = &pdev->dev; 10867d326930SKishon Vijay Abraham I struct sdhci_host *host; 10877d326930SKishon Vijay Abraham I struct sdhci_pltfm_host *pltfm_host; 10887d326930SKishon Vijay Abraham I struct sdhci_omap_host *omap_host; 10897d326930SKishon Vijay Abraham I struct mmc_host *mmc; 10907d326930SKishon Vijay Abraham I const struct of_device_id *match; 10917d326930SKishon Vijay Abraham I struct sdhci_omap_data *data; 1092212f4f8aSKishon Vijay Abraham I const struct soc_device_attribute *soc; 1093195fadb7SChunyan Zhang struct resource *regs; 10947d326930SKishon Vijay Abraham I 10957d326930SKishon Vijay Abraham I match = of_match_device(omap_sdhci_match, dev); 10967d326930SKishon Vijay Abraham I if (!match) 10977d326930SKishon Vijay Abraham I return -EINVAL; 10987d326930SKishon Vijay Abraham I 10997d326930SKishon Vijay Abraham I data = (struct sdhci_omap_data *)match->data; 11007d326930SKishon Vijay Abraham I if (!data) { 11017d326930SKishon Vijay Abraham I dev_err(dev, "no sdhci omap data\n"); 11027d326930SKishon Vijay Abraham I return -EINVAL; 11037d326930SKishon Vijay Abraham I } 11047d326930SKishon Vijay Abraham I offset = data->offset; 11057d326930SKishon Vijay Abraham I 1106195fadb7SChunyan Zhang regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); 1107195fadb7SChunyan Zhang if (!regs) 1108195fadb7SChunyan Zhang return -ENXIO; 1109195fadb7SChunyan Zhang 11107d326930SKishon Vijay Abraham I host = sdhci_pltfm_init(pdev, &sdhci_omap_pdata, 11117d326930SKishon Vijay Abraham I sizeof(*omap_host)); 11127d326930SKishon Vijay Abraham I if (IS_ERR(host)) { 11137d326930SKishon Vijay Abraham I dev_err(dev, "Failed sdhci_pltfm_init\n"); 11147d326930SKishon Vijay Abraham I return PTR_ERR(host); 11157d326930SKishon Vijay Abraham I } 11167d326930SKishon Vijay Abraham I 11177d326930SKishon Vijay Abraham I pltfm_host = sdhci_priv(host); 11187d326930SKishon Vijay Abraham I omap_host = sdhci_pltfm_priv(pltfm_host); 11197d326930SKishon Vijay Abraham I omap_host->host = host; 11207d326930SKishon Vijay Abraham I omap_host->base = host->ioaddr; 11217d326930SKishon Vijay Abraham I omap_host->dev = dev; 1122300df508SKishon Vijay Abraham I omap_host->power_mode = MMC_POWER_UNDEFINED; 11238d20b2eaSKishon Vijay Abraham I omap_host->timing = MMC_TIMING_LEGACY; 11248d20b2eaSKishon Vijay Abraham I omap_host->flags = data->flags; 11257d326930SKishon Vijay Abraham I host->ioaddr += offset; 1126195fadb7SChunyan Zhang host->mapbase = regs->start + offset; 11277d326930SKishon Vijay Abraham I 11287d326930SKishon Vijay Abraham I mmc = host->mmc; 11291d3a2220SKishon Vijay Abraham I sdhci_get_of_property(pdev); 11307d326930SKishon Vijay Abraham I ret = mmc_of_parse(mmc); 11317d326930SKishon Vijay Abraham I if (ret) 11327d326930SKishon Vijay Abraham I goto err_pltfm_free; 11337d326930SKishon Vijay Abraham I 1134212f4f8aSKishon Vijay Abraham I soc = soc_device_match(sdhci_omap_soc_devices); 1135212f4f8aSKishon Vijay Abraham I if (soc) { 1136212f4f8aSKishon Vijay Abraham I omap_host->version = "rev11"; 1137212f4f8aSKishon Vijay Abraham I if (!strcmp(dev_name(dev), "4809c000.mmc")) 1138212f4f8aSKishon Vijay Abraham I mmc->f_max = 96000000; 1139212f4f8aSKishon Vijay Abraham I if (!strcmp(dev_name(dev), "480b4000.mmc")) 1140212f4f8aSKishon Vijay Abraham I mmc->f_max = 48000000; 1141212f4f8aSKishon Vijay Abraham I if (!strcmp(dev_name(dev), "480ad000.mmc")) 1142212f4f8aSKishon Vijay Abraham I mmc->f_max = 48000000; 1143212f4f8aSKishon Vijay Abraham I } 1144212f4f8aSKishon Vijay Abraham I 1145031d2cccSKishon Vijay Abraham I if (!mmc_can_gpio_ro(mmc)) 1146031d2cccSKishon Vijay Abraham I mmc->caps2 |= MMC_CAP2_NO_WRITE_PROTECT; 1147031d2cccSKishon Vijay Abraham I 11487d326930SKishon Vijay Abraham I pltfm_host->clk = devm_clk_get(dev, "fck"); 11497d326930SKishon Vijay Abraham I if (IS_ERR(pltfm_host->clk)) { 11507d326930SKishon Vijay Abraham I ret = PTR_ERR(pltfm_host->clk); 11517d326930SKishon Vijay Abraham I goto err_pltfm_free; 11527d326930SKishon Vijay Abraham I } 11537d326930SKishon Vijay Abraham I 11547d326930SKishon Vijay Abraham I ret = clk_set_rate(pltfm_host->clk, mmc->f_max); 11557d326930SKishon Vijay Abraham I if (ret) { 11567d326930SKishon Vijay Abraham I dev_err(dev, "failed to set clock to %d\n", mmc->f_max); 11577d326930SKishon Vijay Abraham I goto err_pltfm_free; 11587d326930SKishon Vijay Abraham I } 11597d326930SKishon Vijay Abraham I 11607d326930SKishon Vijay Abraham I omap_host->pbias = devm_regulator_get_optional(dev, "pbias"); 11617d326930SKishon Vijay Abraham I if (IS_ERR(omap_host->pbias)) { 11627d326930SKishon Vijay Abraham I ret = PTR_ERR(omap_host->pbias); 11637d326930SKishon Vijay Abraham I if (ret != -ENODEV) 11647d326930SKishon Vijay Abraham I goto err_pltfm_free; 11657d326930SKishon Vijay Abraham I dev_dbg(dev, "unable to get pbias regulator %d\n", ret); 11667d326930SKishon Vijay Abraham I } 11677d326930SKishon Vijay Abraham I omap_host->pbias_enabled = false; 11687d326930SKishon Vijay Abraham I 11697d326930SKishon Vijay Abraham I /* 11707d326930SKishon Vijay Abraham I * omap_device_pm_domain has callbacks to enable the main 11717d326930SKishon Vijay Abraham I * functional clock, interface clock and also configure the 11727d326930SKishon Vijay Abraham I * SYSCONFIG register of omap devices. The callback will be invoked 11737d326930SKishon Vijay Abraham I * as part of pm_runtime_get_sync. 11747d326930SKishon Vijay Abraham I */ 11757d326930SKishon Vijay Abraham I pm_runtime_enable(dev); 11767d326930SKishon Vijay Abraham I ret = pm_runtime_get_sync(dev); 11777d326930SKishon Vijay Abraham I if (ret < 0) { 11787d326930SKishon Vijay Abraham I dev_err(dev, "pm_runtime_get_sync failed\n"); 11797d326930SKishon Vijay Abraham I pm_runtime_put_noidle(dev); 11807d326930SKishon Vijay Abraham I goto err_rpm_disable; 11817d326930SKishon Vijay Abraham I } 11827d326930SKishon Vijay Abraham I 11837d326930SKishon Vijay Abraham I ret = sdhci_omap_set_capabilities(omap_host); 11847d326930SKishon Vijay Abraham I if (ret) { 11857d326930SKishon Vijay Abraham I dev_err(dev, "failed to set system capabilities\n"); 11867d326930SKishon Vijay Abraham I goto err_put_sync; 11877d326930SKishon Vijay Abraham I } 11887d326930SKishon Vijay Abraham I 11897d326930SKishon Vijay Abraham I host->mmc_host_ops.start_signal_voltage_switch = 11907d326930SKishon Vijay Abraham I sdhci_omap_start_signal_voltage_switch; 11917d326930SKishon Vijay Abraham I host->mmc_host_ops.set_ios = sdhci_omap_set_ios; 119220ea26a1SKishon Vijay Abraham I host->mmc_host_ops.card_busy = sdhci_omap_card_busy; 11939fc2cd76SKishon Vijay Abraham I host->mmc_host_ops.execute_tuning = sdhci_omap_execute_tuning; 1194efde12b2SKishon Vijay Abraham I host->mmc_host_ops.enable_sdio_irq = sdhci_omap_enable_sdio_irq; 11957d326930SKishon Vijay Abraham I 1196195fadb7SChunyan Zhang /* Switch to external DMA only if there is the "dmas" property */ 1197195fadb7SChunyan Zhang if (of_find_property(dev->of_node, "dmas", NULL)) 1198195fadb7SChunyan Zhang sdhci_switch_external_dma(host, true); 1199195fadb7SChunyan Zhang 1200055e0483SUlf Hansson /* R1B responses is required to properly manage HW busy detection. */ 1201055e0483SUlf Hansson mmc->caps |= MMC_CAP_NEED_RSP_BUSY; 1202055e0483SUlf Hansson 12030ec4ee3cSKishon Vijay Abraham I ret = sdhci_setup_host(host); 12047d326930SKishon Vijay Abraham I if (ret) 12057d326930SKishon Vijay Abraham I goto err_put_sync; 12067d326930SKishon Vijay Abraham I 12070ec4ee3cSKishon Vijay Abraham I ret = sdhci_omap_config_iodelay_pinctrl_state(omap_host); 12080ec4ee3cSKishon Vijay Abraham I if (ret) 12090ec4ee3cSKishon Vijay Abraham I goto err_cleanup_host; 12100ec4ee3cSKishon Vijay Abraham I 12110ec4ee3cSKishon Vijay Abraham I ret = __sdhci_add_host(host); 12120ec4ee3cSKishon Vijay Abraham I if (ret) 12130ec4ee3cSKishon Vijay Abraham I goto err_cleanup_host; 12140ec4ee3cSKishon Vijay Abraham I 12157d326930SKishon Vijay Abraham I return 0; 12167d326930SKishon Vijay Abraham I 12170ec4ee3cSKishon Vijay Abraham I err_cleanup_host: 12180ec4ee3cSKishon Vijay Abraham I sdhci_cleanup_host(host); 12190ec4ee3cSKishon Vijay Abraham I 12207d326930SKishon Vijay Abraham I err_put_sync: 12217d326930SKishon Vijay Abraham I pm_runtime_put_sync(dev); 12227d326930SKishon Vijay Abraham I 12237d326930SKishon Vijay Abraham I err_rpm_disable: 12247d326930SKishon Vijay Abraham I pm_runtime_disable(dev); 12257d326930SKishon Vijay Abraham I 12267d326930SKishon Vijay Abraham I err_pltfm_free: 12277d326930SKishon Vijay Abraham I sdhci_pltfm_free(pdev); 12287d326930SKishon Vijay Abraham I return ret; 12297d326930SKishon Vijay Abraham I } 12307d326930SKishon Vijay Abraham I 12317d326930SKishon Vijay Abraham I static int sdhci_omap_remove(struct platform_device *pdev) 12327d326930SKishon Vijay Abraham I { 12337d326930SKishon Vijay Abraham I struct device *dev = &pdev->dev; 12347d326930SKishon Vijay Abraham I struct sdhci_host *host = platform_get_drvdata(pdev); 12357d326930SKishon Vijay Abraham I 12367d326930SKishon Vijay Abraham I sdhci_remove_host(host, true); 12377d326930SKishon Vijay Abraham I pm_runtime_put_sync(dev); 12387d326930SKishon Vijay Abraham I pm_runtime_disable(dev); 12397d326930SKishon Vijay Abraham I sdhci_pltfm_free(pdev); 12407d326930SKishon Vijay Abraham I 12417d326930SKishon Vijay Abraham I return 0; 12427d326930SKishon Vijay Abraham I } 1243ee0f3092SFaiz Abbas #ifdef CONFIG_PM_SLEEP 1244ee0f3092SFaiz Abbas static void sdhci_omap_context_save(struct sdhci_omap_host *omap_host) 1245ee0f3092SFaiz Abbas { 1246ee0f3092SFaiz Abbas omap_host->con = sdhci_omap_readl(omap_host, SDHCI_OMAP_CON); 1247ee0f3092SFaiz Abbas omap_host->hctl = sdhci_omap_readl(omap_host, SDHCI_OMAP_HCTL); 1248ee0f3092SFaiz Abbas omap_host->capa = sdhci_omap_readl(omap_host, SDHCI_OMAP_CAPA); 1249ee0f3092SFaiz Abbas } 1250ee0f3092SFaiz Abbas 1251ee0f3092SFaiz Abbas static void sdhci_omap_context_restore(struct sdhci_omap_host *omap_host) 1252ee0f3092SFaiz Abbas { 1253ee0f3092SFaiz Abbas sdhci_omap_writel(omap_host, SDHCI_OMAP_CON, omap_host->con); 1254ee0f3092SFaiz Abbas sdhci_omap_writel(omap_host, SDHCI_OMAP_HCTL, omap_host->hctl); 1255ee0f3092SFaiz Abbas sdhci_omap_writel(omap_host, SDHCI_OMAP_CAPA, omap_host->capa); 1256ee0f3092SFaiz Abbas } 1257ee0f3092SFaiz Abbas 1258ee0f3092SFaiz Abbas static int __maybe_unused sdhci_omap_suspend(struct device *dev) 1259ee0f3092SFaiz Abbas { 1260ee0f3092SFaiz Abbas struct sdhci_host *host = dev_get_drvdata(dev); 1261ee0f3092SFaiz Abbas struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); 1262ee0f3092SFaiz Abbas struct sdhci_omap_host *omap_host = sdhci_pltfm_priv(pltfm_host); 1263ee0f3092SFaiz Abbas 1264ee0f3092SFaiz Abbas sdhci_suspend_host(host); 1265ee0f3092SFaiz Abbas 1266ee0f3092SFaiz Abbas sdhci_omap_context_save(omap_host); 1267ee0f3092SFaiz Abbas 1268ee0f3092SFaiz Abbas pinctrl_pm_select_idle_state(dev); 1269ee0f3092SFaiz Abbas 1270ee0f3092SFaiz Abbas pm_runtime_force_suspend(dev); 1271ee0f3092SFaiz Abbas 1272ee0f3092SFaiz Abbas return 0; 1273ee0f3092SFaiz Abbas } 1274ee0f3092SFaiz Abbas 1275ee0f3092SFaiz Abbas static int __maybe_unused sdhci_omap_resume(struct device *dev) 1276ee0f3092SFaiz Abbas { 1277ee0f3092SFaiz Abbas struct sdhci_host *host = dev_get_drvdata(dev); 1278ee0f3092SFaiz Abbas struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); 1279ee0f3092SFaiz Abbas struct sdhci_omap_host *omap_host = sdhci_pltfm_priv(pltfm_host); 1280ee0f3092SFaiz Abbas 1281ee0f3092SFaiz Abbas pm_runtime_force_resume(dev); 1282ee0f3092SFaiz Abbas 1283ee0f3092SFaiz Abbas pinctrl_pm_select_default_state(dev); 1284ee0f3092SFaiz Abbas 1285ee0f3092SFaiz Abbas sdhci_omap_context_restore(omap_host); 1286ee0f3092SFaiz Abbas 1287ee0f3092SFaiz Abbas sdhci_resume_host(host); 1288ee0f3092SFaiz Abbas 1289ee0f3092SFaiz Abbas return 0; 1290ee0f3092SFaiz Abbas } 1291ee0f3092SFaiz Abbas #endif 1292ee0f3092SFaiz Abbas static SIMPLE_DEV_PM_OPS(sdhci_omap_dev_pm_ops, sdhci_omap_suspend, 1293ee0f3092SFaiz Abbas sdhci_omap_resume); 12947d326930SKishon Vijay Abraham I 12957d326930SKishon Vijay Abraham I static struct platform_driver sdhci_omap_driver = { 12967d326930SKishon Vijay Abraham I .probe = sdhci_omap_probe, 12977d326930SKishon Vijay Abraham I .remove = sdhci_omap_remove, 12987d326930SKishon Vijay Abraham I .driver = { 12997d326930SKishon Vijay Abraham I .name = "sdhci-omap", 1300a1a48919SDouglas Anderson .probe_type = PROBE_PREFER_ASYNCHRONOUS, 1301ee0f3092SFaiz Abbas .pm = &sdhci_omap_dev_pm_ops, 13027d326930SKishon Vijay Abraham I .of_match_table = omap_sdhci_match, 13037d326930SKishon Vijay Abraham I }, 13047d326930SKishon Vijay Abraham I }; 13057d326930SKishon Vijay Abraham I 13067d326930SKishon Vijay Abraham I module_platform_driver(sdhci_omap_driver); 13077d326930SKishon Vijay Abraham I 13087d326930SKishon Vijay Abraham I MODULE_DESCRIPTION("SDHCI driver for OMAP SoCs"); 13097d326930SKishon Vijay Abraham I MODULE_AUTHOR("Texas Instruments Inc."); 13107d326930SKishon Vijay Abraham I MODULE_LICENSE("GPL v2"); 13117d326930SKishon Vijay Abraham I MODULE_ALIAS("platform:sdhci_omap"); 1312