1 /* 2 * Freescale eSDHC controller driver. 3 * 4 * Copyright (c) 2007 Freescale Semiconductor, Inc. 5 * Copyright (c) 2009 MontaVista Software, Inc. 6 * 7 * Authors: Xiaobo Xie <X.Xie@freescale.com> 8 * Anton Vorontsov <avorontsov@ru.mvista.com> 9 * 10 * This program is free software; you can redistribute it and/or modify 11 * it under the terms of the GNU General Public License as published by 12 * the Free Software Foundation; either version 2 of the License, or (at 13 * your option) any later version. 14 */ 15 16 #include <linux/io.h> 17 #include <linux/delay.h> 18 #include <linux/mmc/host.h> 19 #include "sdhci-of.h" 20 #include "sdhci.h" 21 #include "sdhci-esdhc.h" 22 23 static u16 esdhc_readw(struct sdhci_host *host, int reg) 24 { 25 u16 ret; 26 27 if (unlikely(reg == SDHCI_HOST_VERSION)) 28 ret = in_be16(host->ioaddr + reg); 29 else 30 ret = sdhci_be32bs_readw(host, reg); 31 return ret; 32 } 33 34 static void esdhc_writew(struct sdhci_host *host, u16 val, int reg) 35 { 36 if (reg == SDHCI_BLOCK_SIZE) { 37 /* 38 * Two last DMA bits are reserved, and first one is used for 39 * non-standard blksz of 4096 bytes that we don't support 40 * yet. So clear the DMA boundary bits. 41 */ 42 val &= ~SDHCI_MAKE_BLKSZ(0x7, 0); 43 } 44 sdhci_be32bs_writew(host, val, reg); 45 } 46 47 static void esdhc_writeb(struct sdhci_host *host, u8 val, int reg) 48 { 49 /* Prevent SDHCI core from writing reserved bits (e.g. HISPD). */ 50 if (reg == SDHCI_HOST_CONTROL) 51 val &= ~ESDHC_HOST_CONTROL_RES; 52 sdhci_be32bs_writeb(host, val, reg); 53 } 54 55 static int esdhc_of_enable_dma(struct sdhci_host *host) 56 { 57 setbits32(host->ioaddr + ESDHC_DMA_SYSCTL, ESDHC_DMA_SNOOP); 58 return 0; 59 } 60 61 static unsigned int esdhc_of_get_max_clock(struct sdhci_host *host) 62 { 63 struct sdhci_of_host *of_host = sdhci_priv(host); 64 65 return of_host->clock; 66 } 67 68 static unsigned int esdhc_of_get_min_clock(struct sdhci_host *host) 69 { 70 struct sdhci_of_host *of_host = sdhci_priv(host); 71 72 return of_host->clock / 256 / 16; 73 } 74 75 struct sdhci_of_data sdhci_esdhc = { 76 .quirks = ESDHC_DEFAULT_QUIRKS, 77 .ops = { 78 .read_l = sdhci_be32bs_readl, 79 .read_w = esdhc_readw, 80 .read_b = sdhci_be32bs_readb, 81 .write_l = sdhci_be32bs_writel, 82 .write_w = esdhc_writew, 83 .write_b = esdhc_writeb, 84 .set_clock = esdhc_set_clock, 85 .enable_dma = esdhc_of_enable_dma, 86 .get_max_clock = esdhc_of_get_max_clock, 87 .get_min_clock = esdhc_of_get_min_clock, 88 }, 89 }; 90