1 /* 2 * Freescale eSDHC controller driver. 3 * 4 * Copyright (c) 2007 Freescale Semiconductor, Inc. 5 * Copyright (c) 2009 MontaVista Software, Inc. 6 * 7 * Authors: Xiaobo Xie <X.Xie@freescale.com> 8 * Anton Vorontsov <avorontsov@ru.mvista.com> 9 * 10 * This program is free software; you can redistribute it and/or modify 11 * it under the terms of the GNU General Public License as published by 12 * the Free Software Foundation; either version 2 of the License, or (at 13 * your option) any later version. 14 */ 15 16 #include <linux/io.h> 17 #include <linux/delay.h> 18 #include <linux/mmc/host.h> 19 #include "sdhci-pltfm.h" 20 #include "sdhci-esdhc.h" 21 22 static u16 esdhc_readw(struct sdhci_host *host, int reg) 23 { 24 u16 ret; 25 26 if (unlikely(reg == SDHCI_HOST_VERSION)) 27 ret = in_be16(host->ioaddr + reg); 28 else 29 ret = sdhci_be32bs_readw(host, reg); 30 return ret; 31 } 32 33 static void esdhc_writew(struct sdhci_host *host, u16 val, int reg) 34 { 35 if (reg == SDHCI_BLOCK_SIZE) { 36 /* 37 * Two last DMA bits are reserved, and first one is used for 38 * non-standard blksz of 4096 bytes that we don't support 39 * yet. So clear the DMA boundary bits. 40 */ 41 val &= ~SDHCI_MAKE_BLKSZ(0x7, 0); 42 } 43 sdhci_be32bs_writew(host, val, reg); 44 } 45 46 static void esdhc_writeb(struct sdhci_host *host, u8 val, int reg) 47 { 48 /* Prevent SDHCI core from writing reserved bits (e.g. HISPD). */ 49 if (reg == SDHCI_HOST_CONTROL) 50 val &= ~ESDHC_HOST_CONTROL_RES; 51 sdhci_be32bs_writeb(host, val, reg); 52 } 53 54 static int esdhc_of_enable_dma(struct sdhci_host *host) 55 { 56 setbits32(host->ioaddr + ESDHC_DMA_SYSCTL, ESDHC_DMA_SNOOP); 57 return 0; 58 } 59 60 static unsigned int esdhc_of_get_max_clock(struct sdhci_host *host) 61 { 62 struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); 63 64 return pltfm_host->clock; 65 } 66 67 static unsigned int esdhc_of_get_min_clock(struct sdhci_host *host) 68 { 69 struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); 70 71 return pltfm_host->clock / 256 / 16; 72 } 73 74 static struct sdhci_ops sdhci_esdhc_ops = { 75 .read_l = sdhci_be32bs_readl, 76 .read_w = esdhc_readw, 77 .read_b = sdhci_be32bs_readb, 78 .write_l = sdhci_be32bs_writel, 79 .write_w = esdhc_writew, 80 .write_b = esdhc_writeb, 81 .set_clock = esdhc_set_clock, 82 .enable_dma = esdhc_of_enable_dma, 83 .get_max_clock = esdhc_of_get_max_clock, 84 .get_min_clock = esdhc_of_get_min_clock, 85 }; 86 87 static struct sdhci_pltfm_data sdhci_esdhc_pdata = { 88 /* card detection could be handled via GPIO */ 89 .quirks = ESDHC_DEFAULT_QUIRKS | SDHCI_QUIRK_BROKEN_CARD_DETECTION 90 | SDHCI_QUIRK_NO_CARD_NO_RESET, 91 .ops = &sdhci_esdhc_ops, 92 }; 93 94 static int __devinit sdhci_esdhc_probe(struct platform_device *pdev) 95 { 96 return sdhci_pltfm_register(pdev, &sdhci_esdhc_pdata); 97 } 98 99 static int __devexit sdhci_esdhc_remove(struct platform_device *pdev) 100 { 101 return sdhci_pltfm_unregister(pdev); 102 } 103 104 static const struct of_device_id sdhci_esdhc_of_match[] = { 105 { .compatible = "fsl,mpc8379-esdhc" }, 106 { .compatible = "fsl,mpc8536-esdhc" }, 107 { .compatible = "fsl,esdhc" }, 108 { } 109 }; 110 MODULE_DEVICE_TABLE(of, sdhci_esdhc_of_match); 111 112 static struct platform_driver sdhci_esdhc_driver = { 113 .driver = { 114 .name = "sdhci-esdhc", 115 .owner = THIS_MODULE, 116 .of_match_table = sdhci_esdhc_of_match, 117 }, 118 .probe = sdhci_esdhc_probe, 119 .remove = __devexit_p(sdhci_esdhc_remove), 120 #ifdef CONFIG_PM 121 .suspend = sdhci_pltfm_suspend, 122 .resume = sdhci_pltfm_resume, 123 #endif 124 }; 125 126 static int __init sdhci_esdhc_init(void) 127 { 128 return platform_driver_register(&sdhci_esdhc_driver); 129 } 130 module_init(sdhci_esdhc_init); 131 132 static void __exit sdhci_esdhc_exit(void) 133 { 134 platform_driver_unregister(&sdhci_esdhc_driver); 135 } 136 module_exit(sdhci_esdhc_exit); 137 138 MODULE_DESCRIPTION("SDHCI OF driver for Freescale MPC eSDHC"); 139 MODULE_AUTHOR("Xiaobo Xie <X.Xie@freescale.com>, " 140 "Anton Vorontsov <avorontsov@ru.mvista.com>"); 141 MODULE_LICENSE("GPL v2"); 142