17657c3a7SAlbert Herranz /*
27657c3a7SAlbert Herranz  * Freescale eSDHC controller driver.
37657c3a7SAlbert Herranz  *
4e51cbc9eSXu lei  * Copyright (c) 2007, 2010 Freescale Semiconductor, Inc.
57657c3a7SAlbert Herranz  * Copyright (c) 2009 MontaVista Software, Inc.
67657c3a7SAlbert Herranz  *
77657c3a7SAlbert Herranz  * Authors: Xiaobo Xie <X.Xie@freescale.com>
87657c3a7SAlbert Herranz  *	    Anton Vorontsov <avorontsov@ru.mvista.com>
97657c3a7SAlbert Herranz  *
107657c3a7SAlbert Herranz  * This program is free software; you can redistribute it and/or modify
117657c3a7SAlbert Herranz  * it under the terms of the GNU General Public License as published by
127657c3a7SAlbert Herranz  * the Free Software Foundation; either version 2 of the License, or (at
137657c3a7SAlbert Herranz  * your option) any later version.
147657c3a7SAlbert Herranz  */
157657c3a7SAlbert Herranz 
167657c3a7SAlbert Herranz #include <linux/io.h>
177657c3a7SAlbert Herranz #include <linux/delay.h>
1888b47679SPaul Gortmaker #include <linux/module.h>
197657c3a7SAlbert Herranz #include <linux/mmc/host.h>
2038576af1SShawn Guo #include "sdhci-pltfm.h"
2180872e21SWolfram Sang #include "sdhci-esdhc.h"
227657c3a7SAlbert Herranz 
237657c3a7SAlbert Herranz static u16 esdhc_readw(struct sdhci_host *host, int reg)
247657c3a7SAlbert Herranz {
257657c3a7SAlbert Herranz 	u16 ret;
26e51cbc9eSXu lei 	int base = reg & ~0x3;
27e51cbc9eSXu lei 	int shift = (reg & 0x2) * 8;
287657c3a7SAlbert Herranz 
297657c3a7SAlbert Herranz 	if (unlikely(reg == SDHCI_HOST_VERSION))
30e51cbc9eSXu lei 		ret = in_be32(host->ioaddr + base) & 0xffff;
317657c3a7SAlbert Herranz 	else
32e51cbc9eSXu lei 		ret = (in_be32(host->ioaddr + base) >> shift) & 0xffff;
33e51cbc9eSXu lei 	return ret;
34e51cbc9eSXu lei }
35e51cbc9eSXu lei 
36e51cbc9eSXu lei static u8 esdhc_readb(struct sdhci_host *host, int reg)
37e51cbc9eSXu lei {
38e51cbc9eSXu lei 	int base = reg & ~0x3;
39e51cbc9eSXu lei 	int shift = (reg & 0x3) * 8;
40e51cbc9eSXu lei 	u8 ret = (in_be32(host->ioaddr + base) >> shift) & 0xff;
417657c3a7SAlbert Herranz 	return ret;
427657c3a7SAlbert Herranz }
437657c3a7SAlbert Herranz 
447657c3a7SAlbert Herranz static void esdhc_writew(struct sdhci_host *host, u16 val, int reg)
457657c3a7SAlbert Herranz {
467657c3a7SAlbert Herranz 	if (reg == SDHCI_BLOCK_SIZE) {
477657c3a7SAlbert Herranz 		/*
487657c3a7SAlbert Herranz 		 * Two last DMA bits are reserved, and first one is used for
497657c3a7SAlbert Herranz 		 * non-standard blksz of 4096 bytes that we don't support
507657c3a7SAlbert Herranz 		 * yet. So clear the DMA boundary bits.
517657c3a7SAlbert Herranz 		 */
527657c3a7SAlbert Herranz 		val &= ~SDHCI_MAKE_BLKSZ(0x7, 0);
537657c3a7SAlbert Herranz 	}
547657c3a7SAlbert Herranz 	sdhci_be32bs_writew(host, val, reg);
557657c3a7SAlbert Herranz }
567657c3a7SAlbert Herranz 
577657c3a7SAlbert Herranz static void esdhc_writeb(struct sdhci_host *host, u8 val, int reg)
587657c3a7SAlbert Herranz {
597657c3a7SAlbert Herranz 	/* Prevent SDHCI core from writing reserved bits (e.g. HISPD). */
607657c3a7SAlbert Herranz 	if (reg == SDHCI_HOST_CONTROL)
617657c3a7SAlbert Herranz 		val &= ~ESDHC_HOST_CONTROL_RES;
627657c3a7SAlbert Herranz 	sdhci_be32bs_writeb(host, val, reg);
637657c3a7SAlbert Herranz }
647657c3a7SAlbert Herranz 
6580872e21SWolfram Sang static int esdhc_of_enable_dma(struct sdhci_host *host)
667657c3a7SAlbert Herranz {
677657c3a7SAlbert Herranz 	setbits32(host->ioaddr + ESDHC_DMA_SYSCTL, ESDHC_DMA_SNOOP);
687657c3a7SAlbert Herranz 	return 0;
697657c3a7SAlbert Herranz }
707657c3a7SAlbert Herranz 
7180872e21SWolfram Sang static unsigned int esdhc_of_get_max_clock(struct sdhci_host *host)
727657c3a7SAlbert Herranz {
73e307148fSShawn Guo 	struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
747657c3a7SAlbert Herranz 
75e307148fSShawn Guo 	return pltfm_host->clock;
767657c3a7SAlbert Herranz }
777657c3a7SAlbert Herranz 
7880872e21SWolfram Sang static unsigned int esdhc_of_get_min_clock(struct sdhci_host *host)
797657c3a7SAlbert Herranz {
80e307148fSShawn Guo 	struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
817657c3a7SAlbert Herranz 
82e307148fSShawn Guo 	return pltfm_host->clock / 256 / 16;
837657c3a7SAlbert Herranz }
847657c3a7SAlbert Herranz 
85e307148fSShawn Guo static struct sdhci_ops sdhci_esdhc_ops = {
86dc297c92SMatt Fleming 	.read_l = sdhci_be32bs_readl,
87dc297c92SMatt Fleming 	.read_w = esdhc_readw,
88e51cbc9eSXu lei 	.read_b = esdhc_readb,
89dc297c92SMatt Fleming 	.write_l = sdhci_be32bs_writel,
90dc297c92SMatt Fleming 	.write_w = esdhc_writew,
91dc297c92SMatt Fleming 	.write_b = esdhc_writeb,
927657c3a7SAlbert Herranz 	.set_clock = esdhc_set_clock,
9380872e21SWolfram Sang 	.enable_dma = esdhc_of_enable_dma,
9480872e21SWolfram Sang 	.get_max_clock = esdhc_of_get_max_clock,
9580872e21SWolfram Sang 	.get_min_clock = esdhc_of_get_min_clock,
96e307148fSShawn Guo };
97e307148fSShawn Guo 
9838576af1SShawn Guo static struct sdhci_pltfm_data sdhci_esdhc_pdata = {
99e307148fSShawn Guo 	/* card detection could be handled via GPIO */
100e307148fSShawn Guo 	.quirks = ESDHC_DEFAULT_QUIRKS | SDHCI_QUIRK_BROKEN_CARD_DETECTION
101e307148fSShawn Guo 		| SDHCI_QUIRK_NO_CARD_NO_RESET,
102e307148fSShawn Guo 	.ops = &sdhci_esdhc_ops,
1037657c3a7SAlbert Herranz };
10438576af1SShawn Guo 
10538576af1SShawn Guo static int __devinit sdhci_esdhc_probe(struct platform_device *pdev)
10638576af1SShawn Guo {
10738576af1SShawn Guo 	return sdhci_pltfm_register(pdev, &sdhci_esdhc_pdata);
10838576af1SShawn Guo }
10938576af1SShawn Guo 
11038576af1SShawn Guo static int __devexit sdhci_esdhc_remove(struct platform_device *pdev)
11138576af1SShawn Guo {
11238576af1SShawn Guo 	return sdhci_pltfm_unregister(pdev);
11338576af1SShawn Guo }
11438576af1SShawn Guo 
11538576af1SShawn Guo static const struct of_device_id sdhci_esdhc_of_match[] = {
11638576af1SShawn Guo 	{ .compatible = "fsl,mpc8379-esdhc" },
11738576af1SShawn Guo 	{ .compatible = "fsl,mpc8536-esdhc" },
11838576af1SShawn Guo 	{ .compatible = "fsl,esdhc" },
11938576af1SShawn Guo 	{ }
12038576af1SShawn Guo };
12138576af1SShawn Guo MODULE_DEVICE_TABLE(of, sdhci_esdhc_of_match);
12238576af1SShawn Guo 
12338576af1SShawn Guo static struct platform_driver sdhci_esdhc_driver = {
12438576af1SShawn Guo 	.driver = {
12538576af1SShawn Guo 		.name = "sdhci-esdhc",
12638576af1SShawn Guo 		.owner = THIS_MODULE,
12738576af1SShawn Guo 		.of_match_table = sdhci_esdhc_of_match,
12838576af1SShawn Guo 	},
12938576af1SShawn Guo 	.probe = sdhci_esdhc_probe,
13038576af1SShawn Guo 	.remove = __devexit_p(sdhci_esdhc_remove),
13138576af1SShawn Guo #ifdef CONFIG_PM
13238576af1SShawn Guo 	.suspend = sdhci_pltfm_suspend,
13338576af1SShawn Guo 	.resume = sdhci_pltfm_resume,
13438576af1SShawn Guo #endif
13538576af1SShawn Guo };
13638576af1SShawn Guo 
13738576af1SShawn Guo static int __init sdhci_esdhc_init(void)
13838576af1SShawn Guo {
13938576af1SShawn Guo 	return platform_driver_register(&sdhci_esdhc_driver);
14038576af1SShawn Guo }
14138576af1SShawn Guo module_init(sdhci_esdhc_init);
14238576af1SShawn Guo 
14338576af1SShawn Guo static void __exit sdhci_esdhc_exit(void)
14438576af1SShawn Guo {
14538576af1SShawn Guo 	platform_driver_unregister(&sdhci_esdhc_driver);
14638576af1SShawn Guo }
14738576af1SShawn Guo module_exit(sdhci_esdhc_exit);
14838576af1SShawn Guo 
14938576af1SShawn Guo MODULE_DESCRIPTION("SDHCI OF driver for Freescale MPC eSDHC");
15038576af1SShawn Guo MODULE_AUTHOR("Xiaobo Xie <X.Xie@freescale.com>, "
15138576af1SShawn Guo 	      "Anton Vorontsov <avorontsov@ru.mvista.com>");
15238576af1SShawn Guo MODULE_LICENSE("GPL v2");
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