1 /*
2  * Arasan Secure Digital Host Controller Interface.
3  * Copyright (C) 2011 - 2012 Michal Simek <monstr@monstr.eu>
4  * Copyright (c) 2012 Wind River Systems, Inc.
5  * Copyright (C) 2013 Pengutronix e.K.
6  * Copyright (C) 2013 Xilinx Inc.
7  *
8  * Based on sdhci-of-esdhc.c
9  *
10  * Copyright (c) 2007 Freescale Semiconductor, Inc.
11  * Copyright (c) 2009 MontaVista Software, Inc.
12  *
13  * Authors: Xiaobo Xie <X.Xie@freescale.com>
14  *	    Anton Vorontsov <avorontsov@ru.mvista.com>
15  *
16  * This program is free software; you can redistribute it and/or modify
17  * it under the terms of the GNU General Public License as published by
18  * the Free Software Foundation; either version 2 of the License, or (at
19  * your option) any later version.
20  */
21 
22 #include <linux/module.h>
23 #include <linux/of_device.h>
24 #include <linux/phy/phy.h>
25 #include "sdhci-pltfm.h"
26 
27 #define SDHCI_ARASAN_CLK_CTRL_OFFSET	0x2c
28 
29 #define CLK_CTRL_TIMEOUT_SHIFT		16
30 #define CLK_CTRL_TIMEOUT_MASK		(0xf << CLK_CTRL_TIMEOUT_SHIFT)
31 #define CLK_CTRL_TIMEOUT_MIN_EXP	13
32 
33 /**
34  * struct sdhci_arasan_data
35  * @clk_ahb:	Pointer to the AHB clock
36  * @phy: Pointer to the generic phy
37  */
38 struct sdhci_arasan_data {
39 	struct clk	*clk_ahb;
40 	struct phy	*phy;
41 };
42 
43 static unsigned int sdhci_arasan_get_timeout_clock(struct sdhci_host *host)
44 {
45 	u32 div;
46 	unsigned long freq;
47 	struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
48 
49 	div = readl(host->ioaddr + SDHCI_ARASAN_CLK_CTRL_OFFSET);
50 	div = (div & CLK_CTRL_TIMEOUT_MASK) >> CLK_CTRL_TIMEOUT_SHIFT;
51 
52 	freq = clk_get_rate(pltfm_host->clk);
53 	freq /= 1 << (CLK_CTRL_TIMEOUT_MIN_EXP + div);
54 
55 	return freq;
56 }
57 
58 static void sdhci_arasan_set_clock(struct sdhci_host *host, unsigned int clock)
59 {
60 	struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
61 	struct sdhci_arasan_data *sdhci_arasan = sdhci_pltfm_priv(pltfm_host);
62 	bool ctrl_phy = false;
63 
64 	if (clock > MMC_HIGH_52_MAX_DTR && (!IS_ERR(sdhci_arasan->phy)))
65 		ctrl_phy = true;
66 
67 	if (ctrl_phy) {
68 		spin_unlock_irq(&host->lock);
69 		phy_power_off(sdhci_arasan->phy);
70 		spin_lock_irq(&host->lock);
71 	}
72 
73 	sdhci_set_clock(host, clock);
74 
75 	if (ctrl_phy) {
76 		spin_unlock_irq(&host->lock);
77 		phy_power_on(sdhci_arasan->phy);
78 		spin_lock_irq(&host->lock);
79 	}
80 }
81 
82 static struct sdhci_ops sdhci_arasan_ops = {
83 	.set_clock = sdhci_arasan_set_clock,
84 	.get_max_clock = sdhci_pltfm_clk_get_max_clock,
85 	.get_timeout_clock = sdhci_arasan_get_timeout_clock,
86 	.set_bus_width = sdhci_set_bus_width,
87 	.reset = sdhci_reset,
88 	.set_uhs_signaling = sdhci_set_uhs_signaling,
89 };
90 
91 static struct sdhci_pltfm_data sdhci_arasan_pdata = {
92 	.ops = &sdhci_arasan_ops,
93 	.quirks = SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN,
94 	.quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN |
95 			SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN,
96 };
97 
98 #ifdef CONFIG_PM_SLEEP
99 /**
100  * sdhci_arasan_suspend - Suspend method for the driver
101  * @dev:	Address of the device structure
102  * Returns 0 on success and error value on error
103  *
104  * Put the device in a low power state.
105  */
106 static int sdhci_arasan_suspend(struct device *dev)
107 {
108 	struct platform_device *pdev = to_platform_device(dev);
109 	struct sdhci_host *host = platform_get_drvdata(pdev);
110 	struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
111 	struct sdhci_arasan_data *sdhci_arasan = sdhci_pltfm_priv(pltfm_host);
112 	int ret;
113 
114 	ret = sdhci_suspend_host(host);
115 	if (ret)
116 		return ret;
117 
118 	if (!IS_ERR(sdhci_arasan->phy)) {
119 		ret = phy_power_off(sdhci_arasan->phy);
120 		if (ret) {
121 			dev_err(dev, "Cannot power off phy.\n");
122 			sdhci_resume_host(host);
123 			return ret;
124 		}
125 	}
126 
127 	clk_disable(pltfm_host->clk);
128 	clk_disable(sdhci_arasan->clk_ahb);
129 
130 	return 0;
131 }
132 
133 /**
134  * sdhci_arasan_resume - Resume method for the driver
135  * @dev:	Address of the device structure
136  * Returns 0 on success and error value on error
137  *
138  * Resume operation after suspend
139  */
140 static int sdhci_arasan_resume(struct device *dev)
141 {
142 	struct platform_device *pdev = to_platform_device(dev);
143 	struct sdhci_host *host = platform_get_drvdata(pdev);
144 	struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
145 	struct sdhci_arasan_data *sdhci_arasan = sdhci_pltfm_priv(pltfm_host);
146 	int ret;
147 
148 	ret = clk_enable(sdhci_arasan->clk_ahb);
149 	if (ret) {
150 		dev_err(dev, "Cannot enable AHB clock.\n");
151 		return ret;
152 	}
153 
154 	ret = clk_enable(pltfm_host->clk);
155 	if (ret) {
156 		dev_err(dev, "Cannot enable SD clock.\n");
157 		return ret;
158 	}
159 
160 	if (!IS_ERR(sdhci_arasan->phy)) {
161 		ret = phy_power_on(sdhci_arasan->phy);
162 		if (ret) {
163 			dev_err(dev, "Cannot power on phy.\n");
164 			return ret;
165 		}
166 	}
167 
168 	return sdhci_resume_host(host);
169 }
170 #endif /* ! CONFIG_PM_SLEEP */
171 
172 static SIMPLE_DEV_PM_OPS(sdhci_arasan_dev_pm_ops, sdhci_arasan_suspend,
173 			 sdhci_arasan_resume);
174 
175 static int sdhci_arasan_probe(struct platform_device *pdev)
176 {
177 	int ret;
178 	struct clk *clk_xin;
179 	struct sdhci_host *host;
180 	struct sdhci_pltfm_host *pltfm_host;
181 	struct sdhci_arasan_data *sdhci_arasan;
182 
183 	host = sdhci_pltfm_init(pdev, &sdhci_arasan_pdata,
184 				sizeof(*sdhci_arasan));
185 	if (IS_ERR(host))
186 		return PTR_ERR(host);
187 
188 	pltfm_host = sdhci_priv(host);
189 	sdhci_arasan = sdhci_pltfm_priv(pltfm_host);
190 
191 	sdhci_arasan->clk_ahb = devm_clk_get(&pdev->dev, "clk_ahb");
192 	if (IS_ERR(sdhci_arasan->clk_ahb)) {
193 		dev_err(&pdev->dev, "clk_ahb clock not found.\n");
194 		ret = PTR_ERR(sdhci_arasan->clk_ahb);
195 		goto err_pltfm_free;
196 	}
197 
198 	clk_xin = devm_clk_get(&pdev->dev, "clk_xin");
199 	if (IS_ERR(clk_xin)) {
200 		dev_err(&pdev->dev, "clk_xin clock not found.\n");
201 		ret = PTR_ERR(clk_xin);
202 		goto err_pltfm_free;
203 	}
204 
205 	ret = clk_prepare_enable(sdhci_arasan->clk_ahb);
206 	if (ret) {
207 		dev_err(&pdev->dev, "Unable to enable AHB clock.\n");
208 		goto err_pltfm_free;
209 	}
210 
211 	ret = clk_prepare_enable(clk_xin);
212 	if (ret) {
213 		dev_err(&pdev->dev, "Unable to enable SD clock.\n");
214 		goto clk_dis_ahb;
215 	}
216 
217 	sdhci_get_of_property(pdev);
218 	pltfm_host->clk = clk_xin;
219 
220 	ret = mmc_of_parse(host->mmc);
221 	if (ret) {
222 		dev_err(&pdev->dev, "parsing dt failed (%u)\n", ret);
223 		goto clk_disable_all;
224 	}
225 
226 	sdhci_arasan->phy = ERR_PTR(-ENODEV);
227 	if (of_device_is_compatible(pdev->dev.of_node,
228 				    "arasan,sdhci-5.1")) {
229 		sdhci_arasan->phy = devm_phy_get(&pdev->dev,
230 						 "phy_arasan");
231 		if (IS_ERR(sdhci_arasan->phy)) {
232 			ret = PTR_ERR(sdhci_arasan->phy);
233 			dev_err(&pdev->dev, "No phy for arasan,sdhci-5.1.\n");
234 			goto clk_disable_all;
235 		}
236 
237 		ret = phy_init(sdhci_arasan->phy);
238 		if (ret < 0) {
239 			dev_err(&pdev->dev, "phy_init err.\n");
240 			goto clk_disable_all;
241 		}
242 
243 		ret = phy_power_on(sdhci_arasan->phy);
244 		if (ret < 0) {
245 			dev_err(&pdev->dev, "phy_power_on err.\n");
246 			goto err_phy_power;
247 		}
248 	}
249 
250 	ret = sdhci_add_host(host);
251 	if (ret)
252 		goto err_add_host;
253 
254 	return 0;
255 
256 err_add_host:
257 	if (!IS_ERR(sdhci_arasan->phy))
258 		phy_power_off(sdhci_arasan->phy);
259 err_phy_power:
260 	if (!IS_ERR(sdhci_arasan->phy))
261 		phy_exit(sdhci_arasan->phy);
262 clk_disable_all:
263 	clk_disable_unprepare(clk_xin);
264 clk_dis_ahb:
265 	clk_disable_unprepare(sdhci_arasan->clk_ahb);
266 err_pltfm_free:
267 	sdhci_pltfm_free(pdev);
268 	return ret;
269 }
270 
271 static int sdhci_arasan_remove(struct platform_device *pdev)
272 {
273 	int ret;
274 	struct sdhci_host *host = platform_get_drvdata(pdev);
275 	struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
276 	struct sdhci_arasan_data *sdhci_arasan = sdhci_pltfm_priv(pltfm_host);
277 	struct clk *clk_ahb = sdhci_arasan->clk_ahb;
278 
279 	if (!IS_ERR(sdhci_arasan->phy)) {
280 		phy_power_off(sdhci_arasan->phy);
281 		phy_exit(sdhci_arasan->phy);
282 	}
283 
284 	ret = sdhci_pltfm_unregister(pdev);
285 
286 	clk_disable_unprepare(clk_ahb);
287 
288 	return ret;
289 }
290 
291 static const struct of_device_id sdhci_arasan_of_match[] = {
292 	{ .compatible = "arasan,sdhci-8.9a" },
293 	{ .compatible = "arasan,sdhci-5.1" },
294 	{ .compatible = "arasan,sdhci-4.9a" },
295 	{ }
296 };
297 MODULE_DEVICE_TABLE(of, sdhci_arasan_of_match);
298 
299 static struct platform_driver sdhci_arasan_driver = {
300 	.driver = {
301 		.name = "sdhci-arasan",
302 		.of_match_table = sdhci_arasan_of_match,
303 		.pm = &sdhci_arasan_dev_pm_ops,
304 	},
305 	.probe = sdhci_arasan_probe,
306 	.remove = sdhci_arasan_remove,
307 };
308 
309 module_platform_driver(sdhci_arasan_driver);
310 
311 MODULE_DESCRIPTION("Driver for the Arasan SDHCI Controller");
312 MODULE_AUTHOR("Soeren Brinkmann <soren.brinkmann@xilinx.com>");
313 MODULE_LICENSE("GPL");
314