1e3ec3a3dSSoren Brinkmann /* 2e3ec3a3dSSoren Brinkmann * Arasan Secure Digital Host Controller Interface. 3e3ec3a3dSSoren Brinkmann * Copyright (C) 2011 - 2012 Michal Simek <monstr@monstr.eu> 4e3ec3a3dSSoren Brinkmann * Copyright (c) 2012 Wind River Systems, Inc. 5e3ec3a3dSSoren Brinkmann * Copyright (C) 2013 Pengutronix e.K. 6e3ec3a3dSSoren Brinkmann * Copyright (C) 2013 Xilinx Inc. 7e3ec3a3dSSoren Brinkmann * 8e3ec3a3dSSoren Brinkmann * Based on sdhci-of-esdhc.c 9e3ec3a3dSSoren Brinkmann * 10e3ec3a3dSSoren Brinkmann * Copyright (c) 2007 Freescale Semiconductor, Inc. 11e3ec3a3dSSoren Brinkmann * Copyright (c) 2009 MontaVista Software, Inc. 12e3ec3a3dSSoren Brinkmann * 13e3ec3a3dSSoren Brinkmann * Authors: Xiaobo Xie <X.Xie@freescale.com> 14e3ec3a3dSSoren Brinkmann * Anton Vorontsov <avorontsov@ru.mvista.com> 15e3ec3a3dSSoren Brinkmann * 16e3ec3a3dSSoren Brinkmann * This program is free software; you can redistribute it and/or modify 17e3ec3a3dSSoren Brinkmann * it under the terms of the GNU General Public License as published by 18e3ec3a3dSSoren Brinkmann * the Free Software Foundation; either version 2 of the License, or (at 19e3ec3a3dSSoren Brinkmann * your option) any later version. 20e3ec3a3dSSoren Brinkmann */ 21e3ec3a3dSSoren Brinkmann 22c390f211SDouglas Anderson #include <linux/clk-provider.h> 233ea4666eSDouglas Anderson #include <linux/mfd/syscon.h> 24e3ec3a3dSSoren Brinkmann #include <linux/module.h> 25308f3f8dSSuman Tripathi #include <linux/of_device.h> 2691aa3661SShawn Lin #include <linux/phy/phy.h> 273ea4666eSDouglas Anderson #include <linux/regmap.h> 28e3ec3a3dSSoren Brinkmann #include "sdhci-pltfm.h" 293794c542SZach Brown #include <linux/of.h> 30e3ec3a3dSSoren Brinkmann 31a05c8465SShawn Lin #define SDHCI_ARASAN_VENDOR_REGISTER 0x78 32e3ec3a3dSSoren Brinkmann 33a05c8465SShawn Lin #define VENDOR_ENHANCED_STROBE BIT(0) 34e3ec3a3dSSoren Brinkmann 35b2db9c67SDouglas Anderson #define PHY_CLK_TOO_SLOW_HZ 400000 36b2db9c67SDouglas Anderson 373ea4666eSDouglas Anderson /* 383ea4666eSDouglas Anderson * On some SoCs the syscon area has a feature where the upper 16-bits of 393ea4666eSDouglas Anderson * each 32-bit register act as a write mask for the lower 16-bits. This allows 403ea4666eSDouglas Anderson * atomic updates of the register without locking. This macro is used on SoCs 413ea4666eSDouglas Anderson * that have that feature. 423ea4666eSDouglas Anderson */ 433ea4666eSDouglas Anderson #define HIWORD_UPDATE(val, mask, shift) \ 443ea4666eSDouglas Anderson ((val) << (shift) | (mask) << ((shift) + 16)) 453ea4666eSDouglas Anderson 463ea4666eSDouglas Anderson /** 473ea4666eSDouglas Anderson * struct sdhci_arasan_soc_ctl_field - Field used in sdhci_arasan_soc_ctl_map 483ea4666eSDouglas Anderson * 493ea4666eSDouglas Anderson * @reg: Offset within the syscon of the register containing this field 503ea4666eSDouglas Anderson * @width: Number of bits for this field 513ea4666eSDouglas Anderson * @shift: Bit offset within @reg of this field (or -1 if not avail) 523ea4666eSDouglas Anderson */ 533ea4666eSDouglas Anderson struct sdhci_arasan_soc_ctl_field { 543ea4666eSDouglas Anderson u32 reg; 553ea4666eSDouglas Anderson u16 width; 563ea4666eSDouglas Anderson s16 shift; 573ea4666eSDouglas Anderson }; 583ea4666eSDouglas Anderson 593ea4666eSDouglas Anderson /** 603ea4666eSDouglas Anderson * struct sdhci_arasan_soc_ctl_map - Map in syscon to corecfg registers 613ea4666eSDouglas Anderson * 623ea4666eSDouglas Anderson * It's up to the licensee of the Arsan IP block to make these available 633ea4666eSDouglas Anderson * somewhere if needed. Presumably these will be scattered somewhere that's 643ea4666eSDouglas Anderson * accessible via the syscon API. 653ea4666eSDouglas Anderson * 663ea4666eSDouglas Anderson * @baseclkfreq: Where to find corecfg_baseclkfreq 67b2ca77c9SShawn Lin * @clockmultiplier: Where to find corecfg_clockmultiplier 683ea4666eSDouglas Anderson * @hiword_update: If true, use HIWORD_UPDATE to access the syscon 693ea4666eSDouglas Anderson */ 703ea4666eSDouglas Anderson struct sdhci_arasan_soc_ctl_map { 713ea4666eSDouglas Anderson struct sdhci_arasan_soc_ctl_field baseclkfreq; 72b2ca77c9SShawn Lin struct sdhci_arasan_soc_ctl_field clockmultiplier; 733ea4666eSDouglas Anderson bool hiword_update; 743ea4666eSDouglas Anderson }; 753ea4666eSDouglas Anderson 76e3ec3a3dSSoren Brinkmann /** 77e3ec3a3dSSoren Brinkmann * struct sdhci_arasan_data 78c390f211SDouglas Anderson * @host: Pointer to the main SDHCI host structure. 79e3ec3a3dSSoren Brinkmann * @clk_ahb: Pointer to the AHB clock 8091aa3661SShawn Lin * @phy: Pointer to the generic phy 81b2db9c67SDouglas Anderson * @is_phy_on: True if the PHY is on; false if not. 82c390f211SDouglas Anderson * @sdcardclk_hw: Struct for the clock we might provide to a PHY. 83c390f211SDouglas Anderson * @sdcardclk: Pointer to normal 'struct clock' for sdcardclk_hw. 843ea4666eSDouglas Anderson * @soc_ctl_base: Pointer to regmap for syscon for soc_ctl registers. 853ea4666eSDouglas Anderson * @soc_ctl_map: Map to get offsets into soc_ctl registers. 86e3ec3a3dSSoren Brinkmann */ 87e3ec3a3dSSoren Brinkmann struct sdhci_arasan_data { 88c390f211SDouglas Anderson struct sdhci_host *host; 89e3ec3a3dSSoren Brinkmann struct clk *clk_ahb; 9091aa3661SShawn Lin struct phy *phy; 91b2db9c67SDouglas Anderson bool is_phy_on; 923ea4666eSDouglas Anderson 93c390f211SDouglas Anderson struct clk_hw sdcardclk_hw; 94c390f211SDouglas Anderson struct clk *sdcardclk; 95c390f211SDouglas Anderson 963ea4666eSDouglas Anderson struct regmap *soc_ctl_base; 973ea4666eSDouglas Anderson const struct sdhci_arasan_soc_ctl_map *soc_ctl_map; 983794c542SZach Brown unsigned int quirks; /* Arasan deviations from spec */ 993794c542SZach Brown 1003794c542SZach Brown /* Controller does not have CD wired and will not function normally without */ 1013794c542SZach Brown #define SDHCI_ARASAN_QUIRK_FORCE_CDTEST BIT(0) 102e3ec3a3dSSoren Brinkmann }; 103e3ec3a3dSSoren Brinkmann 1043ea4666eSDouglas Anderson static const struct sdhci_arasan_soc_ctl_map rk3399_soc_ctl_map = { 1053ea4666eSDouglas Anderson .baseclkfreq = { .reg = 0xf000, .width = 8, .shift = 8 }, 106b2ca77c9SShawn Lin .clockmultiplier = { .reg = 0xf02c, .width = 8, .shift = 0}, 1073ea4666eSDouglas Anderson .hiword_update = true, 1083ea4666eSDouglas Anderson }; 1093ea4666eSDouglas Anderson 1103ea4666eSDouglas Anderson /** 1113ea4666eSDouglas Anderson * sdhci_arasan_syscon_write - Write to a field in soc_ctl registers 1123ea4666eSDouglas Anderson * 1133ea4666eSDouglas Anderson * This function allows writing to fields in sdhci_arasan_soc_ctl_map. 1143ea4666eSDouglas Anderson * Note that if a field is specified as not available (shift < 0) then 1153ea4666eSDouglas Anderson * this function will silently return an error code. It will be noisy 1163ea4666eSDouglas Anderson * and print errors for any other (unexpected) errors. 1173ea4666eSDouglas Anderson * 1183ea4666eSDouglas Anderson * @host: The sdhci_host 1193ea4666eSDouglas Anderson * @fld: The field to write to 1203ea4666eSDouglas Anderson * @val: The value to write 1213ea4666eSDouglas Anderson */ 1223ea4666eSDouglas Anderson static int sdhci_arasan_syscon_write(struct sdhci_host *host, 1233ea4666eSDouglas Anderson const struct sdhci_arasan_soc_ctl_field *fld, 1243ea4666eSDouglas Anderson u32 val) 1253ea4666eSDouglas Anderson { 1263ea4666eSDouglas Anderson struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); 1273ea4666eSDouglas Anderson struct sdhci_arasan_data *sdhci_arasan = sdhci_pltfm_priv(pltfm_host); 1283ea4666eSDouglas Anderson struct regmap *soc_ctl_base = sdhci_arasan->soc_ctl_base; 1293ea4666eSDouglas Anderson u32 reg = fld->reg; 1303ea4666eSDouglas Anderson u16 width = fld->width; 1313ea4666eSDouglas Anderson s16 shift = fld->shift; 1323ea4666eSDouglas Anderson int ret; 1333ea4666eSDouglas Anderson 1343ea4666eSDouglas Anderson /* 1353ea4666eSDouglas Anderson * Silently return errors for shift < 0 so caller doesn't have 1363ea4666eSDouglas Anderson * to check for fields which are optional. For fields that 1373ea4666eSDouglas Anderson * are required then caller needs to do something special 1383ea4666eSDouglas Anderson * anyway. 1393ea4666eSDouglas Anderson */ 1403ea4666eSDouglas Anderson if (shift < 0) 1413ea4666eSDouglas Anderson return -EINVAL; 1423ea4666eSDouglas Anderson 1433ea4666eSDouglas Anderson if (sdhci_arasan->soc_ctl_map->hiword_update) 1443ea4666eSDouglas Anderson ret = regmap_write(soc_ctl_base, reg, 1453ea4666eSDouglas Anderson HIWORD_UPDATE(val, GENMASK(width, 0), 1463ea4666eSDouglas Anderson shift)); 1473ea4666eSDouglas Anderson else 1483ea4666eSDouglas Anderson ret = regmap_update_bits(soc_ctl_base, reg, 1493ea4666eSDouglas Anderson GENMASK(shift + width, shift), 1503ea4666eSDouglas Anderson val << shift); 1513ea4666eSDouglas Anderson 1523ea4666eSDouglas Anderson /* Yell about (unexpected) regmap errors */ 1533ea4666eSDouglas Anderson if (ret) 1543ea4666eSDouglas Anderson pr_warn("%s: Regmap write fail: %d\n", 1553ea4666eSDouglas Anderson mmc_hostname(host->mmc), ret); 1563ea4666eSDouglas Anderson 1573ea4666eSDouglas Anderson return ret; 1583ea4666eSDouglas Anderson } 1593ea4666eSDouglas Anderson 160802ac39aSShawn Lin static void sdhci_arasan_set_clock(struct sdhci_host *host, unsigned int clock) 161802ac39aSShawn Lin { 162802ac39aSShawn Lin struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); 163802ac39aSShawn Lin struct sdhci_arasan_data *sdhci_arasan = sdhci_pltfm_priv(pltfm_host); 1646fc09244SDouglas Anderson bool ctrl_phy = false; 165802ac39aSShawn Lin 166b2db9c67SDouglas Anderson if (!IS_ERR(sdhci_arasan->phy)) { 167b2db9c67SDouglas Anderson if (!sdhci_arasan->is_phy_on && clock <= PHY_CLK_TOO_SLOW_HZ) { 168b2db9c67SDouglas Anderson /* 169b2db9c67SDouglas Anderson * If PHY off, set clock to max speed and power PHY on. 170b2db9c67SDouglas Anderson * 171b2db9c67SDouglas Anderson * Although PHY docs apparently suggest power cycling 172b2db9c67SDouglas Anderson * when changing the clock the PHY doesn't like to be 173b2db9c67SDouglas Anderson * powered on while at low speeds like those used in ID 174b2db9c67SDouglas Anderson * mode. Even worse is powering the PHY on while the 175b2db9c67SDouglas Anderson * clock is off. 176b2db9c67SDouglas Anderson * 177b2db9c67SDouglas Anderson * To workaround the PHY limitations, the best we can 178b2db9c67SDouglas Anderson * do is to power it on at a faster speed and then slam 179b2db9c67SDouglas Anderson * through low speeds without power cycling. 180b2db9c67SDouglas Anderson */ 181b2db9c67SDouglas Anderson sdhci_set_clock(host, host->max_clk); 182b2db9c67SDouglas Anderson phy_power_on(sdhci_arasan->phy); 183b2db9c67SDouglas Anderson sdhci_arasan->is_phy_on = true; 184802ac39aSShawn Lin 185b2db9c67SDouglas Anderson /* 186b2db9c67SDouglas Anderson * We'll now fall through to the below case with 187b2db9c67SDouglas Anderson * ctrl_phy = false (so we won't turn off/on). The 188b2db9c67SDouglas Anderson * sdhci_set_clock() will set the real clock. 189b2db9c67SDouglas Anderson */ 190b2db9c67SDouglas Anderson } else if (clock > PHY_CLK_TOO_SLOW_HZ) { 191b2db9c67SDouglas Anderson /* 192b2db9c67SDouglas Anderson * At higher clock speeds the PHY is fine being power 193b2db9c67SDouglas Anderson * cycled and docs say you _should_ power cycle when 194b2db9c67SDouglas Anderson * changing clock speeds. 195b2db9c67SDouglas Anderson */ 196b2db9c67SDouglas Anderson ctrl_phy = true; 197b2db9c67SDouglas Anderson } 198b2db9c67SDouglas Anderson } 199b2db9c67SDouglas Anderson 200b2db9c67SDouglas Anderson if (ctrl_phy && sdhci_arasan->is_phy_on) { 201802ac39aSShawn Lin phy_power_off(sdhci_arasan->phy); 202b2db9c67SDouglas Anderson sdhci_arasan->is_phy_on = false; 203802ac39aSShawn Lin } 204802ac39aSShawn Lin 205802ac39aSShawn Lin sdhci_set_clock(host, clock); 206802ac39aSShawn Lin 2076fc09244SDouglas Anderson if (ctrl_phy) { 208802ac39aSShawn Lin phy_power_on(sdhci_arasan->phy); 209b2db9c67SDouglas Anderson sdhci_arasan->is_phy_on = true; 210802ac39aSShawn Lin } 211802ac39aSShawn Lin } 212802ac39aSShawn Lin 213a05c8465SShawn Lin static void sdhci_arasan_hs400_enhanced_strobe(struct mmc_host *mmc, 214a05c8465SShawn Lin struct mmc_ios *ios) 215a05c8465SShawn Lin { 216a05c8465SShawn Lin u32 vendor; 217a05c8465SShawn Lin struct sdhci_host *host = mmc_priv(mmc); 218a05c8465SShawn Lin 2190daf72feSJean-Francois Dagenais vendor = sdhci_readl(host, SDHCI_ARASAN_VENDOR_REGISTER); 220a05c8465SShawn Lin if (ios->enhanced_strobe) 221a05c8465SShawn Lin vendor |= VENDOR_ENHANCED_STROBE; 222a05c8465SShawn Lin else 223a05c8465SShawn Lin vendor &= ~VENDOR_ENHANCED_STROBE; 224a05c8465SShawn Lin 2250daf72feSJean-Francois Dagenais sdhci_writel(host, vendor, SDHCI_ARASAN_VENDOR_REGISTER); 226a05c8465SShawn Lin } 227a05c8465SShawn Lin 22813d62fd2SWei Yongjun static void sdhci_arasan_reset(struct sdhci_host *host, u8 mask) 2293794c542SZach Brown { 2303794c542SZach Brown u8 ctrl; 2313794c542SZach Brown struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); 2323794c542SZach Brown struct sdhci_arasan_data *sdhci_arasan = sdhci_pltfm_priv(pltfm_host); 2333794c542SZach Brown 2343794c542SZach Brown sdhci_reset(host, mask); 2353794c542SZach Brown 2363794c542SZach Brown if (sdhci_arasan->quirks & SDHCI_ARASAN_QUIRK_FORCE_CDTEST) { 2373794c542SZach Brown ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL); 2383794c542SZach Brown ctrl |= SDHCI_CTRL_CDTEST_INS | SDHCI_CTRL_CDTEST_EN; 2393794c542SZach Brown sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL); 2403794c542SZach Brown } 2413794c542SZach Brown } 2423794c542SZach Brown 2438a3bee9bSShawn Lin static int sdhci_arasan_voltage_switch(struct mmc_host *mmc, 2448a3bee9bSShawn Lin struct mmc_ios *ios) 2458a3bee9bSShawn Lin { 2468a3bee9bSShawn Lin switch (ios->signal_voltage) { 2478a3bee9bSShawn Lin case MMC_SIGNAL_VOLTAGE_180: 2488a3bee9bSShawn Lin /* 2498a3bee9bSShawn Lin * Plese don't switch to 1V8 as arasan,5.1 doesn't 2508a3bee9bSShawn Lin * actually refer to this setting to indicate the 2518a3bee9bSShawn Lin * signal voltage and the state machine will be broken 2528a3bee9bSShawn Lin * actually if we force to enable 1V8. That's something 2538a3bee9bSShawn Lin * like broken quirk but we could work around here. 2548a3bee9bSShawn Lin */ 2558a3bee9bSShawn Lin return 0; 2568a3bee9bSShawn Lin case MMC_SIGNAL_VOLTAGE_330: 2578a3bee9bSShawn Lin case MMC_SIGNAL_VOLTAGE_120: 2588a3bee9bSShawn Lin /* We don't support 3V3 and 1V2 */ 2598a3bee9bSShawn Lin break; 2608a3bee9bSShawn Lin } 2618a3bee9bSShawn Lin 2628a3bee9bSShawn Lin return -EINVAL; 2638a3bee9bSShawn Lin } 2648a3bee9bSShawn Lin 265a81dae3aSJulia Lawall static const struct sdhci_ops sdhci_arasan_ops = { 266802ac39aSShawn Lin .set_clock = sdhci_arasan_set_clock, 267e3ec3a3dSSoren Brinkmann .get_max_clock = sdhci_pltfm_clk_get_max_clock, 2688cc35289SShawn Lin .get_timeout_clock = sdhci_pltfm_clk_get_max_clock, 2692317f56cSRussell King .set_bus_width = sdhci_set_bus_width, 2703794c542SZach Brown .reset = sdhci_arasan_reset, 27196d7b78cSRussell King .set_uhs_signaling = sdhci_set_uhs_signaling, 272e3ec3a3dSSoren Brinkmann }; 273e3ec3a3dSSoren Brinkmann 274a81dae3aSJulia Lawall static const struct sdhci_pltfm_data sdhci_arasan_pdata = { 275e3ec3a3dSSoren Brinkmann .ops = &sdhci_arasan_ops, 2762d532d45SSuneel Garapati .quirks = SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN, 2772d532d45SSuneel Garapati .quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN | 2782d532d45SSuneel Garapati SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN, 279e3ec3a3dSSoren Brinkmann }; 280e3ec3a3dSSoren Brinkmann 281e3ec3a3dSSoren Brinkmann #ifdef CONFIG_PM_SLEEP 282e3ec3a3dSSoren Brinkmann /** 283e3ec3a3dSSoren Brinkmann * sdhci_arasan_suspend - Suspend method for the driver 284e3ec3a3dSSoren Brinkmann * @dev: Address of the device structure 285e3ec3a3dSSoren Brinkmann * Returns 0 on success and error value on error 286e3ec3a3dSSoren Brinkmann * 287e3ec3a3dSSoren Brinkmann * Put the device in a low power state. 288e3ec3a3dSSoren Brinkmann */ 289e3ec3a3dSSoren Brinkmann static int sdhci_arasan_suspend(struct device *dev) 290e3ec3a3dSSoren Brinkmann { 291e3ec3a3dSSoren Brinkmann struct platform_device *pdev = to_platform_device(dev); 292e3ec3a3dSSoren Brinkmann struct sdhci_host *host = platform_get_drvdata(pdev); 293e3ec3a3dSSoren Brinkmann struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); 29489211418SJisheng Zhang struct sdhci_arasan_data *sdhci_arasan = sdhci_pltfm_priv(pltfm_host); 295e3ec3a3dSSoren Brinkmann int ret; 296e3ec3a3dSSoren Brinkmann 297d38dcad4SAdrian Hunter if (host->tuning_mode != SDHCI_TUNING_MODE_3) 298d38dcad4SAdrian Hunter mmc_retune_needed(host->mmc); 299d38dcad4SAdrian Hunter 300e3ec3a3dSSoren Brinkmann ret = sdhci_suspend_host(host); 301e3ec3a3dSSoren Brinkmann if (ret) 302e3ec3a3dSSoren Brinkmann return ret; 303e3ec3a3dSSoren Brinkmann 304b2db9c67SDouglas Anderson if (!IS_ERR(sdhci_arasan->phy) && sdhci_arasan->is_phy_on) { 30591aa3661SShawn Lin ret = phy_power_off(sdhci_arasan->phy); 30691aa3661SShawn Lin if (ret) { 30791aa3661SShawn Lin dev_err(dev, "Cannot power off phy.\n"); 30891aa3661SShawn Lin sdhci_resume_host(host); 30991aa3661SShawn Lin return ret; 31091aa3661SShawn Lin } 311b2db9c67SDouglas Anderson sdhci_arasan->is_phy_on = false; 31291aa3661SShawn Lin } 31391aa3661SShawn Lin 314e3ec3a3dSSoren Brinkmann clk_disable(pltfm_host->clk); 315e3ec3a3dSSoren Brinkmann clk_disable(sdhci_arasan->clk_ahb); 316e3ec3a3dSSoren Brinkmann 317e3ec3a3dSSoren Brinkmann return 0; 318e3ec3a3dSSoren Brinkmann } 319e3ec3a3dSSoren Brinkmann 320e3ec3a3dSSoren Brinkmann /** 321e3ec3a3dSSoren Brinkmann * sdhci_arasan_resume - Resume method for the driver 322e3ec3a3dSSoren Brinkmann * @dev: Address of the device structure 323e3ec3a3dSSoren Brinkmann * Returns 0 on success and error value on error 324e3ec3a3dSSoren Brinkmann * 325e3ec3a3dSSoren Brinkmann * Resume operation after suspend 326e3ec3a3dSSoren Brinkmann */ 327e3ec3a3dSSoren Brinkmann static int sdhci_arasan_resume(struct device *dev) 328e3ec3a3dSSoren Brinkmann { 329e3ec3a3dSSoren Brinkmann struct platform_device *pdev = to_platform_device(dev); 330e3ec3a3dSSoren Brinkmann struct sdhci_host *host = platform_get_drvdata(pdev); 331e3ec3a3dSSoren Brinkmann struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); 33289211418SJisheng Zhang struct sdhci_arasan_data *sdhci_arasan = sdhci_pltfm_priv(pltfm_host); 333e3ec3a3dSSoren Brinkmann int ret; 334e3ec3a3dSSoren Brinkmann 335e3ec3a3dSSoren Brinkmann ret = clk_enable(sdhci_arasan->clk_ahb); 336e3ec3a3dSSoren Brinkmann if (ret) { 337e3ec3a3dSSoren Brinkmann dev_err(dev, "Cannot enable AHB clock.\n"); 338e3ec3a3dSSoren Brinkmann return ret; 339e3ec3a3dSSoren Brinkmann } 340e3ec3a3dSSoren Brinkmann 341e3ec3a3dSSoren Brinkmann ret = clk_enable(pltfm_host->clk); 342e3ec3a3dSSoren Brinkmann if (ret) { 343e3ec3a3dSSoren Brinkmann dev_err(dev, "Cannot enable SD clock.\n"); 344e3ec3a3dSSoren Brinkmann return ret; 345e3ec3a3dSSoren Brinkmann } 346e3ec3a3dSSoren Brinkmann 347b2db9c67SDouglas Anderson if (!IS_ERR(sdhci_arasan->phy) && host->mmc->actual_clock) { 34891aa3661SShawn Lin ret = phy_power_on(sdhci_arasan->phy); 34991aa3661SShawn Lin if (ret) { 35091aa3661SShawn Lin dev_err(dev, "Cannot power on phy.\n"); 35191aa3661SShawn Lin return ret; 35291aa3661SShawn Lin } 353b2db9c67SDouglas Anderson sdhci_arasan->is_phy_on = true; 35491aa3661SShawn Lin } 35591aa3661SShawn Lin 356e3ec3a3dSSoren Brinkmann return sdhci_resume_host(host); 357e3ec3a3dSSoren Brinkmann } 358e3ec3a3dSSoren Brinkmann #endif /* ! CONFIG_PM_SLEEP */ 359e3ec3a3dSSoren Brinkmann 360e3ec3a3dSSoren Brinkmann static SIMPLE_DEV_PM_OPS(sdhci_arasan_dev_pm_ops, sdhci_arasan_suspend, 361e3ec3a3dSSoren Brinkmann sdhci_arasan_resume); 362e3ec3a3dSSoren Brinkmann 3633ea4666eSDouglas Anderson static const struct of_device_id sdhci_arasan_of_match[] = { 3643ea4666eSDouglas Anderson /* SoC-specific compatible strings w/ soc_ctl_map */ 3653ea4666eSDouglas Anderson { 3663ea4666eSDouglas Anderson .compatible = "rockchip,rk3399-sdhci-5.1", 3673ea4666eSDouglas Anderson .data = &rk3399_soc_ctl_map, 3683ea4666eSDouglas Anderson }, 3693ea4666eSDouglas Anderson 3703ea4666eSDouglas Anderson /* Generic compatible below here */ 3713ea4666eSDouglas Anderson { .compatible = "arasan,sdhci-8.9a" }, 3723ea4666eSDouglas Anderson { .compatible = "arasan,sdhci-5.1" }, 3733ea4666eSDouglas Anderson { .compatible = "arasan,sdhci-4.9a" }, 3743ea4666eSDouglas Anderson 3753ea4666eSDouglas Anderson { /* sentinel */ } 3763ea4666eSDouglas Anderson }; 3773ea4666eSDouglas Anderson MODULE_DEVICE_TABLE(of, sdhci_arasan_of_match); 3783ea4666eSDouglas Anderson 3793ea4666eSDouglas Anderson /** 380c390f211SDouglas Anderson * sdhci_arasan_sdcardclk_recalc_rate - Return the card clock rate 381c390f211SDouglas Anderson * 382c390f211SDouglas Anderson * Return the current actual rate of the SD card clock. This can be used 383c390f211SDouglas Anderson * to communicate with out PHY. 384c390f211SDouglas Anderson * 385c390f211SDouglas Anderson * @hw: Pointer to the hardware clock structure. 386c390f211SDouglas Anderson * @parent_rate The parent rate (should be rate of clk_xin). 387c390f211SDouglas Anderson * Returns the card clock rate. 388c390f211SDouglas Anderson */ 389c390f211SDouglas Anderson static unsigned long sdhci_arasan_sdcardclk_recalc_rate(struct clk_hw *hw, 390c390f211SDouglas Anderson unsigned long parent_rate) 391c390f211SDouglas Anderson 392c390f211SDouglas Anderson { 393c390f211SDouglas Anderson struct sdhci_arasan_data *sdhci_arasan = 394c390f211SDouglas Anderson container_of(hw, struct sdhci_arasan_data, sdcardclk_hw); 395c390f211SDouglas Anderson struct sdhci_host *host = sdhci_arasan->host; 396c390f211SDouglas Anderson 397c390f211SDouglas Anderson return host->mmc->actual_clock; 398c390f211SDouglas Anderson } 399c390f211SDouglas Anderson 400c390f211SDouglas Anderson static const struct clk_ops arasan_sdcardclk_ops = { 401c390f211SDouglas Anderson .recalc_rate = sdhci_arasan_sdcardclk_recalc_rate, 402c390f211SDouglas Anderson }; 403c390f211SDouglas Anderson 404c390f211SDouglas Anderson /** 405b2ca77c9SShawn Lin * sdhci_arasan_update_clockmultiplier - Set corecfg_clockmultiplier 406b2ca77c9SShawn Lin * 407b2ca77c9SShawn Lin * The corecfg_clockmultiplier is supposed to contain clock multiplier 408b2ca77c9SShawn Lin * value of programmable clock generator. 409b2ca77c9SShawn Lin * 410b2ca77c9SShawn Lin * NOTES: 411b2ca77c9SShawn Lin * - Many existing devices don't seem to do this and work fine. To keep 412b2ca77c9SShawn Lin * compatibility for old hardware where the device tree doesn't provide a 413b2ca77c9SShawn Lin * register map, this function is a noop if a soc_ctl_map hasn't been provided 414b2ca77c9SShawn Lin * for this platform. 415b2ca77c9SShawn Lin * - The value of corecfg_clockmultiplier should sync with that of corresponding 416b2ca77c9SShawn Lin * value reading from sdhci_capability_register. So this function is called 417b2ca77c9SShawn Lin * once at probe time and never called again. 418b2ca77c9SShawn Lin * 419b2ca77c9SShawn Lin * @host: The sdhci_host 420b2ca77c9SShawn Lin */ 421b2ca77c9SShawn Lin static void sdhci_arasan_update_clockmultiplier(struct sdhci_host *host, 422b2ca77c9SShawn Lin u32 value) 423b2ca77c9SShawn Lin { 424b2ca77c9SShawn Lin struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); 425b2ca77c9SShawn Lin struct sdhci_arasan_data *sdhci_arasan = sdhci_pltfm_priv(pltfm_host); 426b2ca77c9SShawn Lin const struct sdhci_arasan_soc_ctl_map *soc_ctl_map = 427b2ca77c9SShawn Lin sdhci_arasan->soc_ctl_map; 428b2ca77c9SShawn Lin 429b2ca77c9SShawn Lin /* Having a map is optional */ 430b2ca77c9SShawn Lin if (!soc_ctl_map) 431b2ca77c9SShawn Lin return; 432b2ca77c9SShawn Lin 433b2ca77c9SShawn Lin /* If we have a map, we expect to have a syscon */ 434b2ca77c9SShawn Lin if (!sdhci_arasan->soc_ctl_base) { 435b2ca77c9SShawn Lin pr_warn("%s: Have regmap, but no soc-ctl-syscon\n", 436b2ca77c9SShawn Lin mmc_hostname(host->mmc)); 437b2ca77c9SShawn Lin return; 438b2ca77c9SShawn Lin } 439b2ca77c9SShawn Lin 440b2ca77c9SShawn Lin sdhci_arasan_syscon_write(host, &soc_ctl_map->clockmultiplier, value); 441b2ca77c9SShawn Lin } 442b2ca77c9SShawn Lin 443b2ca77c9SShawn Lin /** 4443ea4666eSDouglas Anderson * sdhci_arasan_update_baseclkfreq - Set corecfg_baseclkfreq 4453ea4666eSDouglas Anderson * 4463ea4666eSDouglas Anderson * The corecfg_baseclkfreq is supposed to contain the MHz of clk_xin. This 4473ea4666eSDouglas Anderson * function can be used to make that happen. 4483ea4666eSDouglas Anderson * 4493ea4666eSDouglas Anderson * NOTES: 4503ea4666eSDouglas Anderson * - Many existing devices don't seem to do this and work fine. To keep 4513ea4666eSDouglas Anderson * compatibility for old hardware where the device tree doesn't provide a 4523ea4666eSDouglas Anderson * register map, this function is a noop if a soc_ctl_map hasn't been provided 4533ea4666eSDouglas Anderson * for this platform. 4543ea4666eSDouglas Anderson * - It's assumed that clk_xin is not dynamic and that we use the SDHCI divider 4553ea4666eSDouglas Anderson * to achieve lower clock rates. That means that this function is called once 4563ea4666eSDouglas Anderson * at probe time and never called again. 4573ea4666eSDouglas Anderson * 4583ea4666eSDouglas Anderson * @host: The sdhci_host 4593ea4666eSDouglas Anderson */ 4603ea4666eSDouglas Anderson static void sdhci_arasan_update_baseclkfreq(struct sdhci_host *host) 4613ea4666eSDouglas Anderson { 4623ea4666eSDouglas Anderson struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); 4633ea4666eSDouglas Anderson struct sdhci_arasan_data *sdhci_arasan = sdhci_pltfm_priv(pltfm_host); 4643ea4666eSDouglas Anderson const struct sdhci_arasan_soc_ctl_map *soc_ctl_map = 4653ea4666eSDouglas Anderson sdhci_arasan->soc_ctl_map; 4663ea4666eSDouglas Anderson u32 mhz = DIV_ROUND_CLOSEST(clk_get_rate(pltfm_host->clk), 1000000); 4673ea4666eSDouglas Anderson 4683ea4666eSDouglas Anderson /* Having a map is optional */ 4693ea4666eSDouglas Anderson if (!soc_ctl_map) 4703ea4666eSDouglas Anderson return; 4713ea4666eSDouglas Anderson 4723ea4666eSDouglas Anderson /* If we have a map, we expect to have a syscon */ 4733ea4666eSDouglas Anderson if (!sdhci_arasan->soc_ctl_base) { 4743ea4666eSDouglas Anderson pr_warn("%s: Have regmap, but no soc-ctl-syscon\n", 4753ea4666eSDouglas Anderson mmc_hostname(host->mmc)); 4763ea4666eSDouglas Anderson return; 4773ea4666eSDouglas Anderson } 4783ea4666eSDouglas Anderson 4793ea4666eSDouglas Anderson sdhci_arasan_syscon_write(host, &soc_ctl_map->baseclkfreq, mhz); 4803ea4666eSDouglas Anderson } 4813ea4666eSDouglas Anderson 482c390f211SDouglas Anderson /** 483c390f211SDouglas Anderson * sdhci_arasan_register_sdclk - Register the sdclk for a PHY to use 484c390f211SDouglas Anderson * 485c390f211SDouglas Anderson * Some PHY devices need to know what the actual card clock is. In order for 486c390f211SDouglas Anderson * them to find out, we'll provide a clock through the common clock framework 487c390f211SDouglas Anderson * for them to query. 488c390f211SDouglas Anderson * 489c390f211SDouglas Anderson * Note: without seriously re-architecting SDHCI's clock code and testing on 490c390f211SDouglas Anderson * all platforms, there's no way to create a totally beautiful clock here 491c390f211SDouglas Anderson * with all clock ops implemented. Instead, we'll just create a clock that can 492c390f211SDouglas Anderson * be queried and set the CLK_GET_RATE_NOCACHE attribute to tell common clock 493c390f211SDouglas Anderson * framework that we're doing things behind its back. This should be sufficient 494c390f211SDouglas Anderson * to create nice clean device tree bindings and later (if needed) we can try 495c390f211SDouglas Anderson * re-architecting SDHCI if we see some benefit to it. 496c390f211SDouglas Anderson * 497c390f211SDouglas Anderson * @sdhci_arasan: Our private data structure. 498c390f211SDouglas Anderson * @clk_xin: Pointer to the functional clock 499c390f211SDouglas Anderson * @dev: Pointer to our struct device. 500c390f211SDouglas Anderson * Returns 0 on success and error value on error 501c390f211SDouglas Anderson */ 502c390f211SDouglas Anderson static int sdhci_arasan_register_sdclk(struct sdhci_arasan_data *sdhci_arasan, 503c390f211SDouglas Anderson struct clk *clk_xin, 504c390f211SDouglas Anderson struct device *dev) 505c390f211SDouglas Anderson { 506c390f211SDouglas Anderson struct device_node *np = dev->of_node; 507c390f211SDouglas Anderson struct clk_init_data sdcardclk_init; 508c390f211SDouglas Anderson const char *parent_clk_name; 509c390f211SDouglas Anderson int ret; 510c390f211SDouglas Anderson 511c390f211SDouglas Anderson /* Providing a clock to the PHY is optional; no error if missing */ 512c390f211SDouglas Anderson if (!of_find_property(np, "#clock-cells", NULL)) 513c390f211SDouglas Anderson return 0; 514c390f211SDouglas Anderson 515c390f211SDouglas Anderson ret = of_property_read_string_index(np, "clock-output-names", 0, 516c390f211SDouglas Anderson &sdcardclk_init.name); 517c390f211SDouglas Anderson if (ret) { 518c390f211SDouglas Anderson dev_err(dev, "DT has #clock-cells but no clock-output-names\n"); 519c390f211SDouglas Anderson return ret; 520c390f211SDouglas Anderson } 521c390f211SDouglas Anderson 522c390f211SDouglas Anderson parent_clk_name = __clk_get_name(clk_xin); 523c390f211SDouglas Anderson sdcardclk_init.parent_names = &parent_clk_name; 524c390f211SDouglas Anderson sdcardclk_init.num_parents = 1; 525c390f211SDouglas Anderson sdcardclk_init.flags = CLK_GET_RATE_NOCACHE; 526c390f211SDouglas Anderson sdcardclk_init.ops = &arasan_sdcardclk_ops; 527c390f211SDouglas Anderson 528c390f211SDouglas Anderson sdhci_arasan->sdcardclk_hw.init = &sdcardclk_init; 529c390f211SDouglas Anderson sdhci_arasan->sdcardclk = 530c390f211SDouglas Anderson devm_clk_register(dev, &sdhci_arasan->sdcardclk_hw); 531c390f211SDouglas Anderson sdhci_arasan->sdcardclk_hw.init = NULL; 532c390f211SDouglas Anderson 533c390f211SDouglas Anderson ret = of_clk_add_provider(np, of_clk_src_simple_get, 534c390f211SDouglas Anderson sdhci_arasan->sdcardclk); 535c390f211SDouglas Anderson if (ret) 536c390f211SDouglas Anderson dev_err(dev, "Failed to add clock provider\n"); 537c390f211SDouglas Anderson 538c390f211SDouglas Anderson return ret; 539c390f211SDouglas Anderson } 540c390f211SDouglas Anderson 541c390f211SDouglas Anderson /** 542c390f211SDouglas Anderson * sdhci_arasan_unregister_sdclk - Undoes sdhci_arasan_register_sdclk() 543c390f211SDouglas Anderson * 544c390f211SDouglas Anderson * Should be called any time we're exiting and sdhci_arasan_register_sdclk() 545c390f211SDouglas Anderson * returned success. 546c390f211SDouglas Anderson * 547c390f211SDouglas Anderson * @dev: Pointer to our struct device. 548c390f211SDouglas Anderson */ 549c390f211SDouglas Anderson static void sdhci_arasan_unregister_sdclk(struct device *dev) 550c390f211SDouglas Anderson { 551c390f211SDouglas Anderson struct device_node *np = dev->of_node; 552c390f211SDouglas Anderson 553c390f211SDouglas Anderson if (!of_find_property(np, "#clock-cells", NULL)) 554c390f211SDouglas Anderson return; 555c390f211SDouglas Anderson 556c390f211SDouglas Anderson of_clk_del_provider(dev->of_node); 557c390f211SDouglas Anderson } 558c390f211SDouglas Anderson 559e3ec3a3dSSoren Brinkmann static int sdhci_arasan_probe(struct platform_device *pdev) 560e3ec3a3dSSoren Brinkmann { 561e3ec3a3dSSoren Brinkmann int ret; 5623ea4666eSDouglas Anderson const struct of_device_id *match; 5633ea4666eSDouglas Anderson struct device_node *node; 564e3ec3a3dSSoren Brinkmann struct clk *clk_xin; 565e3ec3a3dSSoren Brinkmann struct sdhci_host *host; 566e3ec3a3dSSoren Brinkmann struct sdhci_pltfm_host *pltfm_host; 567e3ec3a3dSSoren Brinkmann struct sdhci_arasan_data *sdhci_arasan; 5683794c542SZach Brown struct device_node *np = pdev->dev.of_node; 569e3ec3a3dSSoren Brinkmann 57089211418SJisheng Zhang host = sdhci_pltfm_init(pdev, &sdhci_arasan_pdata, 57189211418SJisheng Zhang sizeof(*sdhci_arasan)); 57289211418SJisheng Zhang if (IS_ERR(host)) 57389211418SJisheng Zhang return PTR_ERR(host); 57489211418SJisheng Zhang 57589211418SJisheng Zhang pltfm_host = sdhci_priv(host); 57689211418SJisheng Zhang sdhci_arasan = sdhci_pltfm_priv(pltfm_host); 577c390f211SDouglas Anderson sdhci_arasan->host = host; 578e3ec3a3dSSoren Brinkmann 5793ea4666eSDouglas Anderson match = of_match_node(sdhci_arasan_of_match, pdev->dev.of_node); 5803ea4666eSDouglas Anderson sdhci_arasan->soc_ctl_map = match->data; 5813ea4666eSDouglas Anderson 5823ea4666eSDouglas Anderson node = of_parse_phandle(pdev->dev.of_node, "arasan,soc-ctl-syscon", 0); 5833ea4666eSDouglas Anderson if (node) { 5843ea4666eSDouglas Anderson sdhci_arasan->soc_ctl_base = syscon_node_to_regmap(node); 5853ea4666eSDouglas Anderson of_node_put(node); 5863ea4666eSDouglas Anderson 5873ea4666eSDouglas Anderson if (IS_ERR(sdhci_arasan->soc_ctl_base)) { 5883ea4666eSDouglas Anderson ret = PTR_ERR(sdhci_arasan->soc_ctl_base); 5893ea4666eSDouglas Anderson if (ret != -EPROBE_DEFER) 5903ea4666eSDouglas Anderson dev_err(&pdev->dev, "Can't get syscon: %d\n", 5913ea4666eSDouglas Anderson ret); 5923ea4666eSDouglas Anderson goto err_pltfm_free; 5933ea4666eSDouglas Anderson } 5943ea4666eSDouglas Anderson } 5953ea4666eSDouglas Anderson 596e3ec3a3dSSoren Brinkmann sdhci_arasan->clk_ahb = devm_clk_get(&pdev->dev, "clk_ahb"); 597e3ec3a3dSSoren Brinkmann if (IS_ERR(sdhci_arasan->clk_ahb)) { 598e3ec3a3dSSoren Brinkmann dev_err(&pdev->dev, "clk_ahb clock not found.\n"); 599278d0962SShawn Lin ret = PTR_ERR(sdhci_arasan->clk_ahb); 600278d0962SShawn Lin goto err_pltfm_free; 601e3ec3a3dSSoren Brinkmann } 602e3ec3a3dSSoren Brinkmann 603e3ec3a3dSSoren Brinkmann clk_xin = devm_clk_get(&pdev->dev, "clk_xin"); 604e3ec3a3dSSoren Brinkmann if (IS_ERR(clk_xin)) { 605e3ec3a3dSSoren Brinkmann dev_err(&pdev->dev, "clk_xin clock not found.\n"); 606278d0962SShawn Lin ret = PTR_ERR(clk_xin); 607278d0962SShawn Lin goto err_pltfm_free; 608e3ec3a3dSSoren Brinkmann } 609e3ec3a3dSSoren Brinkmann 610e3ec3a3dSSoren Brinkmann ret = clk_prepare_enable(sdhci_arasan->clk_ahb); 611e3ec3a3dSSoren Brinkmann if (ret) { 612e3ec3a3dSSoren Brinkmann dev_err(&pdev->dev, "Unable to enable AHB clock.\n"); 613278d0962SShawn Lin goto err_pltfm_free; 614e3ec3a3dSSoren Brinkmann } 615e3ec3a3dSSoren Brinkmann 616e3ec3a3dSSoren Brinkmann ret = clk_prepare_enable(clk_xin); 617e3ec3a3dSSoren Brinkmann if (ret) { 618e3ec3a3dSSoren Brinkmann dev_err(&pdev->dev, "Unable to enable SD clock.\n"); 619e3ec3a3dSSoren Brinkmann goto clk_dis_ahb; 620e3ec3a3dSSoren Brinkmann } 621e3ec3a3dSSoren Brinkmann 622e3ec3a3dSSoren Brinkmann sdhci_get_of_property(pdev); 6233794c542SZach Brown 6243794c542SZach Brown if (of_property_read_bool(np, "xlnx,fails-without-test-cd")) 6253794c542SZach Brown sdhci_arasan->quirks |= SDHCI_ARASAN_QUIRK_FORCE_CDTEST; 6263794c542SZach Brown 627e3ec3a3dSSoren Brinkmann pltfm_host->clk = clk_xin; 628e3ec3a3dSSoren Brinkmann 629b2ca77c9SShawn Lin if (of_device_is_compatible(pdev->dev.of_node, 630b2ca77c9SShawn Lin "rockchip,rk3399-sdhci-5.1")) 631b2ca77c9SShawn Lin sdhci_arasan_update_clockmultiplier(host, 0x0); 632b2ca77c9SShawn Lin 6333ea4666eSDouglas Anderson sdhci_arasan_update_baseclkfreq(host); 6343ea4666eSDouglas Anderson 635c390f211SDouglas Anderson ret = sdhci_arasan_register_sdclk(sdhci_arasan, clk_xin, &pdev->dev); 636c390f211SDouglas Anderson if (ret) 637c390f211SDouglas Anderson goto clk_disable_all; 638c390f211SDouglas Anderson 63916b23787SMichal Simek ret = mmc_of_parse(host->mmc); 64016b23787SMichal Simek if (ret) { 641940e698cSShubhrajyoti Datta dev_err(&pdev->dev, "parsing dt failed (%d)\n", ret); 642c390f211SDouglas Anderson goto unreg_clk; 64316b23787SMichal Simek } 64416b23787SMichal Simek 64591aa3661SShawn Lin sdhci_arasan->phy = ERR_PTR(-ENODEV); 64691aa3661SShawn Lin if (of_device_is_compatible(pdev->dev.of_node, 64791aa3661SShawn Lin "arasan,sdhci-5.1")) { 64891aa3661SShawn Lin sdhci_arasan->phy = devm_phy_get(&pdev->dev, 64991aa3661SShawn Lin "phy_arasan"); 65091aa3661SShawn Lin if (IS_ERR(sdhci_arasan->phy)) { 65191aa3661SShawn Lin ret = PTR_ERR(sdhci_arasan->phy); 65291aa3661SShawn Lin dev_err(&pdev->dev, "No phy for arasan,sdhci-5.1.\n"); 653c390f211SDouglas Anderson goto unreg_clk; 65491aa3661SShawn Lin } 65591aa3661SShawn Lin 65691aa3661SShawn Lin ret = phy_init(sdhci_arasan->phy); 65791aa3661SShawn Lin if (ret < 0) { 65891aa3661SShawn Lin dev_err(&pdev->dev, "phy_init err.\n"); 659c390f211SDouglas Anderson goto unreg_clk; 66091aa3661SShawn Lin } 66191aa3661SShawn Lin 662a05c8465SShawn Lin host->mmc_host_ops.hs400_enhanced_strobe = 663a05c8465SShawn Lin sdhci_arasan_hs400_enhanced_strobe; 6648a3bee9bSShawn Lin host->mmc_host_ops.start_signal_voltage_switch = 6658a3bee9bSShawn Lin sdhci_arasan_voltage_switch; 66691aa3661SShawn Lin } 66791aa3661SShawn Lin 668e3ec3a3dSSoren Brinkmann ret = sdhci_add_host(host); 669b1df9de7SMike Looijmans if (ret) 67091aa3661SShawn Lin goto err_add_host; 671e3ec3a3dSSoren Brinkmann 672e3ec3a3dSSoren Brinkmann return 0; 673e3ec3a3dSSoren Brinkmann 67491aa3661SShawn Lin err_add_host: 67591aa3661SShawn Lin if (!IS_ERR(sdhci_arasan->phy)) 67691aa3661SShawn Lin phy_exit(sdhci_arasan->phy); 677c390f211SDouglas Anderson unreg_clk: 678c390f211SDouglas Anderson sdhci_arasan_unregister_sdclk(&pdev->dev); 679e3ec3a3dSSoren Brinkmann clk_disable_all: 680e3ec3a3dSSoren Brinkmann clk_disable_unprepare(clk_xin); 681e3ec3a3dSSoren Brinkmann clk_dis_ahb: 682e3ec3a3dSSoren Brinkmann clk_disable_unprepare(sdhci_arasan->clk_ahb); 683278d0962SShawn Lin err_pltfm_free: 684278d0962SShawn Lin sdhci_pltfm_free(pdev); 685e3ec3a3dSSoren Brinkmann return ret; 686e3ec3a3dSSoren Brinkmann } 687e3ec3a3dSSoren Brinkmann 688e3ec3a3dSSoren Brinkmann static int sdhci_arasan_remove(struct platform_device *pdev) 689e3ec3a3dSSoren Brinkmann { 6900c7fe32eSJisheng Zhang int ret; 691e3ec3a3dSSoren Brinkmann struct sdhci_host *host = platform_get_drvdata(pdev); 692e3ec3a3dSSoren Brinkmann struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); 69389211418SJisheng Zhang struct sdhci_arasan_data *sdhci_arasan = sdhci_pltfm_priv(pltfm_host); 69489211418SJisheng Zhang struct clk *clk_ahb = sdhci_arasan->clk_ahb; 695e3ec3a3dSSoren Brinkmann 69691aa3661SShawn Lin if (!IS_ERR(sdhci_arasan->phy)) { 697b2db9c67SDouglas Anderson if (sdhci_arasan->is_phy_on) 69891aa3661SShawn Lin phy_power_off(sdhci_arasan->phy); 69991aa3661SShawn Lin phy_exit(sdhci_arasan->phy); 70091aa3661SShawn Lin } 70191aa3661SShawn Lin 702c390f211SDouglas Anderson sdhci_arasan_unregister_sdclk(&pdev->dev); 703c390f211SDouglas Anderson 7040c7fe32eSJisheng Zhang ret = sdhci_pltfm_unregister(pdev); 7050c7fe32eSJisheng Zhang 70689211418SJisheng Zhang clk_disable_unprepare(clk_ahb); 707e3ec3a3dSSoren Brinkmann 7080c7fe32eSJisheng Zhang return ret; 709e3ec3a3dSSoren Brinkmann } 710e3ec3a3dSSoren Brinkmann 711e3ec3a3dSSoren Brinkmann static struct platform_driver sdhci_arasan_driver = { 712e3ec3a3dSSoren Brinkmann .driver = { 713e3ec3a3dSSoren Brinkmann .name = "sdhci-arasan", 714e3ec3a3dSSoren Brinkmann .of_match_table = sdhci_arasan_of_match, 715e3ec3a3dSSoren Brinkmann .pm = &sdhci_arasan_dev_pm_ops, 716e3ec3a3dSSoren Brinkmann }, 717e3ec3a3dSSoren Brinkmann .probe = sdhci_arasan_probe, 718e3ec3a3dSSoren Brinkmann .remove = sdhci_arasan_remove, 719e3ec3a3dSSoren Brinkmann }; 720e3ec3a3dSSoren Brinkmann 721e3ec3a3dSSoren Brinkmann module_platform_driver(sdhci_arasan_driver); 722e3ec3a3dSSoren Brinkmann 723e3ec3a3dSSoren Brinkmann MODULE_DESCRIPTION("Driver for the Arasan SDHCI Controller"); 724e3ec3a3dSSoren Brinkmann MODULE_AUTHOR("Soeren Brinkmann <soren.brinkmann@xilinx.com>"); 725e3ec3a3dSSoren Brinkmann MODULE_LICENSE("GPL"); 726