1e3ec3a3dSSoren Brinkmann /*
2e3ec3a3dSSoren Brinkmann  * Arasan Secure Digital Host Controller Interface.
3e3ec3a3dSSoren Brinkmann  * Copyright (C) 2011 - 2012 Michal Simek <monstr@monstr.eu>
4e3ec3a3dSSoren Brinkmann  * Copyright (c) 2012 Wind River Systems, Inc.
5e3ec3a3dSSoren Brinkmann  * Copyright (C) 2013 Pengutronix e.K.
6e3ec3a3dSSoren Brinkmann  * Copyright (C) 2013 Xilinx Inc.
7e3ec3a3dSSoren Brinkmann  *
8e3ec3a3dSSoren Brinkmann  * Based on sdhci-of-esdhc.c
9e3ec3a3dSSoren Brinkmann  *
10e3ec3a3dSSoren Brinkmann  * Copyright (c) 2007 Freescale Semiconductor, Inc.
11e3ec3a3dSSoren Brinkmann  * Copyright (c) 2009 MontaVista Software, Inc.
12e3ec3a3dSSoren Brinkmann  *
13e3ec3a3dSSoren Brinkmann  * Authors: Xiaobo Xie <X.Xie@freescale.com>
14e3ec3a3dSSoren Brinkmann  *	    Anton Vorontsov <avorontsov@ru.mvista.com>
15e3ec3a3dSSoren Brinkmann  *
16e3ec3a3dSSoren Brinkmann  * This program is free software; you can redistribute it and/or modify
17e3ec3a3dSSoren Brinkmann  * it under the terms of the GNU General Public License as published by
18e3ec3a3dSSoren Brinkmann  * the Free Software Foundation; either version 2 of the License, or (at
19e3ec3a3dSSoren Brinkmann  * your option) any later version.
20e3ec3a3dSSoren Brinkmann  */
21e3ec3a3dSSoren Brinkmann 
22e3ec3a3dSSoren Brinkmann #include <linux/module.h>
23308f3f8dSSuman Tripathi #include <linux/of_device.h>
2491aa3661SShawn Lin #include <linux/phy/phy.h>
25e3ec3a3dSSoren Brinkmann #include "sdhci-pltfm.h"
26e3ec3a3dSSoren Brinkmann 
27e3ec3a3dSSoren Brinkmann #define SDHCI_ARASAN_CLK_CTRL_OFFSET	0x2c
28e3ec3a3dSSoren Brinkmann 
29e3ec3a3dSSoren Brinkmann #define CLK_CTRL_TIMEOUT_SHIFT		16
30e3ec3a3dSSoren Brinkmann #define CLK_CTRL_TIMEOUT_MASK		(0xf << CLK_CTRL_TIMEOUT_SHIFT)
31e3ec3a3dSSoren Brinkmann #define CLK_CTRL_TIMEOUT_MIN_EXP	13
32e3ec3a3dSSoren Brinkmann 
33e3ec3a3dSSoren Brinkmann /**
34e3ec3a3dSSoren Brinkmann  * struct sdhci_arasan_data
35e3ec3a3dSSoren Brinkmann  * @clk_ahb:	Pointer to the AHB clock
3691aa3661SShawn Lin  * @phy: Pointer to the generic phy
37e3ec3a3dSSoren Brinkmann  */
38e3ec3a3dSSoren Brinkmann struct sdhci_arasan_data {
39e3ec3a3dSSoren Brinkmann 	struct clk	*clk_ahb;
4091aa3661SShawn Lin 	struct phy	*phy;
41e3ec3a3dSSoren Brinkmann };
42e3ec3a3dSSoren Brinkmann 
43e3ec3a3dSSoren Brinkmann static unsigned int sdhci_arasan_get_timeout_clock(struct sdhci_host *host)
44e3ec3a3dSSoren Brinkmann {
45e3ec3a3dSSoren Brinkmann 	u32 div;
46e3ec3a3dSSoren Brinkmann 	unsigned long freq;
47e3ec3a3dSSoren Brinkmann 	struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
48e3ec3a3dSSoren Brinkmann 
49e3ec3a3dSSoren Brinkmann 	div = readl(host->ioaddr + SDHCI_ARASAN_CLK_CTRL_OFFSET);
50e3ec3a3dSSoren Brinkmann 	div = (div & CLK_CTRL_TIMEOUT_MASK) >> CLK_CTRL_TIMEOUT_SHIFT;
51e3ec3a3dSSoren Brinkmann 
52e3ec3a3dSSoren Brinkmann 	freq = clk_get_rate(pltfm_host->clk);
53e3ec3a3dSSoren Brinkmann 	freq /= 1 << (CLK_CTRL_TIMEOUT_MIN_EXP + div);
54e3ec3a3dSSoren Brinkmann 
55e3ec3a3dSSoren Brinkmann 	return freq;
56e3ec3a3dSSoren Brinkmann }
57e3ec3a3dSSoren Brinkmann 
58802ac39aSShawn Lin static void sdhci_arasan_set_clock(struct sdhci_host *host, unsigned int clock)
59802ac39aSShawn Lin {
60802ac39aSShawn Lin 	struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
61802ac39aSShawn Lin 	struct sdhci_arasan_data *sdhci_arasan = sdhci_pltfm_priv(pltfm_host);
62802ac39aSShawn Lin 	bool ctrl_phy = false;
63802ac39aSShawn Lin 
64802ac39aSShawn Lin 	if (clock > MMC_HIGH_52_MAX_DTR && (!IS_ERR(sdhci_arasan->phy)))
65802ac39aSShawn Lin 		ctrl_phy = true;
66802ac39aSShawn Lin 
67802ac39aSShawn Lin 	if (ctrl_phy) {
68802ac39aSShawn Lin 		spin_unlock_irq(&host->lock);
69802ac39aSShawn Lin 		phy_power_off(sdhci_arasan->phy);
70802ac39aSShawn Lin 		spin_lock_irq(&host->lock);
71802ac39aSShawn Lin 	}
72802ac39aSShawn Lin 
73802ac39aSShawn Lin 	sdhci_set_clock(host, clock);
74802ac39aSShawn Lin 
75802ac39aSShawn Lin 	if (ctrl_phy) {
76802ac39aSShawn Lin 		spin_unlock_irq(&host->lock);
77802ac39aSShawn Lin 		phy_power_on(sdhci_arasan->phy);
78802ac39aSShawn Lin 		spin_lock_irq(&host->lock);
79802ac39aSShawn Lin 	}
80802ac39aSShawn Lin }
81802ac39aSShawn Lin 
82e3ec3a3dSSoren Brinkmann static struct sdhci_ops sdhci_arasan_ops = {
83802ac39aSShawn Lin 	.set_clock = sdhci_arasan_set_clock,
84e3ec3a3dSSoren Brinkmann 	.get_max_clock = sdhci_pltfm_clk_get_max_clock,
85e3ec3a3dSSoren Brinkmann 	.get_timeout_clock = sdhci_arasan_get_timeout_clock,
862317f56cSRussell King 	.set_bus_width = sdhci_set_bus_width,
8703231f9bSRussell King 	.reset = sdhci_reset,
8896d7b78cSRussell King 	.set_uhs_signaling = sdhci_set_uhs_signaling,
89e3ec3a3dSSoren Brinkmann };
90e3ec3a3dSSoren Brinkmann 
91e3ec3a3dSSoren Brinkmann static struct sdhci_pltfm_data sdhci_arasan_pdata = {
92e3ec3a3dSSoren Brinkmann 	.ops = &sdhci_arasan_ops,
932d532d45SSuneel Garapati 	.quirks = SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN,
942d532d45SSuneel Garapati 	.quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN |
952d532d45SSuneel Garapati 			SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN,
96e3ec3a3dSSoren Brinkmann };
97e3ec3a3dSSoren Brinkmann 
98e3ec3a3dSSoren Brinkmann #ifdef CONFIG_PM_SLEEP
99e3ec3a3dSSoren Brinkmann /**
100e3ec3a3dSSoren Brinkmann  * sdhci_arasan_suspend - Suspend method for the driver
101e3ec3a3dSSoren Brinkmann  * @dev:	Address of the device structure
102e3ec3a3dSSoren Brinkmann  * Returns 0 on success and error value on error
103e3ec3a3dSSoren Brinkmann  *
104e3ec3a3dSSoren Brinkmann  * Put the device in a low power state.
105e3ec3a3dSSoren Brinkmann  */
106e3ec3a3dSSoren Brinkmann static int sdhci_arasan_suspend(struct device *dev)
107e3ec3a3dSSoren Brinkmann {
108e3ec3a3dSSoren Brinkmann 	struct platform_device *pdev = to_platform_device(dev);
109e3ec3a3dSSoren Brinkmann 	struct sdhci_host *host = platform_get_drvdata(pdev);
110e3ec3a3dSSoren Brinkmann 	struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
11189211418SJisheng Zhang 	struct sdhci_arasan_data *sdhci_arasan = sdhci_pltfm_priv(pltfm_host);
112e3ec3a3dSSoren Brinkmann 	int ret;
113e3ec3a3dSSoren Brinkmann 
114e3ec3a3dSSoren Brinkmann 	ret = sdhci_suspend_host(host);
115e3ec3a3dSSoren Brinkmann 	if (ret)
116e3ec3a3dSSoren Brinkmann 		return ret;
117e3ec3a3dSSoren Brinkmann 
11891aa3661SShawn Lin 	if (!IS_ERR(sdhci_arasan->phy)) {
11991aa3661SShawn Lin 		ret = phy_power_off(sdhci_arasan->phy);
12091aa3661SShawn Lin 		if (ret) {
12191aa3661SShawn Lin 			dev_err(dev, "Cannot power off phy.\n");
12291aa3661SShawn Lin 			sdhci_resume_host(host);
12391aa3661SShawn Lin 			return ret;
12491aa3661SShawn Lin 		}
12591aa3661SShawn Lin 	}
12691aa3661SShawn Lin 
127e3ec3a3dSSoren Brinkmann 	clk_disable(pltfm_host->clk);
128e3ec3a3dSSoren Brinkmann 	clk_disable(sdhci_arasan->clk_ahb);
129e3ec3a3dSSoren Brinkmann 
130e3ec3a3dSSoren Brinkmann 	return 0;
131e3ec3a3dSSoren Brinkmann }
132e3ec3a3dSSoren Brinkmann 
133e3ec3a3dSSoren Brinkmann /**
134e3ec3a3dSSoren Brinkmann  * sdhci_arasan_resume - Resume method for the driver
135e3ec3a3dSSoren Brinkmann  * @dev:	Address of the device structure
136e3ec3a3dSSoren Brinkmann  * Returns 0 on success and error value on error
137e3ec3a3dSSoren Brinkmann  *
138e3ec3a3dSSoren Brinkmann  * Resume operation after suspend
139e3ec3a3dSSoren Brinkmann  */
140e3ec3a3dSSoren Brinkmann static int sdhci_arasan_resume(struct device *dev)
141e3ec3a3dSSoren Brinkmann {
142e3ec3a3dSSoren Brinkmann 	struct platform_device *pdev = to_platform_device(dev);
143e3ec3a3dSSoren Brinkmann 	struct sdhci_host *host = platform_get_drvdata(pdev);
144e3ec3a3dSSoren Brinkmann 	struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
14589211418SJisheng Zhang 	struct sdhci_arasan_data *sdhci_arasan = sdhci_pltfm_priv(pltfm_host);
146e3ec3a3dSSoren Brinkmann 	int ret;
147e3ec3a3dSSoren Brinkmann 
148e3ec3a3dSSoren Brinkmann 	ret = clk_enable(sdhci_arasan->clk_ahb);
149e3ec3a3dSSoren Brinkmann 	if (ret) {
150e3ec3a3dSSoren Brinkmann 		dev_err(dev, "Cannot enable AHB clock.\n");
151e3ec3a3dSSoren Brinkmann 		return ret;
152e3ec3a3dSSoren Brinkmann 	}
153e3ec3a3dSSoren Brinkmann 
154e3ec3a3dSSoren Brinkmann 	ret = clk_enable(pltfm_host->clk);
155e3ec3a3dSSoren Brinkmann 	if (ret) {
156e3ec3a3dSSoren Brinkmann 		dev_err(dev, "Cannot enable SD clock.\n");
157e3ec3a3dSSoren Brinkmann 		return ret;
158e3ec3a3dSSoren Brinkmann 	}
159e3ec3a3dSSoren Brinkmann 
16091aa3661SShawn Lin 	if (!IS_ERR(sdhci_arasan->phy)) {
16191aa3661SShawn Lin 		ret = phy_power_on(sdhci_arasan->phy);
16291aa3661SShawn Lin 		if (ret) {
16391aa3661SShawn Lin 			dev_err(dev, "Cannot power on phy.\n");
16491aa3661SShawn Lin 			return ret;
16591aa3661SShawn Lin 		}
16691aa3661SShawn Lin 	}
16791aa3661SShawn Lin 
168e3ec3a3dSSoren Brinkmann 	return sdhci_resume_host(host);
169e3ec3a3dSSoren Brinkmann }
170e3ec3a3dSSoren Brinkmann #endif /* ! CONFIG_PM_SLEEP */
171e3ec3a3dSSoren Brinkmann 
172e3ec3a3dSSoren Brinkmann static SIMPLE_DEV_PM_OPS(sdhci_arasan_dev_pm_ops, sdhci_arasan_suspend,
173e3ec3a3dSSoren Brinkmann 			 sdhci_arasan_resume);
174e3ec3a3dSSoren Brinkmann 
175e3ec3a3dSSoren Brinkmann static int sdhci_arasan_probe(struct platform_device *pdev)
176e3ec3a3dSSoren Brinkmann {
177e3ec3a3dSSoren Brinkmann 	int ret;
178e3ec3a3dSSoren Brinkmann 	struct clk *clk_xin;
179e3ec3a3dSSoren Brinkmann 	struct sdhci_host *host;
180e3ec3a3dSSoren Brinkmann 	struct sdhci_pltfm_host *pltfm_host;
181e3ec3a3dSSoren Brinkmann 	struct sdhci_arasan_data *sdhci_arasan;
182e3ec3a3dSSoren Brinkmann 
18389211418SJisheng Zhang 	host = sdhci_pltfm_init(pdev, &sdhci_arasan_pdata,
18489211418SJisheng Zhang 				sizeof(*sdhci_arasan));
18589211418SJisheng Zhang 	if (IS_ERR(host))
18689211418SJisheng Zhang 		return PTR_ERR(host);
18789211418SJisheng Zhang 
18889211418SJisheng Zhang 	pltfm_host = sdhci_priv(host);
18989211418SJisheng Zhang 	sdhci_arasan = sdhci_pltfm_priv(pltfm_host);
190e3ec3a3dSSoren Brinkmann 
191e3ec3a3dSSoren Brinkmann 	sdhci_arasan->clk_ahb = devm_clk_get(&pdev->dev, "clk_ahb");
192e3ec3a3dSSoren Brinkmann 	if (IS_ERR(sdhci_arasan->clk_ahb)) {
193e3ec3a3dSSoren Brinkmann 		dev_err(&pdev->dev, "clk_ahb clock not found.\n");
194278d0962SShawn Lin 		ret = PTR_ERR(sdhci_arasan->clk_ahb);
195278d0962SShawn Lin 		goto err_pltfm_free;
196e3ec3a3dSSoren Brinkmann 	}
197e3ec3a3dSSoren Brinkmann 
198e3ec3a3dSSoren Brinkmann 	clk_xin = devm_clk_get(&pdev->dev, "clk_xin");
199e3ec3a3dSSoren Brinkmann 	if (IS_ERR(clk_xin)) {
200e3ec3a3dSSoren Brinkmann 		dev_err(&pdev->dev, "clk_xin clock not found.\n");
201278d0962SShawn Lin 		ret = PTR_ERR(clk_xin);
202278d0962SShawn Lin 		goto err_pltfm_free;
203e3ec3a3dSSoren Brinkmann 	}
204e3ec3a3dSSoren Brinkmann 
205e3ec3a3dSSoren Brinkmann 	ret = clk_prepare_enable(sdhci_arasan->clk_ahb);
206e3ec3a3dSSoren Brinkmann 	if (ret) {
207e3ec3a3dSSoren Brinkmann 		dev_err(&pdev->dev, "Unable to enable AHB clock.\n");
208278d0962SShawn Lin 		goto err_pltfm_free;
209e3ec3a3dSSoren Brinkmann 	}
210e3ec3a3dSSoren Brinkmann 
211e3ec3a3dSSoren Brinkmann 	ret = clk_prepare_enable(clk_xin);
212e3ec3a3dSSoren Brinkmann 	if (ret) {
213e3ec3a3dSSoren Brinkmann 		dev_err(&pdev->dev, "Unable to enable SD clock.\n");
214e3ec3a3dSSoren Brinkmann 		goto clk_dis_ahb;
215e3ec3a3dSSoren Brinkmann 	}
216e3ec3a3dSSoren Brinkmann 
217e3ec3a3dSSoren Brinkmann 	sdhci_get_of_property(pdev);
218e3ec3a3dSSoren Brinkmann 	pltfm_host->clk = clk_xin;
219e3ec3a3dSSoren Brinkmann 
22016b23787SMichal Simek 	ret = mmc_of_parse(host->mmc);
22116b23787SMichal Simek 	if (ret) {
22216b23787SMichal Simek 		dev_err(&pdev->dev, "parsing dt failed (%u)\n", ret);
22316b23787SMichal Simek 		goto clk_disable_all;
22416b23787SMichal Simek 	}
22516b23787SMichal Simek 
22691aa3661SShawn Lin 	sdhci_arasan->phy = ERR_PTR(-ENODEV);
22791aa3661SShawn Lin 	if (of_device_is_compatible(pdev->dev.of_node,
22891aa3661SShawn Lin 				    "arasan,sdhci-5.1")) {
22991aa3661SShawn Lin 		sdhci_arasan->phy = devm_phy_get(&pdev->dev,
23091aa3661SShawn Lin 						 "phy_arasan");
23191aa3661SShawn Lin 		if (IS_ERR(sdhci_arasan->phy)) {
23291aa3661SShawn Lin 			ret = PTR_ERR(sdhci_arasan->phy);
23391aa3661SShawn Lin 			dev_err(&pdev->dev, "No phy for arasan,sdhci-5.1.\n");
23491aa3661SShawn Lin 			goto clk_disable_all;
23591aa3661SShawn Lin 		}
23691aa3661SShawn Lin 
23791aa3661SShawn Lin 		ret = phy_init(sdhci_arasan->phy);
23891aa3661SShawn Lin 		if (ret < 0) {
23991aa3661SShawn Lin 			dev_err(&pdev->dev, "phy_init err.\n");
24091aa3661SShawn Lin 			goto clk_disable_all;
24191aa3661SShawn Lin 		}
24291aa3661SShawn Lin 
24391aa3661SShawn Lin 		ret = phy_power_on(sdhci_arasan->phy);
24491aa3661SShawn Lin 		if (ret < 0) {
24591aa3661SShawn Lin 			dev_err(&pdev->dev, "phy_power_on err.\n");
24691aa3661SShawn Lin 			goto err_phy_power;
24791aa3661SShawn Lin 		}
24891aa3661SShawn Lin 	}
24991aa3661SShawn Lin 
250e3ec3a3dSSoren Brinkmann 	ret = sdhci_add_host(host);
251b1df9de7SMike Looijmans 	if (ret)
25291aa3661SShawn Lin 		goto err_add_host;
253e3ec3a3dSSoren Brinkmann 
254e3ec3a3dSSoren Brinkmann 	return 0;
255e3ec3a3dSSoren Brinkmann 
25691aa3661SShawn Lin err_add_host:
25791aa3661SShawn Lin 	if (!IS_ERR(sdhci_arasan->phy))
25891aa3661SShawn Lin 		phy_power_off(sdhci_arasan->phy);
25991aa3661SShawn Lin err_phy_power:
26091aa3661SShawn Lin 	if (!IS_ERR(sdhci_arasan->phy))
26191aa3661SShawn Lin 		phy_exit(sdhci_arasan->phy);
262e3ec3a3dSSoren Brinkmann clk_disable_all:
263e3ec3a3dSSoren Brinkmann 	clk_disable_unprepare(clk_xin);
264e3ec3a3dSSoren Brinkmann clk_dis_ahb:
265e3ec3a3dSSoren Brinkmann 	clk_disable_unprepare(sdhci_arasan->clk_ahb);
266278d0962SShawn Lin err_pltfm_free:
267278d0962SShawn Lin 	sdhci_pltfm_free(pdev);
268e3ec3a3dSSoren Brinkmann 	return ret;
269e3ec3a3dSSoren Brinkmann }
270e3ec3a3dSSoren Brinkmann 
271e3ec3a3dSSoren Brinkmann static int sdhci_arasan_remove(struct platform_device *pdev)
272e3ec3a3dSSoren Brinkmann {
2730c7fe32eSJisheng Zhang 	int ret;
274e3ec3a3dSSoren Brinkmann 	struct sdhci_host *host = platform_get_drvdata(pdev);
275e3ec3a3dSSoren Brinkmann 	struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
27689211418SJisheng Zhang 	struct sdhci_arasan_data *sdhci_arasan = sdhci_pltfm_priv(pltfm_host);
27789211418SJisheng Zhang 	struct clk *clk_ahb = sdhci_arasan->clk_ahb;
278e3ec3a3dSSoren Brinkmann 
27991aa3661SShawn Lin 	if (!IS_ERR(sdhci_arasan->phy)) {
28091aa3661SShawn Lin 		phy_power_off(sdhci_arasan->phy);
28191aa3661SShawn Lin 		phy_exit(sdhci_arasan->phy);
28291aa3661SShawn Lin 	}
28391aa3661SShawn Lin 
2840c7fe32eSJisheng Zhang 	ret = sdhci_pltfm_unregister(pdev);
2850c7fe32eSJisheng Zhang 
28689211418SJisheng Zhang 	clk_disable_unprepare(clk_ahb);
287e3ec3a3dSSoren Brinkmann 
2880c7fe32eSJisheng Zhang 	return ret;
289e3ec3a3dSSoren Brinkmann }
290e3ec3a3dSSoren Brinkmann 
291e3ec3a3dSSoren Brinkmann static const struct of_device_id sdhci_arasan_of_match[] = {
292e3ec3a3dSSoren Brinkmann 	{ .compatible = "arasan,sdhci-8.9a" },
293da795ec2SShawn Lin 	{ .compatible = "arasan,sdhci-5.1" },
294308f3f8dSSuman Tripathi 	{ .compatible = "arasan,sdhci-4.9a" },
295e3ec3a3dSSoren Brinkmann 	{ }
296e3ec3a3dSSoren Brinkmann };
297e3ec3a3dSSoren Brinkmann MODULE_DEVICE_TABLE(of, sdhci_arasan_of_match);
298e3ec3a3dSSoren Brinkmann 
299e3ec3a3dSSoren Brinkmann static struct platform_driver sdhci_arasan_driver = {
300e3ec3a3dSSoren Brinkmann 	.driver = {
301e3ec3a3dSSoren Brinkmann 		.name = "sdhci-arasan",
302e3ec3a3dSSoren Brinkmann 		.of_match_table = sdhci_arasan_of_match,
303e3ec3a3dSSoren Brinkmann 		.pm = &sdhci_arasan_dev_pm_ops,
304e3ec3a3dSSoren Brinkmann 	},
305e3ec3a3dSSoren Brinkmann 	.probe = sdhci_arasan_probe,
306e3ec3a3dSSoren Brinkmann 	.remove = sdhci_arasan_remove,
307e3ec3a3dSSoren Brinkmann };
308e3ec3a3dSSoren Brinkmann 
309e3ec3a3dSSoren Brinkmann module_platform_driver(sdhci_arasan_driver);
310e3ec3a3dSSoren Brinkmann 
311e3ec3a3dSSoren Brinkmann MODULE_DESCRIPTION("Driver for the Arasan SDHCI Controller");
312e3ec3a3dSSoren Brinkmann MODULE_AUTHOR("Soeren Brinkmann <soren.brinkmann@xilinx.com>");
313e3ec3a3dSSoren Brinkmann MODULE_LICENSE("GPL");
314