11802d0beSThomas Gleixner // SPDX-License-Identifier: GPL-2.0-only 2476bf3d6SAl Cooper /* 3476bf3d6SAl Cooper * sdhci-brcmstb.c Support for SDHCI on Broadcom BRCMSTB SoC's 4476bf3d6SAl Cooper * 5476bf3d6SAl Cooper * Copyright (C) 2015 Broadcom Corporation 6476bf3d6SAl Cooper */ 7476bf3d6SAl Cooper 8476bf3d6SAl Cooper #include <linux/io.h> 9476bf3d6SAl Cooper #include <linux/mmc/host.h> 10476bf3d6SAl Cooper #include <linux/module.h> 11476bf3d6SAl Cooper #include <linux/of.h> 1278ab82fdSAl Cooper #include <linux/bitops.h> 13d46ba2d1SAl Cooper #include <linux/delay.h> 14476bf3d6SAl Cooper 15476bf3d6SAl Cooper #include "sdhci-pltfm.h" 16d46ba2d1SAl Cooper #include "cqhci.h" 17476bf3d6SAl Cooper 1878ab82fdSAl Cooper #define SDHCI_VENDOR 0x78 1978ab82fdSAl Cooper #define SDHCI_VENDOR_ENHANCED_STRB 0x1 20*6bcc55feSAl Cooper #define SDHCI_VENDOR_GATE_SDCLK_EN 0x2 2178ab82fdSAl Cooper 22f3a70f99SAl Cooper #define BRCMSTB_MATCH_FLAGS_NO_64BIT BIT(0) 23f3a70f99SAl Cooper #define BRCMSTB_MATCH_FLAGS_BROKEN_TIMEOUT BIT(1) 24*6bcc55feSAl Cooper #define BRCMSTB_MATCH_FLAGS_HAS_CLOCK_GATE BIT(2) 25f3a70f99SAl Cooper 26f3a70f99SAl Cooper #define BRCMSTB_PRIV_FLAGS_HAS_CQE BIT(0) 27*6bcc55feSAl Cooper #define BRCMSTB_PRIV_FLAGS_GATE_CLOCK BIT(1) 2878ab82fdSAl Cooper 29d46ba2d1SAl Cooper #define SDHCI_ARASAN_CQE_BASE_ADDR 0x200 30d46ba2d1SAl Cooper 3178ab82fdSAl Cooper struct sdhci_brcmstb_priv { 3278ab82fdSAl Cooper void __iomem *cfg_regs; 33f3a70f99SAl Cooper unsigned int flags; 3478ab82fdSAl Cooper }; 3578ab82fdSAl Cooper 3678ab82fdSAl Cooper struct brcmstb_match_priv { 3778ab82fdSAl Cooper void (*hs400es)(struct mmc_host *mmc, struct mmc_ios *ios); 38d46ba2d1SAl Cooper struct sdhci_ops *ops; 39f3a70f99SAl Cooper const unsigned int flags; 4078ab82fdSAl Cooper }; 4178ab82fdSAl Cooper 42*6bcc55feSAl Cooper static inline void enable_clock_gating(struct sdhci_host *host) 43*6bcc55feSAl Cooper { 44*6bcc55feSAl Cooper u32 reg; 45*6bcc55feSAl Cooper 46*6bcc55feSAl Cooper reg = sdhci_readl(host, SDHCI_VENDOR); 47*6bcc55feSAl Cooper reg |= SDHCI_VENDOR_GATE_SDCLK_EN; 48*6bcc55feSAl Cooper sdhci_writel(host, reg, SDHCI_VENDOR); 49*6bcc55feSAl Cooper } 50*6bcc55feSAl Cooper 51*6bcc55feSAl Cooper void brcmstb_reset(struct sdhci_host *host, u8 mask) 52*6bcc55feSAl Cooper { 53*6bcc55feSAl Cooper struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); 54*6bcc55feSAl Cooper struct sdhci_brcmstb_priv *priv = sdhci_pltfm_priv(pltfm_host); 55*6bcc55feSAl Cooper 56*6bcc55feSAl Cooper sdhci_reset(host, mask); 57*6bcc55feSAl Cooper 58*6bcc55feSAl Cooper /* Reset will clear this, so re-enable it */ 59*6bcc55feSAl Cooper if (priv->flags & BRCMSTB_PRIV_FLAGS_GATE_CLOCK) 60*6bcc55feSAl Cooper enable_clock_gating(host); 61*6bcc55feSAl Cooper } 62*6bcc55feSAl Cooper 6378ab82fdSAl Cooper static void sdhci_brcmstb_hs400es(struct mmc_host *mmc, struct mmc_ios *ios) 6478ab82fdSAl Cooper { 6578ab82fdSAl Cooper struct sdhci_host *host = mmc_priv(mmc); 6678ab82fdSAl Cooper 6778ab82fdSAl Cooper u32 reg; 6878ab82fdSAl Cooper 6978ab82fdSAl Cooper dev_dbg(mmc_dev(mmc), "%s(): Setting HS400-Enhanced-Strobe mode\n", 7078ab82fdSAl Cooper __func__); 7178ab82fdSAl Cooper reg = readl(host->ioaddr + SDHCI_VENDOR); 7278ab82fdSAl Cooper if (ios->enhanced_strobe) 7378ab82fdSAl Cooper reg |= SDHCI_VENDOR_ENHANCED_STRB; 7478ab82fdSAl Cooper else 7578ab82fdSAl Cooper reg &= ~SDHCI_VENDOR_ENHANCED_STRB; 7678ab82fdSAl Cooper writel(reg, host->ioaddr + SDHCI_VENDOR); 7778ab82fdSAl Cooper } 7878ab82fdSAl Cooper 79d46ba2d1SAl Cooper static void sdhci_brcmstb_set_clock(struct sdhci_host *host, unsigned int clock) 80d46ba2d1SAl Cooper { 81d46ba2d1SAl Cooper u16 clk; 82d46ba2d1SAl Cooper 83d46ba2d1SAl Cooper host->mmc->actual_clock = 0; 84d46ba2d1SAl Cooper 85d46ba2d1SAl Cooper clk = sdhci_calc_clk(host, clock, &host->mmc->actual_clock); 86d46ba2d1SAl Cooper sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); 87d46ba2d1SAl Cooper 88d46ba2d1SAl Cooper if (clock == 0) 89d46ba2d1SAl Cooper return; 90d46ba2d1SAl Cooper 91d46ba2d1SAl Cooper sdhci_enable_clk(host, clk); 92d46ba2d1SAl Cooper } 93d46ba2d1SAl Cooper 942fefc7c5SAl Cooper static void sdhci_brcmstb_set_uhs_signaling(struct sdhci_host *host, 952fefc7c5SAl Cooper unsigned int timing) 962fefc7c5SAl Cooper { 972fefc7c5SAl Cooper u16 ctrl_2; 982fefc7c5SAl Cooper 992fefc7c5SAl Cooper dev_dbg(mmc_dev(host->mmc), "%s: Setting UHS signaling for %d timing\n", 1002fefc7c5SAl Cooper __func__, timing); 1012fefc7c5SAl Cooper ctrl_2 = sdhci_readw(host, SDHCI_HOST_CONTROL2); 1022fefc7c5SAl Cooper /* Select Bus Speed Mode for host */ 1032fefc7c5SAl Cooper ctrl_2 &= ~SDHCI_CTRL_UHS_MASK; 1042fefc7c5SAl Cooper if ((timing == MMC_TIMING_MMC_HS200) || 1052fefc7c5SAl Cooper (timing == MMC_TIMING_UHS_SDR104)) 1062fefc7c5SAl Cooper ctrl_2 |= SDHCI_CTRL_UHS_SDR104; 1072fefc7c5SAl Cooper else if (timing == MMC_TIMING_UHS_SDR12) 1082fefc7c5SAl Cooper ctrl_2 |= SDHCI_CTRL_UHS_SDR12; 1092fefc7c5SAl Cooper else if (timing == MMC_TIMING_SD_HS || 1102fefc7c5SAl Cooper timing == MMC_TIMING_MMC_HS || 1112fefc7c5SAl Cooper timing == MMC_TIMING_UHS_SDR25) 1122fefc7c5SAl Cooper ctrl_2 |= SDHCI_CTRL_UHS_SDR25; 1132fefc7c5SAl Cooper else if (timing == MMC_TIMING_UHS_SDR50) 1142fefc7c5SAl Cooper ctrl_2 |= SDHCI_CTRL_UHS_SDR50; 1152fefc7c5SAl Cooper else if ((timing == MMC_TIMING_UHS_DDR50) || 1162fefc7c5SAl Cooper (timing == MMC_TIMING_MMC_DDR52)) 1172fefc7c5SAl Cooper ctrl_2 |= SDHCI_CTRL_UHS_DDR50; 1182fefc7c5SAl Cooper else if (timing == MMC_TIMING_MMC_HS400) 1192fefc7c5SAl Cooper ctrl_2 |= SDHCI_CTRL_HS400; /* Non-standard */ 1202fefc7c5SAl Cooper sdhci_writew(host, ctrl_2, SDHCI_HOST_CONTROL2); 1212fefc7c5SAl Cooper } 1222fefc7c5SAl Cooper 123d46ba2d1SAl Cooper static void sdhci_brcmstb_dumpregs(struct mmc_host *mmc) 124d46ba2d1SAl Cooper { 125d46ba2d1SAl Cooper sdhci_dumpregs(mmc_priv(mmc)); 126d46ba2d1SAl Cooper } 127d46ba2d1SAl Cooper 128d46ba2d1SAl Cooper static void sdhci_brcmstb_cqe_enable(struct mmc_host *mmc) 129d46ba2d1SAl Cooper { 130d46ba2d1SAl Cooper struct sdhci_host *host = mmc_priv(mmc); 131d46ba2d1SAl Cooper u32 reg; 132d46ba2d1SAl Cooper 133d46ba2d1SAl Cooper reg = sdhci_readl(host, SDHCI_PRESENT_STATE); 134d46ba2d1SAl Cooper while (reg & SDHCI_DATA_AVAILABLE) { 135d46ba2d1SAl Cooper sdhci_readl(host, SDHCI_BUFFER); 136d46ba2d1SAl Cooper reg = sdhci_readl(host, SDHCI_PRESENT_STATE); 137d46ba2d1SAl Cooper } 138d46ba2d1SAl Cooper 139d46ba2d1SAl Cooper sdhci_cqe_enable(mmc); 140d46ba2d1SAl Cooper } 141d46ba2d1SAl Cooper 142d46ba2d1SAl Cooper static const struct cqhci_host_ops sdhci_brcmstb_cqhci_ops = { 143d46ba2d1SAl Cooper .enable = sdhci_brcmstb_cqe_enable, 144d46ba2d1SAl Cooper .disable = sdhci_cqe_disable, 145d46ba2d1SAl Cooper .dumpregs = sdhci_brcmstb_dumpregs, 146d46ba2d1SAl Cooper }; 147d46ba2d1SAl Cooper 148d46ba2d1SAl Cooper static struct sdhci_ops sdhci_brcmstb_ops = { 149476bf3d6SAl Cooper .set_clock = sdhci_set_clock, 150476bf3d6SAl Cooper .set_bus_width = sdhci_set_bus_width, 151476bf3d6SAl Cooper .reset = sdhci_reset, 152476bf3d6SAl Cooper .set_uhs_signaling = sdhci_set_uhs_signaling, 153476bf3d6SAl Cooper }; 154476bf3d6SAl Cooper 155d46ba2d1SAl Cooper static struct sdhci_ops sdhci_brcmstb_ops_7216 = { 156d46ba2d1SAl Cooper .set_clock = sdhci_brcmstb_set_clock, 157d46ba2d1SAl Cooper .set_bus_width = sdhci_set_bus_width, 158*6bcc55feSAl Cooper .reset = brcmstb_reset, 1592fefc7c5SAl Cooper .set_uhs_signaling = sdhci_brcmstb_set_uhs_signaling, 160d46ba2d1SAl Cooper }; 161d46ba2d1SAl Cooper 162d46ba2d1SAl Cooper static struct brcmstb_match_priv match_priv_7425 = { 163f3a70f99SAl Cooper .flags = BRCMSTB_MATCH_FLAGS_NO_64BIT | 164f3a70f99SAl Cooper BRCMSTB_MATCH_FLAGS_BROKEN_TIMEOUT, 165476bf3d6SAl Cooper .ops = &sdhci_brcmstb_ops, 166476bf3d6SAl Cooper }; 167476bf3d6SAl Cooper 168d46ba2d1SAl Cooper static struct brcmstb_match_priv match_priv_7445 = { 169f3a70f99SAl Cooper .flags = BRCMSTB_MATCH_FLAGS_BROKEN_TIMEOUT, 170d46ba2d1SAl Cooper .ops = &sdhci_brcmstb_ops, 17178ab82fdSAl Cooper }; 17278ab82fdSAl Cooper 17378ab82fdSAl Cooper static const struct brcmstb_match_priv match_priv_7216 = { 174*6bcc55feSAl Cooper .flags = BRCMSTB_MATCH_FLAGS_HAS_CLOCK_GATE, 17578ab82fdSAl Cooper .hs400es = sdhci_brcmstb_hs400es, 176d46ba2d1SAl Cooper .ops = &sdhci_brcmstb_ops_7216, 17778ab82fdSAl Cooper }; 17878ab82fdSAl Cooper 17978ab82fdSAl Cooper static const struct of_device_id sdhci_brcm_of_match[] = { 18078ab82fdSAl Cooper { .compatible = "brcm,bcm7425-sdhci", .data = &match_priv_7425 }, 18178ab82fdSAl Cooper { .compatible = "brcm,bcm7445-sdhci", .data = &match_priv_7445 }, 18278ab82fdSAl Cooper { .compatible = "brcm,bcm7216-sdhci", .data = &match_priv_7216 }, 18378ab82fdSAl Cooper {}, 18478ab82fdSAl Cooper }; 18578ab82fdSAl Cooper 186d46ba2d1SAl Cooper static u32 sdhci_brcmstb_cqhci_irq(struct sdhci_host *host, u32 intmask) 187d46ba2d1SAl Cooper { 188d46ba2d1SAl Cooper int cmd_error = 0; 189d46ba2d1SAl Cooper int data_error = 0; 190d46ba2d1SAl Cooper 191d46ba2d1SAl Cooper if (!sdhci_cqe_irq(host, intmask, &cmd_error, &data_error)) 192d46ba2d1SAl Cooper return intmask; 193d46ba2d1SAl Cooper 194d46ba2d1SAl Cooper cqhci_irq(host->mmc, intmask, cmd_error, data_error); 195d46ba2d1SAl Cooper 196d46ba2d1SAl Cooper return 0; 197d46ba2d1SAl Cooper } 198d46ba2d1SAl Cooper 199d46ba2d1SAl Cooper static int sdhci_brcmstb_add_host(struct sdhci_host *host, 200d46ba2d1SAl Cooper struct sdhci_brcmstb_priv *priv) 201d46ba2d1SAl Cooper { 202d46ba2d1SAl Cooper struct cqhci_host *cq_host; 203d46ba2d1SAl Cooper bool dma64; 204d46ba2d1SAl Cooper int ret; 205d46ba2d1SAl Cooper 206f3a70f99SAl Cooper if ((priv->flags & BRCMSTB_PRIV_FLAGS_HAS_CQE) == 0) 207d46ba2d1SAl Cooper return sdhci_add_host(host); 208d46ba2d1SAl Cooper 209d46ba2d1SAl Cooper dev_dbg(mmc_dev(host->mmc), "CQE is enabled\n"); 210d46ba2d1SAl Cooper host->mmc->caps2 |= MMC_CAP2_CQE | MMC_CAP2_CQE_DCMD; 211d46ba2d1SAl Cooper ret = sdhci_setup_host(host); 212d46ba2d1SAl Cooper if (ret) 213d46ba2d1SAl Cooper return ret; 214d46ba2d1SAl Cooper 215d46ba2d1SAl Cooper cq_host = devm_kzalloc(mmc_dev(host->mmc), 216d46ba2d1SAl Cooper sizeof(*cq_host), GFP_KERNEL); 217d46ba2d1SAl Cooper if (!cq_host) { 218d46ba2d1SAl Cooper ret = -ENOMEM; 219d46ba2d1SAl Cooper goto cleanup; 220d46ba2d1SAl Cooper } 221d46ba2d1SAl Cooper 222d46ba2d1SAl Cooper cq_host->mmio = host->ioaddr + SDHCI_ARASAN_CQE_BASE_ADDR; 223d46ba2d1SAl Cooper cq_host->ops = &sdhci_brcmstb_cqhci_ops; 224d46ba2d1SAl Cooper 225d46ba2d1SAl Cooper dma64 = host->flags & SDHCI_USE_64_BIT_DMA; 226d46ba2d1SAl Cooper if (dma64) { 227d46ba2d1SAl Cooper dev_dbg(mmc_dev(host->mmc), "Using 64 bit DMA\n"); 228d46ba2d1SAl Cooper cq_host->caps |= CQHCI_TASK_DESC_SZ_128; 229d46ba2d1SAl Cooper } 230d46ba2d1SAl Cooper 231d46ba2d1SAl Cooper ret = cqhci_init(cq_host, host->mmc, dma64); 232d46ba2d1SAl Cooper if (ret) 233d46ba2d1SAl Cooper goto cleanup; 234d46ba2d1SAl Cooper 235d46ba2d1SAl Cooper ret = __sdhci_add_host(host); 236d46ba2d1SAl Cooper if (ret) 237d46ba2d1SAl Cooper goto cleanup; 238d46ba2d1SAl Cooper 239d46ba2d1SAl Cooper return 0; 240d46ba2d1SAl Cooper 241d46ba2d1SAl Cooper cleanup: 242d46ba2d1SAl Cooper sdhci_cleanup_host(host); 243d46ba2d1SAl Cooper return ret; 244d46ba2d1SAl Cooper } 245d46ba2d1SAl Cooper 246476bf3d6SAl Cooper static int sdhci_brcmstb_probe(struct platform_device *pdev) 247476bf3d6SAl Cooper { 24878ab82fdSAl Cooper const struct brcmstb_match_priv *match_priv; 249d46ba2d1SAl Cooper struct sdhci_pltfm_data brcmstb_pdata; 250476bf3d6SAl Cooper struct sdhci_pltfm_host *pltfm_host; 25178ab82fdSAl Cooper const struct of_device_id *match; 25278ab82fdSAl Cooper struct sdhci_brcmstb_priv *priv; 25378ab82fdSAl Cooper struct sdhci_host *host; 25478ab82fdSAl Cooper struct resource *iomem; 255476bf3d6SAl Cooper struct clk *clk; 256476bf3d6SAl Cooper int res; 257476bf3d6SAl Cooper 25878ab82fdSAl Cooper match = of_match_node(sdhci_brcm_of_match, pdev->dev.of_node); 25978ab82fdSAl Cooper match_priv = match->data; 26078ab82fdSAl Cooper 261d46ba2d1SAl Cooper dev_dbg(&pdev->dev, "Probe found match for %s\n", match->compatible); 262d46ba2d1SAl Cooper 263b41123f4SKrzysztof Kozlowski clk = devm_clk_get_optional(&pdev->dev, NULL); 264b41123f4SKrzysztof Kozlowski if (IS_ERR(clk)) 265b41123f4SKrzysztof Kozlowski return dev_err_probe(&pdev->dev, PTR_ERR(clk), 266b41123f4SKrzysztof Kozlowski "Failed to get clock from Device Tree\n"); 267b41123f4SKrzysztof Kozlowski 268476bf3d6SAl Cooper res = clk_prepare_enable(clk); 269476bf3d6SAl Cooper if (res) 270476bf3d6SAl Cooper return res; 271476bf3d6SAl Cooper 272d46ba2d1SAl Cooper memset(&brcmstb_pdata, 0, sizeof(brcmstb_pdata)); 273d46ba2d1SAl Cooper brcmstb_pdata.ops = match_priv->ops; 274d46ba2d1SAl Cooper host = sdhci_pltfm_init(pdev, &brcmstb_pdata, 27578ab82fdSAl Cooper sizeof(struct sdhci_brcmstb_priv)); 276476bf3d6SAl Cooper if (IS_ERR(host)) { 277476bf3d6SAl Cooper res = PTR_ERR(host); 278476bf3d6SAl Cooper goto err_clk; 279476bf3d6SAl Cooper } 280476bf3d6SAl Cooper 28178ab82fdSAl Cooper pltfm_host = sdhci_priv(host); 28278ab82fdSAl Cooper priv = sdhci_pltfm_priv(pltfm_host); 283f3a70f99SAl Cooper if (device_property_read_bool(&pdev->dev, "supports-cqe")) { 284f3a70f99SAl Cooper priv->flags |= BRCMSTB_PRIV_FLAGS_HAS_CQE; 285f3a70f99SAl Cooper match_priv->ops->irq = sdhci_brcmstb_cqhci_irq; 286f3a70f99SAl Cooper } 28778ab82fdSAl Cooper 28878ab82fdSAl Cooper /* Map in the non-standard CFG registers */ 28978ab82fdSAl Cooper iomem = platform_get_resource(pdev, IORESOURCE_MEM, 1); 29078ab82fdSAl Cooper priv->cfg_regs = devm_ioremap_resource(&pdev->dev, iomem); 29178ab82fdSAl Cooper if (IS_ERR(priv->cfg_regs)) { 29278ab82fdSAl Cooper res = PTR_ERR(priv->cfg_regs); 29378ab82fdSAl Cooper goto err; 29478ab82fdSAl Cooper } 29578ab82fdSAl Cooper 296476bf3d6SAl Cooper sdhci_get_of_property(pdev); 2971e20186eSStefan Wahren res = mmc_of_parse(host->mmc); 2981e20186eSStefan Wahren if (res) 2991e20186eSStefan Wahren goto err; 300476bf3d6SAl Cooper 301476bf3d6SAl Cooper /* 302*6bcc55feSAl Cooper * Automatic clock gating does not work for SD cards that may 303*6bcc55feSAl Cooper * voltage switch so only enable it for non-removable devices. 304*6bcc55feSAl Cooper */ 305*6bcc55feSAl Cooper if ((match_priv->flags & BRCMSTB_MATCH_FLAGS_HAS_CLOCK_GATE) && 306*6bcc55feSAl Cooper (host->mmc->caps & MMC_CAP_NONREMOVABLE)) 307*6bcc55feSAl Cooper priv->flags |= BRCMSTB_PRIV_FLAGS_GATE_CLOCK; 308*6bcc55feSAl Cooper 309*6bcc55feSAl Cooper /* 31078ab82fdSAl Cooper * If the chip has enhanced strobe and it's enabled, add 31178ab82fdSAl Cooper * callback 31278ab82fdSAl Cooper */ 31378ab82fdSAl Cooper if (match_priv->hs400es && 31478ab82fdSAl Cooper (host->mmc->caps2 & MMC_CAP2_HS400_ES)) 31578ab82fdSAl Cooper host->mmc_host_ops.hs400_enhanced_strobe = match_priv->hs400es; 31678ab82fdSAl Cooper 31778ab82fdSAl Cooper /* 318476bf3d6SAl Cooper * Supply the existing CAPS, but clear the UHS modes. This 319476bf3d6SAl Cooper * will allow these modes to be specified by device tree 320476bf3d6SAl Cooper * properties through mmc_of_parse(). 321476bf3d6SAl Cooper */ 322476bf3d6SAl Cooper host->caps = sdhci_readl(host, SDHCI_CAPABILITIES); 323f3a70f99SAl Cooper if (match_priv->flags & BRCMSTB_MATCH_FLAGS_NO_64BIT) 3246a3d8cedSJaedon Shin host->caps &= ~SDHCI_CAN_64BIT; 325476bf3d6SAl Cooper host->caps1 = sdhci_readl(host, SDHCI_CAPABILITIES_1); 326476bf3d6SAl Cooper host->caps1 &= ~(SDHCI_SUPPORT_SDR50 | SDHCI_SUPPORT_SDR104 | 327476bf3d6SAl Cooper SDHCI_SUPPORT_DDR50); 32878ab82fdSAl Cooper host->quirks |= SDHCI_QUIRK_MISSING_CAPS; 32978ab82fdSAl Cooper 330f3a70f99SAl Cooper if (match_priv->flags & BRCMSTB_MATCH_FLAGS_BROKEN_TIMEOUT) 33178ab82fdSAl Cooper host->quirks |= SDHCI_QUIRK_BROKEN_TIMEOUT_VAL; 332476bf3d6SAl Cooper 333d46ba2d1SAl Cooper res = sdhci_brcmstb_add_host(host, priv); 334476bf3d6SAl Cooper if (res) 335476bf3d6SAl Cooper goto err; 336476bf3d6SAl Cooper 337476bf3d6SAl Cooper pltfm_host->clk = clk; 338476bf3d6SAl Cooper return res; 339476bf3d6SAl Cooper 340476bf3d6SAl Cooper err: 341476bf3d6SAl Cooper sdhci_pltfm_free(pdev); 342476bf3d6SAl Cooper err_clk: 343476bf3d6SAl Cooper clk_disable_unprepare(clk); 344476bf3d6SAl Cooper return res; 345476bf3d6SAl Cooper } 346476bf3d6SAl Cooper 347e7b5d63aSAl Cooper static void sdhci_brcmstb_shutdown(struct platform_device *pdev) 348e7b5d63aSAl Cooper { 3495b191dcbSAl Cooper sdhci_pltfm_suspend(&pdev->dev); 350e7b5d63aSAl Cooper } 351e7b5d63aSAl Cooper 352476bf3d6SAl Cooper MODULE_DEVICE_TABLE(of, sdhci_brcm_of_match); 353476bf3d6SAl Cooper 354476bf3d6SAl Cooper static struct platform_driver sdhci_brcmstb_driver = { 355476bf3d6SAl Cooper .driver = { 356476bf3d6SAl Cooper .name = "sdhci-brcmstb", 3572a99f3faSDouglas Anderson .probe_type = PROBE_PREFER_ASYNCHRONOUS, 3581ab0d2d7SMasahiro Yamada .pm = &sdhci_pltfm_pmops, 359476bf3d6SAl Cooper .of_match_table = of_match_ptr(sdhci_brcm_of_match), 360476bf3d6SAl Cooper }, 361476bf3d6SAl Cooper .probe = sdhci_brcmstb_probe, 362476bf3d6SAl Cooper .remove = sdhci_pltfm_unregister, 363e7b5d63aSAl Cooper .shutdown = sdhci_brcmstb_shutdown, 364476bf3d6SAl Cooper }; 365476bf3d6SAl Cooper 366476bf3d6SAl Cooper module_platform_driver(sdhci_brcmstb_driver); 367476bf3d6SAl Cooper 368476bf3d6SAl Cooper MODULE_DESCRIPTION("SDHCI driver for Broadcom BRCMSTB SoCs"); 369476bf3d6SAl Cooper MODULE_AUTHOR("Broadcom"); 370476bf3d6SAl Cooper MODULE_LICENSE("GPL v2"); 371