1 /*
2  * Copyright (C) 2013 Broadcom Corporation
3  *
4  * This program is free software; you can redistribute it and/or
5  * modify it under the terms of the GNU General Public License as
6  * published by the Free Software Foundation version 2.
7  *
8  * This program is distributed "as is" WITHOUT ANY WARRANTY of any
9  * kind, whether express or implied; without even the implied warranty
10  * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
11  * GNU General Public License for more details.
12  */
13 
14 #include <linux/kernel.h>
15 #include <linux/module.h>
16 #include <linux/delay.h>
17 #include <linux/highmem.h>
18 #include <linux/platform_device.h>
19 #include <linux/mmc/host.h>
20 #include <linux/io.h>
21 #include <linux/clk.h>
22 #include <linux/regulator/consumer.h>
23 #include <linux/of.h>
24 #include <linux/of_device.h>
25 #include <linux/mmc/slot-gpio.h>
26 
27 #include "sdhci-pltfm.h"
28 #include "sdhci.h"
29 
30 #define SDHCI_SOFT_RESET			0x01000000
31 #define KONA_SDHOST_CORECTRL			0x8000
32 #define KONA_SDHOST_CD_PINCTRL			0x00000008
33 #define KONA_SDHOST_STOP_HCLK			0x00000004
34 #define KONA_SDHOST_RESET			0x00000002
35 #define KONA_SDHOST_EN				0x00000001
36 
37 #define KONA_SDHOST_CORESTAT			0x8004
38 #define KONA_SDHOST_WP				0x00000002
39 #define KONA_SDHOST_CD_SW			0x00000001
40 
41 #define KONA_SDHOST_COREIMR			0x8008
42 #define KONA_SDHOST_IP				0x00000001
43 
44 #define KONA_SDHOST_COREISR			0x800C
45 #define KONA_SDHOST_COREIMSR			0x8010
46 #define KONA_SDHOST_COREDBG1			0x8014
47 #define KONA_SDHOST_COREGPO_MASK		0x8018
48 
49 #define SD_DETECT_GPIO_DEBOUNCE_128MS		128
50 
51 #define KONA_MMC_AUTOSUSPEND_DELAY		(50)
52 
53 struct sdhci_bcm_kona_dev {
54 	struct mutex	write_lock; /* protect back to back writes */
55 };
56 
57 
58 static int sdhci_bcm_kona_sd_reset(struct sdhci_host *host)
59 {
60 	unsigned int val;
61 	unsigned long timeout;
62 
63 	/* This timeout should be sufficent for core to reset */
64 	timeout = jiffies + msecs_to_jiffies(100);
65 
66 	/* reset the host using the top level reset */
67 	val = sdhci_readl(host, KONA_SDHOST_CORECTRL);
68 	val |= KONA_SDHOST_RESET;
69 	sdhci_writel(host, val, KONA_SDHOST_CORECTRL);
70 
71 	while (!(sdhci_readl(host, KONA_SDHOST_CORECTRL) & KONA_SDHOST_RESET)) {
72 		if (time_is_before_jiffies(timeout)) {
73 			pr_err("Error: sd host is stuck in reset!!!\n");
74 			return -EFAULT;
75 		}
76 	}
77 
78 	/* bring the host out of reset */
79 	val = sdhci_readl(host, KONA_SDHOST_CORECTRL);
80 	val &= ~KONA_SDHOST_RESET;
81 
82 	/*
83 	 * Back-to-Back register write needs a delay of 1ms at bootup (min 10uS)
84 	 * Back-to-Back writes to same register needs delay when SD bus clock
85 	 * is very low w.r.t AHB clock, mainly during boot-time and during card
86 	 * insert-removal.
87 	 */
88 	usleep_range(1000, 5000);
89 	sdhci_writel(host, val, KONA_SDHOST_CORECTRL);
90 
91 	return 0;
92 }
93 
94 static void sdhci_bcm_kona_sd_init(struct sdhci_host *host)
95 {
96 	unsigned int val;
97 
98 	/* enable the interrupt from the IP core */
99 	val = sdhci_readl(host, KONA_SDHOST_COREIMR);
100 	val |= KONA_SDHOST_IP;
101 	sdhci_writel(host, val, KONA_SDHOST_COREIMR);
102 
103 	/* Enable the AHB clock gating module to the host */
104 	val = sdhci_readl(host, KONA_SDHOST_CORECTRL);
105 	val |= KONA_SDHOST_EN;
106 
107 	/*
108 	 * Back-to-Back register write needs a delay of 1ms at bootup (min 10uS)
109 	 * Back-to-Back writes to same register needs delay when SD bus clock
110 	 * is very low w.r.t AHB clock, mainly during boot-time and during card
111 	 * insert-removal.
112 	 */
113 	usleep_range(1000, 5000);
114 	sdhci_writel(host, val, KONA_SDHOST_CORECTRL);
115 }
116 
117 /*
118  * Software emulation of the SD card insertion/removal. Set insert=1 for insert
119  * and insert=0 for removal. The card detection is done by GPIO. For Broadcom
120  * IP to function properly the bit 0 of CORESTAT register needs to be set/reset
121  * to generate the CD IRQ handled in sdhci.c which schedules card_tasklet.
122  */
123 static int sdhci_bcm_kona_sd_card_emulate(struct sdhci_host *host, int insert)
124 {
125 	struct sdhci_pltfm_host *pltfm_priv = sdhci_priv(host);
126 	struct sdhci_bcm_kona_dev *kona_dev = sdhci_pltfm_priv(pltfm_priv);
127 	u32 val;
128 
129 	/*
130 	 * Back-to-Back register write needs a delay of min 10uS.
131 	 * Back-to-Back writes to same register needs delay when SD bus clock
132 	 * is very low w.r.t AHB clock, mainly during boot-time and during card
133 	 * insert-removal.
134 	 * We keep 20uS
135 	 */
136 	mutex_lock(&kona_dev->write_lock);
137 	udelay(20);
138 	val = sdhci_readl(host, KONA_SDHOST_CORESTAT);
139 
140 	if (insert) {
141 		int ret;
142 
143 		ret = mmc_gpio_get_ro(host->mmc);
144 		if (ret >= 0)
145 			val = (val & ~KONA_SDHOST_WP) |
146 				((ret) ? KONA_SDHOST_WP : 0);
147 
148 		val |= KONA_SDHOST_CD_SW;
149 		sdhci_writel(host, val, KONA_SDHOST_CORESTAT);
150 	} else {
151 		val &= ~KONA_SDHOST_CD_SW;
152 		sdhci_writel(host, val, KONA_SDHOST_CORESTAT);
153 	}
154 	mutex_unlock(&kona_dev->write_lock);
155 
156 	return 0;
157 }
158 
159 /*
160  * SD card interrupt event callback
161  */
162 static void sdhci_bcm_kona_card_event(struct sdhci_host *host)
163 {
164 	if (mmc_gpio_get_cd(host->mmc) > 0) {
165 		dev_dbg(mmc_dev(host->mmc),
166 			"card inserted\n");
167 		sdhci_bcm_kona_sd_card_emulate(host, 1);
168 	} else {
169 		dev_dbg(mmc_dev(host->mmc),
170 			"card removed\n");
171 		sdhci_bcm_kona_sd_card_emulate(host, 0);
172 	}
173 }
174 
175 static void sdhci_bcm_kona_init_74_clocks(struct sdhci_host *host,
176 				u8 power_mode)
177 {
178 	/*
179 	 *  JEDEC and SD spec specify supplying 74 continuous clocks to
180 	 * device after power up. With minimum bus (100KHz) that
181 	 * that translates to 740us
182 	 */
183 	if (power_mode != MMC_POWER_OFF)
184 		udelay(740);
185 }
186 
187 static const struct sdhci_ops sdhci_bcm_kona_ops = {
188 	.set_clock = sdhci_set_clock,
189 	.get_max_clock = sdhci_pltfm_clk_get_max_clock,
190 	.get_timeout_clock = sdhci_pltfm_clk_get_max_clock,
191 	.platform_send_init_74_clocks = sdhci_bcm_kona_init_74_clocks,
192 	.set_bus_width = sdhci_set_bus_width,
193 	.reset = sdhci_reset,
194 	.set_uhs_signaling = sdhci_set_uhs_signaling,
195 	.card_event = sdhci_bcm_kona_card_event,
196 };
197 
198 static const struct sdhci_pltfm_data sdhci_pltfm_data_kona = {
199 	.ops    = &sdhci_bcm_kona_ops,
200 	.quirks = SDHCI_QUIRK_NO_CARD_NO_RESET |
201 		SDHCI_QUIRK_BROKEN_TIMEOUT_VAL | SDHCI_QUIRK_32BIT_DMA_ADDR |
202 		SDHCI_QUIRK_32BIT_DMA_SIZE | SDHCI_QUIRK_32BIT_ADMA_SIZE |
203 		SDHCI_QUIRK_FORCE_BLK_SZ_2048 |
204 		SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN,
205 };
206 
207 static const struct of_device_id sdhci_bcm_kona_of_match[] = {
208 	{ .compatible = "brcm,kona-sdhci"},
209 	{ .compatible = "bcm,kona-sdhci"}, /* deprecated name */
210 	{}
211 };
212 MODULE_DEVICE_TABLE(of, sdhci_bcm_kona_of_match);
213 
214 static int sdhci_bcm_kona_probe(struct platform_device *pdev)
215 {
216 	struct sdhci_bcm_kona_dev *kona_dev = NULL;
217 	struct sdhci_pltfm_host *pltfm_priv;
218 	struct device *dev = &pdev->dev;
219 	struct sdhci_host *host;
220 	int ret;
221 
222 	ret = 0;
223 
224 	host = sdhci_pltfm_init(pdev, &sdhci_pltfm_data_kona,
225 			sizeof(*kona_dev));
226 	if (IS_ERR(host))
227 		return PTR_ERR(host);
228 
229 	dev_dbg(dev, "%s: inited. IOADDR=%p\n", __func__, host->ioaddr);
230 
231 	pltfm_priv = sdhci_priv(host);
232 
233 	kona_dev = sdhci_pltfm_priv(pltfm_priv);
234 	mutex_init(&kona_dev->write_lock);
235 
236 	ret = mmc_of_parse(host->mmc);
237 	if (ret)
238 		goto err_pltfm_free;
239 
240 	if (!host->mmc->f_max) {
241 		dev_err(&pdev->dev, "Missing max-freq for SDHCI cfg\n");
242 		ret = -ENXIO;
243 		goto err_pltfm_free;
244 	}
245 
246 	/* Get and enable the core clock */
247 	pltfm_priv->clk = devm_clk_get(dev, NULL);
248 	if (IS_ERR(pltfm_priv->clk)) {
249 		dev_err(dev, "Failed to get core clock\n");
250 		ret = PTR_ERR(pltfm_priv->clk);
251 		goto err_pltfm_free;
252 	}
253 
254 	ret = clk_set_rate(pltfm_priv->clk, host->mmc->f_max);
255 	if (ret) {
256 		dev_err(dev, "Failed to set rate core clock\n");
257 		goto err_pltfm_free;
258 	}
259 
260 	ret = clk_prepare_enable(pltfm_priv->clk);
261 	if (ret) {
262 		dev_err(dev, "Failed to enable core clock\n");
263 		goto err_pltfm_free;
264 	}
265 
266 	dev_dbg(dev, "non-removable=%c\n",
267 		mmc_card_is_removable(host->mmc) ? 'N' : 'Y');
268 	dev_dbg(dev, "cd_gpio %c, wp_gpio %c\n",
269 		(mmc_gpio_get_cd(host->mmc) != -ENOSYS) ? 'Y' : 'N',
270 		(mmc_gpio_get_ro(host->mmc) != -ENOSYS) ? 'Y' : 'N');
271 
272 	if (!mmc_card_is_removable(host->mmc))
273 		host->quirks |= SDHCI_QUIRK_BROKEN_CARD_DETECTION;
274 
275 	dev_dbg(dev, "is_8bit=%c\n",
276 		(host->mmc->caps & MMC_CAP_8_BIT_DATA) ? 'Y' : 'N');
277 
278 	ret = sdhci_bcm_kona_sd_reset(host);
279 	if (ret)
280 		goto err_clk_disable;
281 
282 	sdhci_bcm_kona_sd_init(host);
283 
284 	ret = sdhci_add_host(host);
285 	if (ret)
286 		goto err_reset;
287 
288 	/* if device is eMMC, emulate card insert right here */
289 	if (!mmc_card_is_removable(host->mmc)) {
290 		ret = sdhci_bcm_kona_sd_card_emulate(host, 1);
291 		if (ret) {
292 			dev_err(dev,
293 				"unable to emulate card insertion\n");
294 			goto err_remove_host;
295 		}
296 	}
297 	/*
298 	 * Since the card detection GPIO interrupt is configured to be
299 	 * edge sensitive, check the initial GPIO value here, emulate
300 	 * only if the card is present
301 	 */
302 	if (mmc_gpio_get_cd(host->mmc) > 0)
303 		sdhci_bcm_kona_sd_card_emulate(host, 1);
304 
305 	dev_dbg(dev, "initialized properly\n");
306 	return 0;
307 
308 err_remove_host:
309 	sdhci_remove_host(host, 0);
310 
311 err_reset:
312 	sdhci_bcm_kona_sd_reset(host);
313 
314 err_clk_disable:
315 	clk_disable_unprepare(pltfm_priv->clk);
316 
317 err_pltfm_free:
318 	sdhci_pltfm_free(pdev);
319 
320 	dev_err(dev, "Probing of sdhci-pltfm failed: %d\n", ret);
321 	return ret;
322 }
323 
324 static struct platform_driver sdhci_bcm_kona_driver = {
325 	.driver		= {
326 		.name	= "sdhci-kona",
327 		.pm	= &sdhci_pltfm_pmops,
328 		.of_match_table = sdhci_bcm_kona_of_match,
329 	},
330 	.probe		= sdhci_bcm_kona_probe,
331 	.remove		= sdhci_pltfm_unregister,
332 };
333 module_platform_driver(sdhci_bcm_kona_driver);
334 
335 MODULE_DESCRIPTION("SDHCI driver for Broadcom Kona platform");
336 MODULE_AUTHOR("Broadcom");
337 MODULE_LICENSE("GPL v2");
338