1 /* 2 * Copyright (C) 2013 Broadcom Corporation 3 * 4 * This program is free software; you can redistribute it and/or 5 * modify it under the terms of the GNU General Public License as 6 * published by the Free Software Foundation version 2. 7 * 8 * This program is distributed "as is" WITHOUT ANY WARRANTY of any 9 * kind, whether express or implied; without even the implied warranty 10 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 11 * GNU General Public License for more details. 12 */ 13 14 #include <linux/kernel.h> 15 #include <linux/module.h> 16 #include <linux/delay.h> 17 #include <linux/highmem.h> 18 #include <linux/platform_device.h> 19 #include <linux/mmc/host.h> 20 #include <linux/io.h> 21 #include <linux/gpio.h> 22 #include <linux/clk.h> 23 #include <linux/regulator/consumer.h> 24 #include <linux/of.h> 25 #include <linux/of_device.h> 26 #include <linux/of_gpio.h> 27 #include <linux/mmc/slot-gpio.h> 28 29 #include "sdhci-pltfm.h" 30 #include "sdhci.h" 31 32 #define SDHCI_SOFT_RESET 0x01000000 33 #define KONA_SDHOST_CORECTRL 0x8000 34 #define KONA_SDHOST_CD_PINCTRL 0x00000008 35 #define KONA_SDHOST_STOP_HCLK 0x00000004 36 #define KONA_SDHOST_RESET 0x00000002 37 #define KONA_SDHOST_EN 0x00000001 38 39 #define KONA_SDHOST_CORESTAT 0x8004 40 #define KONA_SDHOST_WP 0x00000002 41 #define KONA_SDHOST_CD_SW 0x00000001 42 43 #define KONA_SDHOST_COREIMR 0x8008 44 #define KONA_SDHOST_IP 0x00000001 45 46 #define KONA_SDHOST_COREISR 0x800C 47 #define KONA_SDHOST_COREIMSR 0x8010 48 #define KONA_SDHOST_COREDBG1 0x8014 49 #define KONA_SDHOST_COREGPO_MASK 0x8018 50 51 #define SD_DETECT_GPIO_DEBOUNCE_128MS 128 52 53 #define KONA_MMC_AUTOSUSPEND_DELAY (50) 54 55 struct sdhci_bcm_kona_dev { 56 struct mutex write_lock; /* protect back to back writes */ 57 struct clk *external_clk; 58 }; 59 60 61 static int sdhci_bcm_kona_sd_reset(struct sdhci_host *host) 62 { 63 unsigned int val; 64 unsigned long timeout; 65 66 /* This timeout should be sufficent for core to reset */ 67 timeout = jiffies + msecs_to_jiffies(100); 68 69 /* reset the host using the top level reset */ 70 val = sdhci_readl(host, KONA_SDHOST_CORECTRL); 71 val |= KONA_SDHOST_RESET; 72 sdhci_writel(host, val, KONA_SDHOST_CORECTRL); 73 74 while (!(sdhci_readl(host, KONA_SDHOST_CORECTRL) & KONA_SDHOST_RESET)) { 75 if (time_is_before_jiffies(timeout)) { 76 pr_err("Error: sd host is stuck in reset!!!\n"); 77 return -EFAULT; 78 } 79 } 80 81 /* bring the host out of reset */ 82 val = sdhci_readl(host, KONA_SDHOST_CORECTRL); 83 val &= ~KONA_SDHOST_RESET; 84 85 /* 86 * Back-to-Back register write needs a delay of 1ms at bootup (min 10uS) 87 * Back-to-Back writes to same register needs delay when SD bus clock 88 * is very low w.r.t AHB clock, mainly during boot-time and during card 89 * insert-removal. 90 */ 91 usleep_range(1000, 5000); 92 sdhci_writel(host, val, KONA_SDHOST_CORECTRL); 93 94 return 0; 95 } 96 97 static void sdhci_bcm_kona_sd_init(struct sdhci_host *host) 98 { 99 unsigned int val; 100 101 /* enable the interrupt from the IP core */ 102 val = sdhci_readl(host, KONA_SDHOST_COREIMR); 103 val |= KONA_SDHOST_IP; 104 sdhci_writel(host, val, KONA_SDHOST_COREIMR); 105 106 /* Enable the AHB clock gating module to the host */ 107 val = sdhci_readl(host, KONA_SDHOST_CORECTRL); 108 val |= KONA_SDHOST_EN; 109 110 /* 111 * Back-to-Back register write needs a delay of 1ms at bootup (min 10uS) 112 * Back-to-Back writes to same register needs delay when SD bus clock 113 * is very low w.r.t AHB clock, mainly during boot-time and during card 114 * insert-removal. 115 */ 116 usleep_range(1000, 5000); 117 sdhci_writel(host, val, KONA_SDHOST_CORECTRL); 118 } 119 120 /* 121 * Software emulation of the SD card insertion/removal. Set insert=1 for insert 122 * and insert=0 for removal. The card detection is done by GPIO. For Broadcom 123 * IP to function properly the bit 0 of CORESTAT register needs to be set/reset 124 * to generate the CD IRQ handled in sdhci.c which schedules card_tasklet. 125 */ 126 static int sdhci_bcm_kona_sd_card_emulate(struct sdhci_host *host, int insert) 127 { 128 struct sdhci_pltfm_host *pltfm_priv = sdhci_priv(host); 129 struct sdhci_bcm_kona_dev *kona_dev = sdhci_pltfm_priv(pltfm_priv); 130 u32 val; 131 132 /* 133 * Back-to-Back register write needs a delay of min 10uS. 134 * Back-to-Back writes to same register needs delay when SD bus clock 135 * is very low w.r.t AHB clock, mainly during boot-time and during card 136 * insert-removal. 137 * We keep 20uS 138 */ 139 mutex_lock(&kona_dev->write_lock); 140 udelay(20); 141 val = sdhci_readl(host, KONA_SDHOST_CORESTAT); 142 143 if (insert) { 144 int ret; 145 146 ret = mmc_gpio_get_ro(host->mmc); 147 if (ret >= 0) 148 val = (val & ~KONA_SDHOST_WP) | 149 ((ret) ? KONA_SDHOST_WP : 0); 150 151 val |= KONA_SDHOST_CD_SW; 152 sdhci_writel(host, val, KONA_SDHOST_CORESTAT); 153 } else { 154 val &= ~KONA_SDHOST_CD_SW; 155 sdhci_writel(host, val, KONA_SDHOST_CORESTAT); 156 } 157 mutex_unlock(&kona_dev->write_lock); 158 159 return 0; 160 } 161 162 /* 163 * SD card interrupt event callback 164 */ 165 static void sdhci_bcm_kona_card_event(struct sdhci_host *host) 166 { 167 if (mmc_gpio_get_cd(host->mmc) > 0) { 168 dev_dbg(mmc_dev(host->mmc), 169 "card inserted\n"); 170 sdhci_bcm_kona_sd_card_emulate(host, 1); 171 } else { 172 dev_dbg(mmc_dev(host->mmc), 173 "card removed\n"); 174 sdhci_bcm_kona_sd_card_emulate(host, 0); 175 } 176 } 177 178 /* 179 * Get the base clock. Use central clock source for now. Not sure if different 180 * clock speed to each dev is allowed 181 */ 182 static unsigned int sdhci_bcm_kona_get_max_clk(struct sdhci_host *host) 183 { 184 struct sdhci_bcm_kona_dev *kona_dev; 185 struct sdhci_pltfm_host *pltfm_priv = sdhci_priv(host); 186 kona_dev = sdhci_pltfm_priv(pltfm_priv); 187 188 return host->mmc->f_max; 189 } 190 191 static unsigned int sdhci_bcm_kona_get_timeout_clock(struct sdhci_host *host) 192 { 193 return sdhci_bcm_kona_get_max_clk(host); 194 } 195 196 static void sdhci_bcm_kona_init_74_clocks(struct sdhci_host *host, 197 u8 power_mode) 198 { 199 /* 200 * JEDEC and SD spec specify supplying 74 continuous clocks to 201 * device after power up. With minimum bus (100KHz) that 202 * that translates to 740us 203 */ 204 if (power_mode != MMC_POWER_OFF) 205 udelay(740); 206 } 207 208 static struct sdhci_ops sdhci_bcm_kona_ops = { 209 .set_clock = sdhci_set_clock, 210 .get_max_clock = sdhci_bcm_kona_get_max_clk, 211 .get_timeout_clock = sdhci_bcm_kona_get_timeout_clock, 212 .platform_send_init_74_clocks = sdhci_bcm_kona_init_74_clocks, 213 .set_bus_width = sdhci_set_bus_width, 214 .reset = sdhci_reset, 215 .set_uhs_signaling = sdhci_set_uhs_signaling, 216 .card_event = sdhci_bcm_kona_card_event, 217 }; 218 219 static struct sdhci_pltfm_data sdhci_pltfm_data_kona = { 220 .ops = &sdhci_bcm_kona_ops, 221 .quirks = SDHCI_QUIRK_NO_CARD_NO_RESET | 222 SDHCI_QUIRK_BROKEN_TIMEOUT_VAL | SDHCI_QUIRK_32BIT_DMA_ADDR | 223 SDHCI_QUIRK_32BIT_DMA_SIZE | SDHCI_QUIRK_32BIT_ADMA_SIZE | 224 SDHCI_QUIRK_FORCE_BLK_SZ_2048 | 225 SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN, 226 }; 227 228 static const struct of_device_id sdhci_bcm_kona_of_match[] = { 229 { .compatible = "brcm,kona-sdhci"}, 230 { .compatible = "bcm,kona-sdhci"}, /* deprecated name */ 231 {} 232 }; 233 MODULE_DEVICE_TABLE(of, sdhci_bcm_kona_of_match); 234 235 static int sdhci_bcm_kona_probe(struct platform_device *pdev) 236 { 237 struct sdhci_bcm_kona_dev *kona_dev = NULL; 238 struct sdhci_pltfm_host *pltfm_priv; 239 struct device *dev = &pdev->dev; 240 struct sdhci_host *host; 241 int ret; 242 243 ret = 0; 244 245 host = sdhci_pltfm_init(pdev, &sdhci_pltfm_data_kona, 246 sizeof(*kona_dev)); 247 if (IS_ERR(host)) 248 return PTR_ERR(host); 249 250 dev_dbg(dev, "%s: inited. IOADDR=%p\n", __func__, host->ioaddr); 251 252 pltfm_priv = sdhci_priv(host); 253 254 kona_dev = sdhci_pltfm_priv(pltfm_priv); 255 mutex_init(&kona_dev->write_lock); 256 257 mmc_of_parse(host->mmc); 258 259 if (!host->mmc->f_max) { 260 dev_err(&pdev->dev, "Missing max-freq for SDHCI cfg\n"); 261 ret = -ENXIO; 262 goto err_pltfm_free; 263 } 264 265 /* Get and enable the external clock */ 266 kona_dev->external_clk = devm_clk_get(dev, NULL); 267 if (IS_ERR(kona_dev->external_clk)) { 268 dev_err(dev, "Failed to get external clock\n"); 269 ret = PTR_ERR(kona_dev->external_clk); 270 goto err_pltfm_free; 271 } 272 273 if (clk_set_rate(kona_dev->external_clk, host->mmc->f_max) != 0) { 274 dev_err(dev, "Failed to set rate external clock\n"); 275 goto err_pltfm_free; 276 } 277 278 if (clk_prepare_enable(kona_dev->external_clk) != 0) { 279 dev_err(dev, "Failed to enable external clock\n"); 280 goto err_pltfm_free; 281 } 282 283 dev_dbg(dev, "non-removable=%c\n", 284 (host->mmc->caps & MMC_CAP_NONREMOVABLE) ? 'Y' : 'N'); 285 dev_dbg(dev, "cd_gpio %c, wp_gpio %c\n", 286 (mmc_gpio_get_cd(host->mmc) != -ENOSYS) ? 'Y' : 'N', 287 (mmc_gpio_get_ro(host->mmc) != -ENOSYS) ? 'Y' : 'N'); 288 289 if (host->mmc->caps & MMC_CAP_NONREMOVABLE) 290 host->quirks |= SDHCI_QUIRK_BROKEN_CARD_DETECTION; 291 292 dev_dbg(dev, "is_8bit=%c\n", 293 (host->mmc->caps | MMC_CAP_8_BIT_DATA) ? 'Y' : 'N'); 294 295 ret = sdhci_bcm_kona_sd_reset(host); 296 if (ret) 297 goto err_clk_disable; 298 299 sdhci_bcm_kona_sd_init(host); 300 301 ret = sdhci_add_host(host); 302 if (ret) { 303 dev_err(dev, "Failed sdhci_add_host\n"); 304 goto err_reset; 305 } 306 307 /* if device is eMMC, emulate card insert right here */ 308 if (host->mmc->caps & MMC_CAP_NONREMOVABLE) { 309 ret = sdhci_bcm_kona_sd_card_emulate(host, 1); 310 if (ret) { 311 dev_err(dev, 312 "unable to emulate card insertion\n"); 313 goto err_remove_host; 314 } 315 } 316 /* 317 * Since the card detection GPIO interrupt is configured to be 318 * edge sensitive, check the initial GPIO value here, emulate 319 * only if the card is present 320 */ 321 if (mmc_gpio_get_cd(host->mmc) > 0) 322 sdhci_bcm_kona_sd_card_emulate(host, 1); 323 324 dev_dbg(dev, "initialized properly\n"); 325 return 0; 326 327 err_remove_host: 328 sdhci_remove_host(host, 0); 329 330 err_reset: 331 sdhci_bcm_kona_sd_reset(host); 332 333 err_clk_disable: 334 clk_disable_unprepare(kona_dev->external_clk); 335 336 err_pltfm_free: 337 sdhci_pltfm_free(pdev); 338 339 dev_err(dev, "Probing of sdhci-pltfm failed: %d\n", ret); 340 return ret; 341 } 342 343 static int sdhci_bcm_kona_remove(struct platform_device *pdev) 344 { 345 struct sdhci_host *host = platform_get_drvdata(pdev); 346 struct sdhci_pltfm_host *pltfm_priv = sdhci_priv(host); 347 struct sdhci_bcm_kona_dev *kona_dev = sdhci_pltfm_priv(pltfm_priv); 348 int dead = (readl(host->ioaddr + SDHCI_INT_STATUS) == 0xffffffff); 349 350 sdhci_remove_host(host, dead); 351 352 clk_disable_unprepare(kona_dev->external_clk); 353 354 sdhci_pltfm_free(pdev); 355 356 return 0; 357 } 358 359 static struct platform_driver sdhci_bcm_kona_driver = { 360 .driver = { 361 .name = "sdhci-kona", 362 .pm = SDHCI_PLTFM_PMOPS, 363 .of_match_table = sdhci_bcm_kona_of_match, 364 }, 365 .probe = sdhci_bcm_kona_probe, 366 .remove = sdhci_bcm_kona_remove, 367 }; 368 module_platform_driver(sdhci_bcm_kona_driver); 369 370 MODULE_DESCRIPTION("SDHCI driver for Broadcom Kona platform"); 371 MODULE_AUTHOR("Broadcom"); 372 MODULE_LICENSE("GPL v2"); 373