1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Secure Digital Host Controller Interface ACPI driver. 4 * 5 * Copyright (c) 2012, Intel Corporation. 6 */ 7 8 #include <linux/init.h> 9 #include <linux/export.h> 10 #include <linux/module.h> 11 #include <linux/device.h> 12 #include <linux/platform_device.h> 13 #include <linux/ioport.h> 14 #include <linux/io.h> 15 #include <linux/dma-mapping.h> 16 #include <linux/compiler.h> 17 #include <linux/stddef.h> 18 #include <linux/bitops.h> 19 #include <linux/types.h> 20 #include <linux/err.h> 21 #include <linux/interrupt.h> 22 #include <linux/acpi.h> 23 #include <linux/pm.h> 24 #include <linux/pm_runtime.h> 25 #include <linux/delay.h> 26 27 #include <linux/mmc/host.h> 28 #include <linux/mmc/pm.h> 29 #include <linux/mmc/slot-gpio.h> 30 31 #ifdef CONFIG_X86 32 #include <asm/cpu_device_id.h> 33 #include <asm/intel-family.h> 34 #include <asm/iosf_mbi.h> 35 #include <linux/pci.h> 36 #endif 37 38 #include "sdhci.h" 39 40 enum { 41 SDHCI_ACPI_SD_CD = BIT(0), 42 SDHCI_ACPI_RUNTIME_PM = BIT(1), 43 SDHCI_ACPI_SD_CD_OVERRIDE_LEVEL = BIT(2), 44 }; 45 46 struct sdhci_acpi_chip { 47 const struct sdhci_ops *ops; 48 unsigned int quirks; 49 unsigned int quirks2; 50 unsigned long caps; 51 unsigned int caps2; 52 mmc_pm_flag_t pm_caps; 53 }; 54 55 struct sdhci_acpi_slot { 56 const struct sdhci_acpi_chip *chip; 57 unsigned int quirks; 58 unsigned int quirks2; 59 unsigned long caps; 60 unsigned int caps2; 61 mmc_pm_flag_t pm_caps; 62 unsigned int flags; 63 size_t priv_size; 64 int (*probe_slot)(struct platform_device *, struct acpi_device *); 65 int (*remove_slot)(struct platform_device *); 66 int (*free_slot)(struct platform_device *pdev); 67 int (*setup_host)(struct platform_device *pdev); 68 }; 69 70 struct sdhci_acpi_host { 71 struct sdhci_host *host; 72 const struct sdhci_acpi_slot *slot; 73 struct platform_device *pdev; 74 bool use_runtime_pm; 75 unsigned long private[0] ____cacheline_aligned; 76 }; 77 78 static inline void *sdhci_acpi_priv(struct sdhci_acpi_host *c) 79 { 80 return (void *)c->private; 81 } 82 83 static inline bool sdhci_acpi_flag(struct sdhci_acpi_host *c, unsigned int flag) 84 { 85 return c->slot && (c->slot->flags & flag); 86 } 87 88 #define INTEL_DSM_HS_CAPS_SDR25 BIT(0) 89 #define INTEL_DSM_HS_CAPS_DDR50 BIT(1) 90 #define INTEL_DSM_HS_CAPS_SDR50 BIT(2) 91 #define INTEL_DSM_HS_CAPS_SDR104 BIT(3) 92 93 enum { 94 INTEL_DSM_FNS = 0, 95 INTEL_DSM_V18_SWITCH = 3, 96 INTEL_DSM_V33_SWITCH = 4, 97 INTEL_DSM_HS_CAPS = 8, 98 }; 99 100 struct intel_host { 101 u32 dsm_fns; 102 u32 hs_caps; 103 }; 104 105 static const guid_t intel_dsm_guid = 106 GUID_INIT(0xF6C13EA5, 0x65CD, 0x461F, 107 0xAB, 0x7A, 0x29, 0xF7, 0xE8, 0xD5, 0xBD, 0x61); 108 109 static int __intel_dsm(struct intel_host *intel_host, struct device *dev, 110 unsigned int fn, u32 *result) 111 { 112 union acpi_object *obj; 113 int err = 0; 114 115 obj = acpi_evaluate_dsm(ACPI_HANDLE(dev), &intel_dsm_guid, 0, fn, NULL); 116 if (!obj) 117 return -EOPNOTSUPP; 118 119 if (obj->type == ACPI_TYPE_INTEGER) { 120 *result = obj->integer.value; 121 } else if (obj->type == ACPI_TYPE_BUFFER && obj->buffer.length > 0) { 122 size_t len = min_t(size_t, obj->buffer.length, 4); 123 124 *result = 0; 125 memcpy(result, obj->buffer.pointer, len); 126 } else { 127 dev_err(dev, "%s DSM fn %u obj->type %d obj->buffer.length %d\n", 128 __func__, fn, obj->type, obj->buffer.length); 129 err = -EINVAL; 130 } 131 132 ACPI_FREE(obj); 133 134 return err; 135 } 136 137 static int intel_dsm(struct intel_host *intel_host, struct device *dev, 138 unsigned int fn, u32 *result) 139 { 140 if (fn > 31 || !(intel_host->dsm_fns & (1 << fn))) 141 return -EOPNOTSUPP; 142 143 return __intel_dsm(intel_host, dev, fn, result); 144 } 145 146 static void intel_dsm_init(struct intel_host *intel_host, struct device *dev, 147 struct mmc_host *mmc) 148 { 149 int err; 150 151 intel_host->hs_caps = ~0; 152 153 err = __intel_dsm(intel_host, dev, INTEL_DSM_FNS, &intel_host->dsm_fns); 154 if (err) { 155 pr_debug("%s: DSM not supported, error %d\n", 156 mmc_hostname(mmc), err); 157 return; 158 } 159 160 pr_debug("%s: DSM function mask %#x\n", 161 mmc_hostname(mmc), intel_host->dsm_fns); 162 163 intel_dsm(intel_host, dev, INTEL_DSM_HS_CAPS, &intel_host->hs_caps); 164 } 165 166 static int intel_start_signal_voltage_switch(struct mmc_host *mmc, 167 struct mmc_ios *ios) 168 { 169 struct device *dev = mmc_dev(mmc); 170 struct sdhci_acpi_host *c = dev_get_drvdata(dev); 171 struct intel_host *intel_host = sdhci_acpi_priv(c); 172 unsigned int fn; 173 u32 result = 0; 174 int err; 175 176 err = sdhci_start_signal_voltage_switch(mmc, ios); 177 if (err) 178 return err; 179 180 switch (ios->signal_voltage) { 181 case MMC_SIGNAL_VOLTAGE_330: 182 fn = INTEL_DSM_V33_SWITCH; 183 break; 184 case MMC_SIGNAL_VOLTAGE_180: 185 fn = INTEL_DSM_V18_SWITCH; 186 break; 187 default: 188 return 0; 189 } 190 191 err = intel_dsm(intel_host, dev, fn, &result); 192 pr_debug("%s: %s DSM fn %u error %d result %u\n", 193 mmc_hostname(mmc), __func__, fn, err, result); 194 195 return 0; 196 } 197 198 static void sdhci_acpi_int_hw_reset(struct sdhci_host *host) 199 { 200 u8 reg; 201 202 reg = sdhci_readb(host, SDHCI_POWER_CONTROL); 203 reg |= 0x10; 204 sdhci_writeb(host, reg, SDHCI_POWER_CONTROL); 205 /* For eMMC, minimum is 1us but give it 9us for good measure */ 206 udelay(9); 207 reg &= ~0x10; 208 sdhci_writeb(host, reg, SDHCI_POWER_CONTROL); 209 /* For eMMC, minimum is 200us but give it 300us for good measure */ 210 usleep_range(300, 1000); 211 } 212 213 static const struct sdhci_ops sdhci_acpi_ops_dflt = { 214 .set_clock = sdhci_set_clock, 215 .set_bus_width = sdhci_set_bus_width, 216 .reset = sdhci_reset, 217 .set_uhs_signaling = sdhci_set_uhs_signaling, 218 }; 219 220 static const struct sdhci_ops sdhci_acpi_ops_int = { 221 .set_clock = sdhci_set_clock, 222 .set_bus_width = sdhci_set_bus_width, 223 .reset = sdhci_reset, 224 .set_uhs_signaling = sdhci_set_uhs_signaling, 225 .hw_reset = sdhci_acpi_int_hw_reset, 226 }; 227 228 static const struct sdhci_acpi_chip sdhci_acpi_chip_int = { 229 .ops = &sdhci_acpi_ops_int, 230 }; 231 232 #ifdef CONFIG_X86 233 234 static bool sdhci_acpi_byt(void) 235 { 236 static const struct x86_cpu_id byt[] = { 237 { X86_VENDOR_INTEL, 6, INTEL_FAM6_ATOM_SILVERMONT }, 238 {} 239 }; 240 241 return x86_match_cpu(byt); 242 } 243 244 static bool sdhci_acpi_cht(void) 245 { 246 static const struct x86_cpu_id cht[] = { 247 { X86_VENDOR_INTEL, 6, INTEL_FAM6_ATOM_AIRMONT }, 248 {} 249 }; 250 251 return x86_match_cpu(cht); 252 } 253 254 #define BYT_IOSF_SCCEP 0x63 255 #define BYT_IOSF_OCP_NETCTRL0 0x1078 256 #define BYT_IOSF_OCP_TIMEOUT_BASE GENMASK(10, 8) 257 258 static void sdhci_acpi_byt_setting(struct device *dev) 259 { 260 u32 val = 0; 261 262 if (!sdhci_acpi_byt()) 263 return; 264 265 if (iosf_mbi_read(BYT_IOSF_SCCEP, MBI_CR_READ, BYT_IOSF_OCP_NETCTRL0, 266 &val)) { 267 dev_err(dev, "%s read error\n", __func__); 268 return; 269 } 270 271 if (!(val & BYT_IOSF_OCP_TIMEOUT_BASE)) 272 return; 273 274 val &= ~BYT_IOSF_OCP_TIMEOUT_BASE; 275 276 if (iosf_mbi_write(BYT_IOSF_SCCEP, MBI_CR_WRITE, BYT_IOSF_OCP_NETCTRL0, 277 val)) { 278 dev_err(dev, "%s write error\n", __func__); 279 return; 280 } 281 282 dev_dbg(dev, "%s completed\n", __func__); 283 } 284 285 static bool sdhci_acpi_byt_defer(struct device *dev) 286 { 287 if (!sdhci_acpi_byt()) 288 return false; 289 290 if (!iosf_mbi_available()) 291 return true; 292 293 sdhci_acpi_byt_setting(dev); 294 295 return false; 296 } 297 298 static bool sdhci_acpi_cht_pci_wifi(unsigned int vendor, unsigned int device, 299 unsigned int slot, unsigned int parent_slot) 300 { 301 struct pci_dev *dev, *parent, *from = NULL; 302 303 while (1) { 304 dev = pci_get_device(vendor, device, from); 305 pci_dev_put(from); 306 if (!dev) 307 break; 308 parent = pci_upstream_bridge(dev); 309 if (ACPI_COMPANION(&dev->dev) && PCI_SLOT(dev->devfn) == slot && 310 parent && PCI_SLOT(parent->devfn) == parent_slot && 311 !pci_upstream_bridge(parent)) { 312 pci_dev_put(dev); 313 return true; 314 } 315 from = dev; 316 } 317 318 return false; 319 } 320 321 /* 322 * GPDwin uses PCI wifi which conflicts with SDIO's use of 323 * acpi_device_fix_up_power() on child device nodes. Identifying GPDwin is 324 * problematic, but since SDIO is only used for wifi, the presence of the PCI 325 * wifi card in the expected slot with an ACPI companion node, is used to 326 * indicate that acpi_device_fix_up_power() should be avoided. 327 */ 328 static inline bool sdhci_acpi_no_fixup_child_power(struct acpi_device *adev) 329 { 330 return sdhci_acpi_cht() && 331 acpi_dev_hid_uid_match(adev, "80860F14", "2") && 332 sdhci_acpi_cht_pci_wifi(0x14e4, 0x43ec, 0, 28); 333 } 334 335 #else 336 337 static inline void sdhci_acpi_byt_setting(struct device *dev) 338 { 339 } 340 341 static inline bool sdhci_acpi_byt_defer(struct device *dev) 342 { 343 return false; 344 } 345 346 static inline bool sdhci_acpi_no_fixup_child_power(struct acpi_device *adev) 347 { 348 return false; 349 } 350 351 #endif 352 353 static int bxt_get_cd(struct mmc_host *mmc) 354 { 355 int gpio_cd = mmc_gpio_get_cd(mmc); 356 struct sdhci_host *host = mmc_priv(mmc); 357 unsigned long flags; 358 int ret = 0; 359 360 if (!gpio_cd) 361 return 0; 362 363 spin_lock_irqsave(&host->lock, flags); 364 365 if (host->flags & SDHCI_DEVICE_DEAD) 366 goto out; 367 368 ret = !!(sdhci_readl(host, SDHCI_PRESENT_STATE) & SDHCI_CARD_PRESENT); 369 out: 370 spin_unlock_irqrestore(&host->lock, flags); 371 372 return ret; 373 } 374 375 static int intel_probe_slot(struct platform_device *pdev, struct acpi_device *adev) 376 { 377 struct sdhci_acpi_host *c = platform_get_drvdata(pdev); 378 struct intel_host *intel_host = sdhci_acpi_priv(c); 379 struct sdhci_host *host = c->host; 380 381 if (acpi_dev_hid_uid_match(adev, "80860F14", "1") && 382 sdhci_readl(host, SDHCI_CAPABILITIES) == 0x446cc8b2 && 383 sdhci_readl(host, SDHCI_CAPABILITIES_1) == 0x00000807) 384 host->timeout_clk = 1000; /* 1000 kHz i.e. 1 MHz */ 385 386 if (acpi_dev_hid_uid_match(adev, "80865ACA", NULL)) 387 host->mmc_host_ops.get_cd = bxt_get_cd; 388 389 intel_dsm_init(intel_host, &pdev->dev, host->mmc); 390 391 host->mmc_host_ops.start_signal_voltage_switch = 392 intel_start_signal_voltage_switch; 393 394 return 0; 395 } 396 397 static int intel_setup_host(struct platform_device *pdev) 398 { 399 struct sdhci_acpi_host *c = platform_get_drvdata(pdev); 400 struct intel_host *intel_host = sdhci_acpi_priv(c); 401 402 if (!(intel_host->hs_caps & INTEL_DSM_HS_CAPS_SDR25)) 403 c->host->mmc->caps &= ~MMC_CAP_UHS_SDR25; 404 405 if (!(intel_host->hs_caps & INTEL_DSM_HS_CAPS_SDR50)) 406 c->host->mmc->caps &= ~MMC_CAP_UHS_SDR50; 407 408 if (!(intel_host->hs_caps & INTEL_DSM_HS_CAPS_DDR50)) 409 c->host->mmc->caps &= ~MMC_CAP_UHS_DDR50; 410 411 if (!(intel_host->hs_caps & INTEL_DSM_HS_CAPS_SDR104)) 412 c->host->mmc->caps &= ~MMC_CAP_UHS_SDR104; 413 414 return 0; 415 } 416 417 static const struct sdhci_acpi_slot sdhci_acpi_slot_int_emmc = { 418 .chip = &sdhci_acpi_chip_int, 419 .caps = MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE | 420 MMC_CAP_HW_RESET | MMC_CAP_1_8V_DDR | 421 MMC_CAP_CMD_DURING_TFR | MMC_CAP_WAIT_WHILE_BUSY, 422 .flags = SDHCI_ACPI_RUNTIME_PM, 423 .quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC | 424 SDHCI_QUIRK_NO_LED, 425 .quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN | 426 SDHCI_QUIRK2_STOP_WITH_TC | 427 SDHCI_QUIRK2_CAPS_BIT63_FOR_HS400, 428 .probe_slot = intel_probe_slot, 429 .setup_host = intel_setup_host, 430 .priv_size = sizeof(struct intel_host), 431 }; 432 433 static const struct sdhci_acpi_slot sdhci_acpi_slot_int_sdio = { 434 .quirks = SDHCI_QUIRK_BROKEN_CARD_DETECTION | 435 SDHCI_QUIRK_NO_LED | 436 SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC, 437 .quirks2 = SDHCI_QUIRK2_HOST_OFF_CARD_ON, 438 .caps = MMC_CAP_NONREMOVABLE | MMC_CAP_POWER_OFF_CARD | 439 MMC_CAP_WAIT_WHILE_BUSY, 440 .flags = SDHCI_ACPI_RUNTIME_PM, 441 .pm_caps = MMC_PM_KEEP_POWER, 442 .probe_slot = intel_probe_slot, 443 .setup_host = intel_setup_host, 444 .priv_size = sizeof(struct intel_host), 445 }; 446 447 static const struct sdhci_acpi_slot sdhci_acpi_slot_int_sd = { 448 .flags = SDHCI_ACPI_SD_CD | SDHCI_ACPI_SD_CD_OVERRIDE_LEVEL | 449 SDHCI_ACPI_RUNTIME_PM, 450 .quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC | 451 SDHCI_QUIRK_NO_LED, 452 .quirks2 = SDHCI_QUIRK2_CARD_ON_NEEDS_BUS_ON | 453 SDHCI_QUIRK2_STOP_WITH_TC, 454 .caps = MMC_CAP_WAIT_WHILE_BUSY | MMC_CAP_AGGRESSIVE_PM, 455 .probe_slot = intel_probe_slot, 456 .setup_host = intel_setup_host, 457 .priv_size = sizeof(struct intel_host), 458 }; 459 460 #define VENDOR_SPECIFIC_PWRCTL_CLEAR_REG 0x1a8 461 #define VENDOR_SPECIFIC_PWRCTL_CTL_REG 0x1ac 462 static irqreturn_t sdhci_acpi_qcom_handler(int irq, void *ptr) 463 { 464 struct sdhci_host *host = ptr; 465 466 sdhci_writel(host, 0x3, VENDOR_SPECIFIC_PWRCTL_CLEAR_REG); 467 sdhci_writel(host, 0x1, VENDOR_SPECIFIC_PWRCTL_CTL_REG); 468 469 return IRQ_HANDLED; 470 } 471 472 static int qcom_probe_slot(struct platform_device *pdev, struct acpi_device *adev) 473 { 474 struct sdhci_acpi_host *c = platform_get_drvdata(pdev); 475 struct sdhci_host *host = c->host; 476 int *irq = sdhci_acpi_priv(c); 477 478 *irq = -EINVAL; 479 480 if (!acpi_dev_hid_uid_match(adev, "QCOM8051", NULL)) 481 return 0; 482 483 *irq = platform_get_irq(pdev, 1); 484 if (*irq < 0) 485 return 0; 486 487 return request_threaded_irq(*irq, NULL, sdhci_acpi_qcom_handler, 488 IRQF_ONESHOT | IRQF_TRIGGER_HIGH, 489 "sdhci_qcom", host); 490 } 491 492 static int qcom_free_slot(struct platform_device *pdev) 493 { 494 struct device *dev = &pdev->dev; 495 struct sdhci_acpi_host *c = platform_get_drvdata(pdev); 496 struct sdhci_host *host = c->host; 497 struct acpi_device *adev; 498 int *irq = sdhci_acpi_priv(c); 499 500 adev = ACPI_COMPANION(dev); 501 if (!adev) 502 return -ENODEV; 503 504 if (!acpi_dev_hid_uid_match(adev, "QCOM8051", NULL)) 505 return 0; 506 507 if (*irq < 0) 508 return 0; 509 510 free_irq(*irq, host); 511 return 0; 512 } 513 514 static const struct sdhci_acpi_slot sdhci_acpi_slot_qcom_sd_3v = { 515 .quirks = SDHCI_QUIRK_BROKEN_CARD_DETECTION, 516 .quirks2 = SDHCI_QUIRK2_NO_1_8_V, 517 .caps = MMC_CAP_NONREMOVABLE, 518 .priv_size = sizeof(int), 519 .probe_slot = qcom_probe_slot, 520 .free_slot = qcom_free_slot, 521 }; 522 523 static const struct sdhci_acpi_slot sdhci_acpi_slot_qcom_sd = { 524 .quirks = SDHCI_QUIRK_BROKEN_CARD_DETECTION, 525 .caps = MMC_CAP_NONREMOVABLE, 526 }; 527 528 /* AMD sdhci reset dll register. */ 529 #define SDHCI_AMD_RESET_DLL_REGISTER 0x908 530 531 static int amd_select_drive_strength(struct mmc_card *card, 532 unsigned int max_dtr, int host_drv, 533 int card_drv, int *drv_type) 534 { 535 return MMC_SET_DRIVER_TYPE_A; 536 } 537 538 static void sdhci_acpi_amd_hs400_dll(struct sdhci_host *host) 539 { 540 /* AMD Platform requires dll setting */ 541 sdhci_writel(host, 0x40003210, SDHCI_AMD_RESET_DLL_REGISTER); 542 usleep_range(10, 20); 543 sdhci_writel(host, 0x40033210, SDHCI_AMD_RESET_DLL_REGISTER); 544 } 545 546 /* 547 * For AMD Platform it is required to disable the tuning 548 * bit first controller to bring to HS Mode from HS200 549 * mode, later enable to tune to HS400 mode. 550 */ 551 static void amd_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) 552 { 553 struct sdhci_host *host = mmc_priv(mmc); 554 unsigned int old_timing = host->timing; 555 556 sdhci_set_ios(mmc, ios); 557 if (old_timing == MMC_TIMING_MMC_HS200 && 558 ios->timing == MMC_TIMING_MMC_HS) 559 sdhci_writew(host, 0x9, SDHCI_HOST_CONTROL2); 560 if (old_timing != MMC_TIMING_MMC_HS400 && 561 ios->timing == MMC_TIMING_MMC_HS400) { 562 sdhci_writew(host, 0x80, SDHCI_HOST_CONTROL2); 563 sdhci_acpi_amd_hs400_dll(host); 564 } 565 } 566 567 static const struct sdhci_ops sdhci_acpi_ops_amd = { 568 .set_clock = sdhci_set_clock, 569 .set_bus_width = sdhci_set_bus_width, 570 .reset = sdhci_reset, 571 .set_uhs_signaling = sdhci_set_uhs_signaling, 572 }; 573 574 static const struct sdhci_acpi_chip sdhci_acpi_chip_amd = { 575 .ops = &sdhci_acpi_ops_amd, 576 }; 577 578 static int sdhci_acpi_emmc_amd_probe_slot(struct platform_device *pdev, 579 struct acpi_device *adev) 580 { 581 struct sdhci_acpi_host *c = platform_get_drvdata(pdev); 582 struct sdhci_host *host = c->host; 583 584 sdhci_read_caps(host); 585 if (host->caps1 & SDHCI_SUPPORT_DDR50) 586 host->mmc->caps = MMC_CAP_1_8V_DDR; 587 588 if ((host->caps1 & SDHCI_SUPPORT_SDR104) && 589 (host->mmc->caps & MMC_CAP_1_8V_DDR)) 590 host->mmc->caps2 = MMC_CAP2_HS400_1_8V; 591 592 host->mmc_host_ops.select_drive_strength = amd_select_drive_strength; 593 host->mmc_host_ops.set_ios = amd_set_ios; 594 return 0; 595 } 596 597 static const struct sdhci_acpi_slot sdhci_acpi_slot_amd_emmc = { 598 .chip = &sdhci_acpi_chip_amd, 599 .caps = MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE, 600 .quirks = SDHCI_QUIRK_32BIT_DMA_ADDR | SDHCI_QUIRK_32BIT_DMA_SIZE | 601 SDHCI_QUIRK_32BIT_ADMA_SIZE, 602 .probe_slot = sdhci_acpi_emmc_amd_probe_slot, 603 }; 604 605 struct sdhci_acpi_uid_slot { 606 const char *hid; 607 const char *uid; 608 const struct sdhci_acpi_slot *slot; 609 }; 610 611 static const struct sdhci_acpi_uid_slot sdhci_acpi_uids[] = { 612 { "80865ACA", NULL, &sdhci_acpi_slot_int_sd }, 613 { "80865ACC", NULL, &sdhci_acpi_slot_int_emmc }, 614 { "80865AD0", NULL, &sdhci_acpi_slot_int_sdio }, 615 { "80860F14" , "1" , &sdhci_acpi_slot_int_emmc }, 616 { "80860F14" , "2" , &sdhci_acpi_slot_int_sdio }, 617 { "80860F14" , "3" , &sdhci_acpi_slot_int_sd }, 618 { "80860F16" , NULL, &sdhci_acpi_slot_int_sd }, 619 { "INT33BB" , "2" , &sdhci_acpi_slot_int_sdio }, 620 { "INT33BB" , "3" , &sdhci_acpi_slot_int_sd }, 621 { "INT33C6" , NULL, &sdhci_acpi_slot_int_sdio }, 622 { "INT3436" , NULL, &sdhci_acpi_slot_int_sdio }, 623 { "INT344D" , NULL, &sdhci_acpi_slot_int_sdio }, 624 { "PNP0FFF" , "3" , &sdhci_acpi_slot_int_sd }, 625 { "PNP0D40" }, 626 { "QCOM8051", NULL, &sdhci_acpi_slot_qcom_sd_3v }, 627 { "QCOM8052", NULL, &sdhci_acpi_slot_qcom_sd }, 628 { "AMDI0040", NULL, &sdhci_acpi_slot_amd_emmc }, 629 { }, 630 }; 631 632 static const struct acpi_device_id sdhci_acpi_ids[] = { 633 { "80865ACA" }, 634 { "80865ACC" }, 635 { "80865AD0" }, 636 { "80860F14" }, 637 { "80860F16" }, 638 { "INT33BB" }, 639 { "INT33C6" }, 640 { "INT3436" }, 641 { "INT344D" }, 642 { "PNP0D40" }, 643 { "QCOM8051" }, 644 { "QCOM8052" }, 645 { "AMDI0040" }, 646 { }, 647 }; 648 MODULE_DEVICE_TABLE(acpi, sdhci_acpi_ids); 649 650 static const struct sdhci_acpi_slot *sdhci_acpi_get_slot(struct acpi_device *adev) 651 { 652 const struct sdhci_acpi_uid_slot *u; 653 654 for (u = sdhci_acpi_uids; u->hid; u++) { 655 if (acpi_dev_hid_uid_match(adev, u->hid, u->uid)) 656 return u->slot; 657 } 658 return NULL; 659 } 660 661 static int sdhci_acpi_probe(struct platform_device *pdev) 662 { 663 struct device *dev = &pdev->dev; 664 const struct sdhci_acpi_slot *slot; 665 struct acpi_device *device, *child; 666 struct sdhci_acpi_host *c; 667 struct sdhci_host *host; 668 struct resource *iomem; 669 resource_size_t len; 670 size_t priv_size; 671 int err; 672 673 device = ACPI_COMPANION(dev); 674 if (!device) 675 return -ENODEV; 676 677 slot = sdhci_acpi_get_slot(device); 678 679 /* Power on the SDHCI controller and its children */ 680 acpi_device_fix_up_power(device); 681 if (!sdhci_acpi_no_fixup_child_power(device)) { 682 list_for_each_entry(child, &device->children, node) 683 if (child->status.present && child->status.enabled) 684 acpi_device_fix_up_power(child); 685 } 686 687 if (sdhci_acpi_byt_defer(dev)) 688 return -EPROBE_DEFER; 689 690 iomem = platform_get_resource(pdev, IORESOURCE_MEM, 0); 691 if (!iomem) 692 return -ENOMEM; 693 694 len = resource_size(iomem); 695 if (len < 0x100) 696 dev_err(dev, "Invalid iomem size!\n"); 697 698 if (!devm_request_mem_region(dev, iomem->start, len, dev_name(dev))) 699 return -ENOMEM; 700 701 priv_size = slot ? slot->priv_size : 0; 702 host = sdhci_alloc_host(dev, sizeof(struct sdhci_acpi_host) + priv_size); 703 if (IS_ERR(host)) 704 return PTR_ERR(host); 705 706 c = sdhci_priv(host); 707 c->host = host; 708 c->slot = slot; 709 c->pdev = pdev; 710 c->use_runtime_pm = sdhci_acpi_flag(c, SDHCI_ACPI_RUNTIME_PM); 711 712 platform_set_drvdata(pdev, c); 713 714 host->hw_name = "ACPI"; 715 host->ops = &sdhci_acpi_ops_dflt; 716 host->irq = platform_get_irq(pdev, 0); 717 if (host->irq < 0) { 718 err = -EINVAL; 719 goto err_free; 720 } 721 722 host->ioaddr = devm_ioremap(dev, iomem->start, 723 resource_size(iomem)); 724 if (host->ioaddr == NULL) { 725 err = -ENOMEM; 726 goto err_free; 727 } 728 729 if (c->slot) { 730 if (c->slot->probe_slot) { 731 err = c->slot->probe_slot(pdev, device); 732 if (err) 733 goto err_free; 734 } 735 if (c->slot->chip) { 736 host->ops = c->slot->chip->ops; 737 host->quirks |= c->slot->chip->quirks; 738 host->quirks2 |= c->slot->chip->quirks2; 739 host->mmc->caps |= c->slot->chip->caps; 740 host->mmc->caps2 |= c->slot->chip->caps2; 741 host->mmc->pm_caps |= c->slot->chip->pm_caps; 742 } 743 host->quirks |= c->slot->quirks; 744 host->quirks2 |= c->slot->quirks2; 745 host->mmc->caps |= c->slot->caps; 746 host->mmc->caps2 |= c->slot->caps2; 747 host->mmc->pm_caps |= c->slot->pm_caps; 748 } 749 750 host->mmc->caps2 |= MMC_CAP2_NO_PRESCAN_POWERUP; 751 752 if (sdhci_acpi_flag(c, SDHCI_ACPI_SD_CD)) { 753 bool v = sdhci_acpi_flag(c, SDHCI_ACPI_SD_CD_OVERRIDE_LEVEL); 754 755 err = mmc_gpiod_request_cd(host->mmc, NULL, 0, v, 0); 756 if (err) { 757 if (err == -EPROBE_DEFER) 758 goto err_free; 759 dev_warn(dev, "failed to setup card detect gpio\n"); 760 c->use_runtime_pm = false; 761 } 762 } 763 764 err = sdhci_setup_host(host); 765 if (err) 766 goto err_free; 767 768 if (c->slot && c->slot->setup_host) { 769 err = c->slot->setup_host(pdev); 770 if (err) 771 goto err_cleanup; 772 } 773 774 err = __sdhci_add_host(host); 775 if (err) 776 goto err_cleanup; 777 778 if (c->use_runtime_pm) { 779 pm_runtime_set_active(dev); 780 pm_suspend_ignore_children(dev, 1); 781 pm_runtime_set_autosuspend_delay(dev, 50); 782 pm_runtime_use_autosuspend(dev); 783 pm_runtime_enable(dev); 784 } 785 786 device_enable_async_suspend(dev); 787 788 return 0; 789 790 err_cleanup: 791 sdhci_cleanup_host(c->host); 792 err_free: 793 if (c->slot && c->slot->free_slot) 794 c->slot->free_slot(pdev); 795 796 sdhci_free_host(c->host); 797 return err; 798 } 799 800 static int sdhci_acpi_remove(struct platform_device *pdev) 801 { 802 struct sdhci_acpi_host *c = platform_get_drvdata(pdev); 803 struct device *dev = &pdev->dev; 804 int dead; 805 806 if (c->use_runtime_pm) { 807 pm_runtime_get_sync(dev); 808 pm_runtime_disable(dev); 809 pm_runtime_put_noidle(dev); 810 } 811 812 if (c->slot && c->slot->remove_slot) 813 c->slot->remove_slot(pdev); 814 815 dead = (sdhci_readl(c->host, SDHCI_INT_STATUS) == ~0); 816 sdhci_remove_host(c->host, dead); 817 818 if (c->slot && c->slot->free_slot) 819 c->slot->free_slot(pdev); 820 821 sdhci_free_host(c->host); 822 823 return 0; 824 } 825 826 #ifdef CONFIG_PM_SLEEP 827 828 static int sdhci_acpi_suspend(struct device *dev) 829 { 830 struct sdhci_acpi_host *c = dev_get_drvdata(dev); 831 struct sdhci_host *host = c->host; 832 833 if (host->tuning_mode != SDHCI_TUNING_MODE_3) 834 mmc_retune_needed(host->mmc); 835 836 return sdhci_suspend_host(host); 837 } 838 839 static int sdhci_acpi_resume(struct device *dev) 840 { 841 struct sdhci_acpi_host *c = dev_get_drvdata(dev); 842 843 sdhci_acpi_byt_setting(&c->pdev->dev); 844 845 return sdhci_resume_host(c->host); 846 } 847 848 #endif 849 850 #ifdef CONFIG_PM 851 852 static int sdhci_acpi_runtime_suspend(struct device *dev) 853 { 854 struct sdhci_acpi_host *c = dev_get_drvdata(dev); 855 struct sdhci_host *host = c->host; 856 857 if (host->tuning_mode != SDHCI_TUNING_MODE_3) 858 mmc_retune_needed(host->mmc); 859 860 return sdhci_runtime_suspend_host(host); 861 } 862 863 static int sdhci_acpi_runtime_resume(struct device *dev) 864 { 865 struct sdhci_acpi_host *c = dev_get_drvdata(dev); 866 867 sdhci_acpi_byt_setting(&c->pdev->dev); 868 869 return sdhci_runtime_resume_host(c->host, 0); 870 } 871 872 #endif 873 874 static const struct dev_pm_ops sdhci_acpi_pm_ops = { 875 SET_SYSTEM_SLEEP_PM_OPS(sdhci_acpi_suspend, sdhci_acpi_resume) 876 SET_RUNTIME_PM_OPS(sdhci_acpi_runtime_suspend, 877 sdhci_acpi_runtime_resume, NULL) 878 }; 879 880 static struct platform_driver sdhci_acpi_driver = { 881 .driver = { 882 .name = "sdhci-acpi", 883 .acpi_match_table = sdhci_acpi_ids, 884 .pm = &sdhci_acpi_pm_ops, 885 }, 886 .probe = sdhci_acpi_probe, 887 .remove = sdhci_acpi_remove, 888 }; 889 890 module_platform_driver(sdhci_acpi_driver); 891 892 MODULE_DESCRIPTION("Secure Digital Host Controller Interface ACPI driver"); 893 MODULE_AUTHOR("Adrian Hunter"); 894 MODULE_LICENSE("GPL v2"); 895