1 /* 2 * Secure Digital Host Controller Interface ACPI driver. 3 * 4 * Copyright (c) 2012, Intel Corporation. 5 * 6 * This program is free software; you can redistribute it and/or modify it 7 * under the terms and conditions of the GNU General Public License, 8 * version 2, as published by the Free Software Foundation. 9 * 10 * This program is distributed in the hope it will be useful, but WITHOUT 11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 13 * more details. 14 * 15 * You should have received a copy of the GNU General Public License along with 16 * this program; if not, write to the Free Software Foundation, Inc., 17 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. 18 * 19 */ 20 21 #include <linux/init.h> 22 #include <linux/export.h> 23 #include <linux/module.h> 24 #include <linux/device.h> 25 #include <linux/platform_device.h> 26 #include <linux/ioport.h> 27 #include <linux/io.h> 28 #include <linux/dma-mapping.h> 29 #include <linux/compiler.h> 30 #include <linux/stddef.h> 31 #include <linux/bitops.h> 32 #include <linux/types.h> 33 #include <linux/err.h> 34 #include <linux/interrupt.h> 35 #include <linux/acpi.h> 36 #include <linux/pm.h> 37 #include <linux/pm_runtime.h> 38 #include <linux/delay.h> 39 40 #include <linux/mmc/host.h> 41 #include <linux/mmc/pm.h> 42 #include <linux/mmc/slot-gpio.h> 43 44 #ifdef CONFIG_X86 45 #include <asm/cpu_device_id.h> 46 #include <asm/intel-family.h> 47 #include <asm/iosf_mbi.h> 48 #include <linux/pci.h> 49 #endif 50 51 #include "sdhci.h" 52 53 enum { 54 SDHCI_ACPI_SD_CD = BIT(0), 55 SDHCI_ACPI_RUNTIME_PM = BIT(1), 56 SDHCI_ACPI_SD_CD_OVERRIDE_LEVEL = BIT(2), 57 }; 58 59 struct sdhci_acpi_chip { 60 const struct sdhci_ops *ops; 61 unsigned int quirks; 62 unsigned int quirks2; 63 unsigned long caps; 64 unsigned int caps2; 65 mmc_pm_flag_t pm_caps; 66 }; 67 68 struct sdhci_acpi_slot { 69 const struct sdhci_acpi_chip *chip; 70 unsigned int quirks; 71 unsigned int quirks2; 72 unsigned long caps; 73 unsigned int caps2; 74 mmc_pm_flag_t pm_caps; 75 unsigned int flags; 76 size_t priv_size; 77 int (*probe_slot)(struct platform_device *, const char *, const char *); 78 int (*remove_slot)(struct platform_device *); 79 }; 80 81 struct sdhci_acpi_host { 82 struct sdhci_host *host; 83 const struct sdhci_acpi_slot *slot; 84 struct platform_device *pdev; 85 bool use_runtime_pm; 86 unsigned long private[0] ____cacheline_aligned; 87 }; 88 89 static inline void *sdhci_acpi_priv(struct sdhci_acpi_host *c) 90 { 91 return (void *)c->private; 92 } 93 94 static inline bool sdhci_acpi_flag(struct sdhci_acpi_host *c, unsigned int flag) 95 { 96 return c->slot && (c->slot->flags & flag); 97 } 98 99 enum { 100 INTEL_DSM_FNS = 0, 101 INTEL_DSM_V18_SWITCH = 3, 102 INTEL_DSM_V33_SWITCH = 4, 103 }; 104 105 struct intel_host { 106 u32 dsm_fns; 107 }; 108 109 static const guid_t intel_dsm_guid = 110 GUID_INIT(0xF6C13EA5, 0x65CD, 0x461F, 111 0xAB, 0x7A, 0x29, 0xF7, 0xE8, 0xD5, 0xBD, 0x61); 112 113 static int __intel_dsm(struct intel_host *intel_host, struct device *dev, 114 unsigned int fn, u32 *result) 115 { 116 union acpi_object *obj; 117 int err = 0; 118 119 obj = acpi_evaluate_dsm(ACPI_HANDLE(dev), &intel_dsm_guid, 0, fn, NULL); 120 if (!obj) 121 return -EOPNOTSUPP; 122 123 if (obj->type == ACPI_TYPE_INTEGER) { 124 *result = obj->integer.value; 125 } else if (obj->type == ACPI_TYPE_BUFFER && obj->buffer.length > 0) { 126 size_t len = min_t(size_t, obj->buffer.length, 4); 127 128 *result = 0; 129 memcpy(result, obj->buffer.pointer, len); 130 } else { 131 dev_err(dev, "%s DSM fn %u obj->type %d obj->buffer.length %d\n", 132 __func__, fn, obj->type, obj->buffer.length); 133 err = -EINVAL; 134 } 135 136 ACPI_FREE(obj); 137 138 return err; 139 } 140 141 static int intel_dsm(struct intel_host *intel_host, struct device *dev, 142 unsigned int fn, u32 *result) 143 { 144 if (fn > 31 || !(intel_host->dsm_fns & (1 << fn))) 145 return -EOPNOTSUPP; 146 147 return __intel_dsm(intel_host, dev, fn, result); 148 } 149 150 static void intel_dsm_init(struct intel_host *intel_host, struct device *dev, 151 struct mmc_host *mmc) 152 { 153 int err; 154 155 err = __intel_dsm(intel_host, dev, INTEL_DSM_FNS, &intel_host->dsm_fns); 156 if (err) { 157 pr_debug("%s: DSM not supported, error %d\n", 158 mmc_hostname(mmc), err); 159 return; 160 } 161 162 pr_debug("%s: DSM function mask %#x\n", 163 mmc_hostname(mmc), intel_host->dsm_fns); 164 } 165 166 static int intel_start_signal_voltage_switch(struct mmc_host *mmc, 167 struct mmc_ios *ios) 168 { 169 struct device *dev = mmc_dev(mmc); 170 struct sdhci_acpi_host *c = dev_get_drvdata(dev); 171 struct intel_host *intel_host = sdhci_acpi_priv(c); 172 unsigned int fn; 173 u32 result = 0; 174 int err; 175 176 err = sdhci_start_signal_voltage_switch(mmc, ios); 177 if (err) 178 return err; 179 180 switch (ios->signal_voltage) { 181 case MMC_SIGNAL_VOLTAGE_330: 182 fn = INTEL_DSM_V33_SWITCH; 183 break; 184 case MMC_SIGNAL_VOLTAGE_180: 185 fn = INTEL_DSM_V18_SWITCH; 186 break; 187 default: 188 return 0; 189 } 190 191 err = intel_dsm(intel_host, dev, fn, &result); 192 pr_debug("%s: %s DSM fn %u error %d result %u\n", 193 mmc_hostname(mmc), __func__, fn, err, result); 194 195 return 0; 196 } 197 198 static void sdhci_acpi_int_hw_reset(struct sdhci_host *host) 199 { 200 u8 reg; 201 202 reg = sdhci_readb(host, SDHCI_POWER_CONTROL); 203 reg |= 0x10; 204 sdhci_writeb(host, reg, SDHCI_POWER_CONTROL); 205 /* For eMMC, minimum is 1us but give it 9us for good measure */ 206 udelay(9); 207 reg &= ~0x10; 208 sdhci_writeb(host, reg, SDHCI_POWER_CONTROL); 209 /* For eMMC, minimum is 200us but give it 300us for good measure */ 210 usleep_range(300, 1000); 211 } 212 213 static const struct sdhci_ops sdhci_acpi_ops_dflt = { 214 .set_clock = sdhci_set_clock, 215 .set_bus_width = sdhci_set_bus_width, 216 .reset = sdhci_reset, 217 .set_uhs_signaling = sdhci_set_uhs_signaling, 218 }; 219 220 static const struct sdhci_ops sdhci_acpi_ops_int = { 221 .set_clock = sdhci_set_clock, 222 .set_bus_width = sdhci_set_bus_width, 223 .reset = sdhci_reset, 224 .set_uhs_signaling = sdhci_set_uhs_signaling, 225 .hw_reset = sdhci_acpi_int_hw_reset, 226 }; 227 228 static const struct sdhci_acpi_chip sdhci_acpi_chip_int = { 229 .ops = &sdhci_acpi_ops_int, 230 }; 231 232 #ifdef CONFIG_X86 233 234 static bool sdhci_acpi_byt(void) 235 { 236 static const struct x86_cpu_id byt[] = { 237 { X86_VENDOR_INTEL, 6, INTEL_FAM6_ATOM_SILVERMONT1 }, 238 {} 239 }; 240 241 return x86_match_cpu(byt); 242 } 243 244 static bool sdhci_acpi_cht(void) 245 { 246 static const struct x86_cpu_id cht[] = { 247 { X86_VENDOR_INTEL, 6, INTEL_FAM6_ATOM_AIRMONT }, 248 {} 249 }; 250 251 return x86_match_cpu(cht); 252 } 253 254 #define BYT_IOSF_SCCEP 0x63 255 #define BYT_IOSF_OCP_NETCTRL0 0x1078 256 #define BYT_IOSF_OCP_TIMEOUT_BASE GENMASK(10, 8) 257 258 static void sdhci_acpi_byt_setting(struct device *dev) 259 { 260 u32 val = 0; 261 262 if (!sdhci_acpi_byt()) 263 return; 264 265 if (iosf_mbi_read(BYT_IOSF_SCCEP, MBI_CR_READ, BYT_IOSF_OCP_NETCTRL0, 266 &val)) { 267 dev_err(dev, "%s read error\n", __func__); 268 return; 269 } 270 271 if (!(val & BYT_IOSF_OCP_TIMEOUT_BASE)) 272 return; 273 274 val &= ~BYT_IOSF_OCP_TIMEOUT_BASE; 275 276 if (iosf_mbi_write(BYT_IOSF_SCCEP, MBI_CR_WRITE, BYT_IOSF_OCP_NETCTRL0, 277 val)) { 278 dev_err(dev, "%s write error\n", __func__); 279 return; 280 } 281 282 dev_dbg(dev, "%s completed\n", __func__); 283 } 284 285 static bool sdhci_acpi_byt_defer(struct device *dev) 286 { 287 if (!sdhci_acpi_byt()) 288 return false; 289 290 if (!iosf_mbi_available()) 291 return true; 292 293 sdhci_acpi_byt_setting(dev); 294 295 return false; 296 } 297 298 static bool sdhci_acpi_cht_pci_wifi(unsigned int vendor, unsigned int device, 299 unsigned int slot, unsigned int parent_slot) 300 { 301 struct pci_dev *dev, *parent, *from = NULL; 302 303 while (1) { 304 dev = pci_get_device(vendor, device, from); 305 pci_dev_put(from); 306 if (!dev) 307 break; 308 parent = pci_upstream_bridge(dev); 309 if (ACPI_COMPANION(&dev->dev) && PCI_SLOT(dev->devfn) == slot && 310 parent && PCI_SLOT(parent->devfn) == parent_slot && 311 !pci_upstream_bridge(parent)) { 312 pci_dev_put(dev); 313 return true; 314 } 315 from = dev; 316 } 317 318 return false; 319 } 320 321 /* 322 * GPDwin uses PCI wifi which conflicts with SDIO's use of 323 * acpi_device_fix_up_power() on child device nodes. Identifying GPDwin is 324 * problematic, but since SDIO is only used for wifi, the presence of the PCI 325 * wifi card in the expected slot with an ACPI companion node, is used to 326 * indicate that acpi_device_fix_up_power() should be avoided. 327 */ 328 static inline bool sdhci_acpi_no_fixup_child_power(const char *hid, 329 const char *uid) 330 { 331 return sdhci_acpi_cht() && 332 !strcmp(hid, "80860F14") && 333 !strcmp(uid, "2") && 334 sdhci_acpi_cht_pci_wifi(0x14e4, 0x43ec, 0, 28); 335 } 336 337 #else 338 339 static inline void sdhci_acpi_byt_setting(struct device *dev) 340 { 341 } 342 343 static inline bool sdhci_acpi_byt_defer(struct device *dev) 344 { 345 return false; 346 } 347 348 static inline bool sdhci_acpi_no_fixup_child_power(const char *hid, 349 const char *uid) 350 { 351 return false; 352 } 353 354 #endif 355 356 static int bxt_get_cd(struct mmc_host *mmc) 357 { 358 int gpio_cd = mmc_gpio_get_cd(mmc); 359 struct sdhci_host *host = mmc_priv(mmc); 360 unsigned long flags; 361 int ret = 0; 362 363 if (!gpio_cd) 364 return 0; 365 366 spin_lock_irqsave(&host->lock, flags); 367 368 if (host->flags & SDHCI_DEVICE_DEAD) 369 goto out; 370 371 ret = !!(sdhci_readl(host, SDHCI_PRESENT_STATE) & SDHCI_CARD_PRESENT); 372 out: 373 spin_unlock_irqrestore(&host->lock, flags); 374 375 return ret; 376 } 377 378 static int intel_probe_slot(struct platform_device *pdev, const char *hid, 379 const char *uid) 380 { 381 struct sdhci_acpi_host *c = platform_get_drvdata(pdev); 382 struct intel_host *intel_host = sdhci_acpi_priv(c); 383 struct sdhci_host *host = c->host; 384 385 if (hid && uid && !strcmp(hid, "80860F14") && !strcmp(uid, "1") && 386 sdhci_readl(host, SDHCI_CAPABILITIES) == 0x446cc8b2 && 387 sdhci_readl(host, SDHCI_CAPABILITIES_1) == 0x00000807) 388 host->timeout_clk = 1000; /* 1000 kHz i.e. 1 MHz */ 389 390 if (hid && !strcmp(hid, "80865ACA")) 391 host->mmc_host_ops.get_cd = bxt_get_cd; 392 393 intel_dsm_init(intel_host, &pdev->dev, host->mmc); 394 395 host->mmc_host_ops.start_signal_voltage_switch = 396 intel_start_signal_voltage_switch; 397 398 return 0; 399 } 400 401 static const struct sdhci_acpi_slot sdhci_acpi_slot_int_emmc = { 402 .chip = &sdhci_acpi_chip_int, 403 .caps = MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE | 404 MMC_CAP_HW_RESET | MMC_CAP_1_8V_DDR | 405 MMC_CAP_CMD_DURING_TFR | MMC_CAP_WAIT_WHILE_BUSY, 406 .flags = SDHCI_ACPI_RUNTIME_PM, 407 .quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC, 408 .quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN | 409 SDHCI_QUIRK2_STOP_WITH_TC | 410 SDHCI_QUIRK2_CAPS_BIT63_FOR_HS400, 411 .probe_slot = intel_probe_slot, 412 .priv_size = sizeof(struct intel_host), 413 }; 414 415 static const struct sdhci_acpi_slot sdhci_acpi_slot_int_sdio = { 416 .quirks = SDHCI_QUIRK_BROKEN_CARD_DETECTION | 417 SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC, 418 .quirks2 = SDHCI_QUIRK2_HOST_OFF_CARD_ON, 419 .caps = MMC_CAP_NONREMOVABLE | MMC_CAP_POWER_OFF_CARD | 420 MMC_CAP_WAIT_WHILE_BUSY, 421 .flags = SDHCI_ACPI_RUNTIME_PM, 422 .pm_caps = MMC_PM_KEEP_POWER, 423 .probe_slot = intel_probe_slot, 424 .priv_size = sizeof(struct intel_host), 425 }; 426 427 static const struct sdhci_acpi_slot sdhci_acpi_slot_int_sd = { 428 .flags = SDHCI_ACPI_SD_CD | SDHCI_ACPI_SD_CD_OVERRIDE_LEVEL | 429 SDHCI_ACPI_RUNTIME_PM, 430 .quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC, 431 .quirks2 = SDHCI_QUIRK2_CARD_ON_NEEDS_BUS_ON | 432 SDHCI_QUIRK2_STOP_WITH_TC, 433 .caps = MMC_CAP_WAIT_WHILE_BUSY | MMC_CAP_AGGRESSIVE_PM, 434 .probe_slot = intel_probe_slot, 435 .priv_size = sizeof(struct intel_host), 436 }; 437 438 static const struct sdhci_acpi_slot sdhci_acpi_slot_qcom_sd_3v = { 439 .quirks = SDHCI_QUIRK_BROKEN_CARD_DETECTION, 440 .quirks2 = SDHCI_QUIRK2_NO_1_8_V, 441 .caps = MMC_CAP_NONREMOVABLE, 442 }; 443 444 static const struct sdhci_acpi_slot sdhci_acpi_slot_qcom_sd = { 445 .quirks = SDHCI_QUIRK_BROKEN_CARD_DETECTION, 446 .caps = MMC_CAP_NONREMOVABLE, 447 }; 448 449 /* AMD sdhci reset dll register. */ 450 #define SDHCI_AMD_RESET_DLL_REGISTER 0x908 451 452 static int amd_select_drive_strength(struct mmc_card *card, 453 unsigned int max_dtr, int host_drv, 454 int card_drv, int *drv_type) 455 { 456 return MMC_SET_DRIVER_TYPE_A; 457 } 458 459 static void sdhci_acpi_amd_hs400_dll(struct sdhci_host *host) 460 { 461 /* AMD Platform requires dll setting */ 462 sdhci_writel(host, 0x40003210, SDHCI_AMD_RESET_DLL_REGISTER); 463 usleep_range(10, 20); 464 sdhci_writel(host, 0x40033210, SDHCI_AMD_RESET_DLL_REGISTER); 465 } 466 467 /* 468 * For AMD Platform it is required to disable the tuning 469 * bit first controller to bring to HS Mode from HS200 470 * mode, later enable to tune to HS400 mode. 471 */ 472 static void amd_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) 473 { 474 struct sdhci_host *host = mmc_priv(mmc); 475 unsigned int old_timing = host->timing; 476 477 sdhci_set_ios(mmc, ios); 478 if (old_timing == MMC_TIMING_MMC_HS200 && 479 ios->timing == MMC_TIMING_MMC_HS) 480 sdhci_writew(host, 0x9, SDHCI_HOST_CONTROL2); 481 if (old_timing != MMC_TIMING_MMC_HS400 && 482 ios->timing == MMC_TIMING_MMC_HS400) { 483 sdhci_writew(host, 0x80, SDHCI_HOST_CONTROL2); 484 sdhci_acpi_amd_hs400_dll(host); 485 } 486 } 487 488 static const struct sdhci_ops sdhci_acpi_ops_amd = { 489 .set_clock = sdhci_set_clock, 490 .set_bus_width = sdhci_set_bus_width, 491 .reset = sdhci_reset, 492 .set_uhs_signaling = sdhci_set_uhs_signaling, 493 }; 494 495 static const struct sdhci_acpi_chip sdhci_acpi_chip_amd = { 496 .ops = &sdhci_acpi_ops_amd, 497 }; 498 499 static int sdhci_acpi_emmc_amd_probe_slot(struct platform_device *pdev, 500 const char *hid, const char *uid) 501 { 502 struct sdhci_acpi_host *c = platform_get_drvdata(pdev); 503 struct sdhci_host *host = c->host; 504 505 sdhci_read_caps(host); 506 if (host->caps1 & SDHCI_SUPPORT_DDR50) 507 host->mmc->caps = MMC_CAP_1_8V_DDR; 508 509 if ((host->caps1 & SDHCI_SUPPORT_SDR104) && 510 (host->mmc->caps & MMC_CAP_1_8V_DDR)) 511 host->mmc->caps2 = MMC_CAP2_HS400_1_8V; 512 513 host->mmc_host_ops.select_drive_strength = amd_select_drive_strength; 514 host->mmc_host_ops.set_ios = amd_set_ios; 515 return 0; 516 } 517 518 static const struct sdhci_acpi_slot sdhci_acpi_slot_amd_emmc = { 519 .chip = &sdhci_acpi_chip_amd, 520 .caps = MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE, 521 .quirks = SDHCI_QUIRK_32BIT_DMA_ADDR | SDHCI_QUIRK_32BIT_DMA_SIZE | 522 SDHCI_QUIRK_32BIT_ADMA_SIZE, 523 .probe_slot = sdhci_acpi_emmc_amd_probe_slot, 524 }; 525 526 struct sdhci_acpi_uid_slot { 527 const char *hid; 528 const char *uid; 529 const struct sdhci_acpi_slot *slot; 530 }; 531 532 static const struct sdhci_acpi_uid_slot sdhci_acpi_uids[] = { 533 { "80865ACA", NULL, &sdhci_acpi_slot_int_sd }, 534 { "80865ACC", NULL, &sdhci_acpi_slot_int_emmc }, 535 { "80865AD0", NULL, &sdhci_acpi_slot_int_sdio }, 536 { "80860F14" , "1" , &sdhci_acpi_slot_int_emmc }, 537 { "80860F14" , "2" , &sdhci_acpi_slot_int_sdio }, 538 { "80860F14" , "3" , &sdhci_acpi_slot_int_sd }, 539 { "80860F16" , NULL, &sdhci_acpi_slot_int_sd }, 540 { "INT33BB" , "2" , &sdhci_acpi_slot_int_sdio }, 541 { "INT33BB" , "3" , &sdhci_acpi_slot_int_sd }, 542 { "INT33C6" , NULL, &sdhci_acpi_slot_int_sdio }, 543 { "INT3436" , NULL, &sdhci_acpi_slot_int_sdio }, 544 { "INT344D" , NULL, &sdhci_acpi_slot_int_sdio }, 545 { "PNP0FFF" , "3" , &sdhci_acpi_slot_int_sd }, 546 { "PNP0D40" }, 547 { "QCOM8051", NULL, &sdhci_acpi_slot_qcom_sd_3v }, 548 { "QCOM8052", NULL, &sdhci_acpi_slot_qcom_sd }, 549 { "AMDI0040", NULL, &sdhci_acpi_slot_amd_emmc }, 550 { }, 551 }; 552 553 static const struct acpi_device_id sdhci_acpi_ids[] = { 554 { "80865ACA" }, 555 { "80865ACC" }, 556 { "80865AD0" }, 557 { "80860F14" }, 558 { "80860F16" }, 559 { "INT33BB" }, 560 { "INT33C6" }, 561 { "INT3436" }, 562 { "INT344D" }, 563 { "PNP0D40" }, 564 { "QCOM8051" }, 565 { "QCOM8052" }, 566 { "AMDI0040" }, 567 { }, 568 }; 569 MODULE_DEVICE_TABLE(acpi, sdhci_acpi_ids); 570 571 static const struct sdhci_acpi_slot *sdhci_acpi_get_slot(const char *hid, 572 const char *uid) 573 { 574 const struct sdhci_acpi_uid_slot *u; 575 576 for (u = sdhci_acpi_uids; u->hid; u++) { 577 if (strcmp(u->hid, hid)) 578 continue; 579 if (!u->uid) 580 return u->slot; 581 if (uid && !strcmp(u->uid, uid)) 582 return u->slot; 583 } 584 return NULL; 585 } 586 587 static int sdhci_acpi_probe(struct platform_device *pdev) 588 { 589 struct device *dev = &pdev->dev; 590 const struct sdhci_acpi_slot *slot; 591 struct acpi_device *device, *child; 592 struct sdhci_acpi_host *c; 593 struct sdhci_host *host; 594 struct resource *iomem; 595 resource_size_t len; 596 size_t priv_size; 597 const char *hid; 598 const char *uid; 599 int err; 600 601 device = ACPI_COMPANION(dev); 602 if (!device) 603 return -ENODEV; 604 605 hid = acpi_device_hid(device); 606 uid = acpi_device_uid(device); 607 608 slot = sdhci_acpi_get_slot(hid, uid); 609 610 /* Power on the SDHCI controller and its children */ 611 acpi_device_fix_up_power(device); 612 if (!sdhci_acpi_no_fixup_child_power(hid, uid)) { 613 list_for_each_entry(child, &device->children, node) 614 if (child->status.present && child->status.enabled) 615 acpi_device_fix_up_power(child); 616 } 617 618 if (sdhci_acpi_byt_defer(dev)) 619 return -EPROBE_DEFER; 620 621 iomem = platform_get_resource(pdev, IORESOURCE_MEM, 0); 622 if (!iomem) 623 return -ENOMEM; 624 625 len = resource_size(iomem); 626 if (len < 0x100) 627 dev_err(dev, "Invalid iomem size!\n"); 628 629 if (!devm_request_mem_region(dev, iomem->start, len, dev_name(dev))) 630 return -ENOMEM; 631 632 priv_size = slot ? slot->priv_size : 0; 633 host = sdhci_alloc_host(dev, sizeof(struct sdhci_acpi_host) + priv_size); 634 if (IS_ERR(host)) 635 return PTR_ERR(host); 636 637 c = sdhci_priv(host); 638 c->host = host; 639 c->slot = slot; 640 c->pdev = pdev; 641 c->use_runtime_pm = sdhci_acpi_flag(c, SDHCI_ACPI_RUNTIME_PM); 642 643 platform_set_drvdata(pdev, c); 644 645 host->hw_name = "ACPI"; 646 host->ops = &sdhci_acpi_ops_dflt; 647 host->irq = platform_get_irq(pdev, 0); 648 649 host->ioaddr = devm_ioremap_nocache(dev, iomem->start, 650 resource_size(iomem)); 651 if (host->ioaddr == NULL) { 652 err = -ENOMEM; 653 goto err_free; 654 } 655 656 if (c->slot) { 657 if (c->slot->probe_slot) { 658 err = c->slot->probe_slot(pdev, hid, uid); 659 if (err) 660 goto err_free; 661 } 662 if (c->slot->chip) { 663 host->ops = c->slot->chip->ops; 664 host->quirks |= c->slot->chip->quirks; 665 host->quirks2 |= c->slot->chip->quirks2; 666 host->mmc->caps |= c->slot->chip->caps; 667 host->mmc->caps2 |= c->slot->chip->caps2; 668 host->mmc->pm_caps |= c->slot->chip->pm_caps; 669 } 670 host->quirks |= c->slot->quirks; 671 host->quirks2 |= c->slot->quirks2; 672 host->mmc->caps |= c->slot->caps; 673 host->mmc->caps2 |= c->slot->caps2; 674 host->mmc->pm_caps |= c->slot->pm_caps; 675 } 676 677 host->mmc->caps2 |= MMC_CAP2_NO_PRESCAN_POWERUP; 678 679 if (sdhci_acpi_flag(c, SDHCI_ACPI_SD_CD)) { 680 bool v = sdhci_acpi_flag(c, SDHCI_ACPI_SD_CD_OVERRIDE_LEVEL); 681 682 err = mmc_gpiod_request_cd(host->mmc, NULL, 0, v, 0, NULL); 683 if (err) { 684 if (err == -EPROBE_DEFER) 685 goto err_free; 686 dev_warn(dev, "failed to setup card detect gpio\n"); 687 c->use_runtime_pm = false; 688 } 689 } 690 691 err = sdhci_add_host(host); 692 if (err) 693 goto err_free; 694 695 if (c->use_runtime_pm) { 696 pm_runtime_set_active(dev); 697 pm_suspend_ignore_children(dev, 1); 698 pm_runtime_set_autosuspend_delay(dev, 50); 699 pm_runtime_use_autosuspend(dev); 700 pm_runtime_enable(dev); 701 } 702 703 device_enable_async_suspend(dev); 704 705 return 0; 706 707 err_free: 708 sdhci_free_host(c->host); 709 return err; 710 } 711 712 static int sdhci_acpi_remove(struct platform_device *pdev) 713 { 714 struct sdhci_acpi_host *c = platform_get_drvdata(pdev); 715 struct device *dev = &pdev->dev; 716 int dead; 717 718 if (c->use_runtime_pm) { 719 pm_runtime_get_sync(dev); 720 pm_runtime_disable(dev); 721 pm_runtime_put_noidle(dev); 722 } 723 724 if (c->slot && c->slot->remove_slot) 725 c->slot->remove_slot(pdev); 726 727 dead = (sdhci_readl(c->host, SDHCI_INT_STATUS) == ~0); 728 sdhci_remove_host(c->host, dead); 729 sdhci_free_host(c->host); 730 731 return 0; 732 } 733 734 #ifdef CONFIG_PM_SLEEP 735 736 static int sdhci_acpi_suspend(struct device *dev) 737 { 738 struct sdhci_acpi_host *c = dev_get_drvdata(dev); 739 struct sdhci_host *host = c->host; 740 741 if (host->tuning_mode != SDHCI_TUNING_MODE_3) 742 mmc_retune_needed(host->mmc); 743 744 return sdhci_suspend_host(host); 745 } 746 747 static int sdhci_acpi_resume(struct device *dev) 748 { 749 struct sdhci_acpi_host *c = dev_get_drvdata(dev); 750 751 sdhci_acpi_byt_setting(&c->pdev->dev); 752 753 return sdhci_resume_host(c->host); 754 } 755 756 #endif 757 758 #ifdef CONFIG_PM 759 760 static int sdhci_acpi_runtime_suspend(struct device *dev) 761 { 762 struct sdhci_acpi_host *c = dev_get_drvdata(dev); 763 struct sdhci_host *host = c->host; 764 765 if (host->tuning_mode != SDHCI_TUNING_MODE_3) 766 mmc_retune_needed(host->mmc); 767 768 return sdhci_runtime_suspend_host(host); 769 } 770 771 static int sdhci_acpi_runtime_resume(struct device *dev) 772 { 773 struct sdhci_acpi_host *c = dev_get_drvdata(dev); 774 775 sdhci_acpi_byt_setting(&c->pdev->dev); 776 777 return sdhci_runtime_resume_host(c->host); 778 } 779 780 #endif 781 782 static const struct dev_pm_ops sdhci_acpi_pm_ops = { 783 SET_SYSTEM_SLEEP_PM_OPS(sdhci_acpi_suspend, sdhci_acpi_resume) 784 SET_RUNTIME_PM_OPS(sdhci_acpi_runtime_suspend, 785 sdhci_acpi_runtime_resume, NULL) 786 }; 787 788 static struct platform_driver sdhci_acpi_driver = { 789 .driver = { 790 .name = "sdhci-acpi", 791 .acpi_match_table = sdhci_acpi_ids, 792 .pm = &sdhci_acpi_pm_ops, 793 }, 794 .probe = sdhci_acpi_probe, 795 .remove = sdhci_acpi_remove, 796 }; 797 798 module_platform_driver(sdhci_acpi_driver); 799 800 MODULE_DESCRIPTION("Secure Digital Host Controller Interface ACPI driver"); 801 MODULE_AUTHOR("Adrian Hunter"); 802 MODULE_LICENSE("GPL v2"); 803