1a61127c2SThomas Gleixner // SPDX-License-Identifier: GPL-2.0-only 2c4e05037SAdrian Hunter /* 3c4e05037SAdrian Hunter * Secure Digital Host Controller Interface ACPI driver. 4c4e05037SAdrian Hunter * 5c4e05037SAdrian Hunter * Copyright (c) 2012, Intel Corporation. 6c4e05037SAdrian Hunter */ 7c4e05037SAdrian Hunter 8e10f4809SRaul E Rangel #include <linux/bitfield.h> 9c4e05037SAdrian Hunter #include <linux/init.h> 10c4e05037SAdrian Hunter #include <linux/export.h> 11c4e05037SAdrian Hunter #include <linux/module.h> 12c4e05037SAdrian Hunter #include <linux/device.h> 13c4e05037SAdrian Hunter #include <linux/platform_device.h> 14c4e05037SAdrian Hunter #include <linux/ioport.h> 15c4e05037SAdrian Hunter #include <linux/io.h> 16c4e05037SAdrian Hunter #include <linux/dma-mapping.h> 17c4e05037SAdrian Hunter #include <linux/compiler.h> 18c4e05037SAdrian Hunter #include <linux/stddef.h> 19c4e05037SAdrian Hunter #include <linux/bitops.h> 20c4e05037SAdrian Hunter #include <linux/types.h> 21c4e05037SAdrian Hunter #include <linux/err.h> 22c4e05037SAdrian Hunter #include <linux/interrupt.h> 23c4e05037SAdrian Hunter #include <linux/acpi.h> 24c4e05037SAdrian Hunter #include <linux/pm.h> 25c4e05037SAdrian Hunter #include <linux/pm_runtime.h> 26b04fa064SAdrian Hunter #include <linux/delay.h> 2784d49b3dSHans de Goede #include <linux/dmi.h> 28c4e05037SAdrian Hunter 29c4e05037SAdrian Hunter #include <linux/mmc/host.h> 30c4e05037SAdrian Hunter #include <linux/mmc/pm.h> 314fd4409cSAdrian Hunter #include <linux/mmc/slot-gpio.h> 32c4e05037SAdrian Hunter 336e1c7d61SAdrian Hunter #ifdef CONFIG_X86 349f687566SHans de Goede #include <linux/platform_data/x86/soc.h> 356e1c7d61SAdrian Hunter #include <asm/iosf_mbi.h> 366e1c7d61SAdrian Hunter #endif 376e1c7d61SAdrian Hunter 38c4e05037SAdrian Hunter #include "sdhci.h" 39c4e05037SAdrian Hunter 40c4e05037SAdrian Hunter enum { 41c4e05037SAdrian Hunter SDHCI_ACPI_SD_CD = BIT(0), 42c4e05037SAdrian Hunter SDHCI_ACPI_RUNTIME_PM = BIT(1), 434fd4409cSAdrian Hunter SDHCI_ACPI_SD_CD_OVERRIDE_LEVEL = BIT(2), 44c4e05037SAdrian Hunter }; 45c4e05037SAdrian Hunter 46c4e05037SAdrian Hunter struct sdhci_acpi_chip { 47c4e05037SAdrian Hunter const struct sdhci_ops *ops; 48c4e05037SAdrian Hunter unsigned int quirks; 49c4e05037SAdrian Hunter unsigned int quirks2; 50c4e05037SAdrian Hunter unsigned long caps; 51c4e05037SAdrian Hunter unsigned int caps2; 52c4e05037SAdrian Hunter mmc_pm_flag_t pm_caps; 53c4e05037SAdrian Hunter }; 54c4e05037SAdrian Hunter 55c4e05037SAdrian Hunter struct sdhci_acpi_slot { 56c4e05037SAdrian Hunter const struct sdhci_acpi_chip *chip; 57c4e05037SAdrian Hunter unsigned int quirks; 58c4e05037SAdrian Hunter unsigned int quirks2; 59c4e05037SAdrian Hunter unsigned long caps; 60c4e05037SAdrian Hunter unsigned int caps2; 61c4e05037SAdrian Hunter mmc_pm_flag_t pm_caps; 62c4e05037SAdrian Hunter unsigned int flags; 63f07b7952SAdrian Hunter size_t priv_size; 644f3cde3aSAndy Shevchenko int (*probe_slot)(struct platform_device *, struct acpi_device *); 65578b36b6SGao, Yunpeng int (*remove_slot)(struct platform_device *); 66c7eabbeeSWang Dongsheng int (*free_slot)(struct platform_device *pdev); 670cc1a0f4SAdrian Hunter int (*setup_host)(struct platform_device *pdev); 68c4e05037SAdrian Hunter }; 69c4e05037SAdrian Hunter 70c4e05037SAdrian Hunter struct sdhci_acpi_host { 71c4e05037SAdrian Hunter struct sdhci_host *host; 72c4e05037SAdrian Hunter const struct sdhci_acpi_slot *slot; 73c4e05037SAdrian Hunter struct platform_device *pdev; 74c4e05037SAdrian Hunter bool use_runtime_pm; 7584d49b3dSHans de Goede bool is_intel; 7684d49b3dSHans de Goede bool reset_signal_volt_on_suspend; 771a91a36aSGustavo A. R. Silva unsigned long private[] ____cacheline_aligned; 78c4e05037SAdrian Hunter }; 79c4e05037SAdrian Hunter 8084d49b3dSHans de Goede enum { 8184d49b3dSHans de Goede DMI_QUIRK_RESET_SD_SIGNAL_VOLT_ON_SUSP = BIT(0), 823397b251SHans de Goede DMI_QUIRK_SD_NO_WRITE_PROTECT = BIT(1), 83e000578aSHans de Goede DMI_QUIRK_SD_CD_ACTIVE_HIGH = BIT(2), 8484d49b3dSHans de Goede }; 8584d49b3dSHans de Goede 86f07b7952SAdrian Hunter static inline void *sdhci_acpi_priv(struct sdhci_acpi_host *c) 87f07b7952SAdrian Hunter { 88f07b7952SAdrian Hunter return (void *)c->private; 89f07b7952SAdrian Hunter } 90f07b7952SAdrian Hunter 91c4e05037SAdrian Hunter static inline bool sdhci_acpi_flag(struct sdhci_acpi_host *c, unsigned int flag) 92c4e05037SAdrian Hunter { 93c4e05037SAdrian Hunter return c->slot && (c->slot->flags & flag); 94c4e05037SAdrian Hunter } 95c4e05037SAdrian Hunter 960acccf41SAdrian Hunter #define INTEL_DSM_HS_CAPS_SDR25 BIT(0) 970acccf41SAdrian Hunter #define INTEL_DSM_HS_CAPS_DDR50 BIT(1) 980acccf41SAdrian Hunter #define INTEL_DSM_HS_CAPS_SDR50 BIT(2) 990acccf41SAdrian Hunter #define INTEL_DSM_HS_CAPS_SDR104 BIT(3) 1000acccf41SAdrian Hunter 1011c451c13SAdrian Hunter enum { 1021c451c13SAdrian Hunter INTEL_DSM_FNS = 0, 1031c451c13SAdrian Hunter INTEL_DSM_V18_SWITCH = 3, 1041c451c13SAdrian Hunter INTEL_DSM_V33_SWITCH = 4, 1050acccf41SAdrian Hunter INTEL_DSM_HS_CAPS = 8, 1061c451c13SAdrian Hunter }; 1071c451c13SAdrian Hunter 1081c451c13SAdrian Hunter struct intel_host { 1091c451c13SAdrian Hunter u32 dsm_fns; 1100acccf41SAdrian Hunter u32 hs_caps; 1111c451c13SAdrian Hunter }; 1121c451c13SAdrian Hunter 1131c451c13SAdrian Hunter static const guid_t intel_dsm_guid = 1141c451c13SAdrian Hunter GUID_INIT(0xF6C13EA5, 0x65CD, 0x461F, 1151c451c13SAdrian Hunter 0xAB, 0x7A, 0x29, 0xF7, 0xE8, 0xD5, 0xBD, 0x61); 1161c451c13SAdrian Hunter 1171c451c13SAdrian Hunter static int __intel_dsm(struct intel_host *intel_host, struct device *dev, 1181c451c13SAdrian Hunter unsigned int fn, u32 *result) 1191c451c13SAdrian Hunter { 1201c451c13SAdrian Hunter union acpi_object *obj; 1211c451c13SAdrian Hunter int err = 0; 1221c451c13SAdrian Hunter 1231c451c13SAdrian Hunter obj = acpi_evaluate_dsm(ACPI_HANDLE(dev), &intel_dsm_guid, 0, fn, NULL); 1241c451c13SAdrian Hunter if (!obj) 1251c451c13SAdrian Hunter return -EOPNOTSUPP; 1261c451c13SAdrian Hunter 1271c451c13SAdrian Hunter if (obj->type == ACPI_TYPE_INTEGER) { 1281c451c13SAdrian Hunter *result = obj->integer.value; 1291c451c13SAdrian Hunter } else if (obj->type == ACPI_TYPE_BUFFER && obj->buffer.length > 0) { 1301c451c13SAdrian Hunter size_t len = min_t(size_t, obj->buffer.length, 4); 1311c451c13SAdrian Hunter 1321c451c13SAdrian Hunter *result = 0; 1331c451c13SAdrian Hunter memcpy(result, obj->buffer.pointer, len); 1341c451c13SAdrian Hunter } else { 1351c451c13SAdrian Hunter dev_err(dev, "%s DSM fn %u obj->type %d obj->buffer.length %d\n", 1361c451c13SAdrian Hunter __func__, fn, obj->type, obj->buffer.length); 1371c451c13SAdrian Hunter err = -EINVAL; 1381c451c13SAdrian Hunter } 1391c451c13SAdrian Hunter 1401c451c13SAdrian Hunter ACPI_FREE(obj); 1411c451c13SAdrian Hunter 1421c451c13SAdrian Hunter return err; 1431c451c13SAdrian Hunter } 1441c451c13SAdrian Hunter 1451c451c13SAdrian Hunter static int intel_dsm(struct intel_host *intel_host, struct device *dev, 1461c451c13SAdrian Hunter unsigned int fn, u32 *result) 1471c451c13SAdrian Hunter { 1481c451c13SAdrian Hunter if (fn > 31 || !(intel_host->dsm_fns & (1 << fn))) 1491c451c13SAdrian Hunter return -EOPNOTSUPP; 1501c451c13SAdrian Hunter 1511c451c13SAdrian Hunter return __intel_dsm(intel_host, dev, fn, result); 1521c451c13SAdrian Hunter } 1531c451c13SAdrian Hunter 1541c451c13SAdrian Hunter static void intel_dsm_init(struct intel_host *intel_host, struct device *dev, 1551c451c13SAdrian Hunter struct mmc_host *mmc) 1561c451c13SAdrian Hunter { 1571c451c13SAdrian Hunter int err; 1581c451c13SAdrian Hunter 1590acccf41SAdrian Hunter intel_host->hs_caps = ~0; 1600acccf41SAdrian Hunter 1611c451c13SAdrian Hunter err = __intel_dsm(intel_host, dev, INTEL_DSM_FNS, &intel_host->dsm_fns); 1621c451c13SAdrian Hunter if (err) { 1631c451c13SAdrian Hunter pr_debug("%s: DSM not supported, error %d\n", 1641c451c13SAdrian Hunter mmc_hostname(mmc), err); 1651c451c13SAdrian Hunter return; 1661c451c13SAdrian Hunter } 1671c451c13SAdrian Hunter 1681c451c13SAdrian Hunter pr_debug("%s: DSM function mask %#x\n", 1691c451c13SAdrian Hunter mmc_hostname(mmc), intel_host->dsm_fns); 1700acccf41SAdrian Hunter 1710acccf41SAdrian Hunter intel_dsm(intel_host, dev, INTEL_DSM_HS_CAPS, &intel_host->hs_caps); 1721c451c13SAdrian Hunter } 1731c451c13SAdrian Hunter 1741c451c13SAdrian Hunter static int intel_start_signal_voltage_switch(struct mmc_host *mmc, 1751c451c13SAdrian Hunter struct mmc_ios *ios) 1761c451c13SAdrian Hunter { 1771c451c13SAdrian Hunter struct device *dev = mmc_dev(mmc); 1781c451c13SAdrian Hunter struct sdhci_acpi_host *c = dev_get_drvdata(dev); 1791c451c13SAdrian Hunter struct intel_host *intel_host = sdhci_acpi_priv(c); 1801c451c13SAdrian Hunter unsigned int fn; 1811c451c13SAdrian Hunter u32 result = 0; 1821c451c13SAdrian Hunter int err; 1831c451c13SAdrian Hunter 1841c451c13SAdrian Hunter err = sdhci_start_signal_voltage_switch(mmc, ios); 1851c451c13SAdrian Hunter if (err) 1861c451c13SAdrian Hunter return err; 1871c451c13SAdrian Hunter 1881c451c13SAdrian Hunter switch (ios->signal_voltage) { 1891c451c13SAdrian Hunter case MMC_SIGNAL_VOLTAGE_330: 1901c451c13SAdrian Hunter fn = INTEL_DSM_V33_SWITCH; 1911c451c13SAdrian Hunter break; 1921c451c13SAdrian Hunter case MMC_SIGNAL_VOLTAGE_180: 1931c451c13SAdrian Hunter fn = INTEL_DSM_V18_SWITCH; 1941c451c13SAdrian Hunter break; 1951c451c13SAdrian Hunter default: 1961c451c13SAdrian Hunter return 0; 1971c451c13SAdrian Hunter } 1981c451c13SAdrian Hunter 1991c451c13SAdrian Hunter err = intel_dsm(intel_host, dev, fn, &result); 2001c451c13SAdrian Hunter pr_debug("%s: %s DSM fn %u error %d result %u\n", 2011c451c13SAdrian Hunter mmc_hostname(mmc), __func__, fn, err, result); 2021c451c13SAdrian Hunter 2031c451c13SAdrian Hunter return 0; 2041c451c13SAdrian Hunter } 2051c451c13SAdrian Hunter 206b04fa064SAdrian Hunter static void sdhci_acpi_int_hw_reset(struct sdhci_host *host) 207b04fa064SAdrian Hunter { 208b04fa064SAdrian Hunter u8 reg; 209b04fa064SAdrian Hunter 210b04fa064SAdrian Hunter reg = sdhci_readb(host, SDHCI_POWER_CONTROL); 211b04fa064SAdrian Hunter reg |= 0x10; 212b04fa064SAdrian Hunter sdhci_writeb(host, reg, SDHCI_POWER_CONTROL); 213b04fa064SAdrian Hunter /* For eMMC, minimum is 1us but give it 9us for good measure */ 214b04fa064SAdrian Hunter udelay(9); 215b04fa064SAdrian Hunter reg &= ~0x10; 216b04fa064SAdrian Hunter sdhci_writeb(host, reg, SDHCI_POWER_CONTROL); 217b04fa064SAdrian Hunter /* For eMMC, minimum is 200us but give it 300us for good measure */ 218b04fa064SAdrian Hunter usleep_range(300, 1000); 219b04fa064SAdrian Hunter } 220b04fa064SAdrian Hunter 221c4e05037SAdrian Hunter static const struct sdhci_ops sdhci_acpi_ops_dflt = { 2221771059cSRussell King .set_clock = sdhci_set_clock, 2232317f56cSRussell King .set_bus_width = sdhci_set_bus_width, 22403231f9bSRussell King .reset = sdhci_reset, 22596d7b78cSRussell King .set_uhs_signaling = sdhci_set_uhs_signaling, 226c4e05037SAdrian Hunter }; 227c4e05037SAdrian Hunter 228b04fa064SAdrian Hunter static const struct sdhci_ops sdhci_acpi_ops_int = { 2291771059cSRussell King .set_clock = sdhci_set_clock, 2302317f56cSRussell King .set_bus_width = sdhci_set_bus_width, 23103231f9bSRussell King .reset = sdhci_reset, 23296d7b78cSRussell King .set_uhs_signaling = sdhci_set_uhs_signaling, 233b04fa064SAdrian Hunter .hw_reset = sdhci_acpi_int_hw_reset, 234b04fa064SAdrian Hunter }; 235b04fa064SAdrian Hunter 236b04fa064SAdrian Hunter static const struct sdhci_acpi_chip sdhci_acpi_chip_int = { 237b04fa064SAdrian Hunter .ops = &sdhci_acpi_ops_int, 238b04fa064SAdrian Hunter }; 239b04fa064SAdrian Hunter 2406e1c7d61SAdrian Hunter #ifdef CONFIG_X86 2416e1c7d61SAdrian Hunter 2426e1c7d61SAdrian Hunter #define BYT_IOSF_SCCEP 0x63 2436e1c7d61SAdrian Hunter #define BYT_IOSF_OCP_NETCTRL0 0x1078 2446e1c7d61SAdrian Hunter #define BYT_IOSF_OCP_TIMEOUT_BASE GENMASK(10, 8) 2456e1c7d61SAdrian Hunter 2466e1c7d61SAdrian Hunter static void sdhci_acpi_byt_setting(struct device *dev) 2476e1c7d61SAdrian Hunter { 2486e1c7d61SAdrian Hunter u32 val = 0; 2496e1c7d61SAdrian Hunter 2509f687566SHans de Goede if (!soc_intel_is_byt()) 2516e1c7d61SAdrian Hunter return; 2526e1c7d61SAdrian Hunter 2536e1c7d61SAdrian Hunter if (iosf_mbi_read(BYT_IOSF_SCCEP, MBI_CR_READ, BYT_IOSF_OCP_NETCTRL0, 2546e1c7d61SAdrian Hunter &val)) { 2556e1c7d61SAdrian Hunter dev_err(dev, "%s read error\n", __func__); 2566e1c7d61SAdrian Hunter return; 2576e1c7d61SAdrian Hunter } 2586e1c7d61SAdrian Hunter 2596e1c7d61SAdrian Hunter if (!(val & BYT_IOSF_OCP_TIMEOUT_BASE)) 2606e1c7d61SAdrian Hunter return; 2616e1c7d61SAdrian Hunter 2626e1c7d61SAdrian Hunter val &= ~BYT_IOSF_OCP_TIMEOUT_BASE; 2636e1c7d61SAdrian Hunter 2646e1c7d61SAdrian Hunter if (iosf_mbi_write(BYT_IOSF_SCCEP, MBI_CR_WRITE, BYT_IOSF_OCP_NETCTRL0, 2656e1c7d61SAdrian Hunter val)) { 2666e1c7d61SAdrian Hunter dev_err(dev, "%s write error\n", __func__); 2676e1c7d61SAdrian Hunter return; 2686e1c7d61SAdrian Hunter } 2696e1c7d61SAdrian Hunter 2706e1c7d61SAdrian Hunter dev_dbg(dev, "%s completed\n", __func__); 2716e1c7d61SAdrian Hunter } 2726e1c7d61SAdrian Hunter 2736e1c7d61SAdrian Hunter static bool sdhci_acpi_byt_defer(struct device *dev) 2746e1c7d61SAdrian Hunter { 2759f687566SHans de Goede if (!soc_intel_is_byt()) 2766e1c7d61SAdrian Hunter return false; 2776e1c7d61SAdrian Hunter 2786e1c7d61SAdrian Hunter if (!iosf_mbi_available()) 2796e1c7d61SAdrian Hunter return true; 2806e1c7d61SAdrian Hunter 2816e1c7d61SAdrian Hunter sdhci_acpi_byt_setting(dev); 2826e1c7d61SAdrian Hunter 2836e1c7d61SAdrian Hunter return false; 2846e1c7d61SAdrian Hunter } 2856e1c7d61SAdrian Hunter 2866e1c7d61SAdrian Hunter #else 2876e1c7d61SAdrian Hunter 2886e1c7d61SAdrian Hunter static inline void sdhci_acpi_byt_setting(struct device *dev) 2896e1c7d61SAdrian Hunter { 2906e1c7d61SAdrian Hunter } 2916e1c7d61SAdrian Hunter 2926e1c7d61SAdrian Hunter static inline bool sdhci_acpi_byt_defer(struct device *dev) 2936e1c7d61SAdrian Hunter { 2946e1c7d61SAdrian Hunter return false; 2956e1c7d61SAdrian Hunter } 2966e1c7d61SAdrian Hunter 2976e1c7d61SAdrian Hunter #endif 2986e1c7d61SAdrian Hunter 2996a645dd8SAdrian Hunter static int bxt_get_cd(struct mmc_host *mmc) 3006a645dd8SAdrian Hunter { 3016a645dd8SAdrian Hunter int gpio_cd = mmc_gpio_get_cd(mmc); 3026a645dd8SAdrian Hunter 3036a645dd8SAdrian Hunter if (!gpio_cd) 3046a645dd8SAdrian Hunter return 0; 3056a645dd8SAdrian Hunter 3062caa11bcSAndy Shevchenko return sdhci_get_cd_nogpio(mmc); 3076a645dd8SAdrian Hunter } 3086a645dd8SAdrian Hunter 3094f3cde3aSAndy Shevchenko static int intel_probe_slot(struct platform_device *pdev, struct acpi_device *adev) 310578b36b6SGao, Yunpeng { 311578b36b6SGao, Yunpeng struct sdhci_acpi_host *c = platform_get_drvdata(pdev); 3121c451c13SAdrian Hunter struct intel_host *intel_host = sdhci_acpi_priv(c); 313159cd328SAdrian Hunter struct sdhci_host *host = c->host; 314578b36b6SGao, Yunpeng 3154f3cde3aSAndy Shevchenko if (acpi_dev_hid_uid_match(adev, "80860F14", "1") && 3168024379eSAdrian Hunter sdhci_readl(host, SDHCI_CAPABILITIES) == 0x446cc8b2 && 3178024379eSAdrian Hunter sdhci_readl(host, SDHCI_CAPABILITIES_1) == 0x00000807) 3188024379eSAdrian Hunter host->timeout_clk = 1000; /* 1000 kHz i.e. 1 MHz */ 3198024379eSAdrian Hunter 3204f3cde3aSAndy Shevchenko if (acpi_dev_hid_uid_match(adev, "80865ACA", NULL)) 3216a645dd8SAdrian Hunter host->mmc_host_ops.get_cd = bxt_get_cd; 3226a645dd8SAdrian Hunter 3231c451c13SAdrian Hunter intel_dsm_init(intel_host, &pdev->dev, host->mmc); 3241c451c13SAdrian Hunter 3251c451c13SAdrian Hunter host->mmc_host_ops.start_signal_voltage_switch = 3261c451c13SAdrian Hunter intel_start_signal_voltage_switch; 3271c451c13SAdrian Hunter 32884d49b3dSHans de Goede c->is_intel = true; 32984d49b3dSHans de Goede 330578b36b6SGao, Yunpeng return 0; 331578b36b6SGao, Yunpeng } 332578b36b6SGao, Yunpeng 3330acccf41SAdrian Hunter static int intel_setup_host(struct platform_device *pdev) 3340acccf41SAdrian Hunter { 3350acccf41SAdrian Hunter struct sdhci_acpi_host *c = platform_get_drvdata(pdev); 3360acccf41SAdrian Hunter struct intel_host *intel_host = sdhci_acpi_priv(c); 3370acccf41SAdrian Hunter 3380acccf41SAdrian Hunter if (!(intel_host->hs_caps & INTEL_DSM_HS_CAPS_SDR25)) 3390acccf41SAdrian Hunter c->host->mmc->caps &= ~MMC_CAP_UHS_SDR25; 3400acccf41SAdrian Hunter 3410acccf41SAdrian Hunter if (!(intel_host->hs_caps & INTEL_DSM_HS_CAPS_SDR50)) 3420acccf41SAdrian Hunter c->host->mmc->caps &= ~MMC_CAP_UHS_SDR50; 3430acccf41SAdrian Hunter 3440acccf41SAdrian Hunter if (!(intel_host->hs_caps & INTEL_DSM_HS_CAPS_DDR50)) 3450acccf41SAdrian Hunter c->host->mmc->caps &= ~MMC_CAP_UHS_DDR50; 3460acccf41SAdrian Hunter 3470acccf41SAdrian Hunter if (!(intel_host->hs_caps & INTEL_DSM_HS_CAPS_SDR104)) 3480acccf41SAdrian Hunter c->host->mmc->caps &= ~MMC_CAP_UHS_SDR104; 3490acccf41SAdrian Hunter 3500acccf41SAdrian Hunter return 0; 3510acccf41SAdrian Hunter } 3520acccf41SAdrian Hunter 35307a58883SAdrian Hunter static const struct sdhci_acpi_slot sdhci_acpi_slot_int_emmc = { 354b04fa064SAdrian Hunter .chip = &sdhci_acpi_chip_int, 355f25c3372SMaurice Petallo .caps = MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE | 3569d65cb88SAdrian Hunter MMC_CAP_HW_RESET | MMC_CAP_1_8V_DDR | 357c80f275fSAdrian Hunter MMC_CAP_CMD_DURING_TFR | MMC_CAP_WAIT_WHILE_BUSY, 35807a58883SAdrian Hunter .flags = SDHCI_ACPI_RUNTIME_PM, 359197ce1a5SAdrian Hunter .quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC | 360197ce1a5SAdrian Hunter SDHCI_QUIRK_NO_LED, 361e839b134SAdrian Hunter .quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN | 362e839b134SAdrian Hunter SDHCI_QUIRK2_STOP_WITH_TC | 363e839b134SAdrian Hunter SDHCI_QUIRK2_CAPS_BIT63_FOR_HS400, 364159cd328SAdrian Hunter .probe_slot = intel_probe_slot, 3650acccf41SAdrian Hunter .setup_host = intel_setup_host, 3661c451c13SAdrian Hunter .priv_size = sizeof(struct intel_host), 36707a58883SAdrian Hunter }; 36807a58883SAdrian Hunter 369e5571397SAdrian Hunter static const struct sdhci_acpi_slot sdhci_acpi_slot_int_sdio = { 370e1f5633aSAdrian Hunter .quirks = SDHCI_QUIRK_BROKEN_CARD_DETECTION | 371197ce1a5SAdrian Hunter SDHCI_QUIRK_NO_LED | 372e1f5633aSAdrian Hunter SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC, 373e5571397SAdrian Hunter .quirks2 = SDHCI_QUIRK2_HOST_OFF_CARD_ON, 3749d65cb88SAdrian Hunter .caps = MMC_CAP_NONREMOVABLE | MMC_CAP_POWER_OFF_CARD | 375265984b3SAdrian Hunter MMC_CAP_WAIT_WHILE_BUSY, 376e5571397SAdrian Hunter .flags = SDHCI_ACPI_RUNTIME_PM, 377e5571397SAdrian Hunter .pm_caps = MMC_PM_KEEP_POWER, 378159cd328SAdrian Hunter .probe_slot = intel_probe_slot, 3790acccf41SAdrian Hunter .setup_host = intel_setup_host, 3801c451c13SAdrian Hunter .priv_size = sizeof(struct intel_host), 381e5571397SAdrian Hunter }; 382e5571397SAdrian Hunter 38307a58883SAdrian Hunter static const struct sdhci_acpi_slot sdhci_acpi_slot_int_sd = { 3844fd4409cSAdrian Hunter .flags = SDHCI_ACPI_SD_CD | SDHCI_ACPI_SD_CD_OVERRIDE_LEVEL | 3854fd4409cSAdrian Hunter SDHCI_ACPI_RUNTIME_PM, 386197ce1a5SAdrian Hunter .quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC | 387197ce1a5SAdrian Hunter SDHCI_QUIRK_NO_LED, 388934e31b9SAdrian Hunter .quirks2 = SDHCI_QUIRK2_CARD_ON_NEEDS_BUS_ON | 389934e31b9SAdrian Hunter SDHCI_QUIRK2_STOP_WITH_TC, 390d3e97407SAzhar Shaikh .caps = MMC_CAP_WAIT_WHILE_BUSY | MMC_CAP_AGGRESSIVE_PM, 391159cd328SAdrian Hunter .probe_slot = intel_probe_slot, 3920acccf41SAdrian Hunter .setup_host = intel_setup_host, 3931c451c13SAdrian Hunter .priv_size = sizeof(struct intel_host), 39407a58883SAdrian Hunter }; 39507a58883SAdrian Hunter 39696ccb858SWang Dongsheng #define VENDOR_SPECIFIC_PWRCTL_CLEAR_REG 0x1a8 39796ccb858SWang Dongsheng #define VENDOR_SPECIFIC_PWRCTL_CTL_REG 0x1ac 39896ccb858SWang Dongsheng static irqreturn_t sdhci_acpi_qcom_handler(int irq, void *ptr) 39996ccb858SWang Dongsheng { 40096ccb858SWang Dongsheng struct sdhci_host *host = ptr; 40196ccb858SWang Dongsheng 40296ccb858SWang Dongsheng sdhci_writel(host, 0x3, VENDOR_SPECIFIC_PWRCTL_CLEAR_REG); 40396ccb858SWang Dongsheng sdhci_writel(host, 0x1, VENDOR_SPECIFIC_PWRCTL_CTL_REG); 40496ccb858SWang Dongsheng 40596ccb858SWang Dongsheng return IRQ_HANDLED; 40696ccb858SWang Dongsheng } 40796ccb858SWang Dongsheng 4084f3cde3aSAndy Shevchenko static int qcom_probe_slot(struct platform_device *pdev, struct acpi_device *adev) 40996ccb858SWang Dongsheng { 41096ccb858SWang Dongsheng struct sdhci_acpi_host *c = platform_get_drvdata(pdev); 41196ccb858SWang Dongsheng struct sdhci_host *host = c->host; 41296ccb858SWang Dongsheng int *irq = sdhci_acpi_priv(c); 41396ccb858SWang Dongsheng 41496ccb858SWang Dongsheng *irq = -EINVAL; 41596ccb858SWang Dongsheng 4164f3cde3aSAndy Shevchenko if (!acpi_dev_hid_uid_match(adev, "QCOM8051", NULL)) 41796ccb858SWang Dongsheng return 0; 41896ccb858SWang Dongsheng 41996ccb858SWang Dongsheng *irq = platform_get_irq(pdev, 1); 42096ccb858SWang Dongsheng if (*irq < 0) 42196ccb858SWang Dongsheng return 0; 42296ccb858SWang Dongsheng 42396ccb858SWang Dongsheng return request_threaded_irq(*irq, NULL, sdhci_acpi_qcom_handler, 42496ccb858SWang Dongsheng IRQF_ONESHOT | IRQF_TRIGGER_HIGH, 42596ccb858SWang Dongsheng "sdhci_qcom", host); 42696ccb858SWang Dongsheng } 42796ccb858SWang Dongsheng 42896ccb858SWang Dongsheng static int qcom_free_slot(struct platform_device *pdev) 42996ccb858SWang Dongsheng { 43096ccb858SWang Dongsheng struct device *dev = &pdev->dev; 43196ccb858SWang Dongsheng struct sdhci_acpi_host *c = platform_get_drvdata(pdev); 43296ccb858SWang Dongsheng struct sdhci_host *host = c->host; 43396ccb858SWang Dongsheng struct acpi_device *adev; 43496ccb858SWang Dongsheng int *irq = sdhci_acpi_priv(c); 43596ccb858SWang Dongsheng 43696ccb858SWang Dongsheng adev = ACPI_COMPANION(dev); 43796ccb858SWang Dongsheng if (!adev) 43896ccb858SWang Dongsheng return -ENODEV; 43996ccb858SWang Dongsheng 4404f3cde3aSAndy Shevchenko if (!acpi_dev_hid_uid_match(adev, "QCOM8051", NULL)) 44196ccb858SWang Dongsheng return 0; 44296ccb858SWang Dongsheng 44396ccb858SWang Dongsheng if (*irq < 0) 44496ccb858SWang Dongsheng return 0; 44596ccb858SWang Dongsheng 44696ccb858SWang Dongsheng free_irq(*irq, host); 44796ccb858SWang Dongsheng return 0; 44896ccb858SWang Dongsheng } 44996ccb858SWang Dongsheng 45070cce2afSPhilip Elcan static const struct sdhci_acpi_slot sdhci_acpi_slot_qcom_sd_3v = { 45170cce2afSPhilip Elcan .quirks = SDHCI_QUIRK_BROKEN_CARD_DETECTION, 45270cce2afSPhilip Elcan .quirks2 = SDHCI_QUIRK2_NO_1_8_V, 45370cce2afSPhilip Elcan .caps = MMC_CAP_NONREMOVABLE, 45496ccb858SWang Dongsheng .priv_size = sizeof(int), 45596ccb858SWang Dongsheng .probe_slot = qcom_probe_slot, 45696ccb858SWang Dongsheng .free_slot = qcom_free_slot, 45770cce2afSPhilip Elcan }; 45870cce2afSPhilip Elcan 45970cce2afSPhilip Elcan static const struct sdhci_acpi_slot sdhci_acpi_slot_qcom_sd = { 46070cce2afSPhilip Elcan .quirks = SDHCI_QUIRK_BROKEN_CARD_DETECTION, 46170cce2afSPhilip Elcan .caps = MMC_CAP_NONREMOVABLE, 46270cce2afSPhilip Elcan }; 46370cce2afSPhilip Elcan 46461d7437eSRaul E Rangel struct amd_sdhci_host { 46561d7437eSRaul E Rangel bool tuned_clock; 46661d7437eSRaul E Rangel bool dll_enabled; 46761d7437eSRaul E Rangel }; 46861d7437eSRaul E Rangel 46934597a3fSShah Nehal-Bakulchandra /* AMD sdhci reset dll register. */ 47034597a3fSShah Nehal-Bakulchandra #define SDHCI_AMD_RESET_DLL_REGISTER 0x908 47134597a3fSShah Nehal-Bakulchandra 47234597a3fSShah Nehal-Bakulchandra static int amd_select_drive_strength(struct mmc_card *card, 47334597a3fSShah Nehal-Bakulchandra unsigned int max_dtr, int host_drv, 474e10f4809SRaul E Rangel int card_drv, int *host_driver_strength) 47534597a3fSShah Nehal-Bakulchandra { 476e10f4809SRaul E Rangel struct sdhci_host *host = mmc_priv(card->host); 477e10f4809SRaul E Rangel u16 preset, preset_driver_strength; 478e10f4809SRaul E Rangel 479e10f4809SRaul E Rangel /* 480e10f4809SRaul E Rangel * This method is only called by mmc_select_hs200 so we only need to 481e10f4809SRaul E Rangel * read from the HS200 (SDR104) preset register. 482e10f4809SRaul E Rangel * 483e10f4809SRaul E Rangel * Firmware that has "invalid/default" presets return a driver strength 484e10f4809SRaul E Rangel * of A. This matches the previously hard coded value. 485e10f4809SRaul E Rangel */ 486e10f4809SRaul E Rangel preset = sdhci_readw(host, SDHCI_PRESET_FOR_SDR104); 487e10f4809SRaul E Rangel preset_driver_strength = FIELD_GET(SDHCI_PRESET_DRV_MASK, preset); 488e10f4809SRaul E Rangel 489e10f4809SRaul E Rangel /* 490e10f4809SRaul E Rangel * We want the controller driver strength to match the card's driver 491e10f4809SRaul E Rangel * strength so they have similar rise/fall times. 492e10f4809SRaul E Rangel * 493e10f4809SRaul E Rangel * The controller driver strength set by this method is sticky for all 494e10f4809SRaul E Rangel * timings after this method is called. This unfortunately means that 495e10f4809SRaul E Rangel * while HS400 tuning is in progress we end up with mismatched driver 496e10f4809SRaul E Rangel * strengths between the controller and the card. HS400 tuning requires 497e10f4809SRaul E Rangel * switching from HS400->DDR52->HS->HS200->HS400. So the driver mismatch 498e10f4809SRaul E Rangel * happens while in DDR52 and HS modes. This has not been observed to 499e10f4809SRaul E Rangel * cause problems. Enabling presets would fix this issue. 500e10f4809SRaul E Rangel */ 501e10f4809SRaul E Rangel *host_driver_strength = preset_driver_strength; 502e10f4809SRaul E Rangel 503e10f4809SRaul E Rangel /* 504e10f4809SRaul E Rangel * The resulting card driver strength is only set when switching the 505e10f4809SRaul E Rangel * card's timing to HS200 or HS400. The card will use the default driver 506e10f4809SRaul E Rangel * strength (B) for any other mode. 507e10f4809SRaul E Rangel */ 508e10f4809SRaul E Rangel return preset_driver_strength; 50934597a3fSShah Nehal-Bakulchandra } 51034597a3fSShah Nehal-Bakulchandra 5112cf9bfe9SRaul E Rangel static void sdhci_acpi_amd_hs400_dll(struct sdhci_host *host, bool enable) 51234597a3fSShah Nehal-Bakulchandra { 5132cf9bfe9SRaul E Rangel struct sdhci_acpi_host *acpi_host = sdhci_priv(host); 5142cf9bfe9SRaul E Rangel struct amd_sdhci_host *amd_host = sdhci_acpi_priv(acpi_host); 5152cf9bfe9SRaul E Rangel 51634597a3fSShah Nehal-Bakulchandra /* AMD Platform requires dll setting */ 51734597a3fSShah Nehal-Bakulchandra sdhci_writel(host, 0x40003210, SDHCI_AMD_RESET_DLL_REGISTER); 51834597a3fSShah Nehal-Bakulchandra usleep_range(10, 20); 5192cf9bfe9SRaul E Rangel if (enable) 52034597a3fSShah Nehal-Bakulchandra sdhci_writel(host, 0x40033210, SDHCI_AMD_RESET_DLL_REGISTER); 5212cf9bfe9SRaul E Rangel 5222cf9bfe9SRaul E Rangel amd_host->dll_enabled = enable; 52334597a3fSShah Nehal-Bakulchandra } 52434597a3fSShah Nehal-Bakulchandra 52534597a3fSShah Nehal-Bakulchandra /* 52661d7437eSRaul E Rangel * The initialization sequence for HS400 is: 52761d7437eSRaul E Rangel * HS->HS200->Perform Tuning->HS->HS400 52861d7437eSRaul E Rangel * 52961d7437eSRaul E Rangel * The re-tuning sequence is: 53061d7437eSRaul E Rangel * HS400->DDR52->HS->HS200->Perform Tuning->HS->HS400 53161d7437eSRaul E Rangel * 53261d7437eSRaul E Rangel * The AMD eMMC Controller can only use the tuned clock while in HS200 and HS400 53361d7437eSRaul E Rangel * mode. If we switch to a different mode, we need to disable the tuned clock. 53461d7437eSRaul E Rangel * If we have previously performed tuning and switch back to HS200 or 53561d7437eSRaul E Rangel * HS400, we can re-enable the tuned clock. 53661d7437eSRaul E Rangel * 53734597a3fSShah Nehal-Bakulchandra */ 53834597a3fSShah Nehal-Bakulchandra static void amd_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) 53934597a3fSShah Nehal-Bakulchandra { 54034597a3fSShah Nehal-Bakulchandra struct sdhci_host *host = mmc_priv(mmc); 54161d7437eSRaul E Rangel struct sdhci_acpi_host *acpi_host = sdhci_priv(host); 54261d7437eSRaul E Rangel struct amd_sdhci_host *amd_host = sdhci_acpi_priv(acpi_host); 54334597a3fSShah Nehal-Bakulchandra unsigned int old_timing = host->timing; 54461d7437eSRaul E Rangel u16 val; 54534597a3fSShah Nehal-Bakulchandra 54634597a3fSShah Nehal-Bakulchandra sdhci_set_ios(mmc, ios); 54761d7437eSRaul E Rangel 54861d7437eSRaul E Rangel if (old_timing != host->timing && amd_host->tuned_clock) { 54961d7437eSRaul E Rangel if (host->timing == MMC_TIMING_MMC_HS400 || 55061d7437eSRaul E Rangel host->timing == MMC_TIMING_MMC_HS200) { 55161d7437eSRaul E Rangel val = sdhci_readw(host, SDHCI_HOST_CONTROL2); 55261d7437eSRaul E Rangel val |= SDHCI_CTRL_TUNED_CLK; 55361d7437eSRaul E Rangel sdhci_writew(host, val, SDHCI_HOST_CONTROL2); 55461d7437eSRaul E Rangel } else { 55561d7437eSRaul E Rangel val = sdhci_readw(host, SDHCI_HOST_CONTROL2); 55661d7437eSRaul E Rangel val &= ~SDHCI_CTRL_TUNED_CLK; 55761d7437eSRaul E Rangel sdhci_writew(host, val, SDHCI_HOST_CONTROL2); 55834597a3fSShah Nehal-Bakulchandra } 55961d7437eSRaul E Rangel 56061d7437eSRaul E Rangel /* DLL is only required for HS400 */ 56161d7437eSRaul E Rangel if (host->timing == MMC_TIMING_MMC_HS400 && 5622cf9bfe9SRaul E Rangel !amd_host->dll_enabled) 5632cf9bfe9SRaul E Rangel sdhci_acpi_amd_hs400_dll(host, true); 56461d7437eSRaul E Rangel } 56561d7437eSRaul E Rangel } 56661d7437eSRaul E Rangel 56761d7437eSRaul E Rangel static int amd_sdhci_execute_tuning(struct mmc_host *mmc, u32 opcode) 56861d7437eSRaul E Rangel { 56961d7437eSRaul E Rangel int err; 57061d7437eSRaul E Rangel struct sdhci_host *host = mmc_priv(mmc); 57161d7437eSRaul E Rangel struct sdhci_acpi_host *acpi_host = sdhci_priv(host); 57261d7437eSRaul E Rangel struct amd_sdhci_host *amd_host = sdhci_acpi_priv(acpi_host); 57361d7437eSRaul E Rangel 57461d7437eSRaul E Rangel amd_host->tuned_clock = false; 57561d7437eSRaul E Rangel 57661d7437eSRaul E Rangel err = sdhci_execute_tuning(mmc, opcode); 57761d7437eSRaul E Rangel 57861d7437eSRaul E Rangel if (!err && !host->tuning_err) 57961d7437eSRaul E Rangel amd_host->tuned_clock = true; 58061d7437eSRaul E Rangel 58161d7437eSRaul E Rangel return err; 58234597a3fSShah Nehal-Bakulchandra } 58334597a3fSShah Nehal-Bakulchandra 5842cf9bfe9SRaul E Rangel static void amd_sdhci_reset(struct sdhci_host *host, u8 mask) 5852cf9bfe9SRaul E Rangel { 5862cf9bfe9SRaul E Rangel struct sdhci_acpi_host *acpi_host = sdhci_priv(host); 5872cf9bfe9SRaul E Rangel struct amd_sdhci_host *amd_host = sdhci_acpi_priv(acpi_host); 5882cf9bfe9SRaul E Rangel 5892cf9bfe9SRaul E Rangel if (mask & SDHCI_RESET_ALL) { 5902cf9bfe9SRaul E Rangel amd_host->tuned_clock = false; 5912cf9bfe9SRaul E Rangel sdhci_acpi_amd_hs400_dll(host, false); 5922cf9bfe9SRaul E Rangel } 5932cf9bfe9SRaul E Rangel 5942cf9bfe9SRaul E Rangel sdhci_reset(host, mask); 5952cf9bfe9SRaul E Rangel } 5962cf9bfe9SRaul E Rangel 59734597a3fSShah Nehal-Bakulchandra static const struct sdhci_ops sdhci_acpi_ops_amd = { 59834597a3fSShah Nehal-Bakulchandra .set_clock = sdhci_set_clock, 59934597a3fSShah Nehal-Bakulchandra .set_bus_width = sdhci_set_bus_width, 6002cf9bfe9SRaul E Rangel .reset = amd_sdhci_reset, 60134597a3fSShah Nehal-Bakulchandra .set_uhs_signaling = sdhci_set_uhs_signaling, 60234597a3fSShah Nehal-Bakulchandra }; 60334597a3fSShah Nehal-Bakulchandra 60434597a3fSShah Nehal-Bakulchandra static const struct sdhci_acpi_chip sdhci_acpi_chip_amd = { 60534597a3fSShah Nehal-Bakulchandra .ops = &sdhci_acpi_ops_amd, 60634597a3fSShah Nehal-Bakulchandra }; 60734597a3fSShah Nehal-Bakulchandra 60834597a3fSShah Nehal-Bakulchandra static int sdhci_acpi_emmc_amd_probe_slot(struct platform_device *pdev, 6094f3cde3aSAndy Shevchenko struct acpi_device *adev) 61034597a3fSShah Nehal-Bakulchandra { 61134597a3fSShah Nehal-Bakulchandra struct sdhci_acpi_host *c = platform_get_drvdata(pdev); 61234597a3fSShah Nehal-Bakulchandra struct sdhci_host *host = c->host; 61334597a3fSShah Nehal-Bakulchandra 61434597a3fSShah Nehal-Bakulchandra sdhci_read_caps(host); 61534597a3fSShah Nehal-Bakulchandra if (host->caps1 & SDHCI_SUPPORT_DDR50) 61634597a3fSShah Nehal-Bakulchandra host->mmc->caps = MMC_CAP_1_8V_DDR; 61734597a3fSShah Nehal-Bakulchandra 61834597a3fSShah Nehal-Bakulchandra if ((host->caps1 & SDHCI_SUPPORT_SDR104) && 61934597a3fSShah Nehal-Bakulchandra (host->mmc->caps & MMC_CAP_1_8V_DDR)) 62034597a3fSShah Nehal-Bakulchandra host->mmc->caps2 = MMC_CAP2_HS400_1_8V; 62134597a3fSShah Nehal-Bakulchandra 622f23cc3baSRaul E Rangel /* 623f23cc3baSRaul E Rangel * There are two types of presets out in the wild: 624f23cc3baSRaul E Rangel * 1) Default/broken presets. 625f23cc3baSRaul E Rangel * These presets have two sets of problems: 626f23cc3baSRaul E Rangel * a) The clock divisor for SDR12, SDR25, and SDR50 is too small. 627f23cc3baSRaul E Rangel * This results in clock frequencies that are 2x higher than 628f23cc3baSRaul E Rangel * acceptable. i.e., SDR12 = 25 MHz, SDR25 = 50 MHz, SDR50 = 629f23cc3baSRaul E Rangel * 100 MHz.x 630f23cc3baSRaul E Rangel * b) The HS200 and HS400 driver strengths don't match. 631f23cc3baSRaul E Rangel * By default, the SDR104 preset register has a driver strength of 632f23cc3baSRaul E Rangel * A, but the (internal) HS400 preset register has a driver 633f23cc3baSRaul E Rangel * strength of B. As part of initializing HS400, HS200 tuning 634f23cc3baSRaul E Rangel * needs to be performed. Having different driver strengths 635f23cc3baSRaul E Rangel * between tuning and operation is wrong. It results in different 636f23cc3baSRaul E Rangel * rise/fall times that lead to incorrect sampling. 637f23cc3baSRaul E Rangel * 2) Firmware with properly initialized presets. 638f23cc3baSRaul E Rangel * These presets have proper clock divisors. i.e., SDR12 => 12MHz, 639f23cc3baSRaul E Rangel * SDR25 => 25 MHz, SDR50 => 50 MHz. Additionally the HS200 and 640f23cc3baSRaul E Rangel * HS400 preset driver strengths match. 641f23cc3baSRaul E Rangel * 642f23cc3baSRaul E Rangel * Enabling presets for HS400 doesn't work for the following reasons: 643f23cc3baSRaul E Rangel * 1) sdhci_set_ios has a hard coded list of timings that are used 644f23cc3baSRaul E Rangel * to determine if presets should be enabled. 645f23cc3baSRaul E Rangel * 2) sdhci_get_preset_value is using a non-standard register to 646f23cc3baSRaul E Rangel * read out HS400 presets. The AMD controller doesn't support this 647f23cc3baSRaul E Rangel * non-standard register. In fact, it doesn't expose the HS400 648f23cc3baSRaul E Rangel * preset register anywhere in the SDHCI memory map. This results 649f23cc3baSRaul E Rangel * in reading a garbage value and using the wrong presets. 650f23cc3baSRaul E Rangel * 651f23cc3baSRaul E Rangel * Since HS400 and HS200 presets must be identical, we could 6521ad0dcb9Swangjianli * instead use the SDR104 preset register. 653f23cc3baSRaul E Rangel * 654f23cc3baSRaul E Rangel * If the above issues are resolved we could remove this quirk for 655ff50df9aSAdrian Hunter * firmware that has valid presets (i.e., SDR12 <= 12 MHz). 656f23cc3baSRaul E Rangel */ 657f23cc3baSRaul E Rangel host->quirks2 |= SDHCI_QUIRK2_PRESET_VALUE_BROKEN; 658f23cc3baSRaul E Rangel 65934597a3fSShah Nehal-Bakulchandra host->mmc_host_ops.select_drive_strength = amd_select_drive_strength; 66034597a3fSShah Nehal-Bakulchandra host->mmc_host_ops.set_ios = amd_set_ios; 66161d7437eSRaul E Rangel host->mmc_host_ops.execute_tuning = amd_sdhci_execute_tuning; 66234597a3fSShah Nehal-Bakulchandra return 0; 66334597a3fSShah Nehal-Bakulchandra } 66434597a3fSShah Nehal-Bakulchandra 66534597a3fSShah Nehal-Bakulchandra static const struct sdhci_acpi_slot sdhci_acpi_slot_amd_emmc = { 66634597a3fSShah Nehal-Bakulchandra .chip = &sdhci_acpi_chip_amd, 66734597a3fSShah Nehal-Bakulchandra .caps = MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE, 66845a3fe3bSRaul E Rangel .quirks = SDHCI_QUIRK_32BIT_DMA_ADDR | 66945a3fe3bSRaul E Rangel SDHCI_QUIRK_32BIT_DMA_SIZE | 67034597a3fSShah Nehal-Bakulchandra SDHCI_QUIRK_32BIT_ADMA_SIZE, 67145a3fe3bSRaul E Rangel .quirks2 = SDHCI_QUIRK2_BROKEN_64_BIT_DMA, 67234597a3fSShah Nehal-Bakulchandra .probe_slot = sdhci_acpi_emmc_amd_probe_slot, 67361d7437eSRaul E Rangel .priv_size = sizeof(struct amd_sdhci_host), 67434597a3fSShah Nehal-Bakulchandra }; 67534597a3fSShah Nehal-Bakulchandra 67607a58883SAdrian Hunter struct sdhci_acpi_uid_slot { 67707a58883SAdrian Hunter const char *hid; 67807a58883SAdrian Hunter const char *uid; 67907a58883SAdrian Hunter const struct sdhci_acpi_slot *slot; 68007a58883SAdrian Hunter }; 68107a58883SAdrian Hunter 68207a58883SAdrian Hunter static const struct sdhci_acpi_uid_slot sdhci_acpi_uids[] = { 683e839b134SAdrian Hunter { "80865ACA", NULL, &sdhci_acpi_slot_int_sd }, 684e839b134SAdrian Hunter { "80865ACC", NULL, &sdhci_acpi_slot_int_emmc }, 685e839b134SAdrian Hunter { "80865AD0", NULL, &sdhci_acpi_slot_int_sdio }, 68607a58883SAdrian Hunter { "80860F14" , "1" , &sdhci_acpi_slot_int_emmc }, 687db52d4f8SDaniel Drake { "80860F14" , "2" , &sdhci_acpi_slot_int_sdio }, 68807a58883SAdrian Hunter { "80860F14" , "3" , &sdhci_acpi_slot_int_sd }, 689aad95dc4SAdrian Hunter { "80860F16" , NULL, &sdhci_acpi_slot_int_sd }, 69007a58883SAdrian Hunter { "INT33BB" , "2" , &sdhci_acpi_slot_int_sdio }, 6917147eaf3SAdrian Hunter { "INT33BB" , "3" , &sdhci_acpi_slot_int_sd }, 69207a58883SAdrian Hunter { "INT33C6" , NULL, &sdhci_acpi_slot_int_sdio }, 69307c001c1SMika Westerberg { "INT3436" , NULL, &sdhci_acpi_slot_int_sdio }, 694d0ed8e6bSAdrian Hunter { "INT344D" , NULL, &sdhci_acpi_slot_int_sdio }, 6950cd2f044SMichele Curti { "PNP0FFF" , "3" , &sdhci_acpi_slot_int_sd }, 69607a58883SAdrian Hunter { "PNP0D40" }, 69770cce2afSPhilip Elcan { "QCOM8051", NULL, &sdhci_acpi_slot_qcom_sd_3v }, 69870cce2afSPhilip Elcan { "QCOM8052", NULL, &sdhci_acpi_slot_qcom_sd }, 69934597a3fSShah Nehal-Bakulchandra { "AMDI0040", NULL, &sdhci_acpi_slot_amd_emmc }, 700955047f3SJames Young { "AMDI0041", NULL, &sdhci_acpi_slot_amd_emmc }, 70107a58883SAdrian Hunter { }, 70207a58883SAdrian Hunter }; 70307a58883SAdrian Hunter 704c4e05037SAdrian Hunter static const struct acpi_device_id sdhci_acpi_ids[] = { 705e839b134SAdrian Hunter { "80865ACA" }, 706e839b134SAdrian Hunter { "80865ACC" }, 707e839b134SAdrian Hunter { "80865AD0" }, 70807a58883SAdrian Hunter { "80860F14" }, 709aad95dc4SAdrian Hunter { "80860F16" }, 71007a58883SAdrian Hunter { "INT33BB" }, 71107a58883SAdrian Hunter { "INT33C6" }, 71207c001c1SMika Westerberg { "INT3436" }, 713d0ed8e6bSAdrian Hunter { "INT344D" }, 714c4e05037SAdrian Hunter { "PNP0D40" }, 71570cce2afSPhilip Elcan { "QCOM8051" }, 71670cce2afSPhilip Elcan { "QCOM8052" }, 71734597a3fSShah Nehal-Bakulchandra { "AMDI0040" }, 718955047f3SJames Young { "AMDI0041" }, 719c4e05037SAdrian Hunter { }, 720c4e05037SAdrian Hunter }; 721c4e05037SAdrian Hunter MODULE_DEVICE_TABLE(acpi, sdhci_acpi_ids); 722c4e05037SAdrian Hunter 723e236bb53SHans de Goede /* Please keep this list sorted alphabetically */ 72484d49b3dSHans de Goede static const struct dmi_system_id sdhci_acpi_quirks[] = { 72584d49b3dSHans de Goede { 72684d49b3dSHans de Goede /* 727e236bb53SHans de Goede * The Acer Aspire Switch 10 (SW5-012) microSD slot always 728e236bb53SHans de Goede * reports the card being write-protected even though microSD 729e236bb53SHans de Goede * cards do not have a write-protect switch at all. 730e236bb53SHans de Goede */ 731e236bb53SHans de Goede .matches = { 732e236bb53SHans de Goede DMI_MATCH(DMI_SYS_VENDOR, "Acer"), 733e236bb53SHans de Goede DMI_MATCH(DMI_PRODUCT_NAME, "Aspire SW5-012"), 734e236bb53SHans de Goede }, 735e236bb53SHans de Goede .driver_data = (void *)DMI_QUIRK_SD_NO_WRITE_PROTECT, 736e236bb53SHans de Goede }, 737e236bb53SHans de Goede { 738e236bb53SHans de Goede /* 73984d49b3dSHans de Goede * The Lenovo Miix 320-10ICR has a bug in the _PS0 method of 74084d49b3dSHans de Goede * the SHC1 ACPI device, this bug causes it to reprogram the 74184d49b3dSHans de Goede * wrong LDO (DLDO3) to 1.8V if 1.8V modes are used and the 74284d49b3dSHans de Goede * card is (runtime) suspended + resumed. DLDO3 is used for 74384d49b3dSHans de Goede * the LCD and setting it to 1.8V causes the LCD to go black. 74484d49b3dSHans de Goede */ 74584d49b3dSHans de Goede .matches = { 74684d49b3dSHans de Goede DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"), 74784d49b3dSHans de Goede DMI_MATCH(DMI_PRODUCT_VERSION, "Lenovo MIIX 320-10ICR"), 74884d49b3dSHans de Goede }, 74984d49b3dSHans de Goede .driver_data = (void *)DMI_QUIRK_RESET_SD_SIGNAL_VOLT_ON_SUSP, 75084d49b3dSHans de Goede }, 7513397b251SHans de Goede { 7523397b251SHans de Goede /* 753e000578aSHans de Goede * Lenovo Yoga Tablet 2 Pro 1380F/L (13" Android version) this 754e000578aSHans de Goede * has broken WP reporting and an inverted CD signal. 755e000578aSHans de Goede * Note this has more or less the same BIOS as the Lenovo Yoga 756e000578aSHans de Goede * Tablet 2 830F/L or 1050F/L (8" and 10" Android), but unlike 757e000578aSHans de Goede * the 830 / 1050 models which share the same mainboard this 758e000578aSHans de Goede * model has a different mainboard and the inverted CD and 759e000578aSHans de Goede * broken WP are unique to this board. 760e000578aSHans de Goede */ 761e000578aSHans de Goede .matches = { 762e000578aSHans de Goede DMI_MATCH(DMI_SYS_VENDOR, "Intel Corp."), 763e000578aSHans de Goede DMI_MATCH(DMI_PRODUCT_NAME, "VALLEYVIEW C0 PLATFORM"), 764e000578aSHans de Goede DMI_MATCH(DMI_BOARD_NAME, "BYT-T FFD8"), 765e000578aSHans de Goede /* Full match so as to NOT match the 830/1050 BIOS */ 766e000578aSHans de Goede DMI_MATCH(DMI_BIOS_VERSION, "BLADE_21.X64.0005.R00.1504101516"), 767e000578aSHans de Goede }, 768e000578aSHans de Goede .driver_data = (void *)(DMI_QUIRK_SD_NO_WRITE_PROTECT | 769e000578aSHans de Goede DMI_QUIRK_SD_CD_ACTIVE_HIGH), 770e000578aSHans de Goede }, 771e000578aSHans de Goede { 772e000578aSHans de Goede /* 77394ee6782SHans de Goede * The Toshiba WT8-B's microSD slot always reports the card being 77494ee6782SHans de Goede * write-protected. 77594ee6782SHans de Goede */ 77694ee6782SHans de Goede .matches = { 77794ee6782SHans de Goede DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"), 77894ee6782SHans de Goede DMI_MATCH(DMI_PRODUCT_NAME, "TOSHIBA ENCORE 2 WT8-B"), 77994ee6782SHans de Goede }, 78094ee6782SHans de Goede .driver_data = (void *)DMI_QUIRK_SD_NO_WRITE_PROTECT, 78194ee6782SHans de Goede }, 782b5636348SHans de Goede { 783b5636348SHans de Goede /* 784b5636348SHans de Goede * The Toshiba WT10-A's microSD slot always reports the card being 785b5636348SHans de Goede * write-protected. 786b5636348SHans de Goede */ 787b5636348SHans de Goede .matches = { 788b5636348SHans de Goede DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"), 789b5636348SHans de Goede DMI_MATCH(DMI_PRODUCT_NAME, "TOSHIBA WT10-A"), 790b5636348SHans de Goede }, 791b5636348SHans de Goede .driver_data = (void *)DMI_QUIRK_SD_NO_WRITE_PROTECT, 792b5636348SHans de Goede }, 79384d49b3dSHans de Goede {} /* Terminating entry */ 79484d49b3dSHans de Goede }; 79584d49b3dSHans de Goede 7964f3cde3aSAndy Shevchenko static const struct sdhci_acpi_slot *sdhci_acpi_get_slot(struct acpi_device *adev) 797c4e05037SAdrian Hunter { 79807a58883SAdrian Hunter const struct sdhci_acpi_uid_slot *u; 799c4e05037SAdrian Hunter 80007a58883SAdrian Hunter for (u = sdhci_acpi_uids; u->hid; u++) { 8014f3cde3aSAndy Shevchenko if (acpi_dev_hid_uid_match(adev, u->hid, u->uid)) 80207a58883SAdrian Hunter return u->slot; 80307a58883SAdrian Hunter } 804c4e05037SAdrian Hunter return NULL; 805c4e05037SAdrian Hunter } 806c4e05037SAdrian Hunter 8074e608e4eSGreg Kroah-Hartman static int sdhci_acpi_probe(struct platform_device *pdev) 808c4e05037SAdrian Hunter { 809c4e05037SAdrian Hunter struct device *dev = &pdev->dev; 810f07b7952SAdrian Hunter const struct sdhci_acpi_slot *slot; 81184d49b3dSHans de Goede const struct dmi_system_id *id; 812a22f18bdSRafael J. Wysocki struct acpi_device *device; 813c4e05037SAdrian Hunter struct sdhci_acpi_host *c; 814c4e05037SAdrian Hunter struct sdhci_host *host; 815c4e05037SAdrian Hunter struct resource *iomem; 816c4e05037SAdrian Hunter resource_size_t len; 817f07b7952SAdrian Hunter size_t priv_size; 81884d49b3dSHans de Goede int quirks = 0; 81987875655SMika Westerberg int err; 820c4e05037SAdrian Hunter 821cd25c7beSAndy Shevchenko device = ACPI_COMPANION(dev); 822cd25c7beSAndy Shevchenko if (!device) 823c4e05037SAdrian Hunter return -ENODEV; 824c4e05037SAdrian Hunter 82584d49b3dSHans de Goede id = dmi_first_match(sdhci_acpi_quirks); 82684d49b3dSHans de Goede if (id) 82784d49b3dSHans de Goede quirks = (long)id->driver_data; 82884d49b3dSHans de Goede 8294f3cde3aSAndy Shevchenko slot = sdhci_acpi_get_slot(device); 830f07b7952SAdrian Hunter 831e5bbf307SAdrian Hunter /* Power on the SDHCI controller and its children */ 832a22f18bdSRafael J. Wysocki acpi_device_fix_up_power_extended(device); 833e5bbf307SAdrian Hunter 8346e1c7d61SAdrian Hunter if (sdhci_acpi_byt_defer(dev)) 8356e1c7d61SAdrian Hunter return -EPROBE_DEFER; 8366e1c7d61SAdrian Hunter 837c4e05037SAdrian Hunter iomem = platform_get_resource(pdev, IORESOURCE_MEM, 0); 838c4e05037SAdrian Hunter if (!iomem) 839c4e05037SAdrian Hunter return -ENOMEM; 840c4e05037SAdrian Hunter 841c4e05037SAdrian Hunter len = resource_size(iomem); 842c4e05037SAdrian Hunter if (len < 0x100) 843c4e05037SAdrian Hunter dev_err(dev, "Invalid iomem size!\n"); 844c4e05037SAdrian Hunter 845c4e05037SAdrian Hunter if (!devm_request_mem_region(dev, iomem->start, len, dev_name(dev))) 846c4e05037SAdrian Hunter return -ENOMEM; 847c4e05037SAdrian Hunter 848f07b7952SAdrian Hunter priv_size = slot ? slot->priv_size : 0; 849f07b7952SAdrian Hunter host = sdhci_alloc_host(dev, sizeof(struct sdhci_acpi_host) + priv_size); 850c4e05037SAdrian Hunter if (IS_ERR(host)) 851c4e05037SAdrian Hunter return PTR_ERR(host); 852c4e05037SAdrian Hunter 853c4e05037SAdrian Hunter c = sdhci_priv(host); 854c4e05037SAdrian Hunter c->host = host; 855f07b7952SAdrian Hunter c->slot = slot; 856c4e05037SAdrian Hunter c->pdev = pdev; 857c4e05037SAdrian Hunter c->use_runtime_pm = sdhci_acpi_flag(c, SDHCI_ACPI_RUNTIME_PM); 858c4e05037SAdrian Hunter 859c4e05037SAdrian Hunter platform_set_drvdata(pdev, c); 860c4e05037SAdrian Hunter 861c4e05037SAdrian Hunter host->hw_name = "ACPI"; 862c4e05037SAdrian Hunter host->ops = &sdhci_acpi_ops_dflt; 863c4e05037SAdrian Hunter host->irq = platform_get_irq(pdev, 0); 864d58ac803SAdrian Hunter if (host->irq < 0) { 865b465dea5SSergey Shtylyov err = host->irq; 8661b7ba57eSArvind Yadav goto err_free; 8671b7ba57eSArvind Yadav } 868c4e05037SAdrian Hunter 8694bdc0d67SChristoph Hellwig host->ioaddr = devm_ioremap(dev, iomem->start, 870c4e05037SAdrian Hunter resource_size(iomem)); 871c4e05037SAdrian Hunter if (host->ioaddr == NULL) { 872c4e05037SAdrian Hunter err = -ENOMEM; 873c4e05037SAdrian Hunter goto err_free; 874c4e05037SAdrian Hunter } 875c4e05037SAdrian Hunter 876c4e05037SAdrian Hunter if (c->slot) { 877578b36b6SGao, Yunpeng if (c->slot->probe_slot) { 8784f3cde3aSAndy Shevchenko err = c->slot->probe_slot(pdev, device); 879578b36b6SGao, Yunpeng if (err) 880578b36b6SGao, Yunpeng goto err_free; 881578b36b6SGao, Yunpeng } 882c4e05037SAdrian Hunter if (c->slot->chip) { 883c4e05037SAdrian Hunter host->ops = c->slot->chip->ops; 884c4e05037SAdrian Hunter host->quirks |= c->slot->chip->quirks; 885c4e05037SAdrian Hunter host->quirks2 |= c->slot->chip->quirks2; 886c4e05037SAdrian Hunter host->mmc->caps |= c->slot->chip->caps; 887c4e05037SAdrian Hunter host->mmc->caps2 |= c->slot->chip->caps2; 888c4e05037SAdrian Hunter host->mmc->pm_caps |= c->slot->chip->pm_caps; 889c4e05037SAdrian Hunter } 890c4e05037SAdrian Hunter host->quirks |= c->slot->quirks; 891c4e05037SAdrian Hunter host->quirks2 |= c->slot->quirks2; 892c4e05037SAdrian Hunter host->mmc->caps |= c->slot->caps; 893c4e05037SAdrian Hunter host->mmc->caps2 |= c->slot->caps2; 894c4e05037SAdrian Hunter host->mmc->pm_caps |= c->slot->pm_caps; 895c4e05037SAdrian Hunter } 896c4e05037SAdrian Hunter 8970d3e3350SAdrian Hunter host->mmc->caps2 |= MMC_CAP2_NO_PRESCAN_POWERUP; 8980d3e3350SAdrian Hunter 8994fd4409cSAdrian Hunter if (sdhci_acpi_flag(c, SDHCI_ACPI_SD_CD)) { 9004fd4409cSAdrian Hunter bool v = sdhci_acpi_flag(c, SDHCI_ACPI_SD_CD_OVERRIDE_LEVEL); 9014fd4409cSAdrian Hunter 902e000578aSHans de Goede if (quirks & DMI_QUIRK_SD_CD_ACTIVE_HIGH) 903e000578aSHans de Goede host->mmc->caps2 |= MMC_CAP2_CD_ACTIVE_HIGH; 904e000578aSHans de Goede 905d0052ad9SMichał Mirosław err = mmc_gpiod_request_cd(host->mmc, NULL, 0, v, 0); 906e28d6f04SZhang Rui if (err) { 907e28d6f04SZhang Rui if (err == -EPROBE_DEFER) 908e28d6f04SZhang Rui goto err_free; 9094fd4409cSAdrian Hunter dev_warn(dev, "failed to setup card detect gpio\n"); 9104fd4409cSAdrian Hunter c->use_runtime_pm = false; 9114fd4409cSAdrian Hunter } 91284d49b3dSHans de Goede 91384d49b3dSHans de Goede if (quirks & DMI_QUIRK_RESET_SD_SIGNAL_VOLT_ON_SUSP) 91484d49b3dSHans de Goede c->reset_signal_volt_on_suspend = true; 9153397b251SHans de Goede 9163397b251SHans de Goede if (quirks & DMI_QUIRK_SD_NO_WRITE_PROTECT) 9173397b251SHans de Goede host->mmc->caps2 |= MMC_CAP2_NO_WRITE_PROTECT; 9184fd4409cSAdrian Hunter } 9194fd4409cSAdrian Hunter 9200cc1a0f4SAdrian Hunter err = sdhci_setup_host(host); 921c4e05037SAdrian Hunter if (err) 922c4e05037SAdrian Hunter goto err_free; 923c4e05037SAdrian Hunter 9240cc1a0f4SAdrian Hunter if (c->slot && c->slot->setup_host) { 9250cc1a0f4SAdrian Hunter err = c->slot->setup_host(pdev); 9260cc1a0f4SAdrian Hunter if (err) 9270cc1a0f4SAdrian Hunter goto err_cleanup; 9280cc1a0f4SAdrian Hunter } 9290cc1a0f4SAdrian Hunter 9300cc1a0f4SAdrian Hunter err = __sdhci_add_host(host); 9310cc1a0f4SAdrian Hunter if (err) 9320cc1a0f4SAdrian Hunter goto err_cleanup; 9330cc1a0f4SAdrian Hunter 934c4e05037SAdrian Hunter if (c->use_runtime_pm) { 9351d1ff458SAdrian Hunter pm_runtime_set_active(dev); 936c4e05037SAdrian Hunter pm_suspend_ignore_children(dev, 1); 937c4e05037SAdrian Hunter pm_runtime_set_autosuspend_delay(dev, 50); 938c4e05037SAdrian Hunter pm_runtime_use_autosuspend(dev); 939c4e05037SAdrian Hunter pm_runtime_enable(dev); 940c4e05037SAdrian Hunter } 941c4e05037SAdrian Hunter 9424e6a2ef9SFu, Zhonghui device_enable_async_suspend(dev); 9434e6a2ef9SFu, Zhonghui 944c4e05037SAdrian Hunter return 0; 945c4e05037SAdrian Hunter 9460cc1a0f4SAdrian Hunter err_cleanup: 9470cc1a0f4SAdrian Hunter sdhci_cleanup_host(c->host); 948c4e05037SAdrian Hunter err_free: 949c7eabbeeSWang Dongsheng if (c->slot && c->slot->free_slot) 950c7eabbeeSWang Dongsheng c->slot->free_slot(pdev); 951c7eabbeeSWang Dongsheng 952c4e05037SAdrian Hunter sdhci_free_host(c->host); 953c4e05037SAdrian Hunter return err; 954c4e05037SAdrian Hunter } 955c4e05037SAdrian Hunter 956a2b6de80SYangtao Li static void sdhci_acpi_remove(struct platform_device *pdev) 957c4e05037SAdrian Hunter { 958c4e05037SAdrian Hunter struct sdhci_acpi_host *c = platform_get_drvdata(pdev); 959c4e05037SAdrian Hunter struct device *dev = &pdev->dev; 960c4e05037SAdrian Hunter int dead; 961c4e05037SAdrian Hunter 962c4e05037SAdrian Hunter if (c->use_runtime_pm) { 963c4e05037SAdrian Hunter pm_runtime_get_sync(dev); 964c4e05037SAdrian Hunter pm_runtime_disable(dev); 965c4e05037SAdrian Hunter pm_runtime_put_noidle(dev); 966c4e05037SAdrian Hunter } 967c4e05037SAdrian Hunter 968578b36b6SGao, Yunpeng if (c->slot && c->slot->remove_slot) 969578b36b6SGao, Yunpeng c->slot->remove_slot(pdev); 970578b36b6SGao, Yunpeng 971c4e05037SAdrian Hunter dead = (sdhci_readl(c->host, SDHCI_INT_STATUS) == ~0); 972c4e05037SAdrian Hunter sdhci_remove_host(c->host, dead); 973c7eabbeeSWang Dongsheng 974c7eabbeeSWang Dongsheng if (c->slot && c->slot->free_slot) 975c7eabbeeSWang Dongsheng c->slot->free_slot(pdev); 976c7eabbeeSWang Dongsheng 977c4e05037SAdrian Hunter sdhci_free_host(c->host); 978c4e05037SAdrian Hunter } 979c4e05037SAdrian Hunter 98084d49b3dSHans de Goede static void __maybe_unused sdhci_acpi_reset_signal_voltage_if_needed( 98184d49b3dSHans de Goede struct device *dev) 98284d49b3dSHans de Goede { 98384d49b3dSHans de Goede struct sdhci_acpi_host *c = dev_get_drvdata(dev); 98484d49b3dSHans de Goede struct sdhci_host *host = c->host; 98584d49b3dSHans de Goede 98684d49b3dSHans de Goede if (c->is_intel && c->reset_signal_volt_on_suspend && 98784d49b3dSHans de Goede host->mmc->ios.signal_voltage != MMC_SIGNAL_VOLTAGE_330) { 98884d49b3dSHans de Goede struct intel_host *intel_host = sdhci_acpi_priv(c); 98984d49b3dSHans de Goede unsigned int fn = INTEL_DSM_V33_SWITCH; 99084d49b3dSHans de Goede u32 result = 0; 99184d49b3dSHans de Goede 99284d49b3dSHans de Goede intel_dsm(intel_host, dev, fn, &result); 99384d49b3dSHans de Goede } 99484d49b3dSHans de Goede } 99584d49b3dSHans de Goede 996c4e05037SAdrian Hunter #ifdef CONFIG_PM_SLEEP 997c4e05037SAdrian Hunter 998c4e05037SAdrian Hunter static int sdhci_acpi_suspend(struct device *dev) 999c4e05037SAdrian Hunter { 1000c4e05037SAdrian Hunter struct sdhci_acpi_host *c = dev_get_drvdata(dev); 1001d38dcad4SAdrian Hunter struct sdhci_host *host = c->host; 100284d49b3dSHans de Goede int ret; 1003c4e05037SAdrian Hunter 1004d38dcad4SAdrian Hunter if (host->tuning_mode != SDHCI_TUNING_MODE_3) 1005d38dcad4SAdrian Hunter mmc_retune_needed(host->mmc); 1006d38dcad4SAdrian Hunter 100784d49b3dSHans de Goede ret = sdhci_suspend_host(host); 100884d49b3dSHans de Goede if (ret) 100984d49b3dSHans de Goede return ret; 101084d49b3dSHans de Goede 101184d49b3dSHans de Goede sdhci_acpi_reset_signal_voltage_if_needed(dev); 101284d49b3dSHans de Goede return 0; 1013c4e05037SAdrian Hunter } 1014c4e05037SAdrian Hunter 1015c4e05037SAdrian Hunter static int sdhci_acpi_resume(struct device *dev) 1016c4e05037SAdrian Hunter { 1017c4e05037SAdrian Hunter struct sdhci_acpi_host *c = dev_get_drvdata(dev); 1018c4e05037SAdrian Hunter 10196e1c7d61SAdrian Hunter sdhci_acpi_byt_setting(&c->pdev->dev); 10206e1c7d61SAdrian Hunter 1021c4e05037SAdrian Hunter return sdhci_resume_host(c->host); 1022c4e05037SAdrian Hunter } 1023c4e05037SAdrian Hunter 1024c4e05037SAdrian Hunter #endif 1025c4e05037SAdrian Hunter 1026162d6f98SRafael J. Wysocki #ifdef CONFIG_PM 1027c4e05037SAdrian Hunter 1028c4e05037SAdrian Hunter static int sdhci_acpi_runtime_suspend(struct device *dev) 1029c4e05037SAdrian Hunter { 1030c4e05037SAdrian Hunter struct sdhci_acpi_host *c = dev_get_drvdata(dev); 1031d38dcad4SAdrian Hunter struct sdhci_host *host = c->host; 103284d49b3dSHans de Goede int ret; 1033c4e05037SAdrian Hunter 1034d38dcad4SAdrian Hunter if (host->tuning_mode != SDHCI_TUNING_MODE_3) 1035d38dcad4SAdrian Hunter mmc_retune_needed(host->mmc); 1036d38dcad4SAdrian Hunter 103784d49b3dSHans de Goede ret = sdhci_runtime_suspend_host(host); 103884d49b3dSHans de Goede if (ret) 103984d49b3dSHans de Goede return ret; 104084d49b3dSHans de Goede 104184d49b3dSHans de Goede sdhci_acpi_reset_signal_voltage_if_needed(dev); 104284d49b3dSHans de Goede return 0; 1043c4e05037SAdrian Hunter } 1044c4e05037SAdrian Hunter 1045c4e05037SAdrian Hunter static int sdhci_acpi_runtime_resume(struct device *dev) 1046c4e05037SAdrian Hunter { 1047c4e05037SAdrian Hunter struct sdhci_acpi_host *c = dev_get_drvdata(dev); 1048c4e05037SAdrian Hunter 10496e1c7d61SAdrian Hunter sdhci_acpi_byt_setting(&c->pdev->dev); 10506e1c7d61SAdrian Hunter 1051c6303c5dSBaolin Wang return sdhci_runtime_resume_host(c->host, 0); 1052c4e05037SAdrian Hunter } 1053c4e05037SAdrian Hunter 1054c4e05037SAdrian Hunter #endif 1055c4e05037SAdrian Hunter 1056c4e05037SAdrian Hunter static const struct dev_pm_ops sdhci_acpi_pm_ops = { 1057dafed447SUlf Hansson SET_SYSTEM_SLEEP_PM_OPS(sdhci_acpi_suspend, sdhci_acpi_resume) 10581d75f74bSPeter Griffin SET_RUNTIME_PM_OPS(sdhci_acpi_runtime_suspend, 10599b449e99SUlf Hansson sdhci_acpi_runtime_resume, NULL) 1060c4e05037SAdrian Hunter }; 1061c4e05037SAdrian Hunter 1062c4e05037SAdrian Hunter static struct platform_driver sdhci_acpi_driver = { 1063c4e05037SAdrian Hunter .driver = { 1064c4e05037SAdrian Hunter .name = "sdhci-acpi", 106521b2cec6SDouglas Anderson .probe_type = PROBE_PREFER_ASYNCHRONOUS, 1066c4e05037SAdrian Hunter .acpi_match_table = sdhci_acpi_ids, 1067c4e05037SAdrian Hunter .pm = &sdhci_acpi_pm_ops, 1068c4e05037SAdrian Hunter }, 1069c4e05037SAdrian Hunter .probe = sdhci_acpi_probe, 1070a2b6de80SYangtao Li .remove_new = sdhci_acpi_remove, 1071c4e05037SAdrian Hunter }; 1072c4e05037SAdrian Hunter 1073c4e05037SAdrian Hunter module_platform_driver(sdhci_acpi_driver); 1074c4e05037SAdrian Hunter 1075c4e05037SAdrian Hunter MODULE_DESCRIPTION("Secure Digital Host Controller Interface ACPI driver"); 1076c4e05037SAdrian Hunter MODULE_AUTHOR("Adrian Hunter"); 1077c4e05037SAdrian Hunter MODULE_LICENSE("GPL v2"); 1078