1 /* Realtek USB SD/MMC Card Interface driver 2 * 3 * Copyright(c) 2009-2013 Realtek Semiconductor Corp. All rights reserved. 4 * 5 * This program is free software; you can redistribute it and/or modify it 6 * under the terms of the GNU General Public License version 2 7 * as published by the Free Software Foundation. 8 * 9 * This program is distributed in the hope that it will be useful, but 10 * WITHOUT ANY WARRANTY; without even the implied warranty of 11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 12 * General Public License for more details. 13 * 14 * You should have received a copy of the GNU General Public License along 15 * with this program; if not, see <http://www.gnu.org/licenses/>. 16 * 17 * Author: 18 * Roger Tseng <rogerable@realtek.com> 19 */ 20 21 #include <linux/module.h> 22 #include <linux/slab.h> 23 #include <linux/delay.h> 24 #include <linux/platform_device.h> 25 #include <linux/usb.h> 26 #include <linux/mmc/host.h> 27 #include <linux/mmc/mmc.h> 28 #include <linux/mmc/sd.h> 29 #include <linux/mmc/sdio.h> 30 #include <linux/mmc/card.h> 31 #include <linux/scatterlist.h> 32 #include <linux/pm_runtime.h> 33 34 #include <linux/mfd/rtsx_usb.h> 35 #include <asm/unaligned.h> 36 37 #if defined(CONFIG_LEDS_CLASS) || (defined(CONFIG_LEDS_CLASS_MODULE) && \ 38 defined(CONFIG_MMC_REALTEK_USB_MODULE)) 39 #include <linux/leds.h> 40 #include <linux/workqueue.h> 41 #define RTSX_USB_USE_LEDS_CLASS 42 #endif 43 44 struct rtsx_usb_sdmmc { 45 struct platform_device *pdev; 46 struct rtsx_ucr *ucr; 47 struct mmc_host *mmc; 48 struct mmc_request *mrq; 49 50 struct mutex host_mutex; 51 52 u8 ssc_depth; 53 unsigned int clock; 54 bool vpclk; 55 bool double_clk; 56 bool host_removal; 57 bool card_exist; 58 bool initial_mode; 59 bool ddr_mode; 60 61 unsigned char power_mode; 62 63 #ifdef RTSX_USB_USE_LEDS_CLASS 64 struct led_classdev led; 65 char led_name[32]; 66 struct work_struct led_work; 67 #endif 68 }; 69 70 static inline struct device *sdmmc_dev(struct rtsx_usb_sdmmc *host) 71 { 72 return &(host->pdev->dev); 73 } 74 75 static inline void sd_clear_error(struct rtsx_usb_sdmmc *host) 76 { 77 struct rtsx_ucr *ucr = host->ucr; 78 rtsx_usb_ep0_write_register(ucr, CARD_STOP, 79 SD_STOP | SD_CLR_ERR, 80 SD_STOP | SD_CLR_ERR); 81 82 rtsx_usb_clear_dma_err(ucr); 83 rtsx_usb_clear_fsm_err(ucr); 84 } 85 86 #ifdef DEBUG 87 static void sd_print_debug_regs(struct rtsx_usb_sdmmc *host) 88 { 89 struct rtsx_ucr *ucr = host->ucr; 90 u8 val = 0; 91 92 rtsx_usb_ep0_read_register(ucr, SD_STAT1, &val); 93 dev_dbg(sdmmc_dev(host), "SD_STAT1: 0x%x\n", val); 94 rtsx_usb_ep0_read_register(ucr, SD_STAT2, &val); 95 dev_dbg(sdmmc_dev(host), "SD_STAT2: 0x%x\n", val); 96 rtsx_usb_ep0_read_register(ucr, SD_BUS_STAT, &val); 97 dev_dbg(sdmmc_dev(host), "SD_BUS_STAT: 0x%x\n", val); 98 } 99 #else 100 #define sd_print_debug_regs(host) 101 #endif /* DEBUG */ 102 103 static int sd_read_data(struct rtsx_usb_sdmmc *host, struct mmc_command *cmd, 104 u16 byte_cnt, u8 *buf, int buf_len, int timeout) 105 { 106 struct rtsx_ucr *ucr = host->ucr; 107 int err; 108 u8 trans_mode; 109 110 if (!buf) 111 buf_len = 0; 112 113 rtsx_usb_init_cmd(ucr); 114 if (cmd != NULL) { 115 dev_dbg(sdmmc_dev(host), "%s: SD/MMC CMD%d\n", __func__ 116 , cmd->opcode); 117 if (cmd->opcode == MMC_SEND_TUNING_BLOCK) 118 trans_mode = SD_TM_AUTO_TUNING; 119 else 120 trans_mode = SD_TM_NORMAL_READ; 121 122 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, 123 SD_CMD0, 0xFF, (u8)(cmd->opcode) | 0x40); 124 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, 125 SD_CMD1, 0xFF, (u8)(cmd->arg >> 24)); 126 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, 127 SD_CMD2, 0xFF, (u8)(cmd->arg >> 16)); 128 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, 129 SD_CMD3, 0xFF, (u8)(cmd->arg >> 8)); 130 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, 131 SD_CMD4, 0xFF, (u8)cmd->arg); 132 } else { 133 trans_mode = SD_TM_AUTO_READ_3; 134 } 135 136 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BYTE_CNT_L, 0xFF, (u8)byte_cnt); 137 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BYTE_CNT_H, 138 0xFF, (u8)(byte_cnt >> 8)); 139 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BLOCK_CNT_L, 0xFF, 1); 140 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BLOCK_CNT_H, 0xFF, 0); 141 142 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CFG2, 0xFF, 143 SD_CALCULATE_CRC7 | SD_CHECK_CRC16 | 144 SD_NO_WAIT_BUSY_END | SD_CHECK_CRC7 | SD_RSP_LEN_6); 145 if (trans_mode != SD_TM_AUTO_TUNING) 146 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, 147 CARD_DATA_SOURCE, 0x01, PINGPONG_BUFFER); 148 149 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_TRANSFER, 150 0xFF, trans_mode | SD_TRANSFER_START); 151 rtsx_usb_add_cmd(ucr, CHECK_REG_CMD, SD_TRANSFER, 152 SD_TRANSFER_END, SD_TRANSFER_END); 153 154 if (cmd != NULL) { 155 rtsx_usb_add_cmd(ucr, READ_REG_CMD, SD_CMD1, 0, 0); 156 rtsx_usb_add_cmd(ucr, READ_REG_CMD, SD_CMD2, 0, 0); 157 rtsx_usb_add_cmd(ucr, READ_REG_CMD, SD_CMD3, 0, 0); 158 rtsx_usb_add_cmd(ucr, READ_REG_CMD, SD_CMD4, 0, 0); 159 } 160 161 err = rtsx_usb_send_cmd(ucr, MODE_CR, timeout); 162 if (err) { 163 dev_dbg(sdmmc_dev(host), 164 "rtsx_usb_send_cmd failed (err = %d)\n", err); 165 return err; 166 } 167 168 err = rtsx_usb_get_rsp(ucr, !cmd ? 1 : 5, timeout); 169 if (err || (ucr->rsp_buf[0] & SD_TRANSFER_ERR)) { 170 sd_print_debug_regs(host); 171 172 if (!err) { 173 dev_dbg(sdmmc_dev(host), 174 "Transfer failed (SD_TRANSFER = %02x)\n", 175 ucr->rsp_buf[0]); 176 err = -EIO; 177 } else { 178 dev_dbg(sdmmc_dev(host), 179 "rtsx_usb_get_rsp failed (err = %d)\n", err); 180 } 181 182 return err; 183 } 184 185 if (cmd != NULL) { 186 cmd->resp[0] = get_unaligned_be32(ucr->rsp_buf + 1); 187 dev_dbg(sdmmc_dev(host), "cmd->resp[0] = 0x%08x\n", 188 cmd->resp[0]); 189 } 190 191 if (buf && buf_len) { 192 /* 2-byte aligned part */ 193 err = rtsx_usb_read_ppbuf(ucr, buf, byte_cnt - (byte_cnt % 2)); 194 if (err) { 195 dev_dbg(sdmmc_dev(host), 196 "rtsx_usb_read_ppbuf failed (err = %d)\n", err); 197 return err; 198 } 199 200 /* unaligned byte */ 201 if (byte_cnt % 2) 202 return rtsx_usb_read_register(ucr, 203 PPBUF_BASE2 + byte_cnt, 204 buf + byte_cnt - 1); 205 } 206 207 return 0; 208 } 209 210 static int sd_write_data(struct rtsx_usb_sdmmc *host, struct mmc_command *cmd, 211 u16 byte_cnt, u8 *buf, int buf_len, int timeout) 212 { 213 struct rtsx_ucr *ucr = host->ucr; 214 int err; 215 u8 trans_mode; 216 217 if (!buf) 218 buf_len = 0; 219 220 if (buf && buf_len) { 221 err = rtsx_usb_write_ppbuf(ucr, buf, buf_len); 222 if (err) { 223 dev_dbg(sdmmc_dev(host), 224 "rtsx_usb_write_ppbuf failed (err = %d)\n", 225 err); 226 return err; 227 } 228 } 229 230 trans_mode = (cmd != NULL) ? SD_TM_AUTO_WRITE_2 : SD_TM_AUTO_WRITE_3; 231 rtsx_usb_init_cmd(ucr); 232 233 if (cmd != NULL) { 234 dev_dbg(sdmmc_dev(host), "%s: SD/MMC CMD%d\n", __func__, 235 cmd->opcode); 236 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, 237 SD_CMD0, 0xFF, (u8)(cmd->opcode) | 0x40); 238 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, 239 SD_CMD1, 0xFF, (u8)(cmd->arg >> 24)); 240 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, 241 SD_CMD2, 0xFF, (u8)(cmd->arg >> 16)); 242 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, 243 SD_CMD3, 0xFF, (u8)(cmd->arg >> 8)); 244 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, 245 SD_CMD4, 0xFF, (u8)cmd->arg); 246 } 247 248 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BYTE_CNT_L, 0xFF, (u8)byte_cnt); 249 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BYTE_CNT_H, 250 0xFF, (u8)(byte_cnt >> 8)); 251 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BLOCK_CNT_L, 0xFF, 1); 252 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BLOCK_CNT_H, 0xFF, 0); 253 254 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CFG2, 0xFF, 255 SD_CALCULATE_CRC7 | SD_CHECK_CRC16 | 256 SD_NO_WAIT_BUSY_END | SD_CHECK_CRC7 | SD_RSP_LEN_6); 257 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, 258 CARD_DATA_SOURCE, 0x01, PINGPONG_BUFFER); 259 260 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_TRANSFER, 0xFF, 261 trans_mode | SD_TRANSFER_START); 262 rtsx_usb_add_cmd(ucr, CHECK_REG_CMD, SD_TRANSFER, 263 SD_TRANSFER_END, SD_TRANSFER_END); 264 265 if (cmd != NULL) { 266 rtsx_usb_add_cmd(ucr, READ_REG_CMD, SD_CMD1, 0, 0); 267 rtsx_usb_add_cmd(ucr, READ_REG_CMD, SD_CMD2, 0, 0); 268 rtsx_usb_add_cmd(ucr, READ_REG_CMD, SD_CMD3, 0, 0); 269 rtsx_usb_add_cmd(ucr, READ_REG_CMD, SD_CMD4, 0, 0); 270 } 271 272 err = rtsx_usb_send_cmd(ucr, MODE_CR, timeout); 273 if (err) { 274 dev_dbg(sdmmc_dev(host), 275 "rtsx_usb_send_cmd failed (err = %d)\n", err); 276 return err; 277 } 278 279 err = rtsx_usb_get_rsp(ucr, !cmd ? 1 : 5, timeout); 280 if (err) { 281 sd_print_debug_regs(host); 282 dev_dbg(sdmmc_dev(host), 283 "rtsx_usb_get_rsp failed (err = %d)\n", err); 284 return err; 285 } 286 287 if (cmd != NULL) { 288 cmd->resp[0] = get_unaligned_be32(ucr->rsp_buf + 1); 289 dev_dbg(sdmmc_dev(host), "cmd->resp[0] = 0x%08x\n", 290 cmd->resp[0]); 291 } 292 293 return 0; 294 } 295 296 static void sd_send_cmd_get_rsp(struct rtsx_usb_sdmmc *host, 297 struct mmc_command *cmd) 298 { 299 struct rtsx_ucr *ucr = host->ucr; 300 u8 cmd_idx = (u8)cmd->opcode; 301 u32 arg = cmd->arg; 302 int err = 0; 303 int timeout = 100; 304 int i; 305 u8 *ptr; 306 int stat_idx = 0; 307 int len = 2; 308 u8 rsp_type; 309 310 dev_dbg(sdmmc_dev(host), "%s: SD/MMC CMD %d, arg = 0x%08x\n", 311 __func__, cmd_idx, arg); 312 313 /* Response type: 314 * R0 315 * R1, R5, R6, R7 316 * R1b 317 * R2 318 * R3, R4 319 */ 320 switch (mmc_resp_type(cmd)) { 321 case MMC_RSP_NONE: 322 rsp_type = SD_RSP_TYPE_R0; 323 break; 324 case MMC_RSP_R1: 325 rsp_type = SD_RSP_TYPE_R1; 326 break; 327 case MMC_RSP_R1 & ~MMC_RSP_CRC: 328 rsp_type = SD_RSP_TYPE_R1 | SD_NO_CHECK_CRC7; 329 break; 330 case MMC_RSP_R1B: 331 rsp_type = SD_RSP_TYPE_R1b; 332 break; 333 case MMC_RSP_R2: 334 rsp_type = SD_RSP_TYPE_R2; 335 break; 336 case MMC_RSP_R3: 337 rsp_type = SD_RSP_TYPE_R3; 338 break; 339 default: 340 dev_dbg(sdmmc_dev(host), "cmd->flag is not valid\n"); 341 err = -EINVAL; 342 goto out; 343 } 344 345 if (rsp_type == SD_RSP_TYPE_R1b) 346 timeout = 3000; 347 348 if (cmd->opcode == SD_SWITCH_VOLTAGE) { 349 err = rtsx_usb_write_register(ucr, SD_BUS_STAT, 350 SD_CLK_TOGGLE_EN | SD_CLK_FORCE_STOP, 351 SD_CLK_TOGGLE_EN); 352 if (err) 353 goto out; 354 } 355 356 rtsx_usb_init_cmd(ucr); 357 358 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CMD0, 0xFF, 0x40 | cmd_idx); 359 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CMD1, 0xFF, (u8)(arg >> 24)); 360 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CMD2, 0xFF, (u8)(arg >> 16)); 361 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CMD3, 0xFF, (u8)(arg >> 8)); 362 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CMD4, 0xFF, (u8)arg); 363 364 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CFG2, 0xFF, rsp_type); 365 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_DATA_SOURCE, 366 0x01, PINGPONG_BUFFER); 367 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_TRANSFER, 368 0xFF, SD_TM_CMD_RSP | SD_TRANSFER_START); 369 rtsx_usb_add_cmd(ucr, CHECK_REG_CMD, SD_TRANSFER, 370 SD_TRANSFER_END | SD_STAT_IDLE, 371 SD_TRANSFER_END | SD_STAT_IDLE); 372 373 if (rsp_type == SD_RSP_TYPE_R2) { 374 /* Read data from ping-pong buffer */ 375 for (i = PPBUF_BASE2; i < PPBUF_BASE2 + 16; i++) 376 rtsx_usb_add_cmd(ucr, READ_REG_CMD, (u16)i, 0, 0); 377 stat_idx = 16; 378 } else if (rsp_type != SD_RSP_TYPE_R0) { 379 /* Read data from SD_CMDx registers */ 380 for (i = SD_CMD0; i <= SD_CMD4; i++) 381 rtsx_usb_add_cmd(ucr, READ_REG_CMD, (u16)i, 0, 0); 382 stat_idx = 5; 383 } 384 len += stat_idx; 385 386 rtsx_usb_add_cmd(ucr, READ_REG_CMD, SD_STAT1, 0, 0); 387 388 err = rtsx_usb_send_cmd(ucr, MODE_CR, 100); 389 if (err) { 390 dev_dbg(sdmmc_dev(host), 391 "rtsx_usb_send_cmd error (err = %d)\n", err); 392 goto out; 393 } 394 395 err = rtsx_usb_get_rsp(ucr, len, timeout); 396 if (err || (ucr->rsp_buf[0] & SD_TRANSFER_ERR)) { 397 sd_print_debug_regs(host); 398 sd_clear_error(host); 399 400 if (!err) { 401 dev_dbg(sdmmc_dev(host), 402 "Transfer failed (SD_TRANSFER = %02x)\n", 403 ucr->rsp_buf[0]); 404 err = -EIO; 405 } else { 406 dev_dbg(sdmmc_dev(host), 407 "rtsx_usb_get_rsp failed (err = %d)\n", err); 408 } 409 410 goto out; 411 } 412 413 if (rsp_type == SD_RSP_TYPE_R0) { 414 err = 0; 415 goto out; 416 } 417 418 /* Skip result of CHECK_REG_CMD */ 419 ptr = ucr->rsp_buf + 1; 420 421 /* Check (Start,Transmission) bit of Response */ 422 if ((ptr[0] & 0xC0) != 0) { 423 err = -EILSEQ; 424 dev_dbg(sdmmc_dev(host), "Invalid response bit\n"); 425 goto out; 426 } 427 428 /* Check CRC7 */ 429 if (!(rsp_type & SD_NO_CHECK_CRC7)) { 430 if (ptr[stat_idx] & SD_CRC7_ERR) { 431 err = -EILSEQ; 432 dev_dbg(sdmmc_dev(host), "CRC7 error\n"); 433 goto out; 434 } 435 } 436 437 if (rsp_type == SD_RSP_TYPE_R2) { 438 for (i = 0; i < 4; i++) { 439 cmd->resp[i] = get_unaligned_be32(ptr + 1 + i * 4); 440 dev_dbg(sdmmc_dev(host), "cmd->resp[%d] = 0x%08x\n", 441 i, cmd->resp[i]); 442 } 443 } else { 444 cmd->resp[0] = get_unaligned_be32(ptr + 1); 445 dev_dbg(sdmmc_dev(host), "cmd->resp[0] = 0x%08x\n", 446 cmd->resp[0]); 447 } 448 449 out: 450 cmd->error = err; 451 } 452 453 static int sd_rw_multi(struct rtsx_usb_sdmmc *host, struct mmc_request *mrq) 454 { 455 struct rtsx_ucr *ucr = host->ucr; 456 struct mmc_data *data = mrq->data; 457 int read = (data->flags & MMC_DATA_READ) ? 1 : 0; 458 u8 cfg2, trans_mode; 459 int err; 460 u8 flag; 461 size_t data_len = data->blksz * data->blocks; 462 unsigned int pipe; 463 464 if (read) { 465 dev_dbg(sdmmc_dev(host), "%s: read %zu bytes\n", 466 __func__, data_len); 467 cfg2 = SD_CALCULATE_CRC7 | SD_CHECK_CRC16 | 468 SD_NO_WAIT_BUSY_END | SD_CHECK_CRC7 | SD_RSP_LEN_0; 469 trans_mode = SD_TM_AUTO_READ_3; 470 } else { 471 dev_dbg(sdmmc_dev(host), "%s: write %zu bytes\n", 472 __func__, data_len); 473 cfg2 = SD_NO_CALCULATE_CRC7 | SD_CHECK_CRC16 | 474 SD_NO_WAIT_BUSY_END | SD_NO_CHECK_CRC7 | SD_RSP_LEN_0; 475 trans_mode = SD_TM_AUTO_WRITE_3; 476 } 477 478 rtsx_usb_init_cmd(ucr); 479 480 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BYTE_CNT_L, 0xFF, 0x00); 481 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BYTE_CNT_H, 0xFF, 0x02); 482 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BLOCK_CNT_L, 483 0xFF, (u8)data->blocks); 484 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BLOCK_CNT_H, 485 0xFF, (u8)(data->blocks >> 8)); 486 487 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_DATA_SOURCE, 488 0x01, RING_BUFFER); 489 490 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, MC_DMA_TC3, 491 0xFF, (u8)(data_len >> 24)); 492 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, MC_DMA_TC2, 493 0xFF, (u8)(data_len >> 16)); 494 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, MC_DMA_TC1, 495 0xFF, (u8)(data_len >> 8)); 496 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, MC_DMA_TC0, 497 0xFF, (u8)data_len); 498 if (read) { 499 flag = MODE_CDIR; 500 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, MC_DMA_CTL, 501 0x03 | DMA_PACK_SIZE_MASK, 502 DMA_DIR_FROM_CARD | DMA_EN | DMA_512); 503 } else { 504 flag = MODE_CDOR; 505 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, MC_DMA_CTL, 506 0x03 | DMA_PACK_SIZE_MASK, 507 DMA_DIR_TO_CARD | DMA_EN | DMA_512); 508 } 509 510 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CFG2, 0xFF, cfg2); 511 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_TRANSFER, 0xFF, 512 trans_mode | SD_TRANSFER_START); 513 rtsx_usb_add_cmd(ucr, CHECK_REG_CMD, SD_TRANSFER, 514 SD_TRANSFER_END, SD_TRANSFER_END); 515 516 err = rtsx_usb_send_cmd(ucr, flag, 100); 517 if (err) 518 return err; 519 520 if (read) 521 pipe = usb_rcvbulkpipe(ucr->pusb_dev, EP_BULK_IN); 522 else 523 pipe = usb_sndbulkpipe(ucr->pusb_dev, EP_BULK_OUT); 524 525 err = rtsx_usb_transfer_data(ucr, pipe, data->sg, data_len, 526 data->sg_len, NULL, 10000); 527 if (err) { 528 dev_dbg(sdmmc_dev(host), "rtsx_usb_transfer_data error %d\n" 529 , err); 530 sd_clear_error(host); 531 return err; 532 } 533 534 return rtsx_usb_get_rsp(ucr, 1, 2000); 535 } 536 537 static inline void sd_enable_initial_mode(struct rtsx_usb_sdmmc *host) 538 { 539 rtsx_usb_write_register(host->ucr, SD_CFG1, 540 SD_CLK_DIVIDE_MASK, SD_CLK_DIVIDE_128); 541 } 542 543 static inline void sd_disable_initial_mode(struct rtsx_usb_sdmmc *host) 544 { 545 rtsx_usb_write_register(host->ucr, SD_CFG1, 546 SD_CLK_DIVIDE_MASK, SD_CLK_DIVIDE_0); 547 } 548 549 static void sd_normal_rw(struct rtsx_usb_sdmmc *host, 550 struct mmc_request *mrq) 551 { 552 struct mmc_command *cmd = mrq->cmd; 553 struct mmc_data *data = mrq->data; 554 u8 *buf; 555 556 buf = kzalloc(data->blksz, GFP_NOIO); 557 if (!buf) { 558 cmd->error = -ENOMEM; 559 return; 560 } 561 562 if (data->flags & MMC_DATA_READ) { 563 if (host->initial_mode) 564 sd_disable_initial_mode(host); 565 566 cmd->error = sd_read_data(host, cmd, (u16)data->blksz, buf, 567 data->blksz, 200); 568 569 if (host->initial_mode) 570 sd_enable_initial_mode(host); 571 572 sg_copy_from_buffer(data->sg, data->sg_len, buf, data->blksz); 573 } else { 574 sg_copy_to_buffer(data->sg, data->sg_len, buf, data->blksz); 575 576 cmd->error = sd_write_data(host, cmd, (u16)data->blksz, buf, 577 data->blksz, 200); 578 } 579 580 kfree(buf); 581 } 582 583 static int sd_change_phase(struct rtsx_usb_sdmmc *host, u8 sample_point, int tx) 584 { 585 struct rtsx_ucr *ucr = host->ucr; 586 int err; 587 588 dev_dbg(sdmmc_dev(host), "%s: %s sample_point = %d\n", 589 __func__, tx ? "TX" : "RX", sample_point); 590 591 rtsx_usb_init_cmd(ucr); 592 593 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CLK_DIV, CLK_CHANGE, CLK_CHANGE); 594 595 if (tx) 596 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_VPCLK0_CTL, 597 0x0F, sample_point); 598 else 599 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_VPCLK1_CTL, 600 0x0F, sample_point); 601 602 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_VPCLK0_CTL, PHASE_NOT_RESET, 0); 603 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_VPCLK0_CTL, 604 PHASE_NOT_RESET, PHASE_NOT_RESET); 605 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CLK_DIV, CLK_CHANGE, 0); 606 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CFG1, SD_ASYNC_FIFO_RST, 0); 607 608 err = rtsx_usb_send_cmd(ucr, MODE_C, 100); 609 if (err) 610 return err; 611 612 return 0; 613 } 614 615 static inline u32 get_phase_point(u32 phase_map, unsigned int idx) 616 { 617 idx &= MAX_PHASE; 618 return phase_map & (1 << idx); 619 } 620 621 static int get_phase_len(u32 phase_map, unsigned int idx) 622 { 623 int i; 624 625 for (i = 0; i < MAX_PHASE + 1; i++) { 626 if (get_phase_point(phase_map, idx + i) == 0) 627 return i; 628 } 629 return MAX_PHASE + 1; 630 } 631 632 static u8 sd_search_final_phase(struct rtsx_usb_sdmmc *host, u32 phase_map) 633 { 634 int start = 0, len = 0; 635 int start_final = 0, len_final = 0; 636 u8 final_phase = 0xFF; 637 638 if (phase_map == 0) { 639 dev_dbg(sdmmc_dev(host), "Phase: [map:%x]\n", phase_map); 640 return final_phase; 641 } 642 643 while (start < MAX_PHASE + 1) { 644 len = get_phase_len(phase_map, start); 645 if (len_final < len) { 646 start_final = start; 647 len_final = len; 648 } 649 start += len ? len : 1; 650 } 651 652 final_phase = (start_final + len_final / 2) & MAX_PHASE; 653 dev_dbg(sdmmc_dev(host), "Phase: [map:%x] [maxlen:%d] [final:%d]\n", 654 phase_map, len_final, final_phase); 655 656 return final_phase; 657 } 658 659 static void sd_wait_data_idle(struct rtsx_usb_sdmmc *host) 660 { 661 int err, i; 662 u8 val = 0; 663 664 for (i = 0; i < 100; i++) { 665 err = rtsx_usb_ep0_read_register(host->ucr, 666 SD_DATA_STATE, &val); 667 if (val & SD_DATA_IDLE) 668 return; 669 670 usleep_range(100, 1000); 671 } 672 } 673 674 static int sd_tuning_rx_cmd(struct rtsx_usb_sdmmc *host, 675 u8 opcode, u8 sample_point) 676 { 677 int err; 678 struct mmc_command cmd = {0}; 679 680 err = sd_change_phase(host, sample_point, 0); 681 if (err) 682 return err; 683 684 cmd.opcode = MMC_SEND_TUNING_BLOCK; 685 err = sd_read_data(host, &cmd, 0x40, NULL, 0, 100); 686 if (err) { 687 /* Wait till SD DATA IDLE */ 688 sd_wait_data_idle(host); 689 sd_clear_error(host); 690 return err; 691 } 692 693 return 0; 694 } 695 696 static void sd_tuning_phase(struct rtsx_usb_sdmmc *host, 697 u8 opcode, u16 *phase_map) 698 { 699 int err, i; 700 u16 raw_phase_map = 0; 701 702 for (i = MAX_PHASE; i >= 0; i--) { 703 err = sd_tuning_rx_cmd(host, opcode, (u8)i); 704 if (!err) 705 raw_phase_map |= 1 << i; 706 } 707 708 if (phase_map) 709 *phase_map = raw_phase_map; 710 } 711 712 static int sd_tuning_rx(struct rtsx_usb_sdmmc *host, u8 opcode) 713 { 714 int err, i; 715 u16 raw_phase_map[RX_TUNING_CNT] = {0}, phase_map; 716 u8 final_phase; 717 718 /* setting fixed default TX phase */ 719 err = sd_change_phase(host, 0x01, 1); 720 if (err) { 721 dev_dbg(sdmmc_dev(host), "TX phase setting failed\n"); 722 return err; 723 } 724 725 /* tuning RX phase */ 726 for (i = 0; i < RX_TUNING_CNT; i++) { 727 sd_tuning_phase(host, opcode, &(raw_phase_map[i])); 728 729 if (raw_phase_map[i] == 0) 730 break; 731 } 732 733 phase_map = 0xFFFF; 734 for (i = 0; i < RX_TUNING_CNT; i++) { 735 dev_dbg(sdmmc_dev(host), "RX raw_phase_map[%d] = 0x%04x\n", 736 i, raw_phase_map[i]); 737 phase_map &= raw_phase_map[i]; 738 } 739 dev_dbg(sdmmc_dev(host), "RX phase_map = 0x%04x\n", phase_map); 740 741 if (phase_map) { 742 final_phase = sd_search_final_phase(host, phase_map); 743 if (final_phase == 0xFF) 744 return -EINVAL; 745 746 err = sd_change_phase(host, final_phase, 0); 747 if (err) 748 return err; 749 } else { 750 return -EINVAL; 751 } 752 753 return 0; 754 } 755 756 static int sdmmc_get_ro(struct mmc_host *mmc) 757 { 758 struct rtsx_usb_sdmmc *host = mmc_priv(mmc); 759 struct rtsx_ucr *ucr = host->ucr; 760 int err; 761 u16 val; 762 763 if (host->host_removal) 764 return -ENOMEDIUM; 765 766 mutex_lock(&ucr->dev_mutex); 767 768 /* Check SD card detect */ 769 err = rtsx_usb_get_card_status(ucr, &val); 770 771 mutex_unlock(&ucr->dev_mutex); 772 773 774 /* Treat failed detection as non-ro */ 775 if (err) 776 return 0; 777 778 if (val & SD_WP) 779 return 1; 780 781 return 0; 782 } 783 784 static int sdmmc_get_cd(struct mmc_host *mmc) 785 { 786 struct rtsx_usb_sdmmc *host = mmc_priv(mmc); 787 struct rtsx_ucr *ucr = host->ucr; 788 int err; 789 u16 val; 790 791 if (host->host_removal) 792 return -ENOMEDIUM; 793 794 mutex_lock(&ucr->dev_mutex); 795 796 /* Check SD card detect */ 797 err = rtsx_usb_get_card_status(ucr, &val); 798 799 mutex_unlock(&ucr->dev_mutex); 800 801 /* Treat failed detection as non-exist */ 802 if (err) 803 goto no_card; 804 805 if (val & SD_CD) { 806 host->card_exist = true; 807 return 1; 808 } 809 810 no_card: 811 host->card_exist = false; 812 return 0; 813 } 814 815 static void sdmmc_request(struct mmc_host *mmc, struct mmc_request *mrq) 816 { 817 struct rtsx_usb_sdmmc *host = mmc_priv(mmc); 818 struct rtsx_ucr *ucr = host->ucr; 819 struct mmc_command *cmd = mrq->cmd; 820 struct mmc_data *data = mrq->data; 821 unsigned int data_size = 0; 822 823 dev_dbg(sdmmc_dev(host), "%s\n", __func__); 824 825 if (host->host_removal) { 826 cmd->error = -ENOMEDIUM; 827 goto finish; 828 } 829 830 if ((!host->card_exist)) { 831 cmd->error = -ENOMEDIUM; 832 goto finish_detect_card; 833 } 834 835 /* 836 * Reject SDIO CMDs to speed up card identification 837 * since unsupported 838 */ 839 if (cmd->opcode == SD_IO_SEND_OP_COND || 840 cmd->opcode == SD_IO_RW_DIRECT || 841 cmd->opcode == SD_IO_RW_EXTENDED) { 842 cmd->error = -EINVAL; 843 goto finish; 844 } 845 846 mutex_lock(&ucr->dev_mutex); 847 848 mutex_lock(&host->host_mutex); 849 host->mrq = mrq; 850 mutex_unlock(&host->host_mutex); 851 852 if (mrq->data) 853 data_size = data->blocks * data->blksz; 854 855 if (!data_size) { 856 sd_send_cmd_get_rsp(host, cmd); 857 } else if ((!(data_size % 512) && cmd->opcode != MMC_SEND_EXT_CSD) || 858 mmc_op_multi(cmd->opcode)) { 859 sd_send_cmd_get_rsp(host, cmd); 860 861 if (!cmd->error) { 862 sd_rw_multi(host, mrq); 863 864 if (mmc_op_multi(cmd->opcode) && mrq->stop) { 865 sd_send_cmd_get_rsp(host, mrq->stop); 866 rtsx_usb_write_register(ucr, MC_FIFO_CTL, 867 FIFO_FLUSH, FIFO_FLUSH); 868 } 869 } 870 } else { 871 sd_normal_rw(host, mrq); 872 } 873 874 if (mrq->data) { 875 if (cmd->error || data->error) 876 data->bytes_xfered = 0; 877 else 878 data->bytes_xfered = data->blocks * data->blksz; 879 } 880 881 mutex_unlock(&ucr->dev_mutex); 882 883 finish_detect_card: 884 if (cmd->error) { 885 /* 886 * detect card when fail to update card existence state and 887 * speed up card removal when retry 888 */ 889 sdmmc_get_cd(mmc); 890 dev_dbg(sdmmc_dev(host), "cmd->error = %d\n", cmd->error); 891 } 892 893 finish: 894 mutex_lock(&host->host_mutex); 895 host->mrq = NULL; 896 mutex_unlock(&host->host_mutex); 897 898 mmc_request_done(mmc, mrq); 899 } 900 901 static int sd_set_bus_width(struct rtsx_usb_sdmmc *host, 902 unsigned char bus_width) 903 { 904 int err = 0; 905 u8 width[] = { 906 [MMC_BUS_WIDTH_1] = SD_BUS_WIDTH_1BIT, 907 [MMC_BUS_WIDTH_4] = SD_BUS_WIDTH_4BIT, 908 [MMC_BUS_WIDTH_8] = SD_BUS_WIDTH_8BIT, 909 }; 910 911 if (bus_width <= MMC_BUS_WIDTH_8) 912 err = rtsx_usb_write_register(host->ucr, SD_CFG1, 913 0x03, width[bus_width]); 914 915 return err; 916 } 917 918 static int sd_pull_ctl_disable_lqfp48(struct rtsx_ucr *ucr) 919 { 920 rtsx_usb_init_cmd(ucr); 921 922 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL1, 0xFF, 0x55); 923 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL2, 0xFF, 0x55); 924 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL3, 0xFF, 0x95); 925 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL4, 0xFF, 0x55); 926 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL5, 0xFF, 0x55); 927 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL6, 0xFF, 0xA5); 928 929 return rtsx_usb_send_cmd(ucr, MODE_C, 100); 930 } 931 932 static int sd_pull_ctl_disable_qfn24(struct rtsx_ucr *ucr) 933 { 934 rtsx_usb_init_cmd(ucr); 935 936 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL1, 0xFF, 0x65); 937 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL2, 0xFF, 0x55); 938 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL3, 0xFF, 0x95); 939 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL4, 0xFF, 0x55); 940 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL5, 0xFF, 0x56); 941 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL6, 0xFF, 0x59); 942 943 return rtsx_usb_send_cmd(ucr, MODE_C, 100); 944 } 945 946 static int sd_pull_ctl_enable_lqfp48(struct rtsx_ucr *ucr) 947 { 948 rtsx_usb_init_cmd(ucr); 949 950 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL1, 0xFF, 0xAA); 951 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL2, 0xFF, 0xAA); 952 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL3, 0xFF, 0xA9); 953 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL4, 0xFF, 0x55); 954 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL5, 0xFF, 0x55); 955 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL6, 0xFF, 0xA5); 956 957 return rtsx_usb_send_cmd(ucr, MODE_C, 100); 958 } 959 960 static int sd_pull_ctl_enable_qfn24(struct rtsx_ucr *ucr) 961 { 962 rtsx_usb_init_cmd(ucr); 963 964 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL1, 0xFF, 0xA5); 965 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL2, 0xFF, 0x9A); 966 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL3, 0xFF, 0xA5); 967 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL4, 0xFF, 0x9A); 968 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL5, 0xFF, 0x65); 969 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL6, 0xFF, 0x5A); 970 971 return rtsx_usb_send_cmd(ucr, MODE_C, 100); 972 } 973 974 static int sd_power_on(struct rtsx_usb_sdmmc *host) 975 { 976 struct rtsx_ucr *ucr = host->ucr; 977 int err; 978 979 dev_dbg(sdmmc_dev(host), "%s\n", __func__); 980 rtsx_usb_init_cmd(ucr); 981 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_SELECT, 0x07, SD_MOD_SEL); 982 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_SHARE_MODE, 983 CARD_SHARE_MASK, CARD_SHARE_SD); 984 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_CLK_EN, 985 SD_CLK_EN, SD_CLK_EN); 986 err = rtsx_usb_send_cmd(ucr, MODE_C, 100); 987 if (err) 988 return err; 989 990 if (CHECK_PKG(ucr, LQFP48)) 991 err = sd_pull_ctl_enable_lqfp48(ucr); 992 else 993 err = sd_pull_ctl_enable_qfn24(ucr); 994 if (err) 995 return err; 996 997 err = rtsx_usb_write_register(ucr, CARD_PWR_CTL, 998 POWER_MASK, PARTIAL_POWER_ON); 999 if (err) 1000 return err; 1001 1002 usleep_range(800, 1000); 1003 1004 rtsx_usb_init_cmd(ucr); 1005 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PWR_CTL, 1006 POWER_MASK|LDO3318_PWR_MASK, POWER_ON|LDO_ON); 1007 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_OE, 1008 SD_OUTPUT_EN, SD_OUTPUT_EN); 1009 1010 return rtsx_usb_send_cmd(ucr, MODE_C, 100); 1011 } 1012 1013 static int sd_power_off(struct rtsx_usb_sdmmc *host) 1014 { 1015 struct rtsx_ucr *ucr = host->ucr; 1016 int err; 1017 1018 dev_dbg(sdmmc_dev(host), "%s\n", __func__); 1019 rtsx_usb_init_cmd(ucr); 1020 1021 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_CLK_EN, SD_CLK_EN, 0); 1022 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_OE, SD_OUTPUT_EN, 0); 1023 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PWR_CTL, 1024 POWER_MASK, POWER_OFF); 1025 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PWR_CTL, 1026 POWER_MASK|LDO3318_PWR_MASK, POWER_OFF|LDO_SUSPEND); 1027 1028 err = rtsx_usb_send_cmd(ucr, MODE_C, 100); 1029 if (err) 1030 return err; 1031 1032 if (CHECK_PKG(ucr, LQFP48)) 1033 return sd_pull_ctl_disable_lqfp48(ucr); 1034 return sd_pull_ctl_disable_qfn24(ucr); 1035 } 1036 1037 static int sd_set_power_mode(struct rtsx_usb_sdmmc *host, 1038 unsigned char power_mode) 1039 { 1040 int err; 1041 1042 if (power_mode != MMC_POWER_OFF) 1043 power_mode = MMC_POWER_ON; 1044 1045 if (power_mode == host->power_mode) 1046 return 0; 1047 1048 if (power_mode == MMC_POWER_OFF) { 1049 err = sd_power_off(host); 1050 pm_runtime_put(sdmmc_dev(host)); 1051 } else { 1052 pm_runtime_get_sync(sdmmc_dev(host)); 1053 err = sd_power_on(host); 1054 } 1055 1056 if (!err) 1057 host->power_mode = power_mode; 1058 1059 return err; 1060 } 1061 1062 static int sd_set_timing(struct rtsx_usb_sdmmc *host, 1063 unsigned char timing, bool *ddr_mode) 1064 { 1065 struct rtsx_ucr *ucr = host->ucr; 1066 int err; 1067 1068 *ddr_mode = false; 1069 1070 rtsx_usb_init_cmd(ucr); 1071 1072 switch (timing) { 1073 case MMC_TIMING_UHS_SDR104: 1074 case MMC_TIMING_UHS_SDR50: 1075 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CFG1, 1076 0x0C | SD_ASYNC_FIFO_RST, 1077 SD_30_MODE | SD_ASYNC_FIFO_RST); 1078 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_CLK_SOURCE, 0xFF, 1079 CRC_VAR_CLK0 | SD30_FIX_CLK | SAMPLE_VAR_CLK1); 1080 break; 1081 1082 case MMC_TIMING_UHS_DDR50: 1083 *ddr_mode = true; 1084 1085 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CFG1, 1086 0x0C | SD_ASYNC_FIFO_RST, 1087 SD_DDR_MODE | SD_ASYNC_FIFO_RST); 1088 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_CLK_SOURCE, 0xFF, 1089 CRC_VAR_CLK0 | SD30_FIX_CLK | SAMPLE_VAR_CLK1); 1090 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_PUSH_POINT_CTL, 1091 DDR_VAR_TX_CMD_DAT, DDR_VAR_TX_CMD_DAT); 1092 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_SAMPLE_POINT_CTL, 1093 DDR_VAR_RX_DAT | DDR_VAR_RX_CMD, 1094 DDR_VAR_RX_DAT | DDR_VAR_RX_CMD); 1095 break; 1096 1097 case MMC_TIMING_MMC_HS: 1098 case MMC_TIMING_SD_HS: 1099 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CFG1, 1100 0x0C, SD_20_MODE); 1101 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_CLK_SOURCE, 0xFF, 1102 CRC_FIX_CLK | SD30_VAR_CLK0 | SAMPLE_VAR_CLK1); 1103 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_PUSH_POINT_CTL, 1104 SD20_TX_SEL_MASK, SD20_TX_14_AHEAD); 1105 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_SAMPLE_POINT_CTL, 1106 SD20_RX_SEL_MASK, SD20_RX_14_DELAY); 1107 break; 1108 1109 default: 1110 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, 1111 SD_CFG1, 0x0C, SD_20_MODE); 1112 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_CLK_SOURCE, 0xFF, 1113 CRC_FIX_CLK | SD30_VAR_CLK0 | SAMPLE_VAR_CLK1); 1114 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, 1115 SD_PUSH_POINT_CTL, 0xFF, 0); 1116 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_SAMPLE_POINT_CTL, 1117 SD20_RX_SEL_MASK, SD20_RX_POS_EDGE); 1118 break; 1119 } 1120 1121 err = rtsx_usb_send_cmd(ucr, MODE_C, 100); 1122 1123 return err; 1124 } 1125 1126 static void sdmmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) 1127 { 1128 struct rtsx_usb_sdmmc *host = mmc_priv(mmc); 1129 struct rtsx_ucr *ucr = host->ucr; 1130 1131 dev_dbg(sdmmc_dev(host), "%s\n", __func__); 1132 mutex_lock(&ucr->dev_mutex); 1133 1134 if (rtsx_usb_card_exclusive_check(ucr, RTSX_USB_SD_CARD)) { 1135 mutex_unlock(&ucr->dev_mutex); 1136 return; 1137 } 1138 1139 sd_set_power_mode(host, ios->power_mode); 1140 sd_set_bus_width(host, ios->bus_width); 1141 sd_set_timing(host, ios->timing, &host->ddr_mode); 1142 1143 host->vpclk = false; 1144 host->double_clk = true; 1145 1146 switch (ios->timing) { 1147 case MMC_TIMING_UHS_SDR104: 1148 case MMC_TIMING_UHS_SDR50: 1149 host->ssc_depth = SSC_DEPTH_2M; 1150 host->vpclk = true; 1151 host->double_clk = false; 1152 break; 1153 case MMC_TIMING_UHS_DDR50: 1154 case MMC_TIMING_UHS_SDR25: 1155 host->ssc_depth = SSC_DEPTH_1M; 1156 break; 1157 default: 1158 host->ssc_depth = SSC_DEPTH_512K; 1159 break; 1160 } 1161 1162 host->initial_mode = (ios->clock <= 1000000) ? true : false; 1163 host->clock = ios->clock; 1164 1165 rtsx_usb_switch_clock(host->ucr, host->clock, host->ssc_depth, 1166 host->initial_mode, host->double_clk, host->vpclk); 1167 1168 mutex_unlock(&ucr->dev_mutex); 1169 dev_dbg(sdmmc_dev(host), "%s end\n", __func__); 1170 } 1171 1172 static int sdmmc_switch_voltage(struct mmc_host *mmc, struct mmc_ios *ios) 1173 { 1174 struct rtsx_usb_sdmmc *host = mmc_priv(mmc); 1175 struct rtsx_ucr *ucr = host->ucr; 1176 int err = 0; 1177 1178 dev_dbg(sdmmc_dev(host), "%s: signal_voltage = %d\n", 1179 __func__, ios->signal_voltage); 1180 1181 if (host->host_removal) 1182 return -ENOMEDIUM; 1183 1184 if (ios->signal_voltage == MMC_SIGNAL_VOLTAGE_120) 1185 return -EPERM; 1186 1187 mutex_lock(&ucr->dev_mutex); 1188 1189 err = rtsx_usb_card_exclusive_check(ucr, RTSX_USB_SD_CARD); 1190 if (err) { 1191 mutex_unlock(&ucr->dev_mutex); 1192 return err; 1193 } 1194 1195 /* Let mmc core do the busy checking, simply stop the forced-toggle 1196 * clock(while issuing CMD11) and switch voltage. 1197 */ 1198 rtsx_usb_init_cmd(ucr); 1199 1200 if (ios->signal_voltage == MMC_SIGNAL_VOLTAGE_330) { 1201 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_PAD_CTL, 1202 SD_IO_USING_1V8, SD_IO_USING_3V3); 1203 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, LDO_POWER_CFG, 1204 TUNE_SD18_MASK, TUNE_SD18_3V3); 1205 } else { 1206 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BUS_STAT, 1207 SD_CLK_TOGGLE_EN | SD_CLK_FORCE_STOP, 1208 SD_CLK_FORCE_STOP); 1209 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_PAD_CTL, 1210 SD_IO_USING_1V8, SD_IO_USING_1V8); 1211 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, LDO_POWER_CFG, 1212 TUNE_SD18_MASK, TUNE_SD18_1V8); 1213 } 1214 1215 err = rtsx_usb_send_cmd(ucr, MODE_C, 100); 1216 mutex_unlock(&ucr->dev_mutex); 1217 1218 return err; 1219 } 1220 1221 static int sdmmc_card_busy(struct mmc_host *mmc) 1222 { 1223 struct rtsx_usb_sdmmc *host = mmc_priv(mmc); 1224 struct rtsx_ucr *ucr = host->ucr; 1225 int err; 1226 u8 stat; 1227 u8 mask = SD_DAT3_STATUS | SD_DAT2_STATUS | SD_DAT1_STATUS 1228 | SD_DAT0_STATUS; 1229 1230 dev_dbg(sdmmc_dev(host), "%s\n", __func__); 1231 1232 mutex_lock(&ucr->dev_mutex); 1233 1234 err = rtsx_usb_write_register(ucr, SD_BUS_STAT, 1235 SD_CLK_TOGGLE_EN | SD_CLK_FORCE_STOP, 1236 SD_CLK_TOGGLE_EN); 1237 if (err) 1238 goto out; 1239 1240 mdelay(1); 1241 1242 err = rtsx_usb_read_register(ucr, SD_BUS_STAT, &stat); 1243 if (err) 1244 goto out; 1245 1246 err = rtsx_usb_write_register(ucr, SD_BUS_STAT, 1247 SD_CLK_TOGGLE_EN | SD_CLK_FORCE_STOP, 0); 1248 out: 1249 mutex_unlock(&ucr->dev_mutex); 1250 1251 if (err) 1252 return err; 1253 1254 /* check if any pin between dat[0:3] is low */ 1255 if ((stat & mask) != mask) 1256 return 1; 1257 else 1258 return 0; 1259 } 1260 1261 static int sdmmc_execute_tuning(struct mmc_host *mmc, u32 opcode) 1262 { 1263 struct rtsx_usb_sdmmc *host = mmc_priv(mmc); 1264 struct rtsx_ucr *ucr = host->ucr; 1265 int err = 0; 1266 1267 if (host->host_removal) 1268 return -ENOMEDIUM; 1269 1270 mutex_lock(&ucr->dev_mutex); 1271 1272 if (!host->ddr_mode) 1273 err = sd_tuning_rx(host, MMC_SEND_TUNING_BLOCK); 1274 1275 mutex_unlock(&ucr->dev_mutex); 1276 1277 return err; 1278 } 1279 1280 static const struct mmc_host_ops rtsx_usb_sdmmc_ops = { 1281 .request = sdmmc_request, 1282 .set_ios = sdmmc_set_ios, 1283 .get_ro = sdmmc_get_ro, 1284 .get_cd = sdmmc_get_cd, 1285 .start_signal_voltage_switch = sdmmc_switch_voltage, 1286 .card_busy = sdmmc_card_busy, 1287 .execute_tuning = sdmmc_execute_tuning, 1288 }; 1289 1290 #ifdef RTSX_USB_USE_LEDS_CLASS 1291 static void rtsx_usb_led_control(struct led_classdev *led, 1292 enum led_brightness brightness) 1293 { 1294 struct rtsx_usb_sdmmc *host = container_of(led, 1295 struct rtsx_usb_sdmmc, led); 1296 1297 if (host->host_removal) 1298 return; 1299 1300 host->led.brightness = brightness; 1301 schedule_work(&host->led_work); 1302 } 1303 1304 static void rtsx_usb_update_led(struct work_struct *work) 1305 { 1306 struct rtsx_usb_sdmmc *host = 1307 container_of(work, struct rtsx_usb_sdmmc, led_work); 1308 struct rtsx_ucr *ucr = host->ucr; 1309 1310 mutex_lock(&ucr->dev_mutex); 1311 1312 if (host->led.brightness == LED_OFF) 1313 rtsx_usb_turn_off_led(ucr); 1314 else 1315 rtsx_usb_turn_on_led(ucr); 1316 1317 mutex_unlock(&ucr->dev_mutex); 1318 } 1319 #endif 1320 1321 static void rtsx_usb_init_host(struct rtsx_usb_sdmmc *host) 1322 { 1323 struct mmc_host *mmc = host->mmc; 1324 1325 mmc->f_min = 250000; 1326 mmc->f_max = 208000000; 1327 mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34 | MMC_VDD_165_195; 1328 mmc->caps = MMC_CAP_4_BIT_DATA | MMC_CAP_SD_HIGHSPEED | 1329 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_BUS_WIDTH_TEST | 1330 MMC_CAP_UHS_SDR12 | MMC_CAP_UHS_SDR25 | MMC_CAP_UHS_SDR50 | 1331 MMC_CAP_NEEDS_POLL; 1332 1333 mmc->max_current_330 = 400; 1334 mmc->max_current_180 = 800; 1335 mmc->ops = &rtsx_usb_sdmmc_ops; 1336 mmc->max_segs = 256; 1337 mmc->max_seg_size = 65536; 1338 mmc->max_blk_size = 512; 1339 mmc->max_blk_count = 65535; 1340 mmc->max_req_size = 524288; 1341 1342 host->power_mode = MMC_POWER_OFF; 1343 } 1344 1345 static int rtsx_usb_sdmmc_drv_probe(struct platform_device *pdev) 1346 { 1347 struct mmc_host *mmc; 1348 struct rtsx_usb_sdmmc *host; 1349 struct rtsx_ucr *ucr; 1350 #ifdef RTSX_USB_USE_LEDS_CLASS 1351 int err; 1352 #endif 1353 1354 ucr = usb_get_intfdata(to_usb_interface(pdev->dev.parent)); 1355 if (!ucr) 1356 return -ENXIO; 1357 1358 dev_dbg(&(pdev->dev), ": Realtek USB SD/MMC controller found\n"); 1359 1360 mmc = mmc_alloc_host(sizeof(*host), &pdev->dev); 1361 if (!mmc) 1362 return -ENOMEM; 1363 1364 host = mmc_priv(mmc); 1365 host->ucr = ucr; 1366 host->mmc = mmc; 1367 host->pdev = pdev; 1368 platform_set_drvdata(pdev, host); 1369 1370 mutex_init(&host->host_mutex); 1371 rtsx_usb_init_host(host); 1372 pm_runtime_enable(&pdev->dev); 1373 1374 #ifdef RTSX_USB_USE_LEDS_CLASS 1375 snprintf(host->led_name, sizeof(host->led_name), 1376 "%s::", mmc_hostname(mmc)); 1377 host->led.name = host->led_name; 1378 host->led.brightness = LED_OFF; 1379 host->led.default_trigger = mmc_hostname(mmc); 1380 host->led.brightness_set = rtsx_usb_led_control; 1381 1382 err = led_classdev_register(mmc_dev(mmc), &host->led); 1383 if (err) 1384 dev_err(&(pdev->dev), 1385 "Failed to register LED device: %d\n", err); 1386 INIT_WORK(&host->led_work, rtsx_usb_update_led); 1387 1388 #endif 1389 mmc_add_host(mmc); 1390 1391 return 0; 1392 } 1393 1394 static int rtsx_usb_sdmmc_drv_remove(struct platform_device *pdev) 1395 { 1396 struct rtsx_usb_sdmmc *host = platform_get_drvdata(pdev); 1397 struct mmc_host *mmc; 1398 1399 if (!host) 1400 return 0; 1401 1402 mmc = host->mmc; 1403 host->host_removal = true; 1404 1405 mutex_lock(&host->host_mutex); 1406 if (host->mrq) { 1407 dev_dbg(&(pdev->dev), 1408 "%s: Controller removed during transfer\n", 1409 mmc_hostname(mmc)); 1410 host->mrq->cmd->error = -ENOMEDIUM; 1411 if (host->mrq->stop) 1412 host->mrq->stop->error = -ENOMEDIUM; 1413 mmc_request_done(mmc, host->mrq); 1414 } 1415 mutex_unlock(&host->host_mutex); 1416 1417 mmc_remove_host(mmc); 1418 1419 #ifdef RTSX_USB_USE_LEDS_CLASS 1420 cancel_work_sync(&host->led_work); 1421 led_classdev_unregister(&host->led); 1422 #endif 1423 1424 mmc_free_host(mmc); 1425 pm_runtime_disable(&pdev->dev); 1426 platform_set_drvdata(pdev, NULL); 1427 1428 dev_dbg(&(pdev->dev), 1429 ": Realtek USB SD/MMC module has been removed\n"); 1430 1431 return 0; 1432 } 1433 1434 static struct platform_device_id rtsx_usb_sdmmc_ids[] = { 1435 { 1436 .name = "rtsx_usb_sdmmc", 1437 }, { 1438 /* sentinel */ 1439 } 1440 }; 1441 MODULE_DEVICE_TABLE(platform, rtsx_usb_sdmmc_ids); 1442 1443 static struct platform_driver rtsx_usb_sdmmc_driver = { 1444 .probe = rtsx_usb_sdmmc_drv_probe, 1445 .remove = rtsx_usb_sdmmc_drv_remove, 1446 .id_table = rtsx_usb_sdmmc_ids, 1447 .driver = { 1448 .owner = THIS_MODULE, 1449 .name = "rtsx_usb_sdmmc", 1450 }, 1451 }; 1452 module_platform_driver(rtsx_usb_sdmmc_driver); 1453 1454 MODULE_LICENSE("GPL v2"); 1455 MODULE_AUTHOR("Roger Tseng <rogerable@realtek.com>"); 1456 MODULE_DESCRIPTION("Realtek USB SD/MMC Card Host Driver"); 1457