1 /* 2 * DMA support use of SYS DMAC with SDHI SD/SDIO controller 3 * 4 * Copyright (C) 2016-17 Renesas Electronics Corporation 5 * Copyright (C) 2016-17 Sang Engineering, Wolfram Sang 6 * Copyright (C) 2017 Horms Solutions, Simon Horman 7 * Copyright (C) 2010-2011 Guennadi Liakhovetski 8 * 9 * This program is free software; you can redistribute it and/or modify 10 * it under the terms of the GNU General Public License version 2 as 11 * published by the Free Software Foundation. 12 */ 13 14 #include <linux/device.h> 15 #include <linux/dma-mapping.h> 16 #include <linux/dmaengine.h> 17 #include <linux/mfd/tmio.h> 18 #include <linux/mmc/host.h> 19 #include <linux/mod_devicetable.h> 20 #include <linux/module.h> 21 #include <linux/of_device.h> 22 #include <linux/pagemap.h> 23 #include <linux/scatterlist.h> 24 #include <linux/sys_soc.h> 25 26 #include "renesas_sdhi.h" 27 #include "tmio_mmc.h" 28 29 #define TMIO_MMC_MIN_DMA_LEN 8 30 31 static const struct renesas_sdhi_of_data of_default_cfg = { 32 .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT, 33 }; 34 35 static const struct renesas_sdhi_of_data of_rz_compatible = { 36 .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_32BIT_DATA_PORT | 37 TMIO_MMC_HAVE_CBSY, 38 .tmio_ocr_mask = MMC_VDD_32_33, 39 .capabilities = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ, 40 }; 41 42 static const struct renesas_sdhi_of_data of_rcar_gen1_compatible = { 43 .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_WRPROTECT_DISABLE | 44 TMIO_MMC_CLK_ACTUAL, 45 .capabilities = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ, 46 }; 47 48 /* Definitions for sampling clocks */ 49 static struct renesas_sdhi_scc rcar_gen2_scc_taps[] = { 50 { 51 .clk_rate = 156000000, 52 .tap = 0x00000703, 53 }, 54 { 55 .clk_rate = 0, 56 .tap = 0x00000300, 57 }, 58 }; 59 60 static const struct renesas_sdhi_of_data of_rcar_gen2_compatible = { 61 .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_WRPROTECT_DISABLE | 62 TMIO_MMC_CLK_ACTUAL | TMIO_MMC_HAVE_CBSY | 63 TMIO_MMC_MIN_RCAR2, 64 .capabilities = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ | 65 MMC_CAP_CMD23, 66 .dma_buswidth = DMA_SLAVE_BUSWIDTH_4_BYTES, 67 .dma_rx_offset = 0x2000, 68 .scc_offset = 0x0300, 69 .taps = rcar_gen2_scc_taps, 70 .taps_num = ARRAY_SIZE(rcar_gen2_scc_taps), 71 }; 72 73 /* Definitions for sampling clocks */ 74 static struct renesas_sdhi_scc rcar_gen3_scc_taps[] = { 75 { 76 .clk_rate = 0, 77 .tap = 0x00000300, 78 }, 79 }; 80 81 static const struct renesas_sdhi_of_data of_rcar_gen3_compatible = { 82 .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_WRPROTECT_DISABLE | 83 TMIO_MMC_CLK_ACTUAL | TMIO_MMC_HAVE_CBSY | 84 TMIO_MMC_MIN_RCAR2, 85 .capabilities = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ | 86 MMC_CAP_CMD23, 87 .bus_shift = 2, 88 .scc_offset = 0x1000, 89 .taps = rcar_gen3_scc_taps, 90 .taps_num = ARRAY_SIZE(rcar_gen3_scc_taps), 91 }; 92 93 static const struct of_device_id renesas_sdhi_sys_dmac_of_match[] = { 94 { .compatible = "renesas,sdhi-sh73a0", .data = &of_default_cfg, }, 95 { .compatible = "renesas,sdhi-r8a73a4", .data = &of_default_cfg, }, 96 { .compatible = "renesas,sdhi-r8a7740", .data = &of_default_cfg, }, 97 { .compatible = "renesas,sdhi-r7s72100", .data = &of_rz_compatible, }, 98 { .compatible = "renesas,sdhi-r8a7778", .data = &of_rcar_gen1_compatible, }, 99 { .compatible = "renesas,sdhi-r8a7779", .data = &of_rcar_gen1_compatible, }, 100 { .compatible = "renesas,sdhi-r8a7743", .data = &of_rcar_gen2_compatible, }, 101 { .compatible = "renesas,sdhi-r8a7745", .data = &of_rcar_gen2_compatible, }, 102 { .compatible = "renesas,sdhi-r8a7790", .data = &of_rcar_gen2_compatible, }, 103 { .compatible = "renesas,sdhi-r8a7791", .data = &of_rcar_gen2_compatible, }, 104 { .compatible = "renesas,sdhi-r8a7792", .data = &of_rcar_gen2_compatible, }, 105 { .compatible = "renesas,sdhi-r8a7793", .data = &of_rcar_gen2_compatible, }, 106 { .compatible = "renesas,sdhi-r8a7794", .data = &of_rcar_gen2_compatible, }, 107 { .compatible = "renesas,sdhi-r8a7795", .data = &of_rcar_gen3_compatible, }, 108 { .compatible = "renesas,sdhi-r8a7796", .data = &of_rcar_gen3_compatible, }, 109 { .compatible = "renesas,rcar-gen1-sdhi", .data = &of_rcar_gen1_compatible, }, 110 { .compatible = "renesas,rcar-gen2-sdhi", .data = &of_rcar_gen2_compatible, }, 111 { .compatible = "renesas,rcar-gen3-sdhi", .data = &of_rcar_gen3_compatible, }, 112 { .compatible = "renesas,sdhi-shmobile" }, 113 {}, 114 }; 115 MODULE_DEVICE_TABLE(of, renesas_sdhi_sys_dmac_of_match); 116 117 static void renesas_sdhi_sys_dmac_enable_dma(struct tmio_mmc_host *host, 118 bool enable) 119 { 120 if (!host->chan_tx || !host->chan_rx) 121 return; 122 123 if (host->dma->enable) 124 host->dma->enable(host, enable); 125 } 126 127 static void renesas_sdhi_sys_dmac_abort_dma(struct tmio_mmc_host *host) 128 { 129 renesas_sdhi_sys_dmac_enable_dma(host, false); 130 131 if (host->chan_rx) 132 dmaengine_terminate_all(host->chan_rx); 133 if (host->chan_tx) 134 dmaengine_terminate_all(host->chan_tx); 135 136 renesas_sdhi_sys_dmac_enable_dma(host, true); 137 } 138 139 static void renesas_sdhi_sys_dmac_dataend_dma(struct tmio_mmc_host *host) 140 { 141 complete(&host->dma_dataend); 142 } 143 144 static void renesas_sdhi_sys_dmac_dma_callback(void *arg) 145 { 146 struct tmio_mmc_host *host = arg; 147 148 spin_lock_irq(&host->lock); 149 150 if (!host->data) 151 goto out; 152 153 if (host->data->flags & MMC_DATA_READ) 154 dma_unmap_sg(host->chan_rx->device->dev, 155 host->sg_ptr, host->sg_len, 156 DMA_FROM_DEVICE); 157 else 158 dma_unmap_sg(host->chan_tx->device->dev, 159 host->sg_ptr, host->sg_len, 160 DMA_TO_DEVICE); 161 162 spin_unlock_irq(&host->lock); 163 164 wait_for_completion(&host->dma_dataend); 165 166 spin_lock_irq(&host->lock); 167 tmio_mmc_do_data_irq(host); 168 out: 169 spin_unlock_irq(&host->lock); 170 } 171 172 static void renesas_sdhi_sys_dmac_start_dma_rx(struct tmio_mmc_host *host) 173 { 174 struct scatterlist *sg = host->sg_ptr, *sg_tmp; 175 struct dma_async_tx_descriptor *desc = NULL; 176 struct dma_chan *chan = host->chan_rx; 177 dma_cookie_t cookie; 178 int ret, i; 179 bool aligned = true, multiple = true; 180 unsigned int align = (1 << host->pdata->alignment_shift) - 1; 181 182 for_each_sg(sg, sg_tmp, host->sg_len, i) { 183 if (sg_tmp->offset & align) 184 aligned = false; 185 if (sg_tmp->length & align) { 186 multiple = false; 187 break; 188 } 189 } 190 191 if ((!aligned && (host->sg_len > 1 || sg->length > PAGE_SIZE || 192 (align & PAGE_MASK))) || !multiple) { 193 ret = -EINVAL; 194 goto pio; 195 } 196 197 if (sg->length < TMIO_MMC_MIN_DMA_LEN) { 198 host->force_pio = true; 199 return; 200 } 201 202 tmio_mmc_disable_mmc_irqs(host, TMIO_STAT_RXRDY); 203 204 /* The only sg element can be unaligned, use our bounce buffer then */ 205 if (!aligned) { 206 sg_init_one(&host->bounce_sg, host->bounce_buf, sg->length); 207 host->sg_ptr = &host->bounce_sg; 208 sg = host->sg_ptr; 209 } 210 211 ret = dma_map_sg(chan->device->dev, sg, host->sg_len, DMA_FROM_DEVICE); 212 if (ret > 0) 213 desc = dmaengine_prep_slave_sg(chan, sg, ret, DMA_DEV_TO_MEM, 214 DMA_CTRL_ACK); 215 216 if (desc) { 217 reinit_completion(&host->dma_dataend); 218 desc->callback = renesas_sdhi_sys_dmac_dma_callback; 219 desc->callback_param = host; 220 221 cookie = dmaengine_submit(desc); 222 if (cookie < 0) { 223 desc = NULL; 224 ret = cookie; 225 } 226 } 227 pio: 228 if (!desc) { 229 /* DMA failed, fall back to PIO */ 230 renesas_sdhi_sys_dmac_enable_dma(host, false); 231 if (ret >= 0) 232 ret = -EIO; 233 host->chan_rx = NULL; 234 dma_release_channel(chan); 235 /* Free the Tx channel too */ 236 chan = host->chan_tx; 237 if (chan) { 238 host->chan_tx = NULL; 239 dma_release_channel(chan); 240 } 241 dev_warn(&host->pdev->dev, 242 "DMA failed: %d, falling back to PIO\n", ret); 243 } 244 } 245 246 static void renesas_sdhi_sys_dmac_start_dma_tx(struct tmio_mmc_host *host) 247 { 248 struct scatterlist *sg = host->sg_ptr, *sg_tmp; 249 struct dma_async_tx_descriptor *desc = NULL; 250 struct dma_chan *chan = host->chan_tx; 251 dma_cookie_t cookie; 252 int ret, i; 253 bool aligned = true, multiple = true; 254 unsigned int align = (1 << host->pdata->alignment_shift) - 1; 255 256 for_each_sg(sg, sg_tmp, host->sg_len, i) { 257 if (sg_tmp->offset & align) 258 aligned = false; 259 if (sg_tmp->length & align) { 260 multiple = false; 261 break; 262 } 263 } 264 265 if ((!aligned && (host->sg_len > 1 || sg->length > PAGE_SIZE || 266 (align & PAGE_MASK))) || !multiple) { 267 ret = -EINVAL; 268 goto pio; 269 } 270 271 if (sg->length < TMIO_MMC_MIN_DMA_LEN) { 272 host->force_pio = true; 273 return; 274 } 275 276 tmio_mmc_disable_mmc_irqs(host, TMIO_STAT_TXRQ); 277 278 /* The only sg element can be unaligned, use our bounce buffer then */ 279 if (!aligned) { 280 unsigned long flags; 281 void *sg_vaddr = tmio_mmc_kmap_atomic(sg, &flags); 282 283 sg_init_one(&host->bounce_sg, host->bounce_buf, sg->length); 284 memcpy(host->bounce_buf, sg_vaddr, host->bounce_sg.length); 285 tmio_mmc_kunmap_atomic(sg, &flags, sg_vaddr); 286 host->sg_ptr = &host->bounce_sg; 287 sg = host->sg_ptr; 288 } 289 290 ret = dma_map_sg(chan->device->dev, sg, host->sg_len, DMA_TO_DEVICE); 291 if (ret > 0) 292 desc = dmaengine_prep_slave_sg(chan, sg, ret, DMA_MEM_TO_DEV, 293 DMA_CTRL_ACK); 294 295 if (desc) { 296 reinit_completion(&host->dma_dataend); 297 desc->callback = renesas_sdhi_sys_dmac_dma_callback; 298 desc->callback_param = host; 299 300 cookie = dmaengine_submit(desc); 301 if (cookie < 0) { 302 desc = NULL; 303 ret = cookie; 304 } 305 } 306 pio: 307 if (!desc) { 308 /* DMA failed, fall back to PIO */ 309 renesas_sdhi_sys_dmac_enable_dma(host, false); 310 if (ret >= 0) 311 ret = -EIO; 312 host->chan_tx = NULL; 313 dma_release_channel(chan); 314 /* Free the Rx channel too */ 315 chan = host->chan_rx; 316 if (chan) { 317 host->chan_rx = NULL; 318 dma_release_channel(chan); 319 } 320 dev_warn(&host->pdev->dev, 321 "DMA failed: %d, falling back to PIO\n", ret); 322 } 323 } 324 325 static void renesas_sdhi_sys_dmac_start_dma(struct tmio_mmc_host *host, 326 struct mmc_data *data) 327 { 328 if (data->flags & MMC_DATA_READ) { 329 if (host->chan_rx) 330 renesas_sdhi_sys_dmac_start_dma_rx(host); 331 } else { 332 if (host->chan_tx) 333 renesas_sdhi_sys_dmac_start_dma_tx(host); 334 } 335 } 336 337 static void renesas_sdhi_sys_dmac_issue_tasklet_fn(unsigned long priv) 338 { 339 struct tmio_mmc_host *host = (struct tmio_mmc_host *)priv; 340 struct dma_chan *chan = NULL; 341 342 spin_lock_irq(&host->lock); 343 344 if (host && host->data) { 345 if (host->data->flags & MMC_DATA_READ) 346 chan = host->chan_rx; 347 else 348 chan = host->chan_tx; 349 } 350 351 spin_unlock_irq(&host->lock); 352 353 tmio_mmc_enable_mmc_irqs(host, TMIO_STAT_DATAEND); 354 355 if (chan) 356 dma_async_issue_pending(chan); 357 } 358 359 static void renesas_sdhi_sys_dmac_request_dma(struct tmio_mmc_host *host, 360 struct tmio_mmc_data *pdata) 361 { 362 /* We can only either use DMA for both Tx and Rx or not use it at all */ 363 if (!host->dma || (!host->pdev->dev.of_node && 364 (!pdata->chan_priv_tx || !pdata->chan_priv_rx))) 365 return; 366 367 if (!host->chan_tx && !host->chan_rx) { 368 struct resource *res = platform_get_resource(host->pdev, 369 IORESOURCE_MEM, 0); 370 struct dma_slave_config cfg = {}; 371 dma_cap_mask_t mask; 372 int ret; 373 374 if (!res) 375 return; 376 377 dma_cap_zero(mask); 378 dma_cap_set(DMA_SLAVE, mask); 379 380 host->chan_tx = dma_request_slave_channel_compat(mask, 381 host->dma->filter, pdata->chan_priv_tx, 382 &host->pdev->dev, "tx"); 383 dev_dbg(&host->pdev->dev, "%s: TX: got channel %p\n", __func__, 384 host->chan_tx); 385 386 if (!host->chan_tx) 387 return; 388 389 cfg.direction = DMA_MEM_TO_DEV; 390 cfg.dst_addr = res->start + 391 (CTL_SD_DATA_PORT << host->bus_shift); 392 cfg.dst_addr_width = host->dma->dma_buswidth; 393 if (!cfg.dst_addr_width) 394 cfg.dst_addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES; 395 cfg.src_addr = 0; 396 ret = dmaengine_slave_config(host->chan_tx, &cfg); 397 if (ret < 0) 398 goto ecfgtx; 399 400 host->chan_rx = dma_request_slave_channel_compat(mask, 401 host->dma->filter, pdata->chan_priv_rx, 402 &host->pdev->dev, "rx"); 403 dev_dbg(&host->pdev->dev, "%s: RX: got channel %p\n", __func__, 404 host->chan_rx); 405 406 if (!host->chan_rx) 407 goto ereqrx; 408 409 cfg.direction = DMA_DEV_TO_MEM; 410 cfg.src_addr = cfg.dst_addr + host->pdata->dma_rx_offset; 411 cfg.src_addr_width = host->dma->dma_buswidth; 412 if (!cfg.src_addr_width) 413 cfg.src_addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES; 414 cfg.dst_addr = 0; 415 ret = dmaengine_slave_config(host->chan_rx, &cfg); 416 if (ret < 0) 417 goto ecfgrx; 418 419 host->bounce_buf = (u8 *)__get_free_page(GFP_KERNEL | GFP_DMA); 420 if (!host->bounce_buf) 421 goto ebouncebuf; 422 423 init_completion(&host->dma_dataend); 424 tasklet_init(&host->dma_issue, 425 renesas_sdhi_sys_dmac_issue_tasklet_fn, 426 (unsigned long)host); 427 } 428 429 renesas_sdhi_sys_dmac_enable_dma(host, true); 430 431 return; 432 433 ebouncebuf: 434 ecfgrx: 435 dma_release_channel(host->chan_rx); 436 host->chan_rx = NULL; 437 ereqrx: 438 ecfgtx: 439 dma_release_channel(host->chan_tx); 440 host->chan_tx = NULL; 441 } 442 443 static void renesas_sdhi_sys_dmac_release_dma(struct tmio_mmc_host *host) 444 { 445 if (host->chan_tx) { 446 struct dma_chan *chan = host->chan_tx; 447 448 host->chan_tx = NULL; 449 dma_release_channel(chan); 450 } 451 if (host->chan_rx) { 452 struct dma_chan *chan = host->chan_rx; 453 454 host->chan_rx = NULL; 455 dma_release_channel(chan); 456 } 457 if (host->bounce_buf) { 458 free_pages((unsigned long)host->bounce_buf, 0); 459 host->bounce_buf = NULL; 460 } 461 } 462 463 static const struct tmio_mmc_dma_ops renesas_sdhi_sys_dmac_dma_ops = { 464 .start = renesas_sdhi_sys_dmac_start_dma, 465 .enable = renesas_sdhi_sys_dmac_enable_dma, 466 .request = renesas_sdhi_sys_dmac_request_dma, 467 .release = renesas_sdhi_sys_dmac_release_dma, 468 .abort = renesas_sdhi_sys_dmac_abort_dma, 469 .dataend = renesas_sdhi_sys_dmac_dataend_dma, 470 }; 471 472 /* 473 * Whitelist of specific R-Car Gen3 SoC ES versions to use this DMAC 474 * implementation. Currently empty as all supported ES versions use 475 * the internal DMAC. 476 */ 477 static const struct soc_device_attribute gen3_soc_whitelist[] = { 478 { /* sentinel */ } 479 }; 480 481 static int renesas_sdhi_sys_dmac_probe(struct platform_device *pdev) 482 { 483 if (of_device_get_match_data(&pdev->dev) == &of_rcar_gen3_compatible && 484 !soc_device_match(gen3_soc_whitelist)) 485 return -ENODEV; 486 487 return renesas_sdhi_probe(pdev, &renesas_sdhi_sys_dmac_dma_ops); 488 } 489 490 static const struct dev_pm_ops renesas_sdhi_sys_dmac_dev_pm_ops = { 491 SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend, 492 pm_runtime_force_resume) 493 SET_RUNTIME_PM_OPS(tmio_mmc_host_runtime_suspend, 494 tmio_mmc_host_runtime_resume, 495 NULL) 496 }; 497 498 static struct platform_driver renesas_sys_dmac_sdhi_driver = { 499 .driver = { 500 .name = "sh_mobile_sdhi", 501 .pm = &renesas_sdhi_sys_dmac_dev_pm_ops, 502 .of_match_table = renesas_sdhi_sys_dmac_of_match, 503 }, 504 .probe = renesas_sdhi_sys_dmac_probe, 505 .remove = renesas_sdhi_remove, 506 }; 507 508 module_platform_driver(renesas_sys_dmac_sdhi_driver); 509 510 MODULE_DESCRIPTION("Renesas SDHI driver"); 511 MODULE_AUTHOR("Magnus Damm"); 512 MODULE_LICENSE("GPL v2"); 513 MODULE_ALIAS("platform:sh_mobile_sdhi"); 514