1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * DMA support use of SYS DMAC with SDHI SD/SDIO controller 4 * 5 * Copyright (C) 2016-19 Renesas Electronics Corporation 6 * Copyright (C) 2016-19 Sang Engineering, Wolfram Sang 7 * Copyright (C) 2017 Horms Solutions, Simon Horman 8 * Copyright (C) 2010-2011 Guennadi Liakhovetski 9 */ 10 11 #include <linux/device.h> 12 #include <linux/dma-mapping.h> 13 #include <linux/dmaengine.h> 14 #include <linux/mfd/tmio.h> 15 #include <linux/mmc/host.h> 16 #include <linux/mod_devicetable.h> 17 #include <linux/module.h> 18 #include <linux/of_device.h> 19 #include <linux/pagemap.h> 20 #include <linux/scatterlist.h> 21 #include <linux/sys_soc.h> 22 23 #include "renesas_sdhi.h" 24 #include "tmio_mmc.h" 25 26 #define TMIO_MMC_MIN_DMA_LEN 8 27 28 static const struct renesas_sdhi_of_data of_default_cfg = { 29 .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT, 30 }; 31 32 static const struct renesas_sdhi_of_data of_rz_compatible = { 33 .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_32BIT_DATA_PORT | 34 TMIO_MMC_HAVE_CBSY, 35 .tmio_ocr_mask = MMC_VDD_32_33, 36 .capabilities = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ | 37 MMC_CAP_WAIT_WHILE_BUSY, 38 }; 39 40 static const struct renesas_sdhi_of_data of_rcar_gen1_compatible = { 41 .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_CLK_ACTUAL, 42 .capabilities = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ | 43 MMC_CAP_WAIT_WHILE_BUSY, 44 .capabilities2 = MMC_CAP2_NO_WRITE_PROTECT, 45 }; 46 47 /* Definitions for sampling clocks */ 48 static struct renesas_sdhi_scc rcar_gen2_scc_taps[] = { 49 { 50 .clk_rate = 156000000, 51 .tap = 0x00000703, 52 }, 53 { 54 .clk_rate = 0, 55 .tap = 0x00000300, 56 }, 57 }; 58 59 static const struct renesas_sdhi_of_data of_rcar_gen2_compatible = { 60 .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_CLK_ACTUAL | 61 TMIO_MMC_HAVE_CBSY | TMIO_MMC_MIN_RCAR2, 62 .capabilities = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ | 63 MMC_CAP_CMD23 | MMC_CAP_WAIT_WHILE_BUSY, 64 .capabilities2 = MMC_CAP2_NO_WRITE_PROTECT, 65 .dma_buswidth = DMA_SLAVE_BUSWIDTH_4_BYTES, 66 .dma_rx_offset = 0x2000, 67 .scc_offset = 0x0300, 68 .taps = rcar_gen2_scc_taps, 69 .taps_num = ARRAY_SIZE(rcar_gen2_scc_taps), 70 .max_blk_count = UINT_MAX / TMIO_MAX_BLK_SIZE, 71 }; 72 73 static const struct of_device_id renesas_sdhi_sys_dmac_of_match[] = { 74 { .compatible = "renesas,sdhi-sh73a0", .data = &of_default_cfg, }, 75 { .compatible = "renesas,sdhi-r8a73a4", .data = &of_default_cfg, }, 76 { .compatible = "renesas,sdhi-r8a7740", .data = &of_default_cfg, }, 77 { .compatible = "renesas,sdhi-r7s72100", .data = &of_rz_compatible, }, 78 { .compatible = "renesas,sdhi-r8a7778", .data = &of_rcar_gen1_compatible, }, 79 { .compatible = "renesas,sdhi-r8a7779", .data = &of_rcar_gen1_compatible, }, 80 { .compatible = "renesas,sdhi-r8a7743", .data = &of_rcar_gen2_compatible, }, 81 { .compatible = "renesas,sdhi-r8a7745", .data = &of_rcar_gen2_compatible, }, 82 { .compatible = "renesas,sdhi-r8a7790", .data = &of_rcar_gen2_compatible, }, 83 { .compatible = "renesas,sdhi-r8a7791", .data = &of_rcar_gen2_compatible, }, 84 { .compatible = "renesas,sdhi-r8a7792", .data = &of_rcar_gen2_compatible, }, 85 { .compatible = "renesas,sdhi-r8a7793", .data = &of_rcar_gen2_compatible, }, 86 { .compatible = "renesas,sdhi-r8a7794", .data = &of_rcar_gen2_compatible, }, 87 { .compatible = "renesas,rcar-gen1-sdhi", .data = &of_rcar_gen1_compatible, }, 88 { .compatible = "renesas,rcar-gen2-sdhi", .data = &of_rcar_gen2_compatible, }, 89 { .compatible = "renesas,sdhi-shmobile" }, 90 {}, 91 }; 92 MODULE_DEVICE_TABLE(of, renesas_sdhi_sys_dmac_of_match); 93 94 static void renesas_sdhi_sys_dmac_enable_dma(struct tmio_mmc_host *host, 95 bool enable) 96 { 97 struct renesas_sdhi *priv = host_to_priv(host); 98 99 if (!host->chan_tx || !host->chan_rx) 100 return; 101 102 if (priv->dma_priv.enable) 103 priv->dma_priv.enable(host, enable); 104 } 105 106 static void renesas_sdhi_sys_dmac_abort_dma(struct tmio_mmc_host *host) 107 { 108 renesas_sdhi_sys_dmac_enable_dma(host, false); 109 110 if (host->chan_rx) 111 dmaengine_terminate_sync(host->chan_rx); 112 if (host->chan_tx) 113 dmaengine_terminate_sync(host->chan_tx); 114 115 renesas_sdhi_sys_dmac_enable_dma(host, true); 116 } 117 118 static void renesas_sdhi_sys_dmac_dataend_dma(struct tmio_mmc_host *host) 119 { 120 struct renesas_sdhi *priv = host_to_priv(host); 121 122 complete(&priv->dma_priv.dma_dataend); 123 } 124 125 static void renesas_sdhi_sys_dmac_dma_callback(void *arg) 126 { 127 struct tmio_mmc_host *host = arg; 128 struct renesas_sdhi *priv = host_to_priv(host); 129 130 spin_lock_irq(&host->lock); 131 132 if (!host->data) 133 goto out; 134 135 if (host->data->flags & MMC_DATA_READ) 136 dma_unmap_sg(host->chan_rx->device->dev, 137 host->sg_ptr, host->sg_len, 138 DMA_FROM_DEVICE); 139 else 140 dma_unmap_sg(host->chan_tx->device->dev, 141 host->sg_ptr, host->sg_len, 142 DMA_TO_DEVICE); 143 144 spin_unlock_irq(&host->lock); 145 146 wait_for_completion(&priv->dma_priv.dma_dataend); 147 148 spin_lock_irq(&host->lock); 149 tmio_mmc_do_data_irq(host); 150 out: 151 spin_unlock_irq(&host->lock); 152 } 153 154 static void renesas_sdhi_sys_dmac_start_dma_rx(struct tmio_mmc_host *host) 155 { 156 struct renesas_sdhi *priv = host_to_priv(host); 157 struct scatterlist *sg = host->sg_ptr, *sg_tmp; 158 struct dma_async_tx_descriptor *desc = NULL; 159 struct dma_chan *chan = host->chan_rx; 160 dma_cookie_t cookie; 161 int ret, i; 162 bool aligned = true, multiple = true; 163 unsigned int align = (1 << host->pdata->alignment_shift) - 1; 164 165 for_each_sg(sg, sg_tmp, host->sg_len, i) { 166 if (sg_tmp->offset & align) 167 aligned = false; 168 if (sg_tmp->length & align) { 169 multiple = false; 170 break; 171 } 172 } 173 174 if ((!aligned && (host->sg_len > 1 || sg->length > PAGE_SIZE || 175 (align & PAGE_MASK))) || !multiple) { 176 ret = -EINVAL; 177 goto pio; 178 } 179 180 if (sg->length < TMIO_MMC_MIN_DMA_LEN) 181 return; 182 183 /* The only sg element can be unaligned, use our bounce buffer then */ 184 if (!aligned) { 185 sg_init_one(&host->bounce_sg, host->bounce_buf, sg->length); 186 host->sg_ptr = &host->bounce_sg; 187 sg = host->sg_ptr; 188 } 189 190 ret = dma_map_sg(chan->device->dev, sg, host->sg_len, DMA_FROM_DEVICE); 191 if (ret > 0) 192 desc = dmaengine_prep_slave_sg(chan, sg, ret, DMA_DEV_TO_MEM, 193 DMA_CTRL_ACK); 194 195 if (desc) { 196 reinit_completion(&priv->dma_priv.dma_dataend); 197 desc->callback = renesas_sdhi_sys_dmac_dma_callback; 198 desc->callback_param = host; 199 200 cookie = dmaengine_submit(desc); 201 if (cookie < 0) { 202 desc = NULL; 203 ret = cookie; 204 } 205 host->dma_on = true; 206 } 207 pio: 208 if (!desc) { 209 /* DMA failed, fall back to PIO */ 210 renesas_sdhi_sys_dmac_enable_dma(host, false); 211 if (ret >= 0) 212 ret = -EIO; 213 host->chan_rx = NULL; 214 dma_release_channel(chan); 215 /* Free the Tx channel too */ 216 chan = host->chan_tx; 217 if (chan) { 218 host->chan_tx = NULL; 219 dma_release_channel(chan); 220 } 221 dev_warn(&host->pdev->dev, 222 "DMA failed: %d, falling back to PIO\n", ret); 223 } 224 } 225 226 static void renesas_sdhi_sys_dmac_start_dma_tx(struct tmio_mmc_host *host) 227 { 228 struct renesas_sdhi *priv = host_to_priv(host); 229 struct scatterlist *sg = host->sg_ptr, *sg_tmp; 230 struct dma_async_tx_descriptor *desc = NULL; 231 struct dma_chan *chan = host->chan_tx; 232 dma_cookie_t cookie; 233 int ret, i; 234 bool aligned = true, multiple = true; 235 unsigned int align = (1 << host->pdata->alignment_shift) - 1; 236 237 for_each_sg(sg, sg_tmp, host->sg_len, i) { 238 if (sg_tmp->offset & align) 239 aligned = false; 240 if (sg_tmp->length & align) { 241 multiple = false; 242 break; 243 } 244 } 245 246 if ((!aligned && (host->sg_len > 1 || sg->length > PAGE_SIZE || 247 (align & PAGE_MASK))) || !multiple) { 248 ret = -EINVAL; 249 goto pio; 250 } 251 252 if (sg->length < TMIO_MMC_MIN_DMA_LEN) 253 return; 254 255 /* The only sg element can be unaligned, use our bounce buffer then */ 256 if (!aligned) { 257 unsigned long flags; 258 void *sg_vaddr = tmio_mmc_kmap_atomic(sg, &flags); 259 260 sg_init_one(&host->bounce_sg, host->bounce_buf, sg->length); 261 memcpy(host->bounce_buf, sg_vaddr, host->bounce_sg.length); 262 tmio_mmc_kunmap_atomic(sg, &flags, sg_vaddr); 263 host->sg_ptr = &host->bounce_sg; 264 sg = host->sg_ptr; 265 } 266 267 ret = dma_map_sg(chan->device->dev, sg, host->sg_len, DMA_TO_DEVICE); 268 if (ret > 0) 269 desc = dmaengine_prep_slave_sg(chan, sg, ret, DMA_MEM_TO_DEV, 270 DMA_CTRL_ACK); 271 272 if (desc) { 273 reinit_completion(&priv->dma_priv.dma_dataend); 274 desc->callback = renesas_sdhi_sys_dmac_dma_callback; 275 desc->callback_param = host; 276 277 cookie = dmaengine_submit(desc); 278 if (cookie < 0) { 279 desc = NULL; 280 ret = cookie; 281 } 282 host->dma_on = true; 283 } 284 pio: 285 if (!desc) { 286 /* DMA failed, fall back to PIO */ 287 renesas_sdhi_sys_dmac_enable_dma(host, false); 288 if (ret >= 0) 289 ret = -EIO; 290 host->chan_tx = NULL; 291 dma_release_channel(chan); 292 /* Free the Rx channel too */ 293 chan = host->chan_rx; 294 if (chan) { 295 host->chan_rx = NULL; 296 dma_release_channel(chan); 297 } 298 dev_warn(&host->pdev->dev, 299 "DMA failed: %d, falling back to PIO\n", ret); 300 } 301 } 302 303 static void renesas_sdhi_sys_dmac_start_dma(struct tmio_mmc_host *host, 304 struct mmc_data *data) 305 { 306 if (data->flags & MMC_DATA_READ) { 307 if (host->chan_rx) 308 renesas_sdhi_sys_dmac_start_dma_rx(host); 309 } else { 310 if (host->chan_tx) 311 renesas_sdhi_sys_dmac_start_dma_tx(host); 312 } 313 } 314 315 static void renesas_sdhi_sys_dmac_issue_tasklet_fn(unsigned long priv) 316 { 317 struct tmio_mmc_host *host = (struct tmio_mmc_host *)priv; 318 struct dma_chan *chan = NULL; 319 320 spin_lock_irq(&host->lock); 321 322 if (host->data) { 323 if (host->data->flags & MMC_DATA_READ) 324 chan = host->chan_rx; 325 else 326 chan = host->chan_tx; 327 } 328 329 spin_unlock_irq(&host->lock); 330 331 tmio_mmc_enable_mmc_irqs(host, TMIO_STAT_DATAEND); 332 333 if (chan) 334 dma_async_issue_pending(chan); 335 } 336 337 static void renesas_sdhi_sys_dmac_request_dma(struct tmio_mmc_host *host, 338 struct tmio_mmc_data *pdata) 339 { 340 struct renesas_sdhi *priv = host_to_priv(host); 341 342 /* We can only either use DMA for both Tx and Rx or not use it at all */ 343 if (!host->pdev->dev.of_node && 344 (!pdata->chan_priv_tx || !pdata->chan_priv_rx)) 345 return; 346 347 if (!host->chan_tx && !host->chan_rx) { 348 struct resource *res = platform_get_resource(host->pdev, 349 IORESOURCE_MEM, 0); 350 struct dma_slave_config cfg = {}; 351 dma_cap_mask_t mask; 352 int ret; 353 354 if (!res) 355 return; 356 357 dma_cap_zero(mask); 358 dma_cap_set(DMA_SLAVE, mask); 359 360 host->chan_tx = dma_request_slave_channel_compat(mask, 361 priv->dma_priv.filter, pdata->chan_priv_tx, 362 &host->pdev->dev, "tx"); 363 dev_dbg(&host->pdev->dev, "%s: TX: got channel %p\n", __func__, 364 host->chan_tx); 365 366 if (!host->chan_tx) 367 return; 368 369 cfg.direction = DMA_MEM_TO_DEV; 370 cfg.dst_addr = res->start + 371 (CTL_SD_DATA_PORT << host->bus_shift); 372 cfg.dst_addr_width = priv->dma_priv.dma_buswidth; 373 if (!cfg.dst_addr_width) 374 cfg.dst_addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES; 375 cfg.src_addr = 0; 376 ret = dmaengine_slave_config(host->chan_tx, &cfg); 377 if (ret < 0) 378 goto ecfgtx; 379 380 host->chan_rx = dma_request_slave_channel_compat(mask, 381 priv->dma_priv.filter, pdata->chan_priv_rx, 382 &host->pdev->dev, "rx"); 383 dev_dbg(&host->pdev->dev, "%s: RX: got channel %p\n", __func__, 384 host->chan_rx); 385 386 if (!host->chan_rx) 387 goto ereqrx; 388 389 cfg.direction = DMA_DEV_TO_MEM; 390 cfg.src_addr = cfg.dst_addr + host->pdata->dma_rx_offset; 391 cfg.src_addr_width = priv->dma_priv.dma_buswidth; 392 if (!cfg.src_addr_width) 393 cfg.src_addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES; 394 cfg.dst_addr = 0; 395 ret = dmaengine_slave_config(host->chan_rx, &cfg); 396 if (ret < 0) 397 goto ecfgrx; 398 399 host->bounce_buf = (u8 *)__get_free_page(GFP_KERNEL | GFP_DMA); 400 if (!host->bounce_buf) 401 goto ebouncebuf; 402 403 init_completion(&priv->dma_priv.dma_dataend); 404 tasklet_init(&host->dma_issue, 405 renesas_sdhi_sys_dmac_issue_tasklet_fn, 406 (unsigned long)host); 407 } 408 409 renesas_sdhi_sys_dmac_enable_dma(host, true); 410 411 return; 412 413 ebouncebuf: 414 ecfgrx: 415 dma_release_channel(host->chan_rx); 416 host->chan_rx = NULL; 417 ereqrx: 418 ecfgtx: 419 dma_release_channel(host->chan_tx); 420 host->chan_tx = NULL; 421 } 422 423 static void renesas_sdhi_sys_dmac_release_dma(struct tmio_mmc_host *host) 424 { 425 if (host->chan_tx) { 426 struct dma_chan *chan = host->chan_tx; 427 428 host->chan_tx = NULL; 429 dma_release_channel(chan); 430 } 431 if (host->chan_rx) { 432 struct dma_chan *chan = host->chan_rx; 433 434 host->chan_rx = NULL; 435 dma_release_channel(chan); 436 } 437 if (host->bounce_buf) { 438 free_pages((unsigned long)host->bounce_buf, 0); 439 host->bounce_buf = NULL; 440 } 441 } 442 443 static const struct tmio_mmc_dma_ops renesas_sdhi_sys_dmac_dma_ops = { 444 .start = renesas_sdhi_sys_dmac_start_dma, 445 .enable = renesas_sdhi_sys_dmac_enable_dma, 446 .request = renesas_sdhi_sys_dmac_request_dma, 447 .release = renesas_sdhi_sys_dmac_release_dma, 448 .abort = renesas_sdhi_sys_dmac_abort_dma, 449 .dataend = renesas_sdhi_sys_dmac_dataend_dma, 450 }; 451 452 static int renesas_sdhi_sys_dmac_probe(struct platform_device *pdev) 453 { 454 return renesas_sdhi_probe(pdev, &renesas_sdhi_sys_dmac_dma_ops, 455 of_device_get_match_data(&pdev->dev), NULL); 456 } 457 458 static const struct dev_pm_ops renesas_sdhi_sys_dmac_dev_pm_ops = { 459 SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend, 460 pm_runtime_force_resume) 461 SET_RUNTIME_PM_OPS(tmio_mmc_host_runtime_suspend, 462 tmio_mmc_host_runtime_resume, 463 NULL) 464 }; 465 466 static struct platform_driver renesas_sys_dmac_sdhi_driver = { 467 .driver = { 468 .name = "sh_mobile_sdhi", 469 .probe_type = PROBE_PREFER_ASYNCHRONOUS, 470 .pm = &renesas_sdhi_sys_dmac_dev_pm_ops, 471 .of_match_table = renesas_sdhi_sys_dmac_of_match, 472 }, 473 .probe = renesas_sdhi_sys_dmac_probe, 474 .remove = renesas_sdhi_remove, 475 }; 476 477 module_platform_driver(renesas_sys_dmac_sdhi_driver); 478 479 MODULE_DESCRIPTION("Renesas SDHI driver"); 480 MODULE_AUTHOR("Magnus Damm"); 481 MODULE_LICENSE("GPL v2"); 482 MODULE_ALIAS("platform:sh_mobile_sdhi"); 483