1 /* 2 * DMA support use of SYS DMAC with SDHI SD/SDIO controller 3 * 4 * Copyright (C) 2016-17 Renesas Electronics Corporation 5 * Copyright (C) 2016-17 Sang Engineering, Wolfram Sang 6 * Copyright (C) 2017 Horms Solutions, Simon Horman 7 * Copyright (C) 2010-2011 Guennadi Liakhovetski 8 * 9 * This program is free software; you can redistribute it and/or modify 10 * it under the terms of the GNU General Public License version 2 as 11 * published by the Free Software Foundation. 12 */ 13 14 #include <linux/device.h> 15 #include <linux/dma-mapping.h> 16 #include <linux/dmaengine.h> 17 #include <linux/mfd/tmio.h> 18 #include <linux/mmc/host.h> 19 #include <linux/mod_devicetable.h> 20 #include <linux/module.h> 21 #include <linux/of_device.h> 22 #include <linux/pagemap.h> 23 #include <linux/scatterlist.h> 24 #include <linux/sys_soc.h> 25 26 #include "renesas_sdhi.h" 27 #include "tmio_mmc.h" 28 29 #define TMIO_MMC_MIN_DMA_LEN 8 30 31 static const struct renesas_sdhi_of_data of_default_cfg = { 32 .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT, 33 }; 34 35 static const struct renesas_sdhi_of_data of_rz_compatible = { 36 .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_32BIT_DATA_PORT | 37 TMIO_MMC_HAVE_CBSY, 38 .tmio_ocr_mask = MMC_VDD_32_33, 39 .capabilities = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ, 40 }; 41 42 static const struct renesas_sdhi_of_data of_rcar_gen1_compatible = { 43 .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_CLK_ACTUAL, 44 .capabilities = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ, 45 }; 46 47 /* Definitions for sampling clocks */ 48 static struct renesas_sdhi_scc rcar_gen2_scc_taps[] = { 49 { 50 .clk_rate = 156000000, 51 .tap = 0x00000703, 52 }, 53 { 54 .clk_rate = 0, 55 .tap = 0x00000300, 56 }, 57 }; 58 59 static const struct renesas_sdhi_of_data of_rcar_gen2_compatible = { 60 .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_CLK_ACTUAL | 61 TMIO_MMC_HAVE_CBSY | TMIO_MMC_MIN_RCAR2, 62 .capabilities = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ | 63 MMC_CAP_CMD23, 64 .dma_buswidth = DMA_SLAVE_BUSWIDTH_4_BYTES, 65 .dma_rx_offset = 0x2000, 66 .scc_offset = 0x0300, 67 .taps = rcar_gen2_scc_taps, 68 .taps_num = ARRAY_SIZE(rcar_gen2_scc_taps), 69 }; 70 71 /* Definitions for sampling clocks */ 72 static struct renesas_sdhi_scc rcar_gen3_scc_taps[] = { 73 { 74 .clk_rate = 0, 75 .tap = 0x00000300, 76 }, 77 }; 78 79 static const struct renesas_sdhi_of_data of_rcar_gen3_compatible = { 80 .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_CLK_ACTUAL | 81 TMIO_MMC_HAVE_CBSY | TMIO_MMC_MIN_RCAR2, 82 .capabilities = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ | 83 MMC_CAP_CMD23, 84 .bus_shift = 2, 85 .scc_offset = 0x1000, 86 .taps = rcar_gen3_scc_taps, 87 .taps_num = ARRAY_SIZE(rcar_gen3_scc_taps), 88 }; 89 90 static const struct of_device_id renesas_sdhi_sys_dmac_of_match[] = { 91 { .compatible = "renesas,sdhi-sh73a0", .data = &of_default_cfg, }, 92 { .compatible = "renesas,sdhi-r8a73a4", .data = &of_default_cfg, }, 93 { .compatible = "renesas,sdhi-r8a7740", .data = &of_default_cfg, }, 94 { .compatible = "renesas,sdhi-r7s72100", .data = &of_rz_compatible, }, 95 { .compatible = "renesas,sdhi-r8a7778", .data = &of_rcar_gen1_compatible, }, 96 { .compatible = "renesas,sdhi-r8a7779", .data = &of_rcar_gen1_compatible, }, 97 { .compatible = "renesas,sdhi-r8a7743", .data = &of_rcar_gen2_compatible, }, 98 { .compatible = "renesas,sdhi-r8a7745", .data = &of_rcar_gen2_compatible, }, 99 { .compatible = "renesas,sdhi-r8a7790", .data = &of_rcar_gen2_compatible, }, 100 { .compatible = "renesas,sdhi-r8a7791", .data = &of_rcar_gen2_compatible, }, 101 { .compatible = "renesas,sdhi-r8a7792", .data = &of_rcar_gen2_compatible, }, 102 { .compatible = "renesas,sdhi-r8a7793", .data = &of_rcar_gen2_compatible, }, 103 { .compatible = "renesas,sdhi-r8a7794", .data = &of_rcar_gen2_compatible, }, 104 { .compatible = "renesas,sdhi-r8a7795", .data = &of_rcar_gen3_compatible, }, 105 { .compatible = "renesas,sdhi-r8a7796", .data = &of_rcar_gen3_compatible, }, 106 { .compatible = "renesas,rcar-gen1-sdhi", .data = &of_rcar_gen1_compatible, }, 107 { .compatible = "renesas,rcar-gen2-sdhi", .data = &of_rcar_gen2_compatible, }, 108 { .compatible = "renesas,rcar-gen3-sdhi", .data = &of_rcar_gen3_compatible, }, 109 { .compatible = "renesas,sdhi-shmobile" }, 110 {}, 111 }; 112 MODULE_DEVICE_TABLE(of, renesas_sdhi_sys_dmac_of_match); 113 114 static void renesas_sdhi_sys_dmac_enable_dma(struct tmio_mmc_host *host, 115 bool enable) 116 { 117 struct renesas_sdhi *priv = host_to_priv(host); 118 119 if (!host->chan_tx || !host->chan_rx) 120 return; 121 122 if (priv->dma_priv.enable) 123 priv->dma_priv.enable(host, enable); 124 } 125 126 static void renesas_sdhi_sys_dmac_abort_dma(struct tmio_mmc_host *host) 127 { 128 renesas_sdhi_sys_dmac_enable_dma(host, false); 129 130 if (host->chan_rx) 131 dmaengine_terminate_all(host->chan_rx); 132 if (host->chan_tx) 133 dmaengine_terminate_all(host->chan_tx); 134 135 renesas_sdhi_sys_dmac_enable_dma(host, true); 136 } 137 138 static void renesas_sdhi_sys_dmac_dataend_dma(struct tmio_mmc_host *host) 139 { 140 struct renesas_sdhi *priv = host_to_priv(host); 141 142 complete(&priv->dma_priv.dma_dataend); 143 } 144 145 static void renesas_sdhi_sys_dmac_dma_callback(void *arg) 146 { 147 struct tmio_mmc_host *host = arg; 148 struct renesas_sdhi *priv = host_to_priv(host); 149 150 spin_lock_irq(&host->lock); 151 152 if (!host->data) 153 goto out; 154 155 if (host->data->flags & MMC_DATA_READ) 156 dma_unmap_sg(host->chan_rx->device->dev, 157 host->sg_ptr, host->sg_len, 158 DMA_FROM_DEVICE); 159 else 160 dma_unmap_sg(host->chan_tx->device->dev, 161 host->sg_ptr, host->sg_len, 162 DMA_TO_DEVICE); 163 164 spin_unlock_irq(&host->lock); 165 166 wait_for_completion(&priv->dma_priv.dma_dataend); 167 168 spin_lock_irq(&host->lock); 169 tmio_mmc_do_data_irq(host); 170 out: 171 spin_unlock_irq(&host->lock); 172 } 173 174 static void renesas_sdhi_sys_dmac_start_dma_rx(struct tmio_mmc_host *host) 175 { 176 struct renesas_sdhi *priv = host_to_priv(host); 177 struct scatterlist *sg = host->sg_ptr, *sg_tmp; 178 struct dma_async_tx_descriptor *desc = NULL; 179 struct dma_chan *chan = host->chan_rx; 180 dma_cookie_t cookie; 181 int ret, i; 182 bool aligned = true, multiple = true; 183 unsigned int align = (1 << host->pdata->alignment_shift) - 1; 184 185 for_each_sg(sg, sg_tmp, host->sg_len, i) { 186 if (sg_tmp->offset & align) 187 aligned = false; 188 if (sg_tmp->length & align) { 189 multiple = false; 190 break; 191 } 192 } 193 194 if ((!aligned && (host->sg_len > 1 || sg->length > PAGE_SIZE || 195 (align & PAGE_MASK))) || !multiple) { 196 ret = -EINVAL; 197 goto pio; 198 } 199 200 if (sg->length < TMIO_MMC_MIN_DMA_LEN) { 201 host->force_pio = true; 202 return; 203 } 204 205 /* The only sg element can be unaligned, use our bounce buffer then */ 206 if (!aligned) { 207 sg_init_one(&host->bounce_sg, host->bounce_buf, sg->length); 208 host->sg_ptr = &host->bounce_sg; 209 sg = host->sg_ptr; 210 } 211 212 ret = dma_map_sg(chan->device->dev, sg, host->sg_len, DMA_FROM_DEVICE); 213 if (ret > 0) 214 desc = dmaengine_prep_slave_sg(chan, sg, ret, DMA_DEV_TO_MEM, 215 DMA_CTRL_ACK); 216 217 if (desc) { 218 reinit_completion(&priv->dma_priv.dma_dataend); 219 desc->callback = renesas_sdhi_sys_dmac_dma_callback; 220 desc->callback_param = host; 221 222 cookie = dmaengine_submit(desc); 223 if (cookie < 0) { 224 desc = NULL; 225 ret = cookie; 226 } 227 } 228 pio: 229 if (!desc) { 230 /* DMA failed, fall back to PIO */ 231 renesas_sdhi_sys_dmac_enable_dma(host, false); 232 if (ret >= 0) 233 ret = -EIO; 234 host->chan_rx = NULL; 235 dma_release_channel(chan); 236 /* Free the Tx channel too */ 237 chan = host->chan_tx; 238 if (chan) { 239 host->chan_tx = NULL; 240 dma_release_channel(chan); 241 } 242 dev_warn(&host->pdev->dev, 243 "DMA failed: %d, falling back to PIO\n", ret); 244 } 245 } 246 247 static void renesas_sdhi_sys_dmac_start_dma_tx(struct tmio_mmc_host *host) 248 { 249 struct renesas_sdhi *priv = host_to_priv(host); 250 struct scatterlist *sg = host->sg_ptr, *sg_tmp; 251 struct dma_async_tx_descriptor *desc = NULL; 252 struct dma_chan *chan = host->chan_tx; 253 dma_cookie_t cookie; 254 int ret, i; 255 bool aligned = true, multiple = true; 256 unsigned int align = (1 << host->pdata->alignment_shift) - 1; 257 258 for_each_sg(sg, sg_tmp, host->sg_len, i) { 259 if (sg_tmp->offset & align) 260 aligned = false; 261 if (sg_tmp->length & align) { 262 multiple = false; 263 break; 264 } 265 } 266 267 if ((!aligned && (host->sg_len > 1 || sg->length > PAGE_SIZE || 268 (align & PAGE_MASK))) || !multiple) { 269 ret = -EINVAL; 270 goto pio; 271 } 272 273 if (sg->length < TMIO_MMC_MIN_DMA_LEN) { 274 host->force_pio = true; 275 return; 276 } 277 278 /* The only sg element can be unaligned, use our bounce buffer then */ 279 if (!aligned) { 280 unsigned long flags; 281 void *sg_vaddr = tmio_mmc_kmap_atomic(sg, &flags); 282 283 sg_init_one(&host->bounce_sg, host->bounce_buf, sg->length); 284 memcpy(host->bounce_buf, sg_vaddr, host->bounce_sg.length); 285 tmio_mmc_kunmap_atomic(sg, &flags, sg_vaddr); 286 host->sg_ptr = &host->bounce_sg; 287 sg = host->sg_ptr; 288 } 289 290 ret = dma_map_sg(chan->device->dev, sg, host->sg_len, DMA_TO_DEVICE); 291 if (ret > 0) 292 desc = dmaengine_prep_slave_sg(chan, sg, ret, DMA_MEM_TO_DEV, 293 DMA_CTRL_ACK); 294 295 if (desc) { 296 reinit_completion(&priv->dma_priv.dma_dataend); 297 desc->callback = renesas_sdhi_sys_dmac_dma_callback; 298 desc->callback_param = host; 299 300 cookie = dmaengine_submit(desc); 301 if (cookie < 0) { 302 desc = NULL; 303 ret = cookie; 304 } 305 } 306 pio: 307 if (!desc) { 308 /* DMA failed, fall back to PIO */ 309 renesas_sdhi_sys_dmac_enable_dma(host, false); 310 if (ret >= 0) 311 ret = -EIO; 312 host->chan_tx = NULL; 313 dma_release_channel(chan); 314 /* Free the Rx channel too */ 315 chan = host->chan_rx; 316 if (chan) { 317 host->chan_rx = NULL; 318 dma_release_channel(chan); 319 } 320 dev_warn(&host->pdev->dev, 321 "DMA failed: %d, falling back to PIO\n", ret); 322 } 323 } 324 325 static void renesas_sdhi_sys_dmac_start_dma(struct tmio_mmc_host *host, 326 struct mmc_data *data) 327 { 328 if (data->flags & MMC_DATA_READ) { 329 if (host->chan_rx) 330 renesas_sdhi_sys_dmac_start_dma_rx(host); 331 } else { 332 if (host->chan_tx) 333 renesas_sdhi_sys_dmac_start_dma_tx(host); 334 } 335 } 336 337 static void renesas_sdhi_sys_dmac_issue_tasklet_fn(unsigned long priv) 338 { 339 struct tmio_mmc_host *host = (struct tmio_mmc_host *)priv; 340 struct dma_chan *chan = NULL; 341 342 spin_lock_irq(&host->lock); 343 344 if (host->data) { 345 if (host->data->flags & MMC_DATA_READ) 346 chan = host->chan_rx; 347 else 348 chan = host->chan_tx; 349 } 350 351 spin_unlock_irq(&host->lock); 352 353 tmio_mmc_enable_mmc_irqs(host, TMIO_STAT_DATAEND); 354 355 if (chan) 356 dma_async_issue_pending(chan); 357 } 358 359 static void renesas_sdhi_sys_dmac_request_dma(struct tmio_mmc_host *host, 360 struct tmio_mmc_data *pdata) 361 { 362 struct renesas_sdhi *priv = host_to_priv(host); 363 364 /* We can only either use DMA for both Tx and Rx or not use it at all */ 365 if (!host->pdev->dev.of_node && 366 (!pdata->chan_priv_tx || !pdata->chan_priv_rx)) 367 return; 368 369 if (!host->chan_tx && !host->chan_rx) { 370 struct resource *res = platform_get_resource(host->pdev, 371 IORESOURCE_MEM, 0); 372 struct dma_slave_config cfg = {}; 373 dma_cap_mask_t mask; 374 int ret; 375 376 if (!res) 377 return; 378 379 dma_cap_zero(mask); 380 dma_cap_set(DMA_SLAVE, mask); 381 382 host->chan_tx = dma_request_slave_channel_compat(mask, 383 priv->dma_priv.filter, pdata->chan_priv_tx, 384 &host->pdev->dev, "tx"); 385 dev_dbg(&host->pdev->dev, "%s: TX: got channel %p\n", __func__, 386 host->chan_tx); 387 388 if (!host->chan_tx) 389 return; 390 391 cfg.direction = DMA_MEM_TO_DEV; 392 cfg.dst_addr = res->start + 393 (CTL_SD_DATA_PORT << host->bus_shift); 394 cfg.dst_addr_width = priv->dma_priv.dma_buswidth; 395 if (!cfg.dst_addr_width) 396 cfg.dst_addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES; 397 cfg.src_addr = 0; 398 ret = dmaengine_slave_config(host->chan_tx, &cfg); 399 if (ret < 0) 400 goto ecfgtx; 401 402 host->chan_rx = dma_request_slave_channel_compat(mask, 403 priv->dma_priv.filter, pdata->chan_priv_rx, 404 &host->pdev->dev, "rx"); 405 dev_dbg(&host->pdev->dev, "%s: RX: got channel %p\n", __func__, 406 host->chan_rx); 407 408 if (!host->chan_rx) 409 goto ereqrx; 410 411 cfg.direction = DMA_DEV_TO_MEM; 412 cfg.src_addr = cfg.dst_addr + host->pdata->dma_rx_offset; 413 cfg.src_addr_width = priv->dma_priv.dma_buswidth; 414 if (!cfg.src_addr_width) 415 cfg.src_addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES; 416 cfg.dst_addr = 0; 417 ret = dmaengine_slave_config(host->chan_rx, &cfg); 418 if (ret < 0) 419 goto ecfgrx; 420 421 host->bounce_buf = (u8 *)__get_free_page(GFP_KERNEL | GFP_DMA); 422 if (!host->bounce_buf) 423 goto ebouncebuf; 424 425 init_completion(&priv->dma_priv.dma_dataend); 426 tasklet_init(&host->dma_issue, 427 renesas_sdhi_sys_dmac_issue_tasklet_fn, 428 (unsigned long)host); 429 } 430 431 renesas_sdhi_sys_dmac_enable_dma(host, true); 432 433 return; 434 435 ebouncebuf: 436 ecfgrx: 437 dma_release_channel(host->chan_rx); 438 host->chan_rx = NULL; 439 ereqrx: 440 ecfgtx: 441 dma_release_channel(host->chan_tx); 442 host->chan_tx = NULL; 443 } 444 445 static void renesas_sdhi_sys_dmac_release_dma(struct tmio_mmc_host *host) 446 { 447 if (host->chan_tx) { 448 struct dma_chan *chan = host->chan_tx; 449 450 host->chan_tx = NULL; 451 dma_release_channel(chan); 452 } 453 if (host->chan_rx) { 454 struct dma_chan *chan = host->chan_rx; 455 456 host->chan_rx = NULL; 457 dma_release_channel(chan); 458 } 459 if (host->bounce_buf) { 460 free_pages((unsigned long)host->bounce_buf, 0); 461 host->bounce_buf = NULL; 462 } 463 } 464 465 static const struct tmio_mmc_dma_ops renesas_sdhi_sys_dmac_dma_ops = { 466 .start = renesas_sdhi_sys_dmac_start_dma, 467 .enable = renesas_sdhi_sys_dmac_enable_dma, 468 .request = renesas_sdhi_sys_dmac_request_dma, 469 .release = renesas_sdhi_sys_dmac_release_dma, 470 .abort = renesas_sdhi_sys_dmac_abort_dma, 471 .dataend = renesas_sdhi_sys_dmac_dataend_dma, 472 }; 473 474 /* 475 * Whitelist of specific R-Car Gen3 SoC ES versions to use this DMAC 476 * implementation. Currently empty as all supported ES versions use 477 * the internal DMAC. 478 */ 479 static const struct soc_device_attribute gen3_soc_whitelist[] = { 480 { /* sentinel */ } 481 }; 482 483 static int renesas_sdhi_sys_dmac_probe(struct platform_device *pdev) 484 { 485 if (of_device_get_match_data(&pdev->dev) == &of_rcar_gen3_compatible && 486 !soc_device_match(gen3_soc_whitelist)) 487 return -ENODEV; 488 489 return renesas_sdhi_probe(pdev, &renesas_sdhi_sys_dmac_dma_ops); 490 } 491 492 static const struct dev_pm_ops renesas_sdhi_sys_dmac_dev_pm_ops = { 493 SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend, 494 pm_runtime_force_resume) 495 SET_RUNTIME_PM_OPS(tmio_mmc_host_runtime_suspend, 496 tmio_mmc_host_runtime_resume, 497 NULL) 498 }; 499 500 static struct platform_driver renesas_sys_dmac_sdhi_driver = { 501 .driver = { 502 .name = "sh_mobile_sdhi", 503 .pm = &renesas_sdhi_sys_dmac_dev_pm_ops, 504 .of_match_table = renesas_sdhi_sys_dmac_of_match, 505 }, 506 .probe = renesas_sdhi_sys_dmac_probe, 507 .remove = renesas_sdhi_remove, 508 }; 509 510 module_platform_driver(renesas_sys_dmac_sdhi_driver); 511 512 MODULE_DESCRIPTION("Renesas SDHI driver"); 513 MODULE_AUTHOR("Magnus Damm"); 514 MODULE_LICENSE("GPL v2"); 515 MODULE_ALIAS("platform:sh_mobile_sdhi"); 516