1f707079dSWolfram Sang // SPDX-License-Identifier: GPL-2.0 2c2a96987SSimon Horman /* 32a68ea78SSimon Horman * DMA support use of SYS DMAC with SDHI SD/SDIO controller 4c2a96987SSimon Horman * 5f49bdcdeSWolfram Sang * Copyright (C) 2016-19 Renesas Electronics Corporation 6f49bdcdeSWolfram Sang * Copyright (C) 2016-19 Sang Engineering, Wolfram Sang 787317c4dSSimon Horman * Copyright (C) 2017 Horms Solutions, Simon Horman 8c2a96987SSimon Horman * Copyright (C) 2010-2011 Guennadi Liakhovetski 9c2a96987SSimon Horman */ 10c2a96987SSimon Horman 11c2a96987SSimon Horman #include <linux/device.h> 12c2a96987SSimon Horman #include <linux/dma-mapping.h> 13c2a96987SSimon Horman #include <linux/dmaengine.h> 14c2a96987SSimon Horman #include <linux/mfd/tmio.h> 15c2a96987SSimon Horman #include <linux/mmc/host.h> 169d08428aSSimon Horman #include <linux/mod_devicetable.h> 179d08428aSSimon Horman #include <linux/module.h> 18cd09780fSSimon Horman #include <linux/of_device.h> 19c2a96987SSimon Horman #include <linux/pagemap.h> 20c2a96987SSimon Horman #include <linux/scatterlist.h> 21cd09780fSSimon Horman #include <linux/sys_soc.h> 22c2a96987SSimon Horman 239d08428aSSimon Horman #include "renesas_sdhi.h" 24c2a96987SSimon Horman #include "tmio_mmc.h" 25c2a96987SSimon Horman 26c2a96987SSimon Horman #define TMIO_MMC_MIN_DMA_LEN 8 27c2a96987SSimon Horman 289d08428aSSimon Horman static const struct renesas_sdhi_of_data of_default_cfg = { 299d08428aSSimon Horman .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT, 309d08428aSSimon Horman }; 319d08428aSSimon Horman 329d08428aSSimon Horman static const struct renesas_sdhi_of_data of_rz_compatible = { 3392b7db8eSWolfram Sang .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_32BIT_DATA_PORT | 3492b7db8eSWolfram Sang TMIO_MMC_HAVE_CBSY, 359d08428aSSimon Horman .tmio_ocr_mask = MMC_VDD_32_33, 369d08428aSSimon Horman .capabilities = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ, 379d08428aSSimon Horman }; 389d08428aSSimon Horman 399d08428aSSimon Horman static const struct renesas_sdhi_of_data of_rcar_gen1_compatible = { 402ad1db05SMasahiro Yamada .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_CLK_ACTUAL, 419d08428aSSimon Horman .capabilities = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ, 42ef5332c1SWolfram Sang .capabilities2 = MMC_CAP2_NO_WRITE_PROTECT, 439d08428aSSimon Horman }; 449d08428aSSimon Horman 459d08428aSSimon Horman /* Definitions for sampling clocks */ 469d08428aSSimon Horman static struct renesas_sdhi_scc rcar_gen2_scc_taps[] = { 479d08428aSSimon Horman { 489d08428aSSimon Horman .clk_rate = 156000000, 499d08428aSSimon Horman .tap = 0x00000703, 509d08428aSSimon Horman }, 519d08428aSSimon Horman { 529d08428aSSimon Horman .clk_rate = 0, 539d08428aSSimon Horman .tap = 0x00000300, 549d08428aSSimon Horman }, 559d08428aSSimon Horman }; 569d08428aSSimon Horman 579d08428aSSimon Horman static const struct renesas_sdhi_of_data of_rcar_gen2_compatible = { 582ad1db05SMasahiro Yamada .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_CLK_ACTUAL | 592ad1db05SMasahiro Yamada TMIO_MMC_HAVE_CBSY | TMIO_MMC_MIN_RCAR2, 60921579b2SWolfram Sang .capabilities = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ | 61921579b2SWolfram Sang MMC_CAP_CMD23, 62ef5332c1SWolfram Sang .capabilities2 = MMC_CAP2_NO_WRITE_PROTECT, 639d08428aSSimon Horman .dma_buswidth = DMA_SLAVE_BUSWIDTH_4_BYTES, 649d08428aSSimon Horman .dma_rx_offset = 0x2000, 659d08428aSSimon Horman .scc_offset = 0x0300, 669d08428aSSimon Horman .taps = rcar_gen2_scc_taps, 679d08428aSSimon Horman .taps_num = ARRAY_SIZE(rcar_gen2_scc_taps), 682a55c1eaSWolfram Sang .max_blk_count = UINT_MAX / TMIO_MAX_BLK_SIZE, 699d08428aSSimon Horman }; 709d08428aSSimon Horman 719d08428aSSimon Horman /* Definitions for sampling clocks */ 729d08428aSSimon Horman static struct renesas_sdhi_scc rcar_gen3_scc_taps[] = { 739d08428aSSimon Horman { 749d08428aSSimon Horman .clk_rate = 0, 759d08428aSSimon Horman .tap = 0x00000300, 769d08428aSSimon Horman }, 779d08428aSSimon Horman }; 789d08428aSSimon Horman 799d08428aSSimon Horman static const struct renesas_sdhi_of_data of_rcar_gen3_compatible = { 802ad1db05SMasahiro Yamada .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_CLK_ACTUAL | 812ad1db05SMasahiro Yamada TMIO_MMC_HAVE_CBSY | TMIO_MMC_MIN_RCAR2, 82921579b2SWolfram Sang .capabilities = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ | 83921579b2SWolfram Sang MMC_CAP_CMD23, 84ef5332c1SWolfram Sang .capabilities2 = MMC_CAP2_NO_WRITE_PROTECT, 859d08428aSSimon Horman .bus_shift = 2, 869d08428aSSimon Horman .scc_offset = 0x1000, 879d08428aSSimon Horman .taps = rcar_gen3_scc_taps, 889d08428aSSimon Horman .taps_num = ARRAY_SIZE(rcar_gen3_scc_taps), 899d08428aSSimon Horman }; 909d08428aSSimon Horman 919d08428aSSimon Horman static const struct of_device_id renesas_sdhi_sys_dmac_of_match[] = { 929d08428aSSimon Horman { .compatible = "renesas,sdhi-sh73a0", .data = &of_default_cfg, }, 939d08428aSSimon Horman { .compatible = "renesas,sdhi-r8a73a4", .data = &of_default_cfg, }, 949d08428aSSimon Horman { .compatible = "renesas,sdhi-r8a7740", .data = &of_default_cfg, }, 959d08428aSSimon Horman { .compatible = "renesas,sdhi-r7s72100", .data = &of_rz_compatible, }, 969d08428aSSimon Horman { .compatible = "renesas,sdhi-r8a7778", .data = &of_rcar_gen1_compatible, }, 979d08428aSSimon Horman { .compatible = "renesas,sdhi-r8a7779", .data = &of_rcar_gen1_compatible, }, 98c16a854eSBiju Das { .compatible = "renesas,sdhi-r8a7743", .data = &of_rcar_gen2_compatible, }, 99c16a854eSBiju Das { .compatible = "renesas,sdhi-r8a7745", .data = &of_rcar_gen2_compatible, }, 1009d08428aSSimon Horman { .compatible = "renesas,sdhi-r8a7790", .data = &of_rcar_gen2_compatible, }, 1019d08428aSSimon Horman { .compatible = "renesas,sdhi-r8a7791", .data = &of_rcar_gen2_compatible, }, 1029d08428aSSimon Horman { .compatible = "renesas,sdhi-r8a7792", .data = &of_rcar_gen2_compatible, }, 1039d08428aSSimon Horman { .compatible = "renesas,sdhi-r8a7793", .data = &of_rcar_gen2_compatible, }, 1049d08428aSSimon Horman { .compatible = "renesas,sdhi-r8a7794", .data = &of_rcar_gen2_compatible, }, 1052c907f05SNiklas Söderlund { .compatible = "renesas,sdhi-r8a7795", .data = &of_rcar_gen3_compatible, }, 1062c907f05SNiklas Söderlund { .compatible = "renesas,sdhi-r8a7796", .data = &of_rcar_gen3_compatible, }, 107d6dc425aSSimon Horman { .compatible = "renesas,rcar-gen1-sdhi", .data = &of_rcar_gen1_compatible, }, 108d6dc425aSSimon Horman { .compatible = "renesas,rcar-gen2-sdhi", .data = &of_rcar_gen2_compatible, }, 109d6dc425aSSimon Horman { .compatible = "renesas,rcar-gen3-sdhi", .data = &of_rcar_gen3_compatible, }, 110d6dc425aSSimon Horman { .compatible = "renesas,sdhi-shmobile" }, 1119d08428aSSimon Horman {}, 1129d08428aSSimon Horman }; 1139d08428aSSimon Horman MODULE_DEVICE_TABLE(of, renesas_sdhi_sys_dmac_of_match); 1149d08428aSSimon Horman 115c2a96987SSimon Horman static void renesas_sdhi_sys_dmac_enable_dma(struct tmio_mmc_host *host, 116c2a96987SSimon Horman bool enable) 117c2a96987SSimon Horman { 118058db286SMasahiro Yamada struct renesas_sdhi *priv = host_to_priv(host); 119058db286SMasahiro Yamada 120c2a96987SSimon Horman if (!host->chan_tx || !host->chan_rx) 121c2a96987SSimon Horman return; 122c2a96987SSimon Horman 123058db286SMasahiro Yamada if (priv->dma_priv.enable) 124058db286SMasahiro Yamada priv->dma_priv.enable(host, enable); 125c2a96987SSimon Horman } 126c2a96987SSimon Horman 127c2a96987SSimon Horman static void renesas_sdhi_sys_dmac_abort_dma(struct tmio_mmc_host *host) 128c2a96987SSimon Horman { 129c2a96987SSimon Horman renesas_sdhi_sys_dmac_enable_dma(host, false); 130c2a96987SSimon Horman 131c2a96987SSimon Horman if (host->chan_rx) 132c2a96987SSimon Horman dmaengine_terminate_all(host->chan_rx); 133c2a96987SSimon Horman if (host->chan_tx) 134c2a96987SSimon Horman dmaengine_terminate_all(host->chan_tx); 135c2a96987SSimon Horman 136c2a96987SSimon Horman renesas_sdhi_sys_dmac_enable_dma(host, true); 137c2a96987SSimon Horman } 138c2a96987SSimon Horman 13992d0f925SSimon Horman static void renesas_sdhi_sys_dmac_dataend_dma(struct tmio_mmc_host *host) 14092d0f925SSimon Horman { 14190d95106SMasahiro Yamada struct renesas_sdhi *priv = host_to_priv(host); 14290d95106SMasahiro Yamada 14390d95106SMasahiro Yamada complete(&priv->dma_priv.dma_dataend); 14492d0f925SSimon Horman } 14592d0f925SSimon Horman 146c2a96987SSimon Horman static void renesas_sdhi_sys_dmac_dma_callback(void *arg) 147c2a96987SSimon Horman { 148c2a96987SSimon Horman struct tmio_mmc_host *host = arg; 14990d95106SMasahiro Yamada struct renesas_sdhi *priv = host_to_priv(host); 150c2a96987SSimon Horman 151c2a96987SSimon Horman spin_lock_irq(&host->lock); 152c2a96987SSimon Horman 153c2a96987SSimon Horman if (!host->data) 154c2a96987SSimon Horman goto out; 155c2a96987SSimon Horman 156c2a96987SSimon Horman if (host->data->flags & MMC_DATA_READ) 157c2a96987SSimon Horman dma_unmap_sg(host->chan_rx->device->dev, 158c2a96987SSimon Horman host->sg_ptr, host->sg_len, 159c2a96987SSimon Horman DMA_FROM_DEVICE); 160c2a96987SSimon Horman else 161c2a96987SSimon Horman dma_unmap_sg(host->chan_tx->device->dev, 162c2a96987SSimon Horman host->sg_ptr, host->sg_len, 163c2a96987SSimon Horman DMA_TO_DEVICE); 164c2a96987SSimon Horman 165c2a96987SSimon Horman spin_unlock_irq(&host->lock); 166c2a96987SSimon Horman 16790d95106SMasahiro Yamada wait_for_completion(&priv->dma_priv.dma_dataend); 168c2a96987SSimon Horman 169c2a96987SSimon Horman spin_lock_irq(&host->lock); 170c2a96987SSimon Horman tmio_mmc_do_data_irq(host); 171c2a96987SSimon Horman out: 172c2a96987SSimon Horman spin_unlock_irq(&host->lock); 173c2a96987SSimon Horman } 174c2a96987SSimon Horman 175c2a96987SSimon Horman static void renesas_sdhi_sys_dmac_start_dma_rx(struct tmio_mmc_host *host) 176c2a96987SSimon Horman { 17790d95106SMasahiro Yamada struct renesas_sdhi *priv = host_to_priv(host); 178c2a96987SSimon Horman struct scatterlist *sg = host->sg_ptr, *sg_tmp; 179c2a96987SSimon Horman struct dma_async_tx_descriptor *desc = NULL; 180c2a96987SSimon Horman struct dma_chan *chan = host->chan_rx; 181c2a96987SSimon Horman dma_cookie_t cookie; 182c2a96987SSimon Horman int ret, i; 183c2a96987SSimon Horman bool aligned = true, multiple = true; 184c2a96987SSimon Horman unsigned int align = (1 << host->pdata->alignment_shift) - 1; 185c2a96987SSimon Horman 186c2a96987SSimon Horman for_each_sg(sg, sg_tmp, host->sg_len, i) { 187c2a96987SSimon Horman if (sg_tmp->offset & align) 188c2a96987SSimon Horman aligned = false; 189c2a96987SSimon Horman if (sg_tmp->length & align) { 190c2a96987SSimon Horman multiple = false; 191c2a96987SSimon Horman break; 192c2a96987SSimon Horman } 193c2a96987SSimon Horman } 194c2a96987SSimon Horman 195c2a96987SSimon Horman if ((!aligned && (host->sg_len > 1 || sg->length > PAGE_SIZE || 196c2a96987SSimon Horman (align & PAGE_MASK))) || !multiple) { 197c2a96987SSimon Horman ret = -EINVAL; 198c2a96987SSimon Horman goto pio; 199c2a96987SSimon Horman } 200c2a96987SSimon Horman 201d3dd5db0SMasahiro Yamada if (sg->length < TMIO_MMC_MIN_DMA_LEN) 202c2a96987SSimon Horman return; 203c2a96987SSimon Horman 204c2a96987SSimon Horman /* The only sg element can be unaligned, use our bounce buffer then */ 205c2a96987SSimon Horman if (!aligned) { 206c2a96987SSimon Horman sg_init_one(&host->bounce_sg, host->bounce_buf, sg->length); 207c2a96987SSimon Horman host->sg_ptr = &host->bounce_sg; 208c2a96987SSimon Horman sg = host->sg_ptr; 209c2a96987SSimon Horman } 210c2a96987SSimon Horman 211c2a96987SSimon Horman ret = dma_map_sg(chan->device->dev, sg, host->sg_len, DMA_FROM_DEVICE); 212c2a96987SSimon Horman if (ret > 0) 2132fe35968SSimon Horman desc = dmaengine_prep_slave_sg(chan, sg, ret, DMA_DEV_TO_MEM, 2142fe35968SSimon Horman DMA_CTRL_ACK); 215c2a96987SSimon Horman 216c2a96987SSimon Horman if (desc) { 21790d95106SMasahiro Yamada reinit_completion(&priv->dma_priv.dma_dataend); 218c2a96987SSimon Horman desc->callback = renesas_sdhi_sys_dmac_dma_callback; 219c2a96987SSimon Horman desc->callback_param = host; 220c2a96987SSimon Horman 221c2a96987SSimon Horman cookie = dmaengine_submit(desc); 222c2a96987SSimon Horman if (cookie < 0) { 223c2a96987SSimon Horman desc = NULL; 224c2a96987SSimon Horman ret = cookie; 225c2a96987SSimon Horman } 226d3dd5db0SMasahiro Yamada host->dma_on = true; 227c2a96987SSimon Horman } 228c2a96987SSimon Horman pio: 229c2a96987SSimon Horman if (!desc) { 230c2a96987SSimon Horman /* DMA failed, fall back to PIO */ 231c2a96987SSimon Horman renesas_sdhi_sys_dmac_enable_dma(host, false); 232c2a96987SSimon Horman if (ret >= 0) 233c2a96987SSimon Horman ret = -EIO; 234c2a96987SSimon Horman host->chan_rx = NULL; 235c2a96987SSimon Horman dma_release_channel(chan); 236c2a96987SSimon Horman /* Free the Tx channel too */ 237c2a96987SSimon Horman chan = host->chan_tx; 238c2a96987SSimon Horman if (chan) { 239c2a96987SSimon Horman host->chan_tx = NULL; 240c2a96987SSimon Horman dma_release_channel(chan); 241c2a96987SSimon Horman } 242c2a96987SSimon Horman dev_warn(&host->pdev->dev, 243c2a96987SSimon Horman "DMA failed: %d, falling back to PIO\n", ret); 244c2a96987SSimon Horman } 245c2a96987SSimon Horman } 246c2a96987SSimon Horman 247c2a96987SSimon Horman static void renesas_sdhi_sys_dmac_start_dma_tx(struct tmio_mmc_host *host) 248c2a96987SSimon Horman { 24990d95106SMasahiro Yamada struct renesas_sdhi *priv = host_to_priv(host); 250c2a96987SSimon Horman struct scatterlist *sg = host->sg_ptr, *sg_tmp; 251c2a96987SSimon Horman struct dma_async_tx_descriptor *desc = NULL; 252c2a96987SSimon Horman struct dma_chan *chan = host->chan_tx; 253c2a96987SSimon Horman dma_cookie_t cookie; 254c2a96987SSimon Horman int ret, i; 255c2a96987SSimon Horman bool aligned = true, multiple = true; 256c2a96987SSimon Horman unsigned int align = (1 << host->pdata->alignment_shift) - 1; 257c2a96987SSimon Horman 258c2a96987SSimon Horman for_each_sg(sg, sg_tmp, host->sg_len, i) { 259c2a96987SSimon Horman if (sg_tmp->offset & align) 260c2a96987SSimon Horman aligned = false; 261c2a96987SSimon Horman if (sg_tmp->length & align) { 262c2a96987SSimon Horman multiple = false; 263c2a96987SSimon Horman break; 264c2a96987SSimon Horman } 265c2a96987SSimon Horman } 266c2a96987SSimon Horman 267c2a96987SSimon Horman if ((!aligned && (host->sg_len > 1 || sg->length > PAGE_SIZE || 268c2a96987SSimon Horman (align & PAGE_MASK))) || !multiple) { 269c2a96987SSimon Horman ret = -EINVAL; 270c2a96987SSimon Horman goto pio; 271c2a96987SSimon Horman } 272c2a96987SSimon Horman 273d3dd5db0SMasahiro Yamada if (sg->length < TMIO_MMC_MIN_DMA_LEN) 274c2a96987SSimon Horman return; 275c2a96987SSimon Horman 276c2a96987SSimon Horman /* The only sg element can be unaligned, use our bounce buffer then */ 277c2a96987SSimon Horman if (!aligned) { 278c2a96987SSimon Horman unsigned long flags; 279c2a96987SSimon Horman void *sg_vaddr = tmio_mmc_kmap_atomic(sg, &flags); 2802fe35968SSimon Horman 281c2a96987SSimon Horman sg_init_one(&host->bounce_sg, host->bounce_buf, sg->length); 282c2a96987SSimon Horman memcpy(host->bounce_buf, sg_vaddr, host->bounce_sg.length); 283c2a96987SSimon Horman tmio_mmc_kunmap_atomic(sg, &flags, sg_vaddr); 284c2a96987SSimon Horman host->sg_ptr = &host->bounce_sg; 285c2a96987SSimon Horman sg = host->sg_ptr; 286c2a96987SSimon Horman } 287c2a96987SSimon Horman 288c2a96987SSimon Horman ret = dma_map_sg(chan->device->dev, sg, host->sg_len, DMA_TO_DEVICE); 289c2a96987SSimon Horman if (ret > 0) 2902fe35968SSimon Horman desc = dmaengine_prep_slave_sg(chan, sg, ret, DMA_MEM_TO_DEV, 2912fe35968SSimon Horman DMA_CTRL_ACK); 292c2a96987SSimon Horman 293c2a96987SSimon Horman if (desc) { 29490d95106SMasahiro Yamada reinit_completion(&priv->dma_priv.dma_dataend); 295c2a96987SSimon Horman desc->callback = renesas_sdhi_sys_dmac_dma_callback; 296c2a96987SSimon Horman desc->callback_param = host; 297c2a96987SSimon Horman 298c2a96987SSimon Horman cookie = dmaengine_submit(desc); 299c2a96987SSimon Horman if (cookie < 0) { 300c2a96987SSimon Horman desc = NULL; 301c2a96987SSimon Horman ret = cookie; 302c2a96987SSimon Horman } 303d3dd5db0SMasahiro Yamada host->dma_on = true; 304c2a96987SSimon Horman } 305c2a96987SSimon Horman pio: 306c2a96987SSimon Horman if (!desc) { 307c2a96987SSimon Horman /* DMA failed, fall back to PIO */ 308c2a96987SSimon Horman renesas_sdhi_sys_dmac_enable_dma(host, false); 309c2a96987SSimon Horman if (ret >= 0) 310c2a96987SSimon Horman ret = -EIO; 311c2a96987SSimon Horman host->chan_tx = NULL; 312c2a96987SSimon Horman dma_release_channel(chan); 313c2a96987SSimon Horman /* Free the Rx channel too */ 314c2a96987SSimon Horman chan = host->chan_rx; 315c2a96987SSimon Horman if (chan) { 316c2a96987SSimon Horman host->chan_rx = NULL; 317c2a96987SSimon Horman dma_release_channel(chan); 318c2a96987SSimon Horman } 319c2a96987SSimon Horman dev_warn(&host->pdev->dev, 320c2a96987SSimon Horman "DMA failed: %d, falling back to PIO\n", ret); 321c2a96987SSimon Horman } 322c2a96987SSimon Horman } 323c2a96987SSimon Horman 324c2a96987SSimon Horman static void renesas_sdhi_sys_dmac_start_dma(struct tmio_mmc_host *host, 325c2a96987SSimon Horman struct mmc_data *data) 326c2a96987SSimon Horman { 327c2a96987SSimon Horman if (data->flags & MMC_DATA_READ) { 328c2a96987SSimon Horman if (host->chan_rx) 329c2a96987SSimon Horman renesas_sdhi_sys_dmac_start_dma_rx(host); 330c2a96987SSimon Horman } else { 331c2a96987SSimon Horman if (host->chan_tx) 332c2a96987SSimon Horman renesas_sdhi_sys_dmac_start_dma_tx(host); 333c2a96987SSimon Horman } 334c2a96987SSimon Horman } 335c2a96987SSimon Horman 336c2a96987SSimon Horman static void renesas_sdhi_sys_dmac_issue_tasklet_fn(unsigned long priv) 337c2a96987SSimon Horman { 338c2a96987SSimon Horman struct tmio_mmc_host *host = (struct tmio_mmc_host *)priv; 339c2a96987SSimon Horman struct dma_chan *chan = NULL; 340c2a96987SSimon Horman 341c2a96987SSimon Horman spin_lock_irq(&host->lock); 342c2a96987SSimon Horman 343b8155d3fSDan Carpenter if (host->data) { 344c2a96987SSimon Horman if (host->data->flags & MMC_DATA_READ) 345c2a96987SSimon Horman chan = host->chan_rx; 346c2a96987SSimon Horman else 347c2a96987SSimon Horman chan = host->chan_tx; 348c2a96987SSimon Horman } 349c2a96987SSimon Horman 350c2a96987SSimon Horman spin_unlock_irq(&host->lock); 351c2a96987SSimon Horman 352c2a96987SSimon Horman tmio_mmc_enable_mmc_irqs(host, TMIO_STAT_DATAEND); 353c2a96987SSimon Horman 354c2a96987SSimon Horman if (chan) 355c2a96987SSimon Horman dma_async_issue_pending(chan); 356c2a96987SSimon Horman } 357c2a96987SSimon Horman 358c2a96987SSimon Horman static void renesas_sdhi_sys_dmac_request_dma(struct tmio_mmc_host *host, 359c2a96987SSimon Horman struct tmio_mmc_data *pdata) 360c2a96987SSimon Horman { 361058db286SMasahiro Yamada struct renesas_sdhi *priv = host_to_priv(host); 362058db286SMasahiro Yamada 363c2a96987SSimon Horman /* We can only either use DMA for both Tx and Rx or not use it at all */ 3642487e7efSMasahiro Yamada if (!host->pdev->dev.of_node && 3652487e7efSMasahiro Yamada (!pdata->chan_priv_tx || !pdata->chan_priv_rx)) 366c2a96987SSimon Horman return; 367c2a96987SSimon Horman 368c2a96987SSimon Horman if (!host->chan_tx && !host->chan_rx) { 369c2a96987SSimon Horman struct resource *res = platform_get_resource(host->pdev, 370c2a96987SSimon Horman IORESOURCE_MEM, 0); 371c2a96987SSimon Horman struct dma_slave_config cfg = {}; 372c2a96987SSimon Horman dma_cap_mask_t mask; 373c2a96987SSimon Horman int ret; 374c2a96987SSimon Horman 375c2a96987SSimon Horman if (!res) 376c2a96987SSimon Horman return; 377c2a96987SSimon Horman 378c2a96987SSimon Horman dma_cap_zero(mask); 379c2a96987SSimon Horman dma_cap_set(DMA_SLAVE, mask); 380c2a96987SSimon Horman 381c2a96987SSimon Horman host->chan_tx = dma_request_slave_channel_compat(mask, 382058db286SMasahiro Yamada priv->dma_priv.filter, pdata->chan_priv_tx, 383c2a96987SSimon Horman &host->pdev->dev, "tx"); 384c2a96987SSimon Horman dev_dbg(&host->pdev->dev, "%s: TX: got channel %p\n", __func__, 385c2a96987SSimon Horman host->chan_tx); 386c2a96987SSimon Horman 387c2a96987SSimon Horman if (!host->chan_tx) 388c2a96987SSimon Horman return; 389c2a96987SSimon Horman 390c2a96987SSimon Horman cfg.direction = DMA_MEM_TO_DEV; 3912fe35968SSimon Horman cfg.dst_addr = res->start + 3922fe35968SSimon Horman (CTL_SD_DATA_PORT << host->bus_shift); 393058db286SMasahiro Yamada cfg.dst_addr_width = priv->dma_priv.dma_buswidth; 394c2a96987SSimon Horman if (!cfg.dst_addr_width) 395c2a96987SSimon Horman cfg.dst_addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES; 396c2a96987SSimon Horman cfg.src_addr = 0; 397c2a96987SSimon Horman ret = dmaengine_slave_config(host->chan_tx, &cfg); 398c2a96987SSimon Horman if (ret < 0) 399c2a96987SSimon Horman goto ecfgtx; 400c2a96987SSimon Horman 401c2a96987SSimon Horman host->chan_rx = dma_request_slave_channel_compat(mask, 402058db286SMasahiro Yamada priv->dma_priv.filter, pdata->chan_priv_rx, 403c2a96987SSimon Horman &host->pdev->dev, "rx"); 404c2a96987SSimon Horman dev_dbg(&host->pdev->dev, "%s: RX: got channel %p\n", __func__, 405c2a96987SSimon Horman host->chan_rx); 406c2a96987SSimon Horman 407c2a96987SSimon Horman if (!host->chan_rx) 408c2a96987SSimon Horman goto ereqrx; 409c2a96987SSimon Horman 410c2a96987SSimon Horman cfg.direction = DMA_DEV_TO_MEM; 411c2a96987SSimon Horman cfg.src_addr = cfg.dst_addr + host->pdata->dma_rx_offset; 412058db286SMasahiro Yamada cfg.src_addr_width = priv->dma_priv.dma_buswidth; 413c2a96987SSimon Horman if (!cfg.src_addr_width) 414c2a96987SSimon Horman cfg.src_addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES; 415c2a96987SSimon Horman cfg.dst_addr = 0; 416c2a96987SSimon Horman ret = dmaengine_slave_config(host->chan_rx, &cfg); 417c2a96987SSimon Horman if (ret < 0) 418c2a96987SSimon Horman goto ecfgrx; 419c2a96987SSimon Horman 420c2a96987SSimon Horman host->bounce_buf = (u8 *)__get_free_page(GFP_KERNEL | GFP_DMA); 421c2a96987SSimon Horman if (!host->bounce_buf) 422c2a96987SSimon Horman goto ebouncebuf; 423c2a96987SSimon Horman 42490d95106SMasahiro Yamada init_completion(&priv->dma_priv.dma_dataend); 425c2a96987SSimon Horman tasklet_init(&host->dma_issue, 426c2a96987SSimon Horman renesas_sdhi_sys_dmac_issue_tasklet_fn, 427c2a96987SSimon Horman (unsigned long)host); 428c2a96987SSimon Horman } 429c2a96987SSimon Horman 430c2a96987SSimon Horman renesas_sdhi_sys_dmac_enable_dma(host, true); 431c2a96987SSimon Horman 432c2a96987SSimon Horman return; 433c2a96987SSimon Horman 434c2a96987SSimon Horman ebouncebuf: 435c2a96987SSimon Horman ecfgrx: 436c2a96987SSimon Horman dma_release_channel(host->chan_rx); 437c2a96987SSimon Horman host->chan_rx = NULL; 438c2a96987SSimon Horman ereqrx: 439c2a96987SSimon Horman ecfgtx: 440c2a96987SSimon Horman dma_release_channel(host->chan_tx); 441c2a96987SSimon Horman host->chan_tx = NULL; 442c2a96987SSimon Horman } 443c2a96987SSimon Horman 444c2a96987SSimon Horman static void renesas_sdhi_sys_dmac_release_dma(struct tmio_mmc_host *host) 445c2a96987SSimon Horman { 446c2a96987SSimon Horman if (host->chan_tx) { 447c2a96987SSimon Horman struct dma_chan *chan = host->chan_tx; 4482fe35968SSimon Horman 449c2a96987SSimon Horman host->chan_tx = NULL; 450c2a96987SSimon Horman dma_release_channel(chan); 451c2a96987SSimon Horman } 452c2a96987SSimon Horman if (host->chan_rx) { 453c2a96987SSimon Horman struct dma_chan *chan = host->chan_rx; 4542fe35968SSimon Horman 455c2a96987SSimon Horman host->chan_rx = NULL; 456c2a96987SSimon Horman dma_release_channel(chan); 457c2a96987SSimon Horman } 458c2a96987SSimon Horman if (host->bounce_buf) { 459c2a96987SSimon Horman free_pages((unsigned long)host->bounce_buf, 0); 460c2a96987SSimon Horman host->bounce_buf = NULL; 461c2a96987SSimon Horman } 462c2a96987SSimon Horman } 463c2a96987SSimon Horman 464c2a96987SSimon Horman static const struct tmio_mmc_dma_ops renesas_sdhi_sys_dmac_dma_ops = { 465c2a96987SSimon Horman .start = renesas_sdhi_sys_dmac_start_dma, 466c2a96987SSimon Horman .enable = renesas_sdhi_sys_dmac_enable_dma, 467c2a96987SSimon Horman .request = renesas_sdhi_sys_dmac_request_dma, 468c2a96987SSimon Horman .release = renesas_sdhi_sys_dmac_release_dma, 469c2a96987SSimon Horman .abort = renesas_sdhi_sys_dmac_abort_dma, 47092d0f925SSimon Horman .dataend = renesas_sdhi_sys_dmac_dataend_dma, 471c2a96987SSimon Horman }; 472c2a96987SSimon Horman 473cd09780fSSimon Horman /* 474cd09780fSSimon Horman * Whitelist of specific R-Car Gen3 SoC ES versions to use this DMAC 475cd09780fSSimon Horman * implementation. Currently empty as all supported ES versions use 476cd09780fSSimon Horman * the internal DMAC. 477cd09780fSSimon Horman */ 478cd09780fSSimon Horman static const struct soc_device_attribute gen3_soc_whitelist[] = { 479cd09780fSSimon Horman { /* sentinel */ } 480cd09780fSSimon Horman }; 481cd09780fSSimon Horman 4829d08428aSSimon Horman static int renesas_sdhi_sys_dmac_probe(struct platform_device *pdev) 483c2a96987SSimon Horman { 4842c907f05SNiklas Söderlund if (of_device_get_match_data(&pdev->dev) == &of_rcar_gen3_compatible && 485cd09780fSSimon Horman !soc_device_match(gen3_soc_whitelist)) 486cd09780fSSimon Horman return -ENODEV; 487cd09780fSSimon Horman 4889d08428aSSimon Horman return renesas_sdhi_probe(pdev, &renesas_sdhi_sys_dmac_dma_ops); 489c2a96987SSimon Horman } 4909d08428aSSimon Horman 4919d08428aSSimon Horman static const struct dev_pm_ops renesas_sdhi_sys_dmac_dev_pm_ops = { 4929d08428aSSimon Horman SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend, 4939d08428aSSimon Horman pm_runtime_force_resume) 4949d08428aSSimon Horman SET_RUNTIME_PM_OPS(tmio_mmc_host_runtime_suspend, 4959d08428aSSimon Horman tmio_mmc_host_runtime_resume, 4969d08428aSSimon Horman NULL) 4979d08428aSSimon Horman }; 4989d08428aSSimon Horman 4999d08428aSSimon Horman static struct platform_driver renesas_sys_dmac_sdhi_driver = { 5009d08428aSSimon Horman .driver = { 5019d08428aSSimon Horman .name = "sh_mobile_sdhi", 5029d08428aSSimon Horman .pm = &renesas_sdhi_sys_dmac_dev_pm_ops, 5039d08428aSSimon Horman .of_match_table = renesas_sdhi_sys_dmac_of_match, 5049d08428aSSimon Horman }, 5059d08428aSSimon Horman .probe = renesas_sdhi_sys_dmac_probe, 5069d08428aSSimon Horman .remove = renesas_sdhi_remove, 5079d08428aSSimon Horman }; 5089d08428aSSimon Horman 5099d08428aSSimon Horman module_platform_driver(renesas_sys_dmac_sdhi_driver); 5109d08428aSSimon Horman 5119d08428aSSimon Horman MODULE_DESCRIPTION("Renesas SDHI driver"); 5129d08428aSSimon Horman MODULE_AUTHOR("Magnus Damm"); 5139d08428aSSimon Horman MODULE_LICENSE("GPL v2"); 5149d08428aSSimon Horman MODULE_ALIAS("platform:sh_mobile_sdhi"); 515