1f707079dSWolfram Sang // SPDX-License-Identifier: GPL-2.0 22a68ea78SSimon Horman /* 32a68ea78SSimon Horman * DMA support for Internal DMAC with SDHI SD/SDIO controller 42a68ea78SSimon Horman * 5f49bdcdeSWolfram Sang * Copyright (C) 2016-19 Renesas Electronics Corporation 62a68ea78SSimon Horman * Copyright (C) 2016-17 Horms Solutions, Simon Horman 7f49bdcdeSWolfram Sang * Copyright (C) 2018-19 Sang Engineering, Wolfram Sang 82a68ea78SSimon Horman */ 92a68ea78SSimon Horman 100cbc94daSWolfram Sang #include <linux/bitops.h> 112a68ea78SSimon Horman #include <linux/device.h> 122a68ea78SSimon Horman #include <linux/dma-mapping.h> 132a68ea78SSimon Horman #include <linux/io-64-nonatomic-hi-lo.h> 142a68ea78SSimon Horman #include <linux/mfd/tmio.h> 152a68ea78SSimon Horman #include <linux/mmc/host.h> 162a68ea78SSimon Horman #include <linux/mod_devicetable.h> 172a68ea78SSimon Horman #include <linux/module.h> 182a68ea78SSimon Horman #include <linux/pagemap.h> 192a68ea78SSimon Horman #include <linux/scatterlist.h> 20cd09780fSSimon Horman #include <linux/sys_soc.h> 212a68ea78SSimon Horman 222a68ea78SSimon Horman #include "renesas_sdhi.h" 232a68ea78SSimon Horman #include "tmio_mmc.h" 242a68ea78SSimon Horman 252a68ea78SSimon Horman #define DM_CM_DTRAN_MODE 0x820 262a68ea78SSimon Horman #define DM_CM_DTRAN_CTRL 0x828 272a68ea78SSimon Horman #define DM_CM_RST 0x830 282a68ea78SSimon Horman #define DM_CM_INFO1 0x840 292a68ea78SSimon Horman #define DM_CM_INFO1_MASK 0x848 302a68ea78SSimon Horman #define DM_CM_INFO2 0x850 312a68ea78SSimon Horman #define DM_CM_INFO2_MASK 0x858 322a68ea78SSimon Horman #define DM_DTRAN_ADDR 0x880 332a68ea78SSimon Horman 342a68ea78SSimon Horman /* DM_CM_DTRAN_MODE */ 352a68ea78SSimon Horman #define DTRAN_MODE_CH_NUM_CH0 0 /* "downstream" = for write commands */ 36c1ec8f86SSergei Shtylyov #define DTRAN_MODE_CH_NUM_CH1 BIT(16) /* "upstream" = for read commands */ 37c1ec8f86SSergei Shtylyov #define DTRAN_MODE_BUS_WIDTH (BIT(5) | BIT(4)) 389706b472SChris Brandt #define DTRAN_MODE_ADDR_MODE BIT(0) /* 1 = Increment address, 0 = Fixed */ 392a68ea78SSimon Horman 402a68ea78SSimon Horman /* DM_CM_DTRAN_CTRL */ 412a68ea78SSimon Horman #define DTRAN_CTRL_DM_START BIT(0) 422a68ea78SSimon Horman 432a68ea78SSimon Horman /* DM_CM_RST */ 442a68ea78SSimon Horman #define RST_DTRANRST1 BIT(9) 452a68ea78SSimon Horman #define RST_DTRANRST0 BIT(8) 469faf870eSSergei Shtylyov #define RST_RESERVED_BITS GENMASK_ULL(31, 0) 472a68ea78SSimon Horman 482a68ea78SSimon Horman /* DM_CM_INFO1 and DM_CM_INFO1_MASK */ 492a68ea78SSimon Horman #define INFO1_CLEAR 0 50d2332f88SSergei Shtylyov #define INFO1_MASK_CLEAR GENMASK_ULL(31, 0) 512a68ea78SSimon Horman #define INFO1_DTRANEND1 BIT(17) 522a68ea78SSimon Horman #define INFO1_DTRANEND0 BIT(16) 532a68ea78SSimon Horman 542a68ea78SSimon Horman /* DM_CM_INFO2 and DM_CM_INFO2_MASK */ 55d2332f88SSergei Shtylyov #define INFO2_MASK_CLEAR GENMASK_ULL(31, 0) 562a68ea78SSimon Horman #define INFO2_DTRANERR1 BIT(17) 572a68ea78SSimon Horman #define INFO2_DTRANERR0 BIT(16) 582a68ea78SSimon Horman 5969e7d76aSYoshihiro Shimoda enum renesas_sdhi_dma_cookie { 6069e7d76aSYoshihiro Shimoda COOKIE_UNMAPPED, 6169e7d76aSYoshihiro Shimoda COOKIE_PRE_MAPPED, 6269e7d76aSYoshihiro Shimoda COOKIE_MAPPED, 6369e7d76aSYoshihiro Shimoda }; 6469e7d76aSYoshihiro Shimoda 652a68ea78SSimon Horman /* 662a68ea78SSimon Horman * Specification of this driver: 672a68ea78SSimon Horman * - host->chan_{rx,tx} will be used as a flag of enabling/disabling the dma 682a68ea78SSimon Horman * - Since this SDHI DMAC register set has 16 but 32-bit width, we 692a68ea78SSimon Horman * need a custom accessor. 702a68ea78SSimon Horman */ 712a68ea78SSimon Horman 720cbc94daSWolfram Sang static unsigned long global_flags; 730cbc94daSWolfram Sang /* 740cbc94daSWolfram Sang * Workaround for avoiding to use RX DMAC by multiple channels. 750cbc94daSWolfram Sang * On R-Car H3 ES1.* and M3-W ES1.0, when multiple SDHI channels use 760cbc94daSWolfram Sang * RX DMAC simultaneously, sometimes hundreds of bytes data are not 770cbc94daSWolfram Sang * stored into the system memory even if the DMAC interrupt happened. 780cbc94daSWolfram Sang * So, this driver then uses one RX DMAC channel only. 790cbc94daSWolfram Sang */ 800cbc94daSWolfram Sang #define SDHI_INTERNAL_DMAC_ONE_RX_ONLY 0 810cbc94daSWolfram Sang #define SDHI_INTERNAL_DMAC_RX_IN_USE 1 820cbc94daSWolfram Sang 839706b472SChris Brandt /* RZ/A2 does not have the ADRR_MODE bit */ 849706b472SChris Brandt #define SDHI_INTERNAL_DMAC_ADDR_MODE_FIXED_ONLY 2 859706b472SChris Brandt 862a68ea78SSimon Horman /* Definitions for sampling clocks */ 872a68ea78SSimon Horman static struct renesas_sdhi_scc rcar_gen3_scc_taps[] = { 882a68ea78SSimon Horman { 892a68ea78SSimon Horman .clk_rate = 0, 902a68ea78SSimon Horman .tap = 0x00000300, 91c1a49782SWolfram Sang .tap_hs400_4tap = 0x00000100, 922a68ea78SSimon Horman }, 932a68ea78SSimon Horman }; 942a68ea78SSimon Horman 959706b472SChris Brandt static const struct renesas_sdhi_of_data of_rza2_compatible = { 969706b472SChris Brandt .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_CLK_ACTUAL | 979706b472SChris Brandt TMIO_MMC_HAVE_CBSY, 989706b472SChris Brandt .tmio_ocr_mask = MMC_VDD_32_33, 999706b472SChris Brandt .capabilities = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ | 100*87e985aeSWolfram Sang MMC_CAP_CMD23 | MMC_CAP_WAIT_WHILE_BUSY, 1019706b472SChris Brandt .bus_shift = 2, 1029706b472SChris Brandt .scc_offset = 0 - 0x1000, 1039706b472SChris Brandt .taps = rcar_gen3_scc_taps, 1049706b472SChris Brandt .taps_num = ARRAY_SIZE(rcar_gen3_scc_taps), 1052a55c1eaSWolfram Sang /* DMAC can handle 32bit blk count but only 1 segment */ 1062a55c1eaSWolfram Sang .max_blk_count = UINT_MAX / TMIO_MAX_BLK_SIZE, 1079706b472SChris Brandt .max_segs = 1, 1089706b472SChris Brandt }; 1099706b472SChris Brandt 1102a68ea78SSimon Horman static const struct renesas_sdhi_of_data of_rcar_gen3_compatible = { 1112ad1db05SMasahiro Yamada .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_CLK_ACTUAL | 1122ad1db05SMasahiro Yamada TMIO_MMC_HAVE_CBSY | TMIO_MMC_MIN_RCAR2, 1132a68ea78SSimon Horman .capabilities = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ | 114*87e985aeSWolfram Sang MMC_CAP_CMD23 | MMC_CAP_WAIT_WHILE_BUSY, 115c7d9eccbSYoshihiro Shimoda .capabilities2 = MMC_CAP2_NO_WRITE_PROTECT | MMC_CAP2_MERGE_CAPABLE, 1162a68ea78SSimon Horman .bus_shift = 2, 1172a68ea78SSimon Horman .scc_offset = 0x1000, 1182a68ea78SSimon Horman .taps = rcar_gen3_scc_taps, 1192a68ea78SSimon Horman .taps_num = ARRAY_SIZE(rcar_gen3_scc_taps), 1202a55c1eaSWolfram Sang /* DMAC can handle 32bit blk count but only 1 segment */ 1212a55c1eaSWolfram Sang .max_blk_count = UINT_MAX / TMIO_MAX_BLK_SIZE, 1222a68ea78SSimon Horman .max_segs = 1, 1232a68ea78SSimon Horman }; 1242a68ea78SSimon Horman 1252a68ea78SSimon Horman static const struct of_device_id renesas_sdhi_internal_dmac_of_match[] = { 1269706b472SChris Brandt { .compatible = "renesas,sdhi-r7s9210", .data = &of_rza2_compatible, }, 12760ab43baSFabrizio Castro { .compatible = "renesas,sdhi-mmc-r8a77470", .data = &of_rcar_gen3_compatible, }, 1282c907f05SNiklas Söderlund { .compatible = "renesas,sdhi-r8a7795", .data = &of_rcar_gen3_compatible, }, 1292c907f05SNiklas Söderlund { .compatible = "renesas,sdhi-r8a7796", .data = &of_rcar_gen3_compatible, }, 130d6dc425aSSimon Horman { .compatible = "renesas,rcar-gen3-sdhi", .data = &of_rcar_gen3_compatible, }, 1312a68ea78SSimon Horman {}, 1322a68ea78SSimon Horman }; 1332a68ea78SSimon Horman MODULE_DEVICE_TABLE(of, renesas_sdhi_internal_dmac_of_match); 1342a68ea78SSimon Horman 1352a68ea78SSimon Horman static void 1362a68ea78SSimon Horman renesas_sdhi_internal_dmac_dm_write(struct tmio_mmc_host *host, 1372a68ea78SSimon Horman int addr, u64 val) 1382a68ea78SSimon Horman { 1392a68ea78SSimon Horman writeq(val, host->ctl + addr); 1402a68ea78SSimon Horman } 1412a68ea78SSimon Horman 1422a68ea78SSimon Horman static void 1432a68ea78SSimon Horman renesas_sdhi_internal_dmac_enable_dma(struct tmio_mmc_host *host, bool enable) 1442a68ea78SSimon Horman { 145058db286SMasahiro Yamada struct renesas_sdhi *priv = host_to_priv(host); 146058db286SMasahiro Yamada 1472a68ea78SSimon Horman if (!host->chan_tx || !host->chan_rx) 1482a68ea78SSimon Horman return; 1492a68ea78SSimon Horman 1502a68ea78SSimon Horman if (!enable) 1512a68ea78SSimon Horman renesas_sdhi_internal_dmac_dm_write(host, DM_CM_INFO1, 1522a68ea78SSimon Horman INFO1_CLEAR); 1532a68ea78SSimon Horman 154058db286SMasahiro Yamada if (priv->dma_priv.enable) 155058db286SMasahiro Yamada priv->dma_priv.enable(host, enable); 1562a68ea78SSimon Horman } 1572a68ea78SSimon Horman 1582a68ea78SSimon Horman static void 1592a68ea78SSimon Horman renesas_sdhi_internal_dmac_abort_dma(struct tmio_mmc_host *host) { 1602a68ea78SSimon Horman u64 val = RST_DTRANRST1 | RST_DTRANRST0; 1612a68ea78SSimon Horman 1622a68ea78SSimon Horman renesas_sdhi_internal_dmac_enable_dma(host, false); 1632a68ea78SSimon Horman 1642a68ea78SSimon Horman renesas_sdhi_internal_dmac_dm_write(host, DM_CM_RST, 1652a68ea78SSimon Horman RST_RESERVED_BITS & ~val); 1662a68ea78SSimon Horman renesas_sdhi_internal_dmac_dm_write(host, DM_CM_RST, 1672a68ea78SSimon Horman RST_RESERVED_BITS | val); 1682a68ea78SSimon Horman 1690cbc94daSWolfram Sang clear_bit(SDHI_INTERNAL_DMAC_RX_IN_USE, &global_flags); 1700cbc94daSWolfram Sang 1712a68ea78SSimon Horman renesas_sdhi_internal_dmac_enable_dma(host, true); 1722a68ea78SSimon Horman } 1732a68ea78SSimon Horman 1742a68ea78SSimon Horman static void 1752a68ea78SSimon Horman renesas_sdhi_internal_dmac_dataend_dma(struct tmio_mmc_host *host) { 17690d95106SMasahiro Yamada struct renesas_sdhi *priv = host_to_priv(host); 17790d95106SMasahiro Yamada 17890d95106SMasahiro Yamada tasklet_schedule(&priv->dma_priv.dma_complete); 1792a68ea78SSimon Horman } 1802a68ea78SSimon Horman 18169e7d76aSYoshihiro Shimoda /* 18269e7d76aSYoshihiro Shimoda * renesas_sdhi_internal_dmac_map() will be called with two difference 18369e7d76aSYoshihiro Shimoda * sg pointers in two mmc_data by .pre_req(), but tmio host can have a single 18469e7d76aSYoshihiro Shimoda * sg_ptr only. So, renesas_sdhi_internal_dmac_{un}map() should use a sg 18569e7d76aSYoshihiro Shimoda * pointer in a mmc_data instead of host->sg_ptr. 18669e7d76aSYoshihiro Shimoda */ 18769e7d76aSYoshihiro Shimoda static void 18869e7d76aSYoshihiro Shimoda renesas_sdhi_internal_dmac_unmap(struct tmio_mmc_host *host, 18969e7d76aSYoshihiro Shimoda struct mmc_data *data, 19069e7d76aSYoshihiro Shimoda enum renesas_sdhi_dma_cookie cookie) 19169e7d76aSYoshihiro Shimoda { 19269e7d76aSYoshihiro Shimoda bool unmap = cookie == COOKIE_UNMAPPED ? (data->host_cookie != cookie) : 19369e7d76aSYoshihiro Shimoda (data->host_cookie == cookie); 19469e7d76aSYoshihiro Shimoda 19569e7d76aSYoshihiro Shimoda if (unmap) { 19669e7d76aSYoshihiro Shimoda dma_unmap_sg(&host->pdev->dev, data->sg, data->sg_len, 19769e7d76aSYoshihiro Shimoda mmc_get_dma_dir(data)); 19869e7d76aSYoshihiro Shimoda data->host_cookie = COOKIE_UNMAPPED; 19969e7d76aSYoshihiro Shimoda } 20069e7d76aSYoshihiro Shimoda } 20169e7d76aSYoshihiro Shimoda 20269e7d76aSYoshihiro Shimoda static bool 20369e7d76aSYoshihiro Shimoda renesas_sdhi_internal_dmac_map(struct tmio_mmc_host *host, 20469e7d76aSYoshihiro Shimoda struct mmc_data *data, 20569e7d76aSYoshihiro Shimoda enum renesas_sdhi_dma_cookie cookie) 20669e7d76aSYoshihiro Shimoda { 20769e7d76aSYoshihiro Shimoda if (data->host_cookie == COOKIE_PRE_MAPPED) 20869e7d76aSYoshihiro Shimoda return true; 20969e7d76aSYoshihiro Shimoda 21069e7d76aSYoshihiro Shimoda if (!dma_map_sg(&host->pdev->dev, data->sg, data->sg_len, 21169e7d76aSYoshihiro Shimoda mmc_get_dma_dir(data))) 21269e7d76aSYoshihiro Shimoda return false; 21369e7d76aSYoshihiro Shimoda 21469e7d76aSYoshihiro Shimoda data->host_cookie = cookie; 21569e7d76aSYoshihiro Shimoda 21669e7d76aSYoshihiro Shimoda /* This DMAC cannot handle if buffer is not 128-bytes alignment */ 21769e7d76aSYoshihiro Shimoda if (!IS_ALIGNED(sg_dma_address(data->sg), 128)) { 21869e7d76aSYoshihiro Shimoda renesas_sdhi_internal_dmac_unmap(host, data, cookie); 21969e7d76aSYoshihiro Shimoda return false; 22069e7d76aSYoshihiro Shimoda } 22169e7d76aSYoshihiro Shimoda 22269e7d76aSYoshihiro Shimoda return true; 22369e7d76aSYoshihiro Shimoda } 22469e7d76aSYoshihiro Shimoda 2252a68ea78SSimon Horman static void 2262a68ea78SSimon Horman renesas_sdhi_internal_dmac_start_dma(struct tmio_mmc_host *host, 2272a68ea78SSimon Horman struct mmc_data *data) 2282a68ea78SSimon Horman { 2292a68ea78SSimon Horman struct scatterlist *sg = host->sg_ptr; 2309706b472SChris Brandt u32 dtran_mode = DTRAN_MODE_BUS_WIDTH; 2319706b472SChris Brandt 2329706b472SChris Brandt if (!test_bit(SDHI_INTERNAL_DMAC_ADDR_MODE_FIXED_ONLY, &global_flags)) 2339706b472SChris Brandt dtran_mode |= DTRAN_MODE_ADDR_MODE; 2342a68ea78SSimon Horman 23569e7d76aSYoshihiro Shimoda if (!renesas_sdhi_internal_dmac_map(host, data, COOKIE_MAPPED)) 23648e1dc10SYoshihiro Shimoda goto force_pio; 2372a68ea78SSimon Horman 2382a68ea78SSimon Horman if (data->flags & MMC_DATA_READ) { 2392a68ea78SSimon Horman dtran_mode |= DTRAN_MODE_CH_NUM_CH1; 2400cbc94daSWolfram Sang if (test_bit(SDHI_INTERNAL_DMAC_ONE_RX_ONLY, &global_flags) && 2410cbc94daSWolfram Sang test_and_set_bit(SDHI_INTERNAL_DMAC_RX_IN_USE, &global_flags)) 242fe6e0494SYoshihiro Shimoda goto force_pio_with_unmap; 2432a68ea78SSimon Horman } else { 2442a68ea78SSimon Horman dtran_mode |= DTRAN_MODE_CH_NUM_CH0; 2452a68ea78SSimon Horman } 2462a68ea78SSimon Horman 2472a68ea78SSimon Horman renesas_sdhi_internal_dmac_enable_dma(host, true); 2482a68ea78SSimon Horman 2492a68ea78SSimon Horman /* set dma parameters */ 2502a68ea78SSimon Horman renesas_sdhi_internal_dmac_dm_write(host, DM_CM_DTRAN_MODE, 2512a68ea78SSimon Horman dtran_mode); 2522a68ea78SSimon Horman renesas_sdhi_internal_dmac_dm_write(host, DM_DTRAN_ADDR, 253a028b435SNiklas Söderlund sg_dma_address(sg)); 25448e1dc10SYoshihiro Shimoda 255d3dd5db0SMasahiro Yamada host->dma_on = true; 256d3dd5db0SMasahiro Yamada 25748e1dc10SYoshihiro Shimoda return; 25848e1dc10SYoshihiro Shimoda 259fe6e0494SYoshihiro Shimoda force_pio_with_unmap: 26069e7d76aSYoshihiro Shimoda renesas_sdhi_internal_dmac_unmap(host, data, COOKIE_UNMAPPED); 261fe6e0494SYoshihiro Shimoda 26248e1dc10SYoshihiro Shimoda force_pio: 26348e1dc10SYoshihiro Shimoda renesas_sdhi_internal_dmac_enable_dma(host, false); 2642a68ea78SSimon Horman } 2652a68ea78SSimon Horman 2662a68ea78SSimon Horman static void renesas_sdhi_internal_dmac_issue_tasklet_fn(unsigned long arg) 2672a68ea78SSimon Horman { 2682a68ea78SSimon Horman struct tmio_mmc_host *host = (struct tmio_mmc_host *)arg; 2692a68ea78SSimon Horman 2702a68ea78SSimon Horman tmio_mmc_enable_mmc_irqs(host, TMIO_STAT_DATAEND); 2712a68ea78SSimon Horman 2722a68ea78SSimon Horman /* start the DMAC */ 2732a68ea78SSimon Horman renesas_sdhi_internal_dmac_dm_write(host, DM_CM_DTRAN_CTRL, 2742a68ea78SSimon Horman DTRAN_CTRL_DM_START); 2752a68ea78SSimon Horman } 2762a68ea78SSimon Horman 2772b26e34eSYoshihiro Shimoda static bool renesas_sdhi_internal_dmac_complete(struct tmio_mmc_host *host) 2782a68ea78SSimon Horman { 2792a68ea78SSimon Horman enum dma_data_direction dir; 2802a68ea78SSimon Horman 28158a91d96SYoshihiro Shimoda if (!host->dma_on) 28258a91d96SYoshihiro Shimoda return false; 28358a91d96SYoshihiro Shimoda 2842a68ea78SSimon Horman if (!host->data) 2852b26e34eSYoshihiro Shimoda return false; 2862a68ea78SSimon Horman 2872a68ea78SSimon Horman if (host->data->flags & MMC_DATA_READ) 2882a68ea78SSimon Horman dir = DMA_FROM_DEVICE; 2892a68ea78SSimon Horman else 2902a68ea78SSimon Horman dir = DMA_TO_DEVICE; 2912a68ea78SSimon Horman 2922a68ea78SSimon Horman renesas_sdhi_internal_dmac_enable_dma(host, false); 29369e7d76aSYoshihiro Shimoda renesas_sdhi_internal_dmac_unmap(host, host->data, COOKIE_MAPPED); 2942a68ea78SSimon Horman 2950cbc94daSWolfram Sang if (dir == DMA_FROM_DEVICE) 2960cbc94daSWolfram Sang clear_bit(SDHI_INTERNAL_DMAC_RX_IN_USE, &global_flags); 2970cbc94daSWolfram Sang 29858a91d96SYoshihiro Shimoda host->dma_on = false; 29958a91d96SYoshihiro Shimoda 3002b26e34eSYoshihiro Shimoda return true; 3012b26e34eSYoshihiro Shimoda } 3022b26e34eSYoshihiro Shimoda 3032b26e34eSYoshihiro Shimoda static void renesas_sdhi_internal_dmac_complete_tasklet_fn(unsigned long arg) 3042b26e34eSYoshihiro Shimoda { 3052b26e34eSYoshihiro Shimoda struct tmio_mmc_host *host = (struct tmio_mmc_host *)arg; 3062b26e34eSYoshihiro Shimoda 3072b26e34eSYoshihiro Shimoda spin_lock_irq(&host->lock); 3082b26e34eSYoshihiro Shimoda if (!renesas_sdhi_internal_dmac_complete(host)) 3092b26e34eSYoshihiro Shimoda goto out; 3102b26e34eSYoshihiro Shimoda 3112a68ea78SSimon Horman tmio_mmc_do_data_irq(host); 3122a68ea78SSimon Horman out: 3132a68ea78SSimon Horman spin_unlock_irq(&host->lock); 3142a68ea78SSimon Horman } 3152a68ea78SSimon Horman 31658a91d96SYoshihiro Shimoda static void renesas_sdhi_internal_dmac_end_dma(struct tmio_mmc_host *host) 31758a91d96SYoshihiro Shimoda { 31858a91d96SYoshihiro Shimoda if (host->data) 31958a91d96SYoshihiro Shimoda renesas_sdhi_internal_dmac_complete(host); 32058a91d96SYoshihiro Shimoda } 32158a91d96SYoshihiro Shimoda 32269e7d76aSYoshihiro Shimoda static void renesas_sdhi_internal_dmac_post_req(struct mmc_host *mmc, 32369e7d76aSYoshihiro Shimoda struct mmc_request *mrq, 32469e7d76aSYoshihiro Shimoda int err) 32569e7d76aSYoshihiro Shimoda { 32669e7d76aSYoshihiro Shimoda struct tmio_mmc_host *host = mmc_priv(mmc); 32769e7d76aSYoshihiro Shimoda struct mmc_data *data = mrq->data; 32869e7d76aSYoshihiro Shimoda 32969e7d76aSYoshihiro Shimoda if (!data) 33069e7d76aSYoshihiro Shimoda return; 33169e7d76aSYoshihiro Shimoda 33269e7d76aSYoshihiro Shimoda renesas_sdhi_internal_dmac_unmap(host, data, COOKIE_UNMAPPED); 33369e7d76aSYoshihiro Shimoda } 33469e7d76aSYoshihiro Shimoda 33569e7d76aSYoshihiro Shimoda static void renesas_sdhi_internal_dmac_pre_req(struct mmc_host *mmc, 33669e7d76aSYoshihiro Shimoda struct mmc_request *mrq) 33769e7d76aSYoshihiro Shimoda { 33869e7d76aSYoshihiro Shimoda struct tmio_mmc_host *host = mmc_priv(mmc); 33969e7d76aSYoshihiro Shimoda struct mmc_data *data = mrq->data; 34069e7d76aSYoshihiro Shimoda 34169e7d76aSYoshihiro Shimoda if (!data) 34269e7d76aSYoshihiro Shimoda return; 34369e7d76aSYoshihiro Shimoda 34469e7d76aSYoshihiro Shimoda data->host_cookie = COOKIE_UNMAPPED; 34569e7d76aSYoshihiro Shimoda renesas_sdhi_internal_dmac_map(host, data, COOKIE_PRE_MAPPED); 34669e7d76aSYoshihiro Shimoda } 34769e7d76aSYoshihiro Shimoda 3482a68ea78SSimon Horman static void 3492a68ea78SSimon Horman renesas_sdhi_internal_dmac_request_dma(struct tmio_mmc_host *host, 3502a68ea78SSimon Horman struct tmio_mmc_data *pdata) 3512a68ea78SSimon Horman { 35290d95106SMasahiro Yamada struct renesas_sdhi *priv = host_to_priv(host); 35390d95106SMasahiro Yamada 354d2332f88SSergei Shtylyov /* Disable DMAC interrupts, we don't use them */ 355d2332f88SSergei Shtylyov renesas_sdhi_internal_dmac_dm_write(host, DM_CM_INFO1_MASK, 356d2332f88SSergei Shtylyov INFO1_MASK_CLEAR); 357d2332f88SSergei Shtylyov renesas_sdhi_internal_dmac_dm_write(host, DM_CM_INFO2_MASK, 358d2332f88SSergei Shtylyov INFO2_MASK_CLEAR); 359d2332f88SSergei Shtylyov 3602a68ea78SSimon Horman /* Each value is set to non-zero to assume "enabling" each DMA */ 3612a68ea78SSimon Horman host->chan_rx = host->chan_tx = (void *)0xdeadbeaf; 3622a68ea78SSimon Horman 36390d95106SMasahiro Yamada tasklet_init(&priv->dma_priv.dma_complete, 3642a68ea78SSimon Horman renesas_sdhi_internal_dmac_complete_tasklet_fn, 3652a68ea78SSimon Horman (unsigned long)host); 3662a68ea78SSimon Horman tasklet_init(&host->dma_issue, 3672a68ea78SSimon Horman renesas_sdhi_internal_dmac_issue_tasklet_fn, 3682a68ea78SSimon Horman (unsigned long)host); 36969e7d76aSYoshihiro Shimoda 37069e7d76aSYoshihiro Shimoda /* Add pre_req and post_req */ 37169e7d76aSYoshihiro Shimoda host->ops.pre_req = renesas_sdhi_internal_dmac_pre_req; 37269e7d76aSYoshihiro Shimoda host->ops.post_req = renesas_sdhi_internal_dmac_post_req; 3732a68ea78SSimon Horman } 3742a68ea78SSimon Horman 3752a68ea78SSimon Horman static void 3762a68ea78SSimon Horman renesas_sdhi_internal_dmac_release_dma(struct tmio_mmc_host *host) 3772a68ea78SSimon Horman { 3782a68ea78SSimon Horman /* Each value is set to zero to assume "disabling" each DMA */ 3792a68ea78SSimon Horman host->chan_rx = host->chan_tx = NULL; 3802a68ea78SSimon Horman } 3812a68ea78SSimon Horman 38210154068SJulia Lawall static const struct tmio_mmc_dma_ops renesas_sdhi_internal_dmac_dma_ops = { 3832a68ea78SSimon Horman .start = renesas_sdhi_internal_dmac_start_dma, 3842a68ea78SSimon Horman .enable = renesas_sdhi_internal_dmac_enable_dma, 3852a68ea78SSimon Horman .request = renesas_sdhi_internal_dmac_request_dma, 3862a68ea78SSimon Horman .release = renesas_sdhi_internal_dmac_release_dma, 3872a68ea78SSimon Horman .abort = renesas_sdhi_internal_dmac_abort_dma, 3882a68ea78SSimon Horman .dataend = renesas_sdhi_internal_dmac_dataend_dma, 38958a91d96SYoshihiro Shimoda .end = renesas_sdhi_internal_dmac_end_dma, 3902a68ea78SSimon Horman }; 3912a68ea78SSimon Horman 392cd09780fSSimon Horman /* 393cd09780fSSimon Horman * Whitelist of specific R-Car Gen3 SoC ES versions to use this DMAC 394cd09780fSSimon Horman * implementation as others may use a different implementation. 395cd09780fSSimon Horman */ 396a0fb3fc8SWolfram Sang static const struct soc_device_attribute soc_dma_quirks[] = { 3979706b472SChris Brandt { .soc_id = "r7s9210", 3989706b472SChris Brandt .data = (void *)BIT(SDHI_INTERNAL_DMAC_ADDR_MODE_FIXED_ONLY) }, 3990cbc94daSWolfram Sang { .soc_id = "r8a7795", .revision = "ES1.*", 4000cbc94daSWolfram Sang .data = (void *)BIT(SDHI_INTERNAL_DMAC_ONE_RX_ONLY) }, 4010cbc94daSWolfram Sang { .soc_id = "r8a7796", .revision = "ES1.0", 4020cbc94daSWolfram Sang .data = (void *)BIT(SDHI_INTERNAL_DMAC_ONE_RX_ONLY) }, 403cd09780fSSimon Horman { /* sentinel */ } 404cd09780fSSimon Horman }; 405cd09780fSSimon Horman 4062a68ea78SSimon Horman static int renesas_sdhi_internal_dmac_probe(struct platform_device *pdev) 4072a68ea78SSimon Horman { 408a0fb3fc8SWolfram Sang const struct soc_device_attribute *soc = soc_device_match(soc_dma_quirks); 40954541815SNiklas Söderlund struct device *dev = &pdev->dev; 4100cbc94daSWolfram Sang 411a0fb3fc8SWolfram Sang if (soc) 4120cbc94daSWolfram Sang global_flags |= (unsigned long)soc->data; 4130cbc94daSWolfram Sang 41454541815SNiklas Söderlund /* value is max of SD_SECCNT. Confirmed by HW engineers */ 41554541815SNiklas Söderlund dma_set_max_seg_size(dev, 0xffffffff); 41654541815SNiklas Söderlund 4172a68ea78SSimon Horman return renesas_sdhi_probe(pdev, &renesas_sdhi_internal_dmac_dma_ops); 4182a68ea78SSimon Horman } 4192a68ea78SSimon Horman 4202a68ea78SSimon Horman static const struct dev_pm_ops renesas_sdhi_internal_dmac_dev_pm_ops = { 4212a68ea78SSimon Horman SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend, 4222a68ea78SSimon Horman pm_runtime_force_resume) 4232a68ea78SSimon Horman SET_RUNTIME_PM_OPS(tmio_mmc_host_runtime_suspend, 4242a68ea78SSimon Horman tmio_mmc_host_runtime_resume, 4252a68ea78SSimon Horman NULL) 4262a68ea78SSimon Horman }; 4272a68ea78SSimon Horman 4282a68ea78SSimon Horman static struct platform_driver renesas_internal_dmac_sdhi_driver = { 4292a68ea78SSimon Horman .driver = { 4302a68ea78SSimon Horman .name = "renesas_sdhi_internal_dmac", 4317320915cSDouglas Anderson .probe_type = PROBE_PREFER_ASYNCHRONOUS, 4322a68ea78SSimon Horman .pm = &renesas_sdhi_internal_dmac_dev_pm_ops, 4332a68ea78SSimon Horman .of_match_table = renesas_sdhi_internal_dmac_of_match, 4342a68ea78SSimon Horman }, 4352a68ea78SSimon Horman .probe = renesas_sdhi_internal_dmac_probe, 4362a68ea78SSimon Horman .remove = renesas_sdhi_remove, 4372a68ea78SSimon Horman }; 4382a68ea78SSimon Horman 4392a68ea78SSimon Horman module_platform_driver(renesas_internal_dmac_sdhi_driver); 4402a68ea78SSimon Horman 4412a68ea78SSimon Horman MODULE_DESCRIPTION("Renesas SDHI driver for internal DMAC"); 4422a68ea78SSimon Horman MODULE_AUTHOR("Yoshihiro Shimoda"); 4432a68ea78SSimon Horman MODULE_LICENSE("GPL v2"); 444