1f707079dSWolfram Sang // SPDX-License-Identifier: GPL-2.0 22a68ea78SSimon Horman /* 32a68ea78SSimon Horman * DMA support for Internal DMAC with SDHI SD/SDIO controller 42a68ea78SSimon Horman * 5f49bdcdeSWolfram Sang * Copyright (C) 2016-19 Renesas Electronics Corporation 62a68ea78SSimon Horman * Copyright (C) 2016-17 Horms Solutions, Simon Horman 7f49bdcdeSWolfram Sang * Copyright (C) 2018-19 Sang Engineering, Wolfram Sang 82a68ea78SSimon Horman */ 92a68ea78SSimon Horman 100cbc94daSWolfram Sang #include <linux/bitops.h> 112a68ea78SSimon Horman #include <linux/device.h> 122a68ea78SSimon Horman #include <linux/dma-mapping.h> 132a68ea78SSimon Horman #include <linux/io-64-nonatomic-hi-lo.h> 142a68ea78SSimon Horman #include <linux/mfd/tmio.h> 152a68ea78SSimon Horman #include <linux/mmc/host.h> 162a68ea78SSimon Horman #include <linux/mod_devicetable.h> 172a68ea78SSimon Horman #include <linux/module.h> 182a68ea78SSimon Horman #include <linux/pagemap.h> 192a68ea78SSimon Horman #include <linux/scatterlist.h> 20cd09780fSSimon Horman #include <linux/sys_soc.h> 212a68ea78SSimon Horman 222a68ea78SSimon Horman #include "renesas_sdhi.h" 232a68ea78SSimon Horman #include "tmio_mmc.h" 242a68ea78SSimon Horman 252a68ea78SSimon Horman #define DM_CM_DTRAN_MODE 0x820 262a68ea78SSimon Horman #define DM_CM_DTRAN_CTRL 0x828 272a68ea78SSimon Horman #define DM_CM_RST 0x830 282a68ea78SSimon Horman #define DM_CM_INFO1 0x840 292a68ea78SSimon Horman #define DM_CM_INFO1_MASK 0x848 302a68ea78SSimon Horman #define DM_CM_INFO2 0x850 312a68ea78SSimon Horman #define DM_CM_INFO2_MASK 0x858 322a68ea78SSimon Horman #define DM_DTRAN_ADDR 0x880 332a68ea78SSimon Horman 342a68ea78SSimon Horman /* DM_CM_DTRAN_MODE */ 352a68ea78SSimon Horman #define DTRAN_MODE_CH_NUM_CH0 0 /* "downstream" = for write commands */ 36c1ec8f86SSergei Shtylyov #define DTRAN_MODE_CH_NUM_CH1 BIT(16) /* "upstream" = for read commands */ 37c1ec8f86SSergei Shtylyov #define DTRAN_MODE_BUS_WIDTH (BIT(5) | BIT(4)) 389706b472SChris Brandt #define DTRAN_MODE_ADDR_MODE BIT(0) /* 1 = Increment address, 0 = Fixed */ 392a68ea78SSimon Horman 402a68ea78SSimon Horman /* DM_CM_DTRAN_CTRL */ 412a68ea78SSimon Horman #define DTRAN_CTRL_DM_START BIT(0) 422a68ea78SSimon Horman 432a68ea78SSimon Horman /* DM_CM_RST */ 442a68ea78SSimon Horman #define RST_DTRANRST1 BIT(9) 452a68ea78SSimon Horman #define RST_DTRANRST0 BIT(8) 469faf870eSSergei Shtylyov #define RST_RESERVED_BITS GENMASK_ULL(31, 0) 472a68ea78SSimon Horman 482a68ea78SSimon Horman /* DM_CM_INFO1 and DM_CM_INFO1_MASK */ 492a68ea78SSimon Horman #define INFO1_CLEAR 0 50d2332f88SSergei Shtylyov #define INFO1_MASK_CLEAR GENMASK_ULL(31, 0) 512a68ea78SSimon Horman #define INFO1_DTRANEND1 BIT(17) 522a68ea78SSimon Horman #define INFO1_DTRANEND0 BIT(16) 532a68ea78SSimon Horman 542a68ea78SSimon Horman /* DM_CM_INFO2 and DM_CM_INFO2_MASK */ 55d2332f88SSergei Shtylyov #define INFO2_MASK_CLEAR GENMASK_ULL(31, 0) 562a68ea78SSimon Horman #define INFO2_DTRANERR1 BIT(17) 572a68ea78SSimon Horman #define INFO2_DTRANERR0 BIT(16) 582a68ea78SSimon Horman 592a68ea78SSimon Horman /* 602a68ea78SSimon Horman * Specification of this driver: 612a68ea78SSimon Horman * - host->chan_{rx,tx} will be used as a flag of enabling/disabling the dma 622a68ea78SSimon Horman * - Since this SDHI DMAC register set has 16 but 32-bit width, we 632a68ea78SSimon Horman * need a custom accessor. 642a68ea78SSimon Horman */ 652a68ea78SSimon Horman 660cbc94daSWolfram Sang static unsigned long global_flags; 670cbc94daSWolfram Sang /* 680cbc94daSWolfram Sang * Workaround for avoiding to use RX DMAC by multiple channels. 690cbc94daSWolfram Sang * On R-Car H3 ES1.* and M3-W ES1.0, when multiple SDHI channels use 700cbc94daSWolfram Sang * RX DMAC simultaneously, sometimes hundreds of bytes data are not 710cbc94daSWolfram Sang * stored into the system memory even if the DMAC interrupt happened. 720cbc94daSWolfram Sang * So, this driver then uses one RX DMAC channel only. 730cbc94daSWolfram Sang */ 740cbc94daSWolfram Sang #define SDHI_INTERNAL_DMAC_ONE_RX_ONLY 0 750cbc94daSWolfram Sang #define SDHI_INTERNAL_DMAC_RX_IN_USE 1 760cbc94daSWolfram Sang 779706b472SChris Brandt /* RZ/A2 does not have the ADRR_MODE bit */ 789706b472SChris Brandt #define SDHI_INTERNAL_DMAC_ADDR_MODE_FIXED_ONLY 2 799706b472SChris Brandt 802a68ea78SSimon Horman /* Definitions for sampling clocks */ 812a68ea78SSimon Horman static struct renesas_sdhi_scc rcar_gen3_scc_taps[] = { 822a68ea78SSimon Horman { 832a68ea78SSimon Horman .clk_rate = 0, 842a68ea78SSimon Horman .tap = 0x00000300, 85c1a49782SWolfram Sang .tap_hs400_4tap = 0x00000100, 862a68ea78SSimon Horman }, 872a68ea78SSimon Horman }; 882a68ea78SSimon Horman 899706b472SChris Brandt static const struct renesas_sdhi_of_data of_rza2_compatible = { 909706b472SChris Brandt .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_CLK_ACTUAL | 919706b472SChris Brandt TMIO_MMC_HAVE_CBSY, 929706b472SChris Brandt .tmio_ocr_mask = MMC_VDD_32_33, 939706b472SChris Brandt .capabilities = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ | 949706b472SChris Brandt MMC_CAP_CMD23, 959706b472SChris Brandt .bus_shift = 2, 969706b472SChris Brandt .scc_offset = 0 - 0x1000, 979706b472SChris Brandt .taps = rcar_gen3_scc_taps, 989706b472SChris Brandt .taps_num = ARRAY_SIZE(rcar_gen3_scc_taps), 992a55c1eaSWolfram Sang /* DMAC can handle 32bit blk count but only 1 segment */ 1002a55c1eaSWolfram Sang .max_blk_count = UINT_MAX / TMIO_MAX_BLK_SIZE, 1019706b472SChris Brandt .max_segs = 1, 1029706b472SChris Brandt }; 1039706b472SChris Brandt 1042a68ea78SSimon Horman static const struct renesas_sdhi_of_data of_rcar_gen3_compatible = { 1052ad1db05SMasahiro Yamada .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_CLK_ACTUAL | 1062ad1db05SMasahiro Yamada TMIO_MMC_HAVE_CBSY | TMIO_MMC_MIN_RCAR2, 1072a68ea78SSimon Horman .capabilities = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ | 1082a68ea78SSimon Horman MMC_CAP_CMD23, 109c7d9eccbSYoshihiro Shimoda .capabilities2 = MMC_CAP2_NO_WRITE_PROTECT | MMC_CAP2_MERGE_CAPABLE, 1102a68ea78SSimon Horman .bus_shift = 2, 1112a68ea78SSimon Horman .scc_offset = 0x1000, 1122a68ea78SSimon Horman .taps = rcar_gen3_scc_taps, 1132a68ea78SSimon Horman .taps_num = ARRAY_SIZE(rcar_gen3_scc_taps), 1142a55c1eaSWolfram Sang /* DMAC can handle 32bit blk count but only 1 segment */ 1152a55c1eaSWolfram Sang .max_blk_count = UINT_MAX / TMIO_MAX_BLK_SIZE, 1162a68ea78SSimon Horman .max_segs = 1, 1172a68ea78SSimon Horman }; 1182a68ea78SSimon Horman 1192a68ea78SSimon Horman static const struct of_device_id renesas_sdhi_internal_dmac_of_match[] = { 1209706b472SChris Brandt { .compatible = "renesas,sdhi-r7s9210", .data = &of_rza2_compatible, }, 12160ab43baSFabrizio Castro { .compatible = "renesas,sdhi-mmc-r8a77470", .data = &of_rcar_gen3_compatible, }, 1222c907f05SNiklas Söderlund { .compatible = "renesas,sdhi-r8a7795", .data = &of_rcar_gen3_compatible, }, 1232c907f05SNiklas Söderlund { .compatible = "renesas,sdhi-r8a7796", .data = &of_rcar_gen3_compatible, }, 124d6dc425aSSimon Horman { .compatible = "renesas,rcar-gen3-sdhi", .data = &of_rcar_gen3_compatible, }, 1252a68ea78SSimon Horman {}, 1262a68ea78SSimon Horman }; 1272a68ea78SSimon Horman MODULE_DEVICE_TABLE(of, renesas_sdhi_internal_dmac_of_match); 1282a68ea78SSimon Horman 1292a68ea78SSimon Horman static void 1302a68ea78SSimon Horman renesas_sdhi_internal_dmac_dm_write(struct tmio_mmc_host *host, 1312a68ea78SSimon Horman int addr, u64 val) 1322a68ea78SSimon Horman { 1332a68ea78SSimon Horman writeq(val, host->ctl + addr); 1342a68ea78SSimon Horman } 1352a68ea78SSimon Horman 1362a68ea78SSimon Horman static void 1372a68ea78SSimon Horman renesas_sdhi_internal_dmac_enable_dma(struct tmio_mmc_host *host, bool enable) 1382a68ea78SSimon Horman { 139058db286SMasahiro Yamada struct renesas_sdhi *priv = host_to_priv(host); 140058db286SMasahiro Yamada 1412a68ea78SSimon Horman if (!host->chan_tx || !host->chan_rx) 1422a68ea78SSimon Horman return; 1432a68ea78SSimon Horman 1442a68ea78SSimon Horman if (!enable) 1452a68ea78SSimon Horman renesas_sdhi_internal_dmac_dm_write(host, DM_CM_INFO1, 1462a68ea78SSimon Horman INFO1_CLEAR); 1472a68ea78SSimon Horman 148058db286SMasahiro Yamada if (priv->dma_priv.enable) 149058db286SMasahiro Yamada priv->dma_priv.enable(host, enable); 1502a68ea78SSimon Horman } 1512a68ea78SSimon Horman 1522a68ea78SSimon Horman static void 1532a68ea78SSimon Horman renesas_sdhi_internal_dmac_abort_dma(struct tmio_mmc_host *host) { 1542a68ea78SSimon Horman u64 val = RST_DTRANRST1 | RST_DTRANRST0; 1552a68ea78SSimon Horman 1562a68ea78SSimon Horman renesas_sdhi_internal_dmac_enable_dma(host, false); 1572a68ea78SSimon Horman 1582a68ea78SSimon Horman renesas_sdhi_internal_dmac_dm_write(host, DM_CM_RST, 1592a68ea78SSimon Horman RST_RESERVED_BITS & ~val); 1602a68ea78SSimon Horman renesas_sdhi_internal_dmac_dm_write(host, DM_CM_RST, 1612a68ea78SSimon Horman RST_RESERVED_BITS | val); 1622a68ea78SSimon Horman 1630cbc94daSWolfram Sang clear_bit(SDHI_INTERNAL_DMAC_RX_IN_USE, &global_flags); 1640cbc94daSWolfram Sang 1652a68ea78SSimon Horman renesas_sdhi_internal_dmac_enable_dma(host, true); 1662a68ea78SSimon Horman } 1672a68ea78SSimon Horman 1682a68ea78SSimon Horman static void 1692a68ea78SSimon Horman renesas_sdhi_internal_dmac_dataend_dma(struct tmio_mmc_host *host) { 17090d95106SMasahiro Yamada struct renesas_sdhi *priv = host_to_priv(host); 17190d95106SMasahiro Yamada 17290d95106SMasahiro Yamada tasklet_schedule(&priv->dma_priv.dma_complete); 1732a68ea78SSimon Horman } 1742a68ea78SSimon Horman 1752a68ea78SSimon Horman static void 1762a68ea78SSimon Horman renesas_sdhi_internal_dmac_start_dma(struct tmio_mmc_host *host, 1772a68ea78SSimon Horman struct mmc_data *data) 1782a68ea78SSimon Horman { 1792a68ea78SSimon Horman struct scatterlist *sg = host->sg_ptr; 1809706b472SChris Brandt u32 dtran_mode = DTRAN_MODE_BUS_WIDTH; 1819706b472SChris Brandt 1829706b472SChris Brandt if (!test_bit(SDHI_INTERNAL_DMAC_ADDR_MODE_FIXED_ONLY, &global_flags)) 1839706b472SChris Brandt dtran_mode |= DTRAN_MODE_ADDR_MODE; 1842a68ea78SSimon Horman 185ae275b9dSMasaharu Hayakawa if (!dma_map_sg(&host->pdev->dev, sg, host->sg_len, 186ae275b9dSMasaharu Hayakawa mmc_get_dma_dir(data))) 18748e1dc10SYoshihiro Shimoda goto force_pio; 1882a68ea78SSimon Horman 189ae275b9dSMasaharu Hayakawa /* This DMAC cannot handle if buffer is not 8-bytes alignment */ 190fe6e0494SYoshihiro Shimoda if (!IS_ALIGNED(sg_dma_address(sg), 8)) 191fe6e0494SYoshihiro Shimoda goto force_pio_with_unmap; 192ae275b9dSMasaharu Hayakawa 1932a68ea78SSimon Horman if (data->flags & MMC_DATA_READ) { 1942a68ea78SSimon Horman dtran_mode |= DTRAN_MODE_CH_NUM_CH1; 1950cbc94daSWolfram Sang if (test_bit(SDHI_INTERNAL_DMAC_ONE_RX_ONLY, &global_flags) && 1960cbc94daSWolfram Sang test_and_set_bit(SDHI_INTERNAL_DMAC_RX_IN_USE, &global_flags)) 197fe6e0494SYoshihiro Shimoda goto force_pio_with_unmap; 1982a68ea78SSimon Horman } else { 1992a68ea78SSimon Horman dtran_mode |= DTRAN_MODE_CH_NUM_CH0; 2002a68ea78SSimon Horman } 2012a68ea78SSimon Horman 2022a68ea78SSimon Horman renesas_sdhi_internal_dmac_enable_dma(host, true); 2032a68ea78SSimon Horman 2042a68ea78SSimon Horman /* set dma parameters */ 2052a68ea78SSimon Horman renesas_sdhi_internal_dmac_dm_write(host, DM_CM_DTRAN_MODE, 2062a68ea78SSimon Horman dtran_mode); 2072a68ea78SSimon Horman renesas_sdhi_internal_dmac_dm_write(host, DM_DTRAN_ADDR, 208a028b435SNiklas Söderlund sg_dma_address(sg)); 20948e1dc10SYoshihiro Shimoda 210d3dd5db0SMasahiro Yamada host->dma_on = true; 211d3dd5db0SMasahiro Yamada 21248e1dc10SYoshihiro Shimoda return; 21348e1dc10SYoshihiro Shimoda 214fe6e0494SYoshihiro Shimoda force_pio_with_unmap: 215fe6e0494SYoshihiro Shimoda dma_unmap_sg(&host->pdev->dev, sg, host->sg_len, mmc_get_dma_dir(data)); 216fe6e0494SYoshihiro Shimoda 21748e1dc10SYoshihiro Shimoda force_pio: 21848e1dc10SYoshihiro Shimoda renesas_sdhi_internal_dmac_enable_dma(host, false); 2192a68ea78SSimon Horman } 2202a68ea78SSimon Horman 2212a68ea78SSimon Horman static void renesas_sdhi_internal_dmac_issue_tasklet_fn(unsigned long arg) 2222a68ea78SSimon Horman { 2232a68ea78SSimon Horman struct tmio_mmc_host *host = (struct tmio_mmc_host *)arg; 2242a68ea78SSimon Horman 2252a68ea78SSimon Horman tmio_mmc_enable_mmc_irqs(host, TMIO_STAT_DATAEND); 2262a68ea78SSimon Horman 2272a68ea78SSimon Horman /* start the DMAC */ 2282a68ea78SSimon Horman renesas_sdhi_internal_dmac_dm_write(host, DM_CM_DTRAN_CTRL, 2292a68ea78SSimon Horman DTRAN_CTRL_DM_START); 2302a68ea78SSimon Horman } 2312a68ea78SSimon Horman 2322b26e34eSYoshihiro Shimoda static bool renesas_sdhi_internal_dmac_complete(struct tmio_mmc_host *host) 2332a68ea78SSimon Horman { 2342a68ea78SSimon Horman enum dma_data_direction dir; 2352a68ea78SSimon Horman 23658a91d96SYoshihiro Shimoda if (!host->dma_on) 23758a91d96SYoshihiro Shimoda return false; 23858a91d96SYoshihiro Shimoda 2392a68ea78SSimon Horman if (!host->data) 2402b26e34eSYoshihiro Shimoda return false; 2412a68ea78SSimon Horman 2422a68ea78SSimon Horman if (host->data->flags & MMC_DATA_READ) 2432a68ea78SSimon Horman dir = DMA_FROM_DEVICE; 2442a68ea78SSimon Horman else 2452a68ea78SSimon Horman dir = DMA_TO_DEVICE; 2462a68ea78SSimon Horman 2472a68ea78SSimon Horman renesas_sdhi_internal_dmac_enable_dma(host, false); 2482a68ea78SSimon Horman dma_unmap_sg(&host->pdev->dev, host->sg_ptr, host->sg_len, dir); 2492a68ea78SSimon Horman 2500cbc94daSWolfram Sang if (dir == DMA_FROM_DEVICE) 2510cbc94daSWolfram Sang clear_bit(SDHI_INTERNAL_DMAC_RX_IN_USE, &global_flags); 2520cbc94daSWolfram Sang 25358a91d96SYoshihiro Shimoda host->dma_on = false; 25458a91d96SYoshihiro Shimoda 2552b26e34eSYoshihiro Shimoda return true; 2562b26e34eSYoshihiro Shimoda } 2572b26e34eSYoshihiro Shimoda 2582b26e34eSYoshihiro Shimoda static void renesas_sdhi_internal_dmac_complete_tasklet_fn(unsigned long arg) 2592b26e34eSYoshihiro Shimoda { 2602b26e34eSYoshihiro Shimoda struct tmio_mmc_host *host = (struct tmio_mmc_host *)arg; 2612b26e34eSYoshihiro Shimoda 2622b26e34eSYoshihiro Shimoda spin_lock_irq(&host->lock); 2632b26e34eSYoshihiro Shimoda if (!renesas_sdhi_internal_dmac_complete(host)) 2642b26e34eSYoshihiro Shimoda goto out; 2652b26e34eSYoshihiro Shimoda 2662a68ea78SSimon Horman tmio_mmc_do_data_irq(host); 2672a68ea78SSimon Horman out: 2682a68ea78SSimon Horman spin_unlock_irq(&host->lock); 2692a68ea78SSimon Horman } 2702a68ea78SSimon Horman 27158a91d96SYoshihiro Shimoda static void renesas_sdhi_internal_dmac_end_dma(struct tmio_mmc_host *host) 27258a91d96SYoshihiro Shimoda { 27358a91d96SYoshihiro Shimoda if (host->data) 27458a91d96SYoshihiro Shimoda renesas_sdhi_internal_dmac_complete(host); 27558a91d96SYoshihiro Shimoda } 27658a91d96SYoshihiro Shimoda 2772a68ea78SSimon Horman static void 2782a68ea78SSimon Horman renesas_sdhi_internal_dmac_request_dma(struct tmio_mmc_host *host, 2792a68ea78SSimon Horman struct tmio_mmc_data *pdata) 2802a68ea78SSimon Horman { 28190d95106SMasahiro Yamada struct renesas_sdhi *priv = host_to_priv(host); 28290d95106SMasahiro Yamada 283d2332f88SSergei Shtylyov /* Disable DMAC interrupts, we don't use them */ 284d2332f88SSergei Shtylyov renesas_sdhi_internal_dmac_dm_write(host, DM_CM_INFO1_MASK, 285d2332f88SSergei Shtylyov INFO1_MASK_CLEAR); 286d2332f88SSergei Shtylyov renesas_sdhi_internal_dmac_dm_write(host, DM_CM_INFO2_MASK, 287d2332f88SSergei Shtylyov INFO2_MASK_CLEAR); 288d2332f88SSergei Shtylyov 2892a68ea78SSimon Horman /* Each value is set to non-zero to assume "enabling" each DMA */ 2902a68ea78SSimon Horman host->chan_rx = host->chan_tx = (void *)0xdeadbeaf; 2912a68ea78SSimon Horman 29290d95106SMasahiro Yamada tasklet_init(&priv->dma_priv.dma_complete, 2932a68ea78SSimon Horman renesas_sdhi_internal_dmac_complete_tasklet_fn, 2942a68ea78SSimon Horman (unsigned long)host); 2952a68ea78SSimon Horman tasklet_init(&host->dma_issue, 2962a68ea78SSimon Horman renesas_sdhi_internal_dmac_issue_tasklet_fn, 2972a68ea78SSimon Horman (unsigned long)host); 2982a68ea78SSimon Horman } 2992a68ea78SSimon Horman 3002a68ea78SSimon Horman static void 3012a68ea78SSimon Horman renesas_sdhi_internal_dmac_release_dma(struct tmio_mmc_host *host) 3022a68ea78SSimon Horman { 3032a68ea78SSimon Horman /* Each value is set to zero to assume "disabling" each DMA */ 3042a68ea78SSimon Horman host->chan_rx = host->chan_tx = NULL; 3052a68ea78SSimon Horman } 3062a68ea78SSimon Horman 30710154068SJulia Lawall static const struct tmio_mmc_dma_ops renesas_sdhi_internal_dmac_dma_ops = { 3082a68ea78SSimon Horman .start = renesas_sdhi_internal_dmac_start_dma, 3092a68ea78SSimon Horman .enable = renesas_sdhi_internal_dmac_enable_dma, 3102a68ea78SSimon Horman .request = renesas_sdhi_internal_dmac_request_dma, 3112a68ea78SSimon Horman .release = renesas_sdhi_internal_dmac_release_dma, 3122a68ea78SSimon Horman .abort = renesas_sdhi_internal_dmac_abort_dma, 3132a68ea78SSimon Horman .dataend = renesas_sdhi_internal_dmac_dataend_dma, 31458a91d96SYoshihiro Shimoda .end = renesas_sdhi_internal_dmac_end_dma, 3152a68ea78SSimon Horman }; 3162a68ea78SSimon Horman 317cd09780fSSimon Horman /* 318cd09780fSSimon Horman * Whitelist of specific R-Car Gen3 SoC ES versions to use this DMAC 319cd09780fSSimon Horman * implementation as others may use a different implementation. 320cd09780fSSimon Horman */ 321a0fb3fc8SWolfram Sang static const struct soc_device_attribute soc_dma_quirks[] = { 3229706b472SChris Brandt { .soc_id = "r7s9210", 3239706b472SChris Brandt .data = (void *)BIT(SDHI_INTERNAL_DMAC_ADDR_MODE_FIXED_ONLY) }, 3240cbc94daSWolfram Sang { .soc_id = "r8a7795", .revision = "ES1.*", 3250cbc94daSWolfram Sang .data = (void *)BIT(SDHI_INTERNAL_DMAC_ONE_RX_ONLY) }, 3260cbc94daSWolfram Sang { .soc_id = "r8a7796", .revision = "ES1.0", 3270cbc94daSWolfram Sang .data = (void *)BIT(SDHI_INTERNAL_DMAC_ONE_RX_ONLY) }, 328cd09780fSSimon Horman { /* sentinel */ } 329cd09780fSSimon Horman }; 330cd09780fSSimon Horman 3312a68ea78SSimon Horman static int renesas_sdhi_internal_dmac_probe(struct platform_device *pdev) 3322a68ea78SSimon Horman { 333a0fb3fc8SWolfram Sang const struct soc_device_attribute *soc = soc_device_match(soc_dma_quirks); 33454541815SNiklas Söderlund struct device *dev = &pdev->dev; 3350cbc94daSWolfram Sang 336a0fb3fc8SWolfram Sang if (soc) 3370cbc94daSWolfram Sang global_flags |= (unsigned long)soc->data; 3380cbc94daSWolfram Sang 33954541815SNiklas Söderlund /* value is max of SD_SECCNT. Confirmed by HW engineers */ 34054541815SNiklas Söderlund dma_set_max_seg_size(dev, 0xffffffff); 34154541815SNiklas Söderlund 3422a68ea78SSimon Horman return renesas_sdhi_probe(pdev, &renesas_sdhi_internal_dmac_dma_ops); 3432a68ea78SSimon Horman } 3442a68ea78SSimon Horman 3452a68ea78SSimon Horman static const struct dev_pm_ops renesas_sdhi_internal_dmac_dev_pm_ops = { 3462a68ea78SSimon Horman SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend, 3472a68ea78SSimon Horman pm_runtime_force_resume) 3482a68ea78SSimon Horman SET_RUNTIME_PM_OPS(tmio_mmc_host_runtime_suspend, 3492a68ea78SSimon Horman tmio_mmc_host_runtime_resume, 3502a68ea78SSimon Horman NULL) 3512a68ea78SSimon Horman }; 3522a68ea78SSimon Horman 3532a68ea78SSimon Horman static struct platform_driver renesas_internal_dmac_sdhi_driver = { 3542a68ea78SSimon Horman .driver = { 3552a68ea78SSimon Horman .name = "renesas_sdhi_internal_dmac", 3567320915cSDouglas Anderson .probe_type = PROBE_PREFER_ASYNCHRONOUS, 3572a68ea78SSimon Horman .pm = &renesas_sdhi_internal_dmac_dev_pm_ops, 3582a68ea78SSimon Horman .of_match_table = renesas_sdhi_internal_dmac_of_match, 3592a68ea78SSimon Horman }, 3602a68ea78SSimon Horman .probe = renesas_sdhi_internal_dmac_probe, 3612a68ea78SSimon Horman .remove = renesas_sdhi_remove, 3622a68ea78SSimon Horman }; 3632a68ea78SSimon Horman 3642a68ea78SSimon Horman module_platform_driver(renesas_internal_dmac_sdhi_driver); 3652a68ea78SSimon Horman 3662a68ea78SSimon Horman MODULE_DESCRIPTION("Renesas SDHI driver for internal DMAC"); 3672a68ea78SSimon Horman MODULE_AUTHOR("Yoshihiro Shimoda"); 3682a68ea78SSimon Horman MODULE_LICENSE("GPL v2"); 369