1b5b6a5f4SSimon Horman /* 29d08428aSSimon Horman * Renesas SDHI 3b5b6a5f4SSimon Horman * 487317c4dSSimon Horman * Copyright (C) 2015-17 Renesas Electronics Corporation 587317c4dSSimon Horman * Copyright (C) 2016-17 Sang Engineering, Wolfram Sang 687317c4dSSimon Horman * Copyright (C) 2016-17 Horms Solutions, Simon Horman 7b5b6a5f4SSimon Horman * Copyright (C) 2009 Magnus Damm 8b5b6a5f4SSimon Horman * 9b5b6a5f4SSimon Horman * This program is free software; you can redistribute it and/or modify 10b5b6a5f4SSimon Horman * it under the terms of the GNU General Public License version 2 as 11b5b6a5f4SSimon Horman * published by the Free Software Foundation. 12b5b6a5f4SSimon Horman * 13b5b6a5f4SSimon Horman * Based on "Compaq ASIC3 support": 14b5b6a5f4SSimon Horman * 15b5b6a5f4SSimon Horman * Copyright 2001 Compaq Computer Corporation. 16b5b6a5f4SSimon Horman * Copyright 2004-2005 Phil Blundell 17b5b6a5f4SSimon Horman * Copyright 2007-2008 OpenedHand Ltd. 18b5b6a5f4SSimon Horman * 19b5b6a5f4SSimon Horman * Authors: Phil Blundell <pb@handhelds.org>, 20b5b6a5f4SSimon Horman * Samuel Ortiz <sameo@openedhand.com> 21b5b6a5f4SSimon Horman * 22b5b6a5f4SSimon Horman */ 23b5b6a5f4SSimon Horman 24b5b6a5f4SSimon Horman #include <linux/kernel.h> 25b5b6a5f4SSimon Horman #include <linux/clk.h> 26b5b6a5f4SSimon Horman #include <linux/slab.h> 27b5b6a5f4SSimon Horman #include <linux/of_device.h> 28b5b6a5f4SSimon Horman #include <linux/platform_device.h> 29b5b6a5f4SSimon Horman #include <linux/mmc/host.h> 30b5b6a5f4SSimon Horman #include <linux/mfd/tmio.h> 31b5b6a5f4SSimon Horman #include <linux/sh_dma.h> 32b5b6a5f4SSimon Horman #include <linux/delay.h> 33b5b6a5f4SSimon Horman #include <linux/pinctrl/consumer.h> 34b5b6a5f4SSimon Horman #include <linux/pinctrl/pinctrl-state.h> 35b5b6a5f4SSimon Horman #include <linux/regulator/consumer.h> 36b5b6a5f4SSimon Horman 37b5b6a5f4SSimon Horman #include "renesas_sdhi.h" 38b5b6a5f4SSimon Horman #include "tmio_mmc.h" 39b5b6a5f4SSimon Horman 40b5b6a5f4SSimon Horman #define EXT_ACC 0xe4 41b5b6a5f4SSimon Horman 42b5b6a5f4SSimon Horman #define SDHI_VER_GEN2_SDR50 0x490c 43b5b6a5f4SSimon Horman /* very old datasheets said 0x490c for SDR104, too. They are wrong! */ 44b5b6a5f4SSimon Horman #define SDHI_VER_GEN2_SDR104 0xcb0d 45b5b6a5f4SSimon Horman #define SDHI_VER_GEN3_SD 0xcc10 46b5b6a5f4SSimon Horman #define SDHI_VER_GEN3_SDMMC 0xcd10 47b5b6a5f4SSimon Horman 48b5b6a5f4SSimon Horman #define host_to_priv(host) container_of((host)->pdata, struct renesas_sdhi, mmc_data) 49b5b6a5f4SSimon Horman 50b5b6a5f4SSimon Horman struct renesas_sdhi { 51b5b6a5f4SSimon Horman struct clk *clk; 52b5b6a5f4SSimon Horman struct clk *clk_cd; 53b5b6a5f4SSimon Horman struct tmio_mmc_data mmc_data; 54b5b6a5f4SSimon Horman struct tmio_mmc_dma dma_priv; 55b5b6a5f4SSimon Horman struct pinctrl *pinctrl; 56b5b6a5f4SSimon Horman struct pinctrl_state *pins_default, *pins_uhs; 57b5b6a5f4SSimon Horman void __iomem *scc_ctl; 58b5b6a5f4SSimon Horman }; 59b5b6a5f4SSimon Horman 60b5b6a5f4SSimon Horman static void renesas_sdhi_sdbuf_width(struct tmio_mmc_host *host, int width) 61b5b6a5f4SSimon Horman { 62b5b6a5f4SSimon Horman u32 val; 63b5b6a5f4SSimon Horman 64b5b6a5f4SSimon Horman /* 65b5b6a5f4SSimon Horman * see also 66b5b6a5f4SSimon Horman * renesas_sdhi_of_data :: dma_buswidth 67b5b6a5f4SSimon Horman */ 68b5b6a5f4SSimon Horman switch (sd_ctrl_read16(host, CTL_VERSION)) { 69b5b6a5f4SSimon Horman case SDHI_VER_GEN2_SDR50: 70b5b6a5f4SSimon Horman val = (width == 32) ? 0x0001 : 0x0000; 71b5b6a5f4SSimon Horman break; 72b5b6a5f4SSimon Horman case SDHI_VER_GEN2_SDR104: 73b5b6a5f4SSimon Horman val = (width == 32) ? 0x0000 : 0x0001; 74b5b6a5f4SSimon Horman break; 75b5b6a5f4SSimon Horman case SDHI_VER_GEN3_SD: 76b5b6a5f4SSimon Horman case SDHI_VER_GEN3_SDMMC: 77b5b6a5f4SSimon Horman if (width == 64) 78b5b6a5f4SSimon Horman val = 0x0000; 79b5b6a5f4SSimon Horman else if (width == 32) 80b5b6a5f4SSimon Horman val = 0x0101; 81b5b6a5f4SSimon Horman else 82b5b6a5f4SSimon Horman val = 0x0001; 83b5b6a5f4SSimon Horman break; 84b5b6a5f4SSimon Horman default: 85b5b6a5f4SSimon Horman /* nothing to do */ 86b5b6a5f4SSimon Horman return; 87b5b6a5f4SSimon Horman } 88b5b6a5f4SSimon Horman 89b5b6a5f4SSimon Horman sd_ctrl_write16(host, EXT_ACC, val); 90b5b6a5f4SSimon Horman } 91b5b6a5f4SSimon Horman 92b5b6a5f4SSimon Horman static int renesas_sdhi_clk_enable(struct tmio_mmc_host *host) 93b5b6a5f4SSimon Horman { 94b5b6a5f4SSimon Horman struct mmc_host *mmc = host->mmc; 95b5b6a5f4SSimon Horman struct renesas_sdhi *priv = host_to_priv(host); 96b5b6a5f4SSimon Horman int ret = clk_prepare_enable(priv->clk); 97b5b6a5f4SSimon Horman if (ret < 0) 98b5b6a5f4SSimon Horman return ret; 99b5b6a5f4SSimon Horman 100b5b6a5f4SSimon Horman ret = clk_prepare_enable(priv->clk_cd); 101b5b6a5f4SSimon Horman if (ret < 0) { 102b5b6a5f4SSimon Horman clk_disable_unprepare(priv->clk); 103b5b6a5f4SSimon Horman return ret; 104b5b6a5f4SSimon Horman } 105b5b6a5f4SSimon Horman 106b5b6a5f4SSimon Horman /* 107b5b6a5f4SSimon Horman * The clock driver may not know what maximum frequency 108b5b6a5f4SSimon Horman * actually works, so it should be set with the max-frequency 109b5b6a5f4SSimon Horman * property which will already have been read to f_max. If it 110b5b6a5f4SSimon Horman * was missing, assume the current frequency is the maximum. 111b5b6a5f4SSimon Horman */ 112b5b6a5f4SSimon Horman if (!mmc->f_max) 113b5b6a5f4SSimon Horman mmc->f_max = clk_get_rate(priv->clk); 114b5b6a5f4SSimon Horman 115b5b6a5f4SSimon Horman /* 116b5b6a5f4SSimon Horman * Minimum frequency is the minimum input clock frequency 117b5b6a5f4SSimon Horman * divided by our maximum divider. 118b5b6a5f4SSimon Horman */ 119b5b6a5f4SSimon Horman mmc->f_min = max(clk_round_rate(priv->clk, 1) / 512, 1L); 120b5b6a5f4SSimon Horman 121b5b6a5f4SSimon Horman /* enable 16bit data access on SDBUF as default */ 122b5b6a5f4SSimon Horman renesas_sdhi_sdbuf_width(host, 16); 123b5b6a5f4SSimon Horman 124b5b6a5f4SSimon Horman return 0; 125b5b6a5f4SSimon Horman } 126b5b6a5f4SSimon Horman 127b5b6a5f4SSimon Horman static unsigned int renesas_sdhi_clk_update(struct tmio_mmc_host *host, 128b5b6a5f4SSimon Horman unsigned int new_clock) 129b5b6a5f4SSimon Horman { 130b5b6a5f4SSimon Horman struct renesas_sdhi *priv = host_to_priv(host); 131b5b6a5f4SSimon Horman unsigned int freq, diff, best_freq = 0, diff_min = ~0; 132b5b6a5f4SSimon Horman int i, ret; 133b5b6a5f4SSimon Horman 134d63c2bf4SWolfram Sang /* tested only on R-Car Gen2+ currently; may work for others */ 135b5b6a5f4SSimon Horman if (!(host->pdata->flags & TMIO_MMC_MIN_RCAR2)) 136b5b6a5f4SSimon Horman return clk_get_rate(priv->clk); 137b5b6a5f4SSimon Horman 138b5b6a5f4SSimon Horman /* 139b5b6a5f4SSimon Horman * We want the bus clock to be as close as possible to, but no 140b5b6a5f4SSimon Horman * greater than, new_clock. As we can divide by 1 << i for 141b5b6a5f4SSimon Horman * any i in [0, 9] we want the input clock to be as close as 142b5b6a5f4SSimon Horman * possible, but no greater than, new_clock << i. 143b5b6a5f4SSimon Horman */ 144b5b6a5f4SSimon Horman for (i = min(9, ilog2(UINT_MAX / new_clock)); i >= 0; i--) { 145b5b6a5f4SSimon Horman freq = clk_round_rate(priv->clk, new_clock << i); 146b5b6a5f4SSimon Horman if (freq > (new_clock << i)) { 147b5b6a5f4SSimon Horman /* Too fast; look for a slightly slower option */ 148b5b6a5f4SSimon Horman freq = clk_round_rate(priv->clk, 149b5b6a5f4SSimon Horman (new_clock << i) / 4 * 3); 150b5b6a5f4SSimon Horman if (freq > (new_clock << i)) 151b5b6a5f4SSimon Horman continue; 152b5b6a5f4SSimon Horman } 153b5b6a5f4SSimon Horman 154b5b6a5f4SSimon Horman diff = new_clock - (freq >> i); 155b5b6a5f4SSimon Horman if (diff <= diff_min) { 156b5b6a5f4SSimon Horman best_freq = freq; 157b5b6a5f4SSimon Horman diff_min = diff; 158b5b6a5f4SSimon Horman } 159b5b6a5f4SSimon Horman } 160b5b6a5f4SSimon Horman 161b5b6a5f4SSimon Horman ret = clk_set_rate(priv->clk, best_freq); 162b5b6a5f4SSimon Horman 163b5b6a5f4SSimon Horman return ret == 0 ? best_freq : clk_get_rate(priv->clk); 164b5b6a5f4SSimon Horman } 165b5b6a5f4SSimon Horman 166b5b6a5f4SSimon Horman static void renesas_sdhi_clk_disable(struct tmio_mmc_host *host) 167b5b6a5f4SSimon Horman { 168b5b6a5f4SSimon Horman struct renesas_sdhi *priv = host_to_priv(host); 169b5b6a5f4SSimon Horman 170b5b6a5f4SSimon Horman clk_disable_unprepare(priv->clk); 171b5b6a5f4SSimon Horman clk_disable_unprepare(priv->clk_cd); 172b5b6a5f4SSimon Horman } 173b5b6a5f4SSimon Horman 174b5b6a5f4SSimon Horman static int renesas_sdhi_card_busy(struct mmc_host *mmc) 175b5b6a5f4SSimon Horman { 176b5b6a5f4SSimon Horman struct tmio_mmc_host *host = mmc_priv(mmc); 177b5b6a5f4SSimon Horman 178b5b6a5f4SSimon Horman return !(sd_ctrl_read16_and_16_as_32(host, CTL_STATUS) & TMIO_STAT_DAT0); 179b5b6a5f4SSimon Horman } 180b5b6a5f4SSimon Horman 181b5b6a5f4SSimon Horman static int renesas_sdhi_start_signal_voltage_switch(struct mmc_host *mmc, 182b5b6a5f4SSimon Horman struct mmc_ios *ios) 183b5b6a5f4SSimon Horman { 184b5b6a5f4SSimon Horman struct tmio_mmc_host *host = mmc_priv(mmc); 185b5b6a5f4SSimon Horman struct renesas_sdhi *priv = host_to_priv(host); 186b5b6a5f4SSimon Horman struct pinctrl_state *pin_state; 187b5b6a5f4SSimon Horman int ret; 188b5b6a5f4SSimon Horman 189b5b6a5f4SSimon Horman switch (ios->signal_voltage) { 190b5b6a5f4SSimon Horman case MMC_SIGNAL_VOLTAGE_330: 191b5b6a5f4SSimon Horman pin_state = priv->pins_default; 192b5b6a5f4SSimon Horman break; 193b5b6a5f4SSimon Horman case MMC_SIGNAL_VOLTAGE_180: 194b5b6a5f4SSimon Horman pin_state = priv->pins_uhs; 195b5b6a5f4SSimon Horman break; 196b5b6a5f4SSimon Horman default: 197b5b6a5f4SSimon Horman return -EINVAL; 198b5b6a5f4SSimon Horman } 199b5b6a5f4SSimon Horman 200b5b6a5f4SSimon Horman /* 201b5b6a5f4SSimon Horman * If anything is missing, assume signal voltage is fixed at 202b5b6a5f4SSimon Horman * 3.3V and succeed/fail accordingly. 203b5b6a5f4SSimon Horman */ 204b5b6a5f4SSimon Horman if (IS_ERR(priv->pinctrl) || IS_ERR(pin_state)) 205b5b6a5f4SSimon Horman return ios->signal_voltage == 206b5b6a5f4SSimon Horman MMC_SIGNAL_VOLTAGE_330 ? 0 : -EINVAL; 207b5b6a5f4SSimon Horman 208b5b6a5f4SSimon Horman ret = mmc_regulator_set_vqmmc(host->mmc, ios); 209b5b6a5f4SSimon Horman if (ret) 210b5b6a5f4SSimon Horman return ret; 211b5b6a5f4SSimon Horman 212b5b6a5f4SSimon Horman return pinctrl_select_state(priv->pinctrl, pin_state); 213b5b6a5f4SSimon Horman } 214b5b6a5f4SSimon Horman 215b5b6a5f4SSimon Horman /* SCC registers */ 216b5b6a5f4SSimon Horman #define SH_MOBILE_SDHI_SCC_DTCNTL 0x000 217b5b6a5f4SSimon Horman #define SH_MOBILE_SDHI_SCC_TAPSET 0x002 218b5b6a5f4SSimon Horman #define SH_MOBILE_SDHI_SCC_DT2FF 0x004 219b5b6a5f4SSimon Horman #define SH_MOBILE_SDHI_SCC_CKSEL 0x006 220b5b6a5f4SSimon Horman #define SH_MOBILE_SDHI_SCC_RVSCNTL 0x008 221b5b6a5f4SSimon Horman #define SH_MOBILE_SDHI_SCC_RVSREQ 0x00A 222b5b6a5f4SSimon Horman 223b5b6a5f4SSimon Horman /* Definitions for values the SH_MOBILE_SDHI_SCC_DTCNTL register */ 224b5b6a5f4SSimon Horman #define SH_MOBILE_SDHI_SCC_DTCNTL_TAPEN BIT(0) 225b5b6a5f4SSimon Horman #define SH_MOBILE_SDHI_SCC_DTCNTL_TAPNUM_SHIFT 16 226b5b6a5f4SSimon Horman #define SH_MOBILE_SDHI_SCC_DTCNTL_TAPNUM_MASK 0xff 227b5b6a5f4SSimon Horman 228b5b6a5f4SSimon Horman /* Definitions for values the SH_MOBILE_SDHI_SCC_CKSEL register */ 229b5b6a5f4SSimon Horman #define SH_MOBILE_SDHI_SCC_CKSEL_DTSEL BIT(0) 230b5b6a5f4SSimon Horman /* Definitions for values the SH_MOBILE_SDHI_SCC_RVSCNTL register */ 231b5b6a5f4SSimon Horman #define SH_MOBILE_SDHI_SCC_RVSCNTL_RVSEN BIT(0) 232b5b6a5f4SSimon Horman /* Definitions for values the SH_MOBILE_SDHI_SCC_RVSREQ register */ 233b5b6a5f4SSimon Horman #define SH_MOBILE_SDHI_SCC_RVSREQ_RVSERR BIT(2) 234b5b6a5f4SSimon Horman 235b5b6a5f4SSimon Horman static inline u32 sd_scc_read32(struct tmio_mmc_host *host, 236b5b6a5f4SSimon Horman struct renesas_sdhi *priv, int addr) 237b5b6a5f4SSimon Horman { 238b5b6a5f4SSimon Horman return readl(priv->scc_ctl + (addr << host->bus_shift)); 239b5b6a5f4SSimon Horman } 240b5b6a5f4SSimon Horman 241b5b6a5f4SSimon Horman static inline void sd_scc_write32(struct tmio_mmc_host *host, 242b5b6a5f4SSimon Horman struct renesas_sdhi *priv, 243b5b6a5f4SSimon Horman int addr, u32 val) 244b5b6a5f4SSimon Horman { 245b5b6a5f4SSimon Horman writel(val, priv->scc_ctl + (addr << host->bus_shift)); 246b5b6a5f4SSimon Horman } 247b5b6a5f4SSimon Horman 248b5b6a5f4SSimon Horman static unsigned int renesas_sdhi_init_tuning(struct tmio_mmc_host *host) 249b5b6a5f4SSimon Horman { 250b5b6a5f4SSimon Horman struct renesas_sdhi *priv; 251b5b6a5f4SSimon Horman 252b5b6a5f4SSimon Horman priv = host_to_priv(host); 253b5b6a5f4SSimon Horman 254b5b6a5f4SSimon Horman /* set sampling clock selection range */ 255b5b6a5f4SSimon Horman sd_scc_write32(host, priv, SH_MOBILE_SDHI_SCC_DTCNTL, 256b5b6a5f4SSimon Horman 0x8 << SH_MOBILE_SDHI_SCC_DTCNTL_TAPNUM_SHIFT); 257b5b6a5f4SSimon Horman 258b5b6a5f4SSimon Horman /* Initialize SCC */ 259b5b6a5f4SSimon Horman sd_ctrl_write32_as_16_and_16(host, CTL_STATUS, 0x0); 260b5b6a5f4SSimon Horman 261b5b6a5f4SSimon Horman sd_scc_write32(host, priv, SH_MOBILE_SDHI_SCC_DTCNTL, 262b5b6a5f4SSimon Horman SH_MOBILE_SDHI_SCC_DTCNTL_TAPEN | 263b5b6a5f4SSimon Horman sd_scc_read32(host, priv, SH_MOBILE_SDHI_SCC_DTCNTL)); 264b5b6a5f4SSimon Horman 265b5b6a5f4SSimon Horman sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, ~CLK_CTL_SCLKEN & 266b5b6a5f4SSimon Horman sd_ctrl_read16(host, CTL_SD_CARD_CLK_CTL)); 267b5b6a5f4SSimon Horman 268b5b6a5f4SSimon Horman sd_scc_write32(host, priv, SH_MOBILE_SDHI_SCC_CKSEL, 269b5b6a5f4SSimon Horman SH_MOBILE_SDHI_SCC_CKSEL_DTSEL | 270b5b6a5f4SSimon Horman sd_scc_read32(host, priv, SH_MOBILE_SDHI_SCC_CKSEL)); 271b5b6a5f4SSimon Horman 272b5b6a5f4SSimon Horman sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, CLK_CTL_SCLKEN | 273b5b6a5f4SSimon Horman sd_ctrl_read16(host, CTL_SD_CARD_CLK_CTL)); 274b5b6a5f4SSimon Horman 275b5b6a5f4SSimon Horman sd_scc_write32(host, priv, SH_MOBILE_SDHI_SCC_RVSCNTL, 276b5b6a5f4SSimon Horman ~SH_MOBILE_SDHI_SCC_RVSCNTL_RVSEN & 277b5b6a5f4SSimon Horman sd_scc_read32(host, priv, SH_MOBILE_SDHI_SCC_RVSCNTL)); 278b5b6a5f4SSimon Horman 279b5b6a5f4SSimon Horman sd_scc_write32(host, priv, SH_MOBILE_SDHI_SCC_DT2FF, host->scc_tappos); 280b5b6a5f4SSimon Horman 281b5b6a5f4SSimon Horman /* Read TAPNUM */ 282b5b6a5f4SSimon Horman return (sd_scc_read32(host, priv, SH_MOBILE_SDHI_SCC_DTCNTL) >> 283b5b6a5f4SSimon Horman SH_MOBILE_SDHI_SCC_DTCNTL_TAPNUM_SHIFT) & 284b5b6a5f4SSimon Horman SH_MOBILE_SDHI_SCC_DTCNTL_TAPNUM_MASK; 285b5b6a5f4SSimon Horman } 286b5b6a5f4SSimon Horman 287b5b6a5f4SSimon Horman static void renesas_sdhi_prepare_tuning(struct tmio_mmc_host *host, 288b5b6a5f4SSimon Horman unsigned long tap) 289b5b6a5f4SSimon Horman { 290b5b6a5f4SSimon Horman struct renesas_sdhi *priv = host_to_priv(host); 291b5b6a5f4SSimon Horman 292b5b6a5f4SSimon Horman /* Set sampling clock position */ 293b5b6a5f4SSimon Horman sd_scc_write32(host, priv, SH_MOBILE_SDHI_SCC_TAPSET, tap); 294b5b6a5f4SSimon Horman } 295b5b6a5f4SSimon Horman 296b5b6a5f4SSimon Horman #define SH_MOBILE_SDHI_MAX_TAP 3 297b5b6a5f4SSimon Horman 298b5b6a5f4SSimon Horman static int renesas_sdhi_select_tuning(struct tmio_mmc_host *host) 299b5b6a5f4SSimon Horman { 300b5b6a5f4SSimon Horman struct renesas_sdhi *priv = host_to_priv(host); 301b5b6a5f4SSimon Horman unsigned long tap_cnt; /* counter of tuning success */ 302b5b6a5f4SSimon Horman unsigned long tap_set; /* tap position */ 303b5b6a5f4SSimon Horman unsigned long tap_start;/* start position of tuning success */ 304b5b6a5f4SSimon Horman unsigned long tap_end; /* end position of tuning success */ 305b5b6a5f4SSimon Horman unsigned long ntap; /* temporary counter of tuning success */ 306b5b6a5f4SSimon Horman unsigned long i; 307b5b6a5f4SSimon Horman 308b5b6a5f4SSimon Horman /* Clear SCC_RVSREQ */ 309b5b6a5f4SSimon Horman sd_scc_write32(host, priv, SH_MOBILE_SDHI_SCC_RVSREQ, 0); 310b5b6a5f4SSimon Horman 311b5b6a5f4SSimon Horman /* 312b5b6a5f4SSimon Horman * Find the longest consecutive run of successful probes. If that 313b5b6a5f4SSimon Horman * is more than SH_MOBILE_SDHI_MAX_TAP probes long then use the 314b5b6a5f4SSimon Horman * center index as the tap. 315b5b6a5f4SSimon Horman */ 316b5b6a5f4SSimon Horman tap_cnt = 0; 317b5b6a5f4SSimon Horman ntap = 0; 318b5b6a5f4SSimon Horman tap_start = 0; 319b5b6a5f4SSimon Horman tap_end = 0; 320b5b6a5f4SSimon Horman for (i = 0; i < host->tap_num * 2; i++) { 321b5b6a5f4SSimon Horman if (test_bit(i, host->taps)) 322b5b6a5f4SSimon Horman ntap++; 323b5b6a5f4SSimon Horman else { 324b5b6a5f4SSimon Horman if (ntap > tap_cnt) { 325b5b6a5f4SSimon Horman tap_start = i - ntap; 326b5b6a5f4SSimon Horman tap_end = i - 1; 327b5b6a5f4SSimon Horman tap_cnt = ntap; 328b5b6a5f4SSimon Horman } 329b5b6a5f4SSimon Horman ntap = 0; 330b5b6a5f4SSimon Horman } 331b5b6a5f4SSimon Horman } 332b5b6a5f4SSimon Horman 333b5b6a5f4SSimon Horman if (ntap > tap_cnt) { 334b5b6a5f4SSimon Horman tap_start = i - ntap; 335b5b6a5f4SSimon Horman tap_end = i - 1; 336b5b6a5f4SSimon Horman tap_cnt = ntap; 337b5b6a5f4SSimon Horman } 338b5b6a5f4SSimon Horman 339b5b6a5f4SSimon Horman if (tap_cnt >= SH_MOBILE_SDHI_MAX_TAP) 340b5b6a5f4SSimon Horman tap_set = (tap_start + tap_end) / 2 % host->tap_num; 341b5b6a5f4SSimon Horman else 342b5b6a5f4SSimon Horman return -EIO; 343b5b6a5f4SSimon Horman 344b5b6a5f4SSimon Horman /* Set SCC */ 345b5b6a5f4SSimon Horman sd_scc_write32(host, priv, SH_MOBILE_SDHI_SCC_TAPSET, tap_set); 346b5b6a5f4SSimon Horman 347b5b6a5f4SSimon Horman /* Enable auto re-tuning */ 348b5b6a5f4SSimon Horman sd_scc_write32(host, priv, SH_MOBILE_SDHI_SCC_RVSCNTL, 349b5b6a5f4SSimon Horman SH_MOBILE_SDHI_SCC_RVSCNTL_RVSEN | 350b5b6a5f4SSimon Horman sd_scc_read32(host, priv, SH_MOBILE_SDHI_SCC_RVSCNTL)); 351b5b6a5f4SSimon Horman 352b5b6a5f4SSimon Horman return 0; 353b5b6a5f4SSimon Horman } 354b5b6a5f4SSimon Horman 355b5b6a5f4SSimon Horman 356b5b6a5f4SSimon Horman static bool renesas_sdhi_check_scc_error(struct tmio_mmc_host *host) 357b5b6a5f4SSimon Horman { 358b5b6a5f4SSimon Horman struct renesas_sdhi *priv = host_to_priv(host); 359b5b6a5f4SSimon Horman 360b5b6a5f4SSimon Horman /* Check SCC error */ 361b5b6a5f4SSimon Horman if (sd_scc_read32(host, priv, SH_MOBILE_SDHI_SCC_RVSCNTL) & 362b5b6a5f4SSimon Horman SH_MOBILE_SDHI_SCC_RVSCNTL_RVSEN && 363b5b6a5f4SSimon Horman sd_scc_read32(host, priv, SH_MOBILE_SDHI_SCC_RVSREQ) & 364b5b6a5f4SSimon Horman SH_MOBILE_SDHI_SCC_RVSREQ_RVSERR) { 365b5b6a5f4SSimon Horman /* Clear SCC error */ 366b5b6a5f4SSimon Horman sd_scc_write32(host, priv, SH_MOBILE_SDHI_SCC_RVSREQ, 0); 367b5b6a5f4SSimon Horman return true; 368b5b6a5f4SSimon Horman } 369b5b6a5f4SSimon Horman 370b5b6a5f4SSimon Horman return false; 371b5b6a5f4SSimon Horman } 372b5b6a5f4SSimon Horman 373b5b6a5f4SSimon Horman static void renesas_sdhi_hw_reset(struct tmio_mmc_host *host) 374b5b6a5f4SSimon Horman { 375b5b6a5f4SSimon Horman struct renesas_sdhi *priv; 376b5b6a5f4SSimon Horman 377b5b6a5f4SSimon Horman priv = host_to_priv(host); 378b5b6a5f4SSimon Horman 379b5b6a5f4SSimon Horman /* Reset SCC */ 380b5b6a5f4SSimon Horman sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, ~CLK_CTL_SCLKEN & 381b5b6a5f4SSimon Horman sd_ctrl_read16(host, CTL_SD_CARD_CLK_CTL)); 382b5b6a5f4SSimon Horman 383b5b6a5f4SSimon Horman sd_scc_write32(host, priv, SH_MOBILE_SDHI_SCC_CKSEL, 384b5b6a5f4SSimon Horman ~SH_MOBILE_SDHI_SCC_CKSEL_DTSEL & 385b5b6a5f4SSimon Horman sd_scc_read32(host, priv, SH_MOBILE_SDHI_SCC_CKSEL)); 386b5b6a5f4SSimon Horman 387b5b6a5f4SSimon Horman sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, CLK_CTL_SCLKEN | 388b5b6a5f4SSimon Horman sd_ctrl_read16(host, CTL_SD_CARD_CLK_CTL)); 389b5b6a5f4SSimon Horman 390b5b6a5f4SSimon Horman sd_scc_write32(host, priv, SH_MOBILE_SDHI_SCC_RVSCNTL, 391b5b6a5f4SSimon Horman ~SH_MOBILE_SDHI_SCC_RVSCNTL_RVSEN & 392b5b6a5f4SSimon Horman sd_scc_read32(host, priv, SH_MOBILE_SDHI_SCC_RVSCNTL)); 393b5b6a5f4SSimon Horman 394b5b6a5f4SSimon Horman sd_scc_write32(host, priv, SH_MOBILE_SDHI_SCC_RVSCNTL, 395b5b6a5f4SSimon Horman ~SH_MOBILE_SDHI_SCC_RVSCNTL_RVSEN & 396b5b6a5f4SSimon Horman sd_scc_read32(host, priv, SH_MOBILE_SDHI_SCC_RVSCNTL)); 397b5b6a5f4SSimon Horman } 398b5b6a5f4SSimon Horman 399b5b6a5f4SSimon Horman static int renesas_sdhi_wait_idle(struct tmio_mmc_host *host) 400b5b6a5f4SSimon Horman { 401b5b6a5f4SSimon Horman int timeout = 1000; 402b5b6a5f4SSimon Horman 403b5b6a5f4SSimon Horman while (--timeout && !(sd_ctrl_read16_and_16_as_32(host, CTL_STATUS) 404b5b6a5f4SSimon Horman & TMIO_STAT_SCLKDIVEN)) 405b5b6a5f4SSimon Horman udelay(1); 406b5b6a5f4SSimon Horman 407b5b6a5f4SSimon Horman if (!timeout) { 408b5b6a5f4SSimon Horman dev_warn(&host->pdev->dev, "timeout waiting for SD bus idle\n"); 409b5b6a5f4SSimon Horman return -EBUSY; 410b5b6a5f4SSimon Horman } 411b5b6a5f4SSimon Horman 412b5b6a5f4SSimon Horman return 0; 413b5b6a5f4SSimon Horman } 414b5b6a5f4SSimon Horman 415b5b6a5f4SSimon Horman static int renesas_sdhi_write16_hook(struct tmio_mmc_host *host, int addr) 416b5b6a5f4SSimon Horman { 417b5b6a5f4SSimon Horman switch (addr) 418b5b6a5f4SSimon Horman { 419b5b6a5f4SSimon Horman case CTL_SD_CMD: 420b5b6a5f4SSimon Horman case CTL_STOP_INTERNAL_ACTION: 421b5b6a5f4SSimon Horman case CTL_XFER_BLK_COUNT: 422b5b6a5f4SSimon Horman case CTL_SD_CARD_CLK_CTL: 423b5b6a5f4SSimon Horman case CTL_SD_XFER_LEN: 424b5b6a5f4SSimon Horman case CTL_SD_MEM_CARD_OPT: 425b5b6a5f4SSimon Horman case CTL_TRANSACTION_CTL: 426b5b6a5f4SSimon Horman case CTL_DMA_ENABLE: 427b5b6a5f4SSimon Horman case EXT_ACC: 428b5b6a5f4SSimon Horman return renesas_sdhi_wait_idle(host); 429b5b6a5f4SSimon Horman } 430b5b6a5f4SSimon Horman 431b5b6a5f4SSimon Horman return 0; 432b5b6a5f4SSimon Horman } 433b5b6a5f4SSimon Horman 434b5b6a5f4SSimon Horman static int renesas_sdhi_multi_io_quirk(struct mmc_card *card, 435b5b6a5f4SSimon Horman unsigned int direction, int blk_size) 436b5b6a5f4SSimon Horman { 437b5b6a5f4SSimon Horman /* 438b5b6a5f4SSimon Horman * In Renesas controllers, when performing a 439b5b6a5f4SSimon Horman * multiple block read of one or two blocks, 440b5b6a5f4SSimon Horman * depending on the timing with which the 441b5b6a5f4SSimon Horman * response register is read, the response 442b5b6a5f4SSimon Horman * value may not be read properly. 443b5b6a5f4SSimon Horman * Use single block read for this HW bug 444b5b6a5f4SSimon Horman */ 445b5b6a5f4SSimon Horman if ((direction == MMC_DATA_READ) && 446b5b6a5f4SSimon Horman blk_size == 2) 447b5b6a5f4SSimon Horman return 1; 448b5b6a5f4SSimon Horman 449b5b6a5f4SSimon Horman return blk_size; 450b5b6a5f4SSimon Horman } 451b5b6a5f4SSimon Horman 452b5b6a5f4SSimon Horman static void renesas_sdhi_enable_dma(struct tmio_mmc_host *host, bool enable) 453b5b6a5f4SSimon Horman { 454b5b6a5f4SSimon Horman sd_ctrl_write16(host, CTL_DMA_ENABLE, enable ? 2 : 0); 455b5b6a5f4SSimon Horman 456b5b6a5f4SSimon Horman /* enable 32bit access if DMA mode if possibile */ 457b5b6a5f4SSimon Horman renesas_sdhi_sdbuf_width(host, enable ? 32 : 16); 458b5b6a5f4SSimon Horman } 459b5b6a5f4SSimon Horman 4609d08428aSSimon Horman int renesas_sdhi_probe(struct platform_device *pdev, 4619d08428aSSimon Horman const struct tmio_mmc_dma_ops *dma_ops) 462b5b6a5f4SSimon Horman { 463b5b6a5f4SSimon Horman const struct renesas_sdhi_of_data *of_data = of_device_get_match_data( &pdev->dev); 464b5b6a5f4SSimon Horman struct renesas_sdhi *priv; 465b5b6a5f4SSimon Horman struct tmio_mmc_data *mmc_data; 466b5b6a5f4SSimon Horman struct tmio_mmc_data *mmd = pdev->dev.platform_data; 467b5b6a5f4SSimon Horman struct tmio_mmc_host *host; 468b5b6a5f4SSimon Horman struct resource *res; 469b5b6a5f4SSimon Horman int irq, ret, i; 470b5b6a5f4SSimon Horman struct tmio_mmc_dma *dma_priv; 471b5b6a5f4SSimon Horman 472b5b6a5f4SSimon Horman res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 473b5b6a5f4SSimon Horman if (!res) 474b5b6a5f4SSimon Horman return -EINVAL; 475b5b6a5f4SSimon Horman 476b5b6a5f4SSimon Horman priv = devm_kzalloc(&pdev->dev, sizeof(struct renesas_sdhi), GFP_KERNEL); 477b5b6a5f4SSimon Horman if (!priv) 478b5b6a5f4SSimon Horman return -ENOMEM; 479b5b6a5f4SSimon Horman 480b5b6a5f4SSimon Horman mmc_data = &priv->mmc_data; 481b5b6a5f4SSimon Horman dma_priv = &priv->dma_priv; 482b5b6a5f4SSimon Horman 483b5b6a5f4SSimon Horman priv->clk = devm_clk_get(&pdev->dev, NULL); 484b5b6a5f4SSimon Horman if (IS_ERR(priv->clk)) { 485b5b6a5f4SSimon Horman ret = PTR_ERR(priv->clk); 486b5b6a5f4SSimon Horman dev_err(&pdev->dev, "cannot get clock: %d\n", ret); 487b5b6a5f4SSimon Horman goto eprobe; 488b5b6a5f4SSimon Horman } 489b5b6a5f4SSimon Horman 490b5b6a5f4SSimon Horman /* 491b5b6a5f4SSimon Horman * Some controllers provide a 2nd clock just to run the internal card 492b5b6a5f4SSimon Horman * detection logic. Unfortunately, the existing driver architecture does 493b5b6a5f4SSimon Horman * not support a separation of clocks for runtime PM usage. When 494b5b6a5f4SSimon Horman * native hotplug is used, the tmio driver assumes that the core 495b5b6a5f4SSimon Horman * must continue to run for card detect to stay active, so we cannot 496b5b6a5f4SSimon Horman * disable it. 497b5b6a5f4SSimon Horman * Additionally, it is prohibited to supply a clock to the core but not 498b5b6a5f4SSimon Horman * to the card detect circuit. That leaves us with if separate clocks 499b5b6a5f4SSimon Horman * are presented, we must treat them both as virtually 1 clock. 500b5b6a5f4SSimon Horman */ 501b5b6a5f4SSimon Horman priv->clk_cd = devm_clk_get(&pdev->dev, "cd"); 502b5b6a5f4SSimon Horman if (IS_ERR(priv->clk_cd)) 503b5b6a5f4SSimon Horman priv->clk_cd = NULL; 504b5b6a5f4SSimon Horman 505b5b6a5f4SSimon Horman priv->pinctrl = devm_pinctrl_get(&pdev->dev); 506b5b6a5f4SSimon Horman if (!IS_ERR(priv->pinctrl)) { 507b5b6a5f4SSimon Horman priv->pins_default = pinctrl_lookup_state(priv->pinctrl, 508b5b6a5f4SSimon Horman PINCTRL_STATE_DEFAULT); 509b5b6a5f4SSimon Horman priv->pins_uhs = pinctrl_lookup_state(priv->pinctrl, 510b5b6a5f4SSimon Horman "state_uhs"); 511b5b6a5f4SSimon Horman } 512b5b6a5f4SSimon Horman 513b5b6a5f4SSimon Horman host = tmio_mmc_host_alloc(pdev); 514b5b6a5f4SSimon Horman if (!host) { 515b5b6a5f4SSimon Horman ret = -ENOMEM; 516b5b6a5f4SSimon Horman goto eprobe; 517b5b6a5f4SSimon Horman } 518b5b6a5f4SSimon Horman 519b5b6a5f4SSimon Horman 520b5b6a5f4SSimon Horman if (of_data) { 521b5b6a5f4SSimon Horman mmc_data->flags |= of_data->tmio_flags; 522b5b6a5f4SSimon Horman mmc_data->ocr_mask = of_data->tmio_ocr_mask; 523b5b6a5f4SSimon Horman mmc_data->capabilities |= of_data->capabilities; 524b5b6a5f4SSimon Horman mmc_data->capabilities2 |= of_data->capabilities2; 525b5b6a5f4SSimon Horman mmc_data->dma_rx_offset = of_data->dma_rx_offset; 526b5b6a5f4SSimon Horman dma_priv->dma_buswidth = of_data->dma_buswidth; 527b5b6a5f4SSimon Horman host->bus_shift = of_data->bus_shift; 528b5b6a5f4SSimon Horman } 529b5b6a5f4SSimon Horman 530b5b6a5f4SSimon Horman host->dma = dma_priv; 531b5b6a5f4SSimon Horman host->write16_hook = renesas_sdhi_write16_hook; 532b5b6a5f4SSimon Horman host->clk_enable = renesas_sdhi_clk_enable; 533b5b6a5f4SSimon Horman host->clk_update = renesas_sdhi_clk_update; 534b5b6a5f4SSimon Horman host->clk_disable = renesas_sdhi_clk_disable; 535b5b6a5f4SSimon Horman host->multi_io_quirk = renesas_sdhi_multi_io_quirk; 536b5b6a5f4SSimon Horman 537b5b6a5f4SSimon Horman /* SDR speeds are only available on Gen2+ */ 538b5b6a5f4SSimon Horman if (mmc_data->flags & TMIO_MMC_MIN_RCAR2) { 539b5b6a5f4SSimon Horman /* card_busy caused issues on r8a73a4 (pre-Gen2) CD-less SDHI */ 540b5b6a5f4SSimon Horman host->card_busy = renesas_sdhi_card_busy; 541b5b6a5f4SSimon Horman host->start_signal_voltage_switch = 542b5b6a5f4SSimon Horman renesas_sdhi_start_signal_voltage_switch; 543b5b6a5f4SSimon Horman } 544b5b6a5f4SSimon Horman 545b5b6a5f4SSimon Horman /* Orginally registers were 16 bit apart, could be 32 or 64 nowadays */ 546b5b6a5f4SSimon Horman if (!host->bus_shift && resource_size(res) > 0x100) /* old way to determine the shift */ 547b5b6a5f4SSimon Horman host->bus_shift = 1; 548b5b6a5f4SSimon Horman 549b5b6a5f4SSimon Horman if (mmd) 550b5b6a5f4SSimon Horman *mmc_data = *mmd; 551b5b6a5f4SSimon Horman 552b5b6a5f4SSimon Horman dma_priv->filter = shdma_chan_filter; 553b5b6a5f4SSimon Horman dma_priv->enable = renesas_sdhi_enable_dma; 554b5b6a5f4SSimon Horman 555b5b6a5f4SSimon Horman mmc_data->alignment_shift = 1; /* 2-byte alignment */ 556b5b6a5f4SSimon Horman mmc_data->capabilities |= MMC_CAP_MMC_HIGHSPEED; 557b5b6a5f4SSimon Horman 558b5b6a5f4SSimon Horman /* 559b5b6a5f4SSimon Horman * All SDHI blocks support 2-byte and larger block sizes in 4-bit 560b5b6a5f4SSimon Horman * bus width mode. 561b5b6a5f4SSimon Horman */ 562b5b6a5f4SSimon Horman mmc_data->flags |= TMIO_MMC_BLKSZ_2BYTES; 563b5b6a5f4SSimon Horman 564b5b6a5f4SSimon Horman /* 565b5b6a5f4SSimon Horman * All SDHI blocks support SDIO IRQ signalling. 566b5b6a5f4SSimon Horman */ 567b5b6a5f4SSimon Horman mmc_data->flags |= TMIO_MMC_SDIO_IRQ; 568b5b6a5f4SSimon Horman 569b5b6a5f4SSimon Horman /* 570b5b6a5f4SSimon Horman * All SDHI have CMD12 controll bit 571b5b6a5f4SSimon Horman */ 572b5b6a5f4SSimon Horman mmc_data->flags |= TMIO_MMC_HAVE_CMD12_CTRL; 573b5b6a5f4SSimon Horman 574b5b6a5f4SSimon Horman /* All SDHI have SDIO status bits which must be 1 */ 575b5b6a5f4SSimon Horman mmc_data->flags |= TMIO_MMC_SDIO_STATUS_SETBITS; 576b5b6a5f4SSimon Horman 5779d08428aSSimon Horman ret = tmio_mmc_host_probe(host, mmc_data, dma_ops); 578b5b6a5f4SSimon Horman if (ret < 0) 579b5b6a5f4SSimon Horman goto efree; 580b5b6a5f4SSimon Horman 581b5b6a5f4SSimon Horman /* Enable tuning iff we have an SCC and a supported mode */ 582b5b6a5f4SSimon Horman if (of_data && of_data->scc_offset && 583b5b6a5f4SSimon Horman (host->mmc->caps & MMC_CAP_UHS_SDR104 || 584b5b6a5f4SSimon Horman host->mmc->caps2 & MMC_CAP2_HS200_1_8V_SDR)) { 585b5b6a5f4SSimon Horman const struct renesas_sdhi_scc *taps = of_data->taps; 586b5b6a5f4SSimon Horman bool hit = false; 587b5b6a5f4SSimon Horman 588b5b6a5f4SSimon Horman host->mmc->caps |= MMC_CAP_HW_RESET; 589b5b6a5f4SSimon Horman 590b5b6a5f4SSimon Horman for (i = 0; i < of_data->taps_num; i++) { 591b5b6a5f4SSimon Horman if (taps[i].clk_rate == 0 || 592b5b6a5f4SSimon Horman taps[i].clk_rate == host->mmc->f_max) { 593b5b6a5f4SSimon Horman host->scc_tappos = taps->tap; 594b5b6a5f4SSimon Horman hit = true; 595b5b6a5f4SSimon Horman break; 596b5b6a5f4SSimon Horman } 597b5b6a5f4SSimon Horman } 598b5b6a5f4SSimon Horman 599b5b6a5f4SSimon Horman if (!hit) 600b5b6a5f4SSimon Horman dev_warn(&host->pdev->dev, "Unknown clock rate for SDR104\n"); 601b5b6a5f4SSimon Horman 602b5b6a5f4SSimon Horman priv->scc_ctl = host->ctl + of_data->scc_offset; 603b5b6a5f4SSimon Horman host->init_tuning = renesas_sdhi_init_tuning; 604b5b6a5f4SSimon Horman host->prepare_tuning = renesas_sdhi_prepare_tuning; 605b5b6a5f4SSimon Horman host->select_tuning = renesas_sdhi_select_tuning; 606b5b6a5f4SSimon Horman host->check_scc_error = renesas_sdhi_check_scc_error; 607b5b6a5f4SSimon Horman host->hw_reset = renesas_sdhi_hw_reset; 608b5b6a5f4SSimon Horman } 609b5b6a5f4SSimon Horman 610b5b6a5f4SSimon Horman i = 0; 611b5b6a5f4SSimon Horman while (1) { 612b5b6a5f4SSimon Horman irq = platform_get_irq(pdev, i); 613b5b6a5f4SSimon Horman if (irq < 0) 614b5b6a5f4SSimon Horman break; 615b5b6a5f4SSimon Horman i++; 616b5b6a5f4SSimon Horman ret = devm_request_irq(&pdev->dev, irq, tmio_mmc_irq, 0, 617b5b6a5f4SSimon Horman dev_name(&pdev->dev), host); 618b5b6a5f4SSimon Horman if (ret) 619b5b6a5f4SSimon Horman goto eirq; 620b5b6a5f4SSimon Horman } 621b5b6a5f4SSimon Horman 622b5b6a5f4SSimon Horman /* There must be at least one IRQ source */ 623b5b6a5f4SSimon Horman if (!i) { 624b5b6a5f4SSimon Horman ret = irq; 625b5b6a5f4SSimon Horman goto eirq; 626b5b6a5f4SSimon Horman } 627b5b6a5f4SSimon Horman 628b5b6a5f4SSimon Horman dev_info(&pdev->dev, "%s base at 0x%08lx max clock rate %u MHz\n", 629b5b6a5f4SSimon Horman mmc_hostname(host->mmc), (unsigned long) 630b5b6a5f4SSimon Horman (platform_get_resource(pdev, IORESOURCE_MEM, 0)->start), 631b5b6a5f4SSimon Horman host->mmc->f_max / 1000000); 632b5b6a5f4SSimon Horman 633b5b6a5f4SSimon Horman return ret; 634b5b6a5f4SSimon Horman 635b5b6a5f4SSimon Horman eirq: 636b5b6a5f4SSimon Horman tmio_mmc_host_remove(host); 637b5b6a5f4SSimon Horman efree: 638b5b6a5f4SSimon Horman tmio_mmc_host_free(host); 639b5b6a5f4SSimon Horman eprobe: 640b5b6a5f4SSimon Horman return ret; 641b5b6a5f4SSimon Horman } 6429d08428aSSimon Horman EXPORT_SYMBOL_GPL(renesas_sdhi_probe); 643b5b6a5f4SSimon Horman 6449d08428aSSimon Horman int renesas_sdhi_remove(struct platform_device *pdev) 645b5b6a5f4SSimon Horman { 646b5b6a5f4SSimon Horman struct mmc_host *mmc = platform_get_drvdata(pdev); 647b5b6a5f4SSimon Horman struct tmio_mmc_host *host = mmc_priv(mmc); 648b5b6a5f4SSimon Horman 649b5b6a5f4SSimon Horman tmio_mmc_host_remove(host); 650b5b6a5f4SSimon Horman 651b5b6a5f4SSimon Horman return 0; 652b5b6a5f4SSimon Horman } 6539d08428aSSimon Horman EXPORT_SYMBOL_GPL(renesas_sdhi_remove); 654