xref: /openbmc/linux/drivers/mmc/host/pxamci.h (revision b34e08d5)
1 #define MMC_STRPCL	0x0000
2 #define STOP_CLOCK		(1 << 0)
3 #define START_CLOCK		(2 << 0)
4 
5 #define MMC_STAT	0x0004
6 #define STAT_END_CMD_RES		(1 << 13)
7 #define STAT_PRG_DONE			(1 << 12)
8 #define STAT_DATA_TRAN_DONE		(1 << 11)
9 #define STAT_CLK_EN			(1 << 8)
10 #define STAT_RECV_FIFO_FULL		(1 << 7)
11 #define STAT_XMIT_FIFO_EMPTY		(1 << 6)
12 #define STAT_RES_CRC_ERR		(1 << 5)
13 #define STAT_SPI_READ_ERROR_TOKEN	(1 << 4)
14 #define STAT_CRC_READ_ERROR		(1 << 3)
15 #define STAT_CRC_WRITE_ERROR		(1 << 2)
16 #define STAT_TIME_OUT_RESPONSE		(1 << 1)
17 #define STAT_READ_TIME_OUT		(1 << 0)
18 
19 #define MMC_CLKRT	0x0008		/* 3 bit */
20 
21 #define MMC_SPI		0x000c
22 #define SPI_CS_ADDRESS		(1 << 3)
23 #define SPI_CS_EN		(1 << 2)
24 #define CRC_ON			(1 << 1)
25 #define SPI_EN			(1 << 0)
26 
27 #define MMC_CMDAT	0x0010
28 #define CMDAT_SDIO_INT_EN	(1 << 11)
29 #define CMDAT_SD_4DAT		(1 << 8)
30 #define CMDAT_DMAEN		(1 << 7)
31 #define CMDAT_INIT		(1 << 6)
32 #define CMDAT_BUSY		(1 << 5)
33 #define CMDAT_STREAM		(1 << 4)	/* 1 = stream */
34 #define CMDAT_WRITE		(1 << 3)	/* 1 = write */
35 #define CMDAT_DATAEN		(1 << 2)
36 #define CMDAT_RESP_NONE		(0 << 0)
37 #define CMDAT_RESP_SHORT	(1 << 0)
38 #define CMDAT_RESP_R2		(2 << 0)
39 #define CMDAT_RESP_R3		(3 << 0)
40 
41 #define MMC_RESTO	0x0014	/* 7 bit */
42 
43 #define MMC_RDTO	0x0018	/* 16 bit */
44 
45 #define MMC_BLKLEN	0x001c	/* 10 bit */
46 
47 #define MMC_NOB		0x0020	/* 16 bit */
48 
49 #define MMC_PRTBUF	0x0024
50 #define BUF_PART_FULL		(1 << 0)
51 
52 #define MMC_I_MASK	0x0028
53 
54 /*PXA27x MMC interrupts*/
55 #define SDIO_SUSPEND_ACK  	(1 << 12)
56 #define SDIO_INT          	(1 << 11)
57 #define RD_STALLED        	(1 << 10)
58 #define RES_ERR           	(1 << 9)
59 #define DAT_ERR           	(1 << 8)
60 #define TINT              	(1 << 7)
61 
62 /*PXA2xx MMC interrupts*/
63 #define TXFIFO_WR_REQ		(1 << 6)
64 #define RXFIFO_RD_REQ		(1 << 5)
65 #define CLK_IS_OFF		(1 << 4)
66 #define STOP_CMD		(1 << 3)
67 #define END_CMD_RES		(1 << 2)
68 #define PRG_DONE		(1 << 1)
69 #define DATA_TRAN_DONE		(1 << 0)
70 
71 #if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx)
72 #define MMC_I_MASK_ALL          0x00001fff
73 #else
74 #define MMC_I_MASK_ALL          0x0000007f
75 #endif
76 
77 #define MMC_I_REG	0x002c
78 /* same as MMC_I_MASK */
79 
80 #define MMC_CMD		0x0030
81 
82 #define MMC_ARGH	0x0034	/* 16 bit */
83 
84 #define MMC_ARGL	0x0038	/* 16 bit */
85 
86 #define MMC_RES		0x003c	/* 16 bit */
87 
88 #define MMC_RXFIFO	0x0040	/* 8 bit */
89 
90 #define MMC_TXFIFO	0x0044	/* 8 bit */
91