xref: /openbmc/linux/drivers/mmc/host/pxamci.h (revision b2441318)
1b2441318SGreg Kroah-Hartman /* SPDX-License-Identifier: GPL-2.0 */
21c6a0718SPierre Ossman #define MMC_STRPCL	0x0000
31c6a0718SPierre Ossman #define STOP_CLOCK		(1 << 0)
41c6a0718SPierre Ossman #define START_CLOCK		(2 << 0)
51c6a0718SPierre Ossman 
61c6a0718SPierre Ossman #define MMC_STAT	0x0004
71c6a0718SPierre Ossman #define STAT_END_CMD_RES		(1 << 13)
81c6a0718SPierre Ossman #define STAT_PRG_DONE			(1 << 12)
91c6a0718SPierre Ossman #define STAT_DATA_TRAN_DONE		(1 << 11)
101c6a0718SPierre Ossman #define STAT_CLK_EN			(1 << 8)
111c6a0718SPierre Ossman #define STAT_RECV_FIFO_FULL		(1 << 7)
121c6a0718SPierre Ossman #define STAT_XMIT_FIFO_EMPTY		(1 << 6)
131c6a0718SPierre Ossman #define STAT_RES_CRC_ERR		(1 << 5)
141c6a0718SPierre Ossman #define STAT_SPI_READ_ERROR_TOKEN	(1 << 4)
151c6a0718SPierre Ossman #define STAT_CRC_READ_ERROR		(1 << 3)
161c6a0718SPierre Ossman #define STAT_CRC_WRITE_ERROR		(1 << 2)
171c6a0718SPierre Ossman #define STAT_TIME_OUT_RESPONSE		(1 << 1)
181c6a0718SPierre Ossman #define STAT_READ_TIME_OUT		(1 << 0)
191c6a0718SPierre Ossman 
201c6a0718SPierre Ossman #define MMC_CLKRT	0x0008		/* 3 bit */
211c6a0718SPierre Ossman 
221c6a0718SPierre Ossman #define MMC_SPI		0x000c
231c6a0718SPierre Ossman #define SPI_CS_ADDRESS		(1 << 3)
241c6a0718SPierre Ossman #define SPI_CS_EN		(1 << 2)
251c6a0718SPierre Ossman #define CRC_ON			(1 << 1)
261c6a0718SPierre Ossman #define SPI_EN			(1 << 0)
271c6a0718SPierre Ossman 
281c6a0718SPierre Ossman #define MMC_CMDAT	0x0010
295d3ad4e8SBridge Wu #define CMDAT_SDIO_INT_EN	(1 << 11)
30df456f47SBridge Wu #define CMDAT_SD_4DAT		(1 << 8)
311c6a0718SPierre Ossman #define CMDAT_DMAEN		(1 << 7)
321c6a0718SPierre Ossman #define CMDAT_INIT		(1 << 6)
331c6a0718SPierre Ossman #define CMDAT_BUSY		(1 << 5)
341c6a0718SPierre Ossman #define CMDAT_STREAM		(1 << 4)	/* 1 = stream */
351c6a0718SPierre Ossman #define CMDAT_WRITE		(1 << 3)	/* 1 = write */
361c6a0718SPierre Ossman #define CMDAT_DATAEN		(1 << 2)
371c6a0718SPierre Ossman #define CMDAT_RESP_NONE		(0 << 0)
381c6a0718SPierre Ossman #define CMDAT_RESP_SHORT	(1 << 0)
391c6a0718SPierre Ossman #define CMDAT_RESP_R2		(2 << 0)
401c6a0718SPierre Ossman #define CMDAT_RESP_R3		(3 << 0)
411c6a0718SPierre Ossman 
421c6a0718SPierre Ossman #define MMC_RESTO	0x0014	/* 7 bit */
431c6a0718SPierre Ossman 
441c6a0718SPierre Ossman #define MMC_RDTO	0x0018	/* 16 bit */
451c6a0718SPierre Ossman 
461c6a0718SPierre Ossman #define MMC_BLKLEN	0x001c	/* 10 bit */
471c6a0718SPierre Ossman 
481c6a0718SPierre Ossman #define MMC_NOB		0x0020	/* 16 bit */
491c6a0718SPierre Ossman 
501c6a0718SPierre Ossman #define MMC_PRTBUF	0x0024
511c6a0718SPierre Ossman #define BUF_PART_FULL		(1 << 0)
521c6a0718SPierre Ossman 
531c6a0718SPierre Ossman #define MMC_I_MASK	0x0028
541c6a0718SPierre Ossman 
551c6a0718SPierre Ossman /*PXA27x MMC interrupts*/
561c6a0718SPierre Ossman #define SDIO_SUSPEND_ACK  	(1 << 12)
571c6a0718SPierre Ossman #define SDIO_INT          	(1 << 11)
581c6a0718SPierre Ossman #define RD_STALLED        	(1 << 10)
591c6a0718SPierre Ossman #define RES_ERR           	(1 << 9)
601c6a0718SPierre Ossman #define DAT_ERR           	(1 << 8)
611c6a0718SPierre Ossman #define TINT              	(1 << 7)
621c6a0718SPierre Ossman 
631c6a0718SPierre Ossman /*PXA2xx MMC interrupts*/
641c6a0718SPierre Ossman #define TXFIFO_WR_REQ		(1 << 6)
651c6a0718SPierre Ossman #define RXFIFO_RD_REQ		(1 << 5)
661c6a0718SPierre Ossman #define CLK_IS_OFF		(1 << 4)
671c6a0718SPierre Ossman #define STOP_CMD		(1 << 3)
681c6a0718SPierre Ossman #define END_CMD_RES		(1 << 2)
691c6a0718SPierre Ossman #define PRG_DONE		(1 << 1)
701c6a0718SPierre Ossman #define DATA_TRAN_DONE		(1 << 0)
711c6a0718SPierre Ossman 
72fafc9d3fSBridge Wu #if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx)
731c6a0718SPierre Ossman #define MMC_I_MASK_ALL          0x00001fff
741c6a0718SPierre Ossman #else
751c6a0718SPierre Ossman #define MMC_I_MASK_ALL          0x0000007f
761c6a0718SPierre Ossman #endif
771c6a0718SPierre Ossman 
781c6a0718SPierre Ossman #define MMC_I_REG	0x002c
791c6a0718SPierre Ossman /* same as MMC_I_MASK */
801c6a0718SPierre Ossman 
811c6a0718SPierre Ossman #define MMC_CMD		0x0030
821c6a0718SPierre Ossman 
831c6a0718SPierre Ossman #define MMC_ARGH	0x0034	/* 16 bit */
841c6a0718SPierre Ossman 
851c6a0718SPierre Ossman #define MMC_ARGL	0x0038	/* 16 bit */
861c6a0718SPierre Ossman 
871c6a0718SPierre Ossman #define MMC_RES		0x003c	/* 16 bit */
881c6a0718SPierre Ossman 
891c6a0718SPierre Ossman #define MMC_RXFIFO	0x0040	/* 8 bit */
901c6a0718SPierre Ossman 
911c6a0718SPierre Ossman #define MMC_TXFIFO	0x0044	/* 8 bit */
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