1a45c6cb8SMadhusudhan Chikkature /* 2a45c6cb8SMadhusudhan Chikkature * drivers/mmc/host/omap_hsmmc.c 3a45c6cb8SMadhusudhan Chikkature * 4a45c6cb8SMadhusudhan Chikkature * Driver for OMAP2430/3430 MMC controller. 5a45c6cb8SMadhusudhan Chikkature * 6a45c6cb8SMadhusudhan Chikkature * Copyright (C) 2007 Texas Instruments. 7a45c6cb8SMadhusudhan Chikkature * 8a45c6cb8SMadhusudhan Chikkature * Authors: 9a45c6cb8SMadhusudhan Chikkature * Syed Mohammed Khasim <x0khasim@ti.com> 10a45c6cb8SMadhusudhan Chikkature * Madhusudhan <madhu.cr@ti.com> 11a45c6cb8SMadhusudhan Chikkature * Mohit Jalori <mjalori@ti.com> 12a45c6cb8SMadhusudhan Chikkature * 13a45c6cb8SMadhusudhan Chikkature * This file is licensed under the terms of the GNU General Public License 14a45c6cb8SMadhusudhan Chikkature * version 2. This program is licensed "as is" without any warranty of any 15a45c6cb8SMadhusudhan Chikkature * kind, whether express or implied. 16a45c6cb8SMadhusudhan Chikkature */ 17a45c6cb8SMadhusudhan Chikkature 18a45c6cb8SMadhusudhan Chikkature #include <linux/module.h> 19a45c6cb8SMadhusudhan Chikkature #include <linux/init.h> 20a45c6cb8SMadhusudhan Chikkature #include <linux/interrupt.h> 21a45c6cb8SMadhusudhan Chikkature #include <linux/delay.h> 22a45c6cb8SMadhusudhan Chikkature #include <linux/dma-mapping.h> 23a45c6cb8SMadhusudhan Chikkature #include <linux/platform_device.h> 24a45c6cb8SMadhusudhan Chikkature #include <linux/workqueue.h> 25a45c6cb8SMadhusudhan Chikkature #include <linux/timer.h> 26a45c6cb8SMadhusudhan Chikkature #include <linux/clk.h> 27a45c6cb8SMadhusudhan Chikkature #include <linux/mmc/host.h> 28a45c6cb8SMadhusudhan Chikkature #include <linux/io.h> 29a45c6cb8SMadhusudhan Chikkature #include <linux/semaphore.h> 30a45c6cb8SMadhusudhan Chikkature #include <mach/dma.h> 31a45c6cb8SMadhusudhan Chikkature #include <mach/hardware.h> 32a45c6cb8SMadhusudhan Chikkature #include <mach/board.h> 33a45c6cb8SMadhusudhan Chikkature #include <mach/mmc.h> 34a45c6cb8SMadhusudhan Chikkature #include <mach/cpu.h> 35a45c6cb8SMadhusudhan Chikkature 36a45c6cb8SMadhusudhan Chikkature /* OMAP HSMMC Host Controller Registers */ 37a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_SYSCONFIG 0x0010 38a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_CON 0x002C 39a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_BLK 0x0104 40a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_ARG 0x0108 41a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_CMD 0x010C 42a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_RSP10 0x0110 43a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_RSP32 0x0114 44a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_RSP54 0x0118 45a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_RSP76 0x011C 46a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_DATA 0x0120 47a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_HCTL 0x0128 48a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_SYSCTL 0x012C 49a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_STAT 0x0130 50a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_IE 0x0134 51a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_ISE 0x0138 52a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_CAPA 0x0140 53a45c6cb8SMadhusudhan Chikkature 54a45c6cb8SMadhusudhan Chikkature #define VS18 (1 << 26) 55a45c6cb8SMadhusudhan Chikkature #define VS30 (1 << 25) 56a45c6cb8SMadhusudhan Chikkature #define SDVS18 (0x5 << 9) 57a45c6cb8SMadhusudhan Chikkature #define SDVS30 (0x6 << 9) 58eb250826SDavid Brownell #define SDVS33 (0x7 << 9) 59a45c6cb8SMadhusudhan Chikkature #define SDVSCLR 0xFFFFF1FF 60a45c6cb8SMadhusudhan Chikkature #define SDVSDET 0x00000400 61a45c6cb8SMadhusudhan Chikkature #define AUTOIDLE 0x1 62a45c6cb8SMadhusudhan Chikkature #define SDBP (1 << 8) 63a45c6cb8SMadhusudhan Chikkature #define DTO 0xe 64a45c6cb8SMadhusudhan Chikkature #define ICE 0x1 65a45c6cb8SMadhusudhan Chikkature #define ICS 0x2 66a45c6cb8SMadhusudhan Chikkature #define CEN (1 << 2) 67a45c6cb8SMadhusudhan Chikkature #define CLKD_MASK 0x0000FFC0 68a45c6cb8SMadhusudhan Chikkature #define CLKD_SHIFT 6 69a45c6cb8SMadhusudhan Chikkature #define DTO_MASK 0x000F0000 70a45c6cb8SMadhusudhan Chikkature #define DTO_SHIFT 16 71a45c6cb8SMadhusudhan Chikkature #define INT_EN_MASK 0x307F0033 72a45c6cb8SMadhusudhan Chikkature #define INIT_STREAM (1 << 1) 73a45c6cb8SMadhusudhan Chikkature #define DP_SELECT (1 << 21) 74a45c6cb8SMadhusudhan Chikkature #define DDIR (1 << 4) 75a45c6cb8SMadhusudhan Chikkature #define DMA_EN 0x1 76a45c6cb8SMadhusudhan Chikkature #define MSBS (1 << 5) 77a45c6cb8SMadhusudhan Chikkature #define BCE (1 << 1) 78a45c6cb8SMadhusudhan Chikkature #define FOUR_BIT (1 << 1) 79a45c6cb8SMadhusudhan Chikkature #define CC 0x1 80a45c6cb8SMadhusudhan Chikkature #define TC 0x02 81a45c6cb8SMadhusudhan Chikkature #define OD 0x1 82a45c6cb8SMadhusudhan Chikkature #define ERR (1 << 15) 83a45c6cb8SMadhusudhan Chikkature #define CMD_TIMEOUT (1 << 16) 84a45c6cb8SMadhusudhan Chikkature #define DATA_TIMEOUT (1 << 20) 85a45c6cb8SMadhusudhan Chikkature #define CMD_CRC (1 << 17) 86a45c6cb8SMadhusudhan Chikkature #define DATA_CRC (1 << 21) 87a45c6cb8SMadhusudhan Chikkature #define CARD_ERR (1 << 28) 88a45c6cb8SMadhusudhan Chikkature #define STAT_CLEAR 0xFFFFFFFF 89a45c6cb8SMadhusudhan Chikkature #define INIT_STREAM_CMD 0x00000000 90a45c6cb8SMadhusudhan Chikkature #define DUAL_VOLT_OCR_BIT 7 91a45c6cb8SMadhusudhan Chikkature #define SRC (1 << 25) 92a45c6cb8SMadhusudhan Chikkature #define SRD (1 << 26) 93a45c6cb8SMadhusudhan Chikkature 94a45c6cb8SMadhusudhan Chikkature /* 95a45c6cb8SMadhusudhan Chikkature * FIXME: Most likely all the data using these _DEVID defines should come 96a45c6cb8SMadhusudhan Chikkature * from the platform_data, or implemented in controller and slot specific 97a45c6cb8SMadhusudhan Chikkature * functions. 98a45c6cb8SMadhusudhan Chikkature */ 99a45c6cb8SMadhusudhan Chikkature #define OMAP_MMC1_DEVID 0 100a45c6cb8SMadhusudhan Chikkature #define OMAP_MMC2_DEVID 1 101a45c6cb8SMadhusudhan Chikkature 102a45c6cb8SMadhusudhan Chikkature #define OMAP_MMC_DATADIR_NONE 0 103a45c6cb8SMadhusudhan Chikkature #define OMAP_MMC_DATADIR_READ 1 104a45c6cb8SMadhusudhan Chikkature #define OMAP_MMC_DATADIR_WRITE 2 105a45c6cb8SMadhusudhan Chikkature #define MMC_TIMEOUT_MS 20 106a45c6cb8SMadhusudhan Chikkature #define OMAP_MMC_MASTER_CLOCK 96000000 107a45c6cb8SMadhusudhan Chikkature #define DRIVER_NAME "mmci-omap-hs" 108a45c6cb8SMadhusudhan Chikkature 109a45c6cb8SMadhusudhan Chikkature /* 110a45c6cb8SMadhusudhan Chikkature * One controller can have multiple slots, like on some omap boards using 111a45c6cb8SMadhusudhan Chikkature * omap.c controller driver. Luckily this is not currently done on any known 112a45c6cb8SMadhusudhan Chikkature * omap_hsmmc.c device. 113a45c6cb8SMadhusudhan Chikkature */ 114a45c6cb8SMadhusudhan Chikkature #define mmc_slot(host) (host->pdata->slots[host->slot_id]) 115a45c6cb8SMadhusudhan Chikkature 116a45c6cb8SMadhusudhan Chikkature /* 117a45c6cb8SMadhusudhan Chikkature * MMC Host controller read/write API's 118a45c6cb8SMadhusudhan Chikkature */ 119a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_READ(base, reg) \ 120a45c6cb8SMadhusudhan Chikkature __raw_readl((base) + OMAP_HSMMC_##reg) 121a45c6cb8SMadhusudhan Chikkature 122a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_WRITE(base, reg, val) \ 123a45c6cb8SMadhusudhan Chikkature __raw_writel((val), (base) + OMAP_HSMMC_##reg) 124a45c6cb8SMadhusudhan Chikkature 125a45c6cb8SMadhusudhan Chikkature struct mmc_omap_host { 126a45c6cb8SMadhusudhan Chikkature struct device *dev; 127a45c6cb8SMadhusudhan Chikkature struct mmc_host *mmc; 128a45c6cb8SMadhusudhan Chikkature struct mmc_request *mrq; 129a45c6cb8SMadhusudhan Chikkature struct mmc_command *cmd; 130a45c6cb8SMadhusudhan Chikkature struct mmc_data *data; 131a45c6cb8SMadhusudhan Chikkature struct clk *fclk; 132a45c6cb8SMadhusudhan Chikkature struct clk *iclk; 133a45c6cb8SMadhusudhan Chikkature struct clk *dbclk; 134a45c6cb8SMadhusudhan Chikkature struct semaphore sem; 135a45c6cb8SMadhusudhan Chikkature struct work_struct mmc_carddetect_work; 136a45c6cb8SMadhusudhan Chikkature void __iomem *base; 137a45c6cb8SMadhusudhan Chikkature resource_size_t mapbase; 138a45c6cb8SMadhusudhan Chikkature unsigned int id; 139a45c6cb8SMadhusudhan Chikkature unsigned int dma_len; 140a45c6cb8SMadhusudhan Chikkature unsigned int dma_dir; 141a45c6cb8SMadhusudhan Chikkature unsigned char bus_mode; 142a45c6cb8SMadhusudhan Chikkature unsigned char datadir; 143a45c6cb8SMadhusudhan Chikkature u32 *buffer; 144a45c6cb8SMadhusudhan Chikkature u32 bytesleft; 145a45c6cb8SMadhusudhan Chikkature int suspended; 146a45c6cb8SMadhusudhan Chikkature int irq; 147a45c6cb8SMadhusudhan Chikkature int carddetect; 148a45c6cb8SMadhusudhan Chikkature int use_dma, dma_ch; 149a45c6cb8SMadhusudhan Chikkature int initstr; 150a45c6cb8SMadhusudhan Chikkature int slot_id; 151a45c6cb8SMadhusudhan Chikkature int dbclk_enabled; 152a45c6cb8SMadhusudhan Chikkature struct omap_mmc_platform_data *pdata; 153a45c6cb8SMadhusudhan Chikkature }; 154a45c6cb8SMadhusudhan Chikkature 155a45c6cb8SMadhusudhan Chikkature /* 156a45c6cb8SMadhusudhan Chikkature * Stop clock to the card 157a45c6cb8SMadhusudhan Chikkature */ 158a45c6cb8SMadhusudhan Chikkature static void omap_mmc_stop_clock(struct mmc_omap_host *host) 159a45c6cb8SMadhusudhan Chikkature { 160a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, SYSCTL, 161a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_READ(host->base, SYSCTL) & ~CEN); 162a45c6cb8SMadhusudhan Chikkature if ((OMAP_HSMMC_READ(host->base, SYSCTL) & CEN) != 0x0) 163a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), "MMC Clock is not stoped\n"); 164a45c6cb8SMadhusudhan Chikkature } 165a45c6cb8SMadhusudhan Chikkature 166a45c6cb8SMadhusudhan Chikkature /* 167a45c6cb8SMadhusudhan Chikkature * Send init stream sequence to card 168a45c6cb8SMadhusudhan Chikkature * before sending IDLE command 169a45c6cb8SMadhusudhan Chikkature */ 170a45c6cb8SMadhusudhan Chikkature static void send_init_stream(struct mmc_omap_host *host) 171a45c6cb8SMadhusudhan Chikkature { 172a45c6cb8SMadhusudhan Chikkature int reg = 0; 173a45c6cb8SMadhusudhan Chikkature unsigned long timeout; 174a45c6cb8SMadhusudhan Chikkature 175a45c6cb8SMadhusudhan Chikkature disable_irq(host->irq); 176a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, CON, 177a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_READ(host->base, CON) | INIT_STREAM); 178a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, CMD, INIT_STREAM_CMD); 179a45c6cb8SMadhusudhan Chikkature 180a45c6cb8SMadhusudhan Chikkature timeout = jiffies + msecs_to_jiffies(MMC_TIMEOUT_MS); 181a45c6cb8SMadhusudhan Chikkature while ((reg != CC) && time_before(jiffies, timeout)) 182a45c6cb8SMadhusudhan Chikkature reg = OMAP_HSMMC_READ(host->base, STAT) & CC; 183a45c6cb8SMadhusudhan Chikkature 184a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, CON, 185a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_READ(host->base, CON) & ~INIT_STREAM); 186a45c6cb8SMadhusudhan Chikkature enable_irq(host->irq); 187a45c6cb8SMadhusudhan Chikkature } 188a45c6cb8SMadhusudhan Chikkature 189a45c6cb8SMadhusudhan Chikkature static inline 190a45c6cb8SMadhusudhan Chikkature int mmc_omap_cover_is_closed(struct mmc_omap_host *host) 191a45c6cb8SMadhusudhan Chikkature { 192a45c6cb8SMadhusudhan Chikkature int r = 1; 193a45c6cb8SMadhusudhan Chikkature 194a45c6cb8SMadhusudhan Chikkature if (host->pdata->slots[host->slot_id].get_cover_state) 195a45c6cb8SMadhusudhan Chikkature r = host->pdata->slots[host->slot_id].get_cover_state(host->dev, 196a45c6cb8SMadhusudhan Chikkature host->slot_id); 197a45c6cb8SMadhusudhan Chikkature return r; 198a45c6cb8SMadhusudhan Chikkature } 199a45c6cb8SMadhusudhan Chikkature 200a45c6cb8SMadhusudhan Chikkature static ssize_t 201a45c6cb8SMadhusudhan Chikkature mmc_omap_show_cover_switch(struct device *dev, struct device_attribute *attr, 202a45c6cb8SMadhusudhan Chikkature char *buf) 203a45c6cb8SMadhusudhan Chikkature { 204a45c6cb8SMadhusudhan Chikkature struct mmc_host *mmc = container_of(dev, struct mmc_host, class_dev); 205a45c6cb8SMadhusudhan Chikkature struct mmc_omap_host *host = mmc_priv(mmc); 206a45c6cb8SMadhusudhan Chikkature 207a45c6cb8SMadhusudhan Chikkature return sprintf(buf, "%s\n", mmc_omap_cover_is_closed(host) ? "closed" : 208a45c6cb8SMadhusudhan Chikkature "open"); 209a45c6cb8SMadhusudhan Chikkature } 210a45c6cb8SMadhusudhan Chikkature 211a45c6cb8SMadhusudhan Chikkature static DEVICE_ATTR(cover_switch, S_IRUGO, mmc_omap_show_cover_switch, NULL); 212a45c6cb8SMadhusudhan Chikkature 213a45c6cb8SMadhusudhan Chikkature static ssize_t 214a45c6cb8SMadhusudhan Chikkature mmc_omap_show_slot_name(struct device *dev, struct device_attribute *attr, 215a45c6cb8SMadhusudhan Chikkature char *buf) 216a45c6cb8SMadhusudhan Chikkature { 217a45c6cb8SMadhusudhan Chikkature struct mmc_host *mmc = container_of(dev, struct mmc_host, class_dev); 218a45c6cb8SMadhusudhan Chikkature struct mmc_omap_host *host = mmc_priv(mmc); 219a45c6cb8SMadhusudhan Chikkature struct omap_mmc_slot_data slot = host->pdata->slots[host->slot_id]; 220a45c6cb8SMadhusudhan Chikkature 221a45c6cb8SMadhusudhan Chikkature return sprintf(buf, "slot:%s\n", slot.name); 222a45c6cb8SMadhusudhan Chikkature } 223a45c6cb8SMadhusudhan Chikkature 224a45c6cb8SMadhusudhan Chikkature static DEVICE_ATTR(slot_name, S_IRUGO, mmc_omap_show_slot_name, NULL); 225a45c6cb8SMadhusudhan Chikkature 226a45c6cb8SMadhusudhan Chikkature /* 227a45c6cb8SMadhusudhan Chikkature * Configure the response type and send the cmd. 228a45c6cb8SMadhusudhan Chikkature */ 229a45c6cb8SMadhusudhan Chikkature static void 230a45c6cb8SMadhusudhan Chikkature mmc_omap_start_command(struct mmc_omap_host *host, struct mmc_command *cmd, 231a45c6cb8SMadhusudhan Chikkature struct mmc_data *data) 232a45c6cb8SMadhusudhan Chikkature { 233a45c6cb8SMadhusudhan Chikkature int cmdreg = 0, resptype = 0, cmdtype = 0; 234a45c6cb8SMadhusudhan Chikkature 235a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), "%s: CMD%d, argument 0x%08x\n", 236a45c6cb8SMadhusudhan Chikkature mmc_hostname(host->mmc), cmd->opcode, cmd->arg); 237a45c6cb8SMadhusudhan Chikkature host->cmd = cmd; 238a45c6cb8SMadhusudhan Chikkature 239a45c6cb8SMadhusudhan Chikkature /* 240a45c6cb8SMadhusudhan Chikkature * Clear status bits and enable interrupts 241a45c6cb8SMadhusudhan Chikkature */ 242a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, STAT, STAT_CLEAR); 243a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, ISE, INT_EN_MASK); 244a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, IE, INT_EN_MASK); 245a45c6cb8SMadhusudhan Chikkature 246a45c6cb8SMadhusudhan Chikkature if (cmd->flags & MMC_RSP_PRESENT) { 247a45c6cb8SMadhusudhan Chikkature if (cmd->flags & MMC_RSP_136) 248a45c6cb8SMadhusudhan Chikkature resptype = 1; 249a45c6cb8SMadhusudhan Chikkature else 250a45c6cb8SMadhusudhan Chikkature resptype = 2; 251a45c6cb8SMadhusudhan Chikkature } 252a45c6cb8SMadhusudhan Chikkature 253a45c6cb8SMadhusudhan Chikkature /* 254a45c6cb8SMadhusudhan Chikkature * Unlike OMAP1 controller, the cmdtype does not seem to be based on 255a45c6cb8SMadhusudhan Chikkature * ac, bc, adtc, bcr. Only commands ending an open ended transfer need 256a45c6cb8SMadhusudhan Chikkature * a val of 0x3, rest 0x0. 257a45c6cb8SMadhusudhan Chikkature */ 258a45c6cb8SMadhusudhan Chikkature if (cmd == host->mrq->stop) 259a45c6cb8SMadhusudhan Chikkature cmdtype = 0x3; 260a45c6cb8SMadhusudhan Chikkature 261a45c6cb8SMadhusudhan Chikkature cmdreg = (cmd->opcode << 24) | (resptype << 16) | (cmdtype << 22); 262a45c6cb8SMadhusudhan Chikkature 263a45c6cb8SMadhusudhan Chikkature if (data) { 264a45c6cb8SMadhusudhan Chikkature cmdreg |= DP_SELECT | MSBS | BCE; 265a45c6cb8SMadhusudhan Chikkature if (data->flags & MMC_DATA_READ) 266a45c6cb8SMadhusudhan Chikkature cmdreg |= DDIR; 267a45c6cb8SMadhusudhan Chikkature else 268a45c6cb8SMadhusudhan Chikkature cmdreg &= ~(DDIR); 269a45c6cb8SMadhusudhan Chikkature } 270a45c6cb8SMadhusudhan Chikkature 271a45c6cb8SMadhusudhan Chikkature if (host->use_dma) 272a45c6cb8SMadhusudhan Chikkature cmdreg |= DMA_EN; 273a45c6cb8SMadhusudhan Chikkature 274a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, ARG, cmd->arg); 275a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, CMD, cmdreg); 276a45c6cb8SMadhusudhan Chikkature } 277a45c6cb8SMadhusudhan Chikkature 278a45c6cb8SMadhusudhan Chikkature /* 279a45c6cb8SMadhusudhan Chikkature * Notify the transfer complete to MMC core 280a45c6cb8SMadhusudhan Chikkature */ 281a45c6cb8SMadhusudhan Chikkature static void 282a45c6cb8SMadhusudhan Chikkature mmc_omap_xfer_done(struct mmc_omap_host *host, struct mmc_data *data) 283a45c6cb8SMadhusudhan Chikkature { 284a45c6cb8SMadhusudhan Chikkature host->data = NULL; 285a45c6cb8SMadhusudhan Chikkature 286a45c6cb8SMadhusudhan Chikkature if (host->use_dma && host->dma_ch != -1) 287a45c6cb8SMadhusudhan Chikkature dma_unmap_sg(mmc_dev(host->mmc), data->sg, host->dma_len, 288a45c6cb8SMadhusudhan Chikkature host->dma_dir); 289a45c6cb8SMadhusudhan Chikkature 290a45c6cb8SMadhusudhan Chikkature host->datadir = OMAP_MMC_DATADIR_NONE; 291a45c6cb8SMadhusudhan Chikkature 292a45c6cb8SMadhusudhan Chikkature if (!data->error) 293a45c6cb8SMadhusudhan Chikkature data->bytes_xfered += data->blocks * (data->blksz); 294a45c6cb8SMadhusudhan Chikkature else 295a45c6cb8SMadhusudhan Chikkature data->bytes_xfered = 0; 296a45c6cb8SMadhusudhan Chikkature 297a45c6cb8SMadhusudhan Chikkature if (!data->stop) { 298a45c6cb8SMadhusudhan Chikkature host->mrq = NULL; 299a45c6cb8SMadhusudhan Chikkature mmc_request_done(host->mmc, data->mrq); 300a45c6cb8SMadhusudhan Chikkature return; 301a45c6cb8SMadhusudhan Chikkature } 302a45c6cb8SMadhusudhan Chikkature mmc_omap_start_command(host, data->stop, NULL); 303a45c6cb8SMadhusudhan Chikkature } 304a45c6cb8SMadhusudhan Chikkature 305a45c6cb8SMadhusudhan Chikkature /* 306a45c6cb8SMadhusudhan Chikkature * Notify the core about command completion 307a45c6cb8SMadhusudhan Chikkature */ 308a45c6cb8SMadhusudhan Chikkature static void 309a45c6cb8SMadhusudhan Chikkature mmc_omap_cmd_done(struct mmc_omap_host *host, struct mmc_command *cmd) 310a45c6cb8SMadhusudhan Chikkature { 311a45c6cb8SMadhusudhan Chikkature host->cmd = NULL; 312a45c6cb8SMadhusudhan Chikkature 313a45c6cb8SMadhusudhan Chikkature if (cmd->flags & MMC_RSP_PRESENT) { 314a45c6cb8SMadhusudhan Chikkature if (cmd->flags & MMC_RSP_136) { 315a45c6cb8SMadhusudhan Chikkature /* response type 2 */ 316a45c6cb8SMadhusudhan Chikkature cmd->resp[3] = OMAP_HSMMC_READ(host->base, RSP10); 317a45c6cb8SMadhusudhan Chikkature cmd->resp[2] = OMAP_HSMMC_READ(host->base, RSP32); 318a45c6cb8SMadhusudhan Chikkature cmd->resp[1] = OMAP_HSMMC_READ(host->base, RSP54); 319a45c6cb8SMadhusudhan Chikkature cmd->resp[0] = OMAP_HSMMC_READ(host->base, RSP76); 320a45c6cb8SMadhusudhan Chikkature } else { 321a45c6cb8SMadhusudhan Chikkature /* response types 1, 1b, 3, 4, 5, 6 */ 322a45c6cb8SMadhusudhan Chikkature cmd->resp[0] = OMAP_HSMMC_READ(host->base, RSP10); 323a45c6cb8SMadhusudhan Chikkature } 324a45c6cb8SMadhusudhan Chikkature } 325a45c6cb8SMadhusudhan Chikkature if (host->data == NULL || cmd->error) { 326a45c6cb8SMadhusudhan Chikkature host->mrq = NULL; 327a45c6cb8SMadhusudhan Chikkature mmc_request_done(host->mmc, cmd->mrq); 328a45c6cb8SMadhusudhan Chikkature } 329a45c6cb8SMadhusudhan Chikkature } 330a45c6cb8SMadhusudhan Chikkature 331a45c6cb8SMadhusudhan Chikkature /* 332a45c6cb8SMadhusudhan Chikkature * DMA clean up for command errors 333a45c6cb8SMadhusudhan Chikkature */ 334a45c6cb8SMadhusudhan Chikkature static void mmc_dma_cleanup(struct mmc_omap_host *host) 335a45c6cb8SMadhusudhan Chikkature { 336a45c6cb8SMadhusudhan Chikkature host->data->error = -ETIMEDOUT; 337a45c6cb8SMadhusudhan Chikkature 338a45c6cb8SMadhusudhan Chikkature if (host->use_dma && host->dma_ch != -1) { 339a45c6cb8SMadhusudhan Chikkature dma_unmap_sg(mmc_dev(host->mmc), host->data->sg, host->dma_len, 340a45c6cb8SMadhusudhan Chikkature host->dma_dir); 341a45c6cb8SMadhusudhan Chikkature omap_free_dma(host->dma_ch); 342a45c6cb8SMadhusudhan Chikkature host->dma_ch = -1; 343a45c6cb8SMadhusudhan Chikkature up(&host->sem); 344a45c6cb8SMadhusudhan Chikkature } 345a45c6cb8SMadhusudhan Chikkature host->data = NULL; 346a45c6cb8SMadhusudhan Chikkature host->datadir = OMAP_MMC_DATADIR_NONE; 347a45c6cb8SMadhusudhan Chikkature } 348a45c6cb8SMadhusudhan Chikkature 349a45c6cb8SMadhusudhan Chikkature /* 350a45c6cb8SMadhusudhan Chikkature * Readable error output 351a45c6cb8SMadhusudhan Chikkature */ 352a45c6cb8SMadhusudhan Chikkature #ifdef CONFIG_MMC_DEBUG 353a45c6cb8SMadhusudhan Chikkature static void mmc_omap_report_irq(struct mmc_omap_host *host, u32 status) 354a45c6cb8SMadhusudhan Chikkature { 355a45c6cb8SMadhusudhan Chikkature /* --- means reserved bit without definition at documentation */ 356a45c6cb8SMadhusudhan Chikkature static const char *mmc_omap_status_bits[] = { 357a45c6cb8SMadhusudhan Chikkature "CC", "TC", "BGE", "---", "BWR", "BRR", "---", "---", "CIRQ", 358a45c6cb8SMadhusudhan Chikkature "OBI", "---", "---", "---", "---", "---", "ERRI", "CTO", "CCRC", 359a45c6cb8SMadhusudhan Chikkature "CEB", "CIE", "DTO", "DCRC", "DEB", "---", "ACE", "---", 360a45c6cb8SMadhusudhan Chikkature "---", "---", "---", "CERR", "CERR", "BADA", "---", "---", "---" 361a45c6cb8SMadhusudhan Chikkature }; 362a45c6cb8SMadhusudhan Chikkature char res[256]; 363a45c6cb8SMadhusudhan Chikkature char *buf = res; 364a45c6cb8SMadhusudhan Chikkature int len, i; 365a45c6cb8SMadhusudhan Chikkature 366a45c6cb8SMadhusudhan Chikkature len = sprintf(buf, "MMC IRQ 0x%x :", status); 367a45c6cb8SMadhusudhan Chikkature buf += len; 368a45c6cb8SMadhusudhan Chikkature 369a45c6cb8SMadhusudhan Chikkature for (i = 0; i < ARRAY_SIZE(mmc_omap_status_bits); i++) 370a45c6cb8SMadhusudhan Chikkature if (status & (1 << i)) { 371a45c6cb8SMadhusudhan Chikkature len = sprintf(buf, " %s", mmc_omap_status_bits[i]); 372a45c6cb8SMadhusudhan Chikkature buf += len; 373a45c6cb8SMadhusudhan Chikkature } 374a45c6cb8SMadhusudhan Chikkature 375a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), "%s\n", res); 376a45c6cb8SMadhusudhan Chikkature } 377a45c6cb8SMadhusudhan Chikkature #endif /* CONFIG_MMC_DEBUG */ 378a45c6cb8SMadhusudhan Chikkature 379a45c6cb8SMadhusudhan Chikkature 380a45c6cb8SMadhusudhan Chikkature /* 381a45c6cb8SMadhusudhan Chikkature * MMC controller IRQ handler 382a45c6cb8SMadhusudhan Chikkature */ 383a45c6cb8SMadhusudhan Chikkature static irqreturn_t mmc_omap_irq(int irq, void *dev_id) 384a45c6cb8SMadhusudhan Chikkature { 385a45c6cb8SMadhusudhan Chikkature struct mmc_omap_host *host = dev_id; 386a45c6cb8SMadhusudhan Chikkature struct mmc_data *data; 387a45c6cb8SMadhusudhan Chikkature int end_cmd = 0, end_trans = 0, status; 388a45c6cb8SMadhusudhan Chikkature 389a45c6cb8SMadhusudhan Chikkature if (host->cmd == NULL && host->data == NULL) { 390a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, STAT, 391a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_READ(host->base, STAT)); 392a45c6cb8SMadhusudhan Chikkature return IRQ_HANDLED; 393a45c6cb8SMadhusudhan Chikkature } 394a45c6cb8SMadhusudhan Chikkature 395a45c6cb8SMadhusudhan Chikkature data = host->data; 396a45c6cb8SMadhusudhan Chikkature status = OMAP_HSMMC_READ(host->base, STAT); 397a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), "IRQ Status is %x\n", status); 398a45c6cb8SMadhusudhan Chikkature 399a45c6cb8SMadhusudhan Chikkature if (status & ERR) { 400a45c6cb8SMadhusudhan Chikkature #ifdef CONFIG_MMC_DEBUG 401a45c6cb8SMadhusudhan Chikkature mmc_omap_report_irq(host, status); 402a45c6cb8SMadhusudhan Chikkature #endif 403a45c6cb8SMadhusudhan Chikkature if ((status & CMD_TIMEOUT) || 404a45c6cb8SMadhusudhan Chikkature (status & CMD_CRC)) { 405a45c6cb8SMadhusudhan Chikkature if (host->cmd) { 406a45c6cb8SMadhusudhan Chikkature if (status & CMD_TIMEOUT) { 407a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, SYSCTL, 408a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_READ(host->base, 409a45c6cb8SMadhusudhan Chikkature SYSCTL) | SRC); 410a45c6cb8SMadhusudhan Chikkature while (OMAP_HSMMC_READ(host->base, 411a45c6cb8SMadhusudhan Chikkature SYSCTL) & SRC) 412a45c6cb8SMadhusudhan Chikkature ; 413a45c6cb8SMadhusudhan Chikkature 414a45c6cb8SMadhusudhan Chikkature host->cmd->error = -ETIMEDOUT; 415a45c6cb8SMadhusudhan Chikkature } else { 416a45c6cb8SMadhusudhan Chikkature host->cmd->error = -EILSEQ; 417a45c6cb8SMadhusudhan Chikkature } 418a45c6cb8SMadhusudhan Chikkature end_cmd = 1; 419a45c6cb8SMadhusudhan Chikkature } 420a45c6cb8SMadhusudhan Chikkature if (host->data) 421a45c6cb8SMadhusudhan Chikkature mmc_dma_cleanup(host); 422a45c6cb8SMadhusudhan Chikkature } 423a45c6cb8SMadhusudhan Chikkature if ((status & DATA_TIMEOUT) || 424a45c6cb8SMadhusudhan Chikkature (status & DATA_CRC)) { 425a45c6cb8SMadhusudhan Chikkature if (host->data) { 426a45c6cb8SMadhusudhan Chikkature if (status & DATA_TIMEOUT) 427a45c6cb8SMadhusudhan Chikkature mmc_dma_cleanup(host); 428a45c6cb8SMadhusudhan Chikkature else 429a45c6cb8SMadhusudhan Chikkature host->data->error = -EILSEQ; 430a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, SYSCTL, 431a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_READ(host->base, 432a45c6cb8SMadhusudhan Chikkature SYSCTL) | SRD); 433a45c6cb8SMadhusudhan Chikkature while (OMAP_HSMMC_READ(host->base, 434a45c6cb8SMadhusudhan Chikkature SYSCTL) & SRD) 435a45c6cb8SMadhusudhan Chikkature ; 436a45c6cb8SMadhusudhan Chikkature end_trans = 1; 437a45c6cb8SMadhusudhan Chikkature } 438a45c6cb8SMadhusudhan Chikkature } 439a45c6cb8SMadhusudhan Chikkature if (status & CARD_ERR) { 440a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), 441a45c6cb8SMadhusudhan Chikkature "Ignoring card err CMD%d\n", host->cmd->opcode); 442a45c6cb8SMadhusudhan Chikkature if (host->cmd) 443a45c6cb8SMadhusudhan Chikkature end_cmd = 1; 444a45c6cb8SMadhusudhan Chikkature if (host->data) 445a45c6cb8SMadhusudhan Chikkature end_trans = 1; 446a45c6cb8SMadhusudhan Chikkature } 447a45c6cb8SMadhusudhan Chikkature } 448a45c6cb8SMadhusudhan Chikkature 449a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, STAT, status); 450a45c6cb8SMadhusudhan Chikkature 451a45c6cb8SMadhusudhan Chikkature if (end_cmd || (status & CC)) 452a45c6cb8SMadhusudhan Chikkature mmc_omap_cmd_done(host, host->cmd); 453a45c6cb8SMadhusudhan Chikkature if (end_trans || (status & TC)) 454a45c6cb8SMadhusudhan Chikkature mmc_omap_xfer_done(host, data); 455a45c6cb8SMadhusudhan Chikkature 456a45c6cb8SMadhusudhan Chikkature return IRQ_HANDLED; 457a45c6cb8SMadhusudhan Chikkature } 458a45c6cb8SMadhusudhan Chikkature 459a45c6cb8SMadhusudhan Chikkature /* 460eb250826SDavid Brownell * Switch MMC interface voltage ... only relevant for MMC1. 461eb250826SDavid Brownell * 462eb250826SDavid Brownell * MMC2 and MMC3 use fixed 1.8V levels, and maybe a transceiver. 463eb250826SDavid Brownell * The MMC2 transceiver controls are used instead of DAT4..DAT7. 464eb250826SDavid Brownell * Some chips, like eMMC ones, use internal transceivers. 465a45c6cb8SMadhusudhan Chikkature */ 466a45c6cb8SMadhusudhan Chikkature static int omap_mmc_switch_opcond(struct mmc_omap_host *host, int vdd) 467a45c6cb8SMadhusudhan Chikkature { 468a45c6cb8SMadhusudhan Chikkature u32 reg_val = 0; 469a45c6cb8SMadhusudhan Chikkature int ret; 470a45c6cb8SMadhusudhan Chikkature 471eb250826SDavid Brownell if (host->id != OMAP_MMC1_DEVID) 472eb250826SDavid Brownell return 0; 473eb250826SDavid Brownell 474a45c6cb8SMadhusudhan Chikkature /* Disable the clocks */ 475a45c6cb8SMadhusudhan Chikkature clk_disable(host->fclk); 476a45c6cb8SMadhusudhan Chikkature clk_disable(host->iclk); 477a45c6cb8SMadhusudhan Chikkature clk_disable(host->dbclk); 478a45c6cb8SMadhusudhan Chikkature 479a45c6cb8SMadhusudhan Chikkature /* Turn the power off */ 480a45c6cb8SMadhusudhan Chikkature ret = mmc_slot(host).set_power(host->dev, host->slot_id, 0, 0); 481a45c6cb8SMadhusudhan Chikkature if (ret != 0) 482a45c6cb8SMadhusudhan Chikkature goto err; 483a45c6cb8SMadhusudhan Chikkature 484a45c6cb8SMadhusudhan Chikkature /* Turn the power ON with given VDD 1.8 or 3.0v */ 485a45c6cb8SMadhusudhan Chikkature ret = mmc_slot(host).set_power(host->dev, host->slot_id, 1, vdd); 486a45c6cb8SMadhusudhan Chikkature if (ret != 0) 487a45c6cb8SMadhusudhan Chikkature goto err; 488a45c6cb8SMadhusudhan Chikkature 489a45c6cb8SMadhusudhan Chikkature clk_enable(host->fclk); 490a45c6cb8SMadhusudhan Chikkature clk_enable(host->iclk); 491a45c6cb8SMadhusudhan Chikkature clk_enable(host->dbclk); 492a45c6cb8SMadhusudhan Chikkature 493a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, HCTL, 494a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_READ(host->base, HCTL) & SDVSCLR); 495a45c6cb8SMadhusudhan Chikkature reg_val = OMAP_HSMMC_READ(host->base, HCTL); 496eb250826SDavid Brownell 497a45c6cb8SMadhusudhan Chikkature /* 498a45c6cb8SMadhusudhan Chikkature * If a MMC dual voltage card is detected, the set_ios fn calls 499a45c6cb8SMadhusudhan Chikkature * this fn with VDD bit set for 1.8V. Upon card removal from the 500a45c6cb8SMadhusudhan Chikkature * slot, omap_mmc_set_ios sets the VDD back to 3V on MMC_POWER_OFF. 501a45c6cb8SMadhusudhan Chikkature * 502eb250826SDavid Brownell * Cope with a bit of slop in the range ... per data sheets: 503eb250826SDavid Brownell * - "1.8V" for vdds_mmc1/vdds_mmc1a can be up to 2.45V max, 504eb250826SDavid Brownell * but recommended values are 1.71V to 1.89V 505eb250826SDavid Brownell * - "3.0V" for vdds_mmc1/vdds_mmc1a can be up to 3.5V max, 506eb250826SDavid Brownell * but recommended values are 2.7V to 3.3V 507eb250826SDavid Brownell * 508eb250826SDavid Brownell * Board setup code shouldn't permit anything very out-of-range. 509eb250826SDavid Brownell * TWL4030-family VMMC1 and VSIM regulators are fine (avoiding the 510eb250826SDavid Brownell * middle range) but VSIM can't power DAT4..DAT7 at more than 3V. 511a45c6cb8SMadhusudhan Chikkature */ 512eb250826SDavid Brownell if ((1 << vdd) <= MMC_VDD_23_24) 513a45c6cb8SMadhusudhan Chikkature reg_val |= SDVS18; 514eb250826SDavid Brownell else 515eb250826SDavid Brownell reg_val |= SDVS30; 516a45c6cb8SMadhusudhan Chikkature 517a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, HCTL, reg_val); 518a45c6cb8SMadhusudhan Chikkature 519a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, HCTL, 520a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_READ(host->base, HCTL) | SDBP); 521a45c6cb8SMadhusudhan Chikkature 522a45c6cb8SMadhusudhan Chikkature return 0; 523a45c6cb8SMadhusudhan Chikkature err: 524a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), "Unable to switch operating voltage\n"); 525a45c6cb8SMadhusudhan Chikkature return ret; 526a45c6cb8SMadhusudhan Chikkature } 527a45c6cb8SMadhusudhan Chikkature 528a45c6cb8SMadhusudhan Chikkature /* 529a45c6cb8SMadhusudhan Chikkature * Work Item to notify the core about card insertion/removal 530a45c6cb8SMadhusudhan Chikkature */ 531a45c6cb8SMadhusudhan Chikkature static void mmc_omap_detect(struct work_struct *work) 532a45c6cb8SMadhusudhan Chikkature { 533a45c6cb8SMadhusudhan Chikkature struct mmc_omap_host *host = container_of(work, struct mmc_omap_host, 534a45c6cb8SMadhusudhan Chikkature mmc_carddetect_work); 535249d0fa9SDavid Brownell struct omap_mmc_slot_data *slot = &mmc_slot(host); 536249d0fa9SDavid Brownell 537249d0fa9SDavid Brownell host->carddetect = slot->card_detect(slot->card_detect_irq); 538a45c6cb8SMadhusudhan Chikkature 539a45c6cb8SMadhusudhan Chikkature sysfs_notify(&host->mmc->class_dev.kobj, NULL, "cover_switch"); 540a45c6cb8SMadhusudhan Chikkature if (host->carddetect) { 541a45c6cb8SMadhusudhan Chikkature mmc_detect_change(host->mmc, (HZ * 200) / 1000); 542a45c6cb8SMadhusudhan Chikkature } else { 543a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, SYSCTL, 544a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_READ(host->base, SYSCTL) | SRD); 545a45c6cb8SMadhusudhan Chikkature while (OMAP_HSMMC_READ(host->base, SYSCTL) & SRD) 546a45c6cb8SMadhusudhan Chikkature ; 547a45c6cb8SMadhusudhan Chikkature 548a45c6cb8SMadhusudhan Chikkature mmc_detect_change(host->mmc, (HZ * 50) / 1000); 549a45c6cb8SMadhusudhan Chikkature } 550a45c6cb8SMadhusudhan Chikkature } 551a45c6cb8SMadhusudhan Chikkature 552a45c6cb8SMadhusudhan Chikkature /* 553a45c6cb8SMadhusudhan Chikkature * ISR for handling card insertion and removal 554a45c6cb8SMadhusudhan Chikkature */ 555a45c6cb8SMadhusudhan Chikkature static irqreturn_t omap_mmc_cd_handler(int irq, void *dev_id) 556a45c6cb8SMadhusudhan Chikkature { 557a45c6cb8SMadhusudhan Chikkature struct mmc_omap_host *host = (struct mmc_omap_host *)dev_id; 558a45c6cb8SMadhusudhan Chikkature 559a45c6cb8SMadhusudhan Chikkature schedule_work(&host->mmc_carddetect_work); 560a45c6cb8SMadhusudhan Chikkature 561a45c6cb8SMadhusudhan Chikkature return IRQ_HANDLED; 562a45c6cb8SMadhusudhan Chikkature } 563a45c6cb8SMadhusudhan Chikkature 564a45c6cb8SMadhusudhan Chikkature /* 565a45c6cb8SMadhusudhan Chikkature * DMA call back function 566a45c6cb8SMadhusudhan Chikkature */ 567a45c6cb8SMadhusudhan Chikkature static void mmc_omap_dma_cb(int lch, u16 ch_status, void *data) 568a45c6cb8SMadhusudhan Chikkature { 569a45c6cb8SMadhusudhan Chikkature struct mmc_omap_host *host = data; 570a45c6cb8SMadhusudhan Chikkature 571a45c6cb8SMadhusudhan Chikkature if (ch_status & OMAP2_DMA_MISALIGNED_ERR_IRQ) 572a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), "MISALIGNED_ADRS_ERR\n"); 573a45c6cb8SMadhusudhan Chikkature 574a45c6cb8SMadhusudhan Chikkature if (host->dma_ch < 0) 575a45c6cb8SMadhusudhan Chikkature return; 576a45c6cb8SMadhusudhan Chikkature 577a45c6cb8SMadhusudhan Chikkature omap_free_dma(host->dma_ch); 578a45c6cb8SMadhusudhan Chikkature host->dma_ch = -1; 579a45c6cb8SMadhusudhan Chikkature /* 580a45c6cb8SMadhusudhan Chikkature * DMA Callback: run in interrupt context. 581a45c6cb8SMadhusudhan Chikkature * mutex_unlock will through a kernel warning if used. 582a45c6cb8SMadhusudhan Chikkature */ 583a45c6cb8SMadhusudhan Chikkature up(&host->sem); 584a45c6cb8SMadhusudhan Chikkature } 585a45c6cb8SMadhusudhan Chikkature 586a45c6cb8SMadhusudhan Chikkature /* 587a45c6cb8SMadhusudhan Chikkature * Configure dma src and destination parameters 588a45c6cb8SMadhusudhan Chikkature */ 589a45c6cb8SMadhusudhan Chikkature static int mmc_omap_config_dma_param(int sync_dir, struct mmc_omap_host *host, 590a45c6cb8SMadhusudhan Chikkature struct mmc_data *data) 591a45c6cb8SMadhusudhan Chikkature { 592a45c6cb8SMadhusudhan Chikkature if (sync_dir == 0) { 593a45c6cb8SMadhusudhan Chikkature omap_set_dma_dest_params(host->dma_ch, 0, 594a45c6cb8SMadhusudhan Chikkature OMAP_DMA_AMODE_CONSTANT, 595a45c6cb8SMadhusudhan Chikkature (host->mapbase + OMAP_HSMMC_DATA), 0, 0); 596a45c6cb8SMadhusudhan Chikkature omap_set_dma_src_params(host->dma_ch, 0, 597a45c6cb8SMadhusudhan Chikkature OMAP_DMA_AMODE_POST_INC, 598a45c6cb8SMadhusudhan Chikkature sg_dma_address(&data->sg[0]), 0, 0); 599a45c6cb8SMadhusudhan Chikkature } else { 600a45c6cb8SMadhusudhan Chikkature omap_set_dma_src_params(host->dma_ch, 0, 601a45c6cb8SMadhusudhan Chikkature OMAP_DMA_AMODE_CONSTANT, 602a45c6cb8SMadhusudhan Chikkature (host->mapbase + OMAP_HSMMC_DATA), 0, 0); 603a45c6cb8SMadhusudhan Chikkature omap_set_dma_dest_params(host->dma_ch, 0, 604a45c6cb8SMadhusudhan Chikkature OMAP_DMA_AMODE_POST_INC, 605a45c6cb8SMadhusudhan Chikkature sg_dma_address(&data->sg[0]), 0, 0); 606a45c6cb8SMadhusudhan Chikkature } 607a45c6cb8SMadhusudhan Chikkature return 0; 608a45c6cb8SMadhusudhan Chikkature } 609a45c6cb8SMadhusudhan Chikkature /* 610a45c6cb8SMadhusudhan Chikkature * Routine to configure and start DMA for the MMC card 611a45c6cb8SMadhusudhan Chikkature */ 612a45c6cb8SMadhusudhan Chikkature static int 613a45c6cb8SMadhusudhan Chikkature mmc_omap_start_dma_transfer(struct mmc_omap_host *host, struct mmc_request *req) 614a45c6cb8SMadhusudhan Chikkature { 615a45c6cb8SMadhusudhan Chikkature int sync_dev, sync_dir = 0; 616a45c6cb8SMadhusudhan Chikkature int dma_ch = 0, ret = 0, err = 1; 617a45c6cb8SMadhusudhan Chikkature struct mmc_data *data = req->data; 618a45c6cb8SMadhusudhan Chikkature 619a45c6cb8SMadhusudhan Chikkature /* 620a45c6cb8SMadhusudhan Chikkature * If for some reason the DMA transfer is still active, 621a45c6cb8SMadhusudhan Chikkature * we wait for timeout period and free the dma 622a45c6cb8SMadhusudhan Chikkature */ 623a45c6cb8SMadhusudhan Chikkature if (host->dma_ch != -1) { 624a45c6cb8SMadhusudhan Chikkature set_current_state(TASK_UNINTERRUPTIBLE); 625a45c6cb8SMadhusudhan Chikkature schedule_timeout(100); 626a45c6cb8SMadhusudhan Chikkature if (down_trylock(&host->sem)) { 627a45c6cb8SMadhusudhan Chikkature omap_free_dma(host->dma_ch); 628a45c6cb8SMadhusudhan Chikkature host->dma_ch = -1; 629a45c6cb8SMadhusudhan Chikkature up(&host->sem); 630a45c6cb8SMadhusudhan Chikkature return err; 631a45c6cb8SMadhusudhan Chikkature } 632a45c6cb8SMadhusudhan Chikkature } else { 633a45c6cb8SMadhusudhan Chikkature if (down_trylock(&host->sem)) 634a45c6cb8SMadhusudhan Chikkature return err; 635a45c6cb8SMadhusudhan Chikkature } 636a45c6cb8SMadhusudhan Chikkature 637a45c6cb8SMadhusudhan Chikkature if (!(data->flags & MMC_DATA_WRITE)) { 638a45c6cb8SMadhusudhan Chikkature host->dma_dir = DMA_FROM_DEVICE; 639a45c6cb8SMadhusudhan Chikkature if (host->id == OMAP_MMC1_DEVID) 640a45c6cb8SMadhusudhan Chikkature sync_dev = OMAP24XX_DMA_MMC1_RX; 641a45c6cb8SMadhusudhan Chikkature else 642a45c6cb8SMadhusudhan Chikkature sync_dev = OMAP24XX_DMA_MMC2_RX; 643a45c6cb8SMadhusudhan Chikkature } else { 644a45c6cb8SMadhusudhan Chikkature host->dma_dir = DMA_TO_DEVICE; 645a45c6cb8SMadhusudhan Chikkature if (host->id == OMAP_MMC1_DEVID) 646a45c6cb8SMadhusudhan Chikkature sync_dev = OMAP24XX_DMA_MMC1_TX; 647a45c6cb8SMadhusudhan Chikkature else 648a45c6cb8SMadhusudhan Chikkature sync_dev = OMAP24XX_DMA_MMC2_TX; 649a45c6cb8SMadhusudhan Chikkature } 650a45c6cb8SMadhusudhan Chikkature 651a45c6cb8SMadhusudhan Chikkature ret = omap_request_dma(sync_dev, "MMC/SD", mmc_omap_dma_cb, 652a45c6cb8SMadhusudhan Chikkature host, &dma_ch); 653a45c6cb8SMadhusudhan Chikkature if (ret != 0) { 654a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), 655a45c6cb8SMadhusudhan Chikkature "%s: omap_request_dma() failed with %d\n", 656a45c6cb8SMadhusudhan Chikkature mmc_hostname(host->mmc), ret); 657a45c6cb8SMadhusudhan Chikkature return ret; 658a45c6cb8SMadhusudhan Chikkature } 659a45c6cb8SMadhusudhan Chikkature 660a45c6cb8SMadhusudhan Chikkature host->dma_len = dma_map_sg(mmc_dev(host->mmc), data->sg, 661a45c6cb8SMadhusudhan Chikkature data->sg_len, host->dma_dir); 662a45c6cb8SMadhusudhan Chikkature host->dma_ch = dma_ch; 663a45c6cb8SMadhusudhan Chikkature 664a45c6cb8SMadhusudhan Chikkature if (!(data->flags & MMC_DATA_WRITE)) 665a45c6cb8SMadhusudhan Chikkature mmc_omap_config_dma_param(1, host, data); 666a45c6cb8SMadhusudhan Chikkature else 667a45c6cb8SMadhusudhan Chikkature mmc_omap_config_dma_param(0, host, data); 668a45c6cb8SMadhusudhan Chikkature 669a45c6cb8SMadhusudhan Chikkature if ((data->blksz % 4) == 0) 670a45c6cb8SMadhusudhan Chikkature omap_set_dma_transfer_params(dma_ch, OMAP_DMA_DATA_TYPE_S32, 671a45c6cb8SMadhusudhan Chikkature (data->blksz / 4), data->blocks, OMAP_DMA_SYNC_FRAME, 672a45c6cb8SMadhusudhan Chikkature sync_dev, sync_dir); 673a45c6cb8SMadhusudhan Chikkature else 674a45c6cb8SMadhusudhan Chikkature /* REVISIT: The MMC buffer increments only when MSB is written. 675a45c6cb8SMadhusudhan Chikkature * Return error for blksz which is non multiple of four. 676a45c6cb8SMadhusudhan Chikkature */ 677a45c6cb8SMadhusudhan Chikkature return -EINVAL; 678a45c6cb8SMadhusudhan Chikkature 679a45c6cb8SMadhusudhan Chikkature omap_start_dma(dma_ch); 680a45c6cb8SMadhusudhan Chikkature return 0; 681a45c6cb8SMadhusudhan Chikkature } 682a45c6cb8SMadhusudhan Chikkature 683a45c6cb8SMadhusudhan Chikkature static void set_data_timeout(struct mmc_omap_host *host, 684a45c6cb8SMadhusudhan Chikkature struct mmc_request *req) 685a45c6cb8SMadhusudhan Chikkature { 686a45c6cb8SMadhusudhan Chikkature unsigned int timeout, cycle_ns; 687a45c6cb8SMadhusudhan Chikkature uint32_t reg, clkd, dto = 0; 688a45c6cb8SMadhusudhan Chikkature 689a45c6cb8SMadhusudhan Chikkature reg = OMAP_HSMMC_READ(host->base, SYSCTL); 690a45c6cb8SMadhusudhan Chikkature clkd = (reg & CLKD_MASK) >> CLKD_SHIFT; 691a45c6cb8SMadhusudhan Chikkature if (clkd == 0) 692a45c6cb8SMadhusudhan Chikkature clkd = 1; 693a45c6cb8SMadhusudhan Chikkature 694a45c6cb8SMadhusudhan Chikkature cycle_ns = 1000000000 / (clk_get_rate(host->fclk) / clkd); 695a45c6cb8SMadhusudhan Chikkature timeout = req->data->timeout_ns / cycle_ns; 696a45c6cb8SMadhusudhan Chikkature timeout += req->data->timeout_clks; 697a45c6cb8SMadhusudhan Chikkature if (timeout) { 698a45c6cb8SMadhusudhan Chikkature while ((timeout & 0x80000000) == 0) { 699a45c6cb8SMadhusudhan Chikkature dto += 1; 700a45c6cb8SMadhusudhan Chikkature timeout <<= 1; 701a45c6cb8SMadhusudhan Chikkature } 702a45c6cb8SMadhusudhan Chikkature dto = 31 - dto; 703a45c6cb8SMadhusudhan Chikkature timeout <<= 1; 704a45c6cb8SMadhusudhan Chikkature if (timeout && dto) 705a45c6cb8SMadhusudhan Chikkature dto += 1; 706a45c6cb8SMadhusudhan Chikkature if (dto >= 13) 707a45c6cb8SMadhusudhan Chikkature dto -= 13; 708a45c6cb8SMadhusudhan Chikkature else 709a45c6cb8SMadhusudhan Chikkature dto = 0; 710a45c6cb8SMadhusudhan Chikkature if (dto > 14) 711a45c6cb8SMadhusudhan Chikkature dto = 14; 712a45c6cb8SMadhusudhan Chikkature } 713a45c6cb8SMadhusudhan Chikkature 714a45c6cb8SMadhusudhan Chikkature reg &= ~DTO_MASK; 715a45c6cb8SMadhusudhan Chikkature reg |= dto << DTO_SHIFT; 716a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, SYSCTL, reg); 717a45c6cb8SMadhusudhan Chikkature } 718a45c6cb8SMadhusudhan Chikkature 719a45c6cb8SMadhusudhan Chikkature /* 720a45c6cb8SMadhusudhan Chikkature * Configure block length for MMC/SD cards and initiate the transfer. 721a45c6cb8SMadhusudhan Chikkature */ 722a45c6cb8SMadhusudhan Chikkature static int 723a45c6cb8SMadhusudhan Chikkature mmc_omap_prepare_data(struct mmc_omap_host *host, struct mmc_request *req) 724a45c6cb8SMadhusudhan Chikkature { 725a45c6cb8SMadhusudhan Chikkature int ret; 726a45c6cb8SMadhusudhan Chikkature host->data = req->data; 727a45c6cb8SMadhusudhan Chikkature 728a45c6cb8SMadhusudhan Chikkature if (req->data == NULL) { 729a45c6cb8SMadhusudhan Chikkature host->datadir = OMAP_MMC_DATADIR_NONE; 730a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, BLK, 0); 731a45c6cb8SMadhusudhan Chikkature return 0; 732a45c6cb8SMadhusudhan Chikkature } 733a45c6cb8SMadhusudhan Chikkature 734a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, BLK, (req->data->blksz) 735a45c6cb8SMadhusudhan Chikkature | (req->data->blocks << 16)); 736a45c6cb8SMadhusudhan Chikkature set_data_timeout(host, req); 737a45c6cb8SMadhusudhan Chikkature 738a45c6cb8SMadhusudhan Chikkature host->datadir = (req->data->flags & MMC_DATA_WRITE) ? 739a45c6cb8SMadhusudhan Chikkature OMAP_MMC_DATADIR_WRITE : OMAP_MMC_DATADIR_READ; 740a45c6cb8SMadhusudhan Chikkature 741a45c6cb8SMadhusudhan Chikkature if (host->use_dma) { 742a45c6cb8SMadhusudhan Chikkature ret = mmc_omap_start_dma_transfer(host, req); 743a45c6cb8SMadhusudhan Chikkature if (ret != 0) { 744a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), "MMC start dma failure\n"); 745a45c6cb8SMadhusudhan Chikkature return ret; 746a45c6cb8SMadhusudhan Chikkature } 747a45c6cb8SMadhusudhan Chikkature } 748a45c6cb8SMadhusudhan Chikkature return 0; 749a45c6cb8SMadhusudhan Chikkature } 750a45c6cb8SMadhusudhan Chikkature 751a45c6cb8SMadhusudhan Chikkature /* 752a45c6cb8SMadhusudhan Chikkature * Request function. for read/write operation 753a45c6cb8SMadhusudhan Chikkature */ 754a45c6cb8SMadhusudhan Chikkature static void omap_mmc_request(struct mmc_host *mmc, struct mmc_request *req) 755a45c6cb8SMadhusudhan Chikkature { 756a45c6cb8SMadhusudhan Chikkature struct mmc_omap_host *host = mmc_priv(mmc); 757a45c6cb8SMadhusudhan Chikkature 758a45c6cb8SMadhusudhan Chikkature WARN_ON(host->mrq != NULL); 759a45c6cb8SMadhusudhan Chikkature host->mrq = req; 760a45c6cb8SMadhusudhan Chikkature mmc_omap_prepare_data(host, req); 761a45c6cb8SMadhusudhan Chikkature mmc_omap_start_command(host, req->cmd, req->data); 762a45c6cb8SMadhusudhan Chikkature } 763a45c6cb8SMadhusudhan Chikkature 764a45c6cb8SMadhusudhan Chikkature 765a45c6cb8SMadhusudhan Chikkature /* Routine to configure clock values. Exposed API to core */ 766a45c6cb8SMadhusudhan Chikkature static void omap_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) 767a45c6cb8SMadhusudhan Chikkature { 768a45c6cb8SMadhusudhan Chikkature struct mmc_omap_host *host = mmc_priv(mmc); 769a45c6cb8SMadhusudhan Chikkature u16 dsor = 0; 770a45c6cb8SMadhusudhan Chikkature unsigned long regval; 771a45c6cb8SMadhusudhan Chikkature unsigned long timeout; 772a45c6cb8SMadhusudhan Chikkature 773a45c6cb8SMadhusudhan Chikkature switch (ios->power_mode) { 774a45c6cb8SMadhusudhan Chikkature case MMC_POWER_OFF: 775a45c6cb8SMadhusudhan Chikkature mmc_slot(host).set_power(host->dev, host->slot_id, 0, 0); 776a45c6cb8SMadhusudhan Chikkature /* 777eb250826SDavid Brownell * Reset interface voltage to 3V if it's 1.8V now; 778eb250826SDavid Brownell * only relevant on MMC-1, the others always use 1.8V. 779eb250826SDavid Brownell * 780a45c6cb8SMadhusudhan Chikkature * REVISIT: If we are able to detect cards after unplugging 781a45c6cb8SMadhusudhan Chikkature * a 1.8V card, this code should not be needed. 782a45c6cb8SMadhusudhan Chikkature */ 783eb250826SDavid Brownell if (host->id != OMAP_MMC1_DEVID) 784eb250826SDavid Brownell break; 785a45c6cb8SMadhusudhan Chikkature if (!(OMAP_HSMMC_READ(host->base, HCTL) & SDVSDET)) { 786a45c6cb8SMadhusudhan Chikkature int vdd = fls(host->mmc->ocr_avail) - 1; 787a45c6cb8SMadhusudhan Chikkature if (omap_mmc_switch_opcond(host, vdd) != 0) 788a45c6cb8SMadhusudhan Chikkature host->mmc->ios.vdd = vdd; 789a45c6cb8SMadhusudhan Chikkature } 790a45c6cb8SMadhusudhan Chikkature break; 791a45c6cb8SMadhusudhan Chikkature case MMC_POWER_UP: 792a45c6cb8SMadhusudhan Chikkature mmc_slot(host).set_power(host->dev, host->slot_id, 1, ios->vdd); 793a45c6cb8SMadhusudhan Chikkature break; 794a45c6cb8SMadhusudhan Chikkature } 795a45c6cb8SMadhusudhan Chikkature 796a45c6cb8SMadhusudhan Chikkature switch (mmc->ios.bus_width) { 797a45c6cb8SMadhusudhan Chikkature case MMC_BUS_WIDTH_4: 798a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, HCTL, 799a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_READ(host->base, HCTL) | FOUR_BIT); 800a45c6cb8SMadhusudhan Chikkature break; 801a45c6cb8SMadhusudhan Chikkature case MMC_BUS_WIDTH_1: 802a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, HCTL, 803a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_READ(host->base, HCTL) & ~FOUR_BIT); 804a45c6cb8SMadhusudhan Chikkature break; 805a45c6cb8SMadhusudhan Chikkature } 806a45c6cb8SMadhusudhan Chikkature 807a45c6cb8SMadhusudhan Chikkature if (host->id == OMAP_MMC1_DEVID) { 808eb250826SDavid Brownell /* Only MMC1 can interface at 3V without some flavor 809eb250826SDavid Brownell * of external transceiver; but they all handle 1.8V. 810eb250826SDavid Brownell */ 811a45c6cb8SMadhusudhan Chikkature if ((OMAP_HSMMC_READ(host->base, HCTL) & SDVSDET) && 812a45c6cb8SMadhusudhan Chikkature (ios->vdd == DUAL_VOLT_OCR_BIT)) { 813a45c6cb8SMadhusudhan Chikkature /* 814a45c6cb8SMadhusudhan Chikkature * The mmc_select_voltage fn of the core does 815a45c6cb8SMadhusudhan Chikkature * not seem to set the power_mode to 816a45c6cb8SMadhusudhan Chikkature * MMC_POWER_UP upon recalculating the voltage. 817a45c6cb8SMadhusudhan Chikkature * vdd 1.8v. 818a45c6cb8SMadhusudhan Chikkature */ 819a45c6cb8SMadhusudhan Chikkature if (omap_mmc_switch_opcond(host, ios->vdd) != 0) 820a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), 821a45c6cb8SMadhusudhan Chikkature "Switch operation failed\n"); 822a45c6cb8SMadhusudhan Chikkature } 823a45c6cb8SMadhusudhan Chikkature } 824a45c6cb8SMadhusudhan Chikkature 825a45c6cb8SMadhusudhan Chikkature if (ios->clock) { 826a45c6cb8SMadhusudhan Chikkature dsor = OMAP_MMC_MASTER_CLOCK / ios->clock; 827a45c6cb8SMadhusudhan Chikkature if (dsor < 1) 828a45c6cb8SMadhusudhan Chikkature dsor = 1; 829a45c6cb8SMadhusudhan Chikkature 830a45c6cb8SMadhusudhan Chikkature if (OMAP_MMC_MASTER_CLOCK / dsor > ios->clock) 831a45c6cb8SMadhusudhan Chikkature dsor++; 832a45c6cb8SMadhusudhan Chikkature 833a45c6cb8SMadhusudhan Chikkature if (dsor > 250) 834a45c6cb8SMadhusudhan Chikkature dsor = 250; 835a45c6cb8SMadhusudhan Chikkature } 836a45c6cb8SMadhusudhan Chikkature omap_mmc_stop_clock(host); 837a45c6cb8SMadhusudhan Chikkature regval = OMAP_HSMMC_READ(host->base, SYSCTL); 838a45c6cb8SMadhusudhan Chikkature regval = regval & ~(CLKD_MASK); 839a45c6cb8SMadhusudhan Chikkature regval = regval | (dsor << 6) | (DTO << 16); 840a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, SYSCTL, regval); 841a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, SYSCTL, 842a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_READ(host->base, SYSCTL) | ICE); 843a45c6cb8SMadhusudhan Chikkature 844a45c6cb8SMadhusudhan Chikkature /* Wait till the ICS bit is set */ 845a45c6cb8SMadhusudhan Chikkature timeout = jiffies + msecs_to_jiffies(MMC_TIMEOUT_MS); 846a45c6cb8SMadhusudhan Chikkature while ((OMAP_HSMMC_READ(host->base, SYSCTL) & ICS) != 0x2 847a45c6cb8SMadhusudhan Chikkature && time_before(jiffies, timeout)) 848a45c6cb8SMadhusudhan Chikkature msleep(1); 849a45c6cb8SMadhusudhan Chikkature 850a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, SYSCTL, 851a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_READ(host->base, SYSCTL) | CEN); 852a45c6cb8SMadhusudhan Chikkature 853a45c6cb8SMadhusudhan Chikkature if (ios->power_mode == MMC_POWER_ON) 854a45c6cb8SMadhusudhan Chikkature send_init_stream(host); 855a45c6cb8SMadhusudhan Chikkature 856a45c6cb8SMadhusudhan Chikkature if (ios->bus_mode == MMC_BUSMODE_OPENDRAIN) 857a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, CON, 858a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_READ(host->base, CON) | OD); 859a45c6cb8SMadhusudhan Chikkature } 860a45c6cb8SMadhusudhan Chikkature 861a45c6cb8SMadhusudhan Chikkature static int omap_hsmmc_get_cd(struct mmc_host *mmc) 862a45c6cb8SMadhusudhan Chikkature { 863a45c6cb8SMadhusudhan Chikkature struct mmc_omap_host *host = mmc_priv(mmc); 864a45c6cb8SMadhusudhan Chikkature struct omap_mmc_platform_data *pdata = host->pdata; 865a45c6cb8SMadhusudhan Chikkature 866a45c6cb8SMadhusudhan Chikkature if (!pdata->slots[0].card_detect) 867a45c6cb8SMadhusudhan Chikkature return -ENOSYS; 868a45c6cb8SMadhusudhan Chikkature return pdata->slots[0].card_detect(pdata->slots[0].card_detect_irq); 869a45c6cb8SMadhusudhan Chikkature } 870a45c6cb8SMadhusudhan Chikkature 871a45c6cb8SMadhusudhan Chikkature static int omap_hsmmc_get_ro(struct mmc_host *mmc) 872a45c6cb8SMadhusudhan Chikkature { 873a45c6cb8SMadhusudhan Chikkature struct mmc_omap_host *host = mmc_priv(mmc); 874a45c6cb8SMadhusudhan Chikkature struct omap_mmc_platform_data *pdata = host->pdata; 875a45c6cb8SMadhusudhan Chikkature 876a45c6cb8SMadhusudhan Chikkature if (!pdata->slots[0].get_ro) 877a45c6cb8SMadhusudhan Chikkature return -ENOSYS; 878a45c6cb8SMadhusudhan Chikkature return pdata->slots[0].get_ro(host->dev, 0); 879a45c6cb8SMadhusudhan Chikkature } 880a45c6cb8SMadhusudhan Chikkature 881a45c6cb8SMadhusudhan Chikkature static struct mmc_host_ops mmc_omap_ops = { 882a45c6cb8SMadhusudhan Chikkature .request = omap_mmc_request, 883a45c6cb8SMadhusudhan Chikkature .set_ios = omap_mmc_set_ios, 884a45c6cb8SMadhusudhan Chikkature .get_cd = omap_hsmmc_get_cd, 885a45c6cb8SMadhusudhan Chikkature .get_ro = omap_hsmmc_get_ro, 886a45c6cb8SMadhusudhan Chikkature /* NYET -- enable_sdio_irq */ 887a45c6cb8SMadhusudhan Chikkature }; 888a45c6cb8SMadhusudhan Chikkature 889a45c6cb8SMadhusudhan Chikkature static int __init omap_mmc_probe(struct platform_device *pdev) 890a45c6cb8SMadhusudhan Chikkature { 891a45c6cb8SMadhusudhan Chikkature struct omap_mmc_platform_data *pdata = pdev->dev.platform_data; 892a45c6cb8SMadhusudhan Chikkature struct mmc_host *mmc; 893a45c6cb8SMadhusudhan Chikkature struct mmc_omap_host *host = NULL; 894a45c6cb8SMadhusudhan Chikkature struct resource *res; 895a45c6cb8SMadhusudhan Chikkature int ret = 0, irq; 896a45c6cb8SMadhusudhan Chikkature u32 hctl, capa; 897a45c6cb8SMadhusudhan Chikkature 898a45c6cb8SMadhusudhan Chikkature if (pdata == NULL) { 899a45c6cb8SMadhusudhan Chikkature dev_err(&pdev->dev, "Platform Data is missing\n"); 900a45c6cb8SMadhusudhan Chikkature return -ENXIO; 901a45c6cb8SMadhusudhan Chikkature } 902a45c6cb8SMadhusudhan Chikkature 903a45c6cb8SMadhusudhan Chikkature if (pdata->nr_slots == 0) { 904a45c6cb8SMadhusudhan Chikkature dev_err(&pdev->dev, "No Slots\n"); 905a45c6cb8SMadhusudhan Chikkature return -ENXIO; 906a45c6cb8SMadhusudhan Chikkature } 907a45c6cb8SMadhusudhan Chikkature 908a45c6cb8SMadhusudhan Chikkature res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 909a45c6cb8SMadhusudhan Chikkature irq = platform_get_irq(pdev, 0); 910a45c6cb8SMadhusudhan Chikkature if (res == NULL || irq < 0) 911a45c6cb8SMadhusudhan Chikkature return -ENXIO; 912a45c6cb8SMadhusudhan Chikkature 913a45c6cb8SMadhusudhan Chikkature res = request_mem_region(res->start, res->end - res->start + 1, 914a45c6cb8SMadhusudhan Chikkature pdev->name); 915a45c6cb8SMadhusudhan Chikkature if (res == NULL) 916a45c6cb8SMadhusudhan Chikkature return -EBUSY; 917a45c6cb8SMadhusudhan Chikkature 918a45c6cb8SMadhusudhan Chikkature mmc = mmc_alloc_host(sizeof(struct mmc_omap_host), &pdev->dev); 919a45c6cb8SMadhusudhan Chikkature if (!mmc) { 920a45c6cb8SMadhusudhan Chikkature ret = -ENOMEM; 921a45c6cb8SMadhusudhan Chikkature goto err; 922a45c6cb8SMadhusudhan Chikkature } 923a45c6cb8SMadhusudhan Chikkature 924a45c6cb8SMadhusudhan Chikkature host = mmc_priv(mmc); 925a45c6cb8SMadhusudhan Chikkature host->mmc = mmc; 926a45c6cb8SMadhusudhan Chikkature host->pdata = pdata; 927a45c6cb8SMadhusudhan Chikkature host->dev = &pdev->dev; 928a45c6cb8SMadhusudhan Chikkature host->use_dma = 1; 929a45c6cb8SMadhusudhan Chikkature host->dev->dma_mask = &pdata->dma_mask; 930a45c6cb8SMadhusudhan Chikkature host->dma_ch = -1; 931a45c6cb8SMadhusudhan Chikkature host->irq = irq; 932a45c6cb8SMadhusudhan Chikkature host->id = pdev->id; 933a45c6cb8SMadhusudhan Chikkature host->slot_id = 0; 934a45c6cb8SMadhusudhan Chikkature host->mapbase = res->start; 935a45c6cb8SMadhusudhan Chikkature host->base = ioremap(host->mapbase, SZ_4K); 936a45c6cb8SMadhusudhan Chikkature 937a45c6cb8SMadhusudhan Chikkature platform_set_drvdata(pdev, host); 938a45c6cb8SMadhusudhan Chikkature INIT_WORK(&host->mmc_carddetect_work, mmc_omap_detect); 939a45c6cb8SMadhusudhan Chikkature 940a45c6cb8SMadhusudhan Chikkature mmc->ops = &mmc_omap_ops; 941a45c6cb8SMadhusudhan Chikkature mmc->f_min = 400000; 942a45c6cb8SMadhusudhan Chikkature mmc->f_max = 52000000; 943a45c6cb8SMadhusudhan Chikkature 944a45c6cb8SMadhusudhan Chikkature sema_init(&host->sem, 1); 945a45c6cb8SMadhusudhan Chikkature 946a45c6cb8SMadhusudhan Chikkature host->iclk = clk_get(&pdev->dev, "mmchs_ick"); 947a45c6cb8SMadhusudhan Chikkature if (IS_ERR(host->iclk)) { 948a45c6cb8SMadhusudhan Chikkature ret = PTR_ERR(host->iclk); 949a45c6cb8SMadhusudhan Chikkature host->iclk = NULL; 950a45c6cb8SMadhusudhan Chikkature goto err1; 951a45c6cb8SMadhusudhan Chikkature } 952a45c6cb8SMadhusudhan Chikkature host->fclk = clk_get(&pdev->dev, "mmchs_fck"); 953a45c6cb8SMadhusudhan Chikkature if (IS_ERR(host->fclk)) { 954a45c6cb8SMadhusudhan Chikkature ret = PTR_ERR(host->fclk); 955a45c6cb8SMadhusudhan Chikkature host->fclk = NULL; 956a45c6cb8SMadhusudhan Chikkature clk_put(host->iclk); 957a45c6cb8SMadhusudhan Chikkature goto err1; 958a45c6cb8SMadhusudhan Chikkature } 959a45c6cb8SMadhusudhan Chikkature 960a45c6cb8SMadhusudhan Chikkature if (clk_enable(host->fclk) != 0) { 961a45c6cb8SMadhusudhan Chikkature clk_put(host->iclk); 962a45c6cb8SMadhusudhan Chikkature clk_put(host->fclk); 963a45c6cb8SMadhusudhan Chikkature goto err1; 964a45c6cb8SMadhusudhan Chikkature } 965a45c6cb8SMadhusudhan Chikkature 966a45c6cb8SMadhusudhan Chikkature if (clk_enable(host->iclk) != 0) { 967a45c6cb8SMadhusudhan Chikkature clk_disable(host->fclk); 968a45c6cb8SMadhusudhan Chikkature clk_put(host->iclk); 969a45c6cb8SMadhusudhan Chikkature clk_put(host->fclk); 970a45c6cb8SMadhusudhan Chikkature goto err1; 971a45c6cb8SMadhusudhan Chikkature } 972a45c6cb8SMadhusudhan Chikkature 973a45c6cb8SMadhusudhan Chikkature host->dbclk = clk_get(&pdev->dev, "mmchsdb_fck"); 974a45c6cb8SMadhusudhan Chikkature /* 975a45c6cb8SMadhusudhan Chikkature * MMC can still work without debounce clock. 976a45c6cb8SMadhusudhan Chikkature */ 977a45c6cb8SMadhusudhan Chikkature if (IS_ERR(host->dbclk)) 978a45c6cb8SMadhusudhan Chikkature dev_warn(mmc_dev(host->mmc), "Failed to get debounce clock\n"); 979a45c6cb8SMadhusudhan Chikkature else 980a45c6cb8SMadhusudhan Chikkature if (clk_enable(host->dbclk) != 0) 981a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), "Enabling debounce" 982a45c6cb8SMadhusudhan Chikkature " clk failed\n"); 983a45c6cb8SMadhusudhan Chikkature else 984a45c6cb8SMadhusudhan Chikkature host->dbclk_enabled = 1; 985a45c6cb8SMadhusudhan Chikkature 986a45c6cb8SMadhusudhan Chikkature #ifdef CONFIG_MMC_BLOCK_BOUNCE 987a45c6cb8SMadhusudhan Chikkature mmc->max_phys_segs = 1; 988a45c6cb8SMadhusudhan Chikkature mmc->max_hw_segs = 1; 989a45c6cb8SMadhusudhan Chikkature #endif 990a45c6cb8SMadhusudhan Chikkature mmc->max_blk_size = 512; /* Block Length at max can be 1024 */ 991a45c6cb8SMadhusudhan Chikkature mmc->max_blk_count = 0xFFFF; /* No. of Blocks is 16 bits */ 992a45c6cb8SMadhusudhan Chikkature mmc->max_req_size = mmc->max_blk_size * mmc->max_blk_count; 993a45c6cb8SMadhusudhan Chikkature mmc->max_seg_size = mmc->max_req_size; 994a45c6cb8SMadhusudhan Chikkature 995a45c6cb8SMadhusudhan Chikkature mmc->ocr_avail = mmc_slot(host).ocr_mask; 996a45c6cb8SMadhusudhan Chikkature mmc->caps |= MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED; 997a45c6cb8SMadhusudhan Chikkature 998a45c6cb8SMadhusudhan Chikkature if (pdata->slots[host->slot_id].wires >= 4) 999a45c6cb8SMadhusudhan Chikkature mmc->caps |= MMC_CAP_4_BIT_DATA; 1000a45c6cb8SMadhusudhan Chikkature 1001a45c6cb8SMadhusudhan Chikkature /* Only MMC1 supports 3.0V */ 1002a45c6cb8SMadhusudhan Chikkature if (host->id == OMAP_MMC1_DEVID) { 1003a45c6cb8SMadhusudhan Chikkature hctl = SDVS30; 1004a45c6cb8SMadhusudhan Chikkature capa = VS30 | VS18; 1005a45c6cb8SMadhusudhan Chikkature } else { 1006a45c6cb8SMadhusudhan Chikkature hctl = SDVS18; 1007a45c6cb8SMadhusudhan Chikkature capa = VS18; 1008a45c6cb8SMadhusudhan Chikkature } 1009a45c6cb8SMadhusudhan Chikkature 1010a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, HCTL, 1011a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_READ(host->base, HCTL) | hctl); 1012a45c6cb8SMadhusudhan Chikkature 1013a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, CAPA, 1014a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_READ(host->base, CAPA) | capa); 1015a45c6cb8SMadhusudhan Chikkature 1016a45c6cb8SMadhusudhan Chikkature /* Set the controller to AUTO IDLE mode */ 1017a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, SYSCONFIG, 1018a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_READ(host->base, SYSCONFIG) | AUTOIDLE); 1019a45c6cb8SMadhusudhan Chikkature 1020a45c6cb8SMadhusudhan Chikkature /* Set SD bus power bit */ 1021a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, HCTL, 1022a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_READ(host->base, HCTL) | SDBP); 1023a45c6cb8SMadhusudhan Chikkature 1024a45c6cb8SMadhusudhan Chikkature /* Request IRQ for MMC operations */ 1025a45c6cb8SMadhusudhan Chikkature ret = request_irq(host->irq, mmc_omap_irq, IRQF_DISABLED, 1026a45c6cb8SMadhusudhan Chikkature mmc_hostname(mmc), host); 1027a45c6cb8SMadhusudhan Chikkature if (ret) { 1028a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), "Unable to grab HSMMC IRQ\n"); 1029a45c6cb8SMadhusudhan Chikkature goto err_irq; 1030a45c6cb8SMadhusudhan Chikkature } 1031a45c6cb8SMadhusudhan Chikkature 1032a45c6cb8SMadhusudhan Chikkature if (pdata->init != NULL) { 1033a45c6cb8SMadhusudhan Chikkature if (pdata->init(&pdev->dev) != 0) { 1034a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), 1035a45c6cb8SMadhusudhan Chikkature "Unable to configure MMC IRQs\n"); 1036a45c6cb8SMadhusudhan Chikkature goto err_irq_cd_init; 1037a45c6cb8SMadhusudhan Chikkature } 1038a45c6cb8SMadhusudhan Chikkature } 1039a45c6cb8SMadhusudhan Chikkature 1040a45c6cb8SMadhusudhan Chikkature /* Request IRQ for card detect */ 1041a45c6cb8SMadhusudhan Chikkature if ((mmc_slot(host).card_detect_irq) && (mmc_slot(host).card_detect)) { 1042a45c6cb8SMadhusudhan Chikkature ret = request_irq(mmc_slot(host).card_detect_irq, 1043a45c6cb8SMadhusudhan Chikkature omap_mmc_cd_handler, 1044a45c6cb8SMadhusudhan Chikkature IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING 1045a45c6cb8SMadhusudhan Chikkature | IRQF_DISABLED, 1046a45c6cb8SMadhusudhan Chikkature mmc_hostname(mmc), host); 1047a45c6cb8SMadhusudhan Chikkature if (ret) { 1048a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), 1049a45c6cb8SMadhusudhan Chikkature "Unable to grab MMC CD IRQ\n"); 1050a45c6cb8SMadhusudhan Chikkature goto err_irq_cd; 1051a45c6cb8SMadhusudhan Chikkature } 1052a45c6cb8SMadhusudhan Chikkature } 1053a45c6cb8SMadhusudhan Chikkature 1054a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, ISE, INT_EN_MASK); 1055a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, IE, INT_EN_MASK); 1056a45c6cb8SMadhusudhan Chikkature 1057a45c6cb8SMadhusudhan Chikkature mmc_add_host(mmc); 1058a45c6cb8SMadhusudhan Chikkature 1059a45c6cb8SMadhusudhan Chikkature if (host->pdata->slots[host->slot_id].name != NULL) { 1060a45c6cb8SMadhusudhan Chikkature ret = device_create_file(&mmc->class_dev, &dev_attr_slot_name); 1061a45c6cb8SMadhusudhan Chikkature if (ret < 0) 1062a45c6cb8SMadhusudhan Chikkature goto err_slot_name; 1063a45c6cb8SMadhusudhan Chikkature } 1064a45c6cb8SMadhusudhan Chikkature if (mmc_slot(host).card_detect_irq && mmc_slot(host).card_detect && 1065a45c6cb8SMadhusudhan Chikkature host->pdata->slots[host->slot_id].get_cover_state) { 1066a45c6cb8SMadhusudhan Chikkature ret = device_create_file(&mmc->class_dev, 1067a45c6cb8SMadhusudhan Chikkature &dev_attr_cover_switch); 1068a45c6cb8SMadhusudhan Chikkature if (ret < 0) 1069a45c6cb8SMadhusudhan Chikkature goto err_cover_switch; 1070a45c6cb8SMadhusudhan Chikkature } 1071a45c6cb8SMadhusudhan Chikkature 1072a45c6cb8SMadhusudhan Chikkature return 0; 1073a45c6cb8SMadhusudhan Chikkature 1074a45c6cb8SMadhusudhan Chikkature err_cover_switch: 1075a45c6cb8SMadhusudhan Chikkature device_remove_file(&mmc->class_dev, &dev_attr_cover_switch); 1076a45c6cb8SMadhusudhan Chikkature err_slot_name: 1077a45c6cb8SMadhusudhan Chikkature mmc_remove_host(mmc); 1078a45c6cb8SMadhusudhan Chikkature err_irq_cd: 1079a45c6cb8SMadhusudhan Chikkature free_irq(mmc_slot(host).card_detect_irq, host); 1080a45c6cb8SMadhusudhan Chikkature err_irq_cd_init: 1081a45c6cb8SMadhusudhan Chikkature free_irq(host->irq, host); 1082a45c6cb8SMadhusudhan Chikkature err_irq: 1083a45c6cb8SMadhusudhan Chikkature clk_disable(host->fclk); 1084a45c6cb8SMadhusudhan Chikkature clk_disable(host->iclk); 1085a45c6cb8SMadhusudhan Chikkature clk_put(host->fclk); 1086a45c6cb8SMadhusudhan Chikkature clk_put(host->iclk); 1087a45c6cb8SMadhusudhan Chikkature if (host->dbclk_enabled) { 1088a45c6cb8SMadhusudhan Chikkature clk_disable(host->dbclk); 1089a45c6cb8SMadhusudhan Chikkature clk_put(host->dbclk); 1090a45c6cb8SMadhusudhan Chikkature } 1091a45c6cb8SMadhusudhan Chikkature 1092a45c6cb8SMadhusudhan Chikkature err1: 1093a45c6cb8SMadhusudhan Chikkature iounmap(host->base); 1094a45c6cb8SMadhusudhan Chikkature err: 1095a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), "Probe Failed\n"); 1096a45c6cb8SMadhusudhan Chikkature release_mem_region(res->start, res->end - res->start + 1); 1097a45c6cb8SMadhusudhan Chikkature if (host) 1098a45c6cb8SMadhusudhan Chikkature mmc_free_host(mmc); 1099a45c6cb8SMadhusudhan Chikkature return ret; 1100a45c6cb8SMadhusudhan Chikkature } 1101a45c6cb8SMadhusudhan Chikkature 1102a45c6cb8SMadhusudhan Chikkature static int omap_mmc_remove(struct platform_device *pdev) 1103a45c6cb8SMadhusudhan Chikkature { 1104a45c6cb8SMadhusudhan Chikkature struct mmc_omap_host *host = platform_get_drvdata(pdev); 1105a45c6cb8SMadhusudhan Chikkature struct resource *res; 1106a45c6cb8SMadhusudhan Chikkature 1107a45c6cb8SMadhusudhan Chikkature if (host) { 1108a45c6cb8SMadhusudhan Chikkature mmc_remove_host(host->mmc); 1109a45c6cb8SMadhusudhan Chikkature if (host->pdata->cleanup) 1110a45c6cb8SMadhusudhan Chikkature host->pdata->cleanup(&pdev->dev); 1111a45c6cb8SMadhusudhan Chikkature free_irq(host->irq, host); 1112a45c6cb8SMadhusudhan Chikkature if (mmc_slot(host).card_detect_irq) 1113a45c6cb8SMadhusudhan Chikkature free_irq(mmc_slot(host).card_detect_irq, host); 1114a45c6cb8SMadhusudhan Chikkature flush_scheduled_work(); 1115a45c6cb8SMadhusudhan Chikkature 1116a45c6cb8SMadhusudhan Chikkature clk_disable(host->fclk); 1117a45c6cb8SMadhusudhan Chikkature clk_disable(host->iclk); 1118a45c6cb8SMadhusudhan Chikkature clk_put(host->fclk); 1119a45c6cb8SMadhusudhan Chikkature clk_put(host->iclk); 1120a45c6cb8SMadhusudhan Chikkature if (host->dbclk_enabled) { 1121a45c6cb8SMadhusudhan Chikkature clk_disable(host->dbclk); 1122a45c6cb8SMadhusudhan Chikkature clk_put(host->dbclk); 1123a45c6cb8SMadhusudhan Chikkature } 1124a45c6cb8SMadhusudhan Chikkature 1125a45c6cb8SMadhusudhan Chikkature mmc_free_host(host->mmc); 1126a45c6cb8SMadhusudhan Chikkature iounmap(host->base); 1127a45c6cb8SMadhusudhan Chikkature } 1128a45c6cb8SMadhusudhan Chikkature 1129a45c6cb8SMadhusudhan Chikkature res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 1130a45c6cb8SMadhusudhan Chikkature if (res) 1131a45c6cb8SMadhusudhan Chikkature release_mem_region(res->start, res->end - res->start + 1); 1132a45c6cb8SMadhusudhan Chikkature platform_set_drvdata(pdev, NULL); 1133a45c6cb8SMadhusudhan Chikkature 1134a45c6cb8SMadhusudhan Chikkature return 0; 1135a45c6cb8SMadhusudhan Chikkature } 1136a45c6cb8SMadhusudhan Chikkature 1137a45c6cb8SMadhusudhan Chikkature #ifdef CONFIG_PM 1138a45c6cb8SMadhusudhan Chikkature static int omap_mmc_suspend(struct platform_device *pdev, pm_message_t state) 1139a45c6cb8SMadhusudhan Chikkature { 1140a45c6cb8SMadhusudhan Chikkature int ret = 0; 1141a45c6cb8SMadhusudhan Chikkature struct mmc_omap_host *host = platform_get_drvdata(pdev); 1142a45c6cb8SMadhusudhan Chikkature 1143a45c6cb8SMadhusudhan Chikkature if (host && host->suspended) 1144a45c6cb8SMadhusudhan Chikkature return 0; 1145a45c6cb8SMadhusudhan Chikkature 1146a45c6cb8SMadhusudhan Chikkature if (host) { 1147a45c6cb8SMadhusudhan Chikkature ret = mmc_suspend_host(host->mmc, state); 1148a45c6cb8SMadhusudhan Chikkature if (ret == 0) { 1149a45c6cb8SMadhusudhan Chikkature host->suspended = 1; 1150a45c6cb8SMadhusudhan Chikkature 1151a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, ISE, 0); 1152a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, IE, 0); 1153a45c6cb8SMadhusudhan Chikkature 1154a45c6cb8SMadhusudhan Chikkature if (host->pdata->suspend) { 1155a45c6cb8SMadhusudhan Chikkature ret = host->pdata->suspend(&pdev->dev, 1156a45c6cb8SMadhusudhan Chikkature host->slot_id); 1157a45c6cb8SMadhusudhan Chikkature if (ret) 1158a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), 1159a45c6cb8SMadhusudhan Chikkature "Unable to handle MMC board" 1160a45c6cb8SMadhusudhan Chikkature " level suspend\n"); 1161a45c6cb8SMadhusudhan Chikkature } 1162a45c6cb8SMadhusudhan Chikkature 1163eb250826SDavid Brownell if (host->id == OMAP_MMC1_DEVID 1164eb250826SDavid Brownell && !(OMAP_HSMMC_READ(host->base, HCTL) 1165eb250826SDavid Brownell & SDVSDET)) { 1166a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, HCTL, 1167a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_READ(host->base, HCTL) 1168a45c6cb8SMadhusudhan Chikkature & SDVSCLR); 1169a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, HCTL, 1170a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_READ(host->base, HCTL) 1171a45c6cb8SMadhusudhan Chikkature | SDVS30); 1172a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, HCTL, 1173a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_READ(host->base, HCTL) 1174a45c6cb8SMadhusudhan Chikkature | SDBP); 1175a45c6cb8SMadhusudhan Chikkature } 1176a45c6cb8SMadhusudhan Chikkature 1177a45c6cb8SMadhusudhan Chikkature clk_disable(host->fclk); 1178a45c6cb8SMadhusudhan Chikkature clk_disable(host->iclk); 1179a45c6cb8SMadhusudhan Chikkature clk_disable(host->dbclk); 1180a45c6cb8SMadhusudhan Chikkature } 1181a45c6cb8SMadhusudhan Chikkature 1182a45c6cb8SMadhusudhan Chikkature } 1183a45c6cb8SMadhusudhan Chikkature return ret; 1184a45c6cb8SMadhusudhan Chikkature } 1185a45c6cb8SMadhusudhan Chikkature 1186a45c6cb8SMadhusudhan Chikkature /* Routine to resume the MMC device */ 1187a45c6cb8SMadhusudhan Chikkature static int omap_mmc_resume(struct platform_device *pdev) 1188a45c6cb8SMadhusudhan Chikkature { 1189a45c6cb8SMadhusudhan Chikkature int ret = 0; 1190a45c6cb8SMadhusudhan Chikkature struct mmc_omap_host *host = platform_get_drvdata(pdev); 1191a45c6cb8SMadhusudhan Chikkature 1192a45c6cb8SMadhusudhan Chikkature if (host && !host->suspended) 1193a45c6cb8SMadhusudhan Chikkature return 0; 1194a45c6cb8SMadhusudhan Chikkature 1195a45c6cb8SMadhusudhan Chikkature if (host) { 1196a45c6cb8SMadhusudhan Chikkature 1197a45c6cb8SMadhusudhan Chikkature ret = clk_enable(host->fclk); 1198a45c6cb8SMadhusudhan Chikkature if (ret) 1199a45c6cb8SMadhusudhan Chikkature goto clk_en_err; 1200a45c6cb8SMadhusudhan Chikkature 1201a45c6cb8SMadhusudhan Chikkature ret = clk_enable(host->iclk); 1202a45c6cb8SMadhusudhan Chikkature if (ret) { 1203a45c6cb8SMadhusudhan Chikkature clk_disable(host->fclk); 1204a45c6cb8SMadhusudhan Chikkature clk_put(host->fclk); 1205a45c6cb8SMadhusudhan Chikkature goto clk_en_err; 1206a45c6cb8SMadhusudhan Chikkature } 1207a45c6cb8SMadhusudhan Chikkature 1208a45c6cb8SMadhusudhan Chikkature if (clk_enable(host->dbclk) != 0) 1209a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), 1210a45c6cb8SMadhusudhan Chikkature "Enabling debounce clk failed\n"); 1211a45c6cb8SMadhusudhan Chikkature 1212a45c6cb8SMadhusudhan Chikkature if (host->pdata->resume) { 1213a45c6cb8SMadhusudhan Chikkature ret = host->pdata->resume(&pdev->dev, host->slot_id); 1214a45c6cb8SMadhusudhan Chikkature if (ret) 1215a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), 1216a45c6cb8SMadhusudhan Chikkature "Unmask interrupt failed\n"); 1217a45c6cb8SMadhusudhan Chikkature } 1218a45c6cb8SMadhusudhan Chikkature 1219a45c6cb8SMadhusudhan Chikkature /* Notify the core to resume the host */ 1220a45c6cb8SMadhusudhan Chikkature ret = mmc_resume_host(host->mmc); 1221a45c6cb8SMadhusudhan Chikkature if (ret == 0) 1222a45c6cb8SMadhusudhan Chikkature host->suspended = 0; 1223a45c6cb8SMadhusudhan Chikkature } 1224a45c6cb8SMadhusudhan Chikkature 1225a45c6cb8SMadhusudhan Chikkature return ret; 1226a45c6cb8SMadhusudhan Chikkature 1227a45c6cb8SMadhusudhan Chikkature clk_en_err: 1228a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), 1229a45c6cb8SMadhusudhan Chikkature "Failed to enable MMC clocks during resume\n"); 1230a45c6cb8SMadhusudhan Chikkature return ret; 1231a45c6cb8SMadhusudhan Chikkature } 1232a45c6cb8SMadhusudhan Chikkature 1233a45c6cb8SMadhusudhan Chikkature #else 1234a45c6cb8SMadhusudhan Chikkature #define omap_mmc_suspend NULL 1235a45c6cb8SMadhusudhan Chikkature #define omap_mmc_resume NULL 1236a45c6cb8SMadhusudhan Chikkature #endif 1237a45c6cb8SMadhusudhan Chikkature 1238a45c6cb8SMadhusudhan Chikkature static struct platform_driver omap_mmc_driver = { 1239a45c6cb8SMadhusudhan Chikkature .probe = omap_mmc_probe, 1240a45c6cb8SMadhusudhan Chikkature .remove = omap_mmc_remove, 1241a45c6cb8SMadhusudhan Chikkature .suspend = omap_mmc_suspend, 1242a45c6cb8SMadhusudhan Chikkature .resume = omap_mmc_resume, 1243a45c6cb8SMadhusudhan Chikkature .driver = { 1244a45c6cb8SMadhusudhan Chikkature .name = DRIVER_NAME, 1245a45c6cb8SMadhusudhan Chikkature .owner = THIS_MODULE, 1246a45c6cb8SMadhusudhan Chikkature }, 1247a45c6cb8SMadhusudhan Chikkature }; 1248a45c6cb8SMadhusudhan Chikkature 1249a45c6cb8SMadhusudhan Chikkature static int __init omap_mmc_init(void) 1250a45c6cb8SMadhusudhan Chikkature { 1251a45c6cb8SMadhusudhan Chikkature /* Register the MMC driver */ 1252a45c6cb8SMadhusudhan Chikkature return platform_driver_register(&omap_mmc_driver); 1253a45c6cb8SMadhusudhan Chikkature } 1254a45c6cb8SMadhusudhan Chikkature 1255a45c6cb8SMadhusudhan Chikkature static void __exit omap_mmc_cleanup(void) 1256a45c6cb8SMadhusudhan Chikkature { 1257a45c6cb8SMadhusudhan Chikkature /* Unregister MMC driver */ 1258a45c6cb8SMadhusudhan Chikkature platform_driver_unregister(&omap_mmc_driver); 1259a45c6cb8SMadhusudhan Chikkature } 1260a45c6cb8SMadhusudhan Chikkature 1261a45c6cb8SMadhusudhan Chikkature module_init(omap_mmc_init); 1262a45c6cb8SMadhusudhan Chikkature module_exit(omap_mmc_cleanup); 1263a45c6cb8SMadhusudhan Chikkature 1264a45c6cb8SMadhusudhan Chikkature MODULE_DESCRIPTION("OMAP High Speed Multimedia Card driver"); 1265a45c6cb8SMadhusudhan Chikkature MODULE_LICENSE("GPL"); 1266a45c6cb8SMadhusudhan Chikkature MODULE_ALIAS("platform:" DRIVER_NAME); 1267a45c6cb8SMadhusudhan Chikkature MODULE_AUTHOR("Texas Instruments Inc"); 1268